From: Jean-Michel THOORENS Date: Mon, 28 Jan 2019 14:20:36 +0000 (+0100) Subject: V208 corrected for line display with NOECHO X-Git-Url: http://git.osdn.net/view?p=fast-forth%2Fmaster.git;a=commitdiff_plain;h=aa07d61b90851714ce5027125d12452dc4ca15b1 V208 corrected for line display with NOECHO --- diff --git a/.gitignore b/.gitignore index e25673d..93a0741 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,7 @@ # windows *.bak - +Thumbs.db +desktop.ini # It's better to unpack these files and commit the raw source because # git has its own built in compression methods. diff --git a/CHIPSTICK_FR2433_16MHz.txt b/CHIPSTICK_FR2433_16MHz.txt index 78133c7..3d33302 100644 --- a/CHIPSTICK_FR2433_16MHz.txt +++ b/CHIPSTICK_FR2433_16MHz.txt @@ -152,8 +152,8 @@ F2 C6 8A C5 4E C9 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D4 B0 12 F8 C7 92 C3 1C 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 1C 05 F2 23 87 12 AE C8 4E C9 04 1B 5B 37 -6D 00 10 C9 34 C4 DE 21 F2 C4 54 C4 28 C7 8E CD +92 B3 1C 05 F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 +4E C9 04 1B 5B 37 6D 00 10 C9 54 C4 28 C7 8E CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 94 D3 30 CD 2A CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 36 CD diff --git a/CHIPSTICK_FR2433_4MHz.txt b/CHIPSTICK_FR2433_4MHz.txt index ef70e8d..56f76b7 100644 --- a/CHIPSTICK_FR2433_4MHz.txt +++ b/CHIPSTICK_FR2433_4MHz.txt @@ -152,8 +152,8 @@ F2 C6 8A C5 4E C9 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D4 B0 12 F8 C7 92 C3 1C 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 1C 05 F2 23 87 12 AE C8 4E C9 04 1B 5B 37 -6D 00 10 C9 34 C4 DE 21 F2 C4 54 C4 28 C7 8E CD +92 B3 1C 05 F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 +4E C9 04 1B 5B 37 6D 00 10 C9 54 C4 28 C7 8E CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 94 D3 30 CD 2A CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 36 CD diff --git a/CHIPSTICK_FR2433_8MHz.txt b/CHIPSTICK_FR2433_8MHz.txt index edf18a3..63e0c29 100644 --- a/CHIPSTICK_FR2433_8MHz.txt +++ b/CHIPSTICK_FR2433_8MHz.txt @@ -152,8 +152,8 @@ F2 C6 8A C5 4E C9 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D4 B0 12 F8 C7 92 C3 1C 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 1C 05 F2 23 87 12 AE C8 4E C9 04 1B 5B 37 -6D 00 10 C9 34 C4 DE 21 F2 C4 54 C4 28 C7 8E CD +92 B3 1C 05 F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 +4E C9 04 1B 5B 37 6D 00 10 C9 54 C4 28 C7 8E CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 94 D3 30 CD 2A CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 36 CD diff --git a/MSP430-FORTH/CHNGBAUD.4th b/MSP430-FORTH/CHNGBAUD.4th index b5c801f..059b558 100644 --- a/MSP430-FORTH/CHNGBAUD.4th +++ b/MSP430-FORTH/CHNGBAUD.4th @@ -7,7 +7,7 @@ 1 ABORT" only for 4,8,16,24 MHz MCLK!" ; : BAD_SPEED -$1806 @ 0 1000 UM/MOD +0 1000 UM/MOD SPACE 27 EMIT ." [7m" ." with MCLK = " . 1 ABORT" MHz? don't dream! " @@ -33,13 +33,7 @@ KEY #48 - ?DUP 0= IF ." 6 MBds" - R@ #4000 = - IF R@ BAD_SPEED - THEN - R@ #8000 = - IF R@ BAD_SPEED - THEN - R@ #16000 = + R@ #24000 < IF R@ BAD_SPEED THEN R@ #24000 <> @@ -49,10 +43,7 @@ IF ." 6 MBds" $0 ELSE 1 - ?DUP 0= IF ." 5 MBds" - R@ #4000 = - IF R@ BAD_SPEED - THEN - R@ #8000 = + R@ #16000 < IF R@ BAD_SPEED THEN R@ #16000 = @@ -66,10 +57,7 @@ ELSE 1 - ?DUP 0= THEN ELSE 1 - ?DUP 0= IF ." 4 MBds" - R@ #4000 = - IF R@ BAD_SPEED - THEN - R@ #8000 = + R@ #16000 < IF R@ BAD_SPEED THEN R@ #16000 = @@ -83,7 +71,7 @@ ELSE 1 - ?DUP 0= THEN ELSE 1 - ?DUP 0= IF ." 2457600 Bds" - R@ #4000 = + R@ #8000 < IF R@ BAD_SPEED THEN R@ #8000 = diff --git a/MSP430-FORTH/CHNGBAUD.f b/MSP430-FORTH/CHNGBAUD.f index 317627f..f282ebe 100644 --- a/MSP430-FORTH/CHNGBAUD.f +++ b/MSP430-FORTH/CHNGBAUD.f @@ -15,7 +15,7 @@ 1 ABORT" only for 4,8,16,24 MHz MCLK!" ; : BAD_SPEED -FREQ_KHZ @ 0 1000 UM/MOD +0 1000 UM/MOD SPACE 27 EMIT ." [7m" \ set reverse video ." with MCLK = " . 1 ABORT" MHz? don't dream! " @@ -79,7 +79,7 @@ ELSE 1 - ?DUP 0= \ select 5MBds ? THEN ELSE 1 - ?DUP 0= \ select 2457600 ? IF ." 2457600 Bds" - R@ #4000 = \ 4MHz ? + R@ #8000 < \ < 8MHz ? IF R@ BAD_SPEED \ abort THEN R@ #8000 = diff --git a/MSP430-FORTH/CORETEST.4TH b/MSP430-FORTH/CORETEST.4TH index 9fc8eb0..8751525 100644 --- a/MSP430-FORTH/CORETEST.4TH +++ b/MSP430-FORTH/CORETEST.4TH @@ -1,5 +1,7 @@ -[DEFINED] {ANS_COMP} [IF] +[UNDEFINED] {ANS_COMP} [IF] +ANS_COMP_NOT_FOUND +[THEN] ; =============================================================== ; @@ -1073,11 +1075,10 @@ CREATE ABUF 80 CHARS ALLOT : ACCEPT-TEST CR ." PLEASE TYPE UP TO 80 CHARACTERS: " -[DEFINED] LOAD" [IF] \ " \ JMT: because ACCEPT is deferred - ABUF 80 ['] ACCEPT >BODY EXECUTE \ JMT: execute default part of ACCEPT -[ELSE] - ABUF 80 ACCEPT -[THEN] +ABUF 80 \ ACCEPT \ JMT +['] ACCEPT DUP @ $4030 = \ JMT: if CFA content = $4030 (MOV @PC+,PC), ACCEPT is deferred +IF >BODY \ JMT: find default part of deferred ACCEPT +THEN EXECUTE \ execute ACCEPT CR ." RECEIVED: " [CHAR] " EMIT ABUF SWAP TYPE [CHAR] " EMIT CR ; @@ -1128,9 +1129,5 @@ T{ s12 s11 COMPARE -> -1 }T [THEN] \ COMPARE -$0A BASE ! \ happy end of core test - ECHO -[ELSE] \ if ANS_COMP is not present - ECHO - DOWNLOAD FIRST ANS_COMP! -[THEN] +$0A BASE ! ECHO +\ happy end of core test diff --git a/MSP430-FORTH/FastForthSpecs.4th b/MSP430-FORTH/FastForthSpecs.4th index 8de85cb..8620584 100644 --- a/MSP430-FORTH/FastForthSpecs.4th +++ b/MSP430-FORTH/FastForthSpecs.4th @@ -3,7 +3,8 @@ ; FastForthSpecs.4th ; ------------------ -; display all FastForth compilation options +; display all compilation options + 0 CONSTANT CASE IMMEDIATE @@ -57,10 +58,12 @@ IF CR CR ESC ." [7m" ." OTHER ADD-ON:" ESC ." [0m" - [DEFINED] {ANS_COMP} [IF] CR ." ANS_COMPLEMENT" [THEN] + [DEFINED] {ANS_COMP} [IF] CR ." ANS_COMP" [THEN] [DEFINED] {TOOLS} [IF] CR ." UTILITY" [THEN] [DEFINED] {FIXPOINT} [IF] CR ." FIXPOINT" [THEN] [DEFINED] {SD_TOOLS} [IF] CR ." SD_TOOLS" [THEN] + [DEFINED] {RTC} [IF] CR ." RTC" [THEN] + [DEFINED] {CORDIC} [IF] CR ." CORDIC" [THEN] THEN ; @@ -89,8 +92,8 @@ ENDCASE SPACE $1806 @ 0 1000 UM/MOD U. BS ?DUP IF ." ," U. BS -THEN ." MHz " -$1800 @ U. BS ." -Entry Vocabularies " +THEN ." MHz, " +$1800 @ U. BS ." -Entry Vocabularies, " - U. ." bytes, " $FF80 HERE - U. ." bytes free" CR diff --git a/MSP430-FORTH/FastForthSpecs.f b/MSP430-FORTH/FastForthSpecs.f index a76baeb..22b9d88 100644 --- a/MSP430-FORTH/FastForthSpecs.f +++ b/MSP430-FORTH/FastForthSpecs.f @@ -96,8 +96,8 @@ ENDCASE SPACE FREQ_KHZ @ 0 1000 UM/MOD U. BS ?DUP IF ." ," U. BS \ if remainder -THEN ." MHz " \ MCLK -INI_THREAD @ U. BS ." -Entry Vocabularies " +THEN ." MHz, " \ MCLK +INI_THREAD @ U. BS ." -Entry Vocabularies, " - U. ." bytes, " \ HERE - MAIN_ORG SIGNATURES HERE - U. ." bytes free" CR diff --git a/MSP_EXP430FR2355_16MHz.txt b/MSP_EXP430FR2355_16MHz.txt index 336b8c4..79eb3f6 100644 --- a/MSP_EXP430FR2355_16MHz.txt +++ b/MSP_EXP430FR2355_16MHz.txt @@ -152,8 +152,8 @@ F2 82 8A 81 4E 85 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 90 B0 12 F8 83 92 C3 9C 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 9C 05 F2 23 87 12 AE 84 4E 85 04 1B 5B 37 -6D 00 10 85 34 80 DE 21 F2 80 54 80 28 83 8E 89 +92 B3 9C 05 F2 23 87 12 34 80 DE 21 F2 80 AE 84 +4E 85 04 1B 5B 37 6D 00 10 85 54 80 28 83 8E 89 4E 85 05 6C 69 6E 65 3A 10 85 40 81 D2 82 10 85 4E 85 04 1B 5B 30 6D 00 10 85 94 8F 30 89 2A 89 86 41 42 4F 52 54 22 00 87 12 68 85 34 80 36 89 diff --git a/MSP_EXP430FR2355_24MHz.txt b/MSP_EXP430FR2355_24MHz.txt index 527454c..a010d30 100644 --- a/MSP_EXP430FR2355_24MHz.txt +++ b/MSP_EXP430FR2355_24MHz.txt @@ -152,8 +152,8 @@ F2 82 8A 81 4E 85 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 90 B0 12 F8 83 92 C3 9C 05 38 40 F0 FF 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 9C 05 F2 23 87 12 AE 84 4E 85 04 1B 5B 37 -6D 00 10 85 34 80 DE 21 F2 80 54 80 28 83 8E 89 +92 B3 9C 05 F2 23 87 12 34 80 DE 21 F2 80 AE 84 +4E 85 04 1B 5B 37 6D 00 10 85 54 80 28 83 8E 89 4E 85 05 6C 69 6E 65 3A 10 85 40 81 D2 82 10 85 4E 85 04 1B 5B 30 6D 00 10 85 94 8F 30 89 2A 89 86 41 42 4F 52 54 22 00 87 12 68 85 34 80 36 89 diff --git a/MSP_EXP430FR2355_4MHz.txt b/MSP_EXP430FR2355_4MHz.txt index a43a10a..915b4bd 100644 --- a/MSP_EXP430FR2355_4MHz.txt +++ b/MSP_EXP430FR2355_4MHz.txt @@ -152,8 +152,8 @@ F2 82 8A 81 4E 85 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 90 B0 12 F8 83 92 C3 9C 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 9C 05 F2 23 87 12 AE 84 4E 85 04 1B 5B 37 -6D 00 10 85 34 80 DE 21 F2 80 54 80 28 83 8E 89 +92 B3 9C 05 F2 23 87 12 34 80 DE 21 F2 80 AE 84 +4E 85 04 1B 5B 37 6D 00 10 85 54 80 28 83 8E 89 4E 85 05 6C 69 6E 65 3A 10 85 40 81 D2 82 10 85 4E 85 04 1B 5B 30 6D 00 10 85 94 8F 30 89 2A 89 86 41 42 4F 52 54 22 00 87 12 68 85 34 80 36 89 diff --git a/MSP_EXP430FR2355_8MHz.txt b/MSP_EXP430FR2355_8MHz.txt index 978b793..a9e16c8 100644 --- a/MSP_EXP430FR2355_8MHz.txt +++ b/MSP_EXP430FR2355_8MHz.txt @@ -152,8 +152,8 @@ F2 82 8A 81 4E 85 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 90 B0 12 F8 83 92 C3 9C 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 9C 05 F2 23 87 12 AE 84 4E 85 04 1B 5B 37 -6D 00 10 85 34 80 DE 21 F2 80 54 80 28 83 8E 89 +92 B3 9C 05 F2 23 87 12 34 80 DE 21 F2 80 AE 84 +4E 85 04 1B 5B 37 6D 00 10 85 54 80 28 83 8E 89 4E 85 05 6C 69 6E 65 3A 10 85 40 81 D2 82 10 85 4E 85 04 1B 5B 30 6D 00 10 85 94 8F 30 89 2A 89 86 41 42 4F 52 54 22 00 87 12 68 85 34 80 36 89 diff --git a/MSP_EXP430FR2433_16MHz.txt b/MSP_EXP430FR2433_16MHz.txt index 39cc594..3c8311e 100644 --- a/MSP_EXP430FR2433_16MHz.txt +++ b/MSP_EXP430FR2433_16MHz.txt @@ -152,8 +152,8 @@ F2 C6 8A C5 4E C9 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D4 B0 12 F8 C7 92 C3 1C 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 1C 05 F2 23 87 12 AE C8 4E C9 04 1B 5B 37 -6D 00 10 C9 34 C4 DE 21 F2 C4 54 C4 28 C7 8E CD +92 B3 1C 05 F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 +4E C9 04 1B 5B 37 6D 00 10 C9 54 C4 28 C7 8E CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 94 D3 30 CD 2A CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 36 CD diff --git a/MSP_EXP430FR2433_4MHz.txt b/MSP_EXP430FR2433_4MHz.txt index 9dfe036..390a781 100644 --- a/MSP_EXP430FR2433_4MHz.txt +++ b/MSP_EXP430FR2433_4MHz.txt @@ -152,8 +152,8 @@ F2 C6 8A C5 4E C9 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D4 B0 12 F8 C7 92 C3 1C 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 1C 05 F2 23 87 12 AE C8 4E C9 04 1B 5B 37 -6D 00 10 C9 34 C4 DE 21 F2 C4 54 C4 28 C7 8E CD +92 B3 1C 05 F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 +4E C9 04 1B 5B 37 6D 00 10 C9 54 C4 28 C7 8E CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 94 D3 30 CD 2A CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 36 CD diff --git a/MSP_EXP430FR2433_8MHz.txt b/MSP_EXP430FR2433_8MHz.txt index 1324ee5..197b64c 100644 --- a/MSP_EXP430FR2433_8MHz.txt +++ b/MSP_EXP430FR2433_8MHz.txt @@ -152,8 +152,8 @@ F2 C6 8A C5 4E C9 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D4 B0 12 F8 C7 92 C3 1C 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 1C 05 F2 23 87 12 AE C8 4E C9 04 1B 5B 37 -6D 00 10 C9 34 C4 DE 21 F2 C4 54 C4 28 C7 8E CD +92 B3 1C 05 F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 +4E C9 04 1B 5B 37 6D 00 10 C9 54 C4 28 C7 8E CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 94 D3 30 CD 2A CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 36 CD diff --git a/MSP_EXP430FR4133_16MHz.txt b/MSP_EXP430FR4133_16MHz.txt index e24a798..4fe82d6 100644 --- a/MSP_EXP430FR4133_16MHz.txt +++ b/MSP_EXP430FR4133_16MHz.txt @@ -156,8 +156,8 @@ C8 C5 F2 C4 28 C7 12 CD 4E C9 05 0D 0A 20 20 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 56 D4 B0 12 F8 C7 92 C3 1C 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 92 B3 1C 05 -F2 23 87 12 AE C8 4E C9 04 1B 5B 37 6D 00 10 C9 -34 C4 DE 21 F2 C4 54 C4 28 C7 CA CD 4E C9 05 6C +F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 4E C9 04 1B +5B 37 6D 00 10 C9 54 C4 28 C7 CA CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 D0 D3 6C CD 66 CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 72 CD 0A CC 2A C4 diff --git a/MSP_EXP430FR4133_4MHz.txt b/MSP_EXP430FR4133_4MHz.txt index 638c424..6467426 100644 --- a/MSP_EXP430FR4133_4MHz.txt +++ b/MSP_EXP430FR4133_4MHz.txt @@ -156,8 +156,8 @@ C8 C5 F2 C4 28 C7 12 CD 4E C9 05 0D 0A 20 20 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 56 D4 B0 12 F8 C7 92 C3 1C 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 92 B3 1C 05 -F2 23 87 12 AE C8 4E C9 04 1B 5B 37 6D 00 10 C9 -34 C4 DE 21 F2 C4 54 C4 28 C7 CA CD 4E C9 05 6C +F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 4E C9 04 1B +5B 37 6D 00 10 C9 54 C4 28 C7 CA CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 D0 D3 6C CD 66 CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 72 CD 0A CC 2A C4 diff --git a/MSP_EXP430FR4133_8MHz.txt b/MSP_EXP430FR4133_8MHz.txt index 13ed817..f75d5a9 100644 --- a/MSP_EXP430FR4133_8MHz.txt +++ b/MSP_EXP430FR4133_8MHz.txt @@ -156,8 +156,8 @@ C8 C5 F2 C4 28 C7 12 CD 4E C9 05 0D 0A 20 20 20 C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 56 D4 B0 12 F8 C7 92 C3 1C 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 92 B3 1C 05 -F2 23 87 12 AE C8 4E C9 04 1B 5B 37 6D 00 10 C9 -34 C4 DE 21 F2 C4 54 C4 28 C7 CA CD 4E C9 05 6C +F2 23 87 12 34 C4 DE 21 F2 C4 AE C8 4E C9 04 1B +5B 37 6D 00 10 C9 54 C4 28 C7 CA CD 4E C9 05 6C 69 6E 65 3A 10 C9 40 C5 D2 C6 10 C9 4E C9 04 1B 5B 30 6D 00 10 C9 D0 D3 6C CD 66 CD 86 41 42 4F 52 54 22 00 87 12 68 C9 34 C4 72 CD 0A CC 2A C4 diff --git a/MSP_EXP430FR5739_16MHz.txt b/MSP_EXP430FR5739_16MHz.txt index 0b0aea2..bdfc2f4 100644 --- a/MSP_EXP430FR5739_16MHz.txt +++ b/MSP_EXP430FR5739_16MHz.txt @@ -152,8 +152,8 @@ F2 C4 8A C3 4E C7 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D2 B0 12 F8 C5 92 C3 DC 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 DC 05 F2 23 87 12 AE C6 4E C7 04 1B 5B 37 -6D 00 10 C7 34 C2 DE 1D F2 C2 54 C2 28 C5 8E CB +92 B3 DC 05 F2 23 87 12 34 C2 DE 1D F2 C2 AE C6 +4E C7 04 1B 5B 37 6D 00 10 C7 54 C2 28 C5 8E CB 4E C7 05 6C 69 6E 65 3A 10 C7 40 C3 D2 C4 10 C7 4E C7 04 1B 5B 30 6D 00 10 C7 94 D1 30 CB 2A CB 86 41 42 4F 52 54 22 00 87 12 68 C7 34 C2 36 CB diff --git a/MSP_EXP430FR5739_24MHz.txt b/MSP_EXP430FR5739_24MHz.txt index 5425ed6..b811b46 100644 --- a/MSP_EXP430FR5739_24MHz.txt +++ b/MSP_EXP430FR5739_24MHz.txt @@ -152,8 +152,8 @@ F2 C4 8A C3 4E C7 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D2 B0 12 F8 C5 92 C3 DC 05 38 40 F0 FF 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 DC 05 F2 23 87 12 AE C6 4E C7 04 1B 5B 37 -6D 00 10 C7 34 C2 DE 1D F2 C2 54 C2 28 C5 8E CB +92 B3 DC 05 F2 23 87 12 34 C2 DE 1D F2 C2 AE C6 +4E C7 04 1B 5B 37 6D 00 10 C7 54 C2 28 C5 8E CB 4E C7 05 6C 69 6E 65 3A 10 C7 40 C3 D2 C4 10 C7 4E C7 04 1B 5B 30 6D 00 10 C7 94 D1 30 CB 2A CB 86 41 42 4F 52 54 22 00 87 12 68 C7 34 C2 36 CB diff --git a/MSP_EXP430FR5739_4MHz.txt b/MSP_EXP430FR5739_4MHz.txt index 7e125dc..7b31693 100644 --- a/MSP_EXP430FR5739_4MHz.txt +++ b/MSP_EXP430FR5739_4MHz.txt @@ -152,8 +152,8 @@ F2 C4 8A C3 4E C7 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D2 B0 12 F8 C5 92 C3 DC 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 DC 05 F2 23 87 12 AE C6 4E C7 04 1B 5B 37 -6D 00 10 C7 34 C2 DE 1D F2 C2 54 C2 28 C5 8E CB +92 B3 DC 05 F2 23 87 12 34 C2 DE 1D F2 C2 AE C6 +4E C7 04 1B 5B 37 6D 00 10 C7 54 C2 28 C5 8E CB 4E C7 05 6C 69 6E 65 3A 10 C7 40 C3 D2 C4 10 C7 4E C7 04 1B 5B 30 6D 00 10 C7 94 D1 30 CB 2A CB 86 41 42 4F 52 54 22 00 87 12 68 C7 34 C2 36 CB diff --git a/MSP_EXP430FR5739_8MHz.txt b/MSP_EXP430FR5739_8MHz.txt index d57ab10..29501f7 100644 --- a/MSP_EXP430FR5739_8MHz.txt +++ b/MSP_EXP430FR5739_8MHz.txt @@ -152,8 +152,8 @@ F2 C4 8A C3 4E C7 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A D2 B0 12 F8 C5 92 C3 DC 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 DC 05 F2 23 87 12 AE C6 4E C7 04 1B 5B 37 -6D 00 10 C7 34 C2 DE 1D F2 C2 54 C2 28 C5 8E CB +92 B3 DC 05 F2 23 87 12 34 C2 DE 1D F2 C2 AE C6 +4E C7 04 1B 5B 37 6D 00 10 C7 54 C2 28 C5 8E CB 4E C7 05 6C 69 6E 65 3A 10 C7 40 C3 D2 C4 10 C7 4E C7 04 1B 5B 30 6D 00 10 C7 94 D1 30 CB 2A CB 86 41 42 4F 52 54 22 00 87 12 68 C7 34 C2 36 CB diff --git a/MSP_EXP430FR5969_16MHz.txt b/MSP_EXP430FR5969_16MHz.txt index 35c9fbf..720b45d 100644 --- a/MSP_EXP430FR5969_16MHz.txt +++ b/MSP_EXP430FR5969_16MHz.txt @@ -152,8 +152,8 @@ F2 46 8A 45 4E 49 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 54 B0 12 F8 47 92 C3 DC 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 DC 05 F2 23 87 12 AE 48 4E 49 04 1B 5B 37 -6D 00 10 49 34 44 DE 1D F2 44 54 44 28 47 8E 4D +92 B3 DC 05 F2 23 87 12 34 44 DE 1D F2 44 AE 48 +4E 49 04 1B 5B 37 6D 00 10 49 54 44 28 47 8E 4D 4E 49 05 6C 69 6E 65 3A 10 49 40 45 D2 46 10 49 4E 49 04 1B 5B 30 6D 00 10 49 94 53 30 4D 2A 4D 86 41 42 4F 52 54 22 00 87 12 68 49 34 44 36 4D diff --git a/MSP_EXP430FR5969_4MHz.txt b/MSP_EXP430FR5969_4MHz.txt index 05509cc..a5c6f17 100644 --- a/MSP_EXP430FR5969_4MHz.txt +++ b/MSP_EXP430FR5969_4MHz.txt @@ -152,8 +152,8 @@ F2 46 8A 45 4E 49 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 54 B0 12 F8 47 92 C3 DC 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 DC 05 F2 23 87 12 AE 48 4E 49 04 1B 5B 37 -6D 00 10 49 34 44 DE 1D F2 44 54 44 28 47 8E 4D +92 B3 DC 05 F2 23 87 12 34 44 DE 1D F2 44 AE 48 +4E 49 04 1B 5B 37 6D 00 10 49 54 44 28 47 8E 4D 4E 49 05 6C 69 6E 65 3A 10 49 40 45 D2 46 10 49 4E 49 04 1B 5B 30 6D 00 10 49 94 53 30 4D 2A 4D 86 41 42 4F 52 54 22 00 87 12 68 49 34 44 36 4D diff --git a/MSP_EXP430FR5969_8MHz.txt b/MSP_EXP430FR5969_8MHz.txt index eb5e292..b503ab1 100644 --- a/MSP_EXP430FR5969_8MHz.txt +++ b/MSP_EXP430FR5969_8MHz.txt @@ -152,8 +152,8 @@ F2 46 8A 45 4E 49 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 54 B0 12 F8 47 92 C3 DC 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 DC 05 F2 23 87 12 AE 48 4E 49 04 1B 5B 37 -6D 00 10 49 34 44 DE 1D F2 44 54 44 28 47 8E 4D +92 B3 DC 05 F2 23 87 12 34 44 DE 1D F2 44 AE 48 +4E 49 04 1B 5B 37 6D 00 10 49 54 44 28 47 8E 4D 4E 49 05 6C 69 6E 65 3A 10 49 40 45 D2 46 10 49 4E 49 04 1B 5B 30 6D 00 10 49 94 53 30 4D 2A 4D 86 41 42 4F 52 54 22 00 87 12 68 49 34 44 36 4D diff --git a/MSP_EXP430FR5994_16MHz.txt b/MSP_EXP430FR5994_16MHz.txt index 6723307..66b5829 100644 --- a/MSP_EXP430FR5994_16MHz.txt +++ b/MSP_EXP430FR5994_16MHz.txt @@ -164,8 +164,8 @@ E4 49 C8 41 F2 40 28 43 84 49 BA 45 05 0D 0A 20 B0 12 DE 50 1B 42 32 20 0B 93 04 24 CB 43 02 00 2B 4B FA 3F B0 12 5A 44 92 C3 DC 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 92 B3 -DC 05 F2 23 87 12 1A 45 BA 45 04 1B 5B 37 6D 00 -7C 45 34 40 DE 1D F2 40 54 40 28 43 4C 4A BA 45 +DC 05 F2 23 87 12 34 40 DE 1D F2 40 1A 45 BA 45 +04 1B 5B 37 6D 00 7C 45 54 40 28 43 4C 4A BA 45 05 6C 69 6E 65 3A 7C 45 40 41 D2 42 7C 45 BA 45 04 1B 5B 30 6D 00 7C 45 52 50 DE 49 D8 49 86 41 42 4F 52 54 22 00 87 12 D4 45 34 40 E4 49 3A 48 diff --git a/MSP_EXP430FR5994_4MHz.txt b/MSP_EXP430FR5994_4MHz.txt index 379b41f..97f4601 100644 --- a/MSP_EXP430FR5994_4MHz.txt +++ b/MSP_EXP430FR5994_4MHz.txt @@ -164,8 +164,8 @@ E4 49 C8 41 F2 40 28 43 84 49 BA 45 05 0D 0A 20 B0 12 DE 50 1B 42 32 20 0B 93 04 24 CB 43 02 00 2B 4B FA 3F B0 12 5A 44 92 C3 DC 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 92 B3 -DC 05 F2 23 87 12 1A 45 BA 45 04 1B 5B 37 6D 00 -7C 45 34 40 DE 1D F2 40 54 40 28 43 4C 4A BA 45 +DC 05 F2 23 87 12 34 40 DE 1D F2 40 1A 45 BA 45 +04 1B 5B 37 6D 00 7C 45 54 40 28 43 4C 4A BA 45 05 6C 69 6E 65 3A 7C 45 40 41 D2 42 7C 45 BA 45 04 1B 5B 30 6D 00 7C 45 52 50 DE 49 D8 49 86 41 42 4F 52 54 22 00 87 12 D4 45 34 40 E4 49 3A 48 diff --git a/MSP_EXP430FR5994_8MHz.txt b/MSP_EXP430FR5994_8MHz.txt index d2068f3..2f78d57 100644 --- a/MSP_EXP430FR5994_8MHz.txt +++ b/MSP_EXP430FR5994_8MHz.txt @@ -164,8 +164,8 @@ E4 49 C8 41 F2 40 28 43 84 49 BA 45 05 0D 0A 20 B0 12 DE 50 1B 42 32 20 0B 93 04 24 CB 43 02 00 2B 4B FA 3F B0 12 5A 44 92 C3 DC 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 92 B3 -DC 05 F2 23 87 12 1A 45 BA 45 04 1B 5B 37 6D 00 -7C 45 34 40 DE 1D F2 40 54 40 28 43 4C 4A BA 45 +DC 05 F2 23 87 12 34 40 DE 1D F2 40 1A 45 BA 45 +04 1B 5B 37 6D 00 7C 45 54 40 28 43 4C 4A BA 45 05 6C 69 6E 65 3A 7C 45 40 41 D2 42 7C 45 BA 45 04 1B 5B 30 6D 00 7C 45 52 50 DE 49 D8 49 86 41 42 4F 52 54 22 00 87 12 D4 45 34 40 E4 49 3A 48 diff --git a/MSP_EXP430FR6989_16MHz.txt b/MSP_EXP430FR6989_16MHz.txt index fdafe60..c3a7fdd 100644 --- a/MSP_EXP430FR6989_16MHz.txt +++ b/MSP_EXP430FR6989_16MHz.txt @@ -152,8 +152,8 @@ F2 46 8A 45 4E 49 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 54 B0 12 F8 47 92 C3 FC 05 38 40 A0 AA 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 FC 05 F2 23 87 12 AE 48 4E 49 04 1B 5B 37 -6D 00 10 49 34 44 DE 1D F2 44 54 44 28 47 8E 4D +92 B3 FC 05 F2 23 87 12 34 44 DE 1D F2 44 AE 48 +4E 49 04 1B 5B 37 6D 00 10 49 54 44 28 47 8E 4D 4E 49 05 6C 69 6E 65 3A 10 49 40 45 D2 46 10 49 4E 49 04 1B 5B 30 6D 00 10 49 94 53 30 4D 2A 4D 86 41 42 4F 52 54 22 00 87 12 68 49 34 44 36 4D diff --git a/MSP_EXP430FR6989_4MHz.txt b/MSP_EXP430FR6989_4MHz.txt index 7880954..cc38f0b 100644 --- a/MSP_EXP430FR6989_4MHz.txt +++ b/MSP_EXP430FR6989_4MHz.txt @@ -152,8 +152,8 @@ F2 46 8A 45 4E 49 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 54 B0 12 F8 47 92 C3 FC 05 38 40 A8 2A 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 FC 05 F2 23 87 12 AE 48 4E 49 04 1B 5B 37 -6D 00 10 49 34 44 DE 1D F2 44 54 44 28 47 8E 4D +92 B3 FC 05 F2 23 87 12 34 44 DE 1D F2 44 AE 48 +4E 49 04 1B 5B 37 6D 00 10 49 54 44 28 47 8E 4D 4E 49 05 6C 69 6E 65 3A 10 49 40 45 D2 46 10 49 4E 49 04 1B 5B 30 6D 00 10 49 94 53 30 4D 2A 4D 86 41 42 4F 52 54 22 00 87 12 68 49 34 44 36 4D diff --git a/MSP_EXP430FR6989_8MHz.txt b/MSP_EXP430FR6989_8MHz.txt index 013dbe6..d3c5ce4 100644 --- a/MSP_EXP430FR6989_8MHz.txt +++ b/MSP_EXP430FR6989_8MHz.txt @@ -152,8 +152,8 @@ F2 46 8A 45 4E 49 0B 46 52 41 4D 20 66 75 6C 6C 3F 40 80 1C C5 3F 8F 93 02 00 03 20 2F 52 3E 4F 30 4D B0 12 1A 54 B0 12 F8 47 92 C3 FC 05 38 40 50 55 39 42 09 59 03 43 19 83 FD 23 18 83 F9 23 -92 B3 FC 05 F2 23 87 12 AE 48 4E 49 04 1B 5B 37 -6D 00 10 49 34 44 DE 1D F2 44 54 44 28 47 8E 4D +92 B3 FC 05 F2 23 87 12 34 44 DE 1D F2 44 AE 48 +4E 49 04 1B 5B 37 6D 00 10 49 54 44 28 47 8E 4D 4E 49 05 6C 69 6E 65 3A 10 49 40 45 D2 46 10 49 4E 49 04 1B 5B 30 6D 00 10 49 94 53 30 4D 2A 4D 86 41 42 4F 52 54 22 00 87 12 68 49 34 44 36 4D diff --git a/README.md b/README.md index 475afe8..9d263c8 100644 --- a/README.md +++ b/README.md @@ -503,9 +503,6 @@ and hardware control flow : http://www.google.com/search?q=PL2303TA http://www.google.com/search?q=PL2303HXD - WARNING! XON/XOFF no longer works with new Prolific driver v3.8.12.0 (03/03/2017)... - Waiting next update, get on web previous PL2303_Prolific_DriverInstaller_v1160.exe (or .zip) - or USBtoUART bridge, with a CP2102 device and 3.3V/5V that allows XON/XOFF control flow : diff --git a/forthMSP430FR.asm b/forthMSP430FR.asm index a7835f4..0614933 100644 --- a/forthMSP430FR.asm +++ b/forthMSP430FR.asm @@ -44,12 +44,12 @@ VER .equ "V208" ; FORTH version ;------------------------------------------------------------------------------- ;MSP_EXP430FR5739 ; compile for MSP-EXP430FR5739 launchpad ; 24 + 2 + 3876 bytes ;MSP_EXP430FR5969 ; compile for MSP-EXP430FR5969 launchpad ; 24 + 2 + 3852 bytes -MSP_EXP430FR5994 ;; compile for MSP-EXP430FR5994 launchpad ; 24 + 2 + 3878 bytes +;MSP_EXP430FR5994 ; compile for MSP-EXP430FR5994 launchpad ; 24 + 2 + 3878 bytes ;MSP_EXP430FR6989 ; compile for MSP-EXP430FR6989 launchpad ; 24 + 2 + 3888 bytes ;MSP_EXP430FR4133 ; compile for MSP-EXP430FR4133 launchpad ; 24 + 2 + 3918 bytes ;MSP_EXP430FR2355 ; compile for MSP-EXP430FR2355 launchpad ; 24 + 2 + 3854 bytes ;MSP_EXP430FR2433 ; compile for MSP-EXP430FR2433 launchpad ; 24 + 2 + 3840 bytes -;CHIPSTICK_FR2433 ; compile for the "CHIPSTICK" of M. Ken BOAK ; 24 + 2 + 3840 bytes +CHIPSTICK_FR2433 ;; compile for the "CHIPSTICK" of M. Ken BOAK ; 24 + 2 + 3840 bytes ; choose DTC (Direct Threaded Code) model, if you don't know, choose 1 DTC .equ 1 ; DTC model 1 : DOCOL = CALL rDOCOL 14 cycles 1 word shortest DTC model @@ -71,9 +71,9 @@ NONAME ;; + 54 bytes : adds :NONAME CODENNM (CODENoNaMe) VOCABULARY_SET ;; + 104 bytes : adds words: VOCABULARY FORTH ASSEMBLER ALSO PREVIOUS ONLY DEFINITIONS (FORTH83) DOUBLE_INPUT ;; + 46 bytes : adds the interpretation input for double numbers (dot numbers) FIXPOINT_INPUT ;; + 112 bytes : adds the interpretation input for Q15.16 numbers, mandatory for FIXPOINT ADD-ON -SD_CARD_LOADER ;; + 1748 bytes : to LOAD source files from SD_card -SD_CARD_READ_WRITE ;; + 1192 bytes : to read, create, write and del files + copy text files from PC to SD_Card -BOOTLOADER ;; + 72 bytes : includes to the SD_CARD\BOOT.4TH file as bootloader. +;SD_CARD_LOADER ; + 1748 bytes : to LOAD source files from SD_card +;SD_CARD_READ_WRITE ; + 1192 bytes : to read, create, write and del files + copy text files from PC to SD_Card +;BOOTLOADER ; + 72 bytes : includes to the SD_CARD\BOOT.4TH file as bootloader. ;QUIETBOOT ; + 2 bytes : to perform bootloader without displaying. ;TOTAL ; + 4 bytes : to save also R4 to R7 registers during interrupts. @@ -83,7 +83,7 @@ BOOTLOADER ;; + 72 bytes : includes to the SD_CARD\BOOT.4TH f ;------------------------------------------------------------------------------- v ;FIXPOINT ; + 422/528 bytes add HOLDS F+ F- F/ F* F#S F. S>F 2@ 2CONSTANT FIXPOINT.f UTILITY ;; + 434/524 bytes (1/16threads) : add .S .RS WORDS U.R DUMP ? UTILITY.f -SD_TOOLS ;; + 142 bytes for trivial DIR, FAT, CLUSTER and SECTOR view, adds UTILITY SD_TOOLS.f +;SD_TOOLS ; + 142 bytes for trivial DIR, FAT, CLUSTER and SECTOR view, adds UTILITY SD_TOOLS.f ;ANS_CORE_COMPLEMENT ; + 902 bytes : required to pass coretest.4th ; (includes items below) ANS_COMP.f ;------------------------------------------------------------------------------- @@ -1400,18 +1400,18 @@ YEMIT2 ; BIT.B #CTS,&HANDSHAKIN ; 3 JNZ YEMIT2 ; 2 .ENDIF ; -YEMIT ; hi7/4~ lo:12/9~ send/send_not echo to terminal +YEMIT ; 7~/4~ send/send_not echo to terminal .word 4882h ; 4882h = MOV Y,& .word TERM_TXBUF ; 3 mNEXT ; 4 -; ----------------------------------; +; ----------------------------------; 25~ AYEMIT_RET FORTHtoASM ; 0 YEMII NEXT address SUB #2,IP ; 1 reset YEMIT NEXT address to AYEMIT_RET WAITaKEY BIT #UCRXIFG,&TERM_IFG ; 3 new char in TERMRXBUF ? JNZ AKEYREAD ; 2 yes JZ WAITaKEY ; 2 no ; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv; -; stops the 2th stopwatch ; best case result: 26~/22~ (with/without echo) ==> 385/455 kBds/MHz +; stops the 2th stopwatch ; best case result: 31~/28~ (with/without echo) ==> 322/357 kBds/MHz ; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^; ; ----------------------------------; @@ -2229,13 +2229,14 @@ QABUSBLOOPI NOP ; 1~ <---+ | ; ----------------------------------; QABORT_DISPLAY ; <== WARM jumps here mDOCOL ; + .word lit,LINE,FETCH .word ECHO ; .word XSQUOTE ; -- c-addr u c-addr1 u1 .byte 4,27,"[7m" ; type ESC[7m .word TYPE ; -- c-addr u set reverse video -ERRLINE .word lit,LINE,FETCH,QDUP; + .word QDUP ; if LINE <> 0 .word QBRAN,ERRLINE_END; if LINE = 0 - .word XSQUOTE ; displays the line where error occured +ERRLINE .word XSQUOTE ; else displays the line where error occured .byte 5,"line:" ; .word TYPE ; .word ONEMINUS ;