debug huff.vhd. make startgen signal reset registers

[fpga-leon-mjpeg/leon-mjpeg.git] / grlib-gpl-1.0.22-b4095 / designs / leon3-altera-ep3c25-eek-mjpeg / leon3mp.vhd

diff --git a/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd b/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd
index 1834302..c1dcf67 100644 (file)
--- a/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd
+++ b/grlib-gpl-1.0.22-b4095/designs/leon3-altera-ep3c25-eek-mjpeg/leon3mp.vhd
@@ -801,7 +801,7 @@ begin
 
 
 -----------------------------------------------------------------------
----   YCC-RGB translation module   ------------------------------------
+---   JPEG  module                 ------------------------------------
 -----------------------------------------------------------------------
 
   jpgycc : huffdctycc