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[immortalwrt/immortalwrt.git] / target / linux / ipq806x / patches-5.15 / 082-ipq8064-dtsi-tweaks.patch
1 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
2 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
3 @@ -352,6 +352,7 @@
4                         gpio-ranges = <&qcom_pinmux 0 0 69>;
5                         #gpio-cells = <2>;
6                         interrupt-controller;
7 +                       #address-cells = <0>;
8                         #interrupt-cells = <2>;
9                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
10  
11 @@ -379,6 +380,7 @@
12                                         function = "pcie3_rst";
13                                         drive-strength = <12>;
14                                         bias-disable;
15 +                                       output-low;
16                                 };
17                         };
18  
19 @@ -411,12 +413,9 @@
20                         };
21  
22                         nand_pins: nand_pins {
23 -                               mux {
24 +                               disable {
25                                         pins = "gpio34", "gpio35", "gpio36",
26 -                                              "gpio37", "gpio38", "gpio39",
27 -                                              "gpio40", "gpio41", "gpio42",
28 -                                              "gpio43", "gpio44", "gpio45",
29 -                                              "gpio46", "gpio47";
30 +                                              "gpio37", "gpio38";
31                                         function = "nand";
32                                         drive-strength = <10>;
33                                         bias-disable;
34 @@ -424,6 +423,8 @@
35  
36                                 pullups {
37                                         pins = "gpio39";
38 +                                       function = "nand";
39 +                                       drive-strength = <10>;
40                                         bias-pull-up;
41                                 };
42  
43 @@ -431,6 +432,8 @@
44                                         pins = "gpio40", "gpio41", "gpio42",
45                                                "gpio43", "gpio44", "gpio45",
46                                                "gpio46", "gpio47";
47 +                                       function = "nand";
48 +                                       drive-strength = <10>;
49                                         bias-bus-hold;
50                                 };
51                         };
52 @@ -439,6 +442,7 @@
53                 intc: interrupt-controller@2000000 {
54                         compatible = "qcom,msm-qgic2";
55                         interrupt-controller;
56 +                       #address-cells = <0>;
57                         #interrupt-cells = <3>;
58                         reg = <0x02000000 0x1000>,
59                               <0x02002000 0x1000>;
60 @@ -468,11 +472,13 @@
61                 acc0: clock-controller@2088000 {
62                         compatible = "qcom,kpss-acc-v1";
63                         reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
64 +                       clock-output-names = "acpu0_aux";
65                 };
66  
67                 acc1: clock-controller@2098000 {
68                         compatible = "qcom,kpss-acc-v1";
69                         reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
70 +                       clock-output-names = "acpu1_aux";
71                 };
72  
73                 adm_dma: dma-controller@18300000 {
74 @@ -496,13 +502,13 @@
75                 };
76  
77                 saw0: regulator@2089000 {
78 -                       compatible = "qcom,saw2";
79 +                       compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
80                         reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
81                         regulator;
82                 };
83  
84                 saw1: regulator@2099000 {
85 -                       compatible = "qcom,saw2";
86 +                       compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
87                         reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
88                         regulator;
89                 };
90 @@ -533,7 +533,7 @@
91                                 status = "disabled";
92                         };
93  
94 -                       i2c@124a0000 {
95 +                       gsbi2_i2c: i2c@124a0000 {
96                                 compatible = "qcom,i2c-qup-v1.1.1";
97                                 reg = <0x124a0000 0x1000>;
98                                 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
99 @@ -676,9 +682,6 @@
100                         compatible = "qcom,ipq806x-nand";
101                         reg = <0x1ac00000 0x800>;
102  
103 -                       pinctrl-0 = <&nand_pins>;
104 -                       pinctrl-names = "default";
105 -
106                         clocks = <&gcc EBI2_CLK>,
107                                  <&gcc EBI2_AON_CLK>;
108                         clock-names = "core", "aon";
109 @@ -733,10 +736,13 @@
110                         tsens_calib_backup: calib_backup@410 {
111                                 reg = <0x410 0xb>;
112                         };
113 +                       speedbin_efuse: speedbin@0c0 {
114 +                               reg = <0x0c0 0x4>;
115 +                       };
116                 };
117  
118                 gcc: clock-controller@900000 {
119 -                       compatible = "qcom,gcc-ipq8064";
120 +                       compatible = "qcom,gcc-ipq8064", "syscon";
121                         reg = <0x00900000 0x4000>;
122                         #clock-cells = <1>;
123                         #reset-cells = <1>;
124 @@ -768,10 +774,45 @@
125                         clocks = <&gcc RPM_MSG_RAM_H_CLK>;
126                         clock-names = "ram";
127  
128 +                       #address-cells = <1>;
129 +                       #size-cells = <0>;
130 +
131                         rpmcc: clock-controller {
132                                 compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
133                                 #clock-cells = <1>;
134                         };
135 +
136 +                       regulators {
137 +                               compatible = "qcom,rpm-smb208-regulators";
138 +
139 +                               smb208_s1a: s1a {
140 +                                       regulator-min-microvolt = <1050000>;
141 +                                       regulator-max-microvolt = <1150000>;
142 +
143 +                                       qcom,switch-mode-frequency = <1200000>;
144 +                               };
145 +
146 +                               smb208_s1b: s1b {
147 +                                       regulator-min-microvolt = <1050000>;
148 +                                       regulator-max-microvolt = <1150000>;
149 +
150 +                                       qcom,switch-mode-frequency = <1200000>;
151 +                               };
152 +
153 +                               smb208_s2a: s2a {
154 +                                       regulator-min-microvolt = < 800000>;
155 +                                       regulator-max-microvolt = <1250000>;
156 +
157 +                                       qcom,switch-mode-frequency = <1200000>;
158 +                               };
159 +
160 +                               smb208_s2b: s2b {
161 +                                       regulator-min-microvolt = < 800000>;
162 +                                       regulator-max-microvolt = <1250000>;
163 +
164 +                                       qcom,switch-mode-frequency = <1200000>;
165 +                               };
166 +                       };
167                 };
168  
169                 tcsr: syscon@1a400000 {
170 @@ -965,7 +1006,7 @@
171  
172                 gmac0: ethernet@37000000 {
173                         device_type = "network";
174 -                       compatible = "qcom,ipq806x-gmac";
175 +                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
176                         reg = <0x37000000 0x200000>;
177                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
178                         interrupt-names = "macirq";
179 @@ -989,7 +1030,7 @@
180  
181                 gmac1: ethernet@37200000 {
182                         device_type = "network";
183 -                       compatible = "qcom,ipq806x-gmac";
184 +                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
185                         reg = <0x37200000 0x200000>;
186                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
187                         interrupt-names = "macirq";
188 @@ -1013,7 +1054,7 @@
189  
190                 gmac2: ethernet@37400000 {
191                         device_type = "network";
192 -                       compatible = "qcom,ipq806x-gmac";
193 +                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
194                         reg = <0x37400000 0x200000>;
195                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
196                         interrupt-names = "macirq";
197 @@ -1037,7 +1078,7 @@
198  
199                 gmac3: ethernet@37600000 {
200                         device_type = "network";
201 -                       compatible = "qcom,ipq806x-gmac";
202 +                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
203                         reg = <0x37600000 0x200000>;
204                         interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
205                         interrupt-names = "macirq";
206 @@ -1050,8 +1050,6 @@
207                         clocks = <&gcc USB30_0_UTMI_CLK>;
208                         clock-names = "ref";
209                         #phy-cells = <0>;
210 -
211 -                       status = "disabled";
212                 };
213  
214                 ss_phy_0: usb3phy@100f8830 {
215 @@ -1055,8 +1055,6 @@
216                         clocks = <&gcc USB30_0_MASTER_CLK>;
217                         clock-names = "ref";
218                         #phy-cells = <0>;
219 -
220 -                       status = "disabled";
221                 };
222  
223                 usb3_0: usb3@100f8800 {
224 @@ -1176,7 +1217,7 @@
225                 };
226  
227                 amba: amba {
228 -                       compatible = "simple-bus";
229 +                       compatible = "arm,amba-bus";
230                         #address-cells = <1>;
231                         #size-cells = <1>;
232                         ranges;
233 @@ -1195,7 +1236,6 @@
234                                 non-removable;
235                                 cap-sd-highspeed;
236                                 cap-mmc-highspeed;
237 -                               mmc-ddr-1_8v;
238                                 vmmc-supply = <&vsdcc_fixed>;
239                                 dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
240                                 dma-names = "tx", "rx";