update libMiMic

[mimic/MiMicSDK.git] / lib / src / driver / ethernet / lpc4088 / EthDev_LPC4088.c

diff --git a/lib/src/driver/ethernet/lpc4088/EthDev_LPC4088.c b/lib/src/driver/ethernet/lpc4088/EthDev_LPC4088.c
index 6a5f5c2..b899bf0 100644 (file)
--- a/lib/src/driver/ethernet/lpc4088/EthDev_LPC4088.c
+++ b/lib/src/driver/ethernet/lpc4088/EthDev_LPC4088.c
@@ -49,9 +49,9 @@ static NyLPC_TBool start(const struct NyLPC_TEthAddr* i_eth_addr,NyLPC_TiEtherne
 static void stop(void);\r
 static void* getRxEthFrame(unsigned short* o_len_of_data);\r
 static void nextRxEthFrame(void);\r
-static struct NyLPC_TTxBufferHeader* allocTxBuf(NyLPC_TUInt16 i_hint,NyLPC_TUInt16* o_size);\r
-static void releaseTxBuf(struct NyLPC_TTxBufferHeader* i_buf);\r
-static void sendTxEthFrame(struct NyLPC_TTxBufferHeader* i_buf,unsigned short i_size);\r
+static void* allocTxBuf(NyLPC_TUInt16 i_hint,NyLPC_TUInt16* o_size);\r
+static void releaseTxBuf(void* i_buf);\r
+static void sendTxEthFrame(void* i_buf,unsigned short i_size);\r
 static void processTx(void);\r
 \r
 ////////////////////////////////////////////////////////////////////////////////\r
@@ -107,7 +107,7 @@ NyLPC_TBool EthDev_LPC4088_getInterface(
 {\r
        int regv, tout;\r
        unsigned int clock = clockselect();\r
-\r
+       \r
        LPC_SC->PCONP |= 0x40000000; /* Power Up the EMAC controller. */\r
        LPC_IOCON->P1_0 &= ~0x07; /* ENET I/O config */\r
        LPC_IOCON->P1_0 |= 0x01; /* ENET_TXD0 */\r
@@ -129,24 +129,24 @@ NyLPC_TBool EthDev_LPC4088_getInterface(
        LPC_IOCON->P1_16 |= 0x01; /* ENET_MDC */\r
        LPC_IOCON->P1_17 &= ~0x07;\r
        LPC_IOCON->P1_17 |= 0x01; /* ENET_MDIO */\r
-\r
+  \r
        /* Reset all EMAC internal modules. */\r
        LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;\r
-       LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;\r
+       LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;              \r
 for (tout = 100; tout; tout--) { __NOP(); } /* A short delay */\r
-\r
+       \r
        /* Initialize MAC control registers. */\r
-       LPC_EMAC->MAC1 = MAC1_PASS_ALL;\r
+       LPC_EMAC->MAC1 = MAC1_PASS_ALL; \r
        LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;\r
        LPC_EMAC->MAXF = ETH_MAX_FLEN;\r
        LPC_EMAC->CLRT = CLRT_DEF;\r
        LPC_EMAC->IPGR = IPGR_DEF;\r
-\r
+       \r
        /* Enable Reduced MII interface. */\r
        LPC_EMAC->MCFG = (clock << 0x2) & MCFG_CLK_SEL; /* Set clock */\r
        LPC_EMAC->MCFG |= MCFG_RES_MII; /* and reset */\r
        LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM |CR_PASS_RX_FILT; /* Enable Reduced MII interface. */\r
-\r
+       \r
 for (tout = 100; tout; tout--) { __NOP(); } /* A short delay */\r
 \r
        LPC_EMAC->MCFG = (clock << 0x2) & MCFG_CLK_SEL;\r
@@ -154,7 +154,7 @@ for (tout = 100; tout; tout--) { __NOP(); } /* A short delay */
        LPC_EMAC->SUPP = SUPP_RES_RMII; /* Reset Reduced MII Logic. */\r
 for (tout = 100; tout; tout--) { __NOP(); } /* A short delay */\r
        LPC_EMAC->SUPP = SUPP_SPEED;\r
-\r
+       \r
        phy_write(PHY_REG_BMCR, PHY_BMCR_RESET); /* perform PHY reset */\r
        for(tout = 0x20000; ; tout--) { /* Wait for hardware reset to end. */\r
                regv = phy_read(PHY_REG_BMCR);\r
@@ -180,7 +180,7 @@ for (tout = 100; tout; tout--) { __NOP(); } /* A short delay */
                return NyLPC_TBool_FALSE; /* Error */\r
        }\r
        LPC_EMAC->TxProduceIndex = 0;\r
-       LPC_EMAC->RxConsumeIndex = 0;\r
+       LPC_EMAC->RxConsumeIndex = 0;   \r
        return NyLPC_TBool_TRUE;\r
 }\r
 \r
@@ -203,7 +203,7 @@ static NyLPC_TBool start(const struct NyLPC_TEthAddr* i_eth_addr,NyLPC_TiEtherne
        /* Initialize Tx and Rx DMA Descriptors */\r
        prevRxDescriptor();\r
        prevTxDescriptor();\r
-       //wait for link up\r
+       //wait for link up \r
        for(i=0;i<5;i++){\r
                if(ethernet_link()!=0){\r
                        break;\r
@@ -222,7 +222,7 @@ static NyLPC_TBool start(const struct NyLPC_TEthAddr* i_eth_addr,NyLPC_TiEtherne
        {\r
                LPC_EMAC->IntEnable = INT_RX_DONE | INT_TX_DONE; /* Enable EMAC interrupts. */\r
                LPC_EMAC->IntClear = 0xFFFF; /* Reset all interrupts */\r
-\r
+         \r
                LPC_EMAC->Command |= (CR_RX_EN | CR_TX_EN); /* Enable receive and transmit mode of MAC Ethernet core */\r
                LPC_EMAC->MAC1 |= MAC1_REC_EN;\r
 \r
@@ -241,7 +241,7 @@ static void stop(void)
        {\r
            LPC_EMAC->IntEnable &= ~(INT_RX_DONE | INT_TX_DONE);\r
            LPC_EMAC->IntClear = 0xFFFF;\r
-\r
+           \r
         NVIC_DisableIRQ( ENET_IRQn );\r
        }\r
        NyLPC_cIsr_exitCritical();\r
@@ -253,11 +253,11 @@ static void stop(void)
        NyLPC_cEthernetMM_finalize();\r
 }\r
 \r
-static struct NyLPC_TTxBufferHeader* allocTxBuf(NyLPC_TUInt16 i_hint,NyLPC_TUInt16* o_size)\r
+static void* allocTxBuf(NyLPC_TUInt16 i_hint,NyLPC_TUInt16* o_size)\r
 {\r
        return NyLPC_cEthernetMM_alloc(i_hint,o_size);\r
 }\r
-static void releaseTxBuf(struct NyLPC_TTxBufferHeader* i_buf)\r
+static void releaseTxBuf(void* i_buf)\r
 {\r
        NyLPC_cEthernetMM_release(i_buf);\r
 }\r
@@ -274,14 +274,15 @@ static void processTx(void)
 \r
 /**\r
  * Ethernetパケットを送信します。\r
- * allocTxBufã\81§å¾\97ã\81\9fã\83\90ã\83\83ã\83\95ã\82¡ã\81\8bã\80\81NyLPC_TTxBufferHeaderã\81®ã\83\9aã\82¤ã\83­ã\83¼ã\83\89é\83¨å\88\86ã\82\92æ\8c\87å®\9aã\81\99ã\82\8bã\81\93ã\81¨ã\80\82\r
+ * allocTxBufで得たバッファを指定すること。\r
  * <p>関数仕様</p>\r
  * この関数は、i_bufが\r
  * </div>\r
  */\r
-static void sendTxEthFrame(struct NyLPC_TTxBufferHeader* i_buf,unsigned short i_size)\r
+static void sendTxEthFrame(void* i_buf,unsigned short i_size)\r
 {\r
        NyLPC_TUInt32   IndexNext,Index;\r
+       struct NyLPC_TTxBufferHeader* bh=NyLPC_TTxBufferHeader_getBufferHeaderAddr(i_buf);\r
 \r
        //サイズ0なら送信の必要なし\r
        if(i_size == 0)\r
@@ -294,11 +295,11 @@ static void sendTxEthFrame(struct NyLPC_TTxBufferHeader* i_buf,unsigned short i_
        //送信対象のメモリブロックを送信中に設定。\r
 //     b=(i_buf+1);\r
        //送信中のメモリブロックなら無視\r
-       if(i_buf->is_lock){\r
+       if(bh->is_lock){\r
                return;\r
        }\r
        //送信中にセット\r
-       i_buf->is_lock=NyLPC_TUInt8_TRUE;\r
+       bh->is_lock=NyLPC_TUInt8_TRUE;\r
 \r
        //送信データのセット\r
        Index = LPC_EMAC->TxProduceIndex;\r
@@ -306,7 +307,7 @@ static void sendTxEthFrame(struct NyLPC_TTxBufferHeader* i_buf,unsigned short i_
                i_size = ETH_FRAG_SIZE;\r
        }\r
        //送信処理\r
-       TX_DESC_PACKET( Index ) = ( unsigned long )(i_buf+1);\r
+       TX_DESC_PACKET( Index ) = ( unsigned long )i_buf;\r
        //See UM10360.pdf Table 181. Transmit descriptor control word\r
        TX_DESC_CTRL( Index ) = ((i_size-1) | TCTRL_LAST | TCTRL_INT );\r
        LPC_EMAC->TxProduceIndex = IndexNext;\r
@@ -423,14 +424,14 @@ static NyLPC_TUInt32 waitForTxEthFrameEmpty(void)
        {\r
                p=(void*)TX_DESC_PACKET(i);\r
                if(p!=NULL){\r
-                       b=((struct NyLPC_TTxBufferHeader*)p)-1;\r
+                       b=NyLPC_TTxBufferHeader_getBufferHeaderAddr(p);\r
                        b->is_lock=NyLPC_TUInt8_FALSE;\r
                        TX_DESC_PACKET(i)=0;\r
                }\r
        }\r
        p=(void*)TX_DESC_PACKET(i);\r
        if(p!=NULL){\r
-               b=((struct NyLPC_TTxBufferHeader*)p)-1;\r
+               b=NyLPC_TTxBufferHeader_getBufferHeaderAddr(p);\r
                b->is_lock=NyLPC_TUInt8_FALSE;\r
                TX_DESC_PACKET(i)=0;\r
        }\r
@@ -444,22 +445,22 @@ static NyLPC_TUInt32 waitForTxEthFrameEmpty(void)
 static void ethernet_set_link(int speed, int duplex) {\r
     unsigned short phy_data;\r
     int tout;\r
-\r
+    \r
     if((speed < 0) || (speed > 1)) {\r
         phy_data = PHY_AUTO_NEG;\r
     } else {\r
         phy_data = (((unsigned short) speed << 13) |\r
                     ((unsigned short) duplex << 8));\r
     }\r
-\r
+    \r
     phy_write(PHY_REG_BMCR, phy_data);\r
-\r
+    \r
     for (tout = 100; tout; tout--) { __NOP(); } /* A short delay */\r
-\r
+    \r
     switch(phy_id) {\r
         case DP83848C_ID:\r
             phy_data = phy_read(PHY_REG_STS);\r
-\r
+            \r
             if(phy_data & PHY_STS_DUPLEX) {\r
                 LPC_EMAC->MAC2 |= MAC2_FULL_DUP;\r
                 LPC_EMAC->Command |= CR_FULL_DUP;\r
@@ -469,17 +470,17 @@ static void ethernet_set_link(int speed, int duplex) {
                 LPC_EMAC->Command &= ~CR_FULL_DUP;\r
                 LPC_EMAC->IPGT = IPGT_HALF_DUP;\r
             }\r
-\r
+            \r
             if(phy_data & PHY_STS_SPEED) {\r
                 LPC_EMAC->SUPP &= ~SUPP_SPEED;\r
             } else {\r
                 LPC_EMAC->SUPP |= SUPP_SPEED;\r
             }\r
             break;\r
-\r
+        \r
         case LAN8720_ID:\r
             phy_data = phy_read(PHY_REG_SCSR);\r
-\r
+            \r
             if (phy_data & PHY_SCSR_DUPLEX) {\r
                 LPC_EMAC->MAC2 |= MAC2_FULL_DUP;\r
                 LPC_EMAC->Command |= CR_FULL_DUP;\r
@@ -488,13 +489,13 @@ static void ethernet_set_link(int speed, int duplex) {
                 LPC_EMAC->Command &= ~CR_FULL_DUP;\r
                 LPC_EMAC->IPGT = IPGT_HALF_DUP;\r
             }\r
-\r
+            \r
             if(phy_data & PHY_SCSR_100MBIT) {\r
                 LPC_EMAC->SUPP |= SUPP_SPEED;\r
             } else {\r
                 LPC_EMAC->SUPP &= ~SUPP_SPEED;\r
             }\r
-\r
+            \r
             break;\r
     }\r
 }\r