VGA_RAMをFIFO化 検証済み

[oca1/test.git] / VGADisplay / src / vga_gen.nsl

diff --git a/VGADisplay/src/vga_gen.nsl b/VGADisplay/src/vga_gen.nsl
index d6b3ce5..0e597bb 100644 (file)
--- a/VGADisplay/src/vga_gen.nsl
+++ b/VGADisplay/src/vga_gen.nsl
@@ -72,8 +72,8 @@ module vga_gen {
        
        {
                /* FIFO assign */
-               u_FIFO.i_clock          = i_clk50M ;
-               u_FIFO.m_clock      = m_clock ;
+               u_FIFO.i_clk50          = i_clk50M ;
+               u_FIFO.i_clk100     = m_clock ;
 
                u_FIFO.i_we1            = fi_fifo1_write ;
                u_FIFO.i_we2            = fi_fifo2_write ;