--- /dev/null
+//Original:/proj/frio/dv/testcases/core/c_dsp32shift_rot/c_dsp32shift_rot.dsp
+// Spec Reference: dsp32shift rot
+# mach: bfin
+
+.include "testutils.inc"
+ start
+
+
+ R0 = 0;
+ ASTAT = R0;
+
+ imm32 r0, 0x01230001;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R1 = ROT R0 BY R0.L;
+ R2 = ROT R1 BY R0.L;
+ R3 = ROT R2 BY R0.L;
+ R4 = ROT R3 BY R0.L;
+ R5 = ROT R4 BY R0.L;
+ R6 = ROT R5 BY R0.L;
+ R7 = ROT R6 BY R0.L;
+ R0 = ROT R7 BY R0.L;
+ CHECKREG r1, 0x02460002;
+ CHECKREG r0, 0x23000100;
+ CHECKREG r2, 0x048C0004;
+ CHECKREG r3, 0x09180008;
+ CHECKREG r4, 0x12300010;
+ CHECKREG r5, 0x24600020;
+ CHECKREG r6, 0x48C00040;
+ CHECKREG r7, 0x91800080;
+
+ imm32 r0, 0x01230001;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R1.L = 15;
+ R2 = ROT R0 BY R1.L;
+ R3 = ROT R1 BY R1.L;
+ R4 = ROT R2 BY R1.L;
+ R5 = ROT R3 BY R1.L;
+ R6 = ROT R4 BY R1.L;
+ R7 = ROT R5 BY R1.L;
+ R0 = ROT R6 BY R1.L;
+ R1 = ROT R7 BY R1.L;
+ CHECKREG r0, 0x2C04C400;
+ CHECKREG r1, 0x5C489000;
+ CHECKREG r2, 0x8000C048;
+ CHECKREG r3, 0x0007C48D;
+ CHECKREG r4, 0x60242000;
+ CHECKREG r5, 0xE2468001;
+ CHECKREG r6, 0x10005809;
+ CHECKREG r7, 0x4000B891;
+
+ imm32 r0, 0x01230002;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R2 = 16;
+ R3 = ROT R0 BY R2.L;
+ R4 = ROT R1 BY R2.L;
+ R5 = ROT R2 BY R2.L;
+ R6 = ROT R3 BY R2.L;
+ R7 = ROT R4 BY R2.L;
+ R0 = ROT R5 BY R2.L;
+ R1 = ROT R6 BY R2.L;
+ R2 = ROT R7 BY R2.L;
+ CHECKREG r0, 0x00000008;
+ CHECKREG r1, 0x00010048;
+ CHECKREG r2, 0x2B3CC48D;
+ CHECKREG r3, 0x00020091;
+ CHECKREG r4, 0x5678891A;
+ CHECKREG r5, 0x00100000;
+ CHECKREG r6, 0x00910001;
+ CHECKREG r7, 0x891A2B3C;
+
+ imm32 r0, 0x01230003;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R3.L = 31;
+ R4 = ROT R0 BY R3.L;
+ R5 = ROT R1 BY R3.L;
+ R6 = ROT R2 BY R3.L;
+ R7 = ROT R3 BY R3.L;
+ R0 = ROT R4 BY R3.L;
+ R1 = ROT R5 BY R3.L;
+ R2 = ROT R6 BY R3.L;
+ R3 = ROT R7 BY R3.L;
+ CHECKREG r0, 0x60123000;
+ CHECKREG r1, 0x11234567;
+ CHECKREG r2, 0x62345678;
+ CHECKREG r3, 0xE3456001;
+ CHECKREG r4, 0x8048C000;
+ CHECKREG r5, 0x448D159E;
+ CHECKREG r6, 0x88D159E2;
+ CHECKREG r7, 0x8D158007;
+
+ imm32 r0, 0x01230004;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R4.L = -1;
+ R0 = ROT R0 BY R4.L;
+ R1 = ROT R1 BY R4.L;
+ R2 = ROT R2 BY R4.L;
+ R3 = ROT R3 BY R4.L;
+ R4 = ROT R4 BY R4.L;
+ R5 = ROT R5 BY R4.L;
+ R6 = ROT R6 BY R4.L;
+ R7 = ROT R7 BY R4.L;
+ CHECKREG r0, 0x80918002;
+ CHECKREG r1, 0x091A2B3C;
+ CHECKREG r2, 0x11A2B3C4;
+ CHECKREG r3, 0x9A2B3C4D;
+ CHECKREG r4, 0x22B3FFFF;
+ CHECKREG r5, 0xAB3C4D5E;
+ CHECKREG r6, 0x33C4D5E6;
+ CHECKREG r7, 0xBC4D5E6F;
+
+ imm32 r0, 0x01230005;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R5.L = -15;
+ R6 = ROT R0 BY R5.L;
+ R7 = ROT R1 BY R5.L;
+ R0 = ROT R2 BY R5.L;
+ R1 = ROT R3 BY R5.L;
+ R2 = ROT R4 BY R5.L;
+ R3 = ROT R5 BY R5.L;
+ R4 = ROT R6 BY R5.L;
+ R5 = ROT R7 BY R5.L;
+ CHECKREG r0, 0x9E26468A;
+ CHECKREG r1, 0xE26A68AC;
+ CHECKREG r2, 0x26AE8ACF;
+ CHECKREG r3, 0xFFC4ACF1;
+ CHECKREG r4, 0x091A0028;
+ CHECKREG r5, 0x91A0B3C0;
+ CHECKREG r6, 0x00140246;
+ CHECKREG r7, 0x59E02468;
+
+ imm32 r0, 0x01230006;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R6.L = -16;
+ R7 = ROT R0 BY R6.L;
+ R0 = ROT R1 BY R6.L;
+ R1 = ROT R2 BY R6.L;
+ R2 = ROT R3 BY R6.L;
+ R3 = ROT R4 BY R6.L;
+ R4 = ROT R5 BY R6.L;
+ R5 = ROT R6 BY R6.L;
+ R6 = ROT R7 BY R6.L;
+ CHECKREG r0, 0xACF01234;
+ CHECKREG r1, 0xCF122345;
+ CHECKREG r2, 0xF1343456;
+ CHECKREG r3, 0x13564567;
+ CHECKREG r4, 0x35795678;
+ CHECKREG r5, 0xFFE16789;
+ CHECKREG r6, 0x0247000C;
+ CHECKREG r7, 0x000C0123;
+
+ imm32 r0, 0x01230007;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R7.L = -27;
+ R0 = ROT R0 BY R7.L;
+ R1 = ROT R1 BY R7.L;
+ R2 = ROT R2 BY R7.L;
+ R3 = ROT R3 BY R7.L;
+ R4 = ROT R4 BY R7.L;
+ R5 = ROT R5 BY R7.L;
+ R6 = ROT R6 BY R7.L;
+ R7 = ROT R7 BY R7.L;
+ CHECKREG r0, 0x48C001C0;
+ CHECKREG r1, 0x8D159E02;
+ CHECKREG r2, 0xD159E244;
+ CHECKREG r3, 0x159E2686;
+ CHECKREG r4, 0x59E26AE8;
+ CHECKREG r5, 0x9E26AF2A;
+ CHECKREG r6, 0xE26AF36C;
+ CHECKREG r7, 0x26BFF96F;
+
+ imm32 r0, 0x01230008;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R0.L = 7;
+//r0 = rot (r0 by rl0);
+ R1 = ROT R1 BY R0.L;
+ R2 = ROT R2 BY R0.L;
+ R3 = ROT R3 BY R0.L;
+ R4 = ROT R4 BY R0.L;
+ R5 = ROT R5 BY R0.L;
+ R6 = ROT R6 BY R0.L;
+ R7 = ROT R7 BY R0.L;
+ CHECKREG r0, 0x01230007;
+ CHECKREG r1, 0x1A2B3C04;
+ CHECKREG r2, 0xA2B3C4C8;
+ CHECKREG r3, 0x2B3C4D4D;
+ CHECKREG r4, 0xB3C4D591;
+ CHECKREG r5, 0x3C4D5E15;
+ CHECKREG r6, 0xC4D5E6D9;
+ CHECKREG r7, 0x4D5E6F5E;
+
+ imm32 r0, 0x01230009;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R1.L = 16;
+ R0 = ROT R0 BY R1.L;
+//r1 = rot (r1 by rl1);
+ R2 = ROT R2 BY R1.L;
+ R3 = ROT R3 BY R1.L;
+ R4 = ROT R4 BY R1.L;
+ R5 = ROT R5 BY R1.L;
+ R6 = ROT R6 BY R1.L;
+ R7 = ROT R7 BY R1.L;
+ CHECKREG r0, 0x00090091;
+ CHECKREG r1, 0x12340010;
+ CHECKREG r2, 0x678991A2;
+ CHECKREG r3, 0x789A9A2B;
+ CHECKREG r4, 0x89AB22B3;
+ CHECKREG r5, 0x9ABCAB3C;
+ CHECKREG r6, 0xABCD33C4;
+ CHECKREG r7, 0xBCDEBC4D;
+
+ imm32 r0, 0x0123000a;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R2.L = 30;
+ R0 = ROT R0 BY R2.L;
+ R1 = ROT R1 BY R2.L;
+//r2 = rot (r2 by rl2);
+ R3 = ROT R3 BY R2.L;
+ R4 = ROT R4 BY R2.L;
+ R5 = ROT R5 BY R2.L;
+ R6 = ROT R6 BY R2.L;
+ R7 = ROT R7 BY R2.L;
+ CHECKREG r0, 0x80246001;
+ CHECKREG r1, 0x02468ACF;
+ CHECKREG r2, 0x2345001E;
+ CHECKREG r3, 0x868ACF13;
+ CHECKREG r4, 0xC8ACF135;
+ CHECKREG r5, 0x0ACF1357;
+ CHECKREG r6, 0x6CF13579;
+ CHECKREG r7, 0xAF13579B;
+
+ imm32 r0, 0x0123000b;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R3.L = 31;
+ R0 = ROT R0 BY R3.L;
+ R1 = ROT R1 BY R3.L;
+ R2 = ROT R2 BY R3.L;
+//r3 = rot (r3 by rl3);
+ R4 = ROT R4 BY R3.L;
+ R5 = ROT R5 BY R3.L;
+ R6 = ROT R6 BY R3.L;
+ R7 = ROT R7 BY R3.L;
+ CHECKREG r0, 0xC048C002;
+ CHECKREG r1, 0x448D159E;
+ CHECKREG r2, 0x88D159E2;
+ CHECKREG r3, 0x3456001F;
+ CHECKREG r4, 0x9159E26A;
+ CHECKREG r5, 0x559E26AF;
+ CHECKREG r6, 0x99E26AF3;
+ CHECKREG r7, 0x1E26AF37;
+
+ imm32 r0, 0x0123000c;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R4.L = -2;
+ R0 = ROT R0 BY R4.L;
+ R1 = ROT R1 BY R4.L;
+ R2 = ROT R2 BY R4.L;
+ R3 = ROT R3 BY R4.L;
+//r4 = rot (r4 by rl4);
+ R5 = ROT R5 BY R4.L;
+ R6 = ROT R6 BY R4.L;
+ R7 = ROT R7 BY R4.L;
+ CHECKREG r0, 0x4048C003;
+ CHECKREG r1, 0x048D159E;
+ CHECKREG r2, 0x88D159E2;
+ CHECKREG r3, 0x0D159E26;
+ CHECKREG r4, 0x4567FFFE;
+ CHECKREG r5, 0x559E26AF;
+ CHECKREG r6, 0x99E26AF3;
+ CHECKREG r7, 0x1E26AF37;
+
+ imm32 r0, 0x0123000d;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R5.L = -17;
+ R0 = ROT R0 BY R5.L;
+ R1 = ROT R1 BY R5.L;
+ R2 = ROT R2 BY R5.L;
+ R3 = ROT R3 BY R5.L;
+ R4 = ROT R4 BY R5.L;
+//r5 = rot (r5 by rl5);
+ R6 = ROT R6 BY R5.L;
+ R7 = ROT R7 BY R5.L;
+ CHECKREG r0, 0x000D8091;
+ CHECKREG r1, 0x5678891A;
+ CHECKREG r2, 0x678911A2;
+ CHECKREG r3, 0x789A9A2B;
+ CHECKREG r4, 0x89AB22B3;
+ CHECKREG r5, 0x5678FFEF;
+ CHECKREG r6, 0xABCDB3C4;
+ CHECKREG r7, 0xBCDEBC4D;
+
+ imm32 r0, 0x0123000e;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R6.L = -30;
+ R0 = ROT R0 BY R6.L;
+ R1 = ROT R1 BY R6.L;
+ R2 = ROT R2 BY R6.L;
+ R3 = ROT R3 BY R6.L;
+ R4 = ROT R4 BY R6.L;
+ R5 = ROT R5 BY R6.L;
+//r6 = rot (r6 by rl6);
+ R7 = ROT R7 BY R6.L;
+ CHECKREG r0, 0x09180070;
+ CHECKREG r1, 0x91A2B3C0;
+ CHECKREG r2, 0x1A2B3C48;
+ CHECKREG r3, 0xA2B3C4D4;
+ CHECKREG r4, 0x2B3C4D5D;
+ CHECKREG r5, 0xB3C4D5E1;
+ CHECKREG r6, 0x6789FFE2;
+ CHECKREG r7, 0xC4D5E6F1;
+
+ imm32 r0, 0x0123000f;
+ imm32 r1, 0x12345678;
+ imm32 r2, 0x23456789;
+ imm32 r3, 0x3456789a;
+ imm32 r4, 0x456789ab;
+ imm32 r5, 0x56789abc;
+ imm32 r6, 0x6789abcd;
+ imm32 r7, 0x789abcde;
+ R7.L = -31;
+ R0 = ROT R0 BY R7.L;
+ R1 = ROT R1 BY R7.L;
+ R2 = ROT R2 BY R7.L;
+ R3 = ROT R3 BY R7.L;
+ R4 = ROT R4 BY R7.L;
+ R5 = ROT R5 BY R7.L;
+ R6 = ROT R6 BY R7.L;
+ R7 = ROT R7 BY R7.L;
+ CHECKREG r0, 0x048C003E;
+ CHECKREG r1, 0x48D159E0;
+ CHECKREG r2, 0x8D159E24;
+ CHECKREG r3, 0xD159E268;
+ CHECKREG r4, 0x159E26AC;
+ CHECKREG r5, 0x59E26AF2;
+ CHECKREG r6, 0x9E26AF36;
+ CHECKREG r7, 0xE26BFF86;
+
+ pass
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