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xlnx_dp: fix the wrong register size
authorFrederic Konrad <fkonrad@amd.com>
Wed, 8 Jun 2022 18:38:47 +0000 (19:38 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 8 Jun 2022 18:38:47 +0000 (19:38 +0100)
commitd2008b3355061ab0cca823739cd98045e769a809
tree007e03da04237edd151acaa9e3d05054272eda39
parent9323e79f10e5f5d8fffc3b307776173ca11faeae
xlnx_dp: fix the wrong register size

The core and the vblend registers size are wrong, they should respectively be
0x3B0 and 0x1E0 according to:
  https://www.xilinx.com/htmldocs/registers/ug1087/ug1087-zynq-ultrascale-registers.html.

Let's fix that and use macros when creating the mmio region.

Fixes: 58ac482a66d ("introduce xlnx-dp")
Signed-off-by: Frederic Konrad <fkonrad@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220601172353.3220232-2-fkonrad@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/display/xlnx_dp.c
include/hw/display/xlnx_dp.h