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hw/nvram: Introduce Xilinx eFuse QOM
authorTong Ho <tong.ho@xilinx.com>
Fri, 17 Sep 2021 05:23:52 +0000 (22:23 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 30 Sep 2021 12:42:09 +0000 (13:42 +0100)
commit68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f
treeb597e6df805b6556f21d30a36a4039a521298ee3
parent9fcd15b9193e819b6cc2fd0a45e3506148812bb4
hw/nvram: Introduce Xilinx eFuse QOM

This introduces the QOM for Xilinx eFuse, an one-time
field-programmable storage bit array.

The actual mmio interface to the array varies by device
families and will be provided in different change-sets.

Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210917052400.1249094-2-tong.ho@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/nvram/Kconfig
hw/nvram/meson.build
hw/nvram/xlnx-efuse-crc.c [new file with mode: 0644]
hw/nvram/xlnx-efuse.c [new file with mode: 0644]
include/hw/nvram/xlnx-efuse.h [new file with mode: 0644]