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hw/nvram: Introduce Xilinx Versal eFuse device
authorTong Ho <tong.ho@xilinx.com>
Fri, 17 Sep 2021 05:23:53 +0000 (22:23 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 30 Sep 2021 12:42:10 +0000 (13:42 +0100)
commit9e4aa1fafef624ee4ae6006497bed0cc112135d3
tree8f6edcf9a54782c705ac6e43a38fd6211a14f0e8
parent68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f
hw/nvram: Introduce Xilinx Versal eFuse device

This implements the Xilinx Versal eFuse, an one-time
field-programmable non-volatile storage device.  There is
only one such device in the Xilinx Versal product family.

This device has two separate mmio interfaces, a controller
and a flatten readback.

The controller provides interfaces for field-programming,
configuration, control, and status.

The flatten readback is a cache to provide a byte-accessible
read-only interface to efficiently read efuse array.

Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210917052400.1249094-3-tong.ho@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/nvram/Kconfig
hw/nvram/meson.build
hw/nvram/xlnx-versal-efuse-cache.c [new file with mode: 0644]
hw/nvram/xlnx-versal-efuse-ctrl.c [new file with mode: 0644]
include/hw/nvram/xlnx-versal-efuse.h [new file with mode: 0644]