From: Pawel Jewstafjew <Pawel.Jewstafjew@gmail.com>
Date: Wed, 1 Aug 2018 19:05:30 +0000 (+0100)
Subject: FX2/delay.h: from Scope/firmware/bulk/delay.h
X-Git-Url: http://git.osdn.net/view?p=stock%2Fstock.osdn.git;a=commitdiff_plain;h=df974fbc610e10909fe593ac48fea0c7178ea9f2

FX2/delay.h: from Scope/firmware/bulk/delay.h
---

diff --git a/FX2/delay.h b/FX2/delay.h
new file mode 100644
index 0000000..6f113f0
--- /dev/null
+++ b/FX2/delay.h
@@ -0,0 +1,85 @@
+// Copyright (C) 2008 Ubixum, Inc. 
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2.1 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+
+#ifndef DELAY_H
+#define DELAY_H
+
+#include "fx2types.h"
+
+/**
+ * 0-65536 millis
+ **/
+void delay(WORD millis);
+
+/**
+ * See TRM 15-14,15-15
+ * some registers (r/w) require syncdelay after
+ *
+ * up to the programmer to determine which sync is needed.
+ * for standard 48mhz clock w/ 48mhz IFCONFIG 3 nops is sufficient.
+ *
+ * slower clock and faster ifclock require more delay
+ *
+ * min delay = roof ( 1.5 x (ifclock/clkout + 1) )
+ *
+ * Minimum IFCLOCK is 5mhz but you have to use an
+ * external clock source to go below 30mhz
+ * 
+ * IFCLKSRC 1 = internal, 0=external
+ * 3048mhz 0 = 30mhz, 1 = 48mzh
+ *
+ * Figure your own sync delay out if IFCLKSRC=0.
+ **/
+
+#define NOP __asm nop __endasm
+
+/**
+ * SYNCDELAY2 can work for the following clock speeds
+ *
+ * ifclk/clk
+ * \li 48/12
+ *
+ * ceil(1.5 * (20.8 / 83.3 + 1)) = 2
+ *
+ * \see NOP
+ *
+ **/
+#define SYNCDELAY2 NOP; NOP
+
+/**
+ * SYNCDELAY3 can work for the following clock speeds
+ *
+ * ifcfg/clk
+ * \li 48/24
+ * \li 48/48
+ * \li 30/12
+ * \li 30/24
+ *
+ * \see NOP
+ **/
+#define SYNCDELAY3 NOP; NOP; NOP
+
+/**
+ * SYNCDELAY4 should be used for the following speeds
+ *
+ * ifcfg/clk
+ * \li 30/48
+ *
+ * \see NOP
+ **/
+#define SYNCDELAY4 NOP; NOP; NOP; NOP
+
+#endif
diff --git a/README b/README
index 7238297..5a4e952 100644
--- a/README
+++ b/README
@@ -4,6 +4,8 @@ BSL - MSP430 BSL
 
 FTDI - USB FTDI
 
+FX2 - Cypress EZ-USB FX2 (8051)
+
 I2C - I2C routines
 
 Logger - common API for message Logger