/* MANAGED-BY-SYSTEM-BUILDER */ /* VisualDSP++ 5.0 Update 8 */ /* LDF Printer version: 5.8.0.3 */ /* ldfgen.exe version: 5.8.0.3 */ /* VDSG version: 5.8.0.3 */ /* ** ADSP-BF506F linker description file generated on Jun 09, 2010 at 22:41:24. ** ** Copyright (C) 2000-2010 Analog Devices Inc., All Rights Reserved. ** ** This file is generated automatically based upon the options selected ** in the LDF Wizard. Changes to the LDF configuration should be made by ** changing the appropriate options rather than editing this file. ** ** Configuration:- ** crt_doj: BF506F_EZKIT_POST_basiccrt.doj ** processor: ADSP-BF506F ** product_name: VisualDSP++ 5.0 Update 8 ** si_revision: automatic ** default_silicon_revision_from_archdef: 0.0 ** using_cplusplus: true ** mem_init: false ** use_vdk: false ** use_eh: true ** use_argv: true ** running_from_internal_memory: true ** user_heap_src_file: C:\Build_tools\ant_build\cvsStage\_5.0ExportBlackfinReGen\Examples\Blackfin\Examples\ADSP-BF506F EZ-KIT Lite\Power_On_Self_Test\BF506F_EZKIT_POST_heaptab.c ** libraries_use_stdlib: true ** libraries_use_fileio_libs: false ** libraries_use_ieeefp_emulation_libs: false ** libraries_use_eh_enabled_libs: false ** system_heap: L1 ** system_heap_min_size: 2k ** system_stack: L1 ** system_stack_min_size: 2k ** use_sdram: false ** */ ARCHITECTURE(ADSP-BF506F) SEARCH_DIR($ADI_DSP/Blackfin/lib) // Workarounds are enabled, exceptions are disabled. #define RT_LIB_NAME(x) lib ## x ## y.dlb #define RT_LIB_NAME_EH(x) lib ## x ## y.dlb #define RT_LIB_NAME_MT(x) lib ## x ## y.dlb #define RT_LIB_NAME_EH_MT(x) lib ## x ## y.dlb #define RT_OBJ_NAME(x) x ## y.doj #define RT_OBJ_NAME_MT(x) x ## mty.doj $LIBRARIES = /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ RT_LIB_NAME_MT(small532) ,RT_LIB_NAME_MT(io532) ,RT_LIB_NAME_MT(c532) ,RT_LIB_NAME_MT(event532) ,RT_LIB_NAME(ssl506f) ,RT_LIB_NAME(drv506f) ,RT_LIB_NAME_MT(x532) ,RT_LIB_NAME_EH_MT(cpp532) ,RT_LIB_NAME_EH_MT(cpprt532) ,RT_LIB_NAME(f64ieee532) ,RT_LIB_NAME(dsp532) ,RT_LIB_NAME(sftflt532) ,RT_LIB_NAME(etsi532) ,RT_OBJ_NAME_MT(idle532) ,RT_LIB_NAME_MT(rt_fileio532) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ ; $OBJECTS = /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ RT_LIB_NAME(profile532) , $COMMAND_LINE_OBJECTS , "cplbtab506f.doj" /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ /* , RT_OBJ_NAME(crtn506f) */ ; $OBJS_LIBS_INTERNAL = /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ $OBJECTS{prefersMem("internal")}, $LIBRARIES{prefersMem("internal")} /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ ; $OBJS_LIBS_NOT_EXTERNAL = /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ $OBJECTS{!prefersMem("external")}, $LIBRARIES{!prefersMem("external")} /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ ; $OBJS_LIBS_WITH_AUTO_BREAKPOINTS = /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ $OBJECTS { FuncName("_main") || FuncName("___lib_prog_term") || FuncName("__primIO") || FuncName("__ov_start") || FuncName("__ov_end") || FuncName("__dbg_assert") || FuncName("__unknown_exception_occurred") || FuncName("_cplb_init") || FuncName("__KernelPanic") }, $LIBRARIES { FuncName("_main") || FuncName("___lib_prog_term") || FuncName("__primIO") || FuncName("__ov_start") || FuncName("__ov_end") || FuncName("__dbg_assert") || FuncName("__unknown_exception_occurred") || FuncName("_cplb_init") || FuncName("__KernelPanic") } /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ ; $OBJS_LIBS_WITHOUT_AUTO_BREAKPOINTS = /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ $OBJECTS { !FuncName("_main") && !FuncName("___lib_prog_term") && !FuncName("__primIO") && !FuncName("__ov_start") && !FuncName("__ov_end") && !FuncName("__dbg_assert") && !FuncName("__unknown_exception_occurred") && !FuncName("_cplb_init") && !FuncName("__KernelPanic") }, $LIBRARIES { !FuncName("_main") && !FuncName("___lib_prog_term") && !FuncName("__primIO") && !FuncName("__ov_start") && !FuncName("__ov_end") && !FuncName("__dbg_assert") && !FuncName("__unknown_exception_occurred") && !FuncName("_cplb_init") && !FuncName("__KernelPanic") } /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ ; /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ /*$VDSG */ /* This code is preserved if the LDF is re-generated. */ #define ASYNC0_MEMTYPE RAM #define ASYNC1_MEMTYPE RAM #define ASYNC2_MEMTYPE RAM #define ASYNC3_MEMTYPE RAM /*$VDSG */ MEMORY { /* ** ADSP-BF506F MEMORY MAP. ** ** The known memory spaces are as follows: ** ** Internal (core-accessible) memory map: ** ========================================= ** 0xFFE00000 - 0xFFFFFFFF Core MMR registers (2MB) ** 0xFFC00000 - 0xFFDFFFFF System MMR registers (2MB) ** 0xFFB01000 - 0xFFBFFFFF Reserved ** 0xFFB00000 - 0xFFB00FFF Scratch SRAM (4K) ** 0xFFA08000 - 0xFFAFFFFF Reserved ** 0xFFA04000 - 0xFFA07FFF L1 instruction SRAM/CACHE (16K) ** 0xFFA00000 - 0xFFA03FFF L1 instruction Bank A SRAM (16K) ** 0xFF808000 - 0xFF9FFFFF Reserved ** 0xFF804000 - 0xFF807FFF L1 Data Bank A SRAM/CACHE (16K) ** 0xFF800000 - 0XFF803FFF L1 Data Bank A SRAM (16K) ** 0xEF001000 - 0xFF7FFFFF Reserved ** ** External (interface-accessible) memory map: ** ============================================= ** 0xEF000000 - 0xEF000FFF Boot ROM (4K) ** 0x20400000 - 0xEEFFFFFF Reserved ** 0x20000000 - 0x203FFFFF Sync Flash (32M Bits) ** 0x00000000 - 0x1FFFFFFF Reserved ** ** Notes: ** 0xFF807FEF-0xFF807FFF Required by boot-loader. */ MEM_L1_SCRATCH { TYPE(RAM) START(0xFFB00000) END(0xFFB00FFF) WIDTH(8) } /* MEM_L1_CODE_CACHE { TYPE(RAM) START(0xFFA08000) END(0xFFA07FFF) TYPE(RAM) WIDTH(8) } */ /* MEM_L1_CODE { TYPE(RAM) START(0xFFA00000) END(0xFFA03FFF) TYPE(RAM) WIDTH(8) } */ MEM_L1_CODE { TYPE(RAM) START(0xFFA00000) END(0xFFA07FFF) WIDTH(8) } MEM_ARGV { TYPE(RAM) START(0xFF800000) END(0xFF8000FF) WIDTH(8) } /* MEM_L1_DATA_A_CACHE { TYPE(RAM) START(0xFF804000) END(0xFF807FFF) TYPE(RAM) WIDTH(8) } */ /* MEM_L1_DATA_A { TYPE(RAM) START(0xFF800000) END(0xFF803FFF) TYPE(RAM) WIDTH(8) } */ MEM_L1_DATA_A { TYPE(RAM) START(0xFF800100) END(0xFF807FFF) WIDTH(8) } MEM_FLASH_BOOT { TYPE(ASYNC0_MEMTYPE) START(0x20000000) END(0x2001FFFF) WIDTH(8) } MEM_FLASH { TYPE(ASYNC0_MEMTYPE) START(0x20020000) END(0x203FFFFF) WIDTH(8) } /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } /* MEMORY */ PROCESSOR p0 { OUTPUT($COMMAND_LINE_OUTPUT_FILE) RESOLVE(start, 0xFFA00000) RESOLVE(___argv_string, 0xFF800000) KEEP(start, _main) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ SECTIONS { /* Workaround for hardware errata 05-00-0189 and 05-00-0310 - ** "Speculative (and fetches made at boundary of reserved memory ** space) for instruction or data fetches may cause false ** protection exceptions" and "False hardware errors caused by ** fetches at the boundary of reserved memory ". ** ** Done by avoiding use of 76 bytes from at the end of blocks ** that are adjacent to reserved memory. Workaround is enabled ** for appropriate silicon revisions (-si-revision switch). */ RESERVE(___wab0=MEMORY_END(MEM_L1_SCRATCH) - 75, ___l0 = 76) /* RESERVE(___wab1=MEMORY_END(MEM_L1_CODE_CACHE) - 75, ___l1 = 76) */ RESERVE(___wab2=MEMORY_END(MEM_L1_CODE) - 75, ___l2 = 76) /* RESERVE(___wab5=MEMORY_END(MEM_L1_DATA_A_CACHE) - 75, ___l5 = 76) */ RESERVE(___wab4=MEMORY_END(MEM_L1_DATA_A) - 75, ___l4 = 76) RESERVE(___wab5=MEMORY_END(MEM_FLASH) - 75, ___l5 = 76) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ scratchpad NO_INIT { INPUT_SECTION_ALIGN(4) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJECTS(L1_scratchpad) $LIBRARIES(L1_scratchpad)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_SCRATCH L1_code { INPUT_SECTION_ALIGN(4) ___l1_code_cache = 0; INPUT_SECTIONS($OBJS_LIBS_WITH_AUTO_BREAKPOINTS(program)) INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code)) INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb)) INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code)) INPUT_SECTIONS($OBJS_LIBS_INTERNAL(program)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(program)) INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_CODE L1_data_a_tables { INPUT_SECTION_ALIGN(4) FORCE_CONTIGUITY /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJECTS(ctor) $LIBRARIES(ctor)) INPUT_SECTIONS($OBJECTS(ctorl) $LIBRARIES(ctorl)) INPUT_SECTIONS($OBJECTS(.gdt) $LIBRARIES(.gdt)) INPUT_SECTIONS($OBJECTS(.gdtl) $LIBRARIES(.gdtl)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_DATA_A L1_data_a_1 { INPUT_SECTION_ALIGN(4) ___l1_data_cache_a = 0; INPUT_SECTIONS($OBJECTS(L1_data_a) $LIBRARIES(L1_data_a)) INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ RESERVE(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length = 4096,4) } > MEM_L1_DATA_A L1_data_a_bsz ZERO_INIT { INPUT_SECTION_ALIGN(4) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_DATA_A bsz_L1_data_a ZERO_INIT { INPUT_SECTION_ALIGN(4) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz)) INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_DATA_A L1_data_a { INPUT_SECTION_ALIGN(4) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata)) INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1)) INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1)) INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1)) INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata)) INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_DATA_A L1_data_a_2 { INPUT_SECTION_ALIGN(4) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl)) INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt)) INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti)) INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt)) INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_DATA_A L1_data_a_stack_heap { INPUT_SECTION_ALIGN(4) RESERVE_EXPAND(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length , 0, 4) ldf_stack_space = heaps_and_stack_in_L1_data_a; ldf_stack_end = (ldf_stack_space + (((heaps_and_stack_in_L1_data_a_length * 2048) / 4096) - 4)) & 0xfffffffc; ldf_heap_space = ldf_stack_end + 4; ldf_heap_end = (ldf_heap_space + (((heaps_and_stack_in_L1_data_a_length * 2048) / 4096) - 4)) & 0xfffffffc; ldf_heap_length = ldf_heap_end - ldf_heap_space; } > MEM_L1_DATA_A FLASH_code { INPUT_SECTION_ALIGN(4) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJECTS(FLASH_code) $LIBRARIES(FLASH_code)) INPUT_SECTIONS($OBJS_LIBS_WITHOUT_AUTO_BREAKPOINTS(program)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_CODE /* MEM_FLASH */ FLASH_constdata { INPUT_SECTION_ALIGN(4) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ INPUT_SECTIONS($OBJECTS(FLASH_data) $LIBRARIES(FLASH_data)) INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata)) INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data)) INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl)) INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt)) INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti)) INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt)) INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht)) /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } > MEM_L1_CODE /* MEM_FLASH */ /*$VDSG */ /* Text inserted between these $VDSG comments will be preserved */ /*$VDSG */ } /* SECTIONS */ } /* p0 */