Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[uclinux-h8/linux.git] / arch / arm / mach-imx / anatop.c

diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c
index 231bb25..649a84c 100644 (file)
--- a/arch/arm/mach-imx/anatop.c
+++ b/arch/arm/mach-imx/anatop.c
@@ -129,7 +129,14 @@ void __init imx_init_revision_from_anatop(void)
 
        switch (digprog & 0xff) {
        case 0:
-               revision = IMX_CHIP_REVISION_1_0;
+               /*
+                * For i.MX6QP, most of the code for i.MX6Q can be resued,
+                * so internally, we identify it as i.MX6Q Rev 2.0
+                */
+               if (digprog >> 8 & 0x01)
+                       revision = IMX_CHIP_REVISION_2_0;
+               else
+                       revision = IMX_CHIP_REVISION_1_0;
                break;
        case 1:
                revision = IMX_CHIP_REVISION_1_1;
@@ -151,7 +158,14 @@ void __init imx_init_revision_from_anatop(void)
                revision = IMX_CHIP_REVISION_1_5;
                break;
        default:
-               revision = IMX_CHIP_REVISION_UNKNOWN;
+               /*
+                * Fail back to return raw register value instead of 0xff.
+                * It will be easy to know version information in SOC if it
+                * can't be recognized by known version. And some chip's (i.MX7D)
+                * digprog value match linux version format, so it needn't map
+                * again and we can use register value directly.
+                */
+               revision = digprog & 0xff;
        }
 
        mxc_set_cpu_type(digprog >> 16 & 0xff);