2015-02-17 |
Markos Chandras | MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: process: Do not allow FR=0 on MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Handle MIPS IV, V and R2 FPU instructions on... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Make use of the ERETNC instruction on MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: mipsregs: Add support for the LLADDR register Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Add LLB bit and related feature for the Config... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 BALC instruction Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 branch compact (BC) instruction Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Emulate the BC1{EQ,NE}Z FPU instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: branch: Do not emulate the branch likelies... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: Prepare the JR instruction for emulation... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: mm: scache: Add secondary cache support for MIPS... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: mm: c-r4k: Set the correct ISA level Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: mm: page: Add MIPS R6 support Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: lib: memset: Add MIPS R6 support Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: lib: memcpy: Add MIPS R6 support Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: syscall: Set the appropriate ISA level... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: unaligned: Add support for the MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: cps-vec: Replace "addi" with "addiu" Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: genex: Set correct ISA level Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: r4k_fpu: Add support for MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: r4k_switch: Add support for MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: traps: Add MIPS R6 related definitions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: kernel: entry.S: Add MIPS R6 related definitions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: cpu-probe.c: Add support for MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interr... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: kernel: cpu-bugs64: Do not check R6 cores for... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: local: Set the appropriate ISA level for... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: spinlock: Replace "sub" instruction with... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: futex: Set the appropriate ISA level for... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: bitops: Update ISA constraints for MIPS... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: atomic: Update ISA constraints for MIPS... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: cmpxchg: Update ISA constraints for MIPS... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Use the new "ZC" constraint for MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASM Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: spram: Add new symbol for MIPS scratch pad... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: irqflags: Add MIPS R6 related definitions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: hazards: Add MIPSR6 definitions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: asm: cpu: Add MIPSR6 ISA definitions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: Use generic checksum functions for MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: asmmacro: Replace "add" instructions with... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: asm: asmmacro: Add MIPS R6 support to the simple... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: asm: stackframe: Do not preserve the HI/LO registers... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Leonid Yegoshin | MIPS: asm: module: define MODULE_PROC_FAMILY for MIPS R6 Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 |
Markos Chandras | MIPS: asm: compiler: Add new macros to set ISA and... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 |
Leonid Yegoshin | MIPS: mm: Add MIPS R6 instruction encodings Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 |
Leonid Yegoshin | MIPS: mm: uasm: Add signed 9-bit immediate related... Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 |
Leonid Yegoshin | MIPS: Add build support for the MIPS R6 ISA Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 |
Leonid Yegoshin | MIPS: Add MIPS generic QEMU probe support Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 |
Leonid Yegoshin | MIPS: Add cases for CPU_QEMU_GENERIC Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 |
Leonid Yegoshin | MIPS: Add generic QEMU PRid and cpu type identifiers Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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