-/*\r
-BANDAI FCG-1, FCG-2\r
-FCG-1 + Program ROM + Charcter ROM\r
- ドラゴンボール 大魔王復活\r
- 西村京太郎ミステリー ブルートレイン殺人事件 (Irem)\r
-FCG-2 + Program ROM + Charcter ROM\r
- ファミコンジャンプ\r
- 魁!!男塾\r
- 名門！第三野球部\r
- ドラゴンボール3\r
- 悪魔くん\r
-*/\r
-board <- {\r
- mappernum = 16, \r
- cpu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x4000\r
- }, \r
- cpu_ram = {\r
- size_base = 0x0000, size_max = 0x0000,\r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x0400\r
- },\r
- ppu_ramfind = false,\r
- vram_mirrorfind = false\r
-};\r
-\r
-const register_offset = 0x6000;\r
-dofile("fcg3.ai");\r
+/*
+BANDAI FCG-1, FCG-2
+FCG-1 + Program ROM + Charcter ROM
+ ドラゴンボール 大魔王復活
+ 西村京太郎ミステリー ブルートレイン殺人事件 (Irem)
+FCG-2 + Program ROM + Charcter ROM
+ ファミコンジャンプ
+ 魁!!男塾
+ 名門！第三野球部
+ ドラゴンボール3
+ 悪魔くん
+*/
+board <- {
+ mappernum = 16,
+ cpu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x4000
+ },
+ cpu_ram = {
+ size_base = 0x0000, size_max = 0x0000,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x0400
+ },
+ ppu_ramfind = false,
+ vram_mirrorfind = false
+};
+
+const register_offset = 0x6000;
+dofile("fcg3.ai");
-//Famicom Jump II\r
-board <- {\r
- mappernum = 153, vram_mirrorfind = false, ppu_ramfind = false,\r
- cpu_rom = {\r
- size_base = 4 * mega, size_max = 4 * mega,\r
- banksize = 0x4000\r
- },\r
- cpu_ram = {\r
- size_base = 0x2000, size_max = 0x2000, banksize = 0x2000\r
- }\r
- ppu_rom = {\r
- size_base = 0, size_max = 0,\r
- banksize = 0x2000\r
- }\r
-};\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 0x10){\r
- local v = i >> 4\r
- cpu_write(d, 0x8000, [v, v, v, v]);\r
- for(local j = 0; j < 0x10 - 1; j += 1){\r
- cpu_write(d, 0x8008, j);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
- }\r
-}\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0x800d, 1 << 5);\r
- cpu_ramrw(d, 0x6000, banksize);\r
- cpu_write(d, 0x800d, 0);\r
-}\r
+//Famicom Jump II
+board <- {
+ mappernum = 153, vram_mirrorfind = false, ppu_ramfind = false,
+ cpu_rom = {
+ size_base = 4 * mega, size_max = 4 * mega,
+ banksize = 0x4000
+ },
+ cpu_ram = {
+ size_base = 0x2000, size_max = 0x2000, banksize = 0x2000
+ }
+ ppu_rom = {
+ size_base = 0, size_max = 0,
+ banksize = 0x2000
+ }
+};
+
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 0x10){
+ local v = i >> 4
+ cpu_write(d, 0x8000, [v, v, v, v]);
+ for(local j = 0; j < 0x10 - 1; j += 1){
+ cpu_write(d, 0x8008, j);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xc000, banksize);
+ }
+}
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ cpu_write(d, 0x800d, 1 << 5);
+ cpu_ramrw(d, 0x6000, banksize);
+ cpu_write(d, 0x800d, 0);
+}
-/*\r
-IREM G-101 based cartridge\r
-\r
-$8000-$9fff bank#0, switchable or last - 1\r
-$a000-$bfff bank#1, switchable\r
-$c000-$dfff bank#2, last - 1 or switchable\r
-$e000-$ffff \r
-note:\r
-Major League PCB maybe ignore write operation to $9000-$9fff\r
-$9000-$9fff write register are fixed to bank #2 = last -1\r
-*/\r
-\r
-board <- {\r
- mappernum = 32,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 1 * mega, size_max = 1 * mega,\r
- banksize = 0x0400\r
- },\r
- ppu_ramfind = false,\r
- vram_mirrorfind = false\r
-};\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- if(false){\r
- cpu_write(d, 0x9000, 0);\r
- for(local i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0x8000, i);\r
- cpu_write(d, 0xa000, i | 1);\r
- cpu_read(d, 0x8000, banksize * 2);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
- cpu_read(d, 0xe000, banksize);\r
- }else{\r
- cpu_write(d, 0x9000, 2);\r
- for(local i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0x8000, i);\r
- cpu_write(d, 0xa000, i | 1);\r
- cpu_read(d, 0xc000, banksize);\r
- cpu_read(d, 0xa000, banksize);\r
- }\r
- cpu_read(d, 0x8000, banksize);\r
- cpu_read(d, 0xe000, banksize);\r
- }\r
-}\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize ; i += 8){\r
- for(local j = 0; j < 8; j += 1){\r
- cpu_write(d, 0xb000 + j, i + j);\r
- }\r
- ppu_read(d, 0, banksize * 8);\r
- }\r
-}\r
-\r
-function program_initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- cpu_write(d, 0x9000, 0);\r
- cpu_write(d, 0x8000, 0);\r
- cpu_command(d, 0, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x02aa, 0xc000, cpu_banksize);\r
- cpu_command(d, 0x0555, 0xc000, cpu_banksize);\r
- cpu_write(d, 0xb000, [0xa, 0x15, 0]);\r
- cpu_command(d, 0x2aaa, 0x0000, ppu_banksize);\r
- cpu_command(d, 0x5555, 0x0400, ppu_banksize);\r
- cpu_command(d, 0, 0x0800, ppu_banksize);\r
-}\r
-\r
-function cpu_transfer(d, start, end, cpu_banksize)\r
-{\r
- for(local i = start; i < end - 1; i += 1){\r
- cpu_write(d, 0x8000, i);\r
- cpu_program(d, 0x8000, cpu_banksize);\r
- }\r
- cpu_program(d, 0xc000, cpu_banksize);\r
-}\r
-\r
-function ppu_transfer(d, start, end, ppu_banksize)\r
-{\r
- for(local i = start; i < end; i +=4){\r
- cpu_write(d, 0xb004, [i, i+1, i+2, i+3]);\r
- ppu_program(d, 0x1000, ppu_banksize * 4);\r
- }\r
-}\r
+/*
+IREM G-101 based cartridge
+
+$8000-$9fff bank#0, switchable or last - 1
+$a000-$bfff bank#1, switchable
+$c000-$dfff bank#2, last - 1 or switchable
+$e000-$ffff
+note:
+Major League PCB maybe ignore write operation to $9000-$9fff
+$9000-$9fff write register are fixed to bank #2 = last -1
+*/
+
+board <- {
+ mappernum = 32,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x0400
+ },
+ ppu_ramfind = false,
+ vram_mirrorfind = false
+};
+
+function cpu_dump(d, pagesize, banksize)
+{
+ if(false){
+ cpu_write(d, 0x9000, 0);
+ for(local i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0x8000, i);
+ cpu_write(d, 0xa000, i | 1);
+ cpu_read(d, 0x8000, banksize * 2);
+ }
+ cpu_read(d, 0xc000, banksize);
+ cpu_read(d, 0xe000, banksize);
+ }else{
+ cpu_write(d, 0x9000, 2);
+ for(local i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0x8000, i);
+ cpu_write(d, 0xa000, i | 1);
+ cpu_read(d, 0xc000, banksize);
+ cpu_read(d, 0xa000, banksize);
+ }
+ cpu_read(d, 0x8000, banksize);
+ cpu_read(d, 0xe000, banksize);
+ }
+}
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize ; i += 8){
+ for(local j = 0; j < 8; j += 1){
+ cpu_write(d, 0xb000 + j, i + j);
+ }
+ ppu_read(d, 0, banksize * 8);
+ }
+}
+
+function program_initalize(d, cpu_banksize, ppu_banksize)
+{
+ cpu_write(d, 0x9000, 0);
+ cpu_write(d, 0x8000, 0);
+ cpu_command(d, 0, 0x8000, cpu_banksize);
+ cpu_command(d, 0x02aa, 0xc000, cpu_banksize);
+ cpu_command(d, 0x0555, 0xc000, cpu_banksize);
+ cpu_write(d, 0xb000, [0xa, 0x15, 0]);
+ cpu_command(d, 0x2aaa, 0x0000, ppu_banksize);
+ cpu_command(d, 0x5555, 0x0400, ppu_banksize);
+ cpu_command(d, 0, 0x0800, ppu_banksize);
+}
+
+function cpu_transfer(d, start, end, cpu_banksize)
+{
+ for(local i = start; i < end - 1; i += 1){
+ cpu_write(d, 0x8000, i);
+ cpu_program(d, 0x8000, cpu_banksize);
+ }
+ cpu_program(d, 0xc000, cpu_banksize);
+}
+
+function ppu_transfer(d, start, end, ppu_banksize)
+{
+ for(local i = start; i < end; i +=4){
+ cpu_write(d, 0xb004, [i, i+1, i+2, i+3]);
+ ppu_program(d, 0x1000, ppu_banksize * 4);
+ }
+}
-//konami VRC(I)\r
-board <- {\r
- mappernum = 75,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 1 * mega,\r
- banksize = 0x2000\r
- },\r
- ppu_rom= {\r
- size_base = 1 * mega, size_max = 1 * mega,\r
- banksize = 0x1000\r
- },\r
- ppu_ramfind = false, vram_mirrorfind = false\r
-};\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- local i;\r
- for(i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0x8000, i);\r
- cpu_write(d, 0xa000, i | 1);\r
- cpu_read(d, 0x8000, banksize * 2);\r
- }\r
- cpu_write(d, 0xc000, i);\r
- cpu_read(d, 0xc000, banksize * 2);\r
-}\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 0x10){\r
- cpu_write(d, 0x9000, i == 0 ? 0 : (0x3 << 1));\r
- for(local j = 0; j < 0x10; j += 2){\r
- cpu_write(d, 0xe000, j);\r
- cpu_write(d, 0xf000, j | 1);\r
- ppu_read(d, 0, banksize * 2);\r
- }\r
- }\r
-}\r
+//konami VRC(I)
+board <- {
+ mappernum = 75,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x2000
+ },
+ ppu_rom= {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x1000
+ },
+ ppu_ramfind = false, vram_mirrorfind = false
+};
+function cpu_dump(d, pagesize, banksize)
+{
+ local i;
+ for(i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0x8000, i);
+ cpu_write(d, 0xa000, i | 1);
+ cpu_read(d, 0x8000, banksize * 2);
+ }
+ cpu_write(d, 0xc000, i);
+ cpu_read(d, 0xc000, banksize * 2);
+}
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 0x10){
+ cpu_write(d, 0x9000, i == 0 ? 0 : (0x3 << 1));
+ for(local j = 0; j < 0x10; j += 2){
+ cpu_write(d, 0xe000, j);
+ cpu_write(d, 0xf000, j | 1);
+ ppu_read(d, 0, banksize * 2);
+ }
+ }
+}
-/*\r
-VRCII A0,A1 swap + charcter ROM address bus shiftx1\r
-051744 jumper G?\r
-VRC-CPU|databus \r
-A0 - A1|A0: xxxx210x\r
-A1 - A0|A1: xxxx6543\r
-VRC-CHRCTER ROM\r
-A11-A17 = A10-A16\r
-*/\r
-board <- {\r
- mappernum = 22, vram_mirrorfind = false, ppu_ramfind = false,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 1 * mega, \r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 1 * mega, size_max = 1 * mega, \r
- banksize = 0x2000 / 8\r
- }\r
-};\r
-dofile("vrc4.ai");\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- vrc4_cpu_dump(d, pagesize, banksize, 1, 0);\r
-}\r
-\r
-\r
-function vrc2a_ppubank_set(d, addr, i, j, r0, r1)\r
-{\r
- local a1 = 1 << r0;\r
- local a2 = 1 << r1;\r
- local a3 = a1|a2;\r
-\r
- cpu_write(d, addr | a1, i >> 3);\r
- cpu_write(d, addr, i << 1);\r
- cpu_write(d, addr | a3, j >> 3);\r
- cpu_write(d, addr | a2, j << 1);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- local r0 = 1;\r
- local r1 = 0;\r
-\r
- for(local i = 0; i < pagesize; i += 8){\r
- vrc2a_ppubank_set(d, 0xb000, i | 0, i | 1, r0, r1);\r
- vrc2a_ppubank_set(d, 0xc000, i | 2, i | 3, r0, r1);\r
- vrc2a_ppubank_set(d, 0xd000, i | 4, i | 5, r0, r1);\r
- vrc2a_ppubank_set(d, 0xe000, i | 6, i | 7, r0, r1);\r
- ppu_read(d, 0x0000, banksize * 8);\r
- }\r
-}\r
+/*
+VRCII A0,A1 swap + charcter ROM address bus shiftx1
+051744 jumper G?
+VRC-CPU|databus
+A0 - A1|A0: xxxx210x
+A1 - A0|A1: xxxx6543
+VRC-CHRCTER ROM
+A11-A17 = A10-A16
+*/
+board <- {
+ mappernum = 22, vram_mirrorfind = false, ppu_ramfind = false,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x2000 / 8
+ }
+};
+dofile("vrc4.ai");
+function cpu_dump(d, pagesize, banksize)
+{
+ vrc4_cpu_dump(d, pagesize, banksize, 1, 0);
+}
+
+
+function vrc2a_ppubank_set(d, addr, i, j, r0, r1)
+{
+ local a1 = 1 << r0;
+ local a2 = 1 << r1;
+ local a3 = a1|a2;
+
+ cpu_write(d, addr | a1, i >> 3);
+ cpu_write(d, addr, i << 1);
+ cpu_write(d, addr | a3, j >> 3);
+ cpu_write(d, addr | a2, j << 1);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ local r0 = 1;
+ local r1 = 0;
+
+ for(local i = 0; i < pagesize; i += 8){
+ vrc2a_ppubank_set(d, 0xb000, i | 0, i | 1, r0, r1);
+ vrc2a_ppubank_set(d, 0xc000, i | 2, i | 3, r0, r1);
+ vrc2a_ppubank_set(d, 0xd000, i | 4, i | 5, r0, r1);
+ vrc2a_ppubank_set(d, 0xe000, i | 6, i | 7, r0, r1);
+ ppu_read(d, 0x0000, banksize * 8);
+ }
+}
-/*\r
-VRC2B; R0=A0, R1=A1\r
-じゃんン子チエ のみ d12 で dump すること。\r
-*/\r
-board <- {\r
- mappernum = 23,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x2000\r
- },\r
- ppu_rom= {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x2000 / 8\r
- },\r
- ppu_ramfind = false, vram_mirrorfind = false\r
-};\r
-dofile("vrc4.ai");\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- vrc4_cpu_dump(d, pagesize, banksize, 0, 1);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- vrc4_ppu_dump(d, pagesize, banksize, 0, 1);\r
-}\r
+/*
+VRC2B; R0=A0, R1=A1
+じゃんン子チエ のみ d12 で dump すること。
+*/
+board <- {
+ mappernum = 23,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x2000
+ },
+ ppu_rom= {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x2000 / 8
+ },
+ ppu_ramfind = false, vram_mirrorfind = false
+};
+dofile("vrc4.ai");
+function cpu_dump(d, pagesize, banksize)
+{
+ vrc4_cpu_dump(d, pagesize, banksize, 0, 1);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ vrc4_ppu_dump(d, pagesize, banksize, 0, 1);
+}
-/*\r
-konami VRCIII\r
-RC821\r
-各レジスタは4bit\r
-write\r
-$8000 IRQ cpu clock count, bit0-3??\r
-$9000 IRQ cpu clock count, bit4-7??\r
-$a000 IRQ cpu clock count, bit8-11\r
-$b000 IRQ cpu clock count, bit12-15\r
-$c000 IRQ enable\r
-$d000 IRQ Acknowledge\r
-$f000 bit0-2 pagenumber at CPU address $8000-$bfff\r
- bit3 1: ROM address 0x1c000-0x1cfff map CPU address $c000-$cfff\r
- 0: IRQ status? at CPU address $c000-$cfff\r
-read\r
-$8000-$bfff 可変エリア, write $f000 bit0-2\r
-$c000-$cfff 可変エリア, write $f000 bit3\r
-$d000-$ffff 固定エリア, ROM address 0x1d000-0x1ffff\r
-*/\r
-\r
-board <- {\r
- mappernum = 73,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 1 * mega,\r
- banksize = 0x4000\r
- },\r
- ppu_rom= {\r
- size_base = 0, size_max = 0,\r
- banksize = 0x2000\r
- },\r
- ppu_ramfind = false, vram_mirrorfind = true\r
-};\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize - 1; i += 1){\r
- cpu_write(d, 0xf000, i);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_write(d, 0xf000, 1 << 3);\r
- cpu_read(d, 0xc000, banksize);\r
-}\r
+/*
+konami VRCIII
+RC821
+各レジスタは4bit
+write
+$8000 IRQ cpu clock count, bit0-3??
+$9000 IRQ cpu clock count, bit4-7??
+$a000 IRQ cpu clock count, bit8-11
+$b000 IRQ cpu clock count, bit12-15
+$c000 IRQ enable
+$d000 IRQ Acknowledge
+$f000 bit0-2 pagenumber at CPU address $8000-$bfff
+ bit3 1: ROM address 0x1c000-0x1cfff map CPU address $c000-$cfff
+ 0: IRQ status? at CPU address $c000-$cfff
+read
+$8000-$bfff 可変エリア, write $f000 bit0-2
+$c000-$cfff 可変エリア, write $f000 bit3
+$d000-$ffff 固定エリア, ROM address 0x1d000-0x1ffff
+*/
+
+board <- {
+ mappernum = 73,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x4000
+ },
+ ppu_rom= {
+ size_base = 0, size_max = 0,
+ banksize = 0x2000
+ },
+ ppu_ramfind = false, vram_mirrorfind = true
+};
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize - 1; i += 1){
+ cpu_write(d, 0xf000, i);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_write(d, 0xf000, 1 << 3);
+ cpu_read(d, 0xc000, banksize);
+}
-board <- {\r
- mappernum = 21, ppu_ramfind = false, vram_mirrorfind = false,\r
- cpu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x2000 / 8,\r
- }\r
-};\r
-dofile("vrc4.ai");\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- vrc4_cpu_dump(d, pagesize, banksize, 1, 2);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- vrc4_ppu_dump(d, pagesize, banksize, 1, 2);\r
-}\r
+board <- {
+ mappernum = 21, ppu_ramfind = false, vram_mirrorfind = false,
+ cpu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x2000 / 8,
+ }
+};
+dofile("vrc4.ai");
+function cpu_dump(d, pagesize, banksize)
+{
+ vrc4_cpu_dump(d, pagesize, banksize, 1, 2);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ vrc4_ppu_dump(d, pagesize, banksize, 1, 2);
+}
-board <- {\r
- mappernum = 25,\r
- cpu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x2000 / 8\r
- },\r
- ppu_ramfind = false, vram_mirrorfind = false\r
-};\r
-dofile("vrc4.ai");\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- vrc4_cpu_dump(d, pagesize, banksize, 3, 2);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- vrc4_ppu_dump(d, pagesize, banksize, 3, 2);\r
-}\r
+board <- {
+ mappernum = 25,
+ cpu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x2000 / 8
+ },
+ ppu_ramfind = false, vram_mirrorfind = false
+};
+dofile("vrc4.ai");
+function cpu_dump(d, pagesize, banksize)
+{
+ vrc4_cpu_dump(d, pagesize, banksize, 3, 2);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ vrc4_ppu_dump(d, pagesize, banksize, 3, 2);
+}
-/*VRC7 FLASH MEMORY WRITE\r
-generic CPU memory bank\r
-cpu address|rom address |page|task\r
-$8000-$9fff|0x02000-0x03fff|1 |write (0x2aaa & 0x1fff) + 0x8000\r
-$a000-$bfff|0x04000-0x05fff|2 |write (0x5555 & 0x1fff) + 0xa000\r
-$c000-$dfff|n * 0x2000 |n |write area\r
-$e000-$efff|末尾 |fix |boot area, 未使用*/\r
-board <- {\r
- mappernum = 85, vram_mirrorfind = false, ppu_ramfind = true,\r
- cpu_rom = {banksize = 0x2000, size_max = 4 * mega, size_base = 1 * mega},\r
- cpu_ram = {banksize = 0x2000, size_max = 0x2000, size_base = 0x2000},\r
- ppu_rom = {banksize = 0x2000 / 8, size_max = 2 * mega, size_base = 1* mega}\r
-};\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0x8000, i);\r
- cpu_write(d, 0x8018, i | 1);\r
- cpu_read(d, 0x8000, banksize * 2);\r
- }\r
- cpu_write(d, 0x9000, 0x3e);\r
- cpu_read(d, 0xc000, banksize * 2);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0xa000, 0);\r
- for(local i = 0; i < pagesize; i += 8){\r
- local t = i;\r
- for(local j = 0xa000; j < 0xe000; j += 0x1000){\r
- cpu_write(d, j, t++);\r
- cpu_write(d, j+0x18, t++);\r
- }\r
- ppu_read(d, 0, banksize * 8);\r
- }\r
-}\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0xe000, 0x80);\r
- cpu_ramrw(d, 0x6000, banksize);\r
- cpu_write(d, 0xe000, 0x00);\r
-}\r
-\r
-/*\r
-this is RC851/352402 style. RV051/353429 style is not supported.\r
-352402: Program ROM/ Charcter RAM/ Backup RAM/ R1 = A5, R0 = A4/ Extra Sound\r
-353429: Program ROM/ Charcter ROM/ R1 = A3, R0 = ?\r
-*/\r
-function initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- cpu_command(d, 0, 0xc000, cpu_banksize);\r
- cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x5555, 0xa000, cpu_banksize);\r
- cpu_write(d, 0x8000, 1);\r
- cpu_write(d, 0x8010, 2);\r
- cpu_write(d, 0x9000, 0);\r
-}\r
-function cpu_transfer(d, start, end, banksize)\r
-{\r
- for(local i = start; i < end - 1; i += 1){\r
- cpu_write(d, 0x9000, i);\r
- cpu_program(d, 0xc000, banksize);\r
- }\r
- cpu_program(d, 0xe000, banksize);\r
-}\r
-function ppu_transfer(d, start, end, size)\r
-{\r
-}\r
+/*VRC7 FLASH MEMORY WRITE
+generic CPU memory bank
+cpu address|rom address |page|task
+$8000-$9fff|0x02000-0x03fff|1 |write (0x2aaa & 0x1fff) + 0x8000
+$a000-$bfff|0x04000-0x05fff|2 |write (0x5555 & 0x1fff) + 0xa000
+$c000-$dfff|n * 0x2000 |n |write area
+$e000-$efff|末尾 |fix |boot area, 未使用*/
+board <- {
+ mappernum = 85, vram_mirrorfind = false, ppu_ramfind = true,
+ cpu_rom = {banksize = 0x2000, size_max = 4 * mega, size_base = 1 * mega},
+ cpu_ram = {banksize = 0x2000, size_max = 0x2000, size_base = 0x2000},
+ ppu_rom = {banksize = 0x2000 / 8, size_max = 2 * mega, size_base = 1* mega}
+};
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0x8000, i);
+ cpu_write(d, 0x8018, i | 1);
+ cpu_read(d, 0x8000, banksize * 2);
+ }
+ cpu_write(d, 0x9000, 0x3e);
+ cpu_read(d, 0xc000, banksize * 2);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ cpu_write(d, 0xa000, 0);
+ for(local i = 0; i < pagesize; i += 8){
+ local t = i;
+ for(local j = 0xa000; j < 0xe000; j += 0x1000){
+ cpu_write(d, j, t++);
+ cpu_write(d, j+0x18, t++);
+ }
+ ppu_read(d, 0, banksize * 8);
+ }
+}
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ cpu_write(d, 0xe000, 0x80);
+ cpu_ramrw(d, 0x6000, banksize);
+ cpu_write(d, 0xe000, 0x00);
+}
+
+/*
+this is RC851/352402 style. RV051/353429 style is not supported.
+352402: Program ROM/ Charcter RAM/ Backup RAM/ R1 = A5, R0 = A4/ Extra Sound
+353429: Program ROM/ Charcter ROM/ R1 = A3, R0 = ?
+*/
+function initalize(d, cpu_banksize, ppu_banksize)
+{
+ cpu_command(d, 0, 0xc000, cpu_banksize);
+ cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);
+ cpu_command(d, 0x5555, 0xa000, cpu_banksize);
+ cpu_write(d, 0x8000, 1);
+ cpu_write(d, 0x8010, 2);
+ cpu_write(d, 0x9000, 0);
+}
+function cpu_transfer(d, start, end, banksize)
+{
+ for(local i = start; i < end - 1; i += 1){
+ cpu_write(d, 0x9000, i);
+ cpu_program(d, 0xc000, banksize);
+ }
+ cpu_program(d, 0xe000, banksize);
+}
+function ppu_transfer(d, start, end, size)
+{
+}
-//cpu_dump, ppu_dump 内で同名の関数を呼んではいけない\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- \r
- for(local i = 0; i < pagesize - 1; i += 1){\r
- cpu_write(d, register_offset + 8, i);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 8){\r
- for(local j = 0; j < 8; j += 1){\r
- cpu_write(d, register_offset + j, i + j);\r
- ppu_read(d, j * banksize, banksize);\r
- }\r
- }\r
-}\r
-\r
-function program_initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- cpu_write(d, 0x8008, 0x00);\r
- cpu_command(d, 0x0000, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x02aa, 0xc000, cpu_banksize);\r
- cpu_command(d, 0x0555, 0xc000, cpu_banksize);\r
- cpu_write(d, 0x8000, [0x0a, 0x15, 0]);\r
- ppu_command(d, 0x2aaa, 0, ppu_banksize);\r
- ppu_command(d, 0x5555, 0x0400, ppu_banksize);\r
- ppu_command(d, 0, 0x0800, ppu_banksize);\r
-}\r
-\r
-function cpu_transfer(d, start, end, cpu_banksize)\r
-{\r
- for(local i = start; i < end - 1; i +=1){\r
- cpu_write(d, 0x8008, i);\r
- cpu_program(d, 0x8000, cpu_banksize);\r
- }\r
- cpu_program(d, 0xc000, cpu_banksize);\r
-}\r
-\r
-function ppu_transfer(d, start, end, ppu_banksize)\r
-{\r
- for(local i = start; i < end; i +=4){\r
- cpu_write(d, 0x8004, [i, i+1, i+2, i+3]);\r
- ppu_program(d, 0x1000, ppu_banksize * 4);\r
- }\r
-}\r
-/*\r
-$800d\r
-7 data direction 0:FCG3->EEPROM (write), 1:EEPROM->FCG3 (read)\r
-6 data, FCG3 -> EEPROM\r
-5 clock\r
-\r
-$6000-$7fff\r
-4 data, EEPROM -> FCG3\r
-*/\r
-const I2C_READBIT = 4;\r
-const I2C_DIRBIT = 7;\r
-const I2C_WRITEBIT = 6;\r
-const I2C_CLOCKBIT = 5;\r
-\r
-I2C_DIR_READ <- 1 << I2C_DIRBIT;\r
-I2C_DIR_WRITE <- 0 << I2C_DIRBIT;\r
-I2C_SEND_H <- 1 << I2C_WRITEBIT;\r
-I2C_SEND_L <- 0 << I2C_WRITEBIT;\r
-I2C_CLOCK_H <- 1 << I2C_CLOCKBIT;\r
-I2C_CLOCK_L <- 0 << I2C_CLOCKBIT;\r
-\r
-function i2c_start(d)\r
-{\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_H);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_L);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);\r
-}\r
-\r
-function i2c_stop(d)\r
-{\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_L);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_H);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);\r
- cpu_write(d, 0x800d, I2C_DIR_READ | I2C_CLOCK_L | I2C_SEND_H);\r
-}\r
-\r
-function i2c_ack_wait(d)\r
-{\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);\r
- cpu_write(d, 0x800d, I2C_DIR_READ | I2C_CLOCK_H | I2C_SEND_L);\r
- local n = cpu_read_register(d, 0x6000, 0);\r
- n = n & (1 << I2C_READBIT);\r
- return n == 0;\r
-}\r
-\r
-\r
-function send_bit(d, v)\r
-{\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | v);\r
- cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | v);\r
-}\r
-\r
-function i2c_address_set(d, address, rw)\r
-{\r
- do{\r
- local a = address;\r
- i2c_start(d);\r
- for(local i = 0; i < 7; i++){\r
- send_bit(d, a & I2C_SEND_H);\r
- a = a << 1;\r
- }\r
- send_bit(d, rw);\r
- }while(i2c_ack_wait(d) != true);\r
-}\r
-\r
-function eeprom_address_set(d, address)\r
-{\r
- for(local i = 0; i < 8; i++){\r
- local n = I2C_SEND_L;\r
- if(address & 0x80){\r
- n = I2C_SEND_H;\r
- }\r
- send_bit(d, n);\r
- address = address << 1;\r
- }\r
- i2c_ack_wait(d);\r
-}\r
+//cpu_dump, ppu_dump 内で同名の関数を呼んではいけない
+function cpu_dump(d, pagesize, banksize)
+{
+
+ for(local i = 0; i < pagesize - 1; i += 1){
+ cpu_write(d, register_offset + 8, i);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xc000, banksize);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 8){
+ for(local j = 0; j < 8; j += 1){
+ cpu_write(d, register_offset + j, i + j);
+ ppu_read(d, j * banksize, banksize);
+ }
+ }
+}
+
+function program_initalize(d, cpu_banksize, ppu_banksize)
+{
+ cpu_write(d, 0x8008, 0x00);
+ cpu_command(d, 0x0000, 0x8000, cpu_banksize);
+ cpu_command(d, 0x02aa, 0xc000, cpu_banksize);
+ cpu_command(d, 0x0555, 0xc000, cpu_banksize);
+ cpu_write(d, 0x8000, [0x0a, 0x15, 0]);
+ ppu_command(d, 0x2aaa, 0, ppu_banksize);
+ ppu_command(d, 0x5555, 0x0400, ppu_banksize);
+ ppu_command(d, 0, 0x0800, ppu_banksize);
+}
+
+function cpu_transfer(d, start, end, cpu_banksize)
+{
+ for(local i = start; i < end - 1; i +=1){
+ cpu_write(d, 0x8008, i);
+ cpu_program(d, 0x8000, cpu_banksize);
+ }
+ cpu_program(d, 0xc000, cpu_banksize);
+}
+
+function ppu_transfer(d, start, end, ppu_banksize)
+{
+ for(local i = start; i < end; i +=4){
+ cpu_write(d, 0x8004, [i, i+1, i+2, i+3]);
+ ppu_program(d, 0x1000, ppu_banksize * 4);
+ }
+}
+/*
+$800d
+7 data direction 0:FCG3->EEPROM (write), 1:EEPROM->FCG3 (read)
+6 data, FCG3 -> EEPROM
+5 clock
+
+$6000-$7fff
+4 data, EEPROM -> FCG3
+*/
+const I2C_READBIT = 4;
+const I2C_DIRBIT = 7;
+const I2C_WRITEBIT = 6;
+const I2C_CLOCKBIT = 5;
+
+I2C_DIR_READ <- 1 << I2C_DIRBIT;
+I2C_DIR_WRITE <- 0 << I2C_DIRBIT;
+I2C_SEND_H <- 1 << I2C_WRITEBIT;
+I2C_SEND_L <- 0 << I2C_WRITEBIT;
+I2C_CLOCK_H <- 1 << I2C_CLOCKBIT;
+I2C_CLOCK_L <- 0 << I2C_CLOCKBIT;
+
+function i2c_start(d)
+{
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_H);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_L);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);
+}
+
+function i2c_stop(d)
+{
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_L);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | I2C_SEND_H);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);
+ cpu_write(d, 0x800d, I2C_DIR_READ | I2C_CLOCK_L | I2C_SEND_H);
+}
+
+function i2c_ack_wait(d)
+{
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_H);
+ cpu_write(d, 0x800d, I2C_DIR_READ | I2C_CLOCK_H | I2C_SEND_L);
+ local n = cpu_read_register(d, 0x6000, 0);
+ n = n & (1 << I2C_READBIT);
+ return n == 0;
+}
+
+
+function send_bit(d, v)
+{
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | I2C_SEND_L);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_L | v);
+ cpu_write(d, 0x800d, I2C_DIR_WRITE | I2C_CLOCK_H | v);
+}
+
+function i2c_address_set(d, address, rw)
+{
+ do{
+ local a = address;
+ i2c_start(d);
+ for(local i = 0; i < 7; i++){
+ send_bit(d, a & I2C_SEND_H);
+ a = a << 1;
+ }
+ send_bit(d, rw);
+ }while(i2c_ack_wait(d) != true);
+}
+
+function eeprom_address_set(d, address)
+{
+ for(local i = 0; i < 8; i++){
+ local n = I2C_SEND_L;
+ if(address & 0x80){
+ n = I2C_SEND_H;
+ }
+ send_bit(d, n);
+ address = address << 1;
+ }
+ i2c_ack_wait(d);
+}
-//send 1bit serial 5 times\r
-function mmc1_write(d, address, data)\r
-{\r
- local ar = [];\r
- for(local i = 0; i < 5; i++){\r
- ar.append(data);\r
- data = data >> 1;\r
- }\r
- cpu_write(d, address, ar);\r
-\r
-/* for(local i = 0; i < 5; i++){\r
- cpu_write(d, address, data >> i);\r
- }*/\r
-}\r
+//send 1bit serial 5 times
+function mmc1_write(d, address, data)
+{
+ local ar = [];
+ for(local i = 0; i < 5; i++){
+ ar.append(data);
+ data = data >> 1;
+ }
+ cpu_write(d, address, ar);
+
+/* for(local i = 0; i < 5; i++){
+ cpu_write(d, address, data >> i);
+ }*/
+}
-/*\r
-Namcot 118/119 chip with Charcter ROM A16 wired PPU A12\r
-\r
-Quinty\r
-*/\r
-board <- {\r
- mappernum = 88, vram_mirrorfind = true, ppu_ramfind = false,\r
- cpu_rom = {\r
- size_base = 0x10000, size_max = 1*mega,\r
- banksize = 0x2000\r
- },\r
- cpu_ram = {\r
- size_base = 0, size_max = 0, banksize = 0\r
- }\r
- ppu_rom = {\r
- size_base = 0x20000, size_max = 0x20000,\r
- banksize = 0x0400\r
- }\r
-};\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0x8000, [6, i, 7, i+1]);\r
- cpu_read(d, 0x8000, banksize * 2);\r
- }\r
- cpu_read(d, 0xc000, banksize * 2);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- local i;\r
- //ROM offset 0x00000-0x0ffff can access from PPU address 0x0000-0x0fff\r
- for(i = 0; i < (pagesize >> 1); i += 4){\r
- cpu_write(d, 0x8000, [0, i, 1, i+2]);\r
- ppu_read(d, 0x0000, banksize * 4);\r
- }\r
- \r
- //ROM offset 0x10000-0x1ffff can access from PPU address 0x1000-0x1fff\r
- for(; i < pagesize; i += 4){\r
- cpu_write(d, 0x8000, [2, i, 3, i+1, 4, i+2, 5, i+3]);\r
- ppu_read(d, 0x1000, banksize * 4);\r
- }\r
-}\r
+/*
+Namcot 118/119 chip with Charcter ROM A16 wired PPU A12
+
+Quinty
+*/
+board <- {
+ mappernum = 88, vram_mirrorfind = true, ppu_ramfind = false,
+ cpu_rom = {
+ size_base = 0x10000, size_max = 1*mega,
+ banksize = 0x2000
+ },
+ cpu_ram = {
+ size_base = 0, size_max = 0, banksize = 0
+ }
+ ppu_rom = {
+ size_base = 0x20000, size_max = 0x20000,
+ banksize = 0x0400
+ }
+};
+
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0x8000, [6, i, 7, i+1]);
+ cpu_read(d, 0x8000, banksize * 2);
+ }
+ cpu_read(d, 0xc000, banksize * 2);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ local i;
+ //ROM offset 0x00000-0x0ffff can access from PPU address 0x0000-0x0fff
+ for(i = 0; i < (pagesize >> 1); i += 4){
+ cpu_write(d, 0x8000, [0, i, 1, i+2]);
+ ppu_read(d, 0x0000, banksize * 4);
+ }
+
+ //ROM offset 0x10000-0x1ffff can access from PPU address 0x1000-0x1fff
+ for(; i < pagesize; i += 4){
+ cpu_write(d, 0x8000, [2, i, 3, i+1, 4, i+2, 5, i+3]);
+ ppu_read(d, 0x1000, banksize * 4);
+ }
+}
-/*\r
-Namcot 108/109/118/119 chip with generic wiring.\r
-PCB 3401/34[01]5/34[01]6/34[01]7/3451/3413/3414\r
- NES-DEROM/DE1ROM/DRROM\r
-\r
-この IC は MMC3 より先に登場し、 MMC3 に仕様が似ている。\r
-仕様が似ている点で,古いエミュレータでは mapper 4 と定義されている。\r
-\r
-古くて曖昧な仕様は Namco IC と MMC3 との明確な区別が再定義され、 mapper\r
-番号も 206 へ分離された。それにも関わらず Namco のゲームは MMC3 \r
-(mapper 4)という認識と古い ROM image が消えないのはユーザーにとって\r
-たいした違いがないからだ。\r
-\r
-NAMCOT-MC, NAMCOT-SX で動作確認済み\r
-*/\r
-\r
-board <- {\r
- mappernum = 206, vram_mirrorfind = true, ppu_ramfind = false,\r
- cpu_rom = {\r
- size_base = 0x10000, size_max = 1*mega,\r
- banksize = 0x2000\r
- },\r
- cpu_ram = {\r
- size_base = 0, size_max = 0, banksize = 0\r
- }\r
- ppu_rom = {\r
- size_base = 0x8000, size_max = 0x10000,\r
- banksize = 0x0400\r
- }\r
-};\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0x8000, [6, i, 7, i+1]);\r
- cpu_read(d, 0x8000, banksize * 2);\r
- }\r
- cpu_read(d, 0xc000, banksize * 2);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 8){\r
- cpu_write(d, 0x8000, [0, i, 1, i+2]);\r
- cpu_write(d, 0x8000, [2, i+4, 3, i+5, 4, i+6, 5, i+7]);\r
- ppu_read(d, 0x0000, banksize * 8);\r
- }\r
-}\r
+/*
+Namcot 108/109/118/119 chip with generic wiring.
+PCB 3401/34[01]5/34[01]6/34[01]7/3451/3413/3414
+ NES-DEROM/DE1ROM/DRROM
+
+この IC は MMC3 より先に登場し、 MMC3 に仕様が似ている。
+仕様が似ている点で,古いエミュレータでは mapper 4 と定義されている。
+
+古くて曖昧な仕様は Namco IC と MMC3 との明確な区別が再定義され、 mapper
+番号も 206 へ分離された。それにも関わらず Namco のゲームは MMC3
+(mapper 4)という認識と古い ROM image が消えないのはユーザーにとって
+たいした違いがないからだ。
+
+NAMCOT-MC, NAMCOT-SX で動作確認済み
+*/
+
+board <- {
+ mappernum = 206, vram_mirrorfind = true, ppu_ramfind = false,
+ cpu_rom = {
+ size_base = 0x10000, size_max = 1*mega,
+ banksize = 0x2000
+ },
+ cpu_ram = {
+ size_base = 0, size_max = 0, banksize = 0
+ }
+ ppu_rom = {
+ size_base = 0x8000, size_max = 0x10000,
+ banksize = 0x0400
+ }
+};
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0x8000, [6, i, 7, i+1]);
+ cpu_read(d, 0x8000, banksize * 2);
+ }
+ cpu_read(d, 0xc000, banksize * 2);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 8){
+ cpu_write(d, 0x8000, [0, i, 1, i+2]);
+ cpu_write(d, 0x8000, [2, i+4, 3, i+5, 4, i+6, 5, i+7]);
+ ppu_read(d, 0x0000, banksize * 8);
+ }
+}
-/*\r
-Namcot 129/163\r
-\r
-No battery, no external RAM:\r
- Star Wars (129), Namco Classic, Youkai Douchuki, Final Lap, \r
- Erika to Satoru no Yumebouken, Rolling Thunder, Dragon Ninja, \r
- Mappy Kids, Namco Classic II\r
-\r
-Battery-backuped Memory is used by an external RAM:\r
- Sangokushi, King of Kings, Juvei Quest,\r
- Megami Tensei II, Sangokushi II (uses IRQ)\r
-\r
-Battery-backuped Memory is used by an internal RAM:\r
- Dokuganryu Masamune, Kaiju Monogatari, Mindseeker, Hydride3, \r
- Famista '90, Battle Fleet\r
-*/\r
-board <- {\r
- mappernum = 19, \r
- cpu_rom = {\r
- size_base = 2 * mega, size_max = 4 * mega,\r
- banksize = 0x2000\r
- }, \r
- cpu_ram = {\r
- size_base = 0x0080, size_max = 0x2000,\r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x0400\r
- },\r
- ppu_ramfind = false,\r
- vram_mirrorfind = false\r
-};\r
-dofile("namcot_19.ai");\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- if(pagesize == 0){ //internal RAM\r
- cpu_write(d, 0xf800, 0x80); //autoinrement on\r
- cpu_ramrw(d, 0x4800, 0x80);\r
- }else{ //external RAM\r
- cpu_write(d, 0xf800, 0x40);\r
- cpu_ramrw(d, 0x6000, banksize);\r
- cpu_write(d, 0xf800, 0x4f);\r
- }\r
-}\r
+/*
+Namcot 129/163
+
+No battery, no external RAM:
+ Star Wars (129), Namco Classic, Youkai Douchuki, Final Lap,
+ Erika to Satoru no Yumebouken, Rolling Thunder, Dragon Ninja,
+ Mappy Kids, Namco Classic II
+
+Battery-backuped Memory is used by an external RAM:
+ Sangokushi, King of Kings, Juvei Quest,
+ Megami Tensei II, Sangokushi II (uses IRQ)
+
+Battery-backuped Memory is used by an internal RAM:
+ Dokuganryu Masamune, Kaiju Monogatari, Mindseeker, Hydride3,
+ Famista '90, Battle Fleet
+*/
+board <- {
+ mappernum = 19,
+ cpu_rom = {
+ size_base = 2 * mega, size_max = 4 * mega,
+ banksize = 0x2000
+ },
+ cpu_ram = {
+ size_base = 0x0080, size_max = 0x2000,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x0400
+ },
+ ppu_ramfind = false,
+ vram_mirrorfind = false
+};
+dofile("namcot_19.ai");
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ if(pagesize == 0){ //internal RAM
+ cpu_write(d, 0xf800, 0x80); //autoinrement on
+ cpu_ramrw(d, 0x4800, 0x80);
+ }else{ //external RAM
+ cpu_write(d, 0xf800, 0x40);
+ cpu_ramrw(d, 0x6000, banksize);
+ cpu_write(d, 0xf800, 0x4f);
+ }
+}
-/*\r
-Namcot 175\r
-\r
-Wagan Land 2, Famista'91, Family Circuit '91, Chibimaruko chan, \r
-Heisei Tensai Bakabon\r
-\r
-Family Circuit '91 has Program ROM(4M), Charcter ROM and external \r
-Battery Backuped WorkRAM.\r
-*/\r
-board <- {\r
- mappernum = 19, //210, \r
- cpu_rom = {\r
- size_base = 2 * mega, size_max = 4 * mega,\r
- banksize = 0x2000\r
- }, \r
- cpu_ram = {\r
- size_base = 0x0800, size_max = 0x0800,\r
- banksize = 0x2000\r
- }, \r
- ppu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x0400\r
- },\r
- ppu_ramfind = false,\r
- vram_mirrorfind = true\r
-};\r
-dofile("namcot_19.ai");\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0xc000, 0x01);\r
- cpu_ramrw(d, 0x6000, 0x0800);\r
- cpu_write(d, 0xc000, 0x00);\r
-}\r
+/*
+Namcot 175
+
+Wagan Land 2, Famista'91, Family Circuit '91, Chibimaruko chan,
+Heisei Tensai Bakabon
+
+Family Circuit '91 has Program ROM(4M), Charcter ROM and external
+Battery Backuped WorkRAM.
+*/
+board <- {
+ mappernum = 19, //210,
+ cpu_rom = {
+ size_base = 2 * mega, size_max = 4 * mega,
+ banksize = 0x2000
+ },
+ cpu_ram = {
+ size_base = 0x0800, size_max = 0x0800,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x0400
+ },
+ ppu_ramfind = false,
+ vram_mirrorfind = true
+};
+dofile("namcot_19.ai");
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ cpu_write(d, 0xc000, 0x01);
+ cpu_ramrw(d, 0x6000, 0x0800);
+ cpu_write(d, 0xc000, 0x00);
+}
-/*\r
-iNES mapper #19\r
-\r
-Many cartridges uses epoxies for ROM, RAM and mapper. Few cartridges \r
-uses discrete parts. Other functions are various though the memory \r
-mapping is common. \r
-\r
-The mistake of an old document is an etymology of 'namcot 106'. I have\r
-seen mapper IC with 163 (well known chip), 129, 175 and 340 for #19. \r
-I have never seen labeled IC with '106'. \r
-'106' is informal virtual name, and the relic of old emulators. \r
-*/\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0xe000, i);\r
- cpu_write(d, 0xe800, i | 1);\r
- cpu_read(d, 0x8000, banksize * 2);\r
- }\r
- cpu_write(d, 0xf000, 0x3e);\r
- cpu_read(d, 0xc000, banksize * 2);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0xe800, 0xe0);\r
- for(local i = 0; i < pagesize; i += 8){\r
- local address = 0x8000;\r
- for(local j = 0; j < 8; j++){\r
- cpu_write(d, address, i | j);\r
- address += 0x0800;\r
- }\r
- ppu_read(d, 0, banksize * 8);\r
- }\r
-}\r
-\r
-function program_initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- cpu_command(d, 0x0000, 0xa000, cpu_banksize);\r
- cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x5555, 0xa000, cpu_banksize);\r
- cpu_write(d, 0xe000, 0x41);\r
- cpu_write(d, 0xe800, 0xe2);\r
-\r
- ppu_command(d, 0x0000, 0x0000, ppu_banksize);\r
- ppu_command(d, 0x2aaa, 0x0400, ppu_banksize);\r
- ppu_command(d, 0x5555, 0x0800, ppu_banksize);\r
- cpu_write(d, 0x8000, 0x00);\r
- cpu_write(d, 0x8800, 0x0a);\r
- cpu_write(d, 0x9000, 0x15);\r
- //map 0x2000-0x2fff is RAM\r
- cpu_write(d, 0xc000, 0xe0);\r
- cpu_write(d, 0xc800, 0xe0);\r
- cpu_write(d, 0xd000, 0xe1);\r
- cpu_write(d, 0xd800, 0xe1);\r
-}\r
-\r
-function cpu_transfer(d, start, end, cpu_banksize)\r
-{\r
- for(local i = start; i < end - 1; i += 1){\r
- cpu_write(d, 0xf000, i | 0xe0);\r
- cpu_program(d, 0xc000, cpu_banksize);\r
- }\r
- cpu_program(d, 0xe000, cpu_banksize)\r
-}\r
-\r
-function ppu_transfer(d, start, end, ppu_banksize)\r
-{\r
- for(local i = start; i < end; i += 4){\r
- cpu_write(d, 0xa000, i);\r
- cpu_write(d, 0xa800, i | 1);\r
- cpu_write(d, 0xb000, i | 2);\r
- cpu_write(d, 0xb800, i | 3);\r
- ppu_program(d, 0x1000, ppu_banksize * 4);\r
- }\r
-}\r
+/*
+iNES mapper #19
+
+Many cartridges uses epoxies for ROM, RAM and mapper. Few cartridges
+uses discrete parts. Other functions are various though the memory
+mapping is common.
+
+The mistake of an old document is an etymology of 'namcot 106'. I have
+seen mapper IC with 163 (well known chip), 129, 175 and 340 for #19.
+I have never seen labeled IC with '106'.
+'106' is informal virtual name, and the relic of old emulators.
+*/
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0xe000, i);
+ cpu_write(d, 0xe800, i | 1);
+ cpu_read(d, 0x8000, banksize * 2);
+ }
+ cpu_write(d, 0xf000, 0x3e);
+ cpu_read(d, 0xc000, banksize * 2);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ cpu_write(d, 0xe800, 0xe0);
+ for(local i = 0; i < pagesize; i += 8){
+ local address = 0x8000;
+ for(local j = 0; j < 8; j++){
+ cpu_write(d, address, i | j);
+ address += 0x0800;
+ }
+ ppu_read(d, 0, banksize * 8);
+ }
+}
+
+function program_initalize(d, cpu_banksize, ppu_banksize)
+{
+ cpu_command(d, 0x0000, 0xa000, cpu_banksize);
+ cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);
+ cpu_command(d, 0x5555, 0xa000, cpu_banksize);
+ cpu_write(d, 0xe000, 0x41);
+ cpu_write(d, 0xe800, 0xe2);
+
+ ppu_command(d, 0x0000, 0x0000, ppu_banksize);
+ ppu_command(d, 0x2aaa, 0x0400, ppu_banksize);
+ ppu_command(d, 0x5555, 0x0800, ppu_banksize);
+ cpu_write(d, 0x8000, 0x00);
+ cpu_write(d, 0x8800, 0x0a);
+ cpu_write(d, 0x9000, 0x15);
+ //map 0x2000-0x2fff is RAM
+ cpu_write(d, 0xc000, 0xe0);
+ cpu_write(d, 0xc800, 0xe0);
+ cpu_write(d, 0xd000, 0xe1);
+ cpu_write(d, 0xd800, 0xe1);
+}
+
+function cpu_transfer(d, start, end, cpu_banksize)
+{
+ for(local i = start; i < end - 1; i += 1){
+ cpu_write(d, 0xf000, i | 0xe0);
+ cpu_program(d, 0xc000, cpu_banksize);
+ }
+ cpu_program(d, 0xe000, cpu_banksize)
+}
+
+function ppu_transfer(d, start, end, ppu_banksize)
+{
+ for(local i = start; i < end; i += 4){
+ cpu_write(d, 0xa000, i);
+ cpu_write(d, 0xa800, i | 1);
+ cpu_write(d, 0xb000, i | 2);
+ cpu_write(d, 0xb800, i | 3);
+ ppu_program(d, 0x1000, ppu_banksize * 4);
+ }
+}
-/*\r
-Namcot 340\r
-\r
-Splatter House, Top Striker, Famista '92, Dream Master, \r
-Wagan Land3, Famista '93, Famista '94\r
-*/\r
-board <- {\r
- mappernum = 19, //210, \r
- cpu_rom = {\r
- size_base = 2 * mega, size_max = 4 * mega,\r
- banksize = 0x2000\r
- }, \r
- cpu_ram = {\r
- size_base = 0x0800, size_max = 0x0800,\r
- banksize = 0x2000\r
- }, \r
- ppu_rom = {\r
- size_base = 2 * mega, size_max = 2 * mega,\r
- banksize = 0x0400\r
- },\r
- ppu_ramfind = false,\r
- vram_mirrorfind = false\r
-};\r
-dofile("namcot_19.ai");\r
+/*
+Namcot 340
+
+Splatter House, Top Striker, Famista '92, Dream Master,
+Wagan Land3, Famista '93, Famista '94
+*/
+board <- {
+ mappernum = 19, //210,
+ cpu_rom = {
+ size_base = 2 * mega, size_max = 4 * mega,
+ banksize = 0x2000
+ },
+ cpu_ram = {
+ size_base = 0x0800, size_max = 0x0800,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 2 * mega, size_max = 2 * mega,
+ banksize = 0x0400
+ },
+ ppu_ramfind = false,
+ vram_mirrorfind = false
+};
+dofile("namcot_19.ai");
-board <- {\r
- mappernum = 1, vram_mirrorfind = false, ppu_ramfind = true,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x4000, \r
- }, \r
- cpu_ram = {\r
- size_base = 0x2000, size_max = 0x2000,\r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 1 * mega, size_max = 1 * mega,\r
- banksize = 0x1000, \r
- }\r
-};\r
-\r
-dofile("mmc1.ai");\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0x8000, 0x80); //serial count reset\r
- mmc1_write(d, 0x8000, 0x0c); //CPU/PPU bank configuration\r
- for(local i = 0; i < pagesize - 1; i += 1){\r
- mmc1_write(d, 0xe000, i | 0x10);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 2){\r
- mmc1_write(d, 0xa000, i);\r
- mmc1_write(d, 0xc000, i | 1);\r
- ppu_read(d, 0, banksize * 2);\r
- }\r
-}\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- mmc1_write(d, 0x8000, 1 << 3);\r
- mmc1_write(d, 0xe000, 0);\r
- mmc1_write(d, 0xa000, 0);\r
- cpu_ramrw(d, 0x6000, banksize);\r
- mmc1_write(d, 0xe000, 0xff);\r
-}\r
-\r
-/*\r
-MMC1 ROM 2M + (ROM 1M or RAM) board\r
-CPU memory bank for SLROM, SKROM, SGROM, SNROM\r
-cpu address|rom address |page|task\r
-$8000-$bfff|n * 0x4000|even 0x00|write 0x2aaa + write area\r
-$c000-$ffff|0x3c000-0x3ffff|fix |write 0x5555\r
----------------------------------\r
-$8000-$bfff|0x00000-0x03fff|fix |write 0x2aaa\r
-$c000-$ffff|n * 0x4000|odd 0x01|write 0x5555 + write area\r
-\r
-PPU memory bank for SLROM, SKROM\r
-ppu area use command only mask A0-A10 device\r
-ppu address|rom address |page|task\r
-$0000-$0fff|0x00000 * n |n |write area + 0x2aa + 0x555\r
-$0000-$1fff|0x01000 * n |n+1 |write area\r
-*/\r
-function program_initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- cpu_write(d, 0x8000, 0x80);\r
- mmc1_write(d, 0xa000, 0x10); //SNROM + MMC1A disable W-RAM\r
- mmc1_write(d, 0x8000, 0x1c);\r
- mmc1_write(d, 0xe000, 0x10); //MMC1B disable W-RAM\r
- cpu_command(d, 0x0000, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x5555, 0xc000, cpu_banksize);\r
-\r
- ppu_command(d, 0x0000, 0, ppu_banksize);\r
- ppu_command(d, 0x02aa, 0, ppu_banksize);\r
- ppu_command(d, 0x0555, 0, ppu_banksize);\r
-}\r
-\r
-function cpu_transfer(d, start, end, cpu_banksize)\r
-{\r
- local i = 0;\r
- local wram = 1 << 4; //W-RAM disable flag\r
- for(i = start; i < end - 2; i += 2){\r
- mmc1_write(d, 0x8000, 0x1c);\r
- mmc1_write(d, 0xe000, i | 0 | wram);\r
- cpu_program(d, 0x8000, cpu_banksize);\r
- \r
- mmc1_write(d, 0x8000, 0x18);\r
- mmc1_write(d, 0xe000, i | 1 | wram);\r
- cpu_program(d, 0xc000, cpu_banksize);\r
- }\r
- mmc1_write(d, 0x8000, 0x1c);\r
- mmc1_write(d, 0xe000, i | wram);\r
- cpu_program(d, 0x8000, cpu_banksize);\r
- cpu_program(d, 0xc000, cpu_banksize);\r
-}\r
-\r
-function ppu_transfer(d, start, end, ppu_banksize)\r
-{\r
- for(local i = start; i < end; i+=2){\r
- mmc1_write(d, 0xa000, i)\r
- mmc1_write(d, 0xc000, i | 1);\r
- ppu_program(d, 0x0000, ppu_banksize * 2);\r
- }\r
-}\r
-\r
+board <- {
+ mappernum = 1, vram_mirrorfind = false, ppu_ramfind = true,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x4000,
+ },
+ cpu_ram = {
+ size_base = 0x2000, size_max = 0x2000,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x1000,
+ }
+};
+
+dofile("mmc1.ai");
+
+function cpu_dump(d, pagesize, banksize)
+{
+ cpu_write(d, 0x8000, 0x80); //serial count reset
+ mmc1_write(d, 0x8000, 0x0c); //CPU/PPU bank configuration
+ for(local i = 0; i < pagesize - 1; i += 1){
+ mmc1_write(d, 0xe000, i | 0x10);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xc000, banksize);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 2){
+ mmc1_write(d, 0xa000, i);
+ mmc1_write(d, 0xc000, i | 1);
+ ppu_read(d, 0, banksize * 2);
+ }
+}
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ mmc1_write(d, 0x8000, 1 << 3);
+ mmc1_write(d, 0xe000, 0);
+ mmc1_write(d, 0xa000, 0);
+ cpu_ramrw(d, 0x6000, banksize);
+ mmc1_write(d, 0xe000, 0xff);
+}
+
+/*
+MMC1 ROM 2M + (ROM 1M or RAM) board
+CPU memory bank for SLROM, SKROM, SGROM, SNROM
+cpu address|rom address |page|task
+$8000-$bfff|n * 0x4000|even 0x00|write 0x2aaa + write area
+$c000-$ffff|0x3c000-0x3ffff|fix |write 0x5555
+---------------------------------
+$8000-$bfff|0x00000-0x03fff|fix |write 0x2aaa
+$c000-$ffff|n * 0x4000|odd 0x01|write 0x5555 + write area
+
+PPU memory bank for SLROM, SKROM
+ppu area use command only mask A0-A10 device
+ppu address|rom address |page|task
+$0000-$0fff|0x00000 * n |n |write area + 0x2aa + 0x555
+$0000-$1fff|0x01000 * n |n+1 |write area
+*/
+function program_initalize(d, cpu_banksize, ppu_banksize)
+{
+ cpu_write(d, 0x8000, 0x80);
+ mmc1_write(d, 0xa000, 0x10); //SNROM + MMC1A disable W-RAM
+ mmc1_write(d, 0x8000, 0x1c);
+ mmc1_write(d, 0xe000, 0x10); //MMC1B disable W-RAM
+ cpu_command(d, 0x0000, 0x8000, cpu_banksize);
+ cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);
+ cpu_command(d, 0x5555, 0xc000, cpu_banksize);
+
+ ppu_command(d, 0x0000, 0, ppu_banksize);
+ ppu_command(d, 0x02aa, 0, ppu_banksize);
+ ppu_command(d, 0x0555, 0, ppu_banksize);
+}
+
+function cpu_transfer(d, start, end, cpu_banksize)
+{
+ local i = 0;
+ local wram = 1 << 4; //W-RAM disable flag
+ for(i = start; i < end - 2; i += 2){
+ mmc1_write(d, 0x8000, 0x1c);
+ mmc1_write(d, 0xe000, i | 0 | wram);
+ cpu_program(d, 0x8000, cpu_banksize);
+
+ mmc1_write(d, 0x8000, 0x18);
+ mmc1_write(d, 0xe000, i | 1 | wram);
+ cpu_program(d, 0xc000, cpu_banksize);
+ }
+ mmc1_write(d, 0x8000, 0x1c);
+ mmc1_write(d, 0xe000, i | wram);
+ cpu_program(d, 0x8000, cpu_banksize);
+ cpu_program(d, 0xc000, cpu_banksize);
+}
+
+function ppu_transfer(d, start, end, ppu_banksize)
+{
+ for(local i = start; i < end; i+=2){
+ mmc1_write(d, 0xa000, i)
+ mmc1_write(d, 0xc000, i | 1);
+ ppu_program(d, 0x0000, ppu_banksize * 2);
+ }
+}
+
-/*\r
-SUROM:\r
-Dragon Quest IV, Dragon Warrior III, Dragon Warrior IV, Ninjara Hoi!\r
-SXROM:\r
-Best Play Pro Yakyuu Special, Final Fantasy I & II\r
-*/\r
-board <- {\r
- mappernum = 1, vram_mirrorfind = false, ppu_ramfind = false,\r
- cpu_rom = {\r
- size_base = 4 * mega, size_max = 4 * mega,\r
- banksize = 0x4000, \r
- }, \r
- cpu_ram = {\r
- size_base = 0x2000, size_max = 0x8000,\r
- banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 0, size_max = 0,\r
- banksize = 0x1000, \r
- }\r
-};\r
-\r
-dofile("mmc1.ai");\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0x8000, 0x80); //serial count reset\r
- mmc1_write(d, 0x8000, 0x0c); //CPU/PPU bank configuration\r
- for(local i = 0; i < pagesize; i += 0x10){\r
- mmc1_write(d, 0xa000, (i & 0x10) | 1);\r
- for(local j = 0; j < 0x10 - 1; j += 1){\r
- mmc1_write(d, 0xe000, j | 0x10);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
- }\r
-}\r
-\r
-/*\r
-http://nesdevwiki.org/wiki/SXROM\r
- CHR bank 0 (internal, $A000-$BFFF)\r
-4bit0\r
------\r
-PSSxC\r
-||| |\r
-||| +- Select 4 KB CHR RAM bank at PPU $0000 (ignored in 8 KB mode)\r
-|++--- Select 8 KB PRG RAM bank\r
-+----- Select 256 KB PRG ROM bank\r
-*/\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- local sxrom_page = [0, 2 << 2, 1 << 2, 3 << 2];\r
- cpu_write(d, 0x8000, 0x80); //serial count reset\r
- mmc1_write(d, 0x8000, 1 << 3);\r
- mmc1_write(d, 0xe000, 0);\r
- for(local i = 0; i < pagesize; i += 1){\r
-// mmc1_write(d, 0xa000, (i & 0x03) << 2);\r
- mmc1_write(d, 0xa000, sxrom_page[i]);\r
- cpu_ramrw(d, 0x6000, banksize);\r
- }\r
- mmc1_write(d, 0xe000, 0xff);\r
-}\r
-\r
-/*\r
-SUROM SXROM CPU memory bank\r
-cpu address|rom address |page|task\r
---SNROM area -- even ----------------\r
-$8000-$bfff|n * 0x4000|even 0x00|write 0x2aaa + write area\r
-$c000-$ffff|0x3c000-0x3ffff|fix |write 0x5555\r
---SNROM area -- odd -----------------\r
-$8000-$bfff|0x00000-0x03fff|fix |write 0x2aaa\r
-$c000-$ffff|n * 0x4000|odd 0x01|write 0x5555 + write area\r
---SUROM area -- even ----------------\r
-$8000-$bfff|n * 0x4000|even 0x20|write 0x2aaa + write area\r
-$c000-$ffff|0x7c000-0x7ffff|fix |write 0x5555\r
---SUROM area -- odd -----------------\r
-$8000-$bfff|0x40000-0x43fff|fix |write 0x2aaa\r
-$c000-$ffff|n * 0x4000|odd 0x21|write 0x5555 + write area\r
-*/\r
-function program_initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- cpu_write(d, 0x8000, 0x80);\r
- cpu_command(d, 0, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x5555, 0xc000, cpu_banksize);\r
- mmc1_write(d, 0x8000, 0x0c);\r
- mmc1_write(d, 0xe000, 0x10); //cpubank #0\r
- mmc1_write(d, 0xa000, 0); //ROM area 1st 2M\r
-}\r
-\r
-function cpu_transfer(d, start, end, cpu_banksize)\r
-{\r
- local wram = 1 << 4; //W-RAM disable flag\r
- for(local k = 0; k < 0x20; k += 0x10){\r
- mmc1_write(d, 0xa000, k);\r
- for(local i = 0; i < 0x10; i += 2){\r
- //even page\r
- mmc1_write(d, 0x8000, 0x0c);\r
- mmc1_write(d, 0xe000, i | 0 | wram);\r
- cpu_program(d, 0x8000, cpu_banksize);\r
- \r
- //odd page\r
- mmc1_write(d, 0x8000, 0x08);\r
- mmc1_write(d, 0xe000, i | 1 | wram);\r
- cpu_program(d, 0xc000, cpu_banksize);\r
- }\r
- }\r
-}\r
-\r
-function ppu_transfer(d, start, end, bank)\r
-{\r
-}\r
+/*
+SUROM:
+Dragon Quest IV, Dragon Warrior III, Dragon Warrior IV, Ninjara Hoi!
+SXROM:
+Best Play Pro Yakyuu Special, Final Fantasy I & II
+*/
+board <- {
+ mappernum = 1, vram_mirrorfind = false, ppu_ramfind = false,
+ cpu_rom = {
+ size_base = 4 * mega, size_max = 4 * mega,
+ banksize = 0x4000,
+ },
+ cpu_ram = {
+ size_base = 0x2000, size_max = 0x8000,
+ banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 0, size_max = 0,
+ banksize = 0x1000,
+ }
+};
+
+dofile("mmc1.ai");
+
+function cpu_dump(d, pagesize, banksize)
+{
+ cpu_write(d, 0x8000, 0x80); //serial count reset
+ mmc1_write(d, 0x8000, 0x0c); //CPU/PPU bank configuration
+ for(local i = 0; i < pagesize; i += 0x10){
+ mmc1_write(d, 0xa000, (i & 0x10) | 1);
+ for(local j = 0; j < 0x10 - 1; j += 1){
+ mmc1_write(d, 0xe000, j | 0x10);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xc000, banksize);
+ }
+}
+
+/*
+http://nesdevwiki.org/wiki/SXROM
+ CHR bank 0 (internal, $A000-$BFFF)
+4bit0
+-----
+PSSxC
+||| |
+||| +- Select 4 KB CHR RAM bank at PPU $0000 (ignored in 8 KB mode)
+|++--- Select 8 KB PRG RAM bank
++----- Select 256 KB PRG ROM bank
+*/
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ local sxrom_page = [0, 2 << 2, 1 << 2, 3 << 2];
+ cpu_write(d, 0x8000, 0x80); //serial count reset
+ mmc1_write(d, 0x8000, 1 << 3);
+ mmc1_write(d, 0xe000, 0);
+ for(local i = 0; i < pagesize; i += 1){
+// mmc1_write(d, 0xa000, (i & 0x03) << 2);
+ mmc1_write(d, 0xa000, sxrom_page[i]);
+ cpu_ramrw(d, 0x6000, banksize);
+ }
+ mmc1_write(d, 0xe000, 0xff);
+}
+
+/*
+SUROM SXROM CPU memory bank
+cpu address|rom address |page|task
+--SNROM area -- even ----------------
+$8000-$bfff|n * 0x4000|even 0x00|write 0x2aaa + write area
+$c000-$ffff|0x3c000-0x3ffff|fix |write 0x5555
+--SNROM area -- odd -----------------
+$8000-$bfff|0x00000-0x03fff|fix |write 0x2aaa
+$c000-$ffff|n * 0x4000|odd 0x01|write 0x5555 + write area
+--SUROM area -- even ----------------
+$8000-$bfff|n * 0x4000|even 0x20|write 0x2aaa + write area
+$c000-$ffff|0x7c000-0x7ffff|fix |write 0x5555
+--SUROM area -- odd -----------------
+$8000-$bfff|0x40000-0x43fff|fix |write 0x2aaa
+$c000-$ffff|n * 0x4000|odd 0x21|write 0x5555 + write area
+*/
+function program_initalize(d, cpu_banksize, ppu_banksize)
+{
+ cpu_write(d, 0x8000, 0x80);
+ cpu_command(d, 0, 0x8000, cpu_banksize);
+ cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);
+ cpu_command(d, 0x5555, 0xc000, cpu_banksize);
+ mmc1_write(d, 0x8000, 0x0c);
+ mmc1_write(d, 0xe000, 0x10); //cpubank #0
+ mmc1_write(d, 0xa000, 0); //ROM area 1st 2M
+}
+
+function cpu_transfer(d, start, end, cpu_banksize)
+{
+ local wram = 1 << 4; //W-RAM disable flag
+ for(local k = 0; k < 0x20; k += 0x10){
+ mmc1_write(d, 0xa000, k);
+ for(local i = 0; i < 0x10; i += 2){
+ //even page
+ mmc1_write(d, 0x8000, 0x0c);
+ mmc1_write(d, 0xe000, i | 0 | wram);
+ cpu_program(d, 0x8000, cpu_banksize);
+
+ //odd page
+ mmc1_write(d, 0x8000, 0x08);
+ mmc1_write(d, 0xe000, i | 1 | wram);
+ cpu_program(d, 0xc000, cpu_banksize);
+ }
+ }
+}
+
+function ppu_transfer(d, start, end, bank)
+{
+}
-/*\r
-HVC-2I Fire Emblem Gaiden\r
-command line option\r
-./anago d22 mmc4_fkrom.ae hvc_2i.nes b\r
-*/\r
-board <- {\r
- mappernum = 10, vram_mirrorfind = false, ppu_ramfind = false,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x4000,\r
- }, \r
- cpu_ram = {\r
- size_base = 0x2000, size_max = 0x2000,\r
- banksize = 0x2000,\r
- },\r
- ppu_rom = {\r
- size_base = 0x10000, size_max = 1 * mega,\r
- banksize = 0x1000\r
- }\r
-};\r
-\r
-/*\r
-[cpu memmorymap - read]\r
-$6000-$7fff SRAM (battery backuped, optional)\r
-$8000-$bfff program ROM bank #0\r
-$c000-$ffff program ROM bank #1 (fixed)\r
-\r
-[cpu memmorymap - write]\r
-$a000-$afff program ROM bank register #0\r
-$b000-$bfff charcter ROM bank register #0\r
-$c000-$cfff charcter ROM bank register #1\r
-$d000-$dfff charcter ROM bank register #2\r
-$d000-$dfff charcter ROM bank register #3\r
-\r
-[ppu memorymap - read]\r
-0x0000-0x0fff charcter ROM bank #A (#0 or #1)\r
-0x0fd0-0x0fdf charcter ROM bank register switch to #0\r
-0x0fe0-0x0fef charcter ROM bank register switch to #1\r
-0x1000-0x1fff charcter ROM bank #B (#2 or #3)\r
-0x1fd0-0x1fdf charcter ROM bank register switch to #2\r
-0x1fe0-0x1fef charcter ROM bank register switch to #3\r
-*/\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize - 1; i += 1){\r
- cpu_write(d, 0xa000, i);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
-}\r
-\r
-/*\r
-PPU の read 途中にバンクレジスタが切り替わるらしいので下記の処理で\r
-同じデータを得るようにする。\r
-PPU address register\r
-0x0000-0x0fdf -> #0\r
-0x0fe0-0x0fff -> #1\r
-0x1000-0x1fdf -> #2\r
-0x1fe0-0x1fff -> #3\r
-\r
-ppu_read 前に #0 + #1 , #2 + #3 の内容は同じにしておく。\r
-*/\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 2){\r
- ppu_read(d, 0x0fd0, 0);\r
- cpu_write(d, 0xb000, i);\r
- ppu_read(d, 0x0fe0, 0);\r
- cpu_write(d, 0xc000, i);\r
-\r
- ppu_read(d, 0x1fd0, 0);\r
- cpu_write(d, 0xd000, i + 1);\r
- ppu_read(d, 0x1fe0, 0);\r
- cpu_write(d, 0xe000, i + 1);\r
-\r
- ppu_read(d, 0, banksize * 2);\r
- }\r
-}\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- cpu_ramrw(d, 0x6000, banksize);\r
-}\r
+/*
+HVC-2I Fire Emblem Gaiden
+command line option
+./anago d22 mmc4_fkrom.ae hvc_2i.nes b
+*/
+board <- {
+ mappernum = 10, vram_mirrorfind = false, ppu_ramfind = false,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x4000,
+ },
+ cpu_ram = {
+ size_base = 0x2000, size_max = 0x2000,
+ banksize = 0x2000,
+ },
+ ppu_rom = {
+ size_base = 0x10000, size_max = 1 * mega,
+ banksize = 0x1000
+ }
+};
+
+/*
+[cpu memmorymap - read]
+$6000-$7fff SRAM (battery backuped, optional)
+$8000-$bfff program ROM bank #0
+$c000-$ffff program ROM bank #1 (fixed)
+
+[cpu memmorymap - write]
+$a000-$afff program ROM bank register #0
+$b000-$bfff charcter ROM bank register #0
+$c000-$cfff charcter ROM bank register #1
+$d000-$dfff charcter ROM bank register #2
+$d000-$dfff charcter ROM bank register #3
+
+[ppu memorymap - read]
+0x0000-0x0fff charcter ROM bank #A (#0 or #1)
+0x0fd0-0x0fdf charcter ROM bank register switch to #0
+0x0fe0-0x0fef charcter ROM bank register switch to #1
+0x1000-0x1fff charcter ROM bank #B (#2 or #3)
+0x1fd0-0x1fdf charcter ROM bank register switch to #2
+0x1fe0-0x1fef charcter ROM bank register switch to #3
+*/
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize - 1; i += 1){
+ cpu_write(d, 0xa000, i);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xc000, banksize);
+}
+
+/*
+PPU の read 途中にバンクレジスタが切り替わるらしいので下記の処理で
+同じデータを得るようにする。
+PPU address register
+0x0000-0x0fdf -> #0
+0x0fe0-0x0fff -> #1
+0x1000-0x1fdf -> #2
+0x1fe0-0x1fff -> #3
+
+ppu_read 前に #0 + #1 , #2 + #3 の内容は同じにしておく。
+*/
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 2){
+ ppu_read(d, 0x0fd0, 0);
+ cpu_write(d, 0xb000, i);
+ ppu_read(d, 0x0fe0, 0);
+ cpu_write(d, 0xc000, i);
+
+ ppu_read(d, 0x1fd0, 0);
+ cpu_write(d, 0xd000, i + 1);
+ ppu_read(d, 0x1fe0, 0);
+ cpu_write(d, 0xe000, i + 1);
+
+ ppu_read(d, 0, banksize * 2);
+ }
+}
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ cpu_ramrw(d, 0x6000, banksize);
+}
-board <- {\r
- mappernum = 0,\r
- cpu_rom = {\r
- size_base = 0x8000, size_max = 0x8000\r
- banksize = 0x8000\r
- },\r
- ppu_rom= {\r
- size_base = 0x8000, size_max = 0x2000,\r
- banksize = 0x2000\r
- },\r
- ppu_ramfind = false, vram_mirrorfind = true\r
-};\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- cpu_read(d, 0x8000, 0x4000);\r
- cpu_read(d, 0xc000, 0x4000);\r
-}\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- ppu_read(d, 0, banksize);\r
-}\r
+board <- {
+ mappernum = 0,
+ cpu_rom = {
+ size_base = 0x8000, size_max = 0x8000
+ banksize = 0x8000
+ },
+ ppu_rom= {
+ size_base = 0x8000, size_max = 0x2000,
+ banksize = 0x2000
+ },
+ ppu_ramfind = false, vram_mirrorfind = true
+};
+function cpu_dump(d, pagesize, banksize)
+{
+ cpu_read(d, 0x8000, 0x4000);
+ cpu_read(d, 0xc000, 0x4000);
+}
+function ppu_dump(d, pagesize, banksize)
+{
+ ppu_read(d, 0, banksize);
+}
-board <- {\r
- mappernum = 68, ppu_ramfind = false, vram_mirrorfind = false,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x4000\r
- },\r
- cpu_ram = {\r
- size_base = 0x2000, size_max = 0x2000, banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x0800\r
- }\r
-};\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize - 1; i += 1){\r
- cpu_write(d, 0xf000, i);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
-}\r
-\r
-/*\r
-After Burner CRC32 list\r
-0x88f202f0 Program ROM\r
-0x10935d10 Charcter ROM #0\r
-0x0bc56f7a Charcter ROM #1\r
-0xa75cb06d Charcter ROM #0+#1\r
-0xf2ce3641 total\r
-*/\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- //dump uses 0x0000-0x1fff\r
-/* for(local i = 0; i < pagesize; i += 4){\r
- cpu_write(d, 0x8000, i);\r
- cpu_write(d, 0x9000, i | 1);\r
- cpu_write(d, 0xa000, i | 2);\r
- cpu_write(d, 0xb000, i | 3);\r
- ppu_read(d, 0, banksize * 4);\r
- }\r
- //dump uses 0x2000-0x27ff*/\r
-/* cpu_write(d, 0xe000, 0x10);\r
- for(local i = 0; i < pagesize*2; i += 2){\r
- cpu_write(d, 0xc000, i);\r
- cpu_write(d, 0xd000, i | 1);\r
- ppu_read(d, 0x2000, banksize);\r
- }*/\r
- //dump uses 0x2000-0x23ff*/\r
- cpu_write(d, 0xe000, 0x13);\r
- for(local i = 0; i < pagesize*2; i += 1){\r
- cpu_write(d, 0xd000, i);\r
- ppu_read(d, 0x2000, 0x400);\r
- }\r
-}\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0xf000, 0x10);\r
- cpu_ramrw(d, 0x6000, banksize);\r
- cpu_write(d, 0xf000, 0);\r
-}\r
+board <- {
+ mappernum = 68, ppu_ramfind = false, vram_mirrorfind = false,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x4000
+ },
+ cpu_ram = {
+ size_base = 0x2000, size_max = 0x2000, banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x0800
+ }
+};
+
+function cpu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize - 1; i += 1){
+ cpu_write(d, 0xf000, i);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xc000, banksize);
+}
+
+/*
+After Burner CRC32 list
+0x88f202f0 Program ROM
+0x10935d10 Charcter ROM #0
+0x0bc56f7a Charcter ROM #1
+0xa75cb06d Charcter ROM #0+#1
+0xf2ce3641 total
+*/
+function ppu_dump(d, pagesize, banksize)
+{
+ //dump uses 0x0000-0x1fff
+/* for(local i = 0; i < pagesize; i += 4){
+ cpu_write(d, 0x8000, i);
+ cpu_write(d, 0x9000, i | 1);
+ cpu_write(d, 0xa000, i | 2);
+ cpu_write(d, 0xb000, i | 3);
+ ppu_read(d, 0, banksize * 4);
+ }
+ //dump uses 0x2000-0x27ff*/
+/* cpu_write(d, 0xe000, 0x10);
+ for(local i = 0; i < pagesize*2; i += 2){
+ cpu_write(d, 0xc000, i);
+ cpu_write(d, 0xd000, i | 1);
+ ppu_read(d, 0x2000, banksize);
+ }*/
+ //dump uses 0x2000-0x23ff*/
+ cpu_write(d, 0xe000, 0x13);
+ for(local i = 0; i < pagesize*2; i += 1){
+ cpu_write(d, 0xd000, i);
+ ppu_read(d, 0x2000, 0x400);
+ }
+}
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ cpu_write(d, 0xf000, 0x10);
+ cpu_ramrw(d, 0x6000, banksize);
+ cpu_write(d, 0xf000, 0);
+}
-board <- {\r
- mappernum = 68, ppu_ramfind = false, vram_mirrorfind = false,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x4000\r
- },\r
- cpu_ram = {\r
- size_base = 0x2000, size_max = 0x2000, banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x0800\r
- }\r
-};\r
-\r
-/*\r
-SUNSOFT-4 manages, banksize:0x4000, pagesize:0x10\r
-[Nantetatte Baseball]\r
-page 0 to 7:\r
-uses subcartridge + SUNSOFT-6 controller\r
-page 8 to F:\r
-main PCB ROM data, data size is 0x20000\r
-\r
-[other games] \r
-ROM size is 0x20000, page 0 to 7 and page 8 to f are same data (mirrored).\r
-*/\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- local i;\r
- if(pagesize == 8){\r
- i = 8;\r
- pagesize += 8;\r
- }else{\r
- i = 0;\r
- }\r
- //page 0 to 7 uses via Nanntettate! Baseball Subcartridge\r
- for(; i < 8; i += 1){\r
- cpu_write(d, 0xf000, i); //set page and enable SUNSOFT-6 (disable Workram)\r
- cpu_write(d, 0x6000, 0); //active ROM\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- //page 8 to 0xe uses normal ROM\r
- for(; i < pagesize - 1; i += 1){\r
- cpu_write(d, 0xf000, i);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xc000, banksize);\r
-}\r
-\r
-/*\r
-SUNSOFT-4 can map Charcter ROM to nametable area.\r
-\r
-Charcter data (0x0000 to 0x1fff) banksize is 0x0800\r
-Nametable data (0x2000 to 0x2fff) banksize is 0x0400\r
-\r
-Charcter data\r
-A[17:11] = reg[6:0]\r
-A[10:0] = PPU A[10:0]\r
-\r
-Nametable data\r
-A[17] = 1\r
-A[16:10] = reg[6:0]\r
-A[9:0] = PPU A[9:0]\r
-\r
-After Burner CRC32 list\r
-0x88f202f0 Program ROM\r
-0x10935d10 Charcter ROM #0\r
-0x0bc56f7a Charcter ROM #1\r
-0xa75cb06d Charcter ROM #0+#1\r
-0xf2ce3641 total\r
-*/\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 4){\r
- cpu_write(d, 0x8000, i);\r
- cpu_write(d, 0x9000, i | 1);\r
- cpu_write(d, 0xa000, i | 2);\r
- cpu_write(d, 0xb000, i | 3);\r
- ppu_read(d, 0, banksize * 4);\r
- }\r
-}\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0xf000, 0x10); //enable Workram, disable SUNSOFT-6\r
- cpu_ramrw(d, 0x6000, banksize);\r
- cpu_write(d, 0xf000, 0);\r
-}\r
-\r
-/*\r
-SUNSOFT-4 has single switchable CPU bank. flash memory program address bit can uses A10:0 type.\r
-[CPU]\r
-$8000-$ffff -> programming area\r
-\r
-[PPU]\r
-0x0000-0x07ff -> 0x02800-0x02fff, uses 0x2aaa\r
-0x0800-0x0fff -> 0x05000-0x05800, uses 0x5555\r
-0x1000-0x17ff -> ID area (reserved)\r
-0x1800-0x1fff -> programming area\r
-*/\r
-function program_initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- cpu_command(d, 0x0000, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);\r
- cpu_command(d, 0x5555, 0xc000, cpu_banksize);\r
- cpu_write(d, 0xf000, 0); //disable Workram\r
-\r
- ppu_command(d, 0x2aaa, 0x0000, ppu_banksize);\r
- cpu_write(d, 0x8000, 0x05);\r
- ppu_command(d, 0x5555, 0x0800, ppu_banksize);\r
- cpu_write(d, 0x9000, 0x0a);\r
- ppu_command(d, 0x0000, 0x1000, ppu_banksize);\r
- cpu_write(d, 0xa000, 0);\r
-}\r
-\r
-function cpu_transfer(d, start, end, banksize)\r
-{\r
- for(local i = start; i < end - 1; i += 1){\r
- cpu_write(d, 0xf000, i);\r
- cpu_program(d, 0x8000, banksize);\r
- }\r
- cpu_program(d, 0xc000, banksize)\r
-}\r
-\r
-function ppu_transfer(d, start, end, banksize)\r
-{\r
- for(local i = start; i < end; i += 1){\r
- cpu_write(d, 0xb000, i);\r
- ppu_program(d, 0x1800, banksize);\r
- }\r
-}\r
+board <- {
+ mappernum = 68, ppu_ramfind = false, vram_mirrorfind = false,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x4000
+ },
+ cpu_ram = {
+ size_base = 0x2000, size_max = 0x2000, banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x0800
+ }
+};
+
+/*
+SUNSOFT-4 manages, banksize:0x4000, pagesize:0x10
+[Nantetatte Baseball]
+page 0 to 7:
+uses subcartridge + SUNSOFT-6 controller
+page 8 to F:
+main PCB ROM data, data size is 0x20000
+
+[other games]
+ROM size is 0x20000, page 0 to 7 and page 8 to f are same data (mirrored).
+*/
+function cpu_dump(d, pagesize, banksize)
+{
+ local i;
+ if(pagesize == 8){
+ i = 8;
+ pagesize += 8;
+ }else{
+ i = 0;
+ }
+ //page 0 to 7 uses via Nanntettate! Baseball Subcartridge
+ for(; i < 8; i += 1){
+ cpu_write(d, 0xf000, i); //set page and enable SUNSOFT-6 (disable Workram)
+ cpu_write(d, 0x6000, 0); //active ROM
+ cpu_read(d, 0x8000, banksize);
+ }
+ //page 8 to 0xe uses normal ROM
+ for(; i < pagesize - 1; i += 1){
+ cpu_write(d, 0xf000, i);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xc000, banksize);
+}
+
+/*
+SUNSOFT-4 can map Charcter ROM to nametable area.
+
+Charcter data (0x0000 to 0x1fff) banksize is 0x0800
+Nametable data (0x2000 to 0x2fff) banksize is 0x0400
+
+Charcter data
+A[17:11] = reg[6:0]
+A[10:0] = PPU A[10:0]
+
+Nametable data
+A[17] = 1
+A[16:10] = reg[6:0]
+A[9:0] = PPU A[9:0]
+
+After Burner CRC32 list
+0x88f202f0 Program ROM
+0x10935d10 Charcter ROM #0
+0x0bc56f7a Charcter ROM #1
+0xa75cb06d Charcter ROM #0+#1
+0xf2ce3641 total
+*/
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 4){
+ cpu_write(d, 0x8000, i);
+ cpu_write(d, 0x9000, i | 1);
+ cpu_write(d, 0xa000, i | 2);
+ cpu_write(d, 0xb000, i | 3);
+ ppu_read(d, 0, banksize * 4);
+ }
+}
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ cpu_write(d, 0xf000, 0x10); //enable Workram, disable SUNSOFT-6
+ cpu_ramrw(d, 0x6000, banksize);
+ cpu_write(d, 0xf000, 0);
+}
+
+/*
+SUNSOFT-4 has single switchable CPU bank. flash memory program address bit can uses A10:0 type.
+[CPU]
+$8000-$ffff -> programming area
+
+[PPU]
+0x0000-0x07ff -> 0x02800-0x02fff, uses 0x2aaa
+0x0800-0x0fff -> 0x05000-0x05800, uses 0x5555
+0x1000-0x17ff -> ID area (reserved)
+0x1800-0x1fff -> programming area
+*/
+function program_initalize(d, cpu_banksize, ppu_banksize)
+{
+ cpu_command(d, 0x0000, 0x8000, cpu_banksize);
+ cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);
+ cpu_command(d, 0x5555, 0xc000, cpu_banksize);
+ cpu_write(d, 0xf000, 0); //disable Workram
+
+ ppu_command(d, 0x2aaa, 0x0000, ppu_banksize);
+ cpu_write(d, 0x8000, 0x05);
+ ppu_command(d, 0x5555, 0x0800, ppu_banksize);
+ cpu_write(d, 0x9000, 0x0a);
+ ppu_command(d, 0x0000, 0x1000, ppu_banksize);
+ cpu_write(d, 0xa000, 0);
+}
+
+function cpu_transfer(d, start, end, banksize)
+{
+ for(local i = start; i < end - 1; i += 1){
+ cpu_write(d, 0xf000, i);
+ cpu_program(d, 0x8000, banksize);
+ }
+ cpu_program(d, 0xc000, banksize)
+}
+
+function ppu_transfer(d, start, end, banksize)
+{
+ for(local i = start; i < end; i += 1){
+ cpu_write(d, 0xb000, i);
+ ppu_program(d, 0x1800, banksize);
+ }
+}
-board <- {\r
- mappernum = 68, ppu_ramfind = false, vram_mirrorfind = false,\r
- cpu_rom = {\r
- size_base = 0x4000, size_max = 2 * mega,\r
- banksize = 0x4000\r
- },\r
- cpu_ram = {\r
- size_base = 0x2000, size_max = 0x2000, banksize = 0x2000\r
- },\r
- ppu_rom = {\r
- size_base = 0, size_max = 0,\r
- banksize = 0x0800\r
- }\r
-};\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0xf000, 7);\r
- cpu_write(d, 0x6000, 0x0d);\r
-// cpu_write(d, 0x6000, 0xb0);\r
- cpu_read(d, 0x8000, 0x2000);\r
- cpu_read(d, 0xa000, 0x2000);\r
-}\r
+board <- {
+ mappernum = 68, ppu_ramfind = false, vram_mirrorfind = false,
+ cpu_rom = {
+ size_base = 0x4000, size_max = 2 * mega,
+ banksize = 0x4000
+ },
+ cpu_ram = {
+ size_base = 0x2000, size_max = 0x2000, banksize = 0x2000
+ },
+ ppu_rom = {
+ size_base = 0, size_max = 0,
+ banksize = 0x0800
+ }
+};
+
+function cpu_dump(d, pagesize, banksize)
+{
+ cpu_write(d, 0xf000, 7);
+ cpu_write(d, 0x6000, 0x0d);
+// cpu_write(d, 0x6000, 0xb0);
+ cpu_read(d, 0x8000, 0x2000);
+ cpu_read(d, 0xa000, 0x2000);
+}
-board <- {\r
- mappernum = 69, vram_mirrorfind = false, ppu_ramfind = false,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x2000\r
- }, cpu_ram = {\r
- size_base = 0x2000, size_max = 0x2000, \r
- banksize = 0x2000\r
- }, ppu_rom = {\r
- size_base = 1 * mega, size_max = 2 *mega,\r
- banksize = 0x0400\r
- }\r
-};\r
-\r
-/*\r
-SUNSOFT-5A, SUNSOFT-5B, FME-7\r
-[CPU writemap]\r
-$6000-$7fff 7:0 RAM data (if RAM is enabled)\r
-$8000-$9fff 3:0 memory register address\r
-$a000-$bfff 7:0 memory register data\r
-$c000-$dfff 3:0 audio register address\r
-$e000-$ffff 7:0 audio register data\r
-\r
-[CPU readmap]\r
-$6000-$7fff 7:0 Program ROM bank #0 or RAM\r
-$8000-$9fff 7:0 Program ROM bank #1\r
-$a000-$bfff 7:0 Program ROM bank #2\r
-$c000-$dfff 7:0 Program ROM bank #3\r
-$e000-$ffff 7:0 Program ROM bank #4 (fixed to bottom page)\r
-\r
-[PPU readmap] (PPU write map is undefined)\r
-0x0000-0x03ff Charcter ROM bank #0|0x1000-0x13ff Charcter ROM bank #4\r
-0x0400-0x07ff Charcter ROM bank #1|0x1400-0x17ff Charcter ROM bank #5\r
-0x0800-0x0bff Charcter ROM bank #2|0x1800-0x1bff Charcter ROM bank #6\r
-0x0c00-0x0fff Charcter ROM bank #3|0x1c00-0x1fff Charcter ROM bank #7\r
-\r
-[FME-7 memory register]\r
-adr bit assignments\r
--------------------------\r
-0-7 7:0 Charcter ROM bank #0 to #7\r
-8 7 RAM enable bit 0:disable 1:enable\r
- 6 memory select at $6000-$7fff 0:ROM 1:RAM\r
- 4:0 CPU ROM page for bank #0\r
-9-b 4:0 CPU ROM page for bank #1 to #3\r
-c 1:0 PPU area VRAM control\r
-d 7 φ2 counter decrement 0:disable 1:enable\r
- 0 φ2 counter overflow IRQ 0:disable 1:enable\r
-e 7:0 φ2 counter value bit7:0\r
-f 7:0 φ2 counter value bit15:8\r
-\r
-address 8, bit7:6 behave on FME-7\r
-00 enabled ROM\r
-01 disabled ROM and RAM\r
-10 disabled ROM and RAM\r
-11 enabled RAM\r
-\r
-audio register\r
-(not analysed yet)\r
-\r
-*/\r
-function sunsoft5_write(d, register_address, data)\r
-{\r
- cpu_write(d, 0x8000, register_address);\r
- cpu_write(d, 0xa000, data);\r
-}\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
-/*\r
- //dump ROM data via $6000-$7fff\r
- for(local i = 0; i < pagesize; i++){\r
- sunsoft5_write(d, 8, i);\r
- cpu_read(d, 0x6000, banksize);\r
- }\r
-*/\r
- for(local i = 0; i < pagesize - 1; i++){\r
- sunsoft5_write(d, 9, i);\r
- cpu_read(d, 0x8000, banksize);\r
- }\r
- cpu_read(d, 0xe000, banksize);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- local mul = 8;\r
- for(local i = 0; i < pagesize; i+= mul){\r
- for(local j = 0; j < mul; j++){\r
- sunsoft5_write(d, j, i + j);\r
- }\r
- ppu_read(d, 0, banksize * mul);\r
- }\r
-}\r
-\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- sunsoft5_write(d, 8, 0xc0);\r
- cpu_ramrw(d, 0x6000, banksize);\r
- cpu_write(d, 0xa000, 0x00);\r
-}\r
-\r
-/*\r
-CPU memory bank\r
-cpu address|rom address |page|task\r
-$8000-$9fff|0x02000-0x03fff|1 |write 0x2aaa\r
-$a000-$bfff|0x04000-0x05fff|2 |write 0x5555\r
-$c000-$dfff|n * 0x2000 |n |program area\r
-$e000-$ffff|0x3c000-0x3ffff|fix |program last page\r
-\r
-PPU memory bank\r
-ppu address |rom address |page|task\r
-0x0000-0x03ff|0x02800-0x02fff|0x0a|write 0x2aaa\r
-0x0400-0x07ff|0x05000-0x057ff|0x14|write 0x5555\r
-0x0800-0x0fff|未使用\r
-0x1000-0x1fff|n * 0x1000 |n |program area\r
-*/\r
-function program_initalize(d, cpu_banksize, ppu_banksize)\r
-{\r
- sunsoft5_write(d, 8, 0x40); //disable W-RAM\r
-\r
- cpu_command(d, 0x2aaa, 0xe000, cpu_banksize);\r
- cpu_command(d, 0x5555, 0xe000, cpu_banksize);\r
- sunsoft5_write(d, 0xa,1);\r
- sunsoft5_write(d, 0xb,2);\r
-\r
- ppu_command(d, 0x2aaa, 0x1000, ppu_banksize);\r
- ppu_command(d, 0x5555, 0x1400, ppu_banksize);\r
- ppu_command(d, 0x0000, 0x1800, ppu_banksize);\r
- sunsoft5_write(d, 4, 0x0a);\r
- sunsoft5_write(d, 5, 0x15);\r
- sunsoft5_write(d, 6, 0);\r
-}\r
-\r
-function cpu_transfer(d, start, end, cpu_banksize)\r
-{\r
- for(local i = start; i < end - 1; i += 1){\r
- sunsoft5_write(d, 0xb, 3);\r
- cpu_program(d, 0x8000, cpu_banksize);\r
- }\r
- cpu_program(d, 0xe000, cpu_banksize);\r
-}\r
-\r
-function ppu_transfer(d, start, end, ppu_banksize)\r
-{\r
-/* local mul = 1;\r
- for(local i = start; i < end; i += mul){\r
- for(local j = 0; j < mul; j++){\r
- sunsoft5_write(d, j, i + j);\r
- }\r
- ppu_program(d, 0x0000, ppu_banksize * mul);\r
- }*/\r
- for(local i = start; i < end; i += 1){\r
- sunsoft5_write(d, 4, i);\r
- ppu_program(d, 0x1000, ppu_banksize);\r
- }\r
-}\r
+board <- {
+ mappernum = 69, vram_mirrorfind = false, ppu_ramfind = false,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x2000
+ }, cpu_ram = {
+ size_base = 0x2000, size_max = 0x2000,
+ banksize = 0x2000
+ }, ppu_rom = {
+ size_base = 1 * mega, size_max = 2 *mega,
+ banksize = 0x0400
+ }
+};
+
+/*
+SUNSOFT-5A, SUNSOFT-5B, FME-7
+[CPU writemap]
+$6000-$7fff 7:0 RAM data (if RAM is enabled)
+$8000-$9fff 3:0 memory register address
+$a000-$bfff 7:0 memory register data
+$c000-$dfff 3:0 audio register address
+$e000-$ffff 7:0 audio register data
+
+[CPU readmap]
+$6000-$7fff 7:0 Program ROM bank #0 or RAM
+$8000-$9fff 7:0 Program ROM bank #1
+$a000-$bfff 7:0 Program ROM bank #2
+$c000-$dfff 7:0 Program ROM bank #3
+$e000-$ffff 7:0 Program ROM bank #4 (fixed to bottom page)
+
+[PPU readmap] (PPU write map is undefined)
+0x0000-0x03ff Charcter ROM bank #0|0x1000-0x13ff Charcter ROM bank #4
+0x0400-0x07ff Charcter ROM bank #1|0x1400-0x17ff Charcter ROM bank #5
+0x0800-0x0bff Charcter ROM bank #2|0x1800-0x1bff Charcter ROM bank #6
+0x0c00-0x0fff Charcter ROM bank #3|0x1c00-0x1fff Charcter ROM bank #7
+
+[FME-7 memory register]
+adr bit assignments
+-------------------------
+0-7 7:0 Charcter ROM bank #0 to #7
+8 7 RAM enable bit 0:disable 1:enable
+ 6 memory select at $6000-$7fff 0:ROM 1:RAM
+ 4:0 CPU ROM page for bank #0
+9-b 4:0 CPU ROM page for bank #1 to #3
+c 1:0 PPU area VRAM control
+d 7 φ2 counter decrement 0:disable 1:enable
+ 0 φ2 counter overflow IRQ 0:disable 1:enable
+e 7:0 φ2 counter value bit7:0
+f 7:0 φ2 counter value bit15:8
+
+address 8, bit7:6 behave on FME-7
+00 enabled ROM
+01 disabled ROM and RAM
+10 disabled ROM and RAM
+11 enabled RAM
+
+audio register
+(not analysed yet)
+
+*/
+function sunsoft5_write(d, register_address, data)
+{
+ cpu_write(d, 0x8000, register_address);
+ cpu_write(d, 0xa000, data);
+}
+
+function cpu_dump(d, pagesize, banksize)
+{
+/*
+ //dump ROM data via $6000-$7fff
+ for(local i = 0; i < pagesize; i++){
+ sunsoft5_write(d, 8, i);
+ cpu_read(d, 0x6000, banksize);
+ }
+*/
+ for(local i = 0; i < pagesize - 1; i++){
+ sunsoft5_write(d, 9, i);
+ cpu_read(d, 0x8000, banksize);
+ }
+ cpu_read(d, 0xe000, banksize);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ local mul = 8;
+ for(local i = 0; i < pagesize; i+= mul){
+ for(local j = 0; j < mul; j++){
+ sunsoft5_write(d, j, i + j);
+ }
+ ppu_read(d, 0, banksize * mul);
+ }
+}
+
+function cpu_ram_access(d, pagesize, banksize)
+{
+ sunsoft5_write(d, 8, 0xc0);
+ cpu_ramrw(d, 0x6000, banksize);
+ cpu_write(d, 0xa000, 0x00);
+}
+
+/*
+CPU memory bank
+cpu address|rom address |page|task
+$8000-$9fff|0x02000-0x03fff|1 |write 0x2aaa
+$a000-$bfff|0x04000-0x05fff|2 |write 0x5555
+$c000-$dfff|n * 0x2000 |n |program area
+$e000-$ffff|0x3c000-0x3ffff|fix |program last page
+
+PPU memory bank
+ppu address |rom address |page|task
+0x0000-0x03ff|0x02800-0x02fff|0x0a|write 0x2aaa
+0x0400-0x07ff|0x05000-0x057ff|0x14|write 0x5555
+0x0800-0x0fff|未使用
+0x1000-0x1fff|n * 0x1000 |n |program area
+*/
+function program_initalize(d, cpu_banksize, ppu_banksize)
+{
+ sunsoft5_write(d, 8, 0x40); //disable W-RAM
+
+ cpu_command(d, 0x2aaa, 0xe000, cpu_banksize);
+ cpu_command(d, 0x5555, 0xe000, cpu_banksize);
+ sunsoft5_write(d, 0xa,1);
+ sunsoft5_write(d, 0xb,2);
+
+ ppu_command(d, 0x2aaa, 0x1000, ppu_banksize);
+ ppu_command(d, 0x5555, 0x1400, ppu_banksize);
+ ppu_command(d, 0x0000, 0x1800, ppu_banksize);
+ sunsoft5_write(d, 4, 0x0a);
+ sunsoft5_write(d, 5, 0x15);
+ sunsoft5_write(d, 6, 0);
+}
+
+function cpu_transfer(d, start, end, cpu_banksize)
+{
+ for(local i = start; i < end - 1; i += 1){
+ sunsoft5_write(d, 0xb, 3);
+ cpu_program(d, 0x8000, cpu_banksize);
+ }
+ cpu_program(d, 0xe000, cpu_banksize);
+}
+
+function ppu_transfer(d, start, end, ppu_banksize)
+{
+/* local mul = 1;
+ for(local i = start; i < end; i += mul){
+ for(local j = 0; j < mul; j++){
+ sunsoft5_write(d, j, i + j);
+ }
+ ppu_program(d, 0x0000, ppu_banksize * mul);
+ }*/
+ for(local i = start; i < end; i += 1){
+ sunsoft5_write(d, 4, i);
+ ppu_program(d, 0x1000, ppu_banksize);
+ }
+}
-/*\r
-Taito X1-005\r
-TFC-FM-5900 不動明王伝のみ Program ROM size は 2M\r
-\r
-Minelvaton Saga\r
-$7f00-$7f7f save RAM area\r
-$7f80-$7fff save RAM area, mirror\r
-*/\r
-board <- {\r
- mappernum = 80, ppu_ramfind = false, vram_mirrorfind = false,\r
- cpu_rom = {\r
- size_base = 1 * mega, size_max = 2 * mega,\r
- banksize = 0x2000\r
- },\r
- cpu_ram = {\r
- size_base = 0x100 * 0x20, size_max = 0x100 * 0x20,\r
- banksize = 0x2000\r
- }\r
- ppu_rom = {\r
- size_base = 1 * mega, size_max = 1 * mega,\r
- banksize = 0x2000 / 8 //0x0800*2 + 0x0400 * 4\r
- }\r
-};\r
-\r
-function cpu_dump(d, pagesize, banksize)\r
-{\r
- local i;\r
- for(i = 0; i < pagesize - 2; i += 2){\r
- cpu_write(d, 0x7efa, i);\r
- cpu_write(d, 0x7efc, i | 1);\r
- cpu_read(d, 0x8000, banksize * 2);\r
- }\r
- cpu_write(d, 0x7efe, i);\r
- cpu_read(d, 0xc000, banksize * 2);\r
-}\r
-\r
-function ppu_dump(d, pagesize, banksize)\r
-{\r
- for(local i = 0; i < pagesize; i += 8){\r
- local ar = [i, i|2, i|4, i|5, i|6, i|7];\r
- cpu_write(d, 0x7ef0, ar);\r
- ppu_read(d, 0x0000, banksize * 8);\r
- }\r
-}\r
-\r
-/*\r
-0x2000 byte のデータの offset 0x1f00-0x1f7f のみ有効\r
-*/\r
-function cpu_ram_access(d, pagesize, banksize)\r
-{\r
- cpu_write(d, 0x7ef8, 0xa3);\r
- for(local i = 0; i < 0x1f80; i += 0x80){\r
- cpu_ramrw(d, 0x7f00, 0x0080);\r
- }\r
- cpu_ramrw(d, 0x6000, 0x0080); //offset 0x1f80-0x1fff を捨てる\r
- cpu_write(d, 0x7ef8, 0x00);\r
-}\r
+/*
+Taito X1-005
+TFC-FM-5900 不動明王伝のみ Program ROM size は 2M
+
+Minelvaton Saga
+$7f00-$7f7f save RAM area
+$7f80-$7fff save RAM area, mirror
+*/
+board <- {
+ mappernum = 80, ppu_ramfind = false, vram_mirrorfind = false,
+ cpu_rom = {
+ size_base = 1 * mega, size_max = 2 * mega,
+ banksize = 0x2000
+ },
+ cpu_ram = {
+ size_base = 0x100 * 0x20, size_max = 0x100 * 0x20,
+ banksize = 0x2000
+ }
+ ppu_rom = {
+ size_base = 1 * mega, size_max = 1 * mega,
+ banksize = 0x2000 / 8 //0x0800*2 + 0x0400 * 4
+ }
+};
+
+function cpu_dump(d, pagesize, banksize)
+{
+ local i;
+ for(i = 0; i < pagesize - 2; i += 2){
+ cpu_write(d, 0x7efa, i);
+ cpu_write(d, 0x7efc, i | 1);
+ cpu_read(d, 0x8000, banksize * 2);
+ }
+ cpu_write(d, 0x7efe, i);
+ cpu_read(d, 0xc000, banksize * 2);
+}
+
+function ppu_dump(d, pagesize, banksize)
+{
+ for(local i = 0; i < pagesize; i += 8){
+ local ar = [i, i|2, i|4, i|5, i|6, i|7];
+ cpu_write(d, 0x7ef0, ar);
+ ppu_read(d, 0x0000, banksize * 8);
+ }
+}
+
+/*
+0x2000 byte のデータの offset 0x1f00-0x1f7f のみ有効
+*/
+function cpu_ram_access(d, pagesize, banksize)
+{
+ cpu_write(d, 0x7ef8, 0xa3);
+ for(local i = 0; i < 0x1f80; i += 0x80){
+ cpu_ramrw(d, 0x7f00, 0x0080);
+ }
+ cpu_ramrw(d, 0x6000, 0x0080); //offset 0x1f80-0x1fff を捨てる
+ cpu_write(d, 0x7ef8, 0x00);
+}
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