1 ; -*- coding: utf-8 -*-
3 ; Fast Forth For Texas Instrument MSP430FR5739
4 ; Tested on MSP-EXP430FR2355 launchpad
6 ; Copyright (C) <2018> <J.M. THOORENS>
8 ; This program is free software: you can redistribute it and/or modify
9 ; it under the terms of the GNU General Public License as published by
10 ; the Free Software Foundation, either version 3 of the License, or
11 ; (at your option) any later version.
13 ; This program is distributed in the hope that it will be useful,
14 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ; GNU General Public License for more details.
18 ; You should have received a copy of the GNU General Public License
19 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
21 ; ======================================================================
22 ; INIT MSP-EXP430FR2355 board
23 ; ======================================================================
28 ; "TXD" <--- P4.3 == UCA0TXD <-- UCA0TXDBUf
29 ; "RXD" ---> P4.2 == UCA0RXD --> UCA0RXDBUF
56 ; J3.23 - P1.4 A4 SEED
61 ; J3.28 - P1.1 A1 SEED
96 ; ======================================================================
97 ; MSP-EXP430FR2355 LAUNCHPAD <--> OUTPUT WORLD
98 ; ======================================================================
100 ; +--4k7-< DeepRST switch <-- GND
102 ; P4.3 - UCA1 TXD J101.6 - <-+-> RX UARTtoUSB bridge
103 ; P4.2 - UCA1 RXD J101.8 - <---- TX UARTtoUSB bridge
104 ; P2.0 - RTS J2.19 - ----> CTS UARTtoUSB bridge (TERMINAL4WIRES)
105 ; P2.1 - CTS J4.40 - <---- RTS UARTtoUSB bridge (TERMINAL5WIRES)
107 ; P1.2 - UCB0 SDA J1.10 - <---> SDA I2C Master_Slave
108 ; P1.3 - UCB0 SCL J1.9 - ----> SCL I2C Master_Slave
110 ; P2.2 - J2.18 - <---- TSSOP32236 (IR RC5)
112 ; P2.5 - J2.12 - ----> SD_CS (Card Select)
113 ; P4.4 - J2.13 - <---- SD_CD (Card Detect)
114 ; P4.5 - UCB1 CLK J1.7 - ----> SD_CLK
115 ; P4.7 - UCB1 SOMI J2.14 - <---- SD_SDO
116 ; P4.6 - UCB1 SIMO J2.15 - ----> SD_SDI
118 ; P6.0 - J4.39 - ----> SCL I2C Soft_Master
119 ; P6.1 - J4.38 - <---> SDA I2C Soft_Master
121 ; ----------------------------------------------------------------------
122 ; INIT order : WDT, GPIOs, FRAM, Clock, UARTs...
123 ; ----------------------------------------------------------------------
125 ; ----------------------------------------------------------------------
126 ; POWER ON RESET AND INITIALIZATION : LOCK PMM_LOCKLPM5
127 ; ----------------------------------------------------------------------
129 ; BIS #LOCKLPM5,&PM5CTL0 ; unlocked by WARM
131 ; ----------------------------------------------------------------------
132 ; POWER ON RESET AND INITIALIZATION : WATCHDOG TIMER A
133 ; ----------------------------------------------------------------------
136 MOV #WDTPW+WDTHOLD+WDTCNTCL,&WDTCTL ; stop WDT
138 ; ----------------------------------------------------------------------
139 ; POWER ON RESET AND INITIALIZATION : I/O
140 ; ----------------------------------------------------------------------
142 ; ----------------------------------------------------------------------
143 ; POWER ON RESET AND INITIALIZATION : PORT1/2
144 ; ----------------------------------------------------------------------
150 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
154 MOV #-1,&PAREN ; all inputs with pull resistors
155 BIS #00001h,&PADIR ; all pins as input else LED1 as output
156 MOV #0FFFEh,&PAOUT ; all pins with pullup resistors ekse LED1 = output low
159 ; P2.0 - RTS J2.19 - ----> CTS UARTtoUSB bridge (TERMINAL4WIRES)
160 ; P2.1 - CTS J4.40 - <---- RTS UARTtoUSB bridge (TERMINAL5WIRES)
162 .IFDEF TERMINAL4WIRES
163 ; RTS output must be wired to the CTS input of UART2USB bridge
164 ; configure RTS as output high to disable RX TERM during start FORTH
165 ; notice that this pin RTS may be permanently wired on SBWTCK (TEST) without disturbing SBW 2 wires programming
166 HANDSHAKOUT .equ P2OUT
168 RTS .equ 1 ; P2.0 bit position
170 BIS.B #1,&P2OUT ; P2.0 RTS as output high
172 .IFDEF TERMINAL5WIRES
174 ; CTS input must be wired to the RTS output of UART2USB bridge
175 ; configure CTS as input low
176 CTS .equ 2 ; P2.1 bit position
177 BIC.B #2,&P2DIR ; CTS input pull down resistor
179 .ENDIF ; TERMINAL5WIRES
181 .ENDIF ; TERMINAL4WIRES
183 ; SD_CS - P2.5 (Card Select)
189 ; ----------------------------------------------------------------------
190 ; POWER ON RESET AND INITIALIZATION : PORT3-4
191 ; ----------------------------------------------------------------------
197 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
200 MOV.B #-1,&P3OUT ; OUT1 for all pins
201 BIS.B #-1,&P3REN ; all pins with pull resistors
203 ; P4.2 - UCA1 RXD J101.8 - <---- TX UARTtoUSB bridge
204 ; P4.3 - UCA1 TXD J101.6 - <-+-> RX UARTtoUSB bridge
206 Deep_RST_IN .equ P4IN
207 Deep_RST .equ 8 ; = TX
212 ; P4.4 - J2.13 - <---- SD_CD (Card Detect)
216 ; P4.5 - UCB1 CLK J1.7 - ----> SD_CLK
217 ; P4.6 - UCB1 SIMO J2.15 - ----> SD_SDI
218 ; P4.7 - UCB1 SOMI J2.14 - <---- SD_SDO
220 SD_SEL .equ PBSEL0 ; to configure UCB1
221 SD_REN .equ PBREN ; to configure pullup resistors
222 SD_BUS .equ 0E000h ; pins P4.5 as UCA1CLK, P4.6 as UCA1SIMO & P4.7 as UCA1SOMI
225 ; ----------------------------------------------------------------------
226 ; POWER ON RESET AND INITIALIZATION : PORT5-6
227 ; ----------------------------------------------------------------------
229 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
233 ; LED2 - P6.6 (green)
235 BIS.B #0BFh,&P6REN ; all pins with pull up resistors else P6.6
237 MOV.B #0BFh,&P6OUT ; OUT high for all pins else P6.6
240 ; ----------------------------------------------------------------------
242 ; ----------------------------------------------------------------------
246 MOV.B #0A5h, &FRCTL0_H ; enable FRCTL0 access
247 MOV.B #10h, &FRCTL0 ; 1 waitstate @ 16 MHz
248 MOV.B #01h, &FRCTL0_H ; disable FRCTL0 access
253 MOV.B #0A5h, &FRCTL0_H ; enable FRCTL0 access
254 MOV.B #20h, &FRCTL0 ; 2 waitstate @ 24 MHz
255 MOV.B #01h, &FRCTL0_H ; disable FRCTL0 access
258 ; ----------------------------------------------------------------------
259 ; POWER ON RESET SYS config
260 ; ----------------------------------------------------------------------
263 ; BIC #1,&SYSCFG0 ; enable write program in FRAM
264 MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
266 ; ----------------------------------------------------------------------
267 ; POWER ON RESET AND INITIALIZATION : CLOCK SYSTEM
268 ; ----------------------------------------------------------------------
270 ; CS code for MSP430FR2355
272 ; to measure REFO frequency, output the ACLK on P1.1:
275 ; result : REFO = xx.xxx kHz
280 ; MOV #058h,&CSCTL0 ; preset DCO = measured value @ 0x180 (88)
281 ; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
282 MOV #1ED1h,&CSCTL0 ; preset MOD=31, DCO = measured value @ 0x180 (209)
283 MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
284 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
285 ; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
286 ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
287 ; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
288 ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
289 MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
290 ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
291 ; =====================================
294 .ELSEIF FREQUENCY = 1
296 ; MOV #100h,&CSCTL0 ; preset DCO = 256
297 ; MOV #00B1h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
298 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
299 MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
300 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
301 ; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
302 ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
303 MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
304 ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
305 ; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
306 ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
307 ; =====================================
310 .ELSEIF FREQUENCY = 2
312 ; MOV #100h,&CSCTL0 ; preset DCO = 256
313 ; MOV #00B3h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
314 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
315 MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
316 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
317 ; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
318 ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
319 MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
320 ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
321 ; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
322 ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
323 ; =====================================
326 .ELSEIF FREQUENCY = 4
328 ; MOV #100h,&CSCTL0 ; preset DCO = 256
329 ; MOV #00B5h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
330 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
331 MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
332 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
333 ; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
334 ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
336 MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
337 ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
339 ; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
340 ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
341 ; =====================================
344 .ELSEIF FREQUENCY = 8
346 ; MOV #100h,&CSCTL0 ; preset DCO = 256
347 ; MOV #00B7h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
348 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
349 MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
350 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
351 ; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
352 ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
353 ; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
354 ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
355 MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
356 ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
358 ; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
359 ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
361 ; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
362 ; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
364 ; =====================================
367 .ELSEIF FREQUENCY = 12
369 ; MOV #100h,&CSCTL0 ; preset DCO = 256
370 ; MOV #00B9h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
371 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
372 MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
373 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
374 ; MOV #016Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
375 ; fCOCLKDIV = 32768 x 364+1) = 12.960 MHz ; measured : 11.xxxMHz
376 ; MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
377 ; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
378 MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
379 ; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
380 ; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
381 ; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
382 ; =====================================
385 .ELSEIF FREQUENCY = 16
387 ; MOV #100h,&CSCTL0 ; preset DCO = 256
388 ; MOV #00BBh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
389 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
390 MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
391 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
392 ; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
393 ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
394 ; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
395 ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
396 MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
397 ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
398 ; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
399 ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
400 ; =====================================
403 .ELSEIF FREQUENCY = 20
405 ; MOV #100h,&CSCTL0 ; preset DCO = 256
406 ; MOV #00BDh,&CSCTL1 ; Set 20MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
407 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
408 MOV #00BCh,&CSCTL1 ; Set 20MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
409 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
410 ; MOV #0260h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=260h
411 ; fCOCLKDIV = 32768 x 608+1) = 19.956 MHz ; measured : 19.xxxMHz
412 ; MOV #0261h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=261h
413 ; fCOCLKDIV = 32768 x 609+1) = 19.988 MHz ; measured : 19.xxxMHz
414 MOV #0262h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=262h
415 ; fCOCLKDIV = 32768 x 610+1) = 20.021 MHz ; measured : 20.xxxMHz
416 ; MOV #0263h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=263h
417 ; fCOCLKDIV = 32768 x 611+1) = 20.054 MHz ; measured : 20.xxxMHz
418 ; =====================================
421 .ELSEIF FREQUENCY = 24
423 ; MOV #100h,&CSCTL0 ; preset DCO = 256
424 ; MOV #00BFh,&CSCTL1 ; Set 24MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
425 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
426 MOV #00BEh,&CSCTL1 ; Set 24MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
427 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
428 ; MOV #02DAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=2DAh
429 ; fCOCLKDIV = 32768 x 730+1) = 23.953 MHz ; measured : 23.xxxMHz
430 ; MOV #02DBh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=2DBh
431 ; fCOCLKDIV = 32768 x 731+1) = 23.986 MHz ; measured : 23.xxxMHz
432 MOV #02DCh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=2DCh
433 ; fCOCLKDIV = 32768 x 732+1) = 24.019 MHz ; measured : 23.xxxMHz
434 ; MOV #02DDh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=2DDh
435 ; fCOCLKDIV = 32768 x 733+1) = 24.051 MHz ; measured : 24.xxxMHz
436 ; =====================================
440 .error "bad frequency setting, only 0.5,1,2,4,8,12,16,20,24 MHz"
444 ; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
445 MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
447 BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
448 ; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
451 BIS &SYSRSTIV,&SAVE_SYSRSTIV; store volatile SYSRSTIV preserving a pending request for DEEP_RST
452 CMP #2,&SAVE_SYSRSTIV ; POWER ON ?
454 .word 0749h ; no RRUM #1,X --> wait anyway 250 ms because FLL lock time = 200 ms
455 ClockWaitX MOV #5209,Y ; wait 0.5s before starting after POR
457 ClockWaitY SUB #1,Y ;1
458 JNZ ClockWaitY ;2 5209x3 = 15625 cycles delay = 15.625ms @ 1MHz
459 SUB #1,X ; x 32 @ 1 MHZ = 500ms
460 JNZ ClockWaitX ; time to stabilize power source ( 500ms )
462 ;WAITFLL BIT #300h,&CSCTL7 ; wait FLL lock