1 ; -*- coding: utf-8 -*-
4 ; ======================================================================
5 ; MSP_EXP430FR5994 board
6 ; ======================================================================
8 ; J101 Target <---> eZ-FET
12 ; P2.1 UCA0_RX 8-7 <---- TX UARTtoUSB bridge
13 ; +--4k7-< DeepRST <-- GND
15 ; P2.0 UCA0_TX 6-5 <-+-> RX UARTtoUSB bridge
20 ; P5.6 - sw1 <--- LCD contrast + (finger :-)
21 ; P5.5 - sw2 <--- LCD contrast - (finger ;-)
29 ; P1.2/TA1.1/TA0CLK/COUT/A2/C2 <--- OUT IR_Receiver (1 TSOP32236)
30 ; P6.1/UCA3RXD/UCA3SOMI -------------------------> 4 LCD_RS
31 ; P6.0/UCA3TXD/UCA3SIMO -------------------------> 5 LCD_R/W
32 ; P6.2/UCA3CLK -------------------------> 6 LCD_EN0
33 ; P1.3/TA1.2/UCB0STE/A3/C3
36 ; P7.1/UCB2SOMI/UCB2SCL ---> SCL I2C MASTER/SLAVE
37 ; P7.0/UCB2SIMO/UCB2SDA <--> SDA I2C MASTER/SLAVE
42 ; P3.0/A12/C12 <------------------------> 11 LCD_DB4
43 ; P3.1/A13/C13 <------------------------> 12 LCD_DB5
44 ; P3.2/A14/C14 <------------------------> 13 LCD_DB6
45 ; P3.3/A15/C15 <------------------------> 14 LCD_DB7
46 ; P1.4/TB0.1/UCA0STE/A4/C4
47 ; P1.5/TB0.2/UCA0CLK/A5/C5 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
57 ; P2.6/TB0.1/UCA1RXD/UCA1SOMI
58 ; P2.5/TB0.0/UCA1TXD/UCA1SIMO
60 ; P4.2/A10 RTS ----> CTS UARTtoUSB bridge (optional hardware control flow)
61 ; P4.1/A9 CTS <---- RTS UARTtoUSB bridge (optional hardware control flow)
65 ; P5.7/UCA2STE/TA4.1/MCLK
69 ; P5.0/UCB1SIMO/UCB1SDA
70 ; P5.1/UCB1SOMI/UCB1SCL
72 ; P8.2 <--> SDA I2C SOFTWARE MASTER
73 ; P8.1 <--> SCL I2C SOFTWARE MASTER
76 ; P7.2/UCB2CLK <--- CD_SD
77 ; P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0 ---> SD_MOSI
78 ; P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0 <--- SD_MISO
80 ; P2.2/TB0.2/UCB0CLK ---> SD_CLK
91 ; -----------------------------------------------
93 ; -----------------------------------------------
95 ; <-------+---0V0----------> 1 LCD_Vss
96 ; >------ | --3V6-----+----> 2 LCD_Vdd
103 ; TB0.2 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
104 ; -------------------------> 4 LCD_RS
105 ; -------------------------> 5 LCD_R/W
106 ; -------------------------> 6 LCD_EN0
107 ; <------------------------> 11 LCD_DB4
108 ; <------------------------> 12 LCD_DB5
109 ; <------------------------> 13 LCD_DB5
110 ; <------------------------> 14 LCD_DB7
112 ; ----------------------------------------------------------------------
113 ; POWER ON RESET AND INITIALIZATION : I/O
114 ; ----------------------------------------------------------------------
115 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
116 ; ----------------------------------------------------------------------
117 ; POWER ON RESET AND INITIALIZATION : PORT1/2
118 ; ----------------------------------------------------------------------
120 ; PORT1 FastForth usage
130 ; PORTx default wanted state : pins as input with pullup resistor
132 ; BIS #3,&PADIR ; all pins 0 as input else LEDs
133 ; MOV #0FFFCh,&PAOUT ; all pins high else LEDs
134 ; BIC #3,&PAREN ; all pins 1 with pull resistors else LEDs
136 BIS #-1,&PAREN ; all pins 1 with pull up/down resistors
137 MOV #0FFFCh,&PAOUT ; all pins high else LEDs
139 ; PORT2 FastForth usage
140 .IFDEF UCB0_SD ; see device.inc
141 SD_SEL .equ PASEL1 ; to configure UCB0
142 SD_REN .equ PAREN ; to configure pullup resistors
143 BUS_SD .equ 04C0h ; pins P2.2 as UCB0CLK, P1.6 as UCB0SIMO & P1.7 as UCB0SOMI
146 .IFDEF UCA0_TERM ; see device.inc
147 ; P2.0 UCA0-TXD --> USB2UART RXD
148 ; P2.1 UCA0-RXD <-- USB2UART TXD
152 TXD .equ 1 ; P2.0 = TXD
153 RXD .equ 2 ; P2.1 = RXD
157 ; ----------------------------------------------------------------------
158 ; POWER ON RESET AND INITIALIZATION : PORT3/4
159 ; ----------------------------------------------------------------------
161 ; PORT3 FastForth usage
163 ; PORT4 FastForth usage
166 CS_SD .equ 1 ; P4.0 SD_card Chip Select
169 HANDSHAKOUT .equ P4OUT
173 MOV #-1,&PBREN ; REN1 all pullup resistors
176 .IFDEF TERMINAL4WIRES
177 ; RTS output is wired to the CTS input of UART2USB bridge
178 ; configure RTS as output high to disable RX TERM during start FORTH
179 BIS.B #RTS,&P4DIR ; RTS as output high
180 .IFDEF TERMINAL5WIRES
181 ; CTS input must be wired to the RTS output of UART2USB bridge
182 ; configure CTS as input low (true) to avoid lock when CTS is not wired
183 BIC.B #CTS,&P4OUT ; CTS input pulled down
184 .ENDIF ; TERMINAL5WIRES
185 .ENDIF ; TERMINAL4WIRES
187 ; ----------------------------------------------------------------------
188 ; POWER ON RESET AND INITIALIZATION : PORT5/6
189 ; ----------------------------------------------------------------------
191 ; PORT5 FastForth usage
194 SW1_IN .set P5IN ; port
195 SW1 .set 040h ; P5.6 bit position
197 SW2_IN .set P5IN ; port
198 SW2 .set 020h ; P5.5 bit position
200 ; PORT6 FastForth usage
203 ; PORTx default wanted state : pins as input with pullup resistor
205 MOV #-1,&PCOUT ; all pins output high
206 BIS #-1,&PCREN ; all pins with pull resistors
208 ; ----------------------------------------------------------------------
209 ; POWER ON RESET AND INITIALIZATION : PORT7/8
210 ; ----------------------------------------------------------------------
212 ; PORT7 FastForth usage
213 .IFDEF UCB2_TERM ; see device.inc
214 ; P7.1/UCB2SOMI/UCB2SCL ---> SCL I2C MASTER/SLAVE
215 ; P7.0/UCB2SIMO/UCB2SDA <--> SDA I2C MASTER/SLAVE
224 CD_SD .equ 4 ; P7.2 SD_Card Card Detect
227 ; PORT8 FastForth usage
230 ; PORTx default wanted state : pins as input with pullup resistor
232 MOV #-1,&PDOUT ; all pins output high
233 BIS #-1,&PDREN ; all pins with pull resistors
235 ; ----------------------------------------------------------------------
236 ; POWER ON RESET AND INITIALIZATION : PORTJ
237 ; ----------------------------------------------------------------------
239 ; PORTJ FastForth usage
241 ; PORTx default wanted state : pins as input with pullup resistor
243 MOV.B #-1,&PJREN ; enable pullup/pulldown resistors
244 BIS.B #-1,&PJOUT ; pullup resistors
246 ; ----------------------------------------------------------------------
248 ; ----------------------------------------------------------------------
250 MOV.B #0A5h, &FRCTL0_H ; enable FRCTL0 access
251 MOV.B #10h, &FRCTL0 ; 1 waitstate @ 16 MHz
252 MOV.B #01h, &FRCTL0_H ; disable FRCTL0 access
254 ; ----------------------------------------------------------------------
255 ; POWER ON RESET AND INITIALIZATION : CLOCK SYSTEM
256 ; ----------------------------------------------------------------------
258 ; DCOCLK: Internal digitally controlled oscillator (DCO).
260 MOV.B #CSKEY,&CSCTL0_H ; Unlock CS registers
262 ; MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 8MHZ DCO setting (default value)
263 MOV #DIVA_0 + DIVS_32 + DIVM_32,&CSCTL3
265 .ELSEIF FREQUENCY = 0.5
266 MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
267 MOV #DIVA_2 + DIVS_2 + DIVM_2,&CSCTL3 ; set all dividers as 2
269 .ELSEIF FREQUENCY = 1
270 MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
271 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
273 .ELSEIF FREQUENCY = 2
274 MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
275 MOV #DIVA_0 + DIVS_2 + DIVM_2,&CSCTL3
277 .ELSEIF FREQUENCY = 4
278 MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
279 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
281 .ELSEIF FREQUENCY = 8
282 ; MOV #DCOFSEL2+DCOFSEL1,&CSCTL1 ; Set 8MHZ DCO setting (default value)
283 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
285 .ELSEIF FREQUENCY = 12
286 MOV #DCORSEL+DCOFSEL2+DCOFSEL1,&CSCTL1 ; Set 24MHZ DCO setting
287 MOV #DIVA_0 + DIVS_2 + DIVM_2,&CSCTL3 ;
289 .ELSEIF FREQUENCY = 16
290 MOV #DCORSEL+DCOFSEL2,&CSCTL1 ; Set 16MHZ DCO setting
291 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
294 .error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
298 MOV #SELA_LFXCLK+SELS_DCOCLK+SELM_DCOCLK,&CSCTL2
300 MOV #SELA_VLOCLK+SELS_DCOCLK+SELM_DCOCLK,&CSCTL2
302 MOV.B #1, &CSCTL0_H ; Lock CS Registers
304 MOV #64,X ; 64* 3 ms = 192 ms delay (by default of specification)
305 ClockWaitX MOV &FREQ_KHZ,Y ;
306 ClockWaitY SUB #1,Y ;1
307 JNZ ClockWaitY ;2 FREQ_KHZ x 3~ ==> 3ms
311 ; ----------------------------------------------------------------------
312 ; POWER ON RESET AND INITIALIZATION : RTC_C REGISTERS
313 ; ----------------------------------------------------------------------
314 .IFDEF LF_XTAL ; see device.inc
315 ; LFXIN : PJ.4, LFXOUT : PJ.5
316 BIS.B #010h,&PJSEL0 ; SEL0 for only LFXIN
317 MOV.B #0A5h,&RTCCTL0_H ; unlock RTC_C
318 BIC.B #RTCHOLD,&RTCCTL1 ; Clear RTCHOLD = start RTC_C
320 ; ----------------------------------------------------------------------
321 ; POWER ON RESET AND INITIALIZATION : REF
322 ; ----------------------------------------------------------------------
324 ; ----------------------------------------------------------------------
325 ; POWER ON RESET AND INITIALIZATION next : see RESET in forthMSP430.asm
326 ; ----------------------------------------------------------------------