MOV @IP+,PC
;-------------------------------------------------------------------------------
+; COMPARAISON OPERATIONS
+;-------------------------------------------------------------------------------
+ FORTHWORD "0<"
+; https://forth-standard.org/standard/core/Zeroless
+; 0< n -- flag true if TOS negative
+ ADD TOS,TOS ;1 set carry if TOS negative
+ SUBC TOS,TOS ;1 TOS=-1 if carry was clear
+EQUALTRUE XOR #-1,TOS ;1 TOS=-1 if carry was set
+ MOV @IP+,PC ;
+
+; https://forth-standard.org/standard/core/ZeroEqual
+; 0= n/u -- flag return true if TOS=0
+ FORTHWORD "0="
+ SUB #1,TOS ; borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS ; TOS=-1 if borrow was set
+ MOV @IP+,PC
+
+ FORTHWORD "0<>"
+; https://forth-standard.org/standard/core/Zerone
+; 0<> n/u -- flag return true if TOS<>0
+ SUB #1,TOS ; 1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS ; 1 TOS=-1 if borrow was set
+ XOR #-1,TOS ; 1
+ MOV @IP+,PC
+
+ FORTHWORD "="
+; https://forth-standard.org/standard/core/Equal
+; = x1 x2 -- flag test x1=x2
+EQUAL SUB @PSP+,TOS ;2
+ JZ EQUALTRUE ;2 flag Z will be = 0
+ AND #0,TOS ;1 flag Z = 1
+ MOV @IP+,PC ;4
+
+ .IFNDEF LESS
+ FORTHWORD "<"
+;https://forth-standard.org/standard/core/less
+;C < n1 n2 -- flag test n1<n2, signed
+LESS SUB @PSP+,TOS ;1 TOS=n2-n1
+ JZ LESSEND ;2 flag Z = 1
+ JL TOSFALSE ;2 signed jump
+TOSTRUE MOV #-1,TOS ;1 flag Z = 0
+LESSEND MOV @IP+,PC ;4
+ .ENDIF
+
+ FORTHWORD ">"
+;https://forth-standard.org/standard/core/more
+;C > n1 n2 -- flag test n1>n2, signed
+MORE SUB @PSP+,TOS ;2 TOS=n2-n1
+ JL TOSTRUE ;2 --> +5
+TOSFALSE AND #0,TOS ;1 flag Z = 1
+ MOV @IP+,PC ;4
+
+ .IFNDEF ULESS
+; https://forth-standard.org/standard/core/Uless
+; U< u1 u2 -- flag test u1<u2, unsigned
+ FORTHWORD "U<"
+ULESS SUB @PSP+,TOS ; 2 u2-u1
+ JZ UTOSEND
+ JNC UTOSFALSE
+UTOSTRUE MOV #-1,TOS ;1 flag Z = 0
+UTOSEND MOV @IP+,PC ;4
+
+; https://forth-standard.org/standard/core/Umore
+; U> n1 n2 -- flag
+ FORTHWORD "U>"
+ SUB @PSP+,TOS ; 2
+ JNC UTOSTRUE ; 2 flag = true, Z = 0
+UTOSFALSE AND #0,TOS ;1 flag Z = 1
+ MOV @IP+,PC ;4
+ .ENDIF
+
+;-------------------------------------------------------------------------------
+; STACK OPERATIONS
+;-------------------------------------------------------------------------------
+ .IFNDEF QDUP
+; https://forth-standard.org/standard/core/DUP
+; DUP x -- x x duplicate top of stack
+ FORTHWORD "DUP"
+QDUPNEXT SUB #2,PSP ; 2 push old TOS..
+ MOV TOS,0(PSP) ; 3 ..onto stack
+QDUPEND MOV @IP+,PC ; 4
+
+; https://forth-standard.org/standard/core/qDUP
+; ?DUP x -- 0 | x x DUP if nonzero
+ FORTHWORD "?DUP"
+QDUP CMP #0,TOS
+ JZ QDUPEND
+ JNZ QDUPNEXT
+ .ENDIF
+
+; https://forth-standard.org/standard/core/SWAP
+; SWAP x1 x2 -- x2 x1 swap top two items
+ FORTHWORD "SWAP"
+ MOV @PSP,W ; 2
+ MOV TOS,0(PSP) ; 3
+ MOV W,TOS ; 1
+ MOV @IP+,PC ; 4
+
+ FORTHWORD "DROP"
+; https://forth-standard.org/standard/core/DROP
+; DROP x -- drop top of stack
+ MOV @PSP+,TOS ; 2
+ MOV @IP+,PC ; 4
+
+ .IFNDEF OVER
+;https://forth-standard.org/standard/core/OVER
+;C OVER x1 x2 -- x1 x2 x1
+ FORTHWORD "OVER"
+OVER MOV TOS,-2(PSP) ; 3 -- x1 (x2) x2
+ MOV @PSP,TOS ; 2 -- x1 (x2) x1
+ SUB #2,PSP ; 1 -- x1 x2 x1
+ MOV @IP+,PC ; 4
+ .ENDIF
+
+ FORTHWORD "NIP"
+; https://forth-standard.org/standard/core/NIP
+; NIP x1 x2 -- x2 Drop the first item below the top of stack
+ ADD #2,PSP ; 1
+ MOV @IP+,PC ; 4
+
+ FORTHWORD "ROT"
+;https://forth-standard.org/standard/core/ROT
+;C ROT x1 x2 x3 -- x2 x3 x1
+ MOV @PSP,W ; 2 fetch x2
+ MOV TOS,0(PSP) ; 3 store x3
+ MOV 2(PSP),TOS ; 3 fetch x1
+ MOV W,2(PSP) ; 3 store x2
+ MOV @IP+,PC ; 4
+
+; https://forth-standard.org/standard/core/Rfrom
+; R> -- x R: x -- pop from return stack
+ FORTHWORD "R>"
+ SUB #2,PSP ; 1
+ MOV TOS,0(PSP) ; 3
+ MOV @RSP+,TOS ; 2
+ MOV @IP+,PC ; 4
+
+ FORTHWORD "R@"
+;https://forth-standard.org/standard/core/RFetch
+;C R@ -- x R: x -- x fetch from rtn stk
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV @RSP,TOS
+ MOV @IP+,PC
+
+ .IFNDEF TOR
+; https://forth-standard.org/standard/core/toR
+; >R x -- R: -- x push to return stack
+ FORTHWORD ">R"
+TOR PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+; https://forth-standard.org/standard/core/TUCK
+; TUCK ( x1 x2 -- x2 x1 x2 )
+ FORTHWORD "TUCK"
+ mDOCOL
+ .word SWAP,OVER,EXIT
+
+; https://forth-standard.org/standard/core/DEPTH
+; DEPTH -- +n number of items on stack, must leave 0 if stack empty
+ FORTHWORD "DEPTH"
+ MOV #DEPTH,PC
+
+;-------------------------------------------------------------------------------
; RETURN from high level word
;-------------------------------------------------------------------------------
FORTHWORD "EXIT"
; https://forth-standard.org/standard/core/EXIT
-; EXIT -- exit a colon definition; CALL #EXIT performs ASMtoFORTH (10 cycles)
+; EXIT -- exit a colon definition; CALL #EXIT performs mASM2FORTH (10 cycles)
; JMP #EXIT performs EXIT
MOV @RSP+,IP ; 2 pop previous IP (or next PC) from return stack
MOV @IP+,PC ; 4 = NEXT
; 6 (ITC-2)
+ .IFNDEF SPACE
;https://forth-standard.org/standard/core/SPACE
;C SPACE -- output a space
FORTHWORD "SPACE"
SPACE SUB #2,PSP ;1
MOV TOS,0(PSP) ;3
MOV #20h,TOS ;2
- JMP EMIT ;17~ 23~
+ MOV #EMIT,PC ;17~ 23~
;https://forth-standard.org/standard/core/SPACES
;C SPACES n -- output n spaces
PUSH IP
MOV #SPACESNEXT,IP
JMP SPACE ;25~
-SPACESNEXT .word $+2
+SPACESNEXT mNEXTADR
SUB #2,IP ;1
SUB #1,TOS ;1
JNZ SPACE ;25~ ==> 27~ by space ==> 2.963 MBds @ 8 MHz
MOV @RSP+,IP ;
SPACESNEXT2 MOV @PSP+,TOS ; -- drop n
- MOV @IP+,PC ;
+ MOV @IP+,PC ;
+ .ENDIF
+
+ .IFNDEF CR
+ FORTHWORD "CR"
+; https://forth-standard.org/standard/core/CR
+; CR -- send CR to the output device
+CR MOV @PC+,PC
+ .word BODYCR
+BODYCR mDOCOL ; send CR+LF to the default output device
+ .word LIT,0Dh,EMIT
+ .word LIT,0Ah,EMIT
+ .word EXIT
+ .ENDIF
+
+;-------------------------------------------------------------------------------
+; ARITHMETIC OPERATIONS
+;-------------------------------------------------------------------------------
+ .IFNDEF ANDD
+;https://forth-standard.org/standard/core/AND
+;C AND x1 x2 -- x3 logical AND
+ FORTHWORD "AND"
+ANDD AND @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+;https://forth-standard.org/standard/core/OR
+;C OR x1 x2 -- x3 logical OR
+ FORTHWORD "OR"
+ORR BIS @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/XOR
+;C XOR x1 x2 -- x3 logical XOR
+ FORTHWORD "XOR"
+XORR XOR @PSP+,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/INVERT
+;C INVERT x1 -- x2 bitwise inversion
+ FORTHWORD "INVERT"
+ XOR #-1,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/LSHIFT
+;C LSHIFT x1 u -- x2 logical L shift u places
+ FORTHWORD "LSHIFT"
+LSHIFT MOV @PSP+,W
+ AND #1Fh,TOS ; no need to shift more than 16
+ JZ LSH_X
+LSH_1 ADD W,W
+ SUB #1,TOS
+ JNZ LSH_1
+LSH_X MOV W,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/RSHIFT
+;C RSHIFT x1 u -- x2 logical R shift u places
+ FORTHWORD "RSHIFT"
+RSHIFT MOV @PSP+,W
+ AND #1Fh,TOS ; no need to shift more than 16
+ JZ RSH_X
+RSH_1 BIC #1,SR ; CLRC
+ RRC W
+ SUB #1,TOS
+ JNZ RSH_1
+RSH_X MOV W,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/TwoTimes
+;C 2* x1 -- x2 arithmetic left shift
+ FORTHWORD "2*"
+TWOTIMES ADD TOS,TOS
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/TwoDiv
+;C 2/ x1 -- x2 arithmetic right shift
+ FORTHWORD "2/"
+TWODIV RRA TOS
+ MOV @IP+,PC
+
+ .IFNDEF MAX
+;https://forth-standard.org/standard/core/MAX
+;C MAX n1 n2 -- n3 signed maximum
+ FORTHWORD "MAX"
+MAX CMP @PSP,TOS ; n2-n1
+ JL SELn1 ; n2<n1
+SELn2 ADD #2,PSP
+ MOV @IP+,PC
+
+;https://forth-standard.org/standard/core/MIN
+;C MIN n1 n2 -- n3 signed minimum
+ FORTHWORD "MIN"
+MIN CMP @PSP,TOS ; n2-n1
+ JL SELn2 ; n2<n1
+SELn1 MOV @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
+ FORTHWORD "1+"
+; https://forth-standard.org/standard/core/OnePlus
+; 1+ n1/u1 -- n2/u2 add 1 to TOS
+ ADD #1,TOS
+ MOV @IP+,PC
+
+ FORTHWORD "1-"
+; https://forth-standard.org/standard/core/OneMinus
+; 1- n1/u1 -- n2/u2 subtract 1 from TOS
+ SUB #1,TOS
+ MOV @IP+,PC
+
+ FORTHWORD "+"
+;https://forth-standard.org/standard/core/Plus
+;C + n1/u1 n2/u2 -- n3/u3 add n1+n2
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/Minus
+; - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
+ FORTHWORD "-"
+ SUB @PSP+,TOS ; 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS ; 1
+ ADD #1,TOS ; 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
.IFDEF MPY
ADD #1,0(PSP) ;
u1n2MSTAR CMP #0,TOS ; n2 <= -1 ?
JGE u1u2MSTAR ; no
- XOR #-1,TOS ; y: n2 --> u2
+ XOR #-1,TOS ; y: n2 --> u2
ADD #1,TOS ;
u1u2MSTAR PUSHM #2,IP ; PUSHM IP,S
- ASMtoFORTH
+ mASM2FORTH
.word UMSTAR ; UMSTAR use S,T,W,X,Y
- .word $+2
+ mNEXTADR
POPM #2,IP ; POPM S,IP
CMP #0,S ; result > -1 ?
JGE MSTARend ; yes
UMSLASHMOD PUSH #DROP ;3 as return address for MU/MOD
MOV #MUSMOD,PC
+ .IFNDEF FLOORED_DIVISION
;https://forth-standard.org/standard/core/SMDivREM
;C SM/REM d1lo d1hi n2 -- n3 n4 symmetric signed div
FORTHWORD "SM/REM"
SMSLASHREMnrnq ; -- nr nq S=divisor
MOV @IP+,PC ;4 34 words
+ .ELSE ; FLOORED_DIVISION
;https://forth-standard.org/standard/core/FMDivMOD
;C FM/MOD d1 n1 -- r q floored signed div'n
FORTHWORD "FM/MOD"
-FMSLASHMOD PUSH IP
- MOV #FMSLASHMOD1,IP
- JMP SMSLASHREM
-FMSLASHMOD1 .word $+2 ; -- remainder quotient S=divisor
+FMSLASHMOD MOV TOS,S ;1 S=divisor
+ MOV @PSP,T ;2 T=rem_sign
+ CMP #0,TOS ;1 n2 >= 0 ?
+ JGE d1u2FMSLASHMOD ;2 yes
+ XOR #-1,TOS ;1
+ ADD #1,TOS ;1
+d1u2FMSLASHMOD ; -- d1 u2
+ CMP #0,0(PSP) ;3 d1hi >= 0 ?
+ JGE ud1u2FMSLASHMOD ;2 yes
+ XOR #-1,2(PSP) ;4 d1lo
+ XOR #-1,0(PSP) ;4 d1hi
+ ADD #1,2(PSP) ;4 d1lo+1
+ ADDC #0,0(PSP) ;4 d1hi+C
+ud1u2FMSLASHMOD ; -- ud1 u2
+ PUSHM #2,S ;4 PUSHM S,T
+ CALL #MUSMOD
+ MOV @PSP+,TOS
+ POPM #2,S ;4 POPM T,S
+ CMP #0,T ;1 -- ur uq T=rem_sign>=0?
+ JGE FMSLASHMODnruq ;2 yes
+ XOR #-1,0(PSP) ;3
+ ADD #1,0(PSP) ;3
+FMSLASHMODnruq
+ XOR S,T ;1 S=divisor T=quot_sign
+ CMP #0,T ;1 -- nr uq T=quot_sign>=0?
+ JGE FMSLASHMODnrnq ;2 yes
+NEGAT XOR #-1,TOS ;1
+ ADD #1,TOS ;1
+FMSLASHMODnrnq ; -- nr nq S=divisor
+
CMP #0,0(PSP) ;
JZ FMSLASHMODEND
CMP #1,TOS ; quotient < 1 ?
SUB #1,TOS ; decrement quotient
FMSLASHMODEND
MOV @RSP+,IP
- MOV @IP+,PC ;
+ MOV @IP+,PC ;
+ .ENDIF
;https://forth-standard.org/standard/core/NEGATE
;C NEGATE x1 -- x2 two's complement
FORTHWORD "NEGATE"
- JMP NEGAT
+ JMP NEGAT
;https://forth-standard.org/standard/core/ABS
;C ABS n1 -- +n2 absolute value
FORTHWORD "ABS"
CMP #0,TOS ; 1
- JN NEGAT
+ JN NEGAT
MOV @IP+,PC
;https://forth-standard.org/standard/core/Times
;C /MOD n1 n2 -- n3 n4 signed divide/rem'dr
FORTHWORD "/MOD"
SLASHMOD mDOCOL
- .word TOR,STOD,RFROM,FMSLASHMOD,EXIT
+ .word TOR,STOD,RFROM
+ .IFNDEF FLOORED_DIVISION
+ .word SMSLASHREM
+ .ELSE
+ .word FMSLASHMOD
+ .ENDIF
+ .word EXIT
;https://forth-standard.org/standard/core/Div
;C / n1 n2 -- n3 signed divide
FORTHWORD "/"
SLASH mDOCOL
- .word TOR,STOD,RFROM,FMSLASHMOD,NIP,EXIT
+ .word TOR,STOD,RFROM
+ .IFNDEF FLOORED_DIVISION
+ .word SMSLASHREM
+ .ELSE
+ .word FMSLASHMOD
+ .ENDIF
+ .word NIP,EXIT
;https://forth-standard.org/standard/core/MOD
;C MOD n1 n2 -- n3 signed remainder
FORTHWORD "MOD"
MODD mDOCOL
- .word TOR,STOD,RFROM,FMSLASHMOD,DROP,EXIT
+ .word TOR,STOD,RFROM
+ .IFNDEF FLOORED_DIVISION
+ .word SMSLASHREM
+ .ELSE
+ .word FMSLASHMOD
+ .ENDIF
+ .word DROP,EXIT
;https://forth-standard.org/standard/core/TimesDivMOD
;C */MOD n1 n2 n3 -- n4 n5 n1*n2/n3, rem"
FORTHWORD "*/MOD"
SSMOD mDOCOL
- .word TOR,MSTAR,RFROM,FMSLASHMOD,EXIT
+ .word TOR,MSTAR,RFROM
+ .IFNDEF FLOORED_DIVISION
+ .word SMSLASHREM
+ .ELSE
+ .word FMSLASHMOD
+ .ENDIF
+ .word EXIT
;https://forth-standard.org/standard/core/TimesDiv
;C */ n1 n2 n3 -- n4 n1*n2/n3
FORTHWORD "*/"
STARSLASH mDOCOL
- .word TOR,MSTAR,RFROM,FMSLASHMOD,NIP,EXIT
-
-
-
-;https://forth-standard.org/standard/core/ALIGNED
-;C ALIGNED addr -- a-addr align given addr
- FORTHWORD "ALIGNED"
-ALIGNED BIT #1,TOS
- ADDC #0,TOS
- MOV @IP+,PC
-
-;https://forth-standard.org/standard/core/ALIGN
-;C ALIGN -- align HERE
- FORTHWORD "ALIGN"
-ALIGNN BIT #1,&DDP ; 3
- ADDC #0,&DDP ; 4
- MOV @IP+,PC
-
-;https://forth-standard.org/standard/core/CHARS
-;C CHARS n1 -- n2 chars->adrs units
- FORTHWORD "CHARS"
- MOV @IP+,PC
-
-;https://forth-standard.org/standard/core/CHARPlus
-;C CHAR+ c-addr1 -- c-addr2 add char size
- FORTHWORD "CHAR+"
- ADD #1,TOS
- MOV @IP+,PC
-
-;https://forth-standard.org/standard/core/CELLS
-;C CELLS n1 -- n2 cells->adrs units
- FORTHWORD "CELLS"
- ADD TOS,TOS
- MOV @IP+,PC
-
-;https://forth-standard.org/standard/core/CELLPlus
-;C CELL+ a-addr1 -- a-addr2 add cell size
- FORTHWORD "CELL+"
- ADD #2,TOS
- MOV @IP+,PC
+ .word TOR,MSTAR,RFROM
+ .IFNDEF FLOORED_DIVISION
+ .word SMSLASHREM
+ .ELSE
+ .word FMSLASHMOD
+ .ENDIF
+ .word NIP,EXIT
;----------------------------------------------------------------------
; DOUBLE OPERATORS
FORTHWORD "S>D"
STOD SUB #2,PSP
MOV TOS,0(PSP)
- JMP ZEROLESS
+ MOV #ZEROLESS,PC
; https://forth-standard.org/standard/core/TwoFetch
; 2@ a-addr -- x1 x2 fetch 2 cells ; the lower address will appear on top of stack
MOV @PSP+,TOS
MOV @IP+,PC
+ .IFNDEF TWODUP
+; https://forth-standard.org/standard/core/TwoDUP
+; 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
+ FORTHWORD "2DUP"
+TWODUP MOV TOS,-2(PSP) ; 3
+ MOV @PSP,-4(PSP) ; 4
+ SUB #4,PSP ; 1
+ MOV @IP+,PC ; 4
+ .ENDIF
+
; https://forth-standard.org/standard/core/TwoDROP
; 2DROP x1 x2 -- drop 2 cells
FORTHWORD "2DROP"
MOV 6(PSP),TOS ; -- x1 x2 x3 x4 x1 x2
MOV @IP+,PC
+;-------------------------------------------------------------------------------
+; MEMORY OPERATIONS
+;-------------------------------------------------------------------------------
+ .IFNDEF FETCH
+;https://forth-standard.org/standard/core/Fetch
+; C@ c-addr -- word fetch word from memory
+ FORTHWORD "@"
+FETCH MOV @TOS,TOS ;2
+ MOV @IP+,PC ;4
+ .ENDIF
+
+ .IFNDEF STORE
+;https://forth-standard.org/standard/core/Store
+; C! word c-addr -- store word in memory
+ FORTHWORD "!"
+STORE MOV @PSP+,0(TOS) ;4
+ MOV @PSP+,TOS ;2
+ MOV @IP+,PC
+ .ENDIF
+
+ .IFNDEF CFETCH
;https://forth-standard.org/standard/core/CFetch
; C@ c-addr -- char fetch char from memory
FORTHWORD "C@"
CFETCH MOV.B @TOS,TOS ;2
MOV @IP+,PC ;4
+ .ENDIF
+ .IFNDEF CSTORE
;https://forth-standard.org/standard/core/CStore
; C! char c-addr -- store char in memory
FORTHWORD "C!"
ADD #1,PSP ;1
MOV @PSP+,TOS ;2
MOV @IP+,PC
+ .ENDIF
+ .IFNDEF CCOMMA
;https://forth-standard.org/standard/core/CComma
; C, char -- append char
FORTHWORD "C,"
-CCOMMA MOV &DDP,W
+CCOMMA MOV &DP,W
MOV.B TOS,0(W)
- ADD #1,&DDP
+ ADD #1,&DP
MOV @PSP+,TOS
MOV @IP+,PC
+ .ENDIF
-;https://forth-standard.org/standard/core/AND
-;C AND x1 x2 -- x3 logical AND
- FORTHWORD "AND"
-ANDD AND @PSP+,TOS
+;https://forth-standard.org/standard/core/PlusStore
+;C +! n/u a-addr -- add to memory
+ FORTHWORD "+!"
+PLUSSTORE ADD @PSP+,0(TOS)
+ MOV @PSP+,TOS
MOV @IP+,PC
-;https://forth-standard.org/standard/core/OR
-;C OR x1 x2 -- x3 logical OR
- FORTHWORD "OR"
-ORR BIS @PSP+,TOS
+;https://forth-standard.org/standard/core/ALIGNED
+;C ALIGNED addr -- a-addr align given addr
+ FORTHWORD "ALIGNED"
+ALIGNED BIT #1,TOS
+ ADDC #0,TOS
MOV @IP+,PC
-;https://forth-standard.org/standard/core/XOR
-;C XOR x1 x2 -- x3 logical XOR
- FORTHWORD "XOR"
-XORR XOR @PSP+,TOS
+;https://forth-standard.org/standard/core/ALIGN
+;C ALIGN -- align HERE
+ FORTHWORD "ALIGN"
+ALIGNN BIT #1,&DP ; 3
+ ADDC #0,&DP ; 4
MOV @IP+,PC
-;https://forth-standard.org/standard/core/INVERT
-;C INVERT x1 -- x2 bitwise inversion
- FORTHWORD "INVERT"
- XOR #-1,TOS
+;https://forth-standard.org/standard/core/CHARS
+;C CHARS n1 -- n2 chars->adrs units
+ FORTHWORD "CHARS"
MOV @IP+,PC
-;https://forth-standard.org/standard/core/LSHIFT
-;C LSHIFT x1 u -- x2 logical L shift u places
- FORTHWORD "LSHIFT"
-LSHIFT MOV @PSP+,W
- AND #1Fh,TOS ; no need to shift more than 16
- JZ LSH_X
-LSH_1 ADD W,W
- SUB #1,TOS
- JNZ LSH_1
-LSH_X MOV W,TOS
+;https://forth-standard.org/standard/core/CHARPlus
+;C CHAR+ c-addr1 -- c-addr2 add char size
+ FORTHWORD "CHAR+"
+ ADD #1,TOS
MOV @IP+,PC
-;https://forth-standard.org/standard/core/RSHIFT
-;C RSHIFT x1 u -- x2 logical R shift u places
- FORTHWORD "RSHIFT"
-RSHIFT MOV @PSP+,W
- AND #1Fh,TOS ; no need to shift more than 16
- JZ RSH_X
-RSH_1 BIC #1,SR ; CLRC
- RRC W
- SUB #1,TOS
- JNZ RSH_1
-RSH_X MOV W,TOS
+;https://forth-standard.org/standard/core/CELLS
+;C CELLS n1 -- n2 cells->adrs units
+ FORTHWORD "CELLS"
+ ADD TOS,TOS
MOV @IP+,PC
-;https://forth-standard.org/standard/core/TwoTimes
-;C 2* x1 -- x2 arithmetic left shift
- FORTHWORD "2*"
-TWOTIMES ADD TOS,TOS
+;https://forth-standard.org/standard/core/CELLPlus
+;C CELL+ a-addr1 -- a-addr2 add cell size
+ FORTHWORD "CELL+"
+ ADD #2,TOS
MOV @IP+,PC
-;https://forth-standard.org/standard/core/TwoDiv
-;C 2/ x1 -- x2 arithmetic right shift
- FORTHWORD "2/"
-TWODIV RRA TOS
+; ------------------------------------------------------------------------------
+; CONTROL STRUCTURES
+; ------------------------------------------------------------------------------
+; THEN and BEGIN compile nothing
+; DO compile one word
+; IF, ELSE, AGAIN, UNTIL, WHILE, REPEAT, LOOP & +LOOP compile two words
+; LEAVE compile three words
+
+ FORTHWORDIMM "IF" ; immediate
+; https://forth-standard.org/standard/core/IF
+; IF -- IFadr initialize conditional forward branch
+IFF SUB #2,PSP ;
+ MOV TOS,0(PSP) ;
+ MOV &DP,TOS ; -- HERE
+ ADD #4,&DP ; compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) ; -- HERE compile QFBRAN
+ ADD #2,TOS ; -- HERE+2=IFadr
MOV @IP+,PC
-;https://forth-standard.org/standard/core/MAX
-;C MAX n1 n2 -- n3 signed maximum
- FORTHWORD "MAX"
-MAX CMP @PSP,TOS ; n2-n1
- JL SELn1 ; n2<n1
-SELn2 ADD #2,PSP
+ FORTHWORDIMM "ELSE" ; immediate
+; https://forth-standard.org/standard/core/ELSE
+; ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ELSS ADD #4,&DP ; make room to compile two words
+ MOV &DP,W ; W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) ; HERE+4 ==> [IFadr]
+ SUB #2,W ; HERE+2
+ MOV W,TOS ; -- ELSEadr
MOV @IP+,PC
-;https://forth-standard.org/standard/core/MIN
-;C MIN n1 n2 -- n3 signed minimum
- FORTHWORD "MIN"
-MIN CMP @PSP,TOS ; n2-n1
- JL SELn2 ; n2<n1
-SELn1 MOV @PSP+,TOS
+ FORTHWORDIMM "THEN" ; immediate
+; https://forth-standard.org/standard/core/THEN
+; THEN IFadr -- resolve forward branch
+THEN MOV &DP,0(TOS) ; -- IFadr
+ MOV @PSP+,TOS ; --
MOV @IP+,PC
-;https://forth-standard.org/standard/core/PlusStore
-;C +! n/u a-addr -- add to memory
- FORTHWORD "+!"
-PLUSSTORE ADD @PSP+,0(TOS)
+ FORTHWORDIMM "BEGIN" ; immediate
+; https://forth-standard.org/standard/core/BEGIN
+; BEGIN -- BEGINadr initialize backward branch
+ MOV #HEREXEC,PC ; -- HERE
+
+ FORTHWORDIMM "UNTIL" ; immediate
+; https://forth-standard.org/standard/core/UNTIL
+; UNTIL BEGINadr -- resolve conditional backward branch
+UNTIL MOV #QFBRAN,X
+UNTIL1 ADD #4,&DP ; compile two words
+ MOV &DP,W ; W = HERE
+ MOV X,-4(W) ; compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) ; compile bakcward adr at HERE+2
MOV @PSP+,TOS
MOV @IP+,PC
+ FORTHWORDIMM "AGAIN" ; immediate
+; https://forth-standard.org/standard/core/AGAIN
+;X AGAIN BEGINadr -- resolve uncondionnal backward branch
+AGAIN MOV #BRAN,X
+ JMP UNTIL1
+
+ FORTHWORDIMM "WHILE" ; immediate
+; https://forth-standard.org/standard/core/WHILE
+; WHILE BEGINadr -- WHILEadr BEGINadr
+WHILE mDOCOL
+ .word IFF,SWAP,EXIT
+
+ FORTHWORDIMM "REPEAT" ; immediate
+; https://forth-standard.org/standard/core/REPEAT
+; REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+REPEAT mDOCOL
+ .word AGAIN,THEN,EXIT
+
+ FORTHWORDIMM "DO" ; immediate
+; Primitive XDO; compiled by DO
+;Z (do) n1|u1 n2|u2 -- R: -- sys1 sys2 run-time code for DO
+; n1|u1=limit, n2|u2=index
+XDO MOV #8000h,X ;2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X ;2
+ MOV TOS,Y ;1 loop ctr = index+fudge
+ ADD X,Y ;1 Y = INDEX
+ PUSHM #2,X ;4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS ;2
+ MOV @IP+,PC ;4
+
+; https://forth-standard.org/standard/core/DO
+; DO -- DOadr L: -- 0
+DO SUB #2,PSP ;
+ MOV TOS,0(PSP) ;
+ ADD #2,&DP ; make room to compile xdo
+ MOV &DP,TOS ; -- HERE+2
+ MOV #XDO,-2(TOS) ; compile xdo
+ ADD #2,&LEAVEPTR ; -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W ;
+ MOV #0,0(W) ; -- HERE+2 L-- 0
+ MOV @IP+,PC
+
+ .IFNDEF II
+ FORTHWORD "I"
+; https://forth-standard.org/standard/core/I
+; I -- n R: sys1 sys2 -- sys1 sys2
+; get the innermost loop index
+II SUB #2,PSP ;1 make room in TOS
+ MOV TOS,0(PSP) ;3
+ MOV @RSP,TOS ;2 index = loopctr - fudge
+ SUB 2(RSP),TOS ;3
+ MOV @IP+,PC ;4 13~
+ .ENDIF
+
+; Primitive XLOOP; compiled by LOOP
+;Z (loop) R: sys1 sys2 -- | sys1 sys2
+; run-time code for LOOP
+; Add 1 to the loop index. If loop terminates, clean up the
+; return stack and skip the branch. Else take the inline branch.
+; Note that LOOP terminates when index=8000h.
+XLOOP ADD #1,0(RSP) ;4 increment INDEX
+XLOOPNEXT BIT #100h,SR ;2 is overflow bit set?
+ JZ XLOOPDO ;2 no overflow = loop
+ ADD #4,RSP ;1 empties RSP
+ ADD #2,IP ;1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC ;4 14~ taken or not taken xloop/loop
+XLOOPDO MOV @IP,IP
+ MOV @IP+,PC ;4 14~ taken or not taken xloop/loop
+
+
+ FORTHWORDIMM "LOOP" ; immediate
+; https://forth-standard.org/standard/core/LOOP
+; LOOP DOadr -- L-- an an-1 .. a1 0
+LOO MOV #XLOOP,X
+LOOPNEXT ADD #4,&DP ; make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) ; xloop --> HERE
+ MOV TOS,-2(W) ; DOadr --> HERE+2
+; resolve all "leave" adr
+LEAVELOOP MOV &LEAVEPTR,TOS ; -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR ; --
+ MOV @TOS,TOS ; -- first LeaveStack value
+ CMP #0,TOS ; -- = value left by DO ?
+ JZ LOOPEND
+ MOV W,0(TOS) ; move adr after loop as UNLOOP adr
+ JMP LEAVELOOP
+LOOPEND MOV @PSP+,TOS
+ MOV @IP+,PC
+
+; Primitive XPLOOP; compiled by +LOOP
+;Z (+loop) n -- R: sys1 sys2 -- | sys1 sys2
+; run-time code for +LOOP
+; Add n to the loop index. If loop terminates, clean up the
+; return stack and skip the branch. Else take the inline branch.
+XPLOO ADD TOS,0(RSP) ;4 increment INDEX by TOS value
+ MOV @PSP+,TOS ;2 get new TOS, doesn't change flags
+ JMP XLOOPNEXT ;2
+
+ FORTHWORDIMM "+LOOP" ; immediate
+; https://forth-standard.org/standard/core/PlusLOOP
+; +LOOP adrs -- L-- an an-1 .. a1 0
+PLUSLOOP MOV #XPLOO,X
+ JMP LOOPNEXT
+
+ FORTHWORDIMM "CASE"
+; https://forth-standard.org/standard/core/CASE
+; CASE ; -- #of-1
+ mDOCOL
+ .word LIT,0
+ .word EXIT
+
+ FORTHWORDIMM "OF"
+; https://forth-standard.org/standard/core/OF
+; OF ; #of-1 -- orgOF #of
+ mDOCOL
+ .word ONEPLUS ; count OFs
+ .word TOR ; move off the stack in case the control-flow stack is the data stack.
+ .word LIT,OVER,COMMA
+ .word LIT,EQUAL,COMMA ; copy and test case value
+ .word IFF ; add orig to control flow stack
+ .word LIT,DROP,COMMA ; discards case value if =
+ .word RFROM ; we can bring count back now
+ .word EXIT
+
+ FORTHWORDIMM "ENDOF"
+; https://forth-standard.org/standard/core/ENDOF
+; ENDOF ; orgOF #of -- orgENDOF #of
+ mDOCOL
+ .word TOR ; move off the stack in case the control-flow stack is the data stack.
+ .word ELSS
+ .word RFROM ; we can bring count back now
+ .word EXIT
+
+ FORTHWORDIMM "ENDCASE"
+; https://forth-standard.org/standard/core/ENDCASE
+; ENDCASE ; orgENDOF1..orgENDOFn #of --
+ mDOCOL
+ .word LIT,DROP,COMMA
+ .word LIT,0,XDO
+ENDCASELOOP .word THEN
+ .word XLOOP,ENDCASELOOP
+ .word EXIT
+
;https://forth-standard.org/standard/core/CHAR
;C CHAR -- char parse ASCII character
FORTHWORD "CHAR"
CHARR mDOCOL
- .word FBLANK,WORDD,ONEPLUS,CFETCH,EXIT
+ .word BL,WORDD,ONEPLUS,CFETCH,EXIT
;https://forth-standard.org/standard/core/BracketCHAR
;C [CHAR] -- compile character literal
.word lit,lit,COMMA
.word COMMA,EXIT
+ .IFNDEF MOVE
+; https://forth-standard.org/standard/core/MOVE
+; MOVE addr1 addr2 u -- smart move
+; VERSION FOR 1 ADDRESS UNIT = 1 CHAR
+ FORTHWORD "MOVE"
+MOVE MOV TOS,W ; W = cnt
+ MOV @PSP+,Y ; Y = addr2 = dst
+ MOV @PSP+,X ; X = addr1 = src
+ MOV @PSP+,TOS ; pop new TOS
+ CMP #0,W ; count = 0 ?
+ JZ MOVEND ; if 0, already done !
+ CMP X,Y ; dst = src ?
+ JZ MOVEND ; already done !
+ JC MOVEDOWN ; U< if src > dst
+MOVEUPLOOP MOV.B @X+,0(Y) ; copy W bytes
+ ADD #1,Y
+ SUB #1,W
+ JNZ MOVEUPLOOP
+ MOV @IP+,PC ; out 1 of MOVE ====>
+MOVEDOWN ADD W,Y ; copy W bytes beginning with the end
+ ADD W,X
+MOVEDOWNLOO SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
+ SUB #1,W
+ JNZ MOVEDOWNLOO
+MOVEND MOV @IP+,PC ; out 2 of MOVE ====>
+ .ENDIF
+
;https://forth-standard.org/standard/core/FILL
;C FILL c-addr u char -- fill memory with char
FORTHWORD "FILL"
;https://forth-standard.org/standard/core/HEX
FORTHWORD "HEX"
-HEX MOV #16,&BASE
+HEX MOV #16,&BASEADR
MOV @IP+,PC
;https://forth-standard.org/standard/core/DECIMAL
FORTHWORD "DECIMAL"
-DECIMAL MOV #10,&BASE
+DECIMAL MOV #10,&BASEADR
MOV @IP+,PC
; https://forth-standard.org/standard/core/HERE
; HERE -- addr returns memory ptr
- FORTHWORD "HERE"
- MOV #HERE,PC
+HERE FORTHWORD "HERE"
+ MOV #HEREXEC,PC
;https://forth-standard.org/standard/core/p
;C ( \ -- paren ; skip input until )
mDOCOL
.word lit,')',WORDD
.word COUNT,TYPE
- .word FBLANK,LIT,CAPS,STORE
+ .word BL,LIT,CAPS,STORE
.word EXIT
;https://forth-standard.org/standard/core/J
;https://forth-standard.org/standard/core/LEAVE
;C LEAVE -- L: -- adrs
FORTHWORDIMM "LEAVE" ; immediate
-LEAV MOV &DDP,W ; compile three words
+LEAV MOV &DP,W ; compile three words
MOV #UNLOOP,0(W) ; [HERE] = UNLOOP
MOV #BRAN,2(W) ; [HERE+2] = BRAN
- ADD #6,&DDP ; [HERE+4] = After LOOP adr
+ ADD #6,&DP ; [HERE+4] = After LOOP adr
ADD #2,&LEAVEPTR
ADD #4,W
MOV &LEAVEPTR,X
;https://forth-standard.org/standard/core/RECURSE
;C RECURSE -- recurse to current definition (compile current definition)
FORTHWORDIMM "RECURSE" ; immediate
-RECURSE MOV &DDP,X ;
+RECURSE MOV &DP,X ;
MOV &LAST_CFA,0(X) ;
- ADD #2,&DDP ;
+ ADD #2,&DP ;
MOV @IP+,PC
+ .IFNDEF TOBODY
; https://forth-standard.org/standard/core/toBODY
; >BODY -- addr leave BODY of a CREATEd word; also leave default ACTION-OF primary DEFERred word
FORTHWORD ">BODY"
TOBODY ADD #4,TOS
MOV @IP+,PC
+ .ENDIF
+
+; https://forth-standard.org/standard/core/EXECUTE
+; EXECUTE i*x xt -- j*x execute Forth word at 'xt'
+ FORTHWORD "EXECUTE"
+ PUSH TOS ; 3 push xt
+ MOV @PSP+,TOS ; 2
+ MOV @RSP+,PC ; 4 xt --> PC
+
+; https://forth-standard.org/standard/core/EVALUATE
+; EVALUATE ; i*x c-addr u -- j*x interpret string
+ FORTHWORD "EVALUATE"
+ MOV #SOURCE_LEN,X ; 2
+ MOV @X+,S ; 2 S = SOURCE_LEN
+ MOV @X+,T ; 2 T = SOURCE_ORG
+ MOV @X+,W ; 2 W = TOIN
+ PUSHM #4,IP ; 6 PUSHM IP,S,T,W
+ mASM2FORTH
+ .word INTERPRET
+ mNEXTADR
+ MOV @RSP+,&TOIN ; 4
+ MOV @RSP+,&SOURCE_ORG ; 4
+ MOV @RSP+,&SOURCE_LEN ; 4
+ MOV @RSP+,IP
+ MOV @IP+,PC
;https://forth-standard.org/standard/core/SOURCE
;C SOURCE -- adr u of current input buffer
;C BASE -- a-addr holds conversion radix
FORTHWORD "BASE"
CALL rDOCON
- .word BASE ; VARIABLE address in RAM space
+ .word BASEADR ; VARIABLE address in RAM space
;https://forth-standard.org/standard/core/toIN
;C >IN -- a-addr holds offset in input stream
FTOIN CALL rDOCON
.word TOIN ; VARIABLE address in RAM space
+; https://forth-standard.org/standard/core/BL
+; BL -- char an ASCII space
+ FORTHWORD "BL"
+ CALL rDOCON
+ .word 20h
+
+ .IFNDEF PAD
;https://forth-standard.org/standard/core/PAD
; PAD -- pad address
FORTHWORD "PAD"
PAD CALL rDOCON
.WORD PAD_ORG
+ .ENDIF
+
+; https://forth-standard.org/standard/core/VARIABLE
+; VARIABLE <name> -- define a Forth VARIABLE
+ FORTHWORD "VARIABLE"
+ mDOCOL
+ .word CREATE
+ mNEXTADR
+ MOV #DOVAR,-4(W) ; CFA = CALL rDOVAR
+ MOV @RSP+,IP
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/CONSTANT
+; CONSTANT <name> n -- define a Forth CONSTANT
+ FORTHWORD "CONSTANT"
+ mDOCOL
+ .word CREATE
+ mNEXTADR
+ MOV TOS,-2(W) ; PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+
+; https://forth-standard.org/standard/core/DEFER
+; Skip leading space delimiters. Parse name delimited by a space.
+; Create a definition for name with the execution semantics defined below.
+;
+; name Execution: --
+; Execute the xt that name is set to execute, i.e. NEXT (nothing),
+; until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+ FORTHWORD "DEFER"
+ mDOCOL
+ .word CREATE
+ mNEXTADR
+ MOV #4030h,-4(W) ;4 first CELL = MOV @PC+,PC = BR #addr
+ MOV #NEXTADR,-2(W) ;3 second CELL = ...mNEXT : do nothing by default
+ MOV @RSP+,IP
+ MOV @IP+,PC
; https://forth-standard.org/standard/core/TO
; TO name Run-time: ( x -- )
; Skip leading space delimiters. Parse name delimited by a space.
; Create a definition for name with the execution semantics defined below,
; with an initial value equal to x.
-;
+;
; name Execution: ( -- x )
; Place x on the stack. The value of x is that given when name was created,
; until the phrase x TO name is executed, causing a new value of x to be assigned to name.
mDOCOL
.word CREATE,COMMA
.word DOES
- .word $+2
+ mNEXTADR
MOV @RSP+,IP
BIT #UF9,SR ; see TO
- JNZ VALUENEXT
+ JNZ STOREVALUE
MOV @TOS,TOS ; execute Fetch
MOV @IP+,PC
-VALUENEXT BIC #UF9,SR ; clear 'TO' flag
+STOREVALUE BIC #UF9,SR ; clear 'TO' flag
MOV @PSP+,0(TOS) ; 4 execute Store
MOV @PSP+,TOS ; 2
MOV @IP+,PC ; 4
+
BIT Y,TOS ; 1 TEST ACTUAL BIT MRhi
JMP UDMT3
UDMT2 BIT X,W ; 1 TEST ACTUAL BIT MRlo
-UDMT3 JZ UDMT4 ;
+UDMT3 JZ UDMT4 ;
ADD IP,4(PSP) ; 3 IF 1: ADD MDlo TO RESlo
ADDC T,2(PSP) ; 3 ADDC MDhi TO REShi
- ADDC M,Q ; 1 ADDC MDLO TO RESLO
+ ADDC M,Q ; 1 ADDC MDLO TO RESLO
ADDC P,R ; 1 ADDC MDHI TO RESHI
UDMT4 ADD IP,IP ; 1 (RLA LSBs) MDlo *2
ADDC T,T ; 1 (RLC MSBs) MDhi *2
FORTHWORD "F*" ; s15.16 * s15.16 --> s15.16 result
MOV 2(PSP),S ;
XOR TOS,S ; MDhi XOR MRhi --> S keep sign of result
- BIT #8000h,2(PSP) ; MD < 0 ?
+ BIT #8000h,2(PSP) ; MD < 0 ?
JZ FSTAR1 ; no
XOR #-1,2(PSP)
XOR #-1,4(PSP)
ADDC #0,2(PSP)
FSTAR1 mDOCOL
.word DABS,UDMT
- .word $+2 ; -- RES0 RES1 RES2 RES3
+ .word $+2 ; -- RES0 RES1 RES2 RES3
MOV @RSP+,IP
MOV @PSP+,TOS ; -- RES0 RES1 RES2
MOV @PSP+,0(PSP) ; -- RES1 RES2
XOR #-1,TOS
ADD #1,0(PSP)
ADDC #0,TOS
-FSTAREND MOV @IP+,PC
+FSTAREND MOV @IP+,PC
FORTHWORD "F/" ; s15.16 / s15.16 --> s15.16 result
MOV #0,T ; DVDlo = 0
MOV X,S ;
XOR TOS,S ; MDhi XOR MRhi --> S keep sign of result
- AND #-1,X ; MD < 0 ?
+ AND #-1,X ; MD < 0 ?
JGE FDIV1 ; no
XOR #-1,Y ; lo
XOR #-1,X ; hi
XOR #-1,TOS
ADD #1,M
ADDC #0,TOS
-FDIV2
+FDIV2
; unsigned 32-BIT DIVIDEND : 32-BIT DIVISOR --> 32-BIT QUOTIENT, 32-BIT REMAINDER
; DVDhi|DVDlo : DVRhi|DVRlo --> QUOThi|QUOTlo, REMAINDER
; FORTHWORD "UD/MOD"
Q323 ADDC R,R ;1 RLC quotLO
ADDC Q,Q ;1 RLC quotHI
SUB #1,P ;1 Decrement loop counter
- JN Q6432END ;2 loop back if count>=0
+ JN Q6432END ;2 loop back if count>=0
ADD T,T ;1 RLA DVDlo
ADDC Y,Y ;1 RLC DVDhi
ADDC X,X ;1 RLC REMlo
ADDC W,W ;1 RLC REMhi
- JNC Q321 ;
+ JNC Q321 ;
SUB M,X ;1 REMlo - DIVlo
SUBC TOS,W ;1 REMhi - DIVhi
BIS #1,SR
JMP Q323
Q6432END
-; MOV X,4(PSP) ; REMlo
+; MOV X,4(PSP) ; REMlo
; MOV W,2(PSP) ; REMhi
; ADD #4,PSP ; skip REMlo REMhi
MOV R,0(PSP) ; QUOTlo
MOV TOS,2(PSP) ; -- len Qlo len
MOV #FNUMSNEXT,IP ;
FNUMSLOOP MOV &BASE,TOS ; -- len Qlo base
- MOV #UMSTAR,PC
+ MOV #UMSTAR,PC
FNUMSNEXT .word $+2 ; -- len RESlo digit
SUB #2,IP
CMP #10,TOS ; digit to char
MOV #0,0(PSP) ; -- Qhi 0 len
MOV #HOLDS_ORG,X ; -- Qhi 0 len X= org
JMP HOLDS1
-
+
.ELSEIF ; hardware multiplier
FORTHWORD "F*" ; signed s15.16 multiplication --> s15.16 result
MOV #0,T ; DVDlo = 0
MOV X,S ;
XOR TOS,S ; MDhi XOR MRhi --> S keep sign of result
- AND #-1,X ; MD < 0 ?
+ AND #-1,X ; MD < 0 ?
JGE FDIV1 ; no
XOR #-1,Y ; lo
XOR #-1,X ; hi
XOR #-1,TOS
ADD #1,M
ADDC #0,TOS
-FDIV2
+FDIV2
; unsigned 32-BIT DIVIDEND : 32-BIT DIVISOR --> 32-BIT QUOTIENT, 32-BIT REMAINDER
; DVDhi|DVDlo : DVRhi|DVRlo --> QUOThi|QUOTlo, REMAINDER
; FORTHWORD "UD/MOD"
Q323 ADDC R,R ;1 RLC quotLO
ADDC Q,Q ;1 RLC quotHI
SUB #1,P ;1 Decrement loop counter
- JN Q6432END ;2 loop back if count>=0
+ JN Q6432END ;2 loop back if count>=0
ADD T,T ;1 RLA DVDlo
ADDC Y,Y ;1 RLC DVDhi
ADDC X,X ;1 RLC REMlo
ADDC W,W ;1 RLC REMhi
- JNC Q321 ;
+ JNC Q321 ;
SUB M,X ;1 REMlo - DIVlo
SUBC TOS,W ;1 REMhi - DIVhi
BIS #1,SR
JMP Q323
Q6432END
-; MOV X,4(PSP) ; REMlo
-; MOV W,2(PSP) ; REMhi
+; MOV X,4(PSP) ; REMlo
+; MOV W,2(PSP) ; REMhi
; MOV @IP+,PC ; 33 words
AND #-1,S ; clear V, set N
JGE FDIVEND ; if positive
FDIVEND MOV R,0(PSP) ; QUOTlo
MOV Q,TOS ; QUOThi
POPM #4,rDOVAR ; 6 restore rDOCOL to rDOVAR
- MOV @IP+,PC
+ MOV @IP+,PC
; F#S Qlo Qhi u -- Qhi 0 convert fractionnal part of Q15.16 fixed point number
; with u digits
MOV TOS,T ; T = limit
MOV #0,S ; S = count
FNUMSLOOP MOV @PSP,&MPY ; Load 1st operand
- MOV &BASE,&OP2 ; Load 2nd operand
+ MOV &BASEADR,&OP2 ; Load 2nd operand
MOV &RES0,0(PSP) ; -- Qhi Qlo' x low result on stack
MOV &RES1,TOS ; -- Qhi Qlo' digit high result in TOS
CMP #10,TOS ; digit to char
MOV #0,0(PSP) ; -- Qhi 0 len
MOV #HOLDS_ORG,X ; -- Qhi 0 len X= org
JMP HOLDS1
-
+
.ENDIF ; of hardware MPY
FORTHWORD "F." ; display a Q15.16 number with 4 digits after comma
MOV TOS,S ; S = sign
MOV #4,T ; T = 4 preset 4 digits for base 16 by default
- MOV &BASE,W
+ MOV &BASEADR,W
CMP #0Ah,W
JNZ FDOT1 ; if not base 10
ADD #1,T ; T = 5 set 5 digits
JNZ FDOT2 ; if not base 2
MOV #10h,T ; T = 16 set 16 digits
FDOT2 PUSHM #3,IP ; R-- IP S=sign T=#digit
- ASMtoFORTH
+ mASM2FORTH
.word LESSNUM ; -- uQlo Qhi
.word DABS ; -- uQlo uQhi R-- IP sign #digit
.word RFROM ; -- uQlo uQhi u R-- IP sign
- .word FNUMS ; -- uQhi 0
- .word LIT,2Ch,HOLD; $2C = char ','
+ .word FNUMS ; -- uQhi 0
+ .word LIT,',',HOLD;
.word NUMS ; -- 0 0
.word RFROM ; -- 0 0 Qhi R-- IP
- .word SIGN ; -- 0 0
- .word NUMGREATER ; -- addr len
+ .word SIGN ; -- 0 0
+ .word NUMGREATER ; -- addr len
.word TYPE ; --
- .word FBLANK,EMIT ; --
+ .word BL,EMIT ; --
.word EXIT
FORTHWORD "S>F" ; convert a signed number to a Q15.16 (signed) number
; -*- coding: utf-8 -*-
+ .IFNDEF ANDD
+;https://forth-standard.org/standard/core/AND
+;C AND x1 x2 -- x3 logical AND
+ FORTHWORD "AND"
+ANDD AND @PSP+,TOS
+ MOV @IP+,PC
+ .ENDIF
+
.IFNDEF MAX
;https://forth-standard.org/standard/core/MAX
ADD @PSP,TOS ; -- ORG END
ASMtoFORTH
.word SWAP ; -- END ORG
+ .word LIT,FFF0h,AND ; -- END ORG_modulo_16
.word xdo ; --
DUMP1 .word CR
.word II,lit,4,UDOTR,SPACE ; generate address
; ----------------------------------;
; read first sector of Cluster and dump it
; ----------------------------------;
- FORTHWORD "CLUSTR." ; cluster. -- don't forget to add decimal point to your sector number (if < 65536)
+ FORTHWORD "CLUSTER." ; cluster. -- don't forget to add decimal point to your sector number (if < 65536)
; ----------------------------------;
CLUSTER BIT.B #CD_SD,&SD_CDIN ; test Card Detect: memory card present ?
JZ CD_CLUST_OK ;
MOV TOS,2(PSP) ; save TOS
MOV &DIRclusterL,0(PSP) ;
MOV &DIRclusterH,TOS ;
- CMP #0,TOS
- JNZ CLUSTER
- CMP #1,0(PSP) ; cluster 1 ?
- JNZ CLUSTER
- MOV &OrgRootDir,0(PSP) ; if yes, special case of FAT16 OrgRootDir
- JMP SECTOR
+ JMP CLUSTER
; ----------------------------------;
; -*- coding: utf-8 -*-
- FORTHWORD "{TOOLS}"
+ FORTHWORD "{UTILITY}"
MOV @IP+,PC
.IFNDEF TOR
;C C@ c-addr -- char fetch char from memory
FORTHWORD "C@"
CFETCH MOV.B @TOS,TOS ;2
- MOV @IP+,PC ;4
+ MOV @IP+,PC ;4
+ .ENDIF
+
+ .IFNDEF ULESS
+; https://forth-standard.org/standard/core/Uless
+; U< u1 u2 -- flag test u1<u2, unsigned
+ FORTHWORD "U<"
+ULESS SUB @PSP+,TOS ; 2 u2-u1
+ JNC UTOSFALSE
+ JZ ULESSEND
+UTOSTRUE MOV #-1,TOS ;1 flag Z = 0
+ULESSEND MOV @IP+,PC ;4
+
+; https://forth-standard.org/standard/core/Umore
+; U> n1 n2 -- flag
+ FORTHWORD "U>"
+ SUB @PSP+,TOS ; 2
+ JNC UTOSTRUE ; 2 flag = true, Z = 0
+UTOSFALSE AND #0,TOS ;1 flag Z = 1
+ MOV @IP+,PC ;4
.ENDIF
.IFNDEF SPACE
.ENDIF
+ .IFNDEF TWODUP
+; https://forth-standard.org/standard/core/TwoDUP
+; 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
+ FORTHWORD "2DUP"
+TWODUP MOV TOS,-2(PSP) ; 3
+ MOV @PSP,-4(PSP) ; 4
+ SUB #4,PSP ; 1
+ MOV @IP+,PC ; 4
+ .ENDIF
+
+ .IFNDEF XDO
+; Primitive XDO; compiled by DO
+;Z (do) n1|u1 n2|u2 -- R: -- sys1 sys2 run-time code for DO
+; n1|u1=limit, n2|u2=index
+XDO MOV #8000h,X ;2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X ;2
+ MOV TOS,Y ;1 loop ctr = index+fudge
+ ADD X,Y ;1 Y = INDEX
+ PUSHM #2,X ;4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS ;2
+ MOV @IP+,PC ;4
+
+ FORTHWORDIMM "DO" ; immediate
+; https://forth-standard.org/standard/core/DO
+; DO -- DOadr L: -- 0
+DO SUB #2,PSP ;
+ MOV TOS,0(PSP) ;
+ ADD #2,&DP ; make room to compile xdo
+ MOV &DP,TOS ; -- HERE+2
+ MOV #XDO,-2(TOS) ; compile xdo
+ ADD #2,&LEAVEPTR ; -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W ;
+ MOV #0,0(W) ; -- HERE+2 L-- 0
+ MOV @IP+,PC
+
+; Primitive XLOOP; compiled by LOOP
+;Z (loop) R: sys1 sys2 -- | sys1 sys2
+; run-time code for LOOP
+; Add 1 to the loop index. If loop terminates, clean up the
+; return stack and skip the branch. Else take the inline branch.
+; Note that LOOP terminates when index=8000h.
+XLOOP ADD #1,0(RSP) ;4 increment INDEX
+XLOOPNEXT BIT #100h,SR ;2 is overflow bit set?
+ JZ XLOOPDO ;2 no overflow = loop
+ ADD #4,RSP ;1 empties RSP
+ ADD #2,IP ;1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC ;4 14~ taken or not taken xloop/loop
+XLOOPDO MOV @IP,IP
+ MOV @IP+,PC ;4 14~ taken or not taken xloop/loop
+
+ FORTHWORDIMM "LOOP" ; immediate
+; https://forth-standard.org/standard/core/LOOP
+; LOOP DOadr -- L-- an an-1 .. a1 0
+LOO MOV #XLOOP,X
+LOOPNEXT ADD #4,&DP ; make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) ; xloop --> HERE
+ MOV TOS,-2(W) ; DOadr --> HERE+2
+; resolve all "leave" adr
+LEAVELOOP MOV &LEAVEPTR,TOS ; -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR ; --
+ MOV @TOS,TOS ; -- first LeaveStack value
+ CMP #0,TOS ; -- = value left by DO ?
+ JZ LOOPEND
+ MOV W,0(TOS) ; move adr after loop as UNLOOP adr
+ JMP LEAVELOOP
+LOOPEND MOV @PSP+,TOS
+ MOV @IP+,PC
+
+; Primitive XPLOOP; compiled by +LOOP
+;Z (+loop) n -- R: sys1 sys2 -- | sys1 sys2
+; run-time code for +LOOP
+; Add n to the loop index. If loop terminates, clean up the
+; return stack and skip the branch. Else take the inline branch.
+XPLOO ADD TOS,0(RSP) ;4 increment INDEX by TOS value
+ MOV @PSP+,TOS ;2 get new TOS, doesn't change flags
+ JMP XLOOPNEXT ;2
+
+ FORTHWORDIMM "+LOOP" ; immediate
+; https://forth-standard.org/standard/core/PlusLOOP
+; +LOOP adrs -- L-- an an-1 .. a1 0
+PLUSLOOP MOV #XPLOO,X
+ JMP LOOPNEXT
+ .ENDIF
+
.IFNDEF II
; https://forth-standard.org/standard/core/I
; I -- n R: sys1 sys2 -- sys1 sys2
;https://forth-standard.org/standard/tools/DotS
FORTHWORD ".S" ; -- print <depth> of Param Stack and stack contents if not empty
DOTS MOV TOS,-2(PSP) ; -- TOS ( tos x x )
- MOV PSP,TOS
+ MOV PSP,TOS
SUB #2,TOS ; to take count that TOS is first cell
MOV TOS,-6(PSP) ; -- TOS ( tos x PSP )
MOV #PSTACK,TOS ; -- P0 ( tos x PSP )
.word DROP,DROP,EXIT
STKDISPL1 .word xdo
STKDISPL2 .word II,FETCH,UDOT
- .word lit,2,xploop,STKDISPL2
+ .word lit,2,xploo,STKDISPL2
.word EXIT
FORTHWORD ".RS" ; -- print <depth> of Return Stack and stack contents if not empty
-DOTRS MOV TOS,-2(PSP) ; -- TOS ( tos x x )
+DOTRS MOV TOS,-2(PSP) ; -- TOS ( tos x x )
MOV RSP,-6(PSP) ; -- TOS ( tos x RSP )
MOV #RSTACK,TOS ; -- R0 ( tos x RSP )
JMP DOTS1
QUESTION MOV @TOS,TOS
MOV #UDOT,PC
+ .IFNDEF QDUP
+; https://forth-standard.org/standard/core/DUP
+; DUP x -- x x duplicate top of stack
+ FORTHWORD "DUP"
+QDUPNEXT SUB #2,PSP ; 2 push old TOS..
+ MOV TOS,0(PSP) ; 3 ..onto stack
+QDUPEND MOV @IP+,PC ; 4
+
+; https://forth-standard.org/standard/core/qDUP
+; ?DUP x -- 0 | x x DUP if nonzero
+ FORTHWORD "?DUP"
+QDUP CMP #0,TOS
+ JZ QDUPEND
+ JNZ QDUPNEXT
+ .ENDIF
+
+ .IFNDEF CR
+ FORTHWORD "CR"
+; https://forth-standard.org/standard/core/CR
+; CR -- send CR to the output device
+CR MOV @PC+,PC
+ .word BODYCR
+BODYCR mDOCOL ; send CR+LF to the default output device
+ .word XSQUOTE
+ .byte 2,0Dh,0Ah
+ .word TYPE,EXIT
+ .ENDIF
+
+ .IFNDEF TWODIV
+;https://forth-standard.org/standard/core/TwoDiv
+;C 2/ x1 -- x2 arithmetic right shift
+ FORTHWORD "2/"
+TWODIV RRA TOS
+ MOV @IP+,PC
+ .ENDIF
+
.SWITCH THREADS
.CASE 1
.word CR
.word LIT,CONTEXT,FETCH ; -- VOC_BODY
WORDS1 .word FETCH ; -- NFA
- .word QDUP ; -- 0 | -- NFA NFA
+ .word QDUP ; -- 0 | -- NFA NFA
.word QFBRAN,WORDS2 ; -- NFA
- .word DUP,DUP,COUNT ; -- NFA NFA addr count
- .word lit,07Fh,ANDD,TYPE ; -- NFA NFA
- .word CFETCH,lit,0Fh,ANDD
+ .word DUP,DUP,COUNT ; -- NFA NFA addr count
+ .word TWODIV,ANDD,TYPE ; -- NFA NFA
+ .word CFETCH,TWODIV
+ .word lit,0Fh,ANDD
.word lit,10h,SWAP,MINUS
.word SPACES
.word lit,2,MINUS ; NFA -- LFA
MOV @IP+,PC ; 4
.ENDIF
+ .IFNDEF MOVE
+; https://forth-standard.org/standard/core/MOVE
+; MOVE addr1 addr2 u -- smart move
+; VERSION FOR 1 ADDRESS UNIT = 1 CHAR
+ FORTHWORD "MOVE"
+MOVE MOV TOS,W ; W = cnt
+ MOV @PSP+,Y ; Y = addr2 = dst
+ MOV @PSP+,X ; X = addr1 = src
+ MOV @PSP+,TOS ; pop new TOS
+ CMP #0,W ; count = 0 ?
+ JZ MOVEND ; if 0, already done !
+ CMP X,Y ; dst = src ?
+ JZ MOVEND ; already done !
+ JC MOVEDOWN ; U< if src > dst
+MOVEUPLOOP MOV.B @X+,0(Y) ; copy W bytes
+ ADD #1,Y
+ SUB #1,W
+ JNZ MOVEUPLOOP
+ MOV @IP+,PC ; out 1 of MOVE ====>
+MOVEDOWN ADD W,Y ; copy W bytes beginning with the end
+ ADD W,X
+MOVEDOWNLOO SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
+ SUB #1,W
+ JNZ MOVEDOWNLOO
+MOVEND MOV @IP+,PC ; out 2 of MOVE ====>
+ .ENDIF
+
;https://forth-standard.org/standard/tools/WORDS
;X WORDS -- list all words in first vocabulary in CONTEXT. 38 words
FORTHWORD "WORDS"
.word PAD,LIT,THREADS,DUP,PLUS
.word MOVE
; BEGIN
-WORDS2 .word LIT,0,DUP
+WORDS2 .word LIT,0,DUP
.word LIT,THREADS,DUP,PLUS ; I = ptr = thread*2
.word LIT,0
.word xdo ; DO
-WORDS3 .word DUP
- .word II,PAD,PLUS,FETCH ; old MAX NFA U< NFA ?
+WORDS3 .word DUP,II,PAD,PLUS,FETCH ; old MAX NFA U< NFA ?
.word ULESS,QFBRAN,WORDS4 ; no
- .word DROP,DROP,II ; yes, replace old MAX of NFA by new MAX of NFA
+ .word TWODROP,II ; yes, replace old MAX of NFA by new MAX of NFA
.word DUP,PAD,PLUS,FETCH ;
-WORDS4 .word LIT,2,xploop,WORDS3 ; 2 +LOOP
+WORDS4 .word LIT,2,xploo,WORDS3 ; 2 +LOOP
.word QDUP ; MAX of NFA = 0 ?
.word QFBRAN,WORDS5 ; WHILE
.word DUP,LIT,2,MINUS,FETCH ; replace NFA MAX by its [LFA]
- .word ROT,PAD,PLUS,STORE
- .word DUP,COUNT ; display NFA MAX in 10 chars format
- .word lit,07Fh,ANDD,TYPE
- .word CFETCH,lit,0Fh,ANDD
+ .word ROT,PAD,PLUS,STORE
+ .word DUP,COUNT,TWODIV,TYPE ; display NFA MAX in 10 chars format
+ .word CFETCH,TWODIV
+ .word lit,0Fh,ANDD
.word lit,10h,SWAP,MINUS
.word SPACES
.word BRAN,WORDS2 ; REPEAT
.word EXIT
.ENDIF
+ .IFNDEF HERE
+; https://forth-standard.org/standard/core/HERE
+; HERE -- addr returns memory ptr
+HERE FORTHWORD "HERE"
+ MOV #HEREXEC,PC
+ .ENDIF
+
;https://forth-standard.org/standard/tools/DUMP
FORTHWORD "DUMP"
DUMP PUSH IP
- PUSH &BASE ; save current base
- MOV #10h,&BASE ; HEX base
+ PUSH &BASEADR ; save current base
+ MOV #10h,&BASEADR ; HEX base
ADD @PSP,TOS ; -- ORG END
- ASMtoFORTH
+ mASM2FORTH
.word SWAP ; -- END ORG
.word xdo ; --
DUMP1 .word CR
.word SPACE,SPACE
.word II,lit,10h,PLUS,II,xdo ; display 16 chars
DUMP4 .word II,CFETCH
- .word lit,7Eh,MIN,FBLANK,MAX,EMIT
+ .word lit,7Eh,MIN,BL,MAX,EMIT
.word xloop,DUMP4 ; chars display loop
- .word lit,10h,xploop,DUMP1 ; line loop
- .word RFROM,lit,BASE,STORE ; restore current base
+ .word lit,10h,xploo,DUMP1 ; line loop
+ .word RFROM,lit,BASEADR,STORE ; restore current base
.word EXIT
+++ /dev/null
-
-RETURN-STACK-CELLS = 48 maximum size of the return stack, in cells
-STACK-CELLS = 48 maximum size of the data stack, in cells
-/COUNTED-STRING = 255 maximum size of a counted string, in characters
-/HOLD = 34 size of the pictured numeric output string buffer, in characters
-/PAD = 84 size of the scratch area pointed to by PAD, in characters
-ADDRESS-UNIT-BITS = 16 size of one address unit, in bits
-FLOORED = true true if floored division is the default
-MAX-CHAR = 255 maximum value of any character in the implementation-defined character set
-MAX-N = 32767 largest usable signed integer
-MAX-U = 65535 largest usable unsigned integer
-MAX-D = 2147483647 largest usable signed double number
-MAX-UD = 4294967295 largest usable unsigned double number
-WoRdS aRe CaSe-InSeNsItIvE
-
-FORTH word-set
-----------------
-RST_HERE PWR_HERE RST_STATE PWR_STATE CREATE ; : IMMEDIATE
-POSTPONE ] [ \ ' ['] ABORT" INTERPRET
-COUNT LITERAL ALLOT , >NUMBER FIND WORD ."
-S" . U. SIGN HOLD #> #S #
-<# ! @ CR TYPE NOECHO ECHO EMIT
-KEY ACCEPT COLD WARM WIPE
-
-RST_HERE defines the bound of the program memory protected against COLD or hardware reset.
-PWR_HERE defines the bound of the program memory protected against ON/OFF and also against any error occurring.
-RST_STATE removes all words defined after RST_HERE (COLD or <reset> have same effet)
-PWR_STATE removes all words defined after PWR_HERE (an error has same effect)
-INTERPRET text interpreter, common part of EVALUATE and QUIT.
-NOECHO stop display on output
-ECHO start display on output
-CREATE https://forth-standard.org/standard/core/CREATE
-; https://forth-standard.org/standard/core/Semi
-: https://forth-standard.org/standard/core/Colon
-IMMEDIATE https://forth-standard.org/standard/core/IMMEDIATE
-POSTPONE https://forth-standard.org/standard/core/POSTPONE
-] https://forth-standard.org/standard/core/right-bracket
-[ https://forth-standard.org/standard/core/Bracket
-\ https://forth-standard.org/standard/block/bs
-['] https://forth-standard.org/standard/core/BracketTick
-' https://forth-standard.org/standard/core/Tick
-ABORT" https://forth-standard.org/standard/core/ABORTq
-COUNT https://forth-standard.org/standard/core/COUNT
-LITERAL https://forth-standard.org/standard/core/LITERAL
-ALLOT https://forth-standard.org/standard/core/ALLOT
-, https://forth-standard.org/standard/core/Comma
->NUMBER https://forth-standard.org/standard/core/toNUMBER
-FIND https://forth-standard.org/standard/core/FIND
-WORD https://forth-standard.org/standard/core/WORD
-." https://forth-standard.org/standard/core/Dotq
-S" https://forth-standard.org/standard/core/Sq
-. https://forth-standard.org/standard/core/d
-U. https://forth-standard.org/standard/core/Ud
-SIGN https://forth-standard.org/standard/core/SIGN
-HOLD https://forth-standard.org/standard/core/HOLD
-#> https://forth-standard.org/standard/core/num-end
-#S https://forth-standard.org/standard/core/numS
-# https://forth-standard.org/standard/core/num
-<# https://forth-standard.org/standard/core/num-start
-! https://forth-standard.org/standard/core/Store
-@ https://forth-standard.org/standard/core/Fetch
-CR DEFERed word, https://forth-standard.org/standard/core/CR
-TYPE https://forth-standard.org/standard/core/TYPE
-EMIT DEFERed word, https://forth-standard.org/standard/core/EMIT
-KEY DEFERed word, https://forth-standard.org/standard/core/KEY
-ACCEPT DEFERed word, https://forth-standard.org/standard/core/ACCEPT
-COLD PFA of COLD content = STOP_APP subroutine address, by default --> STOP_TERM
-WARM PFA of WARM content = INI_APP subroutine address, by default --> ENABLE_IO
-WIPE resets the program memory to its original state (Deep_RST have same effect).
-
-words added by the option MSP430ASSEMBLER:
-
-ASM CODE HI2LO
-
-CODE <word> creates a word written in assembler.
- this defined <word> must be ended with ENDCODE unless COLON or LO2HI use.
-ASM <word> creates a word written in assembler but not interpretable by FORTH (because ended by RET instr.).
- this defined <word> must be ended with ENDASM. Visible only from assembler
-HI2LO used to switch compilation from high level (FORTH) to low level (assembler).
-
-Other words are useable via the preprocessor GEMA and they address is in \inc\device.pat file :
-
-SLEEP CODE_WITHOUT_RETURN: CPU shutdown
-LIT CODE compiled by LITERAL
-XSQUOTE CODE compiled by S" and S_
-HEREXEC CODE HERE and BEGIN execute address
-QFBRAN CODE compiled by IF UNTIL
-BRAN CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR CODE NEXT instruction (MOV @IP+,PC)
-XDO CODE compiled by DO
-XPLOOP CODE compiled by +LOOP
-XLOOP CODE compiled by LOOP
-MUSMOD ASM 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2 ASM input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1 ASM input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR ASM content of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL CODE accept one line from input and leave org len of input buffer
-CIB_ADR [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR restore rDOVAR: MOV #XDOVAR,rDOVAR
-!to find DTC value, download \MSP430-FORTH\FF_SPECS.4th
-!XDOCOL if DTC = 1, restore rDOCOL as this: MOV #TYPE+-16,rDOCOL
-!XDOCOL if DTC = 2, restore rDOCOL as this: MOV ##S+16,rDOCOL
-! if DTC = 3, nothing to do, R7 is free for use.
-INI_FORTH CODE_WITHOUT_RETURN common part of RST and QABORT, starts FORTH engine
-QABORT CODE_WITHOUT_RETURN run-time part of ABORT"
-3DROP CODE
-ABORT_TERM CODE_WITHOUT_RETURN called by QREVEAL and INTERPRET
-!-------------------------------------------------------------------------------
-UART_COLD_TERM ASM, content of COLD_PFA by default
-UART_INIT_TERM ASM, content of WARM_PFA by default
-UART_RXON ASM, content of SLEEP_PFA by default
-UART_RXOFF ASM, called by ACCEPT before RX char LF.
-!-------------------------------------------------------------------------------
-I2C_COLD_TERM ASM, content of COLD_PFA by default
-I2C_INIT_TERM ASM, content of WARM_PFA by default
-I2C_RXON ASM, content of SLEEP_PFA by default
-I2C_CTRL_CH ASM, used as is: MOV.B #CTRL_CHAR,Y
-! CALL #I2C_CTRL_CH
-!-------------------------------------------------------------------------------
-
-MSP430ASSEMBLER word-set
---------------------
-
-?GOTO GOTO FW3 FW2 FW1 BW3 BW2
-BW1 REPEAT WHILE AGAIN UNTIL ELSE THEN
-IF 0= 0<> U>= U< 0< 0>=
-S< S>= RRUM RLAM RRAM RRCM POPM
-PUSHM CALL PUSH.B PUSH SXT RRA.B RRA
-SWPB RRC.B RRC AND.B AND XOR.B XOR
-BIS.B BIS BIC.B BIC BIT.B BIT DADD.B
-DADD CMP.B CMP SUB.B SUB SUBC.B SUBC
-ADDC.B ADDC ADD.B ADD MOV.B MOV RETI
-LO2HI COLON ENDASM ENDCODE
-
-see: http://www.ece.utep.edu/courses/web3376/Notes_files/ee3376-isa.pdf
- readme.md for symbolic alias of registers, symbolic jumps (IF ELSE THEN...),..
-
-?GOTO used after a conditionnal (0=,0<>,U>=,U<,0<,S<,S>=) to branch to a label FWx or BWx
-GOTO used as unconditionnal branch to a label FWx or BWx
-BW3 BACKWARD branch destination n°3
-BW2 n°2
-BW1 n°1
-FW3 FORWARD branch destination n°3
-FW2 n°2
-FW1 n°1
-REPEAT assembler version of the FORTH word REPEAT
-WHILE idem
-AGAIN idem
-UNTIL idem
-ELSE idem
-THEN idem
-IF idem
-0= conditionnal
-0<> conditionnal
-U>= conditionnal
-U< conditionnal
-0< conditionnal, to use only with ?GOTO
-0>= conditionnal, to use only with IF UNTIL WHILE
-S< conditionnal
-S>= conditionnal
-LO2HI switches compilation between low level and high level modes without saving IP register.
-COLON pushes IP then performs LO2HI, used as: CODE <word> ... assembler instr ... COLON ... FORTH words ... ;
-ENDASM to end an ASM definition.
-ENDCODE to end a CODE definition.
-
-ADD http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=135
-ADDC http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=136
-AND http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=137
-BIC http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=138
-BIS http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=139
-BIT http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=140
-CALL http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=142
-CMP http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=147
-DADD http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=149
-MOV http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=165
-PUSH http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=168
-RETI http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=170
-RRA http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=173
-RRC http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=174
-SUB http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=179
-SUBC http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=180
-SWPB http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=181
-SXT http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=182
-XOR http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=184
-
-RRUM http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=218
-RLAM http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=208
-RRAM http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=211
-RRCM http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=214
-POPM http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=204
-PUSHM http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=205
-
-EXTENDED_MEM WORDS set:
-
-POPM.A http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=204
-PUSHM.A http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=205
-ADDA http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=229
-CALLA http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=232
-CMPA http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=235
-MOVA http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=238
-SUBA http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=241
-
-EXTENDED_ASM WORDS set:
-
-ADDX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=187
-ADDCX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=188
-ANDX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=189
-BICX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=190
-BISX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=191
-BITX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=192
-CMPX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=194
-DADDX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=196
-MOVX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=202
-PUSHX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=207
-RRAX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=212
-RRCX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=216
-RRUX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=219
-SUBX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=221
-SUBCX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=222
-SWPBX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=223
-SXTX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=225
-XORX http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=227
-
-RPT http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=219
-
-CONDCOMP ADD-ON
----------------
-MARKER [DEFINED] [UNDEFINED] [IF] [ELSE] [THEN]
-
-MARKER https://forth-standard.org/standard/core/MARKER
-[DEFINED] https://forth-standard.org/standard/tools/BracketDEFINED
-[UNDEFINED] https://forth-standard.org/standard/tools/BracketUNDEFINED
-[IF] https://forth-standard.org/standard/tools/BracketIF
-[ELSE] https://forth-standard.org/standard/tools/BracketELSE
-[THEN] https://forth-standard.org/standard/tools/BracketTHEN
-
-
-VOCABULARY ADD-ON
------------------
-DEFINITIONS ONLY PREVIOUS ALSO ASSEMBLER FORTH VOCABULARY
-
-DEFINITIONS https://forth-standard.org/standard/search/DEFINITIONS
-ONLY https://forth-standard.org/standard/search/ONLY
-PREVIOUS https://forth-standard.org/standard/search/PREVIOUS
-ALSO https://forth-standard.org/standard/search/ALSO
-ASSEMBLER assembler VOCABULARY
-FORTH FORTH VOCABULARY
-VOCABULARY <word> creates a new VOCABULARY named word
-
-
-NONAME ADD-ON
--------------
-CODENNM IS DEFER :NONAME
-
-:NONAME https://forth-standard.org/standard/core/ColonNONAME
-CODENNM assembly counterpart of :NONAME
-DEFER https://forth-standard.org/standard/core/DEFER
-IS https://forth-standard.org/standard/core/IS
-
-
-SD_CARD_LOADER ADD-ON
----------------------
-LOAD"
-
-LOAD" LOAD" SD_TEST.4TH" loads source file SD_TEST.4TH from SD_Card and compile it.
-
-ACCEPT becomes a DEFERed word
-
-
-SD_CARD_READ_WRITE ADD-ON
--------------------------
-TERM2SD" SD_EMIT WRITE READ CLOSE DEL" WRITE"
-READ"
-
-TERM2SD" TERM2SD" SD_TEST.4TH" copy input file to SD_CARD (use CopySourceFileToTarget_SD_Card.bat to do)
-SD_EMIT sends output stream at the end of last opened as write file.
-WRITE write sequentially BUFFER content to a sector
-READ read sequentially a sector to BUFFER
-CLOSE close last opened file.
-DEL" DEL" SD_TEST.4TH" remove this file from SD_CARD.
-WRITE" WRITE" TRUC" open or create TRUC file ready to write to the end of this file
-READ" READ" TRUC" open TRUC and load its first sector in BUFFER
-
-
-
-BOOTLOADER
-----------
-BOOT
-
-QUIT becomes a DEFERed word
-
-
-; when ADD-ONs are compiled into the kernel, their respective MARKER word identified with braces {} does nothing.
-; when ADD-ONs are downloaded, their respective MARKER word identified with braces {} removes all ADD-ONs words.
-
-
-ANS_COMPLEMENT ADD-ON
----------------------
-VALUE TO SPACES SPACE BL PAD >IN
-BASE STATE CONSTANT VARIABLE SOURCE RECURSE EVALUATE
-EXECUTE >BODY .( ( DECIMAL HEX HERE
-FILL MOVE +! [CHAR] CHAR CELL+ CELLS
-CHAR+ CHARS ALIGN ALIGNED 2OVER 2SWAP 2DROP
-2DUP 2! 2@ R@ ROT OVER */
-*/MOD MOD / /MOD * FM/MOD ABS
-NEGATE SM/REM UM/MOD M* UM* 2/ 2*
-MIN MAX RSHIFT LSHIFT INVERT 1- 1+
-S>D XOR OR AND LEAVE UNLOOP J
-I +LOOP LOOP DO REPEAT WHILE AGAIN
-UNTIL ELSE THEN IF > < U<
-= 0< 0= C, C! C@ R>
->R NIP DROP SWAP DEPTH EXIT ?DUP
-DUP - + DOES> BEGIN {CORE_COMP}
-
-VALUE https://forth-standard.org/standard/core/VALUE
-TO https://forth-standard.org/standard/core/TO
-BEGIN https://forth-standard.org/standard/core/BEGIN
-DOES> https://forth-standard.org/standard/core/DOES
-SPACES https://forth-standard.org/standard/core/SPACES
-SPACE https://forth-standard.org/standard/core/SPACE
-BL https://forth-standard.org/standard/core/BL
-PAD https://forth-standard.org/standard/core/PAD
->IN https://forth-standard.org/standard/core/toIN
-BASE https://forth-standard.org/standard/core/BASE
-STATE https://forth-standard.org/standard/core/STATE
-CONSTANT https://forth-standard.org/standard/core/CONSTANT
-VARIABLE https://forth-standard.org/standard/core/VARIABLE
-SOURCE https://forth-standard.org/standard/core/SOURCE
-RECURSE https://forth-standard.org/standard/core/RECURSE
-EVALUATE https://forth-standard.org/standard/core/EVALUATE
-EXECUTE https://forth-standard.org/standard/core/EXECUTE
->BODY https://forth-standard.org/standard/core/toBODY
-.( https://forth-standard.org/standard/core/Dotp
-( https://forth-standard.org/standard/core/p
-DECIMAL https://forth-standard.org/standard/core/DECIMAL
-HEX https://forth-standard.org/standard/core/HEX
-HERE https://forth-standard.org/standard/core/HERE
-FILL https://forth-standard.org/standard/core/FILL
-MOVE https://forth-standard.org/standard/core/MOVE
-+! https://forth-standard.org/standard/core/PlusStore
-[CHAR] https://forth-standard.org/standard/core/BracketCHAR
-CHAR https://forth-standard.org/standard/core/CHAR
-CELL+ https://forth-standard.org/standard/core/CELLPlus
-CELLS https://forth-standard.org/standard/core/CELLS
-CHAR+ https://forth-standard.org/standard/core/CHARPlus
-CHARS https://forth-standard.org/standard/core/CHARS
-ALIGN https://forth-standard.org/standard/core/ALIGN
-ALIGNED https://forth-standard.org/standard/core/ALIGNED
-2OVER https://forth-standard.org/standard/core/TwoOVER
-2SWAP https://forth-standard.org/standard/core/TwoSWAP
-2DROP https://forth-standard.org/standard/core/TwoDROP
-2DUP https://forth-standard.org/standard/core/TwoDUP
-2! https://forth-standard.org/standard/core/TwoStore
-2@ https://forth-standard.org/standard/core/TwoFetch
-R@ https://forth-standard.org/standard/core/RFetch
-ROT https://forth-standard.org/standard/core/ROT
-OVER https://forth-standard.org/standard/core/OVER
-*/ https://forth-standard.org/standard/core/TimesDiv
-*/MOD https://forth-standard.org/standard/core/TimesDivMOD
-MOD https://forth-standard.org/standard/core/MOD
-/ https://forth-standard.org/standard/core/Div
-/MOD https://forth-standard.org/standard/core/DivMOD
-* https://forth-standard.org/standard/core/Times
-FM/MOD https://forth-standard.org/standard/core/FMDivMOD
-ABS https://forth-standard.org/standard/core/ABS
-NEGATE https://forth-standard.org/standard/core/NEGATE
-SM/REM https://forth-standard.org/standard/core/SMDivREM
-UM/MOD https://forth-standard.org/standard/core/UMDivMOD
-M* https://forth-standard.org/standard/core/MTimes
-UM* https://forth-standard.org/standard/core/UMTimes
-2/ https://forth-standard.org/standard/core/TwoDiv
-2* https://forth-standard.org/standard/core/TwoTimes
-MIN https://forth-standard.org/standard/core/MIN
-MAX https://forth-standard.org/standard/core/MAX
-RSHIFT https://forth-standard.org/standard/core/RSHIFT
-LSHIFT https://forth-standard.org/standard/core/LSHIFT
-INVERT https://forth-standard.org/standard/core/INVERT
-1- https://forth-standard.org/standard/core/OneMinus
-1+ https://forth-standard.org/standard/core/OnePlus
-S>D https://forth-standard.org/standard/core/StoD
-XOR https://forth-standard.org/standard/core/XOR
-OR https://forth-standard.org/standard/core/OR
-AND https://forth-standard.org/standard/core/AND
-LEAVE https://forth-standard.org/standard/core/LEAVE
-UNLOOP https://forth-standard.org/standard/core/UNLOOP
-J https://forth-standard.org/standard/core/J
-I https://forth-standard.org/standard/core/I
-+LOOP https://forth-standard.org/standard/core/PlusLOOP
-LOOP https://forth-standard.org/standard/core/LOOP
-DO https://forth-standard.org/standard/core/DO
-REPEAT https://forth-standard.org/standard/core/REPEAT
-WHILE https://forth-standard.org/standard/core/WHILE
-AGAIN https://forth-standard.org/standard/core/AGAIN
-UNTIL https://forth-standard.org/standard/core/UNTIL
-THEN https://forth-standard.org/standard/core/THEN
-ELSE https://forth-standard.org/standard/core/ELSE
-IF https://forth-standard.org/standard/core/IF
-> https://forth-standard.org/standard/core/more
-< https://forth-standard.org/standard/core/less
-U< https://forth-standard.org/standard/core/Uless
-= https://forth-standard.org/standard/core/Equal
-0< https://forth-standard.org/standard/core/Zeroless
-0= https://forth-standard.org/standard/core/ZeroEqual
-C, https://forth-standard.org/standard/core/CComma
-C! https://forth-standard.org/standard/core/CStore
-C@ https://forth-standard.org/standard/core/CFetch
-R> https://forth-standard.org/standard/core/Rfrom
->R https://forth-standard.org/standard/core/toR
-NIP https://forth-standard.org/standard/core/NIP
-DROP https://forth-standard.org/standard/core/DROP
-SWAP https://forth-standard.org/standard/core/SWAP
-DEPTH https://forth-standard.org/standard/core/DEPTH
-EXIT https://forth-standard.org/standard/core/EXIT
-?DUP https://forth-standard.org/standard/core/qDUP
-DUP https://forth-standard.org/standard/core/DUP
-- https://forth-standard.org/standard/core/Minus
-+ https://forth-standard.org/standard/core/Plus
-{CORE_COMP}
-
-
-DOUBLE word set
----------------
-D.R 2LITERAL 2VALUE 2CONSTANT 2VARIABLE M*/ DMIN
-DMAX D2* D2/ DABS DNEGATE D- M+
-D+ DU< D< D= D0< D0= D>S
-2ROT D. 2R> 2R@ 2>R {DOUBLE}
-
-
-D.R https://forth-standard.org/standard/double/DDotR
-2LITERAL https://forth-standard.org/standard/double/TwoLITERAL
-2VALUE https://forth-standard.org/standard/double/TwoVALUE
-2CONSTANT https://forth-standard.org/standard/double/TwoCONSTANT
-2VARIABLE https://forth-standard.org/standard/double/TwoVARIABLE
-M*/ https://forth-standard.org/standard/double/MTimesDiv
-DMIN https://forth-standard.org/standard/double/DMIN
-DMAX https://forth-standard.org/standard/double/DMAX
-D2* https://forth-standard.org/standard/double/DTwoTimes
-D2/ https://forth-standard.org/standard/double/DTwoDiv
-DABS https://forth-standard.org/standard/double/DABS
-DNEGATE https://forth-standard.org/standard/double/DNEGATE
-D- https://forth-standard.org/standard/double/DMinus
-M+ https://forth-standard.org/standard/double/MPlus
-D+ https://forth-standard.org/standard/double/DPlus
-DU< https://forth-standard.org/standard/double/DUless
-D< https://forth-standard.org/standard/double/Dless
-D= https://forth-standard.org/standard/double/DEqual
-D0< https://forth-standard.org/standard/double/DZeroless
-D0= https://forth-standard.org/standard/double/DZeroEqual
-D>S https://forth-standard.org/standard/double/DtoS
-2ROT https://forth-standard.org/standard/double/TwoROT
-D. https://forth-standard.org/standard/double/Dd
-2R> https://forth-standard.org/standard/core/TwoRfrom
-2R@ https://forth-standard.org/standard/core/TwoRFetch
-2>R https://forth-standard.org/standard/core/TwotoR
-{DOUBLE} if you type {DOUBLE}, it and all subsequent words are removed
-
-
-FIXPOINT ADD-ON
----------------
-
-S>F F. F* F#S F/ F- F+
-HOLDS {FIXPOINT}
-
-S>F u/n -- Qlo Qhi convert u/n in a s15.16 value
-F. display a s15.16 value
-F* s15.16 multiplication
-F#S Qlo Qhi u -- Qhi 0
- convert fractionnal part of a s15.16 value displaying u digits
-F/ s15.16 division
-F- s15.16 soustraction
-F+ s15.16 addition
-HOLDS https://forth-standard.org/standard/core/HOLDS
-{FIXPOINT} do nothing if compiled in core, else it and all subsequent loaded words are removed
-
-UTILITY ADD-ON
---------------
-
-DUMP U.R WORDS ? .RS .S {TOOLS}
-
-DUMP https://forth-standard.org/standard/tools/DUMP
-U.R u z -- display unsigned number u with size z
-WORDS https://forth-standard.org/standard/tools/WORDS
-? https://forth-standard.org/standard/tools/q
-.RS displays return stack content
-.S https://forth-standard.org/standard/tools/DotS
-{TOOLS} do nothing if compiled in core.
-
-
-SD_TOOLS ADD-ON
----------------
-
-DIR FAT CLUSTER SECTOR {SD_TOOLS}
-
-DIR dump first sector of current directory
-FAT dump first sector of FAT1
-CLUSTER .123 CLUSTER displays first sector of cluster 123
-SECTOR .123456789 SECTOR displays sector 123456789
-{SD_TOOLS} if you type {SD_TOOLS}, it and all subsequent words are removed
-
-
; BOOT.f
; --------
\
-\ to see kernel options, download FastForthSpecs.f
-\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP, SD_CARD_LOADER, BOOTLOADER
-\
-\ TARGET SELECTION
+\ TARGET SELECTION ( = the name of \INC\target.pat file without the extension)
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
-\ MSP_EXP430FR4133 MSP_EXP430FR2433 MSP_EXP430FR2355 CHIPSTICK_FR2433
+\ MSP_EXP430FR4133 CHIPSTICK_FR2433 MSP_EXP430FR2433 MSP_EXP430FR2355
+\ LP_MSP430FR2476
+\
+\ from scite editor : copy your target selection in (shift+F8) parameter 1:
+\
+\ or, from windows explorer:
+\ drag and drop this file onto SendSourceFileToTarget.bat
+\ then select your TARGET when asked.
\
\ SYSRSTIV decimal/hex values for MSP430FR5994 (device specific)
-\ ----------------------------------------------------------
-\ #00 $00 No interrupt pending
-\ #02 $02 Brownout (BOR)
-\ #04 $04 RSTIFG RST/NMI (BOR)
-\ #06 $06 PMMSWBOR software BOR (BOR)
-\ #08 $08 LPMx.5 wake up (BOR)
-\ #10 $0A violation memory protected areas (BOR)
-\ #12 $0C Reserved
-\ #14 $0E SVSHIFG SVSH event (BOR)
-\ #16 $10 Reserved
-\ #18 $12 Reserved
-\ #20 $14 PMMSWPOR software POR (POR)
-\ #22 $16 WDTIFG watchdog timeout (PUC)
-\ #24 $18 WDTPW password violation (PUC)
-\ #26 $1A FRCTLPW password violation (PUC)
-\ #28 $1C Uncorrectable FRAM bit error detection (PUC)
-\ #30 $1E Peripheral area fetch (PUC)
-\ #32 $20 PMMPW PMM password violation (PUC)
-\ #34 $22 MPUPW MPU password violation (PUC)
-\ #36 $24 CSPW CS password violation (PUC)
+\ ----------------------------------------------------------
+\ #00 $00 No interrupt pending
+\ #02 $02 Brownout (BOR)
+\ #04 $04 RSTIFG RST/NMI (BOR)
+\ #06 $06 PMMSWBOR software BOR (BOR)
+\ #08 $08 LPMx.5 wake up (BOR)
+\ #10 $0A violation memory protected areas (BOR)
+\ #12 $0C Reserved
+\ #14 $0E SVSHIFG SVSH event (BOR)
+\ #16 $10 Reserved
+\ #18 $12 Reserved
+\ #20 $14 PMMSWPOR software POR (POR)
+\ #22 $16 WDTIFG watchdog timeout (PUC)
+\ #24 $18 WDTPW password violation (PUC)
+\ #26 $1A FRCTLPW password violation (PUC)
+\ #28 $1C Uncorrectable FRAM bit error detection (PUC)
+\ #30 $1E Peripheral area fetch (PUC)
+\ #32 $20 PMMPW PMM password violation (PUC)
+\ #34 $22 MPUPW MPU password violation (PUC)
+\ #36 $24 CSPW CS password violation (PUC)
\ #38 $26 MPUSEGIPIFG encapsulated IP memory segment violation (PUC)
-\ #40 $28 MPUSEGIIFG information memory segment violation (PUC)
-\ #42 $2A MPUSEG1IFG segment 1 memory violation (PUC)
-\ #44 $2C MPUSEG2IFG segment 2 memory violation (PUC)
-\ #46 $2E MPUSEG3IFG segment 3 memory violation (PUC)
+\ #40 $28 MPUSEGIIFG information memory segment violation (PUC)
+\ #42 $2A MPUSEG1IFG segment 1 memory violation (PUC)
+\ #44 $2C MPUSEG2IFG segment 2 memory violation (PUC)
+\ #46 $2E MPUSEG3IFG segment 3 memory violation (PUC)
\
-\ SYSRSTIV values added by FastForth
-\ ----------------------------------
-\ -3 reset after FastForth "flashing".
-\ -1 Deep Reset: restores FastForth as it was "flashed".
+\ emulated SYSRSTIV values added by FastForth SYS
+\ -----------------------------------------------
+\ n SYS ( n<0) : user WIPE = Deep Reset: restores FastForth as it was "flashed"
+\ -3 : reset after FastForth "flashing".
+\ SYS : WARM
+\ n SYS (n even ) : user COLD (don't reuse hardware SYSRSTIV!)
+\ n SYS (n odd ) : user WARM.
\
\ note
-\ --------------------------------------------------------------------------------
-\ any reset event is kept in SYSRSTIV register. Their values are device specific.
-\ WARM displays the content of SYSRSTIV register.
-\ --------------------------------------------------------------------------------
-\ When BOOT.4TH is called by the FastForth bootstrap, the SYSRSTIV value is on
-\ the Top Of paramater Stack -TOS- ready to test.
-\ --------------------------------------------------------------------------------
-\ to enable bootstrap: ' BOOT IS WARM
-\ to disable bootstrap: ' BOOT [PFA] IS WARM
-\ --------------------------------------------------------------------------------
+\ ------------------------------------------------------------------------------
+\ When BOOT.4TH is called by the FastForth bootstrap, the SYSRSTIV (hardware or
+\ emulated value) is on the Top Of paramater Stack -TOS- ready to test.
+\ ------------------------------------------------------------------------------
+\ to enable bootstrap: BOOT
+\ to disable bootstrap: UNBOOT
+\ ------------------------------------------------------------------------------
\
-\ first, we test for downloading driver only if good FastForth version
-
-CODE ABORT_BOOTSTRAP
-SUB #2,PSP
-MOV TOS,0(PSP) \
-MOV &VERSION,TOS \ -- sys_event version
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_BOOTSTRAP definition before resuming
-;
-
-ABORT_BOOTSTRAP
+\ it's an example:
-[UNDEFINED] = [IF]
+ [UNDEFINED] =
+ [IF]
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ SUB #1,TOS \ 1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS \ 1 TOS=-1 if borrow was set
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-\ --------------------------------------------------------------------------------
-\ WARNING !
-\ --------------------------------------------------------------------------------
-\ it is not recommended here to compile then execute a word
-\ because the risk of crushing thereafter.
-\ Interpreting mode as below is required:
-\ --------------------------------------------------------------------------------
+ [UNDEFINED] +
+ [IF]
+\ https://forth-standard.org/standard/core/Plus
+\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-\ it's an example:
+ [UNDEFINED] EXECUTE
+ [IF]
+\ https://forth-standard.org/standard/core/EXECUTE
+\ EXECUTE i*x xt -- j*x execute Forth word at 'xt'
+ CODE EXECUTE
+ PUSH TOS \ 3 push xt
+ MOV @PSP+,TOS \ 2
+ MOV @RSP+,PC \ 4 xt --> PC
+ ENDCODE
+ [THEN]
-$04 = [IF] \ if PUC event is <reset>
- LOAD" SD_TEST.4TH"
-[THEN]
+\ ------------------------------------------------------------------------------
+\ WARNING !
+\ ------------------------------------------------------------------------------
+\ it is not recommended here to compile then execute a definition
+\ because the risk of crushing thereafter.
+\ Interpreting mode as below is required:
+\ ------------------------------------------------------------------------------
+ 4 = \ from SYS
+ [IF] \ if PUC event is <SW1+RESET> or -1 SYS
+ RST_RET \ remove definitions above
+ LOAD" SD_TEST.4TH" \ load a file to test the SD_Card driver
+ [ELSE] \ else
+ ' SYS $0A + EXECUTE \ resumes WARM to remove definitions above
+ [THEN] \ then
\
\ COLD \ uncomment for this TEST which must not disrupt the downloading process
-CODE I2CTERM_ABORT
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &KERNEL_ADDON,TOS
-BIT #$7800,TOS
-0<> IF MOV #0,TOS THEN \ if TOS <> 0 (UART TERMINAL), set TOS = 0
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-$0D EMIT \ return to column 1 without CR
-ABORT" FastForth V3.8 please!"
-ABORT" <-- Ouch! unexpected I2C_FastForth target!"
-PWR_STATE \ remove ABORT_UARTI2CS definition before resuming
-;
+ CODE I2CTERM_ABORT
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &KERNEL_ADDON,TOS
+ BIT #$3C00,TOS \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ 0<> IF MOV #0,TOS THEN \ if TOS <> 0 (UART TERMINAL), set TOS = 0
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ $0D EMIT \ return to column 1 without CR
+ ABORT" FastForth V3.9 please!"
+ ABORT" <-- Ouch! unexpected I2C_FastForth target!"
+ RST_RET \ remove ABORT_UARTI2CS definition before resuming
+ ;
I2CTERM_ABORT
; CHNGBAUD.f
; ------------
-[UNDEFINED] DUP [IF] \ define DUP and DUP?
\ https://forth-standard.org/standard/core/DUP
\ DUP x -- x x duplicate top of stack
-CODE DUP
+ [UNDEFINED] DUP [IF] \ define DUP and DUP?
+ CODE DUP
BW1 SUB #2,PSP \ 2 push old TOS..
MOV TOS,0(PSP) \ 3 ..onto stack
MOV @IP+,PC \ 4
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/qDUP
\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DROP
\ DROP x -- drop top of stack
-CODE DROP
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] DROP [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
+ [UNDEFINED] OVER [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR [IF]
+ DEFER CR \ DEFERed definition, by default executes that of :NONAME
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
\ https://forth-standard.org/standard/core/OnePlus
\ 1+ n1/u1 -- n2/u2 add 1 to TOS
-CODE 1+
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 1+ [IF]
+ CODE 1+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] U/ [IF]
\ U/ u1 u2 -- q unsigned 16/16->q16
-CODE U/
-SUB #2,PSP
-MOV #0,0(PSP) \ -- u1lo u1hi u2
-CALL #MUSMOD \ -- r qlo qhi
-MOV @PSP,TOS \ -- r qlo qlo
-ADD #4,PSP \ -- qlo
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
+ [UNDEFINED] U/ [IF]
+ CODE U/
+ SUB #2,PSP
+ MOV #0,0(PSP) \ -- u1lo u1hi u2
+ CALL #MUSMOD \ -- r qlo qhi
+ MOV @PSP,TOS \ -- r qlo qlo
+ ADD #4,PSP \ -- qlo
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
+ [UNDEFINED] R> [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1 flag Z = 1
-ELSE \ 2
- XOR #-1,TOS \ 1
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] < [IF] \ define < and >
+ [UNDEFINED] = [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1 flag Z = 1
+ ELSE \ 2
+ XOR #-1,TOS \ 1
+ THEN
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/less
\ < n1 n2 -- flag test n1<n2, signed
-CODE <
+ [UNDEFINED] < [IF] \ define < and >
+ CODE <
SUB @PSP+,TOS \ 1 TOS=n2-n1
S< ?GOTO FW1 \ 2 signed
0<> IF \ 2
-BW1 MOV #-1,TOS \ 1 flag Z = 0
+BW1 MOV #-1,TOS \ 1 flag Z = 0
THEN
MOV @IP+,PC
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/more
\ > n1 n2 -- flag test n1>n2, signed
-CODE >
+ CODE >
SUB @PSP+,TOS \ 2 TOS=n2-n1
S< ?GOTO BW1 \ 2 --> +5
FW1 AND #0,TOS \ 1 flag Z = 1
MOV @IP+,PC
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] IF [IF]
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] IF [IF]
+ CODE IF
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
+ CODE THEN
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ELSE
\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
+ [UNDEFINED] ELSE [IF]
+ CODE ELSE
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
- MOV X,-4(W) \ xloop --> HERE
- MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP
-MOV #XPLOOP,X
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2 \ goto BW1 LOOP
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] CASE [IF]
\ https://forth-standard.org/standard/core/CASE
-: CASE 0 ; IMMEDIATE \ -- #of-1
-
-\ https://forth-standard.org/standard/core/OF
-: OF \ #of-1 -- orgOF #of
-1+ \ count OFs
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE OVER POSTPONE = \ copy and test case value
-POSTPONE IF \ add orig to control flow stack
-POSTPONE DROP \ discards case value if =
-R> \ we can bring count back now
-; IMMEDIATE
+ [UNDEFINED] CASE [IF]
+ : CASE 0 ; IMMEDIATE \ -- #of-1
+
+ \ https://forth-standard.org/standard/core/OF
+ : OF \ #of-1 -- orgOF #of
+ 1+ \ count OFs
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE OVER POSTPONE = \ copy and test case value
+ POSTPONE IF \ add orig to control flow stack
+ POSTPONE DROP \ discards case value if =
+ R> \ we can bring count back now
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/ENDOF
-: ENDOF \ orgOF #of -- orgENDOF #of
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE ELSE
-R> \ we can bring count back now
-; IMMEDIATE
+ : ENDOF \ orgOF #of -- orgENDOF #of
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE ELSE
+ R> \ we can bring count back now
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/ENDCASE
-: ENDCASE \ orgENDOF1..orgENDOFn #of --
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] S_ [IF]
-CODE S_ \ Squote alias with blank separator instead quote
-MOV #0,&CAPS \ turn CAPS OFF
-COLON
-XSQUOTE , \ compile run-time code
-$20 WORD \ -- c-addr (= HERE)
-HI2LO
-MOV.B @TOS,TOS \ -- len compile string
-ADD #1,TOS \ -- len+1
-BIT #1,TOS \ C = ~Z
-ADDC TOS,&DP \ store aligned DP
-MOV @PSP+,TOS \ --
-MOV @RSP+,IP \ pop paired with push COLON
-MOV #$20,&CAPS \ turn CAPS ON (default state)
-MOV @IP+,PC \ NEXT
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ESC [IF]
-CODE ESC
-CMP #0,&STATEADR
-0= IF MOV @IP+,PC \ interpret time use is disallowed
-THEN
-COLON
-$1B \ -- char escape
-POSTPONE LITERAL \ compile-time code : lit $1B
-POSTPONE EMIT \ compile-time code : EMIT
-POSTPONE S_ \ compile-time code : S_ <escape_sequence>
-POSTPONE TYPE \ compile-time code : TYPE
-; IMMEDIATE
-[THEN]
-
-: BAD_MHz
-$20 DUP EMIT
- ABORT" only for 1,4,8,16,24 MHz MCLK!"
-;
-
-: OVR_BAUDS
-$20 DUP EMIT ESC [7m \ set reverse video
- ." with MCLK = " FREQ_KHZ @ 1000 U/ .
- ABORT" MHz? don't dream!"
-;
-
-: CHNGBAUD \ only for 1, 4, 8, 16, 24 MHz
-PWR_STATE \ removes this created word (garbage collector)
-ECHO
-ESC [8;42;128t \ set 42L * 128C terminal display
-41 0 DO CR LOOP \ to avoid erasing any line of source, create 42-1 empty lines
-ESC [H \ cursor home
-
-FREQ_KHZ @ DUP >R \ r-- target MCLCK frequency in MHz
-." target MCLK = " 1000 U/ . ." MHz" CR
-." choose your baudrate:" CR
-." 0 --> 6 MBds" CR \ >= 24 MHz
-." 1 --> 5 MBds" CR \ >= 20 MHz
-." 2 --> 4 MBds" CR \ >= 16 MHz
-." 3 --> 3 MBds" CR \ >= 12 MHz
-." 4 --> 1843200 Bds" CR \ >= 8 MHz
-." 5 --> 921600 Bds" CR \ >= 4 MHz
-." 6 --> 460800 Bds" CR \ >= 2 MHz
-." 7 --> 230400 Bds" CR \ >= 1 MHz
-." 8 --> 115200 Bds" CR \ >= 500 kHz
-." 9 --> 38400 Bds" CR
-." A --> 19200 Bds" CR
-." B --> 9600 Bds" CR
-." other --> abort" CR
-." your choice: "
-KEY
-
-CASE
-#48 OF ." 6 MBds" \ add this to the current line
- R> CASE
- #24000 OF $4 $0 \ -- TERM_BRW TERM_MCTLW
- ENDOF
- 24000 <
- IF OVR_BAUDS \ < 24 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#49 OF ." 5 MBds"
- R> CASE
- #24000 OF $4 $EE00 ENDOF
- #20000 OF $4 $0 ENDOF
- 20000 <
- IF OVR_BAUDS \ < 20 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#50 OF ." 4 MBds"
- R> CASE
- #24000 OF $6 $0 ENDOF
- #20000 OF $5 $0 ENDOF
- #16000 OF $4 $0 ENDOF
- 16000 <
- IF OVR_BAUDS \ < 16 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#51 OF ." 3 MBds"
- R> CASE
- #24000 OF $8 $0 ENDOF
- #20000 OF $6 $D600 ENDOF
- #16000 OF $5 $4900 ENDOF
- #12000 OF $4 $0 ENDOF
- 12000 <
- IF OVR_BAUDS \ < 12 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#52 OF ." 1843200 Bds"
- R> CASE
- #24000 OF $0D $0200 ENDOF
- #20000 OF $0A $DF00 ENDOF
- #16000 OF $8 $D600 ENDOF
- #12000 OF $6 $AA00 ENDOF
- #8000 OF $5 $9200 ENDOF
- 8000 <
- IF OVR_BAUDS \ < 8 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#53 OF ." 921600 Bds"
- R> CASE
- #24000 OF $1 $00A1 ENDOF
- #20000 OF $1 $B751 ENDOF
- #16000 OF $11 $4A00 ENDOF
- #12000 OF $0D $0200 ENDOF
- #8000 OF $8 $D600 ENDOF
- #4000 OF $4 $4900 ENDOF
- 4000 <
- IF OVR_BAUDS \ < 4 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#54 OF ." 460800 Bds"
- R> CASE
- #24000 OF $3 $0241 ENDOF
- #20000 OF $2 $92B1 ENDOF
- #16000 OF $2 $BB21 ENDOF
- #12000 OF $1 $00A1 ENDOF
- #8000 OF $11 $4A00 ENDOF
- #4000 OF $8 $D600 ENDOF
- #2000 OF $4 $4900 ENDOF
- 2000 <
- IF OVR_BAUDS \ < 2 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#55 OF ." 230400 Bds"
- R> CASE
- #24000 OF $6 $2081 ENDOF
- #20000 OF $5 $EE61 ENDOF
- #16000 OF $4 $5551 ENDOF
- #12000 OF $3 $0241 ENDOF
- #8000 OF $2 $BB21 ENDOF
- #4000 OF $11 $4A00 ENDOF
- #2000 OF $8 $D600 ENDOF
- #1000 OF $4 $4900 ENDOF
- 1000 <
- IF OVR_BAUDS \ < 1 MHz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#56 OF ." 115200 Bds"
- R> CASE
- #24000 OF $0D $4901 ENDOF
- #20000 OF $0A $AD01 ENDOF
- #16000 OF $8 $F7A1 ENDOF
- #12000 OF $6 $2081 ENDOF
- #8000 OF $4 $5551 ENDOF
- #4000 OF $2 $BB21 ENDOF
- #2000 OF $11 $4A00 ENDOF
- #1000 OF $8 $D600 ENDOF
- #500 OF $4 $4900 ENDOF
- 500 <
- IF OVR_BAUDS \ < 500 Khz --> abort
- THEN BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#57 OF ." 38400 Bds"
- R> CASE
- #24000 OF $27 $0011 ENDOF
- #16000 OF $1A $D601 ENDOF
- #8000 OF $0D $4901 ENDOF
- #4000 OF $6 $2081 ENDOF
- #1000 OF $1 $00A1 ENDOF
- BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#65 OF ." 19200 Bds"
- R> CASE
- #24000 OF $4E $0021 ENDOF
- #16000 OF $34 $4911 ENDOF
- #8000 OF $1A $D601 ENDOF
- #4000 OF $0D $4901 ENDOF
- #1000 OF $3 $0241 ENDOF
- BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
-#66 OF ." 9600 Bds"
- R> CASE
- #24000 OF $9C $0041 ENDOF
- #16000 OF $68 $D621 ENDOF
- #8000 OF $34 $4911 ENDOF
- #4000 OF $1A $D601 ENDOF
- #1000 OF $6 $2081 ENDOF
- BAD_MHz \ other MHz --> abort
- ENDCASE
- ENDOF
- ." abort" ABORT" " \ ABORT" displays nothing
-ENDCASE
-TERMMCTLW_RST ! \ set UCAxMCTLW value in FRAM
-TERMBRW_RST ! \ set UCAxBRW value in FRAM
-CR ESC [7m \ escape sequence to set reverse video
-." Change baudrate in Teraterm, save its setup, then reset target."
-;
-
-CHNGBAUD
+ : ENDCASE \ orgENDOF1..orgENDOFn #of --
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] S_ [IF]
+ CODE S_ \ Squote alias with blank separator instead quote
+ MOV #0,&CAPS \ turn CAPS OFF
+ COLON
+ XSQUOTE , \ compile run-time code
+ $20 WORD \ -- c-addr (= HERE)
+ HI2LO
+ MOV.B @TOS,TOS \ -- len compile string
+ ADD #1,TOS \ -- len+1
+ BIT #1,TOS \ C = ~Z
+ ADDC TOS,&DP \ store aligned DP
+ MOV @PSP+,TOS \ --
+ MOV @RSP+,IP \ pop paired with push COLON
+ MOV #$20,&CAPS \ turn CAPS ON (default state)
+ MOV @IP+,PC \ NEXT
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ESC [IF]
+ CODE ESC
+ CMP #0,&STATEADR
+ 0= IF MOV @IP+,PC \ interpret time use is disallowed
+ THEN
+ COLON
+ $1B \ -- char escape
+ POSTPONE LITERAL \ compile-time code : lit $1B
+ POSTPONE EMIT \ compile-time code : EMIT
+ POSTPONE S_ \ compile-time code : S_ <escape_sequence>
+ POSTPONE TYPE \ compile-time code : TYPE
+ ; IMMEDIATE
+ [THEN]
+
+ : BAD_MHz
+ $20 DUP EMIT
+ ABORT" only for 1,4,8,16,24 MHz MCLK!"
+ ;
+
+ : OVR_BAUDS
+ $20 DUP EMIT ESC [7m \ set reverse video
+ ." with MCLK = " FREQ_KHZ @ 1000 U/ .
+ ABORT" MHz? don't dream!"
+ ;
+
+ : CHNGBAUD \ only for 1, 4, 8, 16, 24 MHz
+ RST_RET \ removes this created word (garbage collector)
+ ECHO
+ ESC [8;42;80t \ set 42L * 80C terminal display
+ 41 0 DO CR LOOP \ to avoid erasing any line of source, create 42-1 empty lines
+ ESC [H \ cursor home
+
+ FREQ_KHZ @ DUP >R \ r-- target MCLCK frequency in MHz
+ ." target MCLK = " 1000 U/ . ." MHz" CR
+ ." choose your baudrate:" CR
+ ." 0 --> 6 MBds" CR \ >= 24 MHz
+ ." 1 --> 5 MBds" CR \ >= 20 MHz
+ ." 2 --> 4 MBds" CR \ >= 16 MHz
+ ." 3 --> 3 MBds" CR \ >= 12 MHz
+ ." 4 --> 1843200 Bds" CR \ >= 8 MHz
+ ." 5 --> 921600 Bds" CR \ >= 4 MHz
+ ." 6 --> 460800 Bds" CR \ >= 2 MHz
+ ." 7 --> 230400 Bds" CR \ >= 1 MHz
+ ." 8 --> 115200 Bds" CR \ >= 500 kHz
+ ." 9 --> 38400 Bds" CR
+ ." A --> 19200 Bds" CR
+ ." B --> 9600 Bds" CR
+ ." other --> abort" CR
+ ." your choice: "
+ KEY
+ CASE
+ #48 OF ." 6 MBds" \ add this to the current line
+ R> CASE
+ #24000 OF $4 $0 \ -- TERM_BRW TERM_MCTLW
+ ENDOF
+ 24000 <
+ IF OVR_BAUDS \ < 24 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #49 OF ." 5 MBds"
+ R> CASE
+ #24000 OF $4 $EE00 ENDOF
+ #20000 OF $4 $0 ENDOF
+ 20000 <
+ IF OVR_BAUDS \ < 20 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #50 OF ." 4 MBds"
+ R> CASE
+ #24000 OF $6 $0 ENDOF
+ #20000 OF $5 $0 ENDOF
+ #16000 OF $4 $0 ENDOF
+ 16000 <
+ IF OVR_BAUDS \ < 16 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #51 OF ." 3 MBds"
+ R> CASE
+ #24000 OF $8 $0 ENDOF
+ #20000 OF $6 $D600 ENDOF
+ #16000 OF $5 $4900 ENDOF
+ #12000 OF $4 $0 ENDOF
+ 12000 <
+ IF OVR_BAUDS \ < 12 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #52 OF ." 1843200 Bds"
+ R> CASE
+ #24000 OF $0D $0200 ENDOF
+ #20000 OF $0A $DF00 ENDOF
+ #16000 OF $8 $D600 ENDOF
+ #12000 OF $6 $AA00 ENDOF
+ #8000 OF $5 $9200 ENDOF
+ 8000 <
+ IF OVR_BAUDS \ < 8 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #53 OF ." 921600 Bds"
+ R> CASE
+ #24000 OF $1 $00A1 ENDOF
+ #20000 OF $1 $B751 ENDOF
+ #16000 OF $11 $4A00 ENDOF
+ #12000 OF $0D $0200 ENDOF
+ #8000 OF $8 $D600 ENDOF
+ #4000 OF $4 $4900 ENDOF
+ 4000 <
+ IF OVR_BAUDS \ < 4 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #54 OF ." 460800 Bds"
+ R> CASE
+ #24000 OF $3 $0241 ENDOF
+ #20000 OF $2 $92B1 ENDOF
+ #16000 OF $2 $BB21 ENDOF
+ #12000 OF $1 $00A1 ENDOF
+ #8000 OF $11 $4A00 ENDOF
+ #4000 OF $8 $D600 ENDOF
+ #2000 OF $4 $4900 ENDOF
+ 2000 <
+ IF OVR_BAUDS \ < 2 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #55 OF ." 230400 Bds"
+ R> CASE
+ #24000 OF $6 $2081 ENDOF
+ #20000 OF $5 $EE61 ENDOF
+ #16000 OF $4 $5551 ENDOF
+ #12000 OF $3 $0241 ENDOF
+ #8000 OF $2 $BB21 ENDOF
+ #4000 OF $11 $4A00 ENDOF
+ #2000 OF $8 $D600 ENDOF
+ #1000 OF $4 $4900 ENDOF
+ 1000 <
+ IF OVR_BAUDS \ < 1 MHz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #56 OF ." 115200 Bds"
+ R> CASE
+ #24000 OF $0D $4901 ENDOF
+ #20000 OF $0A $AD01 ENDOF
+ #16000 OF $8 $F7A1 ENDOF
+ #12000 OF $6 $2081 ENDOF
+ #8000 OF $4 $5551 ENDOF
+ #4000 OF $2 $BB21 ENDOF
+ #2000 OF $11 $4A00 ENDOF
+ #1000 OF $8 $D600 ENDOF
+ #500 OF $4 $4900 ENDOF
+ 500 <
+ IF OVR_BAUDS \ < 500 Khz --> abort
+ THEN BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #57 OF ." 38400 Bds"
+ R> CASE
+ #24000 OF $27 $0011 ENDOF
+ #16000 OF $1A $D601 ENDOF
+ #8000 OF $0D $4901 ENDOF
+ #4000 OF $6 $2081 ENDOF
+ #1000 OF $1 $00A1 ENDOF
+ BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #65 OF ." 19200 Bds"
+ R> CASE
+ #24000 OF $4E $0021 ENDOF
+ #16000 OF $34 $4911 ENDOF
+ #8000 OF $1A $D601 ENDOF
+ #4000 OF $0D $4901 ENDOF
+ #1000 OF $3 $0241 ENDOF
+ BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ #66 OF ." 9600 Bds"
+ R> CASE
+ #24000 OF $9C $0041 ENDOF
+ #16000 OF $68 $D621 ENDOF
+ #8000 OF $34 $4911 ENDOF
+ #4000 OF $1A $D601 ENDOF
+ #1000 OF $6 $2081 ENDOF
+ BAD_MHz \ other MHz --> abort
+ ENDCASE
+ ENDOF
+ ." abort" ABORT" " \ ABORT" " displays nothing
+ ENDCASE
+ TERMMCTLW_RST ! \ set UCAxMCTLW value in FRAM
+ TERMBRW_RST ! \ set UCAxBRW value in FRAM
+ CR ESC [7m \ escape sequence to set reverse video
+ ." Change baudrate in Teraterm, save its setup, then reset target."
+ ;
+
+ CHNGBAUD
\ ASSEMBLER conditionnal usage with IF UNTIL WHILE S< S>= U< U>= 0= 0<> 0>=
\ ASSEMBLER conditionnal usage with ?JMP ?GOTO S< S>= U< U>= 0= 0<> 0<
-CODE ABORT_CORDIC
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &KERNEL_ADDON,TOS
-BIT #BIT10,TOS
-0<> IF MOV #0,TOS THEN \ if TOS <> 0 (FIXPOINT input), set TOS = 0
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-$0D EMIT \ return to column 1 without CR
-ABORT" FastForth V3.8 please!"
-ABORT" build FastForth with FIXPOINT_INPUT addon !"
-PWR_STATE \ if no abort remove this word
-;
-
-ABORT_CORDIC
+ CODE ABORT_CORDIC
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &KERNEL_ADDON,TOS
+ BIT #BIT8,TOS
+ 0<> IF MOV #0,TOS THEN \ if TOS <> 0 (FIXPOINT_INPUT), set TOS = 0
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ $0D EMIT \ return to column 1 without CR
+ ABORT" FastForth V3.9 please!"
+ ABORT" build FastForth with FIXPOINT_INPUT addon"
+ RST_RET \ if no abort remove this word
+ ;
+
+ ABORT_CORDIC
; ----------
; CORDIC.f
; ----------
-[DEFINED] {CORDIC} [IF] {CORDIC} [THEN]
-
MARKER {CORDIC}
-
\ CORDIC USES
\ OPERATION | MODE | INITIALIZE x y z | DIRECTION | RESULT | post operation
\ --------------|-----------|-----------------------|---------------|-------------------|
\ --------------|-----------|-----------------------|---------------|-------------------|
\ Gi = CORDIC gain for i iterations; Gi < 1
\
+ CREATE T_ARCTAN \ ArcTan table
+ 12870 , \ 286 * 45 =
+ 7598 , \ 286 * 26.565 = 7597,605
+ 4014 , \ 286 * 14.036 = 4014,366
+ 2038 , \ 286 * 7.125 = 2037,755
+ 1023 , \ 286 * 3.576 = 1022,832
+ 512 , \ 286 * 1.790 = 511,914
+ 256 , \ 286 * 0.895 = 256,020
+ 128 , \ 286 * 0.448 = 128,017
+ 64 , \ 286 * 0.224 = 64,010
+ 32 , \ 286 * 0.112 = 32,005
+ 16 , \ 286 * 0.056 = 16,0025
+ 8 , \ 286 * 0.028 = 8,00126
+ 4 , \ 286 * 0.014 = 4
+ 2 , \ 286 * 0.007 = 2
+ 1 , \ 286 * 0.003 = 1
+
+ CREATE T_SCALE \ 1/Gi table
+ 46340 , \ = 65536 * cos(45)
+ 41448 , \ = 65536 * cos(45) * cos(26.565)
+ 40211 , \ = 65536 * cos(45) * cos(26.565) * cos(14.036)
+ 39900 , \ = 65536 * cos(45) * cos(26.565) * cos(14.036) * ...
+ 39822 ,
+ 39803 ,
+ 39798 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
-CREATE T_ARCTAN \ ArcTan table
-12870 , \ 286 * 45 =
-7598 , \ 286 * 26.565 = 7597,605
-4014 , \ 286 * 14.036 = 4014,366
-2038 , \ 286 * 7.125 = 2037,755
-1023 , \ 286 * 3.576 = 1022,832
-512 , \ 286 * 1.790 = 511,914
-256 , \ 286 * 0.895 = 256,020
-128 , \ 286 * 0.448 = 128,017
-64 , \ 286 * 0.224 = 64,010
-32 , \ 286 * 0.112 = 32,005
-16 , \ 286 * 0.056 = 16,0025
-8 , \ 286 * 0.028 = 8,00126
-4 , \ 286 * 0.014 = 4
-2 , \ 286 * 0.007 = 2
-1 , \ 286 * 0.003 = 1
-
-CREATE T_SCALE \ 1/Gi table
-46340 , \ = 65536 * cos(45)
-41448 , \ = 65536 * cos(45) * cos(26.565)
-40211 , \ = 65536 * cos(45) * cos(26.565) * cos(14.036)
-39900 , \ = 65536 * cos(45) * cos(26.565) * cos(14.036) * ...
-39822 ,
-39803 ,
-39798 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-\ https://forth-standard.org/standard/core/Uless
-\ U< u1 u2 -- flag test u1<u2, unsigned
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @PSP+,TOS \ 2 u2-u1
-0<> IF
- MOV #-1,TOS \ 1
- U< IF \ 2 flag
- AND #0,TOS \ 1 flag Z = 1
- THEN
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DABS [IF]
\ https://forth-standard.org/standard/double/DABS
\ DABS d1 -- |d1| absolute value
-CODE DABS
-AND #-1,TOS \ clear V, set N
-S< IF \
- XOR #-1,0(PSP) \ 4
- XOR #-1,TOS \ 1
- ADD #1,0(PSP) \ 4
- ADDC #0,TOS \ 1
-THEN
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] DABS
+ [IF]
+ CODE DABS
+ AND #-1,TOS \ clear V, set N
+ S< IF \
+ XOR #-1,0(PSP) \ 4
+ XOR #-1,TOS \ 1
+ ADD #1,0(PSP) \ 4
+ ADDC #0,TOS \ 1
+ THEN
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] HOLDS [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ RST_SET
+\ \ https://forth-standard.org/standard/core/Equal
+\ \ = x1 x2 -- flag test x1=x2
+\ [UNDEFINED] =
+\ [IF]
+\ CODE =
+\ SUB @PSP+,TOS \ 2
+\ 0<> IF \ 2
+\ AND #0,TOS \ 1
+\ MOV @IP+,PC \ 4
+\ THEN
+\ XOR #-1,TOS \ 1 flag Z = 1
+\ MOV @IP+,PC \ 4
+\ ENDCODE
+\ [THEN]
+\
+\ \ https://forth-standard.org/standard/core/Uless
+\ \ U< u1 u2 -- flag test u1<u2, unsigned
+\ [UNDEFINED] U<
+\ [IF]
+\ CODE U<
+\ SUB @PSP+,TOS \ 2 u2-u1
+\ 0<> IF
+\ MOV #-1,TOS \ 1
+\ U< IF \ 2 flag
+\ AND #0,TOS \ 1 flag Z = 1
+\ THEN
+\ THEN
+\ MOV @IP+,PC \ 4
+\ ENDCODE
+\ [THEN]
+\
+\ $81EF DEVICEID @ U<
+\ DEVICEID @ $81F3 U<
+\ =
+
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+
+ KERNEL_ADDON HMPY TSTBIT \ hardware MPY ?
+
+ RST_RET
+
+ [IF] ; MSP430FRxxxx with hardware_MPY
+
\ https://forth-standard.org/standard/core/HOLDS
\ Adds the string represented by addr u to the pictured numeric output string
\ compilation use: <# S" string" HOLDS #>
\ free chars area in the 32+2 bytes HOLD buffer = {26,23,2} chars with a 32 bits sized {hexa,decimal,binary} number.
\ (2 supplementary bytes are room for sign - and decimal point)
\ C HOLDS addr u --
-CODE HOLDS
- MOV @PSP+,X \ 2 X=src
-BW3 ADD TOS,X \ 1 X=src_end
- MOV &HP,Y \ 3 Y=dst
-BEGIN SUB #1,X \ 1 src-1
- SUB #1,TOS \ 1 cnt-1
-U>= WHILE SUB #1,Y \ 1 dst-1
- MOV.B @X,0(Y) \ 4
-REPEAT MOV Y,&HP \ 3
- MOV @PSP+,TOS \ 2
- MOV @IP+,PC \ 4 15 words
-ENDCODE
-[THEN]
-
-$81EF DEVICEID @ U<
-DEVICEID @ $81F3 U<
-= [IF] ; MSP430FR413x subfamily without hardware_MPY
-
-[UNDEFINED] F#S [IF]
+ [UNDEFINED] HOLDS
+ [IF]
+ CODE HOLDS
+ MOV @PSP+,X \ 2 X=src
+BW3 ADD TOS,X \ 1 X=src_end
+ MOV &HP,Y \ 3 Y=dst
+ BEGIN
+ SUB #1,X \ 1 src-1
+ SUB #1,TOS \ 1 cnt-1
+ U>= WHILE
+ SUB #1,Y \ 1 dst-1
+ MOV.B @X,0(Y) \ 4
+ REPEAT
+ MOV Y,&HP \ 3
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4 15 words
+ ENDCODE
+ [THEN]
+
+\ F#S Qlo Qhi u -- Qhi 0 convert fractionnal part of Q15.16 fixed point number
+\ with u digits
+ [UNDEFINED] F#S
+ [IF]
+ CODE F#S
+ MOV 2(PSP),X \ -- Qlo Qhi u X = Qlo
+ MOV @PSP,2(PSP) \ -- Qhi Qhi u
+ MOV X,0(PSP) \ -- Qhi Qlo u
+ MOV TOS,T \ T = len
+ MOV #0,S \ S = count
+ BEGIN MOV @PSP,&MPY \ Load 1st operand
+ MOV &BASEADR,&OP2 \ Load 2nd operand
+ MOV &RES0,0(PSP) \ -- Qhi RESlo x low result on stack
+ MOV &RES1,TOS \ -- Qhi RESlo REShi high result in TOS
+ CMP #10,TOS \ digit to char
+ U>= IF ADD #7,TOS
+ THEN ADD #$30,TOS
+ MOV.B TOS,HOLDS_ORG(S) \ -- Qhi RESlo char char to string
+ ADD #1,S \ count+1
+ CMP T,S \ count=len ?
+ 0= UNTIL MOV T,TOS \ -- len RESlo len
+ MOV #0,0(PSP) \ -- Qhi 0 len
+ MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
+ GOTO BW3 \ 35~ JMP HOLDS+2
+ ENDCODE
+ [THEN]
+
+ HDNCODE XSCALE \ X = X*Cordic_Gain
+ MOV T_SCALE(W),&MPYS32L \ 3 CORDIC Gain * 65536
+ MOV #0,&MPYS32H
+ MOV X,&OP2 \ 3 Load 1st operand
+ MOV &RES1,X \ 3 hi result
+ MOV @RSP+,PC \ RET
+ ENDCODE
+
+ [ELSE] ; no hardware multiplier
+
+\ https://forth-standard.org/standard/core/HOLDS
+\ Adds the string represented by addr u to the pictured numeric output string
+\ compilation use: <# S" string" HOLDS #>
+\ free chars area in the 32+2 bytes HOLD buffer = {26,23,2} chars with a 32 bits sized {hexa,decimal,binary} number.
+\ (2 supplementary bytes are room for sign - and decimal point)
+\ C HOLDS addr u --
+ [UNDEFINED] HOLDS
+ [IF]
+ CODE HOLDS
+ MOV @PSP+,X \ 2 X=src
+BW3 ADD TOS,X \ 1 X=src_end
+ MOV &HP,Y \ 3 Y=dst
+ BEGIN
+ SUB #1,X \ 1 src-1
+ SUB #1,TOS \ 1 cnt-1
+ U>= WHILE
+ SUB #1,Y \ 1 dst-1
+ MOV.B @X,0(Y) \ 4
+ REPEAT
+ MOV Y,&HP \ 3
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4 15 words
+ ENDCODE
+ [THEN]
+
\ F#S Qlo Qhi len -- Qhi 0 convert fractional part Qlo of Q15.16 fixed point number
\ with len digits
-CODE F#S
- MOV @PSP,S \ -- Qlo Qhi len S = Qhi
- MOV #0,T \ T = count
- PUSHM #3,IP \ R-- IP Qhi count
- MOV 2(PSP),0(PSP) \ -- Qlo Qlo len
- MOV TOS,2(PSP) \ -- len Qlo len
-BEGIN MOV &BASEADR,TOS \ -- len Qlo base
- LO2HI
- UM* \ u1 u2 -- RESlo REShi
- HI2LO \ -- len RESlo digit
- CMP #10,TOS \ digit to char
- U>= IF ADD #7,TOS
- THEN ADD #$30,TOS \ -- len RESlo char
- MOV @RSP,T \ T=count
- MOV.B TOS,HOLDS_ORG(T) \ char to string_org(T)
- ADD #1,T \ count+1
- MOV T,0(RSP) \
- CMP 2(PSP),T \ -- len RESlo char count=len ?
-U>= UNTIL POPM #3,IP \ S=Qhi, T=len
- MOV T,TOS \ -- len RESlo len
- MOV S,2(PSP) \ -- Qhi RESlo len
- MOV #0,0(PSP) \ -- Qhi 0 len
- MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
- GOTO BW3 \ 36~ JMP HOLDS
-ENDCODE
-[THEN]
-
-HDNCODE XSCALE \ X --> X*Cordic_Gain
+ [UNDEFINED] F#S
+ [IF]
+ CODE F#S
+ MOV @PSP,S \ -- Qlo Qhi len S = Qhi
+ MOV #0,T \ T = count
+ PUSHM #3,IP \ R-- IP Qhi count
+ MOV 2(PSP),0(PSP) \ -- Qlo Qlo len
+ MOV TOS,2(PSP) \ -- len Qlo len
+ BEGIN MOV &BASEADR,TOS \ -- len Qlo base
+ LO2HI
+ UM* \ u1 u2 -- RESlo REShi
+ HI2LO \ -- len RESlo digit
+ CMP #10,TOS \ digit to char
+ U>= IF ADD #7,TOS
+ THEN ADD #$30,TOS \ -- len RESlo char
+ MOV @RSP,T \ T=count
+ MOV.B TOS,HOLDS_ORG(T) \ char to string_org(T)
+ ADD #1,T \ count+1
+ MOV T,0(RSP) \
+ CMP 2(PSP),T \ -- len RESlo char count=len ?
+ U>= UNTIL POPM #3,IP \ S=Qhi, T=len
+ MOV T,TOS \ -- len RESlo len
+ MOV S,2(PSP) \ -- Qhi RESlo len
+ MOV #0,0(PSP) \ -- Qhi 0 len
+ MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
+ GOTO BW3 \ 36~ JMP HOLDS
+ ENDCODE
+ [THEN]
+
\ T.I. UNSIGNED MULTIPLY SUBROUTINE: U1 x U2 -> Ud
\ https://forth-standard.org/standard/core/UMTimes
\ UM* u1 u2 -- ud unsigned 16x16->32 mult.
- MOV T_SCALE(W),rDOCON \ rDOCON=MR, X=MDlo
-UMSTAR1 MOV #0,Y \ 1 MDhi=0
- MOV #0,S \ 1 RES0=0
- MOV #0,T \ 1 RES1=0
- MOV #1,W \ 1 BIT TEST REGISTER
-BEGIN BIT W,rDOCON \ 1 TEST ACTUAL BIT MRlo
- 0<> IF ADD X,S \ 1 IF 1: ADD MDlo TO RES0
- ADDC Y,T \ 1 ADDC MDhi TO RES1
- THEN ADD X,X \ 1 (RLA LSBs) MDlo x 2
- ADDC Y,Y \ 1 (RLC MSBs) MDhi x 2
- ADD W,W \ 1 (RLA) NEXT BIT TO TEST
-U>= UNTIL \ S = RESlo, T=REShi
- MOV T,X \ 2 IF BIT IN CARRY: FINISHED 10~ loop
- MOV #XDOCON,rDOCON \ restore rDOCON
- MOV @RSP+,PC \ RET
-ENDCODE
-
-[ELSE] ; hardware multiplier
-
-[UNDEFINED] F#S [IF]
-\ F#S Qlo Qhi u -- Qhi 0 convert fractionnal part of Q15.16 fixed point number
-\ with u digits
-CODE F#S
- MOV 2(PSP),X \ -- Qlo Qhi u X = Qlo
- MOV @PSP,2(PSP) \ -- Qhi Qhi u
- MOV X,0(PSP) \ -- Qhi Qlo u
- MOV TOS,T \ T = len
- MOV #0,S \ S = count
-BEGIN MOV @PSP,&MPY \ Load 1st operand
- MOV &BASEADR,&OP2 \ Load 2nd operand
- MOV &RES0,0(PSP) \ -- Qhi RESlo x low result on stack
- MOV &RES1,TOS \ -- Qhi RESlo REShi high result in TOS
- CMP #10,TOS \ digit to char
- U>= IF ADD #7,TOS
- THEN ADD #$30,TOS
- MOV.B TOS,HOLDS_ORG(S) \ -- Qhi RESlo char char to string
- ADD #1,S \ count+1
- CMP T,S \ count=len ?
-0= UNTIL MOV T,TOS \ -- len RESlo len
- MOV #0,0(PSP) \ -- Qhi 0 len
- MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
- GOTO BW3 \ 35~ JMP HOLDS+2
-ENDCODE
-[THEN]
-
-HDNCODE XSCALE \ X = X*Cordic_Gain
-MOV T_SCALE(W),&MPYS32L \ 3 CORDIC Gain * 65536
-MOV #0,&MPYS32H
-MOV X,&OP2 \ 3 Load 1st operand
-MOV &RES1,X \ 3 hi result
-MOV @RSP+,PC \ RET
-ENDCODE
-
-[THEN] ; end of hardware multiplier
-
-CODE POL2REC \ u F -- X Y
+ HDNCODE XSCALE \ X --> X*Cordic_Gain
+ MOV T_SCALE(W),rDOCON \ rDOCON=MR, X=MDlo
+ UMSTAR1 MOV #0,Y \ 1 MDhi=0
+ MOV #0,S \ 1 RES0=0
+ MOV #0,T \ 1 RES1=0
+ MOV #1,W \ 1 BIT TEST REGISTER
+ BEGIN BIT W,rDOCON \ 1 TEST ACTUAL BIT MRlo
+ 0<> IF ADD X,S \ 1 IF 1: ADD MDlo TO RES0
+ ADDC Y,T \ 1 ADDC MDhi TO RES1
+ THEN ADD X,X \ 1 (RLA LSBs) MDlo x 2
+ ADDC Y,Y \ 1 (RLC MSBs) MDhi x 2
+ ADD W,W \ 1 (RLA) NEXT BIT TO TEST
+ U>= UNTIL \ S = RESlo, T=REShi
+ MOV T,X \ 2 IF BIT IN CARRY: FINISHED 10~ loop
+ MOV #XDOCON,rDOCON \ restore rDOCON
+ MOV @RSP+,PC \ RET
+ ENDCODE
+
+ [THEN] ; endcase of hardware multiplier
+
\ input ; u = module {1000...16384}, F = angle (15Q16 number) in degrees {-89,9...89,9}
-\ output ; X Y
+\ output ; X Y
\ TOS = Fhi, 0(PSP) = Flo, 2(PSP) = u
-PUSH IP \ save IP before use
-MOV @PSP+,&MPY32L \ multiply angle by 286
-MOV TOS,&MPY32H
-MOV #286,&OP2
-MOV &RES0,Y
-MOV &RES1,TOS \ -- module angle*286
+ CODE POL2REC \ u F -- X Y
+ PUSH IP \ save IP before use
+ MOV @PSP+,&MPY32L \ multiply angle by 286
+ MOV TOS,&MPY32H
+ MOV #286,&OP2
+ MOV &RES0,Y
+ MOV &RES1,TOS \ -- module angle*286
\ =====================
\ CORDIC 16 bits engine
\ =====================
-MOV #-1,IP \ IP = i-1
-MOV @PSP,X \ X = Xi
-MOV #0,Y \ Y = Yi
-BEGIN \ i loops with init i = -1
- ADD #1,IP \ i = i+1
- MOV X,S \ S = Xi to be right shifted
- MOV Y,T \ T = Yi to be right shifted
- MOV #0,W \
- GOTO FW1
- BEGIN
- RRA S \ (Xi >> 1)
- RRA T \ (Yi >> 1)
- ADD #1,W
-FW1 CMP IP,W \ W = i ?
- 0= UNTIL \ loop back if W < i
- ADD W,W \ W = 2i = T_SCALE displacement
- CMP #0,TOS \ TOS = z
- 0>= IF \ TOS >= 0 : Rotate clockwise
- SUB T,X \ Xi+1 = Xi - ( Yi >> i)
- ADD S,Y \ Yi+1 = Yi + ( Xi >> i)
- SUB T_ARCTAN(W),TOS
- ELSE \ TOS < 0 : Rotate counter-clockwise
- ADD T,X \ Xi+1 = Xi + ( Yi >> i)
- SUB S,Y \ Yi+1 = Yi - ( Xi >> i)
- ADD T_ARCTAN(W),TOS
- THEN
- CMP #0,TOS \ if angle*256 = 0 quit loop
- 0<> WHILE \ search "Extended control-flow patterns" in https://forth-standard.org/standard/rationale
- CMP #14,IP \ IP = size of ARC_TAN table ?
-0= UNTIL
- THEN \ search "Extended control-flow patterns" in https://forth-standard.org/standard/rationale
+ MOV #-1,IP \ IP = i-1
+ MOV @PSP,X \ X = Xi
+ MOV #0,Y \ Y = Yi
+ BEGIN \ i loops with init i = -1
+ ADD #1,IP \ i = i+1
+ MOV X,S \ S = Xi to be right shifted
+ MOV Y,T \ T = Yi to be right shifted
+ MOV #0,W \
+ GOTO FW1
+ BEGIN
+ RRA S \ (Xi >> 1)
+ RRA T \ (Yi >> 1)
+ ADD #1,W
+FW1 CMP IP,W \ W = i ?
+ 0= UNTIL \ loop back if W < i
+ ADD W,W \ W = 2i = T_SCALE displacement
+ CMP #0,TOS \ TOS = z
+ 0>= IF \ TOS >= 0 : Rotate clockwise
+ SUB T,X \ Xi+1 = Xi - ( Yi >> i)
+ ADD S,Y \ Yi+1 = Yi + ( Xi >> i)
+ SUB T_ARCTAN(W),TOS
+ ELSE \ TOS < 0 : Rotate counter-clockwise
+ ADD T,X \ Xi+1 = Xi + ( Yi >> i)
+ SUB S,Y \ Yi+1 = Yi - ( Xi >> i)
+ ADD T_ARCTAN(W),TOS
+ THEN
+ CMP #0,TOS \ if angle*256 = 0 quit loop
+ 0<> WHILE \ search "Extended control-flow patterns" in https://forth-standard.org/standard/rationale
+ CMP #14,IP \ IP = size of ARC_TAN table ?
+ 0= UNTIL
+ THEN \ search "Extended control-flow patterns" in https://forth-standard.org/standard/rationale
\ multiply cos by factor scale
-CALL #XSCALE
-MOV X,0(PSP) \ 3 hi result = cos
+ CALL #XSCALE
+ MOV X,0(PSP) \ 3 hi result = cos
\ multiply sin by factor scale
-MOV Y,X \ 3
-CALL #XSCALE
-MOV X,TOS \ 3 hi result = sin
+ MOV Y,X \ 3
+ CALL #XSCALE
+ MOV X,TOS \ 3 hi result = sin
\ ==================
\ endof CORDIC engine \ X = cos, Y = sin
\ ==================
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE \ -- cos sin
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE \ -- cos sin
\ REC2POL version with inputs scaling, to increase the accuracy of the angle:
\ input : X < 16384, Y < 16384
\ output ; u = hypothenuse, f = angle (15Q16 number) in degrees
\ rounded hypothenuse, 1 mn accuracy angle
-CODE REC2POL \ X Y -- u f
-MOV @PSP,X \ X = Xi
-MOV TOS,Y \ Y = Yi
+ CODE REC2POL \ X Y -- u f
+ MOV @PSP,X \ X = Xi
+ MOV TOS,Y \ Y = Yi
\ normalize X Y to 16384 maxi
\ 1- calculate T = |Y|
-MOV Y,T
-CMP #0,T
-S< IF
- XOR #-1,T
- ADD #1,T
-THEN
+ MOV Y,T
+ CMP #0,T
+ S< IF
+ XOR #-1,T
+ ADD #1,T
+ THEN
\ 2- calculate S = |X|
-MOV X,S
-CMP #0,S
-S< IF
- XOR #-1,S
- ADD #1,S
-THEN
+ MOV X,S
+ CMP #0,S
+ S< IF
+ XOR #-1,S
+ ADD #1,S
+ THEN
\ 3- abort if null inputs
-MOV #-1,TOS \ set TOS TRUE for the two ABORT" below
-CMP #0,X
-0= IF
- CMP #0,Y
+ MOV #-1,TOS \ set TOS TRUE for the two ABORT" below
+ CMP #0,X
0= IF
- LO2HI
- ABORT" null inputs!"
- HI2LO
+ CMP #0,Y
+ 0= IF
+ LO2HI
+ ABORT" null inputs!"
+ HI2LO
+ THEN
THEN
-THEN
\ 4- select max of |X|,|Y|
-CMP S,T
-U< IF \ |X| > |Y|
- MOV S,T
-THEN
-\ 5- abort if |X| or |Y| >= 16384
-CMP #16384,T
- U>= IF
- LO2HI
- ABORT" |x| or |y| >= 16384"
- HI2LO
+ CMP S,T
+ U< IF \ |X| > |Y|
+ MOV S,T
THEN
+\ 5- abort if |X| or |Y| >= 16384
+ CMP #16384,T
+ U>= IF
+ LO2HI
+ ABORT" |x| or |y| >= 16384"
+ HI2LO
+ THEN
\ 6- multiply inputs by 2^n scale factor
-MOV #1,S \ init scale factor
-RLAM #3,T \ test bit 2^13 of max(X,Y)
-GOTO FW1
-BEGIN
- ADD X,X \ X=X*2
- ADD Y,Y \ Y=Y*2
- ADD S,S \ scale factor *2
- ADD T,T \ to test next bit 2^(n-1)
+ MOV #1,S \ init scale factor
+ RLAM #3,T \ test bit 2^13 of max(X,Y)
+ GOTO FW1
+ BEGIN
+ ADD X,X \ X=X*2
+ ADD Y,Y \ Y=Y*2
+ ADD S,S \ scale factor *2
+ ADD T,T \ to test next bit 2^(n-1)
FW1
-U>= UNTIL \ until carry set
+ U>= UNTIL \ until carry set
\ 7- save IP and scale factor n
-PUSHM #2,IP \ push IP,S
+ PUSHM #2,IP \ push IP,S
\ ==================
-\ CORDIC engine
+\ CORDIC 16 bits engine
\ ==================
-MOV #-1,IP \ IP = i-1, X = Xi, Y = Yi
-MOV #0,TOS \ init z=0
- BEGIN \ i loops with init: i = -1
- ADD #1,IP \ i = i+1
- MOV X,S \ S = Xi to be right shifted
- MOV Y,T \ T = Yi to be right shifted
- MOV #0,W \ W = right shift loop count
- GOTO FW1
- BEGIN
- RRA S \ (X >> i)
- RRA T \ (Y >> i)
- ADD #1,W \
-FW1 CMP IP,W \ W = i ?
- 0= UNTIL \ 6~ loop
- ADD W,W \ W = 2i = T_SCALE displacement
- CMP #0,Y \ Y sign ?
- S>= IF \ Y >= 0 : Rotate counter-clockwise
- ADD T,X \ Xi+1 = Xi + ( Yi >> i)
- SUB S,Y \ Yi+1 = Yi - ( Xi >> i)
- ADD T_ARCTAN(W),TOS
- ELSE \ Y < 0 : Rotate clockwise
- SUB T,X \ Xi+1 = Xi - ( Yi >> i)
- ADD S,Y \ Yi+1 = Yi + ( Xi >> i)
- SUB T_ARCTAN(W),TOS
- THEN
- CMP #0,Y \
- 0<> WHILE \ if Y = 0 quit loop ---+
- CMP #14,IP \ |
- 0= UNTIL \ |
- THEN \ <---------------------+
+ MOV #-1,IP \ IP = i-1, X = Xi, Y = Yi
+ MOV #0,TOS \ init z=0
+ BEGIN \ i loops with init: i = -1
+ ADD #1,IP \ i = i+1
+ MOV X,S \ S = Xi to be right shifted
+ MOV Y,T \ T = Yi to be right shifted
+ MOV #0,W \ W = right shift loop count
+ GOTO FW1
+ BEGIN
+ RRA S \ (X >> i)
+ RRA T \ (Y >> i)
+ ADD #1,W \
+FW1 CMP IP,W \ W = i ?
+ 0= UNTIL \ 6~ loop
+ ADD W,W \ W = 2i = T_SCALE displacement
+ CMP #0,Y \ Y sign ?
+ S>= IF \ Y >= 0 : Rotate counter-clockwise
+ ADD T,X \ Xi+1 = Xi + ( Yi >> i)
+ SUB S,Y \ Yi+1 = Yi - ( Xi >> i)
+ ADD T_ARCTAN(W),TOS
+ ELSE \ Y < 0 : Rotate clockwise
+ SUB T,X \ Xi+1 = Xi - ( Yi >> i)
+ ADD S,Y \ Yi+1 = Yi + ( Xi >> i)
+ SUB T_ARCTAN(W),TOS
+ THEN
+ CMP #0,Y \
+ 0<> WHILE \ if Y = 0 quit loop ---+
+ CMP #14,IP \ |
+ 0= UNTIL \ |
+ THEN \ <---------------------+
\ multiply x by CORDIC gain
-CALL #XSCALE \ 3 hi result = hypothenuse
+ CALL #XSCALE \ 3 hi result = hypothenuse
\ ==================
\ endof CORDIC engine \ X = hypothenuse, TOS = 256*angle
\ ==================
\ divide x by scale factor
-POPM #2,IP \ S = scale factor, restore IP
-GOTO FW1
-BEGIN \ 4~ loop
- RRA X \ divide x by 2
-FW1 RRA S \ shift right scale factor
-U>= UNTIL \ until carry set
-MOV X,0(PSP)
-
+ POPM #2,IP \ S = scale factor, restore IP
+ GOTO FW1
+ BEGIN \ 4~ loop
+ RRA X \ divide x by 2
+FW1 RRA S \ shift right scale factor
+ U>= UNTIL \ until carry set
+ MOV X,0(PSP)
\ divide z by 286 to display it as a Q15.16 number
-SUB #4,PSP \ -- X * * Zhi
-MOV TOS,rDOCON \ -- rDOCON as sign of QUOT
-CMP #0,rDOCON
-S< IF
- XOR #-1,TOS
- ADD #1,TOS
-THEN
-MOV #0,2(PSP) \ -- X Zlo * Zhi
-MOV TOS,0(PSP) \ -- X Zlo Zhi Zhi
-MOV #286,TOS \ -- X Zlo Zhi DIV
-CALL #MUSMOD \ -- X rem QUOTlo QUOThi
-MOV @PSP+,0(PSP) \ remove remainder
-CMP #0,rDOCON
-S< IF
- XOR #-1,0(PSP)
- XOR #-1,TOS
- ADD #1,0(PSP)
- ADDC #0,TOS
-THEN
-MOV #XDOCON,rDOCON
-MOV @IP+,PC
-ENDCODE
-
-
-[UNDEFINED] F. [IF]
-CODE F. \ display a Q15.16 number with 4/5/16 digits after comma
-MOV TOS,S \ S = sign
-MOV #4,T \ T = 4 preset 4 digits for base 16 and by default
-MOV &BASEADR,W
-CMP ##10,W
-0= IF \ if base 10
- ADD #1,T \ T = 5 set 5 digits
-ELSE
- CMP #%10,W
- 0= IF \ if base 2
- MOV #16,T \ T = 16 set 16 digits
+ SUB #4,PSP \ -- X * * Zhi
+ MOV TOS,rDOCON \ -- rDOCON as sign of QUOT
+ CMP #0,rDOCON
+ S< IF
+ XOR #-1,TOS
+ ADD #1,TOS
THEN
-THEN
-PUSHM #3,IP \ R-- IP sign #digit
-LO2HI
- <# DABS \ -- uQlo uQhi R-- IP sign #digit
- R> F#S \ -- uQhi 0 R-- IP sign
- $2C HOLD \ $2C = char ','
- #S \ -- 0 0
- R> SIGN #> \ -- addr len R-- IP
- TYPE $20 EMIT \ --
-;
-
-[THEN]
-
-PWR_HERE
-
-[UNDEFINED] SWAP [IF]
+ MOV #0,2(PSP) \ -- X Zlo * Zhi
+ MOV TOS,0(PSP) \ -- X Zlo Zhi Zhi
+ MOV #286,TOS \ -- X Zlo Zhi DIV
+ CALL #MUSMOD \ -- X rem QUOTlo QUOThi
+ MOV @PSP+,0(PSP) \ remove remainder
+ CMP #0,rDOCON
+ S< IF
+ XOR #-1,0(PSP)
+ XOR #-1,TOS
+ ADD #1,0(PSP)
+ ADDC #0,TOS
+ THEN
+ MOV #XDOCON,rDOCON
+ MOV @IP+,PC
+ ENDCODE
+
+
+ [UNDEFINED] F.
+ [IF]
+ CODE F. \ display a Q15.16 number with 4/5/16 digits after comma
+ MOV TOS,S \ S = sign
+ MOV #4,T \ T = 4 preset 4 digits for base 16 and by default
+ MOV &BASEADR,W
+ CMP ##10,W
+ 0= IF \ if base 10
+ ADD #1,T \ T = 5 set 5 digits
+ ELSE
+ CMP #%10,W
+ 0= IF \ if base 2
+ MOV #16,T \ T = 16 set 16 digits
+ THEN
+ THEN
+ PUSHM #3,IP \ R-- IP sign #digit
+ LO2HI
+ <# DABS \ -- uQlo uQhi R-- IP sign #digit
+ R> F#S \ -- uQhi 0 R-- IP sign
+ $2C HOLD \ $2C = char ','
+ #S \ -- 0 0
+ R> SIGN #> \ -- addr len R-- IP
+ TYPE $20 EMIT \ --
+ ;
+
+ [THEN]
+
+RST_SET
+
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-ECHO
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] ROT [IF] \
\ https://forth-standard.org/standard/core/ROT
\ ROT x1 x2 x3 -- x2 x3 x1
-CODE ROT
-MOV @PSP,W \ 2 fetch x2
-MOV TOS,0(PSP) \ 3 store x3
-MOV 2(PSP),TOS \ 3 fetch x1
-MOV W,2(PSP) \ 3 store x2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-; -----------------------------------------------------------
-; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
-; -----------------------------------------------------------
-
-
-10000 89,0 POL2REC . . ; sin, cos -->
-10000 75,0 POL2REC . . ; sin, cos -->
-10000 60,0 POL2REC . . ; sin, cos -->
-10000 45,0 POL2REC . . ; sin, cos -->
-10000 30,0 POL2REC . . ; sin, cos -->
-10000 15,0 POL2REC . . ; sin, cos -->
-10000 1,0 POL2REC . . ; sin, cos -->
+ [UNDEFINED] ROT
+ [IF] \
+ CODE ROT
+ MOV @PSP,W \ 2 fetch x2
+ MOV TOS,0(PSP) \ 3 store x3
+ MOV 2(PSP),TOS \ 3 fetch x1
+ MOV W,2(PSP) \ 3 store x2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ECHO
+
+10000 89,0 POL2REC . . ; sin, cos -->
+10000 75,0 POL2REC . . ; sin, cos -->
+10000 60,0 POL2REC . . ; sin, cos -->
+10000 45,0 POL2REC . . ; sin, cos -->
+10000 30,0 POL2REC . . ; sin, cos -->
+10000 15,0 POL2REC . . ; sin, cos -->
+10000 1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
-16384 30,0 POL2REC SWAP . . ; x, y -->
-16384 45,0 POL2REC SWAP . . ; x, y -->
-16384 60,0 POL2REC SWAP . . ; x, y -->
+16384 30,0 POL2REC SWAP . . ; x, y -->
+16384 45,0 POL2REC SWAP . . ; x, y -->
+16384 60,0 POL2REC SWAP . . ; x, y -->
\
-10000 -89,0 POL2REC . . ; sin, cos -->
-10000 -75,0 POL2REC . . ; sin, cos -->
-10000 -60,0 POL2REC . . ; sin, cos -->
-10000 -45,0 POL2REC . . ; sin, cos -->
-10000 -30,0 POL2REC . . ; sin, cos -->
-10000 -15,0 POL2REC . . ; sin, cos -->
-10000 -1,0 POL2REC . . ; sin, cos -->
+10000 -89,0 POL2REC . . ; sin, cos -->
+10000 -75,0 POL2REC . . ; sin, cos -->
+10000 -60,0 POL2REC . . ; sin, cos -->
+10000 -45,0 POL2REC . . ; sin, cos -->
+10000 -30,0 POL2REC . . ; sin, cos -->
+10000 -15,0 POL2REC . . ; sin, cos -->
+10000 -1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
-16384 -30,0 POL2REC SWAP . . ; x, y -->
-16384 -45,0 POL2REC SWAP . . ; x, y -->
-16384 -60,0 POL2REC SWAP . . ; x, y -->
+16384 -30,0 POL2REC SWAP . . ; x, y -->
+16384 -45,0 POL2REC SWAP . . ; x, y -->
+16384 -60,0 POL2REC SWAP . . ; x, y -->
\
--10000 89,0 POL2REC . . ; sin, cos -->
--10000 75,0 POL2REC . . ; sin, cos -->
--10000 60,0 POL2REC . . ; sin, cos -->
--10000 45,0 POL2REC . . ; sin, cos -->
--10000 30,0 POL2REC . . ; sin, cos -->
--10000 15,0 POL2REC . . ; sin, cos -->
--10000 1,0 POL2REC . . ; sin, cos -->
+-10000 89,0 POL2REC . . ; sin, cos -->
+-10000 75,0 POL2REC . . ; sin, cos -->
+-10000 60,0 POL2REC . . ; sin, cos -->
+-10000 45,0 POL2REC . . ; sin, cos -->
+-10000 30,0 POL2REC . . ; sin, cos -->
+-10000 15,0 POL2REC . . ; sin, cos -->
+-10000 1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
--16384 30,0 POL2REC SWAP . . ; x, y -->
--16384 45,0 POL2REC SWAP . . ; x, y -->
--16384 60,0 POL2REC SWAP . . ; x, y -->
+-16384 30,0 POL2REC SWAP . . ; x, y -->
+-16384 45,0 POL2REC SWAP . . ; x, y -->
+-16384 60,0 POL2REC SWAP . . ; x, y -->
\
--10000 -89,0 POL2REC . . ; sin, cos -->
--10000 -75,0 POL2REC . . ; sin, cos -->
--10000 -60,0 POL2REC . . ; sin, cos -->
--10000 -45,0 POL2REC . . ; sin, cos -->
--10000 -30,0 POL2REC . . ; sin, cos -->
--10000 -15,0 POL2REC . . ; sin, cos -->
--10000 -1,0 POL2REC . . ; sin, cos -->
+-10000 -89,0 POL2REC . . ; sin, cos -->
+-10000 -75,0 POL2REC . . ; sin, cos -->
+-10000 -60,0 POL2REC . . ; sin, cos -->
+-10000 -45,0 POL2REC . . ; sin, cos -->
+-10000 -30,0 POL2REC . . ; sin, cos -->
+-10000 -15,0 POL2REC . . ; sin, cos -->
+-10000 -1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
--16384 -30,0 POL2REC SWAP . . ; x, y -->
--16384 -45,0 POL2REC SWAP . . ; x, y -->
--16384 -60,0 POL2REC SWAP . . ; x, y -->
+-16384 -30,0 POL2REC SWAP . . ; x, y -->
+-16384 -45,0 POL2REC SWAP . . ; x, y -->
+-16384 -60,0 POL2REC SWAP . . ; x, y -->
\
-2 1 REC2POL F. . ; phase module -->
-2 -1 REC2POL F. . ; phase module -->
-20 10 REC2POL F. . ; phase module -->
-20 -10 REC2POL F. . ; phase module -->
-200 100 REC2POL F. . ; phase module -->
-100 -100 REC2POL F. . ; phase module -->
-2000 1000 REC2POL F. . ; phase module -->
-1000 -1000 REC2POL F. . ; phase module -->
-16000 8000 REC2POL F. . ; phase module -->
-16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
+2 1 REC2POL F. . ; phase module -->
+2 -1 REC2POL F. . ; phase module -->
+20 10 REC2POL F. . ; phase module -->
+20 -10 REC2POL F. . ; phase module -->
+200 100 REC2POL F. . ; phase module -->
+100 -100 REC2POL F. . ; phase module -->
+2000 1000 REC2POL F. . ; phase module -->
+1000 -1000 REC2POL F. . ; phase module -->
+16000 8000 REC2POL F. . ; phase module -->
+16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
\ 16384 -8192 REC2POL F. . ; --> abort
\ 0 0 REC2POL F. . ; --> abort
--2 1 REC2POL F. . ; phase module -->
--2 -1 REC2POL F. . ; phase module -->
--20 10 REC2POL F. . ; phase module -->
--20 -10 REC2POL F. . ; phase module -->
--200 100 REC2POL F. . ; phase module -->
--100 -100 REC2POL F. . ; phase module -->
--2000 1000 REC2POL F. . ; phase module -->
--1000 -1000 REC2POL F. . ; phase module -->
--16000 8000 REC2POL F. . ; phase module -->
--16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
+-2 1 REC2POL F. . ; phase module -->
+-2 -1 REC2POL F. . ; phase module -->
+-20 10 REC2POL F. . ; phase module -->
+-20 -10 REC2POL F. . ; phase module -->
+-200 100 REC2POL F. . ; phase module -->
+-100 -100 REC2POL F. . ; phase module -->
+-2000 1000 REC2POL F. . ; phase module -->
+-1000 -1000 REC2POL F. . ; phase module -->
+-16000 8000 REC2POL F. . ; phase module -->
+-16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
\ 16384 -8192 REC2POL F. . ; --> abort
\ 0 0 REC2POL F. . ; --> abort
-10000 89,0 POL2REC REC2POL ROT . F.
-10000 75,0 POL2REC REC2POL ROT . F.
-10000 60,0 POL2REC REC2POL ROT . F.
-10000 45,0 POL2REC REC2POL ROT . F.
-10000 30,0 POL2REC REC2POL ROT . F.
-10000 26,565 POL2REC REC2POL ROT . F.
-10000 15,0 POL2REC REC2POL ROT . F.
-10000 14,036 POL2REC REC2POL ROT . F.
-10000 7,125 POL2REC REC2POL ROT . F.
-10000 1,0 POL2REC REC2POL ROT . F.
+10000 89,0 POL2REC REC2POL ROT . F.
+10000 75,0 POL2REC REC2POL ROT . F.
+10000 60,0 POL2REC REC2POL ROT . F.
+10000 45,0 POL2REC REC2POL ROT . F.
+10000 30,0 POL2REC REC2POL ROT . F.
+10000 26,565 POL2REC REC2POL ROT . F.
+10000 15,0 POL2REC REC2POL ROT . F.
+10000 14,036 POL2REC REC2POL ROT . F.
+10000 7,125 POL2REC REC2POL ROT . F.
+10000 1,0 POL2REC REC2POL ROT . F.
\ ; CORETEST.4TH for any FastForth target
\ ; -------------------------------------
-[DEFINED] {CORETEST} [IF] {CORETEST} [THEN]
-
MARKER {CORETEST}
-: ABORT_TEST
-$0D EMIT \ return to column 1
-POSTPONE {CORETEST} \ that remove all test words
+: ABORT_TEST \ flag --
+$0D EMIT \ return to column 1
+POSTPONE {CORETEST} \ remove all test words
ABORT" {CORE_ANS} word set not found !"
;
[UNDEFINED] {CORE_ANS} ABORT_TEST
: CORETESTSUCCESS
-$0A BASE !
-$0D EMIT \ return to column 1
-{CORETEST} \ that remove all test words
-1 ABORT" CORE tests success!"
+$0D EMIT \ -- $0D return to column 1
+$0A BASE ! \ set decimal
+{CORETEST} \ remove all test words
+." CORETEST + COREPLUSTEST success!" \ true --
;
+[UNDEFINED] SM/REM [IF]
+CODE SM/REM
+MOV R14,R12
+MOV @R15,R11
+CMP #0,R14
+S< IF
+ XOR #-1,R14
+ ADD #1,R14
+THEN
+CMP #0,0(R15)
+S< IF
+ XOR #-1,2(R15)
+ XOR #-1,0(R15)
+ ADD #1,2(R15)
+ ADDC #0,0(R15)
+THEN
+PUSHM #3,R13
+LO2HI
+ UM/MOD
+HI2LO
+POPM #3,R13
+CMP #0,R11
+S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+THEN
+XOR R12,R11
+CMP #0,R11
+S< IF
+ XOR #-1,R14
+ ADD #1,R14
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] FM/MOD [IF]
+\ https://forth-standard.org/standard/core/FMDivMOD
+\ FM/MOD d1 n1 -- r q floored signed div'n
+: FM/MOD
+SM/REM
+HI2LO \ -- remainder quotient S=divisor
+CMP #0,0(R15) \ remainder <> 0 ?
+0<> IF
+ CMP #1,R14 \ quotient < 1 ?
+ S< IF
+ ADD R12,0(R15) \ add divisor to remainder
+ SUB #1,R14 \ decrement quotient
+ THEN
+THEN
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
\ From: John Hayes S1I
\ Subject: tester.fr
\ Date: Mon, 27 Nov 95 13:10:09 PST
\ DO 0 LOOP
\ ELSE 0 DO DROP LOOP THEN
\ THEN ;
-\
+\
\ : ERROR \ ( C-ADDR U -- ) DISPLAY AN ERROR MESSAGE FOLLOWED BY
\ \ THE LINE THAT HAD THE ERROR.
\ TYPE SOURCE TYPE CR \ DISPLAY LINE CORRESPONDING TO ERROR
: ACCEPT-TEST
CR ." PLEASE TYPE UP TO 80 CHARACTERS: "
-ABUF 80 \ ACCEPT \ JMT
+ABUF 80 \ ACCEPT \ JMT
['] ACCEPT >BODY \ JMT: find default part of deferred ACCEPT
EXECUTE \ JMT: execute ACCEPT
CR ." RECEIVED: " [CHAR] " EMIT
T{ GDX -> 123 234 }T
-\ ------------------------------------------------------------------------
-TESTING TO VALUE :NONAME IS DEFER
-
-[DEFINED] VALUE [IF]
-T{ 111 VALUE v1 -> }T
-T{ -999 VALUE v2 -> }T
-T{ v1 -> 111 }T
-T{ v2 -> -999 }T
-T{ 222 TO v1 -> }T
-T{ v1 -> 222 }T
-T{ : vd1 v1 ; -> }T
-T{ vd1 -> 222 }T
-T{ : vd2 TO v2 ; -> }T
-T{ v2 -> -999 }T
-T{ -333 vd2 -> }T
-T{ v2 -> -333 }T
-T{ v1 -> 222 }T
-[THEN]
-
-[DEFINED] :NONAME [IF]
-
-[UNDEFINED] CASE [IF]
-\ https://forth-standard.org/standard/core/CASE
-: CASE 0 ; IMMEDIATE \ -- #of-1
-
-\ https://forth-standard.org/standard/core/OF
-: OF \ #of-1 -- orgOF #of
-1+ \ count OFs
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE OVER POSTPONE = \ copy and test case value
-POSTPONE IF \ add orig to control flow stack
-POSTPONE DROP \ discards case value if =
-R> \ we can bring count back now
-; IMMEDIATE
-
-\ https://forth-standard.org/standard/core/ENDOF
-: ENDOF \ orgOF #of -- orgENDOF #of
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE ELSE
-R> \ we can bring count back now
-; IMMEDIATE
-
-\ https://forth-standard.org/standard/core/ENDCASE
-: ENDCASE \ orgENDOF1..orgENDOFn #of --
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-VARIABLE nn1
-VARIABLE nn2
-T{ :NONAME 1234 ; nn1 ! -> }T
-T{ :NONAME 9876 ; nn2 ! -> }T
-T{ nn1 @ EXECUTE -> 1234 }T
-T{ nn2 @ EXECUTE -> 9876 }T
-
-T{ :NONAME ( n -- 0,1,..n ) DUP IF DUP >R 1- RECURSE R> THEN ;
- CONSTANT RN1 -> }T
-T{ 0 RN1 EXECUTE -> 0 }T
-T{ 4 RN1 EXECUTE -> 0 1 2 3 4 }T
-
-:NONAME ( n -- n1 ) \ Multiple RECURSEs in one definition
- 1- DUP
- CASE 0 OF EXIT ENDOF
- 1 OF 11 SWAP RECURSE ENDOF
- 2 OF 22 SWAP RECURSE ENDOF
- 3 OF 33 SWAP RECURSE ENDOF
- DROP ABS RECURSE EXIT
- ENDCASE
-; CONSTANT RN2
+CR .( End of Core word set tests) \ "
-T{ 1 RN2 EXECUTE -> 0 }T
-T{ 2 RN2 EXECUTE -> 11 0 }T
-T{ 4 RN2 EXECUTE -> 33 22 11 0 }T
-T{ 25 RN2 EXECUTE -> 33 22 11 0 }T
-
-[THEN]
-
-[DEFINED] IS [IF]
-T{ DEFER defer5 -> }T
-T{ : is-defer5 IS defer5 ; -> }T
-T{ ' * IS defer5 -> }T
-T{ 2 3 defer5 -> 6 }T
-T{ ' + is-defer5 -> }T
-T{ 1 2 defer5 -> 3 }T
-[THEN]
-
-\ ==============================================================================
+\ =============================================================================
\ COREPLUSTEST
-\ ==============================================================================
+\ =============================================================================
\ Additional tests on the the ANS Forth Core word set
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
\ https://raw.githubusercontent.com/gerryjackson/forth2012-test-suite/master/src/coreplustest.fth
\ This program was written by Gerry Jackson in 2007, with contributions from
\ but WITHOUT ANY WARRANTY; without even the implied warranty of
\ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-\ The tests are not claimed to be comprehensive or correct
+\ The tests are not claimed to be comprehensive or correct
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
\ The tests are based on John Hayes test program for the core word set
\
\ This file provides some more tests on Core words where the original Hayes
\ Parsing behaviour
\ Number prefixes # $ % and 'A' character input
\ Definition names
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
\ Assumptions and dependencies:
\ - tester.fr or ttester.fs has been loaded prior to this file
\ - core.fr has been loaded so that constants <TRUE> MAX-INT, MIN-INT and
\ MAX-UINT are defined
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
DECIMAL
T{ -20 31 -10 GD7 -> 31 21 11 1 -9 -19 6 }T
T{ -20 29 -10 GD7 -> 29 19 9 -1 -11 5 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING DO +LOOP with large and small increments
\ Contributed by Andrew Haley
T{ 0 MIN-INT MAX-INT STEP +WRAP? 1 GD9
T{ 0 MAX-INT MIN-INT -STEP -WRAP? 1 GD9
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING DO +LOOP with maximum and minimum increments
: (-MI) MAX-INT DUP NEGATE + 0= IF MAX-INT NEGATE ELSE -32767 THEN ;
T{ 0 MIN-INT 1+ 1 MIN-INT GD8 -> 2 }T
T{ 0 MIN-INT 1+ DUP MIN-INT GD8 -> 1 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
\ TESTING +LOOP setting I to an arbitrary value
\ The specification for +LOOP permits the loop index I to be set to any value
\ n2 is the value of I in a DO ... +LOOP
\ n3 is a test value
\ If n2=n3 then return n1-n2 else return 1
-: SET-I ( n1 n2 n3 -- n1-n2 | 1 )
+: SET-I ( n1 n2 n3 -- n1-n2 | 1 )
OVER = IF - ELSE 2DROP 1 THEN
;
: PL8 -20 -5 DO I -20 I -2 -SET-I DUP -1 = IF DROP 0 I -6 -SET-I THEN +LOOP ;
T{ PL8 -> -5 -6 0 -1 -2 -20 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING multiple RECURSEs in one colon definition
: ACK ( m n -- u ) \ Ackermann function, from Rosetta Code
T{ 3 0 ACK -> 5 }T
T{ 2 4 ACK -> 11 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING multiple ELSE's in an IF statement
\ Discussed on comp.lang.forth and accepted as valid ANS Forth
T{ 0 MELSE -> 2 4 }T
T{ -1 MELSE -> 1 3 5 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING manipulation of >IN in interpreter mode
T{ 12345 DEPTH OVER 9 < 34 AND + 3 + >IN ! -> 12345 2345 345 45 5 }T
T{ 14145 8115 ?DUP 0= 34 AND >IN +! TUCK MOD 14 >IN ! GCD CALCULATION -> 15 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING IMMEDIATE with CONSTANT VARIABLE and CREATE [ ... DOES> ]
T{ 123 CONSTANT IW1 IMMEDIATE IW1 -> 123 }T
T{ : IW2 IW1 LITERAL ; IW2 -> 123 }T
T{ VARIABLE IW3 IMMEDIATE 234 IW3 ! IW3 @ -> 234 }T
T{ : IW4 IW3 [ @ ] LITERAL ; IW4 -> 234 }T
-\ T{ :NONAME [ 345 ] IW3 [ ! ] ; DROP IW3 @ -> 345 }T
+T{ :NONAME [ 345 ] IW3 [ ! ] ; DROP IW3 @ -> 345 }T
T{ CREATE IW5 456 , IMMEDIATE -> }T
-\ T{ :NONAME IW5 [ @ IW3 ! ] ; DROP IW3 @ -> 456 }T
+T{ :NONAME IW5 [ @ IW3 ! ] ; DROP IW3 @ -> 456 }T
T{ : IW6 CREATE , IMMEDIATE DOES> @ 1+ ; -> }T
T{ 111 IW6 IW7 IW7 -> 112 }T
T{ : IW8 IW7 LITERAL 1+ ; IW8 -> 113 }T
T{ 222 IW9 IW10 FIND-IW IW10 -> -1 }T \ IW10 is not immediate
T{ IW10 FIND-IW IW10 -> 224 1 }T \ IW10 becomes immediate
-[DEFINED] :NONAME [IF]
-T{ :NONAME [ 345 ] IW3 [ ! ] ; DROP IW3 @ -> 345 }T
-T{ :NONAME IW5 [ @ IW3 ! ] ; DROP IW3 @ -> 456 }T
-[THEN]
-
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING that IMMEDIATE doesn't toggle a flag
VARIABLE IT1 0 IT1 !
: IT2 1234 IT1 ! ; IMMEDIATE IMMEDIATE
T{ : IT3 IT2 ; IT1 @ -> 1234 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING parsing behaviour of S" ." and (
\ which should parse to just beyond the terminating character no space needed
T{ : GC5 S" A string"2DROP ; GC5 -> }T
T{ ( A comment)1234 -> 1234 }T
T{ : PB1 CR ." You should see 2345: "." 2345"( A comment) CR ; PB1 -> }T
-
-\ ------------------------------------------------------------------------------
+
+\ -----------------------------------------------------------------------------
TESTING number prefixes # $ % and 'c' character input
\ Adapted from the Forth 200X Draft 14.5 document
\ Check number prefixes in compile mode
T{ : nmp #8327 $-2cbe %011010111 ''' ; nmp -> 8327 -11454 215 39 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING definition names
\ should support {1..31} graphical characters
: !"#$%&'()*+,-./0123456789:;<=>? 1 ;
T{ _`abcdefghijklmnopqrstuvwxyz{|~ -> 4 }T
T{ _`abcdefghijklmnopqrstuvwxyz{|} -> 3 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING FIND with a zero length string and a non-existent word
CREATE EMPTYSTRING 0 C,
CHAR $ C, CHAR $ C,
T{ NON-EXISTENT-WORD FIND -> NON-EXISTENT-WORD 0 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING IF ... BEGIN ... REPEAT (unstructured)
T{ : UNS1 DUP 0 > IF 9 SWAP BEGIN 1+ DUP 3 > IF EXIT THEN REPEAT ; -> }T
T{ -6 UNS1 -> -6 }T
T{ 1 UNS1 -> 9 4 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING DOES> doesn't cause a problem with a CREATEd address
: MAKE-2CONST DOES> 2@ ;
T{ CREATE 2K 3 , 2K , MAKE-2CONST 2K -> ' 2K >BODY 3 }T
-\ ------------------------------------------------------------------------------
+\ -----------------------------------------------------------------------------
TESTING ALLOT ( n -- ) where n <= 0
T{ HERE 5 ALLOT -5 ALLOT HERE = -> <TRUE> }T
T{ HERE 0 ALLOT HERE = -> <TRUE> }T
-
+
\ -----------------------------------------------------------------------------
-TESTING MARKER (contributed by James Bowman)
-[DEFINED] MARKER [IF]
+CR .( End of additional Core tests) \ "
+
+\ -----------------------------------------------------------------------------
+TESTING TO VALUE :NONAME IS DEFER
+
+T{ 111 VALUE v1 -> }T
+T{ -999 VALUE v2 -> }T
+T{ v1 -> 111 }T
+T{ v2 -> -999 }T
+T{ 222 TO v1 -> }T
+T{ v1 -> 222 }T
+T{ : vd1 v1 ; -> }T
+T{ vd1 -> 222 }T
+T{ : vd2 TO v2 ; -> }T
+T{ v2 -> -999 }T
+T{ -333 vd2 -> }T
+T{ v2 -> -333 }T
+T{ v1 -> 222 }T
+
+VARIABLE nn1
+VARIABLE nn2
+T{ :NONAME 1234 ; nn1 ! -> }T
+T{ :NONAME 9876 ; nn2 ! -> }T
+T{ nn1 @ EXECUTE -> 1234 }T
+T{ nn2 @ EXECUTE -> 9876 }T
+
+T{ :NONAME ( n -- 0,1,..n ) DUP IF DUP >R 1- RECURSE R> THEN ;
+ CONSTANT RN1 -> }T
+T{ 0 RN1 EXECUTE -> 0 }T
+T{ 4 RN1 EXECUTE -> 0 1 2 3 4 }T
- [UNDEFINED] 0<> [IF]
- CODE 0<>
- CMP #0,R14
- 0<> IF MOV #-1,R14 THEN
- MOV @R13+,R0
- ENDCODE
- [THEN]
+:NONAME ( n -- n1 ) \ Multiple RECURSEs in one definition
+ 1- DUP
+ CASE 0 OF EXIT ENDOF
+ 1 OF 11 SWAP RECURSE ENDOF
+ 2 OF 22 SWAP RECURSE ENDOF
+ 3 OF 33 SWAP RECURSE ENDOF
+ DROP ABS RECURSE EXIT
+ ENDCASE
+; CONSTANT RN2
+
+T{ 1 RN2 EXECUTE -> 0 }T
+T{ 2 RN2 EXECUTE -> 11 0 }T
+T{ 4 RN2 EXECUTE -> 33 22 11 0 }T
+T{ 25 RN2 EXECUTE -> 33 22 11 0 }T
+
+
+T{ DEFER defer5 -> }T
+T{ : is-defer5 IS defer5 ; -> }T
+T{ ' * IS defer5 -> }T
+T{ 2 3 defer5 -> 6 }T
+T{ ' + is-defer5 -> }T
+T{ 1 2 defer5 -> 3 }T
+
+\ -----------------------------------------------------------------------------
+TESTING MARKER (contributed by James Bowman)
T{ : MA? BL WORD FIND NIP 0<> ; -> }T
T{ MARKER MA0 -> }T
T{ MA0 -> }T
T{ MA? MA0 MA? MA1 MA? MA2 -> FALSE FALSE FALSE }T
-[THEN]
-
-
-CR .( End of Core word set tests)
-
CORETESTSUCCESS
\ -*- coding: utf-8 -*-
\
-\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP
-\ to see FastForth kernel options, download FF_SPECS.f
-\
\ TARGET SELECTION ( = the name of \INC\target.pat file without the extension)
\ (used by preprocessor GEMA to load the pattern: \inc\TARGET.pat)
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
\ ASSEMBLER conditionnal usage with IF UNTIL WHILE S< S>= U< U>= 0= 0<> 0>=
\ ASSEMBLER conditionnal usage with ?GOTO S< S>= U< U>= 0= 0<> 0<
-CODE ABORT_CORE_ANS
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-$0D EMIT \ return to column 1 without CR
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_UARTI2CS before CORE_ANS downloading
-;
+ CODE ABORT_CORE_ANS
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ $0D EMIT \ return to column 1 without CR
+ ABORT" FastForth V3.9 please!"
+ ;
+
+ ABORT_CORE_ANS
+
+\ BC! pattern @ -- Bits Clear in @
+ [UNDEFINED] BC!
+ [IF]
+ CODE BC!
+ BIC @PSP+,0(TOS)
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ BS! pattern @ -- Bits Set in @
+ [UNDEFINED] BS!
+ [IF]
+ CODE BS!
+ BIS @PSP+,0(TOS)
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ =============================================================================
+\ $8000 KERNEL_ADDON BS! \ uncomment to select FLOORED division
+ $8000 KERNEL_ADDON BC! \ uncomment to select SYMMETRIC division
+\ =============================================================================
-ABORT_CORE_ANS
+ RST_RET \ remove all above before CORE_ANS downloading
-; ---------------------------------
+; ----------------------------------
; CORE_ANS.f
-; ---------------------------------
+; ----------------------------------
\
-; words complement to pass CORETEST.4TH
-
-[DEFINED] {CORE_ANS} [IF] {CORE_ANS} [THEN] \ remove it if defined out of kernel
+\ words complement to pass CORETEST.4TH
-[UNDEFINED] {CORE_ANS} [IF] \
+ MARKER {CORE_ANS} \ if already defined removes it before.
-MARKER {CORE_ANS}
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #HEREXEC,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] - [IF]
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DUP
\ DUP x -- x x duplicate top of stack
-CODE DUP
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
BW1 SUB #2,PSP \ 2 push old TOS..
MOV TOS,0(PSP) \ 3 ..onto stack
MOV @IP+,PC \ 4
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/qDUP
\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] EXIT [IF]
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/EXIT
\ EXIT -- exit a colon definition
-CODE EXIT
-MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
-MOV @IP+,PC \ 4 = NEXT
-\ \ 6 (ITC-2)
-ENDCODE
-[THEN]
-
-[UNDEFINED] DEPTH [IF]
+ [UNDEFINED] EXIT
+ [IF]
+ CODE EXIT
+ MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
+ MOV @IP+,PC \ 4 = NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DEPTH
\ DEPTH -- +n number of items on stack, must leave 0 if stack empty
-CODE DEPTH
-MOV TOS,-2(PSP)
-MOV #PSTACK,TOS
-SUB PSP,TOS \ PSP-S0--> TOS
-RRA TOS \ TOS/2 --> TOS
-SUB #2,PSP \ post decrement stack...
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
+ [UNDEFINED] DEPTH
+ [IF]
+ CODE DEPTH
+ MOV TOS,-2(PSP)
+ MOV #PSTACK,TOS
+ SUB PSP,TOS \ PSP-S0--> TOS
+ RRA TOS \ TOS/2 --> TOS
+ SUB #2,PSP \ post decrement stack...
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ PUSH TOS \ 3
+ MOV @PSP,TOS \ 2
+ MOV @RSP+,0(PSP) \ 4
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DROP
\ DROP x -- drop top of stack
-CODE DROP
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/OVER
+\ OVER x1 x2 -- x1 x2 x1
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] NIP [IF]
\ https://forth-standard.org/standard/core/NIP
\ NIP x1 x2 -- x2 Drop the first item below the top of stack
-CODE NIP
-ADD #2,PSP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] NIP
+ [IF]
+ CODE NIP
+ ADD #2,PSP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] >R [IF]
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
-\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] @ [IF]
+\ R> -- x R: x -- pop from return stack
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Fetch
-\ @ c-addr -- char fetch char from memory
-CODE @
-MOV @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] ! [IF]
+\ @ c-addr -- word fetch word from memory
+ [UNDEFINED] @
+ [IF]
+ CODE @
+ MOV @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Store
-\ ! x a-addr -- store cell in memory
-CODE !
-MOV @PSP+,0(TOS) \ 4
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-\ https://forth-standard.org/standard/core/CFetch
+\ ! word c-addr -- store word in memory
+ [UNDEFINED] !
+ [IF]
+ CODE !
+ MOV @PSP+,0(TOS) \ 4
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Fetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] C! [IF]
\ https://forth-standard.org/standard/core/CStore
\ C! char c-addr -- store char in memory
-CODE C!
-MOV.B @PSP+,0(TOS) \ 4
-ADD #1,PSP \ 1
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] C, [IF]
+ [UNDEFINED] C!
+ [IF]
+ CODE C!
+ MOV.B @PSP+,0(TOS) \ 4
+ ADD #1,PSP \ 1
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CComma
\ C, char -- append char
-CODE C,
-MOV &DP,W
-MOV.B TOS,0(W)
-ADD #1,&DP
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
+ [UNDEFINED] C,
+ [IF]
+ CODE C,
+ MOV &DP,W
+ MOV.B TOS,0(W)
+ ADD #1,&DP
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ZeroEqual
\ 0= n/u -- flag return true if TOS=0
-CODE 0=
-SUB #1,TOS \ borrow (clear cy) if TOS was 0
-SUBC TOS,TOS \ TOS=-1 if borrow was set
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0< [IF]
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,TOS \ 1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS \ 1 TOS=-1 if borrow was set
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Zerone
+\ 0<> n/u -- flag return true if TOS<>0
+ [UNDEFINED] 0<>
+ [IF]
+ CODE 0<>
+ SUB #1,TOS \ 1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS \ 1 TOS=-1 if borrow was set
+ XOR #-1,TOS \ 1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Zeroless
\ 0< n -- flag true if TOS negative
-CODE 0<
-ADD TOS,TOS \ 1 set carry if TOS negative
-SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
-XOR #-1,TOS \ 1 TOS=-1 if carry was set
-MOV @IP+,PC \
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
+ [UNDEFINED] 0<
+ [IF]
+ CODE 0<
+BW1 ADD TOS,TOS \ 1 set carry if TOS negative
+ SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
+ XOR #-1,TOS \ 1 TOS=-1 if carry was set
+ MOV @IP+,PC \
+ ENDCODE
+ [THEN]
+
+\ HERE
+
+\ https://forth-standard.org/standard/core/StoD
+\ S>D n -- d single -> double prec.
+ [UNDEFINED] S>D
+ [IF]
+ : S>D
+ DUP 0<
+ ;
+ [THEN]
+
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ SUB #1,TOS \ 1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS \ 1 TOS=-1 if borrow was set
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ https://forth-standard.org/standard/core/Uless
\ U< u1 u2 -- flag test u1<u2, unsigned
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @PSP+,TOS \ 2 u2-u1
-0<> IF
- MOV #-1,TOS \ 1
- U< IF \ 2 flag
- AND #0,TOS \ 1 flag Z = 1
+ [UNDEFINED] U<
+ [IF]
+
+ CODE U<
+ SUB @PSP+,TOS \ 2 u2-u1
+ U< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,TOS \ 1
THEN
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+\ https://forth-standard.org/standard/core/Umore
+\ U> n1 n2 -- flag
+ CODE U>
+ SUB @PSP+,TOS \ 2
+ U< ?GOTO BW1 \ 2 flag = true, Z = 0
+FW1 AND #0,TOS \ 1 Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] < [IF] \ define < and >
\ https://forth-standard.org/standard/core/less
\ < n1 n2 -- flag test n1<n2, signed
-CODE <
- SUB @PSP+,TOS \ 1 TOS=n2-n1
- S< ?GOTO FW1 \ 2 signed
- 0<> IF \ 2
-BW1 MOV #-1,TOS \ 1 flag Z = 0
- THEN
- MOV @IP+,PC
-ENDCODE
+ [UNDEFINED] <
+ [IF] \ define < and >
+
+ CODE <
+ SUB @PSP+,TOS \ 1 TOS=n2-n1
+ S< ?GOTO FW1 \ 2 signed
+ 0<> IF \ 2
+BW1 MOV #-1,TOS \ 1 flag Z = 0
+ THEN
+ MOV @IP+,PC
+ ENDCODE
\ https://forth-standard.org/standard/core/more
\ > n1 n2 -- flag test n1>n2, signed
-CODE >
- SUB @PSP+,TOS \ 2 TOS=n2-n1
- S< ?GOTO BW1 \ 2 --> +5
-FW1 AND #0,TOS \ 1 flag Z = 1
- MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE >
+ SUB @PSP+,TOS \ 2 TOS=n2-n1
+ S< ?GOTO BW1 \ 2 --> +5
+FW1 AND #0,TOS \ 1 flag Z = 1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ ------------------------------------------------------------------------------
\ CONTROL STRUCTURES
\ IF, ELSE, AGAIN, UNTIL, WHILE, REPEAT, LOOP & +LOOP compile two words
\ LEAVE compile three words
\
-[UNDEFINED] IF [IF] \ define IF THEN
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] IF
+ [IF] \ define IF THEN
+
+ CODE IF
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
+ CODE THEN
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ELSE
\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/BEGIN
\ BEGIN -- BEGINadr initialize backward branch
-CODE BEGIN
+ [UNDEFINED] BEGIN
+ [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+
+ CODE BEGIN
MOV #HEREXEC,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/UNTIL
\ UNTIL BEGINadr -- resolve conditional backward branch
-CODE UNTIL \ immediate
+ CODE UNTIL
MOV #QFBRAN,X
BW1 ADD #4,&DP \ compile two words
MOV &DP,W \ W = HERE
MOV TOS,-2(W) \ compile bakcward adr at HERE+2
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/AGAIN
\ AGAIN BEGINadr -- resolve uncondionnal backward branch
-CODE AGAIN \ immediate
-MOV #BRAN,X
-GOTO BW1
-ENDCODE IMMEDIATE
+ CODE AGAIN
+ MOV #BRAN,X
+ GOTO BW1
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/WHILE
\ WHILE BEGINadr -- WHILEadr BEGINadr
-: WHILE \ immediate
-POSTPONE IF SWAP
-; IMMEDIATE
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/REPEAT
\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0, init
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP \ immediate
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
MOV X,-4(W) \ xloop --> HERE
MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP \ immediate
-MOV #XPLOOP,X
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] I [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
-
-[UNDEFINED] J [IF]
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/J
\ J -- n R: 4*sys -- 4*sys
\ C get the second loop index
-CODE J
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV 4(RSP),TOS
-SUB 6(RSP),TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] UNLOOP [IF]
+ [UNDEFINED] J
+ [IF]
+ CODE J
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV 4(RSP),TOS
+ SUB 6(RSP),TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/UNLOOP
\ UNLOOP -- R: sys1 sys2 -- drop loop parms
-CODE UNLOOP
-ADD #4,RSP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] UNLOOP
+ [IF]
+ CODE UNLOOP
+ ADD #4,RSP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] LEAVE [IF]
\ https://forth-standard.org/standard/core/LEAVE
\ LEAVE -- L: -- adrs
-CODE LEAVE
-MOV &DP,W \ compile three words
-MOV #UNLOOP,0(W) \ [HERE] = UNLOOP
-MOV #BRAN,2(W) \ [HERE+2] = BRAN
-ADD #6,&DP \ [HERE+4] = After LOOP adr
-ADD #2,&LEAVEPTR
-ADD #4,W
-MOV &LEAVEPTR,X
-MOV W,0(X) \ leave HERE+4 on LEAVEPTR stack
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] AND [IF]
+ [UNDEFINED] LEAVE
+ [IF]
+ CODE LEAVE
+ MOV &DP,W \ compile three words
+ MOV #UNLOOP,0(W) \ [HERE] = UNLOOP
+ MOV #BRAN,2(W) \ [HERE+2] = BRAN
+ ADD #6,&DP \ [HERE+4] = at adr After LOOP
+ ADD #2,&LEAVEPTR
+ ADD #4,W
+ MOV &LEAVEPTR,X
+ MOV W,0(X) \ leave HERE+4 on LEAVEPTR stack
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/AND
\ C AND x1 x2 -- x3 logical AND
-CODE AND
-AND @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] AND
+ [IF]
+ CODE AND
+ AND @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] OR [IF]
\ https://forth-standard.org/standard/core/OR
-\ C OR x1 x2 -- x3 logical OR
-CODE OR
-BIS @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] XOR [IF]
+\ C OR x1 x2 -- x3 logical OR (BIS, BIts Set)
+ [UNDEFINED] OR
+ [IF]
+ CODE OR
+ BIS @PSP+,TOS
+ AND #-1,TOS \ to set flags
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/XOR
\ C XOR x1 x2 -- x3 logical XOR
-CODE XOR
-XOR @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] S>D [IF]
-\ https://forth-standard.org/standard/core/StoD
-\ S>D n -- d single -> double prec.
-: S>D
- DUP 0<
-;
-[THEN]
+ [UNDEFINED] XOR
+ [IF]
+ CODE XOR
+ XOR @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] + [IF]
-\ https://forth-standard.org/standard/core/Plus
-\ + n1/u1 n2/u2 -- n3/u3
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-\ https://forth-standard.org/standard/core/Minus
-\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
\ https://forth-standard.org/standard/core/OnePlus
\ 1+ n1/u1 -- n2/u2 add 1 to TOS
-CODE 1+
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] 1- [IF]
\ https://forth-standard.org/standard/core/OneMinus
\ 1- n1/u1 -- n2/u2 subtract 1 from TOS
-CODE 1-
-SUB #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 1-
+ [IF]
+ CODE 1-
+ SUB #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] INVERT [IF]
\ https://forth-standard.org/standard/core/INVERT
\ INVERT x1 -- x2 bitwise inversion
-CODE INVERT
-XOR #-1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] INVERT
+ [IF]
+ CODE INVERT
+ XOR #-1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] NEGATE [IF]
\ https://forth-standard.org/standard/core/NEGATE
\ C NEGATE x1 -- x2 two's complement
-CODE NEGATE
-XOR #-1,TOS
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] ABS [IF]
+ [UNDEFINED] NEGATE
+ [IF]
+ CODE NEGATE
+ XOR #-1,TOS
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ABS
\ C ABS n1 -- +n2 absolute value
-CODE ABS
-CMP #0,TOS \ 1
-0>= IF
- MOV @IP+,PC
-THEN
-MOV #NEGATE,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] ABS
+ [IF]
+ CODE ABS
+ CMP #0,TOS \ 1
+ 0>= IF
+ MOV @IP+,PC
+ THEN
+ MOV #NEGATE,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] LSHIFT [IF]
\ https://forth-standard.org/standard/core/LSHIFT
\ LSHIFT x1 u -- x2 logical L shift u places
-CODE LSHIFT
- MOV @PSP+,W
- AND #$1F,TOS \ no need to shift more than 16
-0<> IF
- BEGIN ADD W,W
+ [UNDEFINED] LSHIFT
+ [IF]
+ CODE LSHIFT
+ MOV @PSP+,W
+ AND #$1F,TOS \ no need to shift more than 16
+ 0<> IF
+ BEGIN
+ ADD W,W
SUB #1,TOS
- 0= UNTIL
-THEN MOV W,TOS
- MOV @IP+,PC
-ENDCODE
-[THEN]
+ 0= UNTIL
+ THEN
+ MOV W,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] RSHIFT [IF]
\ https://forth-standard.org/standard/core/RSHIFT
\ RSHIFT x1 u -- x2 logical R7 shift u places
-CODE RSHIFT
- MOV @PSP+,W
- AND #$1F,TOS \ no need to shift more than 16
-0<> IF
- BEGIN BIC #C,SR \ Clr Carry
+ [UNDEFINED] RSHIFT
+ [IF]
+ CODE RSHIFT
+ MOV @PSP+,W
+ AND #$1F,TOS \ no need to shift more than 16
+ 0<> IF
+ BEGIN
+ BIC #C,SR \ Clr Carry
RRC W
SUB #1,TOS
- 0= UNTIL
-THEN MOV W,TOS
- MOV @IP+,PC
-ENDCODE
-[THEN]
+ 0= UNTIL
+ THEN
+ MOV W,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] MAX [IF]
\ https://forth-standard.org/standard/core/MAX
\ MAX n1 n2 -- n3 signed maximum
-CODE MAX
+ [UNDEFINED] MAX
+ [IF]
+
+ CODE MAX
CMP @PSP,TOS \ n2-n1
S< ?GOTO FW1 \ n2<n1
BW1 ADD #2,PSP
MOV @IP+,PC
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/MIN
\ MIN n1 n2 -- n3 signed minimum
-CODE MIN
+ CODE MIN
CMP @PSP,TOS \ n2-n1
S< ?GOTO BW1 \ n2<n1
FW1 MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] 2* [IF]
\ https://forth-standard.org/standard/core/TwoTimes
\ 2* x1 -- x2 arithmetic left shift
-CODE 2*
-ADD TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 2*
+ [IF]
+ CODE 2*
+ ADD TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] 2/ [IF]
\ https://forth-standard.org/standard/core/TwoDiv
\ 2/ x1 -- x2 arithmetic right shift
-CODE 2/
-RRA TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ --------------------
\ ARITHMETIC OPERATORS
\ --------------------
-[UNDEFINED] UM* [IF] ; case of hardware_MPY
+ RST_SET
-\ https://forth-standard.org/standard/core/UMTimes
-\ UM* u1 u2 -- udlo udhi unsigned 16x16->32 mult.
-CODE UM*
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+
+\ $81EF DEVICEID @ U<
+\ DEVICEID @ $81F3 U<
+\ = [IF] ; MSP430FR413x subfamily without hardware_MPY
+ KERNEL_ADDON HMPY TSTBIT \ KERNEL_ADDON(BIT0) = hardware MPY flag
+ RST_RET
+
+ [IF]
+\ https://forth-standard.org/standard/core/MTimes
+\ M* n1 n2 -- dlo dhi signed 16*16->32 multiply
+ CODE UM*
MOV @PSP,&MPY \ Load 1st operand for unsigned multiplication
BW1 MOV TOS,&OP2 \ Load 2nd operand
MOV &RES0,0(PSP) \ low result on stack
MOV &RES1,TOS \ high result in TOS
MOV @IP+,PC
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/MTimes
\ M* n1 n2 -- dlo dhi signed 16*16->32 multiply
-CODE M*
+ CODE M*
MOV @PSP,&MPYS \ Load 1st operand for signed multiplication
GOTO BW1
-ENDCODE
-
-[ELSE] ; MSP430FRxxxx without hardware_MPY
+ ENDCODE
-[UNDEFINED] M* [IF]
-
-\ https://forth-standard.org/standard/core/MTimes
-\ M* n1 n2 -- dlo dhi signed 16*16->32 multiply
-CODE M*
-MOV @PSP,S \ S= n1
-CMP #0,S \ n1 > -1 ?
-S< IF
- XOR #-1,0(PSP) \ n1 --> u1
- ADD #1,0(PSP) \
-THEN
-XOR TOS,S \ S contains sign of result
-CMP #0,TOS \ n2 > -1 ?
-S< IF
- XOR #-1,TOS \ n2 --> u2
- ADD #1,TOS \
-THEN
-PUSHM #2,IP \ UMSTAR use S,T,W,X,Y
-LO2HI \ -- ud1 u2
-UM*
-HI2LO
-POPM #2,IP \ pop S,IP
-CMP #0,S \ sign of result > -1 ?
-S< IF
- XOR #-1,0(PSP) \ ud --> d
- XOR #-1,TOS
- ADD #1,0(PSP)
- ADDC #0,TOS
-THEN
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [ELSE] ; MSP430FRxxxx with hardware_MPY
+\ https://forth-standard.org/standard/core/UMTimes
+\ UM* u1 u2 -- udlo udhi unsigned 16x16->32 mult.
+ [UNDEFINED] M* [IF]
+ CODE M*
+ MOV @PSP,S \ S= n1
+ CMP #0,S \ n1 > -1 ?
+ S< IF
+ XOR #-1,0(PSP) \ n1 --> u1
+ ADD #1,0(PSP) \
+ THEN
+ XOR TOS,S \ S contains sign of result
+ CMP #0,TOS \ n2 > -1 ?
+ S< IF
+ XOR #-1,TOS \ n2 --> u2
+ ADD #1,TOS \
+ THEN
+ PUSHM #2,IP \ UMSTAR use S,T,W,X,Y
+ LO2HI \ -- ud1 u2
+ UM*
+ HI2LO
+ POPM #2,IP \ pop S,IP
+ CMP #0,S \ sign of result > -1 ?
+ S< IF
+ XOR #-1,0(PSP) \ ud --> d
+ XOR #-1,TOS
+ ADD #1,0(PSP)
+ ADDC #0,TOS
+ THEN
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+ [THEN] ; endof hardware_MPY
-[THEN] \ endof hardware MPY
+\ HERE
-[UNDEFINED] UM/MOD [IF]
\ https://forth-standard.org/standard/core/UMDivMOD
\ UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
-CODE UM/MOD
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
PUSH #DROP \
MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
+
+\ HERE OVER - DUMP
-[UNDEFINED] SM/REM [IF]
-\ https://forth-standard.org/standard/core/SMDivREM
-\ SM/REM DVDlo DVDhi DIV -- r3 q4 symmetric signed div
-CODE SM/REM
-MOV TOS,S \ S=DIV
-MOV @PSP,T \ T=DVDhi
-CMP #0,TOS \ n2 >= 0 ?
-S< IF \
- XOR #-1,TOS
- ADD #1,TOS \ -- d1 u2
-THEN
-CMP #0,0(PSP) \ d1hi >= 0 ?
-S< IF \
- XOR #-1,2(PSP) \ d1lo
- XOR #-1,0(PSP) \ d1hi
- ADD #1,2(PSP) \ d1lo+1
- ADDC #0,0(PSP) \ d1hi+C
-THEN \ -- uDVDlo uDVDhi uDIVlo
-PUSHM #3,IP \ save IP,S,T
-LO2HI
- UM/MOD \ -- uREMlo uQUOTlo
-HI2LO
-POPM #3,IP \ restore T,S,IP
-CMP #0,T \ T=DVDhi --> REM_sign
-S< IF
- XOR #-1,0(PSP)
- ADD #1,0(PSP)
-THEN
-XOR S,T \ S=DIV XOR T=DVDhi = Quot_sign
-CMP #0,T \ -- n3 u4 T=quot_sign
-S< IF
- XOR #-1,TOS
- ADD #1,TOS
-THEN \ -- n3 n4 S=divisor
-MOV @IP+,PC
-ENDCODE
-[THEN]
-[UNDEFINED] FM/MOD [IF]
+ KERNEL_ADDON @ 0< ; test the switch: FLOORED / SYMETRIC DIVISION
+ [IF]
\ https://forth-standard.org/standard/core/FMDivMOD
\ FM/MOD d1 n1 -- r q floored signed div'n
-: FM/MOD
-SM/REM
-HI2LO \ -- remainder quotient S=divisor
-CMP #0,0(PSP) \ remainder <> 0 ?
-0<> IF
- CMP #1,TOS \ quotient < 1 ?
- S< IF
- ADD S,0(PSP) \ add divisor to remainder
- SUB #1,TOS \ decrement quotient
- THEN
-THEN
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] FM/MOD
+ [IF]
+ CODE FM/MOD
+ MOV TOS,S \ S=DIV
+ MOV @PSP,T \ T=DVDhi
+ CMP #0,TOS \ n2 >= 0 ?
+ S< IF \
+ XOR #-1,TOS
+ ADD #1,TOS \ -- d1 u2
+ THEN
+ CMP #0,0(PSP) \ d1hi >= 0 ?
+ S< IF \
+ XOR #-1,2(PSP) \ d1lo
+ XOR #-1,0(PSP) \ d1hi
+ ADD #1,2(PSP) \ d1lo+1
+ ADDC #0,0(PSP) \ d1hi+C
+ THEN \ -- uDVDlo uDVDhi uDIVlo
+ PUSHM #2,S \ 4 PUSHM S,T
+ CALL #MUSMOD
+ MOV @PSP+,TOS
+ POPM #2,S \ 4 POPM T,S
+ CMP #0,T \ T=DVDhi --> REM_sign
+ S< IF
+ XOR #-1,0(PSP)
+ ADD #1,0(PSP)
+ THEN
+ XOR S,T \ S=DIV XOR T=DVDhi = Quot_sign
+ CMP #0,T \ -- n3 u4 T=quot_sign
+ S< IF
+ XOR #-1,TOS
+ ADD #1,TOS
+ THEN \ -- n3 n4 S=divisor
+
+ CMP #0,0(PSP) \ remainder <> 0 ?
+ 0<> IF
+ CMP #1,TOS \ quotient < 1 ?
+ S< IF
+ ADD S,0(PSP) \ add divisor to remainder
+ SUB #1,TOS \ decrement quotient
+ THEN
+ THEN
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+ [ELSE]
+\ https://forth-standard.org/standard/core/SMDivREM
+\ SM/REM DVDlo DVDhi DIV -- r3 q4 symmetric signed div
+ [UNDEFINED] SM/REM
+ [IF]
+ CODE SM/REM
+ MOV TOS,S \ S=DIV
+ MOV @PSP,T \ T=DVDhi
+ CMP #0,TOS \ n2 >= 0 ?
+ S< IF \
+ XOR #-1,TOS
+ ADD #1,TOS \ -- d1 u2
+ THEN
+ CMP #0,0(PSP) \ d1hi >= 0 ?
+ S< IF \
+ XOR #-1,2(PSP) \ d1lo
+ XOR #-1,0(PSP) \ d1hi
+ ADD #1,2(PSP) \ d1lo+1
+ ADDC #0,0(PSP) \ d1hi+C
+ THEN \ -- uDVDlo uDVDhi uDIVlo
+ PUSHM #2,S \ 4 PUSHM S,T
+ CALL #MUSMOD
+ MOV @PSP+,TOS
+ POPM #2,S \ 4 POPM T,S
+ CMP #0,T \ T=DVDhi --> REM_sign
+ S< IF
+ XOR #-1,0(PSP)
+ ADD #1,0(PSP)
+ THEN
+ XOR S,T \ S=DIV XOR T=DVDhi = Quot_sign
+ CMP #0,T \ -- n3 u4 T=quot_sign
+ S< IF
+ XOR #-1,TOS
+ ADD #1,TOS
+ THEN \ -- n3 n4 S=divisor
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+ [THEN]
-[UNDEFINED] * [IF]
\ https://forth-standard.org/standard/core/Times
\ * n1 n2 -- n3 signed multiply
-: *
-M* DROP
-;
-[THEN]
+ [UNDEFINED] *
+ [IF]
+ : *
+ M* DROP
+ ;
+ [THEN]
-[UNDEFINED] /MOD [IF]
\ https://forth-standard.org/standard/core/DivMOD
\ /MOD n1 n2 -- r3 q4 signed division
-: /MOD
->R DUP 0< R> FM/MOD
-;
-[THEN]
+ [UNDEFINED] /MOD
+ [IF]
+ : /MOD
+ >R DUP 0< R>
+ [ KERNEL_ADDON @ 0< ] \ test the switch: FLOORED / SYMETRIC DIVISION
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ ;
+ [THEN]
-[UNDEFINED] / [IF]
\ https://forth-standard.org/standard/core/Div
\ / n1 n2 -- n3 signed quotient
-: /
->R DUP 0< R> FM/MOD NIP
-;
-[THEN]
+ [UNDEFINED] /
+ [IF]
+ : /
+ >R DUP 0< R>
+ [ KERNEL_ADDON @ 0< ] \ test the switch: FLOORED / SYMETRIC DIVISION
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ NIP
+ ;
+ [THEN]
-[UNDEFINED] MOD [IF]
\ https://forth-standard.org/standard/core/MOD
\ MOD n1 n2 -- n3 signed remainder
-: MOD
->R DUP 0< R> FM/MOD DROP
-;
-[THEN]
+ [UNDEFINED] MOD
+ [IF]
+ : MOD
+ >R DUP 0< R>
+ [ KERNEL_ADDON @ 0< ] \ test the switch: FLOORED / SYMETRIC DIVISION
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ DROP
+ ;
+ [THEN]
-[UNDEFINED] */MOD [IF]
\ https://forth-standard.org/standard/core/TimesDivMOD
\ */MOD n1 n2 n3 -- r4 q5 signed mult/div
-: */MOD
->R M* R> FM/MOD
-;
-[THEN]
+ [UNDEFINED] */MOD
+ [IF]
+ : */MOD
+ >R M* R>
+ [ KERNEL_ADDON @ 0< ] \ test the switch: FLOORED / SYMETRIC DIVISION
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ ;
+ [THEN]
-[UNDEFINED] */ [IF]
\ https://forth-standard.org/standard/core/TimesDiv
\ */ n1 n2 n3 -- n4 n1*n2/q3
-: */
->R M* R> FM/MOD NIP
-;
-[THEN]
+ [UNDEFINED] */
+ [IF]
+ : */
+ >R M* R>
+ [ KERNEL_ADDON @ 0< ] \ test the switch: FLOORED / SYMETRIC DIVISION
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ NIP
+ ;
+ [THEN]
\ -------------------------------------------------------------------------------
\ STACK OPERATIONS
\ -------------------------------------------------------------------------------
-[UNDEFINED] OVER [IF]
-\ https://forth-standard.org/standard/core/OVER
-\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
\ https://forth-standard.org/standard/core/ROT
\ ROT x1 x2 x3 -- x2 x3 x1
-CODE ROT
-MOV @PSP,W \ 2 fetch x2
-MOV TOS,0(PSP) \ 3 store x3
-MOV 2(PSP),TOS \ 3 fetch x1
-MOV W,2(PSP) \ 3 store x2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R@ [IF]
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @PSP,W \ 2 fetch x2
+ MOV TOS,0(PSP) \ 3 store x3
+ MOV 2(PSP),TOS \ 3 fetch x1
+ MOV W,2(PSP) \ 3 store x2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/RFetch
\ R@ -- x R: x -- x fetch from return stack
-CODE R@
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV @RSP,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] TUCK [IF]
+ [UNDEFINED] R@
+ [IF]
+ CODE R@
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV @RSP,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TUCK
\ TUCK ( x1 x2 -- x2 x1 x2 )
-: TUCK SWAP OVER ;
-[THEN]
+ [UNDEFINED] TUCK
+ [IF]
+ : TUCK SWAP OVER ;
+ [THEN]
\ ----------------------------------------------------------------------
\ DOUBLE OPERATORS
\ ----------------------------------------------------------------------
-[UNDEFINED] 2@ [IF]
\ https://forth-standard.org/standard/core/TwoFetch
\ 2@ a-addr -- x1 x2 fetch 2 cells ; the lower address will appear on top of stack
-CODE 2@
-BW1 SUB #2,PSP
+ [UNDEFINED] 2@
+ [IF]
+ CODE 2@
+ SUB #2,PSP
MOV 2(TOS),0(PSP)
MOV @TOS,TOS
MOV @IP+,PC
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] 2! [IF]
\ https://forth-standard.org/standard/core/TwoStore
\ 2! x1 x2 a-addr -- store 2 cells ; the top of stack is stored at the lower adr
-CODE 2!
-BW2 MOV @PSP+,0(TOS)
+ [UNDEFINED] 2!
+ [IF]
+ CODE 2!
+ MOV @PSP+,0(TOS)
MOV @PSP+,2(TOS)
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] 2DUP [IF]
\ https://forth-standard.org/standard/core/TwoDUP
\ 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
-CODE 2DUP
-MOV TOS,-2(PSP) \ 3
-MOV @PSP,-4(PSP) \ 4
-SUB #4,PSP \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DROP [IF]
+ [UNDEFINED] 2DUP
+ [IF]
+ CODE 2DUP
+ MOV TOS,-2(PSP) \ 3
+ MOV @PSP,-4(PSP) \ 4
+ SUB #4,PSP \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoDROP
\ 2DROP x1 x2 -- drop 2 cells
-CODE 2DROP
-ADD #2,PSP
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2SWAP [IF]
+ [UNDEFINED] 2DROP
+ [IF]
+ CODE 2DROP
+ ADD #2,PSP
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoSWAP
\ 2SWAP x1 x2 x3 x4 -- x3 x4 x1 x2
-CODE 2SWAP
-MOV @PSP,W \ -- x1 x2 x3 x4 W=x3
-MOV 4(PSP),0(PSP) \ -- x1 x2 x1 x4
-MOV W,4(PSP) \ -- x3 x2 x1 x4
-MOV TOS,W \ -- x3 x2 x1 x4 W=x4
-MOV 2(PSP),TOS \ -- x3 x2 x1 x2 W=x4
-MOV W,2(PSP) \ -- x3 x4 x1 x2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2OVER [IF]
+ [UNDEFINED] 2SWAP
+ [IF]
+ CODE 2SWAP
+ MOV @PSP,W \ -- x1 x2 x3 x4 W=x3
+ MOV 4(PSP),0(PSP) \ -- x1 x2 x1 x4
+ MOV W,4(PSP) \ -- x3 x2 x1 x4
+ MOV TOS,W \ -- x3 x2 x1 x4 W=x4
+ MOV 2(PSP),TOS \ -- x3 x2 x1 x2 W=x4
+ MOV W,2(PSP) \ -- x3 x4 x1 x2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoOVER
\ 2OVER x1 x2 x3 x4 -- x1 x2 x3 x4 x1 x2
-CODE 2OVER
-SUB #4,PSP \ -- x1 x2 x3 x x x4
-MOV TOS,2(PSP) \ -- x1 x2 x3 x4 x x4
-MOV 8(PSP),0(PSP) \ -- x1 x2 x3 x4 x1 x4
-MOV 6(PSP),TOS \ -- x1 x2 x3 x4 x1 x2
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 2OVER
+ [IF]
+ CODE 2OVER
+ SUB #4,PSP \ -- x1 x2 x3 x x x4
+ MOV TOS,2(PSP) \ -- x1 x2 x3 x4 x x4
+ MOV 8(PSP),0(PSP) \ -- x1 x2 x3 x4 x1 x4
+ MOV 6(PSP),TOS \ -- x1 x2 x3 x4 x1 x2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ ----------------------------------------------------------------------
\ ALIGNMENT OPERATORS
\ ----------------------------------------------------------------------
-
-[UNDEFINED] ALIGNED [IF]
\ https://forth-standard.org/standard/core/ALIGNED
\ ALIGNED addr -- a-addr align given addr
-CODE ALIGNED
-BIT #1,TOS
-ADDC #0,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] ALIGN [IF]
+ [UNDEFINED] ALIGNED
+ [IF]
+ CODE ALIGNED
+ BIT #1,TOS
+ ADDC #0,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ALIGN
\ ALIGN -- align HERE
-CODE ALIGN
-BIT #1,&DP \ 3
-ADDC #0,&DP \ 4
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] ALIGN
+ [IF]
+ CODE ALIGN
+ BIT #1,&DP \ 3
+ ADDC #0,&DP \ 4
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ ---------------------
\ PORTABILITY OPERATORS
\ ---------------------
-
-[UNDEFINED] CHARS [IF]
\ https://forth-standard.org/standard/core/CHARS
\ CHARS n1 -- n2 chars->adrs units
-CODE CHARS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] CHARS
+ [IF]
+ CODE CHARS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] CHAR+ [IF]
\ https://forth-standard.org/standard/core/CHARPlus
\ CHAR+ c-addr1 -- c-addr2 add char size
-CODE CHAR+
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] CHAR+
+ [IF]
+ CODE CHAR+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] CELLS [IF]
\ https://forth-standard.org/standard/core/CELLS
\ CELLS n1 -- n2 cells->adrs units
-CODE CELLS
-ADD TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] CELLS
+ [IF]
+ CODE CELLS
+ ADD TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] CELL+ [IF]
\ https://forth-standard.org/standard/core/CELLPlus
\ CELL+ a-addr1 -- a-addr2 add cell size
-CODE CELL+
-ADD #2,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] CELL+
+ [IF]
+ CODE CELL+
+ ADD #2,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ ---------------------------
\ BLOCK AND STRING COMPLEMENT
\ ---------------------------
-
-[UNDEFINED] CHAR [IF]
\ https://forth-standard.org/standard/core/CHAR
\ CHAR -- char parse ASCII character
-: CHAR
+ [UNDEFINED] CHAR
+ [IF]
+ : CHAR
$20 WORD 1+ C@
-;
-[THEN]
+ ;
+ [THEN]
-[UNDEFINED] [CHAR] [IF]
\ https://forth-standard.org/standard/core/BracketCHAR
\ [CHAR] -- compile character literal
-: [CHAR]
+ [UNDEFINED] [CHAR]
+ [IF]
+ : [CHAR]
CHAR POSTPONE LITERAL
-; IMMEDIATE
-[THEN]
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] +! [IF]
\ https://forth-standard.org/standard/core/PlusStore
\ +! n/u a-addr -- add n/u to memory
-CODE +!
-ADD @PSP+,0(TOS)
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
+ [UNDEFINED] +!
+ [IF]
+ CODE +!
+ ADD @PSP+,0(TOS)
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/MOVE
\ MOVE addr1 addr2 u -- smart move
\ VERSION FOR 1 ADDRESS UNIT = 1 CHAR
-CODE MOVE
-MOV TOS,W \ W = cnt
-MOV @PSP+,Y \ Y = addr2 = dst
-MOV @PSP+,X \ X = addr1 = src
-MOV @PSP+,TOS \ pop new TOS
-CMP #0,W \ count = 0 ?
-0<> IF \ if 0, already done !
- CMP X,Y \ dst = src ?
- 0<> IF \ else already done !
- U< IF \ U< if src > dst
- BEGIN \ copy W bytes
- MOV.B @X+,0(Y)
- ADD #1,Y
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV TOS,W \ W = cnt
+ MOV @PSP+,Y \ Y = addr2 = dst
+ MOV @PSP+,X \ X = addr1 = src
+ MOV @PSP+,TOS \ pop new TOS
+ CMP #0,W \ count = 0 ?
+ 0<> IF \ if 0, already done !
+ CMP X,Y \ dst = src ?
+ 0<> IF \ if 0, already done !
+ U< IF \ U< if src > dst
+ BEGIN \ copy W bytes
+ MOV.B @X+,0(Y)
+ ADD #1,Y
+ SUB #1,W
+ 0= UNTIL
+ MOV @IP+,PC \ out 1 of MOVE ====>
+ THEN \ U>= if dst > src
+ ADD W,Y \ copy W bytes beginning with the end
+ ADD W,X
+ BEGIN
+ SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
SUB #1,W
0= UNTIL
- MOV @IP+,PC \ out 1 of MOVE ====>
- THEN \ U>= if dst > src
- ADD W,Y \ copy W bytes beginning with the end
- ADD W,X
- BEGIN
- SUB #1,X
- SUB #1,Y
- MOV.B @X,0(Y)
- SUB #1,W
- 0= UNTIL
+ THEN
THEN
-THEN
-MOV @IP+,PC \ out 2 of MOVE ====>
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ out 2 of MOVE ====>
+ ENDCODE
+ [THEN]
-
-[UNDEFINED] FILL [IF]
\ https://forth-standard.org/standard/core/FILL
\ FILL c-addr u char -- fill memory with char
-CODE FILL
-MOV @PSP+,X \ count
-MOV @PSP+,W \ address
-CMP #0,X
-0<> IF
- BEGIN
- MOV.B TOS,0(W) \ store char in memory
- ADD #1,W
- SUB #1,X
- 0= UNTIL
-THEN
-MOV @PSP+,TOS \ empties stack
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #HEREXEC,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] FILL
+ [IF]
+ CODE FILL
+ MOV @PSP+,X \ count
+ MOV @PSP+,W \ address
+ CMP #0,X
+ 0<> IF
+ BEGIN
+ MOV.B TOS,0(W) \ store char in memory
+ ADD #1,W
+ SUB #1,X
+ 0= UNTIL
+ THEN
+ MOV @PSP+,TOS \ empties stack
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ --------------------
\ INTERPRET COMPLEMENT
\ --------------------
-
-[UNDEFINED] HEX [IF]
\ https://forth-standard.org/standard/core/HEX
-CODE HEX
-MOV #$10,&BASEADR
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DECIMAL [IF]
-\ https://forth-standard.org/standard/core/DECIMAL
-CODE DECIMAL
-MOV #$0A,&BASEADR
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] ( [IF]
+ [UNDEFINED] HEX
+ [IF]
+ CODE HEX
+ MOV #$10,&BASEADR
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ \ https://forth-standard.org/standard/core/DECIMAL
+ [UNDEFINED] DECIMAL
+ [IF]
+ CODE DECIMAL
+ MOV #$0A,&BASEADR
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/p
\ ( -- skip input until char ) or EOL
-: (
-')' WORD DROP
-; IMMEDIATE
-[THEN]
+ [UNDEFINED] ( ; )
+ [IF]
+ : (
+ ')' WORD DROP
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] .( [IF] \ "
\ https://forth-standard.org/standard/core/Dotp
\ .( -- type comment immediatly.
-CODE .( \ "
-MOV #0,&CAPS \ CAPS OFF
-COLON
-')' WORD
-COUNT TYPE
-$20 CAPS ! \ CAPS ON
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
+ [UNDEFINED] .( ; "
+ [IF]
+ CODE .( ; "
+ MOV #0,&CAPS \ CAPS OFF
+ COLON
+ ')' WORD
+ COUNT TYPE
+ HI2LO
+ MOV #$20,&CAPS \ CAPS ON
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toBODY
\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] EXECUTE [IF] \ "
\ https://forth-standard.org/standard/core/EXECUTE
\ EXECUTE i*x xt -- j*x execute Forth word at 'xt'
-CODE EXECUTE
-PUSH TOS \ 3 push xt
-MOV @PSP+,TOS \ 2
-MOV @RSP+,PC \ 4 xt --> PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] EVALUATE [IF]
+ [UNDEFINED] EXECUTE
+ [IF]
+ CODE EXECUTE
+ PUSH TOS \ 3 push xt
+ MOV @PSP+,TOS \ 2
+ MOV @RSP+,PC \ 4 xt --> PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/EVALUATE
\ EVALUATE \ i*x c-addr u -- j*x interpret string
-CODE EVALUATE
-MOV #SOURCE_LEN,X \ 2
-MOV @X+,S \ 2 S = SOURCE_LEN
-MOV @X+,T \ 2 T = SOURCE_ORG
-MOV @X+,W \ 2 W = TOIN
-PUSHM #4,IP \ 6 PUSHM IP,S,T,W
-LO2HI
-INTERPRET
-HI2LO
-MOV @RSP+,&TOIN \ 4
-MOV @RSP+,&SOURCE_ORG \ 4
-MOV @RSP+,&SOURCE_LEN \ 4
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] RECURSE [IF]
+ [UNDEFINED] EVALUATE
+ [IF]
+ CODE EVALUATE
+ MOV #SOURCE_LEN,X \ 2
+ MOV @X+,S \ 2 S = SOURCE_LEN
+ MOV @X+,T \ 2 T = SOURCE_ORG
+ MOV @X+,W \ 2 W = TOIN
+ PUSHM #4,IP \ 6 PUSHM IP,S,T,W
+ LO2HI
+ [ ' \ 8 + , ] \ compile INTERPRET
+ HI2LO
+ MOV @RSP+,&TOIN \ 4
+ MOV @RSP+,&SOURCE_ORG \ 4
+ MOV @RSP+,&SOURCE_LEN \ 4
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/RECURSE
\ C RECURSE -- recurse to current definition
-CODE RECURSE
-MOV &DP,X
-MOV &LAST_CFA,0(X)
-ADD #2,&DP
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] SOURCE [IF]
+ [UNDEFINED] RECURSE
+ [IF]
+ CODE RECURSE
+ MOV &DP,X
+ MOV &LAST_CFA,0(X)
+ ADD #2,&DP
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SOURCE
\ SOURCE -- adr u of current input buffer
-CODE SOURCE
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &SOURCE_LEN,TOS
-MOV &SOURCE_ORG,0(PSP)
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DOES> [IF]
-\ https://forth-standard.org/standard/core/DOES
-\ DOES> -- set action for the latest CREATEd definition
-CODE DOES>
-MOV &LAST_CFA,W \ W = CFA of CREATEd word
-MOV #$1285,0(W) \ replace CFA (CALL rDOCON) by new CFA (CALL rDODOES)
-MOV IP,2(W) \ replace PFA by the address after DOES> as execution address
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] VARIABLE [IF]
+ [UNDEFINED] SOURCE
+ [IF]
+ CODE SOURCE
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &SOURCE_LEN,TOS
+ MOV &SOURCE_ORG,0(PSP)
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/VARIABLE
\ VARIABLE <name> -- define a Forth VARIABLE
-: VARIABLE
-CREATE
-HI2LO
-MOV #$1287,-4(W) \ CFA = CALL rDOVAR
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
+ [UNDEFINED] VARIABLE
+ [IF]
+ : VARIABLE
+ CREATE
+ HI2LO
+ MOV #DOVAR,-4(W) \ CFA = CALL rDOVAR
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
+\ CONSTANT <name> n -- define a Forth CONSTANT
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV TOS,-2(W) \ PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/STATE
\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
+ [UNDEFINED] STATE
+ [IF]
+ STATEADR CONSTANT STATE
+ [THEN]
-[UNDEFINED] BASE [IF]
\ https://forth-standard.org/standard/core/BASE
\ BASE -- a-addr holds conversion radix
-BASEADR CONSTANT BASE
-[THEN]
+ [UNDEFINED] BASE
+ [IF]
+ BASEADR CONSTANT BASE
+ [THEN]
-[UNDEFINED] >IN [IF]
\ https://forth-standard.org/standard/core/toIN
\ C >IN -- a-addr holds offset in input stream
-TOIN CONSTANT >IN
-[THEN]
+ [UNDEFINED] >IN
+ [IF]
+ TOIN CONSTANT >IN
+ [THEN]
-[UNDEFINED] PAD [IF]
\ https://forth-standard.org/standard/core/PAD
\ PAD -- addr
-PAD_ORG CONSTANT PAD
-[THEN]
+ [UNDEFINED] PAD
+ [IF]
+ PAD_ORG CONSTANT PAD
+ [THEN]
-[UNDEFINED] BL [IF]
\ https://forth-standard.org/standard/core/BL
\ BL -- char an ASCII space
-'SP' CONSTANT BL
-[THEN]
+ [UNDEFINED] BL
+ [IF]
+ 'SP' CONSTANT BL
+ [THEN]
-[UNDEFINED] SPACE [IF]
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
-: SPACE
-'SP' EMIT ;
-[THEN]
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ 'SP' EMIT ;
+ [THEN]
-[UNDEFINED] SPACES [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
+ [UNDEFINED] SPACES
+ [IF]
+ : SPACES
BEGIN
- LO2HI
+ ?DUP
+ WHILE
'SP' EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
+ 1-
+ REPEAT
+ ;
+ [THEN]
+
+ [UNDEFINED] DEFER
+ [IF]
+\ https://forth-standard.org/standard/core/DEFER
+\ Skip leading space delimiters. Parse name delimited by a space.
+\ Create a definition for name with the execution semantics defined below.
+\
+\ name Execution: --
+\ Execute the xt that name is set to execute, i.e. NEXT (nothing),
+\ until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+ : DEFER
+ CREATE
+ HI2LO
+ MOV #$4030,-4(W) \4 first CELL = MOV @PC+,PC = BR #addr
+ MOV #NEXT_ADR,-2(W) \3 second CELL = ...mNEXT : do nothing by default
MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
-ENDCODE
-[THEN]
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ DEFER CR \ DEFERed definition, by default executes :NONAME part
+ CODE CR \ replaced by this CODE definition
+ MOV #NEXT_ADR,PC
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
-[UNDEFINED] TO [IF]
\ https://forth-standard.org/standard/core/TO
\ TO name Run-time: ( x -- )
\ Assign the value x to named VALUE.
-CODE TO
-BIS #UF9,SR
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] TO
+ [IF]
+ CODE TO
+ BIS #UF9,SR
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] VALUE [IF]
\ https://forth-standard.org/standard/core/VALUE
\ ( x "<spaces>name" -- ) define a Forth VALUE
\ Skip leading space delimiters. Parse name delimited by a space.
\ Create a definition for name with the execution semantics defined below,
\ with an initial value equal to x.
-\
+\
\ name Execution: ( -- x )
\ Place x on the stack. The value of x is that given when name was created,
\ until the phrase x TO name is executed, causing a new value of x to be assigned to name.
-\
-: VALUE \ x "<spaces>name" --
-CREATE ,
-DOES>
-HI2LO
-MOV @RSP+,IP
-BIT #UF9,SR \ 2 see TO
-0= IF \ 2 execute FETCH
- MOV @TOS,TOS \ 2
- MOV @IP+,PC \ 4
-THEN
-BIC #UF9,SR \ 2 clear 'TO' flag
-MOV @PSP+,0(TOS) \ 4 execute STORE
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-RST_HERE
-
-[THEN] \ end of [UNDEFINED] {CORE_ANS}
-
-ECHO
+ [UNDEFINED] VALUE
+ [IF]
+ : VALUE \ x "<spaces>name" --
+ CREATE ,
+ DOES>
+ HI2LO
+ MOV @RSP+,IP
+ BIT #UF9,SR \ 2 see TO
+ 0= IF \ 2 if UF9 is not set
+ MOV @TOS,TOS \ 2 execute FETCH
+ MOV @IP+,PC \ 4
+ THEN \ else
+ BIC #UF9,SR \ 2 clear UF9 flag
+ MOV #!,PC \ 4 execute STORE
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CASE
+ [UNDEFINED] CASE
+ [IF]
+
+ : CASE 0
+ ; IMMEDIATE \ -- #of-1
+
+\ https://forth-standard.org/standard/core/OF
+ : OF \ #of-1 -- orgOF #of
+ 1+ \ count OFs
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE OVER POSTPONE = \ copy and test case value
+ POSTPONE IF \ add orig to control flow stack
+ POSTPONE DROP \ discards case value if =
+ R> \ we can bring count back now
+ ; IMMEDIATE
+
+\ https://forth-standard.org/standard/core/ENDOF
+ : ENDOF \ orgOF #of -- orgENDOF #of
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE ELSE
+ R> \ we can bring count back now
+ ; IMMEDIATE
+
+\ https://forth-standard.org/standard/core/ENDCASE
+ : ENDCASE \ orgENDOF1..orgENDOFn #of --
+ POSTPONE DROP
+ 0 DO POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ RST_SET
+
+ ECHO
; CORE_ANS.f is loaded
+
\ ASSEMBLER conditionnal usage with ?GOTO S< S>= U< U>= 0= 0<> 0<
\
-CODE ABORT_DOUBLE
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &KERNEL_ADDON,TOS
-BIT #BIT9,TOS
-0<> IF MOV #0,TOS THEN \ if TOS <> 0 (DOUBLE input), set TOS = 0
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-$0D EMIT \ return to column 1 without CR
-ABORT" FastForth V3.8 please!"
-ABORT" build FastForth with DOUBLE_INPUT addon !"
-PWR_STATE \ if no abort remove this word
-;
+ CODE ABORT_DOUBLE
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &KERNEL_ADDON,TOS
+ BIT #BIT7,TOS
+ 0<> IF MOV #0,TOS THEN \ if TOS <> 0 (DOUBLE input), set TOS = 0
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ $0D EMIT \ return to column 1 without CR
+ ABORT" FastForth V3.9 please!"
+ ABORT" build FastForth with DOUBLE_INPUT addon !"
+ RST_RET \ if no abort remove this word
+ ;
-ABORT_DOUBLE
+ ABORT_DOUBLE
; -----------------------------------------------------
; DOUBLE.f
; -----------------------------------------------------
-[DEFINED] {DOUBLE} [IF] {DOUBLE} [THEN]
-
-MARKER {DOUBLE}
+ MARKER {DOUBLE}
-[UNDEFINED] >R [IF]
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] @ [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Zeroless
+\ 0< n -- flag true if TOS negative
+ [UNDEFINED] 0<
+ [IF]
+ CODE 0<
+ ADD TOS,TOS \ 1 set carry if TOS negative
+ SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
+ XOR #-1,TOS \ 1 TOS=-1 if carry was set
+ MOV @IP+,PC \
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/NIP
+\ NIP x1 x2 -- x2 Drop the first item below the top of stack
+ [UNDEFINED] NIP
+ [IF]
+ CODE NIP
+ ADD #2,PSP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/UMDivMOD
+\ UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
+ PUSH #DROP \
+ MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
+ ENDCODE
+ [THEN]
+
+ KERNEL_ADDON @ 0< ; test the switch: FLOORED / SYMETRIC DIVISION
+ [IF] ; FLOORED DIVISION
+\ https://forth-standard.org/standard/core/FMDivMOD
+\ FM/MOD d1 n1 -- r q floored signed div'n
+ [UNDEFINED] FM/MOD
+ [IF]
+ CODE FM/MOD
+ MOV TOS,S \ S=DIV
+ MOV @PSP,T \ T=DVDhi
+ CMP #0,TOS \ n2 >= 0 ?
+ S< IF \
+ XOR #-1,TOS
+ ADD #1,TOS \ -- d1 u2
+ THEN
+ CMP #0,0(PSP) \ d1hi >= 0 ?
+ S< IF \
+ XOR #-1,2(PSP) \ d1lo
+ XOR #-1,0(PSP) \ d1hi
+ ADD #1,2(PSP) \ d1lo+1
+ ADDC #0,0(PSP) \ d1hi+C
+ THEN \ -- uDVDlo uDVDhi uDIVlo
+ PUSHM #3,IP \ save IP,S,T
+ LO2HI
+ UM/MOD \ -- uREMlo uQUOTlo
+ HI2LO
+ POPM #3,IP \ restore T,S,IP
+ CMP #0,T \ T=DVDhi --> REM_sign
+ S< IF
+ XOR #-1,0(PSP)
+ ADD #1,0(PSP)
+ THEN
+ XOR S,T \ S=DIV XOR T=DVDhi = Quot_sign
+ CMP #0,T \ -- n3 u4 T=quot_sign
+ S< IF
+ XOR #-1,TOS
+ ADD #1,TOS
+ THEN \ -- n3 n4 S=divisor
+
+ CMP #0,0(PSP) \ remainder <> 0 ?
+ 0<> IF
+ CMP #1,TOS \ quotient < 1 ?
+ S< IF
+ ADD S,0(PSP) \ add divisor to remainder
+ SUB #1,TOS \ decrement quotient
+ THEN
+ THEN
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [ELSE] ; SYMETRIC DIVISION
+\ https://forth-standard.org/standard/core/SMDivREM
+\ SM/REM DVDlo DVDhi DIV -- r3 q4 symmetric signed div
+ [UNDEFINED] SM/REM
+ [IF]
+ CODE SM/REM
+ MOV TOS,S \ S=DIV
+ MOV @PSP,T \ T=DVDhi
+ CMP #0,TOS \ n2 >= 0 ?
+ S< IF \
+ XOR #-1,TOS
+ ADD #1,TOS \ -- d1 u2
+ THEN
+ CMP #0,0(PSP) \ d1hi >= 0 ?
+ S< IF \
+ XOR #-1,2(PSP) \ d1lo
+ XOR #-1,0(PSP) \ d1hi
+ ADD #1,2(PSP) \ d1lo+1
+ ADDC #0,0(PSP) \ d1hi+C
+ THEN \ -- uDVDlo uDVDhi uDIVlo
+ PUSHM #3,IP \ save IP,S,T
+ LO2HI
+ UM/MOD \ -- uREMlo uQUOTlo
+ HI2LO
+ POPM #3,IP \ restore T,S,IP
+ CMP #0,T \ T=DVDhi --> REM_sign
+ S< IF
+ XOR #-1,0(PSP)
+ ADD #1,0(PSP)
+ THEN
+ XOR S,T \ S=DIV XOR T=DVDhi = Quot_sign
+ CMP #0,T \ -- n3 u4 T=quot_sign
+ S< IF
+ XOR #-1,TOS
+ ADD #1,TOS
+ THEN \ -- n3 n4 S=divisor
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Div
+\ / n1 n2 -- n3 signed quotient
+ [UNDEFINED] /
+ [IF]
+ : /
+ >R DUP 0< R>
+ [ KERNEL_ADDON @ 0< ] [IF]
+ FM/MOD
+ [ELSE]
+ SM/REM
+ [THEN]
+ NIP
+ ;
+ [THEN]
+
\ https://forth-standard.org/standard/core/Fetch
\ @ c-addr -- char fetch char from memory
-CODE @
-MOV @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] @
+ [IF]
+ CODE @
+ MOV @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] ! [IF]
\ https://forth-standard.org/standard/core/Store
\ ! x a-addr -- store cell in memory
-CODE !
-MOV @PSP+,0(TOS) \ 4
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
+ [UNDEFINED] !
+ [IF]
+ CODE !
+ MOV @PSP+,0(TOS) \ 4
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SWAP [IF]
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ROT
\ ROT x1 x2 x3 -- x2 x3 x1
-CODE ROT
-MOV @PSP,W \ 2 fetch x2
-MOV TOS,0(PSP) \ 3 store x3
-MOV 2(PSP),TOS \ 3 fetch x1
-MOV W,2(PSP) \ 3 store x2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @PSP,W \ 2 fetch x2
+ MOV TOS,0(PSP) \ 3 store x3
+ MOV 2(PSP),TOS \ 3 fetch x1
+ MOV W,2(PSP) \ 3 store x2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] < [IF] \ define < and >
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/less
\ < n1 n2 -- flag test n1<n2, signed
-CODE <
- SUB @PSP+,TOS \ 1 TOS=n2-n1
- S< ?GOTO FW1 \ 2 signed
- 0<> IF \ 2
-BW1 MOV #-1,TOS \ 1 flag Z = 0
- THEN
- MOV @IP+,PC
-ENDCODE
+ [UNDEFINED] <
+ [IF] \ define < and >
+ CODE <
+ SUB @PSP+,TOS \ 1 TOS=n2-n1
+ S< ?GOTO FW1 \ 2 signed
+ 0<> IF \ 2
+BW1 MOV #-1,TOS \ 1 flag Z = 0
+ THEN
+ MOV @IP+,PC
+ ENDCODE
\ https://forth-standard.org/standard/core/more
\ > n1 n2 -- flag test n1>n2, signed
-CODE >
- SUB @PSP+,TOS \ 2 TOS=n2-n1
- S< ?GOTO BW1 \ 2 --> +5
-FW1 AND #0,TOS \ 1 flag Z = 1
- MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE >
+ SUB @PSP+,TOS \ 2 TOS=n2-n1
+ S< ?GOTO BW1 \ 2 --> +5
+FW1 AND #0,TOS \ 1 flag Z = 1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] IF [IF] \ define IF THEN
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] IF
+ [IF] \ define IF THEN
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ELSE
\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] TO [IF]
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TO
-CODE TO
-BIS #UF9,SR
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] TO
+ [IF]
+ CODE TO
+ BIS #UF9,SR
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] DOES> [IF]
\ https://forth-standard.org/standard/core/DOES
\ DOES> -- set action for the latest CREATEd definition
-CODE DOES>
-MOV &LAST_CFA,W \ W = CFA of CREATEd word
-MOV #DODOES,0(W) \ replace CFA (DOCON) by new CFA (DODOES)
-MOV IP,2(W) \ replace PFA by the address after DOES> as execution address
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACES [IF]
+ [UNDEFINED] DOES>
+ [IF]
+ CODE DOES>
+ MOV &LAST_CFA,W \ W = CFA of CREATEd word
+ MOV #DODOES,0(W) \ replace CFA (CALL rDOCON) by new CFA (CALL rDODOES)
+ MOV IP,2(W) \ replace PFA by the address after DOES> as execution address
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,TOS
+ 0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,IP
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+ THEN
+ MOV @PSP+,TOS \ -- drop n
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] 2@ [IF]
\ https://forth-standard.org/standard/core/TwoFetch
\ 2@ a-addr -- x1 x2 fetch 2 cells ; the lower address will appear on top of stack
-CODE 2@
-SUB #2,PSP
-MOV 2(TOS),0(PSP)
-MOV @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2! [IF]
+ [UNDEFINED] 2@
+ [IF]
+ CODE 2@
+ SUB #2,PSP
+ MOV 2(TOS),0(PSP)
+ MOV @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoStore
\ 2! x1 x2 a-addr -- store 2 cells ; the top of stack is stored at the lower adr
-CODE 2!
-MOV @PSP+,0(TOS)
-MOV @PSP+,2(TOS)
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DUP [IF]
+ [UNDEFINED] 2!
+ [IF]
+ CODE 2!
+ MOV @PSP+,0(TOS)
+ MOV @PSP+,2(TOS)
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoDUP
\ 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
-CODE 2DUP
-SUB #4,PSP \ -- x1 x x x2
-MOV TOS,2(PSP) \ -- x1 x2 x x2
-MOV 4(PSP),0(PSP) \ -- x1 x2 x1 x2
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DROP [IF]
+ [UNDEFINED] 2DUP
+ [IF]
+ CODE 2DUP
+ SUB #4,PSP \ -- x1 x x x2
+ MOV TOS,2(PSP) \ -- x1 x2 x x2
+ MOV 4(PSP),0(PSP) \ -- x1 x2 x1 x2
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoDROP
\ 2DROP x1 x2 -- drop 2 cells
-CODE 2DROP
-ADD #2,PSP
-MOV @PSP+,TOS
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2SWAP [IF]
+ [UNDEFINED] 2DROP
+ [IF]
+ CODE 2DROP
+ ADD #2,PSP
+ MOV @PSP+,TOS
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoSWAP
\ 2SWAP x1 x2 x3 x4 -- x3 x4 x1 x2
-CODE 2SWAP
-MOV @PSP,W \ -- x1 x2 x3 x4 W=x3
-MOV 4(PSP),0(PSP) \ -- x1 x2 x1 x4
-MOV W,4(PSP) \ -- x3 x2 x1 x4
-MOV TOS,W \ -- x3 x2 x1 x4 W=x4
-MOV 2(PSP),TOS \ -- x3 x2 x1 x2 W=x4
-MOV W,2(PSP) \ -- x3 x4 x1 x2
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2OVER [IF]
+ [UNDEFINED] 2SWAP
+ [IF]
+ CODE 2SWAP
+ MOV @PSP,W \ -- x1 x2 x3 x4 W=x3
+ MOV 4(PSP),0(PSP) \ -- x1 x2 x1 x4
+ MOV W,4(PSP) \ -- x3 x2 x1 x4
+ MOV TOS,W \ -- x3 x2 x1 x4 W=x4
+ MOV 2(PSP),TOS \ -- x3 x2 x1 x2 W=x4
+ MOV W,2(PSP) \ -- x3 x4 x1 x2
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoOVER
\ 2OVER x1 x2 x3 x4 -- x1 x2 x3 x4 x1 x2
-CODE 2OVER
-SUB #4,PSP \ -- x1 x2 x3 x x x4
-MOV TOS,2(PSP) \ -- x1 x2 x3 x4 x x4
-MOV 8(PSP),0(PSP) \ -- x1 x2 x3 x4 x1 x4
-MOV 6(PSP),TOS \ -- x1 x2 x3 x4 x1 x2
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2>R [IF]
+ [UNDEFINED] 2OVER
+ [IF]
+ CODE 2OVER
+ SUB #4,PSP \ -- x1 x2 x3 x x x4
+ MOV TOS,2(PSP) \ -- x1 x2 x3 x4 x x4
+ MOV 8(PSP),0(PSP) \ -- x1 x2 x3 x4 x1 x4
+ MOV 6(PSP),TOS \ -- x1 x2 x3 x4 x1 x2
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwotoR
\ ( x1 x2 -- ) ( R: -- x1 x2 ) Transfer cell pair x1 x2 to the return stack.
-CODE 2>R
-PUSH @PSP+
-PUSH TOS
-MOV @PSP+,TOS
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2R@ [IF]
+ [UNDEFINED] 2>R
+ [IF]
+ CODE 2>R
+ PUSH @PSP+
+ PUSH TOS
+ MOV @PSP+,TOS
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoRFetch
\ ( -- x1 x2 ) ( R: x1 x2 -- x1 x2 ) Copy cell pair x1 x2 from the return stack.
-CODE 2R@
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV @RSP,TOS
-MOV 2(RSP),0(PSP)
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2R> [IF]
+ [UNDEFINED] 2R@
+ [IF]
+ CODE 2R@
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV @RSP,TOS
+ MOV 2(RSP),0(PSP)
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoRfrom
\ ( -- x1 x2 ) ( R: x1 x2 -- ) Transfer cell pair x1 x2 from the return stack
-CODE 2R>
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV @RSP+,TOS
-MOV @RSP+,0(PSP)
-NEXT
-ENDCODE
-[THEN]
+ [UNDEFINED] 2R>
+ [IF]
+ CODE 2R>
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV @RSP+,TOS
+ MOV @RSP+,0(PSP)
+ NEXT
+ ENDCODE
+ [THEN]
\ ===============================================
\ DOUBLE word set
\ ===============================================
-[UNDEFINED] D. [IF]
\ https://forth-standard.org/standard/double/Dd
\ D. dlo dhi -- display d (signed)
-CODE D.
-MOV #U.,W \ U. + 10 = D.
-ADD #10,W
-MOV W,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2ROT [IF]
+ [UNDEFINED] D.
+ [IF]
+ CODE D.
+ MOV TOS,S \ S will be pushed as sign
+ MOV #U.+10,PC \ U. + 10 = D.
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/TwoROT
\ Rotate the top three cell pairs on the stack bringing cell pair x1 x2 to the top of the stack.
-CODE 2ROT
-MOV 8(PSP),X \ 3
-MOV 6(PSP),Y \ 3
-MOV 4(PSP),8(PSP) \ 5
-MOV 2(PSP),6(PSP) \ 5
-MOV @PSP,4(PSP) \ 4
-MOV TOS,2(PSP) \ 3
-MOV X,0(PSP) \ 3
-MOV Y,TOS \ 1
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] D>S [IF]
+ [UNDEFINED] 2ROT
+ [IF]
+ CODE 2ROT
+ MOV 8(PSP),X \ 3
+ MOV 6(PSP),Y \ 3
+ MOV 4(PSP),8(PSP) \ 5
+ MOV 2(PSP),6(PSP) \ 5
+ MOV @PSP,4(PSP) \ 4
+ MOV TOS,2(PSP) \ 3
+ MOV X,0(PSP) \ 3
+ MOV Y,TOS \ 1
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/DtoS
\ D>S d -- n double prec -> single.
-CODE D>S
-MOV @PSP+,TOS
-NEXT
-ENDCODE
-[THEN]
+ [UNDEFINED] D>S
+ [IF]
+ CODE D>S
+ MOV @PSP+,TOS
+ NEXT
+ ENDCODE
+ [THEN]
-[UNDEFINED] D0= [IF]
\ https://forth-standard.org/standard/double/DZeroEqual
-CODE D0=
-CMP #0,TOS
-MOV #0,TOS
-0= IF
- CMP #0,0(PSP)
+ [UNDEFINED] D0=
+ [IF]
+ CODE D0=
+ CMP #0,TOS
+ MOV #0,TOS
0= IF
- MOV #-1,TOS
+ CMP #0,0(PSP)
+ 0= IF
+ MOV #-1,TOS
+ THEN
THEN
-THEN
-ADD #2,PSP
-NEXT
-ENDCODE
-[THEN]
+ ADD #2,PSP
+ NEXT
+ ENDCODE
+ [THEN]
-[UNDEFINED] D0< [IF]
\ https://forth-standard.org/standard/double/DZeroless
-CODE D0<
-CMP #0,TOS
-MOV #0,TOS
-S< IF
- MOV #-1,TOS
-THEN
-ADD #2,PSP
-NEXT
-ENDCODE
-[THEN]
+ [UNDEFINED] D0<
+ [IF]
+ CODE D0<
+ CMP #0,TOS
+ MOV #0,TOS
+ S< IF
+ MOV #-1,TOS
+ THEN
+ ADD #2,PSP
+ AND #-1,TOS \ to set N, Z flags
+ NEXT
+ ENDCODE
+ [THEN]
-[UNDEFINED] D= [IF]
\ https://forth-standard.org/standard/double/DEqual
-CODE D=
-CMP TOS,2(PSP) \ 3 ud1H - ud2H
-MOV #0,TOS \ 1
-0= IF \ 2
- CMP @PSP,4(PSP) \ 4 ud1L - ud2L
- 0= IF \ 2
- MOV #-1,TOS \ 1
+ [UNDEFINED] D=
+ [IF]
+ CODE D=
+ CMP TOS,2(PSP) \ 3 ud1H - ud2H
+ MOV #0,TOS \ 1
+ 0= IF \ 2
+ CMP @PSP,4(PSP) \ 4 ud1L - ud2L
+ 0= IF \ 2
+ MOV #-1,TOS \ 1
+ THEN
THEN
-THEN
-ADD #6,PSP \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ ADD #6,PSP \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] D< [IF]
\ https://forth-standard.org/standard/double/Dless
\ flag is true if and only if d1 is less than d2
-CODE D<
-CMP TOS,2(PSP) \ 3 d1H - d2H
-MOV #0,TOS \ 1
-S< IF \ 2
- MOV #-1,TOS \ 1
-THEN
-0= IF \ 2
- CMP @PSP,4(PSP) \ 4 d1L - d2L
- U< IF \ 2
- MOV #-1,TOS \ 1
+ [UNDEFINED] D<
+ [IF]
+ CODE D<
+ CMP TOS,2(PSP) \ 3 d1H - d2H
+ MOV #0,TOS \ 1
+ S< IF \ 2
+ MOV #-1,TOS \ 1
+ THEN
+ 0= IF \ 2
+ CMP @PSP,4(PSP) \ 4 d1L - d2L
+ U< IF \ 2
+ MOV #-1,TOS \ 1
+ THEN
THEN
-THEN
-ADD #6,PSP \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ ADD #6,PSP \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] DU< [IF]
\ https://forth-standard.org/standard/double/DUless
\ flag is true if and only if ud1 is less than ud2
-CODE DU<
-CMP TOS,2(PSP) \ 3 ud1H - ud2H
-MOV #0,TOS \ 1
-U< IF \ 2
- MOV #-1,TOS \ 1
-THEN
-0= IF \ 2
- CMP @PSP,4(PSP) \ 4 ud1L - ud2L
- U< IF \ 2
- MOV #-1,TOS \ 1
+ [UNDEFINED] DU<
+ [IF]
+ CODE DU<
+ CMP TOS,2(PSP) \ 3 ud1H - ud2H
+ MOV #0,TOS \ 1
+ U< IF \ 2
+ MOV #-1,TOS \ 1
+ THEN
+ 0= IF \ 2
+ CMP @PSP,4(PSP) \ 4 ud1L - ud2L
+ U< IF \ 2
+ MOV #-1,TOS \ 1
+ THEN
THEN
-THEN
-ADD #6,PSP \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ ADD #6,PSP \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] D+ [IF]
\ https://forth-standard.org/standard/double/DPlus
-CODE D+
+ [UNDEFINED] D+
+ [IF]
+ CODE D+
BW1 ADD @PSP+,2(PSP)
ADDC @PSP+,TOS
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ 4
+ ENDCODE
-[UNDEFINED] M+ [IF]
\ https://forth-standard.org/standard/double/MPlus
-CODE M+
-SUB #2,PSP
-CMP #0,TOS
-MOV TOS,0(PSP)
-MOV #-1,TOS
-0>= IF
- MOV #0,TOS
-THEN
-GOTO BW1
-ENDCODE
-[THEN]
+ CODE M+
+ SUB #2,PSP
+ CMP #0,TOS
+ MOV TOS,0(PSP)
+ MOV #-1,TOS
+ 0>= IF
+ MOV #0,TOS
+ THEN
+ GOTO BW1
+ ENDCODE
+ [THEN]
-[UNDEFINED] D- [IF]
\ https://forth-standard.org/standard/double/DMinus
-CODE D-
-SUB @PSP+,2(PSP)
-SUBC TOS,0(PSP)
-MOV @PSP+,TOS
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DNEGATE [IF]
+ [UNDEFINED] D-
+ [IF]
+ CODE D-
+ SUB @PSP+,2(PSP)
+ SUBC TOS,0(PSP)
+ MOV @PSP+,TOS
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/DNEGATE
-CODE DNEGATE
-XOR #-1,0(PSP)
-XOR #-1,TOS
-ADD #1,0(PSP)
-ADDC #0,TOS
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DABS [IF]
+ [UNDEFINED] DNEGATE
+ [IF]
+ CODE DNEGATE
+ XOR #-1,0(PSP)
+ XOR #-1,TOS
+ ADD #1,0(PSP)
+ ADDC #0,TOS
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/DABS
\ DABS d1 -- |d1| absolute value
-CODE DABS
-CMP #0,TOS \ 1
-0>= IF
- MOV @IP+,PC
-THEN
-MOV #DNEGATE,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] DABS
+ [IF]
+ CODE DABS
+ CMP #0,TOS \ 1
+ 0>= IF
+ MOV @IP+,PC
+ THEN
+ MOV #DNEGATE,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] D2/ [IF]
\ https://forth-standard.org/standard/double/DTwoDiv
-CODE D2/
-RRA TOS
-RRC 0(PSP)
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] D2* [IF]
+ [UNDEFINED] D2/
+ [IF]
+ CODE D2/
+ RRA TOS
+ RRC 0(PSP)
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/DTwoTimes
-CODE D2*
-ADD @PSP,0(PSP)
-ADDC TOS,TOS
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DMAX [IF]
+ [UNDEFINED] D2*
+ [IF]
+ CODE D2*
+ ADD @PSP,0(PSP)
+ ADDC TOS,TOS
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/DMAX
-: DMAX \ -- d1 d2
-2OVER 2OVER \ -- d1 d2 d1 d2
-D< IF \ -- d1 d2
- 2>R 2DROP 2R> \ -- d2
-ELSE \ -- d1 d2
- 2DROP \ -- d1
-THEN
-;
-[THEN]
+ [UNDEFINED] DMAX
+ [IF]
+ : DMAX \ -- d1 d2
+ 2OVER 2OVER \ -- d1 d2 d1 d2
+ D< IF \ -- d1 d2
+ 2>R 2DROP 2R> \ -- d2
+ ELSE \ -- d1 d2
+ 2DROP \ -- d1
+ THEN
+ ;
+ [THEN]
-[UNDEFINED] DMIN [IF]
\ https://forth-standard.org/standard/double/DMIN
-: DMIN \ -- d1 d2
-2OVER 2OVER \ -- d1 d2 d1 d2
-D< IF \ -- d1 d2
- 2DROP \ -- d1
-ELSE 2>R 2DROP 2R> \ -- d1 d2
-THEN \ -- d2
-;
-
-DEVICEID C@ $EF > [IF] ; test for MSP430FR413x devices without hardware_MPY
+ [UNDEFINED] DMIN
+ [IF]
+ : DMIN \ -- d1 d2
+ 2OVER 2OVER \ -- d1 d2 d1 d2
+ D< IF \ -- d1 d2
+ 2DROP \ -- d1
+ ELSE
+ 2>R 2DROP 2R> \ -- d1 d2
+ THEN \ -- d2
+ ;
+ [THEN]
+
+ RST_SET
+\ \ https://forth-standard.org/standard/core/Equal
+\ \ = x1 x2 -- flag test x1=x2
+\ [UNDEFINED] =
+\ [IF]
+\ CODE =
+\ SUB @PSP+,TOS \ 2
+\ 0<> IF \ 2
+\ AND #0,TOS \ 1
+\ MOV @IP+,PC \ 4
+\ THEN
+\ XOR #-1,TOS \ 1 flag Z = 1
+\ MOV @IP+,PC \ 4
+\ ENDCODE
+\ [THEN]
+\
+\ \ https://forth-standard.org/standard/core/Uless
+\ \ U< u1 u2 -- flag test u1<u2, unsigned
+\ [UNDEFINED] U<
+\ [IF]
+\ CODE U<
+\ SUB @PSP+,TOS \ 2 u2-u1
+\ 0<> IF
+\ MOV #-1,TOS \ 1
+\ U< IF \ 2 flag
+\ AND #0,TOS \ 1 flag Z = 1
+\ THEN
+\ THEN
+\ MOV @IP+,PC \ 4
+\ ENDCODE
+\ [THEN]
+\
+\ $81EF DEVICEID @ U<
+\ DEVICEID @ $81F3 U<
+\ =
-[UNDEFINED] M*/ [IF]
-\ https://forth-standard.org/standard/double/MTimesDiv
-CODE M*/ \ d1lo d1hi n1 +n2 -- d2lo d2hi
-BIC #UF9,SR \ clear RES sign flag
-CMP #0,2(PSP) \ d1 < 0 ?
-S< IF
- XOR #-1,4(PSP)
- XOR #-1,2(PSP)
- ADD #1,4(PSP)
- ADDC #0,2(PSP)
- BIS #UF9,SR \ set RES sign flag
-THEN \ ud1
-CMP #0,0(PSP) \ n1 < 0 ?
-S< IF
- XOR #-1,0(PSP)
- ADD #1,0(PSP) \ u1
- XOR #UF9,SR
-THEN \ let's process UM* -- ud1lo ud1hi u1 +n2
- MOV 4(PSP),Y \ 3 uMDlo
- MOV 2(PSP),T \ 3 uMDhi
- MOV @PSP+,S \ 2 uMRlo -- ud1lo ud1hi +n2
- MOV #0,rDODOES \ 1 uMDlo=0
- MOV #0,2(PSP) \ 3 uRESlo=0
- MOV #0,0(PSP) \ 3 uRESmi=0 -- uRESlo uRESmi +n2
- MOV #0,W \ 1 uREShi=0
- MOV #1,X \ 1 BIT TEST REGlo
-BEGIN BIT X,S \ 1 test actual bit in uMRlo
- 0<> IF ADD Y,2(PSP) \ 3 IF 1: ADD uMDlo TO uRESlo
- ADDC T,0(PSP) \ 3 ADDC uMDmi TO uRESmi
- ADDC rDODOES,W \ 1 ADDC uMRlo TO uREShi
- THEN ADD Y,Y \ 1 (RLA LSBs) uMDlo *2
- ADDC T,T \ 1 (RLC MSBs) uMDhi *2
- ADDC rDODOES,rDODOES \ 1 (RLA LSBs) uMDlo *2
- ADD X,X \ 1 (RLA) NEXT BIT TO TEST
-U>= UNTIL \ 1 IF BIT IN CARRY: FINISHED W=uREShi
-\ TOS +n2
-\ W REShi
-\ 0(PSP) RESmi
-\ 2(PSP) RESlo
-MOV TOS,T
-MOV @PSP,TOS
-MOV 2(PSP),S
-\ process division
-\ reg input output
-\ ----------------------------
-\ S = DVD(15-0)
-\ TOS = DVD(31-16)
-\ W = DVD(47-32) REM
-\ T = DIV(15-0)
-\ X = Don't care QUOTlo
-\ Y = Don't care QUOThi
-\ rDODOES = count
-\ 2(PSP) REM
-\ 0(PSP) QUOTlo
-\ TOS QUOThi
-MOV #32,rDODOES \ 2 init loop count
-CMP #0,W \ DVDhi = 0 ?
-0= IF \ if yes
- MOV TOS,W \ DVDmi --> DVDhi
- CALL #MDIV1DIV2 \ with loop count / 2
-ELSE
- CALL #MDIV1 \ -- urem ud2lo ud2hi
-THEN
-MOV @PSP+,0(PSP) \ -- ud2lo ud2hi
-BIT #UF9,SR \ sign is set ?
-0<> IF \ DNEGATE Quot
- XOR #-1,0(PSP)
- XOR #-1,TOS
- ADD #1,0(PSP)
- ADDC #0,TOS
- BIC #UF9,SR \ clear sign flag
-\ now, make floored division, only used if rem<>0 and quot<0 :
- CMP #0,W \ remainder <> 0 ?
- 0<> IF
- SUB #1,0(PSP) \ decrement quotient
- SUBC #0,TOS
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+
+ KERNEL_ADDON HMPY TSTBIT \ hardware MPY ?
+
+ RST_RET
+
+ [IF] ; MSP430FRxxxx with hardware_MPY
+
+\ https://forth-standard.org/standard/double/MTimesDiv
+ [UNDEFINED] M*/
+ [IF]
+ CODE M*/ \ d1 * n1 / +n2 -- d2
+ MOV 4(PSP),&MPYS32L \ 5 Load 1st operand d1lo
+ MOV 2(PSP),&MPYS32H \ 5 d1hi
+ MOV @PSP+,&OP2 \ 4 -- d1 n2 load 2nd operand n1
+ MOV TOS,T \ T = DIV
+ NOP3
+ MOV &RES0,S \ 3 S = RESlo
+ MOV &RES1,TOS \ 3 TOS = RESmi
+ MOV &RES2,W \ 3 W = REShi
+ MOV #0,rDOCON \ clear sign flag
+ CMP #0,W \ negative product ?
+ S< IF \ compute ABS value if yes
+ XOR #-1,S
+ XOR #-1,TOS
+ XOR #-1,W
+ ADD #1,S
+ ADDC #0,TOS
+ ADDC #0,W
+ MOV #-1,rDOCON \ set sign flag
THEN
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[ELSE] \ hardware multiplier
-[UNDEFINED] M*/ [IF]
+ [ELSE] ; no hardware multiplier
\ https://forth-standard.org/standard/double/MTimesDiv
-CODE M*/ \ d1 * n1 / +n2 -- d2
-MOV 4(PSP),&MPYS32L \ 5 Load 1st operand d1lo
-MOV 2(PSP),&MPYS32H \ 5 d1hi
-MOV @PSP+,&OP2 \ 4 -- d1 n2 load 2nd operand n1
-MOV TOS,T \ T = DIV
-NOP3
-MOV &RES0,S \ 3 S = RESlo
-MOV &RES1,TOS \ 3 TOS = RESmi
-MOV &RES2,W \ 3 W = REShi
-BIC #UF9,SR \ clear sign flag
-CMP #0,W \ negative product ?
-S< IF \ compute ABS value if yes
- XOR #-1,S
- XOR #-1,TOS
- XOR #-1,W
- ADD #1,S
- ADDC #0,TOS
- ADDC #0,W
- BIS #UF9,SR \ set sign flag
-THEN
-\ process division
-\ reg input output
-\ ----------------------------
-\ S = DVD(15-0)
-\ TOS = DVD(31-16)
-\ W = DVD(47-32) REM
-\ T = DIV(15-0)
-\ X = Don't care QUOTlo
-\ Y = Don't care QUOThi
-\ rDODOES = count
-\ 2(PSP) REM
-\ 0(PSP) QUOTlo
-\ TOS QUOThi
-MOV #32,rDODOES \ 2 init loop count
-CMP #0,W \ DVDhi = 0 ?
-0= IF \ if yes
- MOV TOS,W \ DVDmi --> DVDhi
- CALL #MDIV1DIV2 \ with loop count / 2
-ELSE
- CALL #MDIV1 \ -- urem ud2lo ud2hi
-THEN
-MOV @PSP+,0(PSP) \ -- d2lo d2hi
-BIT #UF9,SR \ RES sign is set ?
-0<> IF \ DNEGATE
- XOR #-1,0(PSP)
- XOR #-1,TOS
- ADD #1,0(PSP)
- ADDC #0,TOS
- BIC #UF9,SR \ clear sign flag
-\ now, make floored division, only used if rem<>0 and quot<0 :
- CMP #0,W \ remainder <> 0 ?
- 0<> IF
- SUB #1,0(PSP) \ decrement quotient
- SUBC #0,TOS
+ [UNDEFINED] M*/
+ [IF]
+ CODE M*/ \ d1lo d1hi n1 +n2 -- d2lo d2hi
+ MOV #0,rDOCON \ rDOCON = sign
+ CMP #0,2(PSP) \ d1 < 0 ?
+ S< IF
+ XOR #-1,4(PSP)
+ XOR #-1,2(PSP)
+ ADD #1,4(PSP)
+ ADDC #0,2(PSP)
+ MOV #-1,rDOCON
+ THEN \ ud1
+ CMP #0,0(PSP) \ n1 < 0 ?
+ S< IF
+ XOR #-1,0(PSP)
+ ADD #1,0(PSP) \ u1
+ XOR #-1,rDOCON
+ THEN \ let's process UM* -- ud1lo ud1hi u1 +n2
+ MOV 4(PSP),Y \ 3 uMDlo
+ MOV 2(PSP),T \ 3 uMDhi
+ MOV @PSP+,S \ 2 uMRlo -- ud1lo ud1hi +n2
+ MOV #0,rDODOES \ 1 uMDlo=0
+ MOV #0,2(PSP) \ 3 uRESlo=0
+ MOV #0,0(PSP) \ 3 uRESmi=0 -- uRESlo uRESmi +n2
+ MOV #0,W \ 1 uREShi=0
+ MOV #1,X \ 1 BIT TEST REGlo
+ BEGIN BIT X,S \ 1 test actual bit in uMRlo
+ 0<> IF ADD Y,2(PSP) \ 3 IF 1: ADD uMDlo TO uRESlo
+ ADDC T,0(PSP) \ 3 ADDC uMDmi TO uRESmi
+ ADDC rDODOES,W \ 1 ADDC uMRlo TO uREShi
+ THEN ADD Y,Y \ 1 (RLA LSBs) uMDlo *2
+ ADDC T,T \ 1 (RLC MSBs) uMDhi *2
+ ADDC rDODOES,rDODOES \ 1 (RLA LSBs) uMDlo *2
+ ADD X,X \ 1 (RLA) NEXT BIT TO TEST
+ U>= UNTIL \ 1 IF BIT IN CARRY: FINISHED W=uREShi
+\ TOS +n2
+\ W REShi
+\ 0(PSP) RESmi
+\ 2(PSP) RESlo
+ MOV TOS,T
+ MOV @PSP,TOS
+ MOV 2(PSP),S
+ [THEN]
+
+ [THEN] ; endcase of software/hardware_MPY
+
+\ process division
+\ reg input output
+\ ------------------------------
+\ S = DVD(15-0)
+\ TOS = DVD(31-16)
+\ W = DVD(47-32) REM
+\ T = DIV(15-0)
+\ X = Don't care QUOTlo
+\ Y = Don't care QUOThi
+\ rDODOES = count
+\ rDOCON = sign
+\ 2(PSP) REM
+\ 0(PSP) QUOTlo
+\ TOS QUOThi
+ MOV #32,rDODOES \ 2 init loop count
+ CMP #0,W \ DVDhi = 0 ?
+ 0= IF \ if yes
+ MOV TOS,W \ DVDmi --> DVDhi
+ CALL #MDIV1DIV2 \ with loop count / 2
+ ELSE
+ CALL #MDIV1 \ -- urem ud2lo ud2hi
THEN
-THEN
-MOV @IP+,PC \ 52 words
-ENDCODE
-[THEN]
-
-[THEN] ; end of software/hardware_MPY
+ MOV @PSP+,0(PSP) \ -- d2lo d2hi
+ CMP #0,rDOCON \ RES sign is set ?
+ 0<> IF \ DNEGATE quot
+ XOR #-1,0(PSP)
+ XOR #-1,TOS
+ ADD #1,0(PSP)
+ ADDC #0,TOS
+ CMP #0,&KERNEL_ADDON \ floored/symetric division flag test
+ S< IF \ if floored division and quot<0
+ CMP #0,W \ remainder <> 0 ?
+ 0<> IF \ if floored division, quot<0 and remainder <>0
+ SUB #1,0(PSP) \ decrement quotient
+ SUBC #0,TOS
+ THEN
+ THEN
+ THEN
+ MOV #XDODOES,rDODOES
+ MOV #XDOCON,rDOCON
+ MOV @IP+,PC \ 52 words
+ ENDCODE
+ [THEN]
-[UNDEFINED] 2VARIABLE [IF]
\ https://forth-standard.org/standard/double/TwoVARIABLE
-: 2VARIABLE \ --
-CREATE
-HI2LO
-ADD #4,&DP
-MOV @RSP+,IP
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2CONSTANT [IF]
+ [UNDEFINED] 2VARIABLE
+ [IF]
+ : 2VARIABLE \ --
+ CREATE
+ HI2LO
+ ADD #4,&DP
+ MOV @RSP+,IP
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/TwoCONSTANT
-: 2CONSTANT \ udlo/dlo/Flo udhi/dhi/Shi -- to create double or s15q16 CONSTANT
-CREATE
-, , \ compile Shi then Flo
-DOES>
-2@ \ execution part
-;
-[THEN]
+ [UNDEFINED] 2CONSTANT
+ [IF]
+ : 2CONSTANT \ udlo/dlo/Flo udhi/dhi/Shi -- to create double or s15q16 CONSTANT
+ CREATE
+ , , \ compile Shi then Flo
+ DOES>
+ 2@ \ execution part
+ ;
+ [THEN]
-[UNDEFINED] 2VALUE [IF]
\ https://forth-standard.org/standard/double/TwoVALUE
-: 2VALUE \ x1 x2 "<spaces>name" --
-CREATE , , \ compile Shi then Flo
-DOES>
-HI2LO
-MOV @RSP+,IP
-BIT #UF9,SR \ flag set by TO
-0= IF
- MOV #2@,PC \ execute TwoFetch
-THEN
-BIC #UF9,SR \ clear flag
-MOV #2!,PC \ execute TwoStore
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2LITERAL [IF]
+ [UNDEFINED] 2VALUE
+ [IF]
+ : 2VALUE \ x1 x2 "<spaces>name" --
+ CREATE , , \ compile Shi then Flo
+ DOES>
+ HI2LO
+ MOV @RSP+,IP
+ BIT #UF9,SR \ flag set by TO
+ 0= IF
+ MOV #2@,PC \ execute TwoFetch
+ THEN
+ BIC #UF9,SR \ clear flag
+ MOV #2!,PC \ execute TwoStore
+ ENDCODE
+ [THEN]
+
+
\ https://forth-standard.org/standard/double/TwoLITERAL
-CODE 2LITERAL
-BIS #UF9,SR \ see LITERAL
-MOV #LITERAL,PC
-ENDCODE IMMEDIATE
-[THEN]
+ [UNDEFINED] 2LITERAL
+ [IF]
+ CODE 2LITERAL
+ BIS #UF9,SR \ see LITERAL
+ MOV #LITERAL,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
-[UNDEFINED] D.R [IF]
\ https://forth-standard.org/standard/double/DDotR
\ D.R d n --
-: D.R
->R SWAP OVER DABS <# #S ROT SIGN #>
-R> OVER - SPACES TYPE
-;
-[THEN]
+ [UNDEFINED] D.R
+ [IF]
+ : D.R
+ >R SWAP OVER DABS <# #S ROT SIGN #>
+ R> OVER - SPACES TYPE
+ ;
+ [THEN]
-RST_HERE
+ RST_SET
\ ==============================================================================
-\ Complement to pass DOUBLETEST.4TH
+; Complement to pass DOUBLE TESTS
\ ==============================================================================
-\
-[UNDEFINED] VARIABLE [IF]
+
\ https://forth-standard.org/standard/core/VARIABLE
-: VARIABLE \ --
-CREATE
-HI2LO
-MOV @RSP+,IP
-ADD #2,&DP
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
+\ VARIABLE <name> -- define a Forth VARIABLE
+ [UNDEFINED] VARIABLE
+ [IF]
+ : VARIABLE
+ CREATE
+ HI2LO
+ MOV #DOVAR,-4(W) \ CFA = CALL rDOVAR
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] CELLS [IF]
+\ CONSTANT <name> n -- define a Forth CONSTANT
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV TOS,-2(W) \ PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CELLS
\ CELLS n1 -- n2 cells->adrs units
-CODE CELLS
-ADD TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] ALLOT [IF]
-\ https://forth-standard.org/standard/core/ALLOT
-\ ALLOT n -- allocate n bytes
-CODE ALLOT
-ADD TOS,&DP
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DEPTH [IF]
+ [UNDEFINED] CELLS
+ [IF]
+ CODE CELLS
+ ADD TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DEPTH
\ DEPTH -- +n number of items on stack, must leave 0 if stack empty
-CODE DEPTH
-MOV TOS,-2(PSP)
-MOV #PSTACK,TOS
-SUB PSP,TOS \ PSP-S0--> TOS
-RRA TOS \ TOS/2 --> TOS
-SUB #2,PSP \ post decrement stack...
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-\ https://forth-standard.org/standard/core/DUP
-\ DUP x -- x x duplicate top of stack
-CODE DUP
-BW1 SUB #2,PSP \ 2 push old TOS..
- MOV TOS,0(PSP) \ 3 ..onto stack
- MOV @IP+,PC \ 4
-ENDCODE
+ [UNDEFINED] DEPTH
+ [IF]
+ CODE DEPTH
+ MOV TOS,-2(PSP)
+ MOV #PSTACK,TOS
+ SUB PSP,TOS \ PSP-S0--> TOS
+ RRA TOS \ TOS/2 --> TOS
+ SUB #2,PSP \ post decrement stack...
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
-\ https://forth-standard.org/standard/core/qDUP
-\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0, init
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP \ immediate
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
MOV X,-4(W) \ xloop --> HERE
MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP \ immediate
-MOV #XPLOOP,X
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] I [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] = [IF]
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ZeroEqual
\ 0= n/u -- flag return true if TOS=0
-CODE 0=
-SUB #1,TOS \ borrow (clear cy) if TOS was 0
-SUBC TOS,TOS \ TOS=-1 if borrow was set
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] SOURCE [IF]
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,TOS \ borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS \ TOS=-1 if borrow was set
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SOURCE
\ SOURCE -- adr u of current input buffer
-CODE SOURCE
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &SOURCE_LEN,TOS
-MOV &SOURCE_ORG,0(PSP)
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] >IN [IF]
+ [UNDEFINED] SOURCE
+ [IF]
+ CODE SOURCE
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &SOURCE_LEN,TOS
+ MOV &SOURCE_ORG,0(PSP)
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toIN
\ C >IN -- a-addr holds offset in input stream
-TOIN CONSTANT >IN
-[THEN]
+ [UNDEFINED] >IN
+ [IF]
+ TOIN CONSTANT >IN
+ [THEN]
-[UNDEFINED] SWAP [IF]
-\ https://forth-standard.org/standard/core/SWAP
-\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-\ https://forth-standard.org/standard/core/DROP
-\ DROP x -- drop top of stack
-CODE DROP
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
\ https://forth-standard.org/standard/core/OnePlus
\ 1+ n1/u1 -- n2/u2 add 1 to TOS
-CODE 1+
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] CHAR [IF]
\ https://forth-standard.org/standard/core/CHAR
\ CHAR -- char parse ASCII character
-: CHAR
- $20 WORD 1+ C@
-;
-[THEN]
+ [UNDEFINED] CHAR
+ [IF]
+ : CHAR
+ $20 WORD 1+ C@
+ ;
+ [THEN]
-[UNDEFINED] [CHAR] [IF]
\ https://forth-standard.org/standard/core/BracketCHAR
\ [CHAR] -- compile character literal
-: [CHAR]
- CHAR POSTPONE LITERAL
-; IMMEDIATE
-[THEN]
+ [UNDEFINED] [CHAR]
+ [IF]
+ : [CHAR]
+ CHAR POSTPONE LITERAL
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] 2/ [IF]
\ https://forth-standard.org/standard/core/TwoDiv
\ 2/ x1 -- x2 arithmetic right shift
-CODE 2/
-RRA TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] INVERT [IF]
\ https://forth-standard.org/standard/core/INVERT
\ INVERT x1 -- x2 bitwise inversion
-CODE INVERT
-XOR #-1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] INVERT
+ [IF]
+ CODE INVERT
+ XOR #-1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] RSHIFT [IF]
\ https://forth-standard.org/standard/core/RSHIFT
\ RSHIFT x1 u -- x2 logical R7 shift u places
-CODE RSHIFT
- MOV @PSP+,W
- AND #$1F,TOS \ no need to shift more than 16
-0<> IF
- BEGIN BIC #C,SR \ Clr Carry
+ [UNDEFINED] RSHIFT
+ [IF]
+ CODE RSHIFT
+ MOV @PSP+,W
+ AND #$1F,TOS \ no need to shift more than 16
+ 0<> IF
+ BEGIN
+ BIC #C,SR \ Clr Carry
RRC W
SUB #1,TOS
- 0= UNTIL
-THEN MOV W,TOS
- MOV @IP+,PC
-ENDCODE
-[THEN]
+ 0= UNTIL
+ THEN
+ MOV W,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] 0< [IF]
-\ https://forth-standard.org/standard/core/Zeroless
-\ 0< n -- flag true if TOS negative
-CODE 0<
-ADD TOS,TOS \ 1 set carry if TOS negative
-SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
-XOR #-1,TOS \ 1 TOS=-1 if carry was set
-MOV @IP+,PC \
-ENDCODE
-[THEN]
-
-[UNDEFINED] S>D [IF]
\ https://forth-standard.org/standard/core/StoD
\ S>D n -- d single -> double prec.
-: S>D
- DUP 0<
-;
-[THEN]
+ [UNDEFINED] S>D
+ [IF]
+ : S>D
+ DUP 0<
+ ;
+ [THEN]
-[UNDEFINED] 1- [IF]
\ https://forth-standard.org/standard/core/OneMinus
\ 1- n1/u1 -- n2/u2 subtract 1 from TOS
-CODE 1-
-SUB #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] UM/MOD [IF]
-\ https://forth-standard.org/standard/core/UMDivMOD
-\ UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
-CODE UM/MOD
- PUSH #DROP \
- MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
-ENDCODE
-[THEN]
+ [UNDEFINED] 1-
+ [IF]
+ CODE 1-
+ SUB #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SM/REM [IF]
-\ https://forth-standard.org/standard/core/SMDivREM
-\ SM/REM DVDlo DVDhi DIVlo -- r3 q4 symmetric signed div
-CODE SM/REM
-MOV TOS,S \ S=DIVlo
-MOV @PSP,T \ T=DVD_sign==>rem_sign
-CMP #0,TOS \ n2 >= 0 ?
-S< IF \
- XOR #-1,TOS
- ADD #1,TOS \ -- d1 u2
-THEN
-CMP #0,0(PSP) \ d1hi >= 0 ?
-S< IF \
- XOR #-1,2(PSP) \ d1lo
- XOR #-1,0(PSP) \ d1hi
- ADD #1,2(PSP) \ d1lo+1
- ADDC #0,0(PSP) \ d1hi+C
-THEN \ -- uDVDlo uDVDhi uDIVlo
-PUSHM #3,IP \ save IP,S,T
-LO2HI
- UM/MOD \ -- uREMlo uQUOTlo
-HI2LO
-POPM #3,IP \ restore T,S,IP
-CMP #0,T \ T=rem_sign
-S< IF
- XOR #-1,0(PSP)
- ADD #1,0(PSP)
-THEN
-XOR S,T \ S=divisor T=quot_sign
-CMP #0,T \ -- n3 u4 T=quot_sign
-S< IF
+\ https://forth-standard.org/standard/core/NEGATE
+\ C NEGATE x1 -- x2 two's complement
+ [UNDEFINED] NEGATE
+ [IF]
+ CODE NEGATE
XOR #-1,TOS
ADD #1,TOS
-THEN \ -- n3 n4 S=divisor
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] FM/MOD [IF]
-\ https://forth-standard.org/standard/core/FMDivMOD
-\ FM/MOD d1 n1 -- r q floored signed div'n
-: FM/MOD
-SM/REM
-HI2LO \ -- remainder quotient S=divisor
-CMP #0,0(PSP) \ remainder <> 0 ?
-0<> IF
- CMP #1,TOS \ quotient < 1 ?
- S< IF
- ADD S,0(PSP) \ add divisor to remainder
- SUB #1,TOS \ decrement quotient
- THEN
-THEN
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] NIP [IF]
-\ https://forth-standard.org/standard/core/NIP
-\ NIP x1 x2 -- x2 Drop the first item below the top of stack
-CODE NIP
-ADD #2,PSP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #HEREXEC,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] / [IF]
-\ https://forth-standard.org/standard/core/Div
-\ / n1 n2 -- n3 signed quotient
-: /
->R DUP 0< R> FM/MOD NIP
-;
-[THEN]
-
-[UNDEFINED] NEGATE [IF]
-\ https://forth-standard.org/standard/core/NEGATE
-\ C NEGATE x1 -- x2 two's complement
-CODE NEGATE
-XOR #-1,TOS
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #HEREXEC,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] CHARS [IF]
\ https://forth-standard.org/standard/core/CHARS
\ CHARS n1 -- n2 chars->adrs units
-CODE CHARS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] CHARS
+ [IF]
+ CODE CHARS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] MOVE [IF]
\ https://forth-standard.org/standard/core/MOVE
\ MOVE addr1 addr2 u -- smart move
\ VERSION FOR 1 ADDRESS UNIT = 1 CHAR
-CODE MOVE
-MOV TOS,W \ W = cnt
-MOV @PSP+,Y \ Y = addr2 = dst
-MOV @PSP+,X \ X = addr1 = src
-MOV @PSP+,TOS \ pop new TOS
-CMP #0,W \ count = 0 ?
-0<> IF \ if 0, already done !
- CMP X,Y \ Y-X \ dst - src
- 0<> IF \ else already done !
- U< IF \ U< if src > dst
- BEGIN \ copy W bytes
- MOV.B @X+,0(Y)
- ADD #1,Y
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV TOS,W \ W = cnt
+ MOV @PSP+,Y \ Y = addr2 = dst
+ MOV @PSP+,X \ X = addr1 = src
+ MOV @PSP+,TOS \ pop new TOS
+ CMP #0,W \ count = 0 ?
+ 0<> IF \ if 0, already done !
+ CMP X,Y \ Y-X \ dst - src
+ 0<> IF \ else already done !
+ U< IF \ U< if src > dst
+ BEGIN \ copy W bytes
+ MOV.B @X+,0(Y)
+ ADD #1,Y
+ SUB #1,W
+ 0= UNTIL
+ MOV @IP+,PC \ out 1 of MOVE ====>
+ THEN \ U>= if dst > src
+ ADD W,Y \ copy W bytes beginning with the end
+ ADD W,X
+ BEGIN
+ SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
SUB #1,W
0= UNTIL
- MOV @IP+,PC \ out 1 of MOVE ====>
- THEN \ U>= if dst > src
- ADD W,Y \ copy W bytes beginning with the end
- ADD W,X
- BEGIN
- SUB #1,X
- SUB #1,Y
- MOV.B @X,0(Y)
- SUB #1,W
- 0= UNTIL
+ THEN
THEN
-THEN
-MOV @IP+,PC \ out 2 of MOVE ====>
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ out 2 of MOVE ====>
+ ENDCODE
+ [THEN]
-[UNDEFINED] DECIMAL [IF]
\ https://forth-standard.org/standard/core/DECIMAL
-CODE DECIMAL
-MOV #$0A,&BASEADR
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] DECIMAL
+ [IF]
+ CODE DECIMAL
+ MOV #$0A,&BASEADR
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] BASE [IF]
\ https://forth-standard.org/standard/core/BASE
\ BASE -- a-addr holds conversion radix
-BASEADR CONSTANT BASE
-[THEN]
+ [UNDEFINED] BASE
+ [IF]
+ BASEADR CONSTANT BASE
+ [THEN]
-[UNDEFINED] ( [IF]
\ https://forth-standard.org/standard/core/p
\ ( -- skip input until char ) or EOL
-: (
-')' WORD DROP
-; IMMEDIATE
-[THEN]
+ [UNDEFINED] ( ; )
+ [IF]
+ : (
+ ')' WORD DROP
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] .( [IF] \ "
\ https://forth-standard.org/standard/core/Dotp
\ .( -- type comment immediatly.
-CODE .( \ "
-MOV #0,&CAPS \ CAPS OFF
-COLON
-')' WORD
-COUNT TYPE
-$20 CAPS ! \ CAPS ON
-; IMMEDIATE
-[THEN]
-
+ [UNDEFINED] .( ; "
+ [IF]
+ CODE .( ; "
+ MOV #0,&CAPS \ CAPS OFF
+ COLON
+ ')' WORD
+ COUNT TYPE
+ $20 CAPS ! \ CAPS ON
+ ; IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+ DEFER CR \ DEFERed definition, by default executes that of :NONAME
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
\ ==============================================================================
\ TESTER
\ ==============================================================================
-
+\
\ From: John Hayes S1I
\ Subject: tester.fr
\ Date: Mon, 27 Nov 95 13:10:09 PST
-
+\
\ (C) 1995 JOHNS HOPKINS UNIVERSITY / APPLIED PHYSICS LABORATORY
\ MAY BE DISTRIBUTED FREELY AS LONG AS THIS COPYRIGHT NOTICE REMAINS.
\ VERSION 1.1
-
+\
\ 22/1/09 The words { and } have been changed to T{ and }T respectively to
\ agree with the Forth 200X file ttester.fs. This avoids clashes with
\ locals using { ... } and the FSL use of }
-
+\
\ 13/05/14 jmt. added colorised error messages.
0 CONSTANT FALSE
VARIABLE VERBOSE
FALSE VERBOSE !
\ TRUE VERBOSE !
-
+\
\ : EMPTY-STACK ( ... -- ) \ EMPTY STACK: HANDLES UNDERFLOWED STACK TOO.
\ DEPTH ?DUP
\ IF DUP 0< IF NEGATE 0
\ DO 0 LOOP
\ ELSE 0 DO DROP LOOP THEN
\ THEN ;
-\
+\
\ : ERROR \ ( C-ADDR U -- ) DISPLAY AN ERROR MESSAGE FOLLOWED BY
\ \ THE LINE THAT HAD THE ERROR.
\ TYPE SOURCE TYPE CR \ DISPLAY LINE CORRESPONDING TO ERROR
ELSE >IN ! DROP [CHAR] * EMIT
THEN ;
+\ Constant definitions
+
+DECIMAL
+
+0 INVERT CONSTANT 1SD
+1SD 1 RSHIFT CONSTANT MAX-INTD \ 01...1
+MAX-INTD INVERT CONSTANT MIN-INTD \ 10...0
+MAX-INTD 2/ CONSTANT HI-INT \ 001...1
+MIN-INTD 2/ CONSTANT LO-INT \ 110...1
+
+\ 1SD .
+\ MAX-INTD .
+\ MIN-INTD .
+\ HI-INT .
+\ LO-INT .
+
ECHO
\ ==============================================================================
\ but WITHOUT ANY WARRANTY; without even the implied warranty of
\ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
\
-\ The tests are not claimed to be comprehensive or correct
+\ The tests are not claimed to be comprehensive or correct
\ ------------------------------------------------------------------------------
\ Version 0.13 Assumptions and dependencies changed
\ 0.12 1 August 2015 test D< acts on MS cells of double word
\ included prior to this file
\ - the Core word set is available and tested
\ ------------------------------------------------------------------------------
-\ Constant definitions
-
-DECIMAL
-
-0 INVERT CONSTANT 1SD
-1SD 1 RSHIFT CONSTANT MAX-INTD \ 01...1
-MAX-INTD INVERT CONSTANT MIN-INTD \ 10...0
-MAX-INTD 2/ CONSTANT HI-INT \ 001...1
-MIN-INTD 2/ CONSTANT LO-INT \ 110...1
-
-\ 1SD .
-\ MAX-INTD .
-\ MIN-INTD .
-\ HI-INT .
-\ LO-INT .
-
-\ ------------------------------------------------------------------------------
TESTING interpreter and compiler reading double numbers, with/without prefixes
T{ 1. -> 1 0 }T
T{ MAX-2INT MIN-2INT D< -> FALSE }T
T{ MAX-2INT 2DUP -1. D+ D< -> FALSE }T
T{ MIN-2INT 2DUP 1. D+ D< -> TRUE }T
-T{ MAX-INTD S>D 2DUP 1. D+ D< -> TRUE }T \ Ensure D< acts on MS cells
+T{ MAX-INTD S>D 2DUP 1. D+ D< -> TRUE }T \ Ensure D< acts on MS cells
T{ -1. -1. D= -> TRUE }T
T{ -1. 0. D= -> FALSE }T
; FF_SPECS.f
; ---------------------------------
-\ first, we test for downloading driver only if good FastForth version
-CODE ABORT_FF_SPECS
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_FF_SPECS definition before resuming
-;
-
-ABORT_FF_SPECS
-
-[UNDEFINED] AND [IF]
-\ https://forth-standard.org/standard/core/AND
-\ C AND x1 x2 -- x3 logical AND
-CODE AND
-AND @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF] \ define DUP and DUP?
+\ first, we do some tests allowing the download
+ CODE ABORT_FF_SPECS
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS \ ARG
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ RST_RET \ remove ABORT_FF_SPECS definition before resuming
+ ;
+
+ ABORT_FF_SPECS
+
\ https://forth-standard.org/standard/core/DUP
\ DUP x -- x x duplicate top of stack
-CODE DUP
+ [UNDEFINED] DUP
+ [IF] \ define DUP and DUP?
+ CODE DUP
BW1 SUB #2,PSP \ 2 push old TOS..
MOV TOS,0(PSP) \ 3 ..onto stack
MOV @IP+,PC \ 4
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/qDUP
\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DROP
\ DROP x -- drop top of stack
-CODE DROP
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] SWAP [IF]
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ROT
\ ROT x1 x2 x3 -- x2 x3 x1
-CODE ROT
-MOV @PSP,W \ 2 fetch x2
-MOV TOS,0(PSP) \ 3 store x3
-MOV 2(PSP),TOS \ 3 fetch x1
-MOV W,2(PSP) \ 3 store x2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @PSP,W \ 2 fetch x2
+ MOV TOS,0(PSP) \ 3 store x3
+ MOV 2(PSP),TOS \ 3 fetch x1
+ MOV W,2(PSP) \ 3 store x2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
-\ https://forth-standard.org/standard/core/ZeroEqual
-\ 0= n/u -- flag return true if TOS=0
-CODE 0=
-SUB #1,TOS \ borrow (clear cy) if TOS was 0
-SUBC TOS,TOS \ TOS=-1 if borrow was set
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0< [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Zeroless
\ 0< n -- flag true if TOS negative
-CODE 0<
-ADD TOS,TOS \ 1 set carry if TOS negative
-SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
-XOR #-1,TOS \ 1 TOS=-1 if carry was set
-MOV @IP+,PC \
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
+ [UNDEFINED] 0<
+ [IF]
+ CODE 0<
+ ADD TOS,TOS \ 1 set carry if TOS negative
+ SUBC TOS,TOS \ 1 TOS=-1 if carry was clear
+ XOR #-1,TOS \ 1 TOS=-1 if carry was set
+ MOV @IP+,PC \
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1 flag Z = 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
\ https://forth-standard.org/standard/core/Uless
\ U< u1 u2 -- flag test u1<u2, unsigned
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @PSP+,TOS \ 2 u2-u1
-0<> IF
- MOV #-1,TOS \ 1
- U< IF \ 2 flag
- AND #0,TOS \ 1 flag Z = 1
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @PSP+,TOS \ 2 u2-u1
+ U< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,TOS \ 1
THEN
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+\ https://forth-standard.org/standard/core/Umore
+\ U> n1 n2 -- flag
+ CODE U>
+ SUB @PSP+,TOS \ 2
+ U< ?GOTO BW1 \ 2 flag = true, Z = 0
+FW1 AND #0,TOS \ 1 Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] IF [IF] \ define IF and THEN
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+ CODE IF
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
+ CODE THEN
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ELSE
\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/BEGIN
\ BEGIN -- BEGINadr initialize backward branch
-CODE BEGIN
+ [UNDEFINED] BEGIN
+ [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+ CODE BEGIN
MOV #HEREXEC,PC
-ENDCODE IMMEDIATE
-[THEN]
+ ENDCODE IMMEDIATE
-[UNDEFINED] UNTIL [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
\ https://forth-standard.org/standard/core/UNTIL
\ UNTIL BEGINadr -- resolve conditional backward branch
-CODE UNTIL
+ CODE UNTIL \ immediate
MOV #QFBRAN,X
BW1 ADD #4,&DP \ compile two words
MOV &DP,W \ W = HERE
MOV TOS,-2(W) \ compile bakcward adr at HERE+2
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/AGAIN
\ AGAIN BEGINadr -- resolve uncondionnal backward branch
-CODE AGAIN
-MOV #BRAN,X
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
+ CODE AGAIN
+ MOV #BRAN,X
+ GOTO BW1
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] WHILE [IF] \ define DO LOOP +LOOP
+ [UNDEFINED] WHILE
+ [IF] \
\ https://forth-standard.org/standard/core/WHILE
\ WHILE BEGINadr -- WHILEadr BEGINadr
-: WHILE
-POSTPONE IF SWAP
-; IMMEDIATE
-[THEN]
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] REPEAT [IF] \ define DO LOOP +LOOP
+ [UNDEFINED] REPEAT
+ [IF]
\ https://forth-standard.org/standard/core/REPEAT
\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
- MOV X,-4(W) \ xloop --> HERE
- MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP
-MOV #XPLOOP,X
-GOTO BW1 \ goto BW1 LOOP
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] I [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #HEREXEC,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #HEREXEC,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SPACES [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- 'SP' EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,TOS
+ 0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ 'SP' EMIT
+ HI2LO
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+ THEN
+ MOV @PSP+,TOS \ -- drop n
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OnePlus
\ 1+ n1/u1 -- n2/u2 add 1 to TOS
-CODE 1+
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] - [IF]
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2* [IF]
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/TwoTimes
\ 2* x1 -- x2 arithmetic left shift
-CODE 2*
-ADD TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 2*
+ [IF]
+ CODE 2*
+ ADD TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/TwoDiv
+\ 2/ x1 -- x2 arithmetic right shift
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] UM/MOD [IF]
\ https://forth-standard.org/standard/core/UMDivMOD
\ UM/MOD udlo|udhi u1 -- r q unsigned 32/16->r16 q16
-CODE UM/MOD
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
PUSH #DROP \
MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] MOVE [IF]
\ https://forth-standard.org/standard/core/MOVE
\ MOVE addr1 addr2 u -- smart move
\ VERSION FOR 1 ADDRESS UNIT = 1 CHAR
-CODE MOVE
-MOV TOS,W \ W = cnt
-MOV @PSP+,Y \ Y = addr2 = dst
-MOV @PSP+,X \ X = addr1 = src
-MOV @PSP+,TOS \ pop new TOS
-CMP #0,W \ count = 0 ?
-0<> IF \ if 0, already done !
- CMP X,Y \ Y-X \ dst - src
- 0<> IF \ if dst = src, already done !
- U< IF \ U< if src > dst
- BEGIN \ copy W bytes
- MOV.B @X+,0(Y)
- ADD #1,Y
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV TOS,W \ W = cnt
+ MOV @PSP+,Y \ Y = addr2 = dst
+ MOV @PSP+,X \ X = addr1 = src
+ MOV @PSP+,TOS \ pop new TOS
+ CMP #0,W \ count = 0 ?
+ 0<> IF \ if 0, already done !
+ CMP X,Y \ Y-X \ dst - src
+ 0<> IF \ if dst = src, already done !
+ U< IF \ U< if src > dst
+ BEGIN \ copy W bytes
+ MOV.B @X+,0(Y)
+ ADD #1,Y
+ SUB #1,W
+ 0= UNTIL
+ MOV @IP+,PC
+ THEN \ U>= if dst > src
+ ADD W,Y \ copy W bytes beginning with the end
+ ADD W,X
+ BEGIN
+ SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
SUB #1,W
0= UNTIL
- MOV @IP+,PC
- THEN \ U>= if dst > src
- ADD W,Y \ copy W bytes beginning with the end
- ADD W,X
- BEGIN
- SUB #1,X
- SUB #1,Y
- MOV.B @X,0(Y)
- SUB #1,W
- 0= UNTIL
+ THEN
THEN
-THEN
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] WORDS [IF]
-\ https://forth-standard.org/standard/tools/WORDS
-\ list all words of vocabulary first in CONTEXT.
-: WORDS \ --
-CR
-CONTEXT @ PAD_ORG \ -- VOC_BODY PAD MOVE all threads of VOC_BODY in PAD_ORG
-THREADS @ 2* \ -- VOC_BODY PAD THREADS*2
-MOVE \ -- vocabulary entries are copied in PAD_ORG
-BEGIN \ --
- 0 DUP \ -- ptr=0 MAX=0
- THREADS @ 2* 0 \ -- ptr=0 MAX=0 THREADS*2 0
- DO \ -- ptr MAX I = PAD_ptr = thread*2
- DUP I PAD_ORG + @ \ -- ptr MAX MAX NFAx
- U< IF \ -- ptr MAX if MAX U< NFAx
- DROP DROP \ -- drop ptr and MAX
- I DUP PAD_ORG + @ \ -- new_ptr new_MAX
- THEN \
- 2 +LOOP \ -- ptr MAX
- ?DUP \ -- ptr MAX MAX | -- ptr 0 (all threads in PAD = 0)
-WHILE \ -- ptr MAX replace it by its LFA
- DUP \ -- ptr MAX MAX
- 2 - @ \ -- ptr MAX [LFA]
- ROT \ -- MAX [LFA] ptr
- PAD_ORG + \ -- MAX [LFA] thread
- ! \ -- MAX [LFA]=new_NFA updates PAD+ptr
- DUP \ -- MAX MAX
- COUNT $7F AND \ -- MAX addr count (with suppr. of immediate bit)
- TYPE \ -- MAX
- C@ $0F AND \ -- count_of_chars
- $10 SWAP - SPACES \ -- complete with spaces modulo 16 chars
-REPEAT \ --
-DROP \ ptr --
-; \ all threads in PAD are filled with 0
-[THEN]
-
-[UNDEFINED] CASE [IF]
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME \ part II : :NONAME part as default runtime of CR
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR \ set [PFA] of CR = >BODY addr of CR = CFA of :NONAME part
+
+ [THEN]
+
+\ customised WORD
+ : WORDS \ VOC_BODY --
+ PAD_ORG \ -- VOC_BODY PAD MOVE all threads of VOC_BODY in PAD_ORG
+ THREADS @ 2* \ -- VOC_BODY PAD THREADS*2
+ MOVE \ -- vocabulary entries are copied in PAD_ORG
+ BEGIN \ --
+ 0 DUP \ -- ptr=0 MAX=0
+ THREADS @ 2* 0 \ -- ptr=0 MAX=0 THREADS*2 0
+ DO \ -- ptr MAX I = PAD_ptr = thread*2
+ DUP I PAD_ORG + @ \ -- ptr MAX MAX NFAx
+ U< IF \ -- ptr MAX if MAX U< NFAx
+ DROP DROP \ -- drop ptr and MAX
+ I DUP PAD_ORG + @ \ -- new_ptr new_MAX
+ THEN \
+ 2 +LOOP \ -- ptr MAX
+ ?DUP \ -- ptr MAX MAX | -- ptr 0 (all threads in PAD = 0)
+ WHILE \ -- ptr MAX replace it by its LFA
+ DUP \ -- ptr MAX MAX
+ 2 - @ \ -- ptr MAX [LFA]
+ ROT \ -- MAX [LFA] ptr
+ PAD_ORG + \ -- MAX [LFA] thread
+ ! \ -- MAX MAX=highest_NFA [LFA]=new_NFA updates PAD_ORG+ptr
+ COUNT 2/ \ -- addr name_count 2/ to hide Immediate flag
+ DUP >R TYPE \ -- R-- count
+ $10 R> - SPACES \ -- R-- complete with spaces modulo 16 chars
+ REPEAT \ --
+ DROP \ ptr --
+ ; \ all threads in PAD are filled with 0
+
\ https://forth-standard.org/standard/core/CASE
-: CASE 0 ; IMMEDIATE \ -- #of-1
+ [UNDEFINED] CASE
+ [IF]
+ : CASE
+ 0
+ ; IMMEDIATE \ -- #of-1
\ https://forth-standard.org/standard/core/OF
-: OF \ #of-1 -- orgOF #of
-1+ \ count OFs
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE OVER POSTPONE = \ copy and test case value
-POSTPONE IF \ add orig to control flow stack
-POSTPONE DROP \ discards case value if =
-R> \ we can bring count back now
-; IMMEDIATE
+ : OF \ #of-1 -- orgOF #of
+ 1+ \ count OFs
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE OVER
+ POSTPONE = \ copy and test case value
+ POSTPONE IF \ add orig to control flow stack
+ POSTPONE DROP \ discards case value if =
+ R> \ we can bring count back now
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/ENDOF
-: ENDOF \ orgOF #of -- orgENDOF #of
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE ELSE
-R> \ we can bring count back now
-; IMMEDIATE
+ : ENDOF \ orgOF #of -- orgENDOF #of
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE ELSE
+ R> \ we can bring count back now
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/ENDCASE
-: ENDCASE \ orgENDOF1..orgENDOFn #of --
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] S_ [IF]
-CODE S_ \ Squote alias with blank instead quote separator
-MOV #0,&CAPS \ turn CAPS OFF
-COLON
-XSQUOTE , \ compile run-time code
-'SP' WORD \ -- c-addr (= HERE)
-HI2LO
-MOV.B @TOS,TOS \ -- len compile string
-ADD #1,TOS \ -- len+1
-BIT #1,TOS \ C = ~Z
-ADDC TOS,&DP \ store aligned DP
-MOV @PSP+,TOS \ --
-MOV @RSP+,IP \ pop paired with push COLON
-MOV #$20,&CAPS \ turn CAPS ON (default state)
-MOV @IP+,PC \ NEXT
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ESC [IF]
-CODE ESC
-CMP #0,&STATEADR
-0= IF MOV @IP+,PC \ interpret time usage disallowed
-THEN
-COLON
-'ESC' \ -- char escape
-POSTPONE LITERAL \ compile-time code : lit 'ESC'
-POSTPONE EMIT \ compile-time code : EMIT
-POSTPONE S_ \ compile-time code : S_ <escape_sequence>
-POSTPONE TYPE \ compile-time code : TYPE
-; IMMEDIATE
-[THEN]
+ : ENDCASE \ orgENDOF1..orgENDOFn #of --
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] S_
+ [IF]
+ CODE S_ \ Squote alias with blank instead quote separator
+ MOV #0,&CAPS \ turn CAPS OFF
+ COLON
+ XSQUOTE , \ compile run-time code
+ 'SP' WORD \ -- c-addr (= HERE)
+ HI2LO
+ MOV.B @TOS,TOS \ -- len compile string
+ ADD #1,TOS \ -- len+1
+ BIT #1,TOS \ C = ~Z
+ ADDC TOS,&DP \ store aligned DP
+ MOV @PSP+,TOS \ --
+ MOV @RSP+,IP \ pop paired with push COLON
+ MOV #$20,&CAPS \ turn CAPS ON (default state)
+ MOV @IP+,PC \ NEXT
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ESC
+ [IF]
+ CODE ESC
+ CMP #0,&STATEADR
+ 0= IF MOV @IP+,PC \ interpret time usage disallowed
+ THEN
+ COLON
+ 'ESC' \ -- char escape
+ POSTPONE LITERAL \ compile-time code : lit 'ESC'
+ POSTPONE EMIT \ compile-time code : EMIT
+ POSTPONE S_ \ compile-time code : S_ <escape_sequence>
+ POSTPONE TYPE \ compile-time code : TYPE
+ ; IMMEDIATE
+ [THEN]
+
+ [DEFINED] FORTH \ word-set addon ?
+ [IF]
+ CODE BODY>SQNFA \ BODY -- ADR cnt BODY > SQuoteNFA
+ SUB #2,PSP
+ SUB #4,TOS
+ MOV TOS,Y \ Y = CFA
+ MOV Y,X \ X = CFA
+ BEGIN
+ SUB #2,X
+ MOV X,0(PSP) \ -- string_test_address CFA
+ MOV.B @X+,TOS \ -- string_test_address cnt_test
+ RRA TOS \ -- string_test_address cnt_test/2
+ MOV TOS,W
+ BIT #1,W \ cnt_test even ?
+ 0= IF
+ ADD #1,W \ if yes add #1,TOS
+ THEN
+ ADD X,W \ string_test_address + cnt_test
+ CMP W,Y \ string_test_address + cnt_test = CFA ?
+ 0<> WHILE \ out of loop if yes
+ MOV @PSP,X \ loop back to test with X - one_word
+ REPEAT
+ MOV X,0(PSP) \ -- string_addr string_cnt
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ -------------------------------------------------------
-: SPECS \ to see all FastForth specifications
+ : SPECS \ to see all FastForth specifications
\ -------------------------------------------------------
-PWR_STATE \ before computing free bytes, remove all created words
-ECHO
-ESC [8;40;80t \ set 40L * 80C terminal display
-39 0 DO CR LOOP \ to avoid erasing any line of source, create 42-1 empty lines
-ESC [H \ then cursor home
-ESC [7m \ Turn reverse video on
-$0D EMIT ." FastForth V" \ title line in reverse video
-VERSION @
-0 <# # 'BS' HOLD # '.' HOLD #S #> TYPE
-." for MSP430FR"
-HERE \ HERE - MAIN_ORG = bytes code
-DEVICEID @ \ value kept in TLV area
-CASE
+ RST_RET \ before computing free bytes, remove all FF_SPECS definitions
+ ECHO
+ ESC [8;42;80t \ set 42L * 80C terminal display
+
+\ title in reverse video
+ ESC [7m \ Turn reverse video on
+ CR ." FastForth V"
+ VERSION @
+ 0 <# # 'BS' HOLD # '.' HOLD #S #> TYPE
+ ." for MSP430FR"
+ HERE \ HERE - MAIN_ORG = bytes code
+ DEVICEID @ \ value kept in TLV area
+ CASE
+
\ device_ID OF ." xxxx," $MAIN_ORG ENDOF \ <-- add here your device
- $8102 OF ." 5738," $C200 ENDOF
+ $8102 OF ." 5738," $C200 ENDOF
$8103 OF ." 5739," $C200 ENDOF
+ $810D OF ." 5986," $4400 ENDOF
$8160 OF ." 5948," $4400 ENDOF
$8169 OF ." 5969," $4400 ENDOF
- $825D OF ." 5972," $4400 ENDOF
$81A8 OF ." 6989," $4400 ENDOF
- $810D OF ." 5986," $4400 ENDOF
$81F0 OF ." 4133," $C400 ENDOF
$8240 OF ." 2433," $C400 ENDOF
+ $825D OF ." 5972," $4400 ENDOF
$82A1 OF ." 5994," $4000 ENDOF
$82A6 OF ." 5962," $4000 ENDOF
$830C OF ." 2355," $8000 ENDOF
$833C OF ." 2633," $C400 ENDOF
$833D OF ." 2533," $C400 ENDOF
ABORT" xxxx <-- unrecognized device!"
-ENDCASE \ -- HERE MAIN_ORG
-['] ['] DUP @ $1284 = \ DOCOL = CALL rDOCOL opcode
-IF ." DTC=1," DROP \ [CFA] = CALL rDOCOL
-ELSE 2 + @ $1284 = \
- IF ." DTC=2," \ [CFA] = PUSH IP, [CFA+2] = CALL rDOCOL
- ELSE ." DTC=3," \ [CFA] = PUSH IP, [CFA+2] = MOV PC,IP
+ ENDCASE \ -- HERE MAIN_ORG
+ ['] ['] DUP @ $1284 = \ DOCOL = CALL rDOCOL opcode
+ IF ." DTC=1," DROP \ [CFA] = CALL rDOCOL
+ ELSE 2 + @ $1284 = \
+ IF ." DTC=2," \ [CFA] = PUSH IP, [CFA+2] = CALL rDOCOL
+ ELSE ." DTC=3," \ [CFA] = PUSH IP, [CFA+2] = MOV PC,IP
+ THEN
THEN
-THEN
-$20 EMIT
-THREADS @ U. 'BS' EMIT ." -Entry word set, " \ number of Entry word set,
-FREQ_KHZ @ 0 1000 UM/MOD U. \ frequency,
-?DUP IF 'BS' EMIT ',' EMIT U. \ if remainder
-THEN ." MHz, " \ MCLK
-- U. ." bytes" \ HERE - MAIN_ORG = number of bytes code,
-ESC [0m \ Turn off character attributes
-CR
-." /COUNTED-STRING = 255" CR
-." /HOLD = 34" CR
-." /PAD = 84" CR
-." ADDRESS-UNIT-BITS = 16" CR
-." FLOORED = true" CR
-." MAX-CHAR = 255" CR
-." MAX-N = 32767" CR
-." MAX-U = 65535" CR
-." MAX-D = 2147483647" CR
-." MAX-UD = 4294967295" CR
-." STACK-CELLS = 48" CR
-." RETURN-STACK-CELLS= 48" CR
-." DeFiNiTiOnS aRe CaSe-InSeNsItIvE" CR
-CR
-ESC [7m ." KERNEL SPECS" ESC [0m \ subtitle in reverse video
-CR
-KERNEL_ADDON @
- DUP 0< IF ." 32.768kHz XTAL" CR THEN \ BIT15
-2* DUP 0< IF ." (RTS/CTS) UART TERMINAL" CR 2* \ BIT14 BIT13
- ELSE 2* DUP \ BIT13
- 0< IF ." (RTS) UART TERMINAL" CR
+ 'SP' EMIT
+ THREADS @ U. 'BS' EMIT
+ ." -Entry word set, " \ number of Entry word set,
+ FREQ_KHZ @ 0 1000 UM/MOD U. \ frequency
+ ?DUP IF 'BS' EMIT ',' EMIT U. \ if remainder
+ THEN ." MHz, " \ MCLK
+ - U. ." bytes" \ HERE - MAIN_ORG = number of bytes code,
+ ESC [0m \ Turn off character attributes
+
+\ general
+ CR
+ ." /COUNTED-STRING = 255" CR
+ ." /HOLD = 34" CR
+ ." /PAD = 84" CR
+ ." ADDRESS-UNIT-BITS = 16" CR
+ ." FLOORED DIVISION = "
+ KERNEL_ADDON @ \ negative value if FLOORED DIVISION
+ 0< IF ." true"
+ ELSE ." false"
+ THEN CR
+ ." MAX-CHAR = 255" CR
+ ." MAX-N = 32767" CR
+ ." MAX-U = 65535" CR
+ ." MAX-D = 2147483647" CR
+ ." MAX-UD = 4294967295" CR
+ ." STACK-CELLS = 48" CR
+ ." RETURN-STACK-CELLS= 48" CR
+ ." Definitions are forced to UPPERCASE." CR
+
+\ kernel specs
+ CR ESC [7m ." Kernel add-ons" ESC [0m CR \ subtitle in reverse video
+ KERNEL_ADDON @
+ 2* DUP 0< IF ." 32.768kHz LF XTAL" CR THEN \ BIT14
+ 2* DUP 0< IF ." /RTS /CTS " 2* \ BIT13
+ ELSE 2* DUP \ /BIT13
+ 0< IF ." /RTS " THEN \ /BIT13 & BIT12
THEN
- THEN
-2* DUP 0< IF ." (XON/XOFF) UART TERMINAL" CR \ BIT12
- THEN
-2* DUP 0< IF ." Half-Duplex TERMINAL" CR THEN \ BIT11
-2* DUP 0< IF ." I2C_Master TERMINAL" CR THEN \ BIT10
-2* DUP 0< IF ." Q15.16 input" CR THEN \ BIT9
-2* DUP 0< IF ." DOUBLE input" CR THEN \ BIT8
-2* DUP 0< IF ." MSP430_X assembler" CR 2* 2* \ BIT7 BIT6 BIT5
- ELSE 2* DUP \ BIT6
- 0< IF ." MSP430 Assembler"
- 2* DUP 0< IF ." with 20bits address" \ BIT5
- THEN CR
- ELSE 2* \ BIT5
+ 2* DUP 0< IF ." XON/XOFF " THEN \ BIT11
+ 2* DUP 0< IF ." Half-Duplex " THEN \ BIT10
+ 2* DUP 0< IF ." I2C_Master TERMINAL" \ BIT9
+ ELSE ." UART TERMINAL" THEN CR \ /BIT9
+ 2* DUP 0< IF 2* DUP 0< IF ." DOUBLE and " \ BIT8 + BIT7
+ THEN ." Q15.16 numbers handling" CR
+ ELSE 2* DUP 0< IF ." DOUBLE numbers handling" CR \ /BIT8 + BIT7
+ THEN
THEN
- THEN
-2* \ BIT4 free flags
-2* \ BIT3 free flags
-2* \ BIT2 free flags
-2* \ BIT1 free flags
-2* 0< IF \ BIT0 true if COND. COMPILATION
- [DEFINED] DEFER [IF] ." DEFER word set" CR [THEN]
- [DEFINED] ALSO [IF] ." VOCABULARY word set" CR [THEN]
- [DEFINED] LOAD" [IF] ." SD_CARD Loader" CR [THEN]
- [DEFINED] BOOT [IF] ." bootloader" CR [THEN]
- [DEFINED] READ" [IF] ." SD_CARD Read/Write" CR [THEN]
- CR
- ESC [7m ." OPTIONS" ESC [0m \ subtitle in reverse video
+ 2* DUP 0< IF ." MSP430_X assembler with TI's syntax"
+ CR 2* 2* \ BIT6 BIT5 BIT4
+ ELSE \ /BIT6
+ 2* DUP
+ 0< IF ." MSP430 Assembler" \ BIT5
+ 2* DUP
+ 0< IF ." , 20bits extended addresses," \ BIT4
+ THEN
+ ELSE 2* \ BIT4
+ THEN
+ ." with TI's syntax" CR
+ THEN DROP \ BIT2 to BIT0 are free
+ [DEFINED] FORTH [IF] ." word-set management" CR
+ [THEN]
+ [DEFINED] LOAD" [IF] ." SD_CARD Load" CR
+ [THEN]
+ [DEFINED] BOOT [IF] ." SD_CARD Bootloader" CR
+ [THEN]
+ [DEFINED] READ" [IF] ." SD_CARD Read/Write" CR
+ [THEN]
+
+\ word-set
+ LASTVOC \ -- VOCLINK addr.
+ BEGIN
+ @ ?DUP \ -- VOCLINK word-set here ?
+ WHILE \ -- VLK
+ DUP THREADS @ 2* - \ -- VLK WORDSET_BODY
+ CR ESC [7m
+ [DEFINED] FORTH \ word-set addon ?
+ [IF] DUP BODY>SQNFA \ -- VLK WRDST_BODY addr cnt
+ [ELSE] OVER @ \ -- VLK WRDST_BODY NEXT_VLINK
+ IF S" hidden" \ if next_vlink <>0
+ ELSE S" FORTH" \ if next_vlink = 0
+ THEN \ -- VLK WRDST_BODY addr cnt
+ [THEN]
+ TYPE ." word-set" \ -- VLK WRDST_BODY subtitle in reverse video
+ ESC [0m CR
+ WORDS CR \ -- VLINK definitions display
+ REPEAT
+
+\ extensions
+ CR ESC [7m ." EXTENSIONS" ESC [0m \ subtitle in reverse video
+ [DEFINED] {CORE_ANS} [IF] CR ." core ANS94"
+ [THEN]
+ [DEFINED] {DOUBLE} [IF] CR ." DOUBLE word set"
+ [THEN]
+ [DEFINED] {UTILITY} [IF] CR ." UTILITY"
+ [THEN]
+ [DEFINED] {FIXPOINT} [IF] CR ." Q15.16 ADD SUB MUL DIV"
+ [THEN]
+ [DEFINED] {CORDIC} [IF] CR ." CORDIC engine"
+ [THEN]
+ [DEFINED] {SD_TOOLS} [IF] CR ." SD_TOOLS"
+ [THEN]
+ [DEFINED] {RTC} [IF] CR ." RTC utility"
+ [THEN]
+ [DEFINED] {UARTI2CS} [IF] CR ." UART to I2C_FastForth bridge"
+ [THEN]
CR
- [DEFINED] {CORE_ANS} [IF] ." ANS94 core" CR [THEN]
- [DEFINED] {DOUBLE} [IF] ." DOUBLE word set" CR [THEN]
- [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
- [DEFINED] {FIXPOINT} [IF] ." Q15.16 ADD SUB MUL DIV" CR [THEN]
- [DEFINED] {CORDIC} [IF] ." CORDIC engine" CR [THEN]
- [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
- [DEFINED] {RTC} [IF] ." RTC utility" CR [THEN]
- [DEFINED] {UARTI2CS} [IF] ." UART to I2C_FastForth bridge" CR [THEN]
- [DEFINED] ALSO
- [IF]
- CR
- ESC [7m ." ASSEMBLER word set" ESC [0m \ subtitle in reverse video
- ALSO ASSEMBLER WORDS PREVIOUS \ type ASSEMBLER word set
- CR
- [THEN]
-THEN
-CR
-ESC [7m ." FORTH word set" ESC [0m \ subtitle in reverse video
-WORDS \ type FORTH word set
-CR
-HI2LO
-MOV #WARM+4,PC \ type count of bytes free without re-executing INI_APP, no return
-ENDCODE
-
-SPECS \ here FastForth displays a message with some informations
+ 0 SYS \ WARM
+ ;
+
+SPECS \ performs RST_RET and displays FastForth specs
\ rDODOES to rEXIT must be saved before use and restored after
\ scratch registers Y to S are free for use
\ under interrupt, IP is free for use
-\
+\
\ PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
\ PUSHM order : PSP,TOS,IP,S,T,W, X, Y, rDOCOL , rDOVAR , rDOCON , rDODOES , R3, SR, RSP, PC
\
\ ASSEMBLER conditionnal usage with ?JMP ?GOTO S< S>= U< U>= 0= 0<> 0<
\
-CODE ABORT_FIXPOINT
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &KERNEL_ADDON,TOS
-BIT #BIT10,TOS
-0<> IF MOV #0,TOS THEN \ if TOS <> 0 (FIXPOINT input), set TOS = 0
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-$0D EMIT \ return to column 1 without CR
-ABORT" FastForth V3.8 please!"
-ABORT" buil FastForth with FIXPOINT_INPUT addon !"
-PWR_STATE \ if no abort remove this word
-$1B EMIT $63 EMIT \ send 'ESC c' (clear screen)
-;
-
-ABORT_FIXPOINT
+ CODE ABORT_FIXPOINT
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &KERNEL_ADDON,TOS
+ BIT #BIT8,TOS
+ 0<> IF MOV #0,TOS THEN \ if TOS <> 0 (FIXPOINT input), set TOS = 0
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ $0D EMIT \ return to column 1 without CR
+ ABORT" FastForth V3.9 please!"
+ ABORT" build FastForth with Q15.16_INPUT addon !"
+ RST_RET \ if no abort remove this word
+ $1B EMIT $63 EMIT \ send 'ESC c' (clear screen)
+ ;
+
+ ABORT_FIXPOINT
; -----------------------------------------------------
-; FIXPOINT.f
+; FIXPOINT.f
; -----------------------------------------------------
-[DEFINED] {FIXPOINT} [IF] {FIXPOINT} [THEN]
-
-MARKER {FIXPOINT}
+ MARKER {FIXPOINT}
-[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] R> [IF]
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
\ https://forth-standard.org/standard/core/Uless
\ U< u1 u2 -- flag test u1<u2, unsigned
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @PSP+,TOS \ 2 u2-u1
-0<> IF
- MOV #-1,TOS \ 1
- U< IF \ 2 flag
- AND #0,TOS \ 1 flag Z = 1
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @PSP+,TOS \ 2 u2-u1
+ 0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
THEN
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] DABS [IF]
\ https://forth-standard.org/standard/double/DABS
\ DABS d1 -- |d1| absolute value
-CODE DABS
-AND #-1,TOS \ clear V, set N
-S< IF \
- XOR #-1,0(PSP) \ 4
- XOR #-1,TOS \ 1
- ADD #1,0(PSP) \ 4
- ADDC #0,TOS \ 1
-THEN
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] HOLDS [IF]
+ [UNDEFINED] DABS
+ [IF]
+ CODE DABS
+ AND #-1,TOS \ clear V, set N
+ S< IF \
+ XOR #-1,0(PSP) \ 4
+ XOR #-1,TOS \ 1
+ ADD #1,0(PSP) \ 4
+ ADDC #0,TOS \ 1
+ THEN
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/HOLDS
\ Adds the string represented by addr u to the pictured numeric output string
\ compilation use: <# S" string" HOLDS #>
\ free chars area in the 32+2 bytes HOLD buffer = {26,23,2} chars with a 32 bits sized {hexa,decimal,binary} number.
\ (2 supplementary bytes are room for sign - and decimal point)
\ C HOLDS addr u --
-CODE HOLDS
- MOV @PSP+,X \ 2 X=src
-BW3 ADD TOS,X \ 1 X=src_end
- MOV &HP,Y \ 3 Y=dst
-BEGIN SUB #1,X \ 1 src-1
- SUB #1,TOS \ 1 cnt-1
-U>= WHILE SUB #1,Y \ 1 dst-1
- MOV.B @X,0(Y) \ 4
-REPEAT MOV Y,&HP \ 3
- MOV @PSP+,TOS \ 2
- MOV @IP+,PC \ 4 15 words
-ENDCODE
-[THEN]
-
-CODE F+ \ add Q15.16|double numbers
- ADD @PSP+,2(PSP) \ -- sumlo d1hi d2hi
- ADDC @PSP+,TOS \ -- sumlo sumhi
- MOV @IP+,PC
-ENDCODE
-
-CODE F- \ substract Q15.16|double numbers
- SUB @PSP+,2(PSP) \ -- diflo d1hi d2hi
- SUBC TOS,0(PSP) \ -- diflo difhi d2hi
- MOV @PSP+,TOS
- MOV @IP+,PC
-ENDCODE
-
-TLV_ORG 4 + @ $81F3 U<
-$81EF TLV_ORG 4 + @ U<
-= [IF] ; MSP430FR413x subfamily without hardware_MPY
+ [UNDEFINED] HOLDS
+ [IF]
+ CODE HOLDS
+ MOV @PSP+,X \ 2 X=src
+BW3 ADD TOS,X \ 1 X=src_end
+ MOV &HP,Y \ 3 Y=dst
+ BEGIN
+ SUB #1,X \ 1 src-1
+ SUB #1,TOS \ 1 cnt-1
+ U>= WHILE
+ SUB #1,Y \ 1 dst-1
+ MOV.B @X,0(Y) \ 4
+ REPEAT
+ MOV Y,&HP \ 3
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4 15 words
+ ENDCODE
+ [THEN]
+
+ CODE F+ \ add Q15.16|double numbers
+ ADD @PSP+,2(PSP) \ -- sumlo d1hi d2hi
+ ADDC @PSP+,TOS \ -- sumlo sumhi
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE F- \ substract Q15.16|double numbers
+ SUB @PSP+,2(PSP) \ -- diflo d1hi d2hi
+ SUBC TOS,0(PSP) \ -- diflo difhi d2hi
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+
+ TLV_ORG 4 + @ $81F3 U<
+ $81EF TLV_ORG 4 + @ U<
+ = [IF] ; MSP430FR413x subfamily without hardware_MPY
\ unsigned multiply 32*32 = 64
\ don't use S reg (keep sign)
-CODE UDM*
- PUSH IP \ 3
- PUSHM #4,rDOVAR \ 6 save rDOVAR to rDOCOL regs to use M to R alias
- MOV 4(PSP),IP \ 3 MDlo
- MOV 2(PSP),T \ 3 MDhi
- MOV @PSP,W \ 2 MRlo
- MOV #0,M \ 1 MDLO=0
- MOV #0,P \ 1 MDHI=0
- MOV #0,4(PSP) \ 3 RESlo=0
- MOV #0,2(PSP) \ 3 REShi=0
- MOV #0,Q \ 1 RESLO=0
- MOV #0,R \ 1 RESHI=0
- MOV #1,X \ 1 BIT TEST REGlo
- MOV #0,Y \ 1 BIT TEST2 REGhi
-BEGIN CMP #0,X
- 0<> IF BIT X,W \ 2+1 TEST ACTUAL BIT MRlo
- ELSE BIT Y,TOS \ 2+1 TEST ACTUAL BIT MRhi
+ CODE UDM*
+ PUSH IP \ 3
+ PUSHM #4,rDOVAR \ 6 save rDOVAR to rDOCOL regs to use M to R alias
+ MOV 4(PSP),IP \ 3 MDlo
+ MOV 2(PSP),T \ 3 MDhi
+ MOV @PSP,W \ 2 MRlo
+ MOV #0,M \ 1 MDLO=0
+ MOV #0,P \ 1 MDHI=0
+ MOV #0,4(PSP) \ 3 RESlo=0
+ MOV #0,2(PSP) \ 3 REShi=0
+ MOV #0,Q \ 1 RESLO=0
+ MOV #0,R \ 1 RESHI=0
+ MOV #1,X \ 1 BIT TEST REGlo
+ MOV #0,Y \ 1 BIT TEST2 REGhi
+ BEGIN
+ CMP #0,X
+ 0<> IF
+ BIT X,W \ 2+1 TEST ACTUAL BIT MRlo
+ ELSE
+ BIT Y,TOS \ 2+1 TEST ACTUAL BIT MRhi
+ THEN
+ 0<> IF
+ ADD IP,4(PSP) \ 2+3 IF 1: ADD MDlo TO RESlo
+ ADDC T,2(PSP) \ 3 ADDC MDhi TO REShi
+ ADDC M,Q \ 1 ADDC MDLO TO RESLO
+ ADDC P,R \ 1 ADDC MDHI TO RESHI
+ THEN
+ ADD IP,IP \ 1 (RLA LSBs) MDlo *2
+ ADDC T,T \ 1 (RLC MSBs) MDhi *2
+ ADDC M,M \ 1 (RLC LSBs) MDLO *2
+ ADDC P,P \ 1 (RLC MSBs) MDHI *2
+ ADD X,X \ 1 (RLA) NEXT BIT TO TEST
+ ADDC Y,Y \ 1 (RLC) NEXT BIT TO TEST
+ U>= UNTIL
+ MOV Q,0(PSP) \ 2+2 IF BIT IN CARRY: FINISHED 32 * 16~ (average loop)
+ MOV R,TOS \ 1 high result in TOS
+ POPM #4,rDOVAR \ 6 restore rDOCOL to rDOVAR
+ MOV @RSP+,IP \ 2
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE F* \ s15.16 * s15.16 --> s15.16 result
+ MOV 2(PSP),S \
+ XOR TOS,S \ 1s15 XOR 2s15 --> S keep sign of result
+ BIT #$8000,2(PSP) \ MD < 0 ?
+ 0<> IF
+ XOR #-1,2(PSP)
+ XOR #-1,4(PSP)
+ ADD #1,4(PSP)
+ ADDC #0,2(PSP)
+ THEN
+ COLON
+ DABS UDM* \ -- RES0 RES1 RES2 RES3
+ HI2LO
+ MOV @RSP+,IP
+ MOV @PSP+,TOS \ -- RES0 RES1 RES2
+ MOV @PSP+,0(PSP) \ -- RES1 RES2
+ AND #-1,S \ clear V, set N; process S sign
+ S< IF
+ XOR #-1,0(PSP) \ INV(QUOTlo)
+ XOR #-1,TOS \ INV(QUOThi)
+ ADD #1,0(PSP) \ INV(QUOTlo)+1
+ ADDC #0,TOS \ INV(QUOThi)+C
THEN
- 0<> IF ADD IP,4(PSP) \ 2+3 IF 1: ADD MDlo TO RESlo
- ADDC T,2(PSP) \ 3 ADDC MDhi TO REShi
- ADDC M,Q \ 1 ADDC MDLO TO RESLO
- ADDC P,R \ 1 ADDC MDHI TO RESHI
- THEN ADD IP,IP \ 1 (RLA LSBs) MDlo *2
- ADDC T,T \ 1 (RLC MSBs) MDhi *2
- ADDC M,M \ 1 (RLC LSBs) MDLO *2
- ADDC P,P \ 1 (RLC MSBs) MDHI *2
- ADD X,X \ 1 (RLA) NEXT BIT TO TEST
- ADDC Y,Y \ 1 (RLC) NEXT BIT TO TEST
-U>= UNTIL MOV Q,0(PSP) \ 2+2 IF BIT IN CARRY: FINISHED 32 * 16~ (average loop)
- MOV R,TOS \ 1 high result in TOS
- POPM #4,rDOVAR \ 6 restore rDOCOL to rDOVAR
- MOV @RSP+,IP \ 2
- MOV @IP+,PC
-ENDCODE
-
-CODE F* \ s15.16 * s15.16 --> s15.16 result
- MOV 2(PSP),S \
- XOR TOS,S \ 1s15 XOR 2s15 --> S keep sign of result
- BIT #$8000,2(PSP) \ MD < 0 ?
-0<> IF XOR #-1,2(PSP)
- XOR #-1,4(PSP)
- ADD #1,4(PSP)
- ADDC #0,2(PSP)
-THEN COLON
- DABS UDM* \ -- RES0 RES1 RES2 RES3
- HI2LO
- MOV @RSP+,IP
- MOV @PSP+,TOS \ -- RES0 RES1 RES2
- MOV @PSP+,0(PSP) \ -- RES1 RES2
- AND #-1,S \ clear V, set N; process S sign
-S< IF XOR #-1,0(PSP) \ INV(QUOTlo)
- XOR #-1,TOS \ INV(QUOThi)
- ADD #1,0(PSP) \ INV(QUOTlo)+1
- ADDC #0,TOS \ INV(QUOThi)+C
-THEN MOV @IP+,PC
-ENDCODE
-
-[UNDEFINED] F#S [IF]
+ MOV @IP+,PC
+ ENDCODE
+
\ F#S Qlo Qhi len -- Qhi 0 convert fractional part Qlo of Q15.16 fixed point number
\ with len digits
-CODE F#S
- MOV @PSP,S \ -- Qlo Qhi len S = Qhi
- MOV #0,T \ T = count
- PUSHM #3,IP \ R-- IP Qhi count
- MOV 2(PSP),0(PSP) \ -- Qlo Qlo len
- MOV TOS,2(PSP) \ -- len Qlo len
-BEGIN MOV &BASEADR,TOS \ -- len Qlo base
- LO2HI
- UM* \ u1 u2 -- RESlo REShi
- HI2LO \ -- len RESlo digit
- CMP #10,TOS \ digit to char
- U>= IF ADD #7,TOS
- THEN ADD #$30,TOS \ -- len RESlo char
- MOV @RSP,T \ T=count
- MOV.B TOS,HOLDS_ORG(T) \ char to string_org(T)
- ADD #1,T \ count+1
- MOV T,0(RSP) \
- CMP 2(PSP),T \ -- len RESlo char count=len ?
-U>= UNTIL POPM #3,IP \ S=Qhi, T=len
- MOV T,TOS \ -- len RESlo len
- MOV S,2(PSP) \ -- Qhi RESlo len
- MOV #0,0(PSP) \ -- Qhi 0 len
- MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
- GOTO BW3 \ 36~ JMP HOLDS
-ENDCODE
-[THEN]
-
-[ELSE] ; hardware multiplier
-
-CODE F* \ signed s15.16 multiplication --> s15.16 result
- MOV 4(PSP),&MPYS32L \ 5 Load 1st operand
- MOV 2(PSP),&MPYS32H \ 5
- MOV @PSP,&OP2L \ 4 load 2nd operand
- MOV TOS,&OP2H \ 3
- ADD #4,PSP \ 1 remove 2 cells
- MOV &RES1,0(PSP) \ 5
- MOV &RES2,TOS \ 5
- MOV @IP+,PC
-ENDCODE
-
-[UNDEFINED] F#S [IF]
+ CODE F#S
+ MOV @PSP,S \ -- Qlo Qhi len S = Qhi
+ MOV #0,T \ T = count
+ PUSHM #3,IP \ R-- IP Qhi count
+ MOV 2(PSP),0(PSP) \ -- Qlo Qlo len
+ MOV TOS,2(PSP) \ -- len Qlo len
+ BEGIN
+ MOV &BASEADR,TOS \ -- len Qlo base
+ LO2HI
+ UM* \ u1 u2 -- RESlo REShi
+ HI2LO \ -- len RESlo digit
+ CMP #10,TOS \ digit to char
+ U>= IF
+ ADD #7,TOS
+ THEN
+ ADD #$30,TOS \ -- len RESlo char
+ MOV @RSP,T \ T=count
+ MOV.B TOS,HOLDS_ORG(T) \ char to string_org(T)
+ ADD #1,T \ count+1
+ MOV T,0(RSP) \
+ CMP 2(PSP),T \ -- len RESlo char count=len ?
+ U>= UNTIL
+ POPM #3,IP \ S=Qhi, T=len
+ MOV T,TOS \ -- len RESlo len
+ MOV S,2(PSP) \ -- Qhi RESlo len
+ MOV #0,0(PSP) \ -- Qhi 0 len
+ MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
+ GOTO BW3 \ 36~ JMP HOLDS
+ ENDCODE
+
+ [ELSE] ; hardware multiplier
+
+ CODE F* \ signed s15.16 multiplication --> s15.16 result
+ MOV 4(PSP),&MPYS32L \ 5 Load 1st operand
+ MOV 2(PSP),&MPYS32H \ 5
+ MOV @PSP,&OP2L \ 4 load 2nd operand
+ MOV TOS,&OP2H \ 3
+ ADD #4,PSP \ 1 remove 2 cells
+ MOV &RES1,0(PSP) \ 5
+ MOV &RES2,TOS \ 5
+ MOV @IP+,PC
+ ENDCODE
+
+
\ F#S Qlo Qhi len -- Qhi 0 convert fractionnal part of Q15.16 fixed point number
\ with len digits
-CODE F#S
- MOV 2(PSP),X \ -- Qlo Qhi len X = Qlo
- MOV @PSP,2(PSP) \ -- Qhi Qhi len
- MOV X,0(PSP) \ -- Qhi Qlo len
- MOV TOS,T \ T = len
- MOV #0,S \ S = count
-BEGIN MOV @PSP,&MPY \ Load 1st operand
- MOV &BASEADR,&OP2 \ Load 2nd operand
- MOV &RES0,0(PSP) \ -- Qhi RESlo x low result on stack
- MOV &RES1,TOS \ -- Qhi RESlo REShi high result in TOS
- CMP #10,TOS \ digit to char
- U>= IF ADD #7,TOS
- THEN ADD #$30,TOS
- MOV.B TOS,HOLDS_ORG(S) \ -- Qhi RESlo char char to string
- ADD #1,S \ count+1
- CMP T,S \ count=len ?
-0= UNTIL MOV T,TOS \ -- len RESlo len
- MOV #0,0(PSP) \ -- Qhi 0 len
- MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
- GOTO BW3 \ 35~ JMP HOLDS+2
-ENDCODE
-[THEN]
-
-[THEN] \ end of hardware/software multiplier
-
-CODE F/ \ Q15.16 / Q15.16 --> Q15.16 result
- MOV TOS,Y \ 1 Y=DVRhi
- MOV @PSP+,W \ 2 W=DVRlo
- MOV @PSP+,X \ 2 X=DVDhi
- MOV @PSP,T \ 2 T=DVDlo
- PUSHM #5,X \ 7 PUSHM DVDhi,DVRhi, M, P, Q
- AND #-1,Y \ 1 Y=DVRhi < 0 ?
-S< IF XOR #-1,W \ 1 W=INV(DVRlo)
- XOR #-1,Y \ 1 Y=INV(DVRhi)
- ADD #1,W \ 1 W=INV(DVRlo)+1
- ADDC #0,Y \ 1 Y=INV(DVRhi)+C
-THEN
- AND #-1,X \ 1 X=DVDhi < 0 ?
-S< IF XOR #-1,T \ 1 T=INV(DVDlo)
- XOR #-1,X \ 1 X=INV(DVDhi)
- ADD #1,T \ 1 T=INV(DVDlo)+1
- ADDC #0,X \ 1 X=INV(DVDhi)+C
-THEN
- MOV X,M \ 1 DVDhi --> REMlo to adjust Q15.16 division
- MOV T,X \ 1 DVDlo --> DVDhi
- MOV #0,T \ 1 0 --> DVDlo
+ CODE F#S
+ MOV 2(PSP),X \ -- Qlo Qhi len X = Qlo
+ MOV @PSP,2(PSP) \ -- Qhi Qhi len
+ MOV X,0(PSP) \ -- Qhi Qlo len
+ MOV TOS,T \ T = len
+ MOV #0,S \ S = count
+ BEGIN
+ MOV @PSP,&MPY \ Load 1st operand
+ MOV &BASEADR,&OP2 \ Load 2nd operand
+ MOV &RES0,0(PSP) \ -- Qhi RESlo x low result on stack
+ MOV &RES1,TOS \ -- Qhi RESlo REShi high result in TOS
+ CMP #10,TOS \ digit to char
+ U>= IF
+ ADD #7,TOS
+ THEN
+ ADD #$30,TOS
+ MOV.B TOS,HOLDS_ORG(S) \ -- Qhi RESlo char char to string
+ ADD #1,S \ count+1
+ CMP T,S \ count=len ?
+ 0= UNTIL
+ MOV T,TOS \ -- len RESlo len
+ MOV #0,0(PSP) \ -- Qhi 0 len
+ MOV #HOLDS_ORG,X \ -- Qhi 0 len X=HOLDS_ORG
+ GOTO BW3 \ 35~ JMP HOLDS+2
+ ENDCODE
+
+ [THEN] ; end of hardware/software multiplier
+
+ CODE F/ \ Q15.16 / Q15.16 --> Q15.16 result
+ MOV TOS,Y \ 1 Y=DVRhi
+ MOV @PSP+,W \ 2 W=DVRlo
+ MOV @PSP+,X \ 2 X=DVDhi
+ MOV @PSP,T \ 2 T=DVDlo
+ PUSHM #5,X \ 7 PUSHM DVDhi,DVRhi, M, P, Q
+ AND #-1,Y \ 1 Y=DVRhi < 0 ?
+ S< IF
+ XOR #-1,W \ 1 W=INV(DVRlo)
+ XOR #-1,Y \ 1 Y=INV(DVRhi)
+ ADD #1,W \ 1 W=INV(DVRlo)+1
+ ADDC #0,Y \ 1 Y=INV(DVRhi)+C
+ THEN
+ AND #-1,X \ 1 X=DVDhi < 0 ?
+ S< IF
+ XOR #-1,T \ 1 T=INV(DVDlo)
+ XOR #-1,X \ 1 X=INV(DVDhi)
+ ADD #1,T \ 1 T=INV(DVDlo)+1
+ ADDC #0,X \ 1 X=INV(DVDhi)+C
+ THEN
+ MOV X,M \ 1 DVDhi --> REMlo to adjust Q15.16 division
+ MOV T,X \ 1 DVDlo --> DVDhi
+ MOV #0,T \ 1 0 --> DVDlo
\ ------------------------------------------------------------------------
\ don't uncomment lines below, don't rub out, please !
\ ------------------------------------------------------------------------
\ MOV @PSP,T \ 2 T=DVDlo
\ PUSHM #5,X \ 7 PUSHM DVDhi,DVRhi, M, P, Q
\ MOV #0,M \ 1 M=REMlo = 0
- MOV #0,P \ 1 P=REMhi = 0
- MOV #32,Q \ 2 Q=count
-BW1 CMP Y,P \ 1 REMhi = DVRhi ?
- 0= IF CMP W,M \ 1 REMlo U< DVRlo ?
+ MOV #0,P \ 1 P=REMhi = 0
+ MOV #32,Q \ 2 Q=count
+BW1 CMP Y,P \ 1 REMhi = DVRhi ?
+ 0= IF
+ CMP W,M \ 1 REMlo U< DVRlo ?
THEN
- U>= IF SUB W,M \ 1 no: REMlo - DVRlo (carry is set)
- SUBC Y,P \ 1 REMhi - DVRhi
+ U>= IF
+ SUB W,M \ 1 no: REMlo - DVRlo (carry is set)
+ SUBC Y,P \ 1 REMhi - DVRhi
THEN
- BEGIN ADDC S,S \ 1 RLC quotLO
- ADDC TOS,TOS \ 1 RLC quotHI
- SUB #1,Q \ 1 Decrement loop counter
- U>= WHILE \ 2 out of loop if count<0
- ADD T,T \ 1 RLA DVDlo
- ADDC X,X \ 1 RLC DVDhi
- ADDC M,M \ 1 RLC REMlo
- ADDC P,P \ 1 RLC REMhi
- U< ?GOTO BW1 \ 2 19~ loop
- SUB W,M \ 1 REMlo - DVRlo
- SUBC Y,P \ 1 REMhi - DVRhi
- BIS #1,SR \ 1
- REPEAT \ 2 16~ loop
-\ MOV M,T \ 1 T=REMlo
-\ MOV P,W \ 1 W=REMhi
- POPM #5,X \ 7 X=DVDhi, Y=DVRhi, system regs M,P,Q restored
-\ CMP #0,X \ 1 sign of Rem ?
-\ S< IF XOR #-1,T \ 1 INV(REMlo)
-\ XOR #-1,W \ 1 INV(REMhi)
-\ ADD #1,T \ 1 INV(REMlo)+1
-\ ADDC #0,W \ 1 INV(REMhi)+C
+ BEGIN
+ ADDC S,S \ 1 RLC quotLO
+ ADDC TOS,TOS \ 1 RLC quotHI
+ SUB #1,Q \ 1 Decrement loop counter
+ U>= WHILE \ 2 out of loop if count<0
+ ADD T,T \ 1 RLA DVDlo
+ ADDC X,X \ 1 RLC DVDhi
+ ADDC M,M \ 1 RLC REMlo
+ ADDC P,P \ 1 RLC REMhi
+ U< ?GOTO BW1 \ 2 19~ loop
+ SUB W,M \ 1 REMlo - DVRlo
+ SUBC Y,P \ 1 REMhi - DVRhi
+ BIS #1,SR \ 1
+ REPEAT \ 2 16~ loop
+\ MOV M,T \ 1 T=REMlo
+\ MOV P,W \ 1 W=REMhi
+ POPM #5,X \ 7 X=DVDhi, Y=DVRhi, system regs M,P,Q restored
+\ CMP #0,X \ 1 sign of Rem ?
+\ S< IF XOR #-1,T \ 1 INV(REMlo)
+\ XOR #-1,W \ 1 INV(REMhi)
+\ ADD #1,T \ 1 INV(REMlo)+1
+\ ADDC #0,W \ 1 INV(REMhi)+C
\ THEN
-\ SUB #4,PSP \
-\ MOV T,4(PSP) \ REMlo
-\ MOV W,2(PSP) \ REMhi
- XOR X,Y \ Y = sign of Quot
- CMP #0,Y \ sign of Quot ?
-S< IF XOR #-1,S \ 1 INV(QUOTlo)
- XOR #-1,TOS \ 1 INV(QUOThi)
- ADD #1,S \ 1 INV(QUOTlo)+1
- ADDC #0,TOS \ 1 INV(QUOThi)+C
-THEN
- MOV S,0(PSP) \ 3 QUOTlo
- MOV @IP+,PC \ 4
-ENDCODE
-
-[UNDEFINED] F. [IF]
-CODE F. \ display a Q15.16 number with 4/5/16 digits after comma
-MOV TOS,S \ S = sign
-MOV #4,T \ T = 4 preset 4 digits for base 16 and by default
-MOV &BASEADR,W
-CMP #$0A,W
-0= IF \ if base 10
- ADD #1,T \ T = 5 set 5 digits
-ELSE
- CMP #2,W
- 0= IF \ if base 2
- MOV #$10,T \ T = 16 set 16 digits
+\ SUB #4,PSP \
+\ MOV T,4(PSP) \ REMlo
+\ MOV W,2(PSP) \ REMhi
+ XOR X,Y \ Y = sign of Quot
+ CMP #0,Y \ sign of Quot ?
+ S< IF
+ XOR #-1,S \ 1 INV(QUOTlo)
+ XOR #-1,TOS \ 1 INV(QUOThi)
+ ADD #1,S \ 1 INV(QUOTlo)+1
+ ADDC #0,TOS \ 1 INV(QUOThi)+C
+ THEN
+ MOV S,0(PSP) \ 3 QUOTlo
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE F. \ display a Q15.16 number with 4/5/16 digits after comma
+ MOV TOS,S \ S = sign
+ MOV #4,T \ T = 4 preset 4 digits for base 16 and by default
+ MOV &BASEADR,W
+ CMP #$0A,W
+ 0= IF \ if base 10
+ ADD #1,T \ T = 5 set 5 digits
+ ELSE
+ CMP #2,W
+ 0= IF \ if base 2
+ MOV #$10,T \ T = 16 set 16 digits
+ THEN
THEN
-THEN
-PUSHM #3,IP \ R-- IP sign #digit
-LO2HI
+ PUSHM #3,IP \ R-- IP sign #digit
+ LO2HI
<# DABS \ -- uQlo uQhi R-- IP sign #digit
R> F#S \ -- uQhi 0 R-- IP sign
$2C HOLD \ $2C = char ','
#S \ -- 0 0
R> SIGN #> \ -- addr len R-- IP
- TYPE $20 EMIT \ --
-;
+ TYPE $20 EMIT \ --
+ ;
-CODE S>F \ convert a signed number to a Q15.16 (signed) number
+ CODE S>F \ convert a signed number to a Q15.16 (signed) number
SUB #2,PSP
MOV #0,0(PSP)
MOV @IP+,PC
-ENDCODE
-[THEN]
+ ENDCODE
-RST_HERE
+ RST_SET
; -----------------------
; complement (volatile) for tests below
; -----------------------
-[UNDEFINED] ! [IF]
\ https://forth-standard.org/standard/core/Store
\ ! x a-addr -- store cell in memory
-CODE !
-MOV @PSP+,0(TOS) \ 4
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DOES> [IF]
+ [UNDEFINED] !
+ [IF]
+ CODE !
+ MOV @PSP+,0(TOS) \ 4
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DOES
\ DOES> -- set action for the latest CREATEd definition
-CODE DOES>
-MOV &LAST_CFA,W \ W = CFA of CREATEd word
-MOV #DODOES,0(W) \ replace CFA (DOCON) by new CFA (DODOES)
-MOV IP,2(W) \ replace PFA by the address after DOES> as execution address
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
+ [UNDEFINED] DOES>
+ [IF]
+ CODE DOES>
+ MOV &LAST_CFA,W \ W = CFA of CREATEd word
+ MOV #DODOES,0(W) \ replace CFA (DOCON) by new CFA (DODOES)
+ MOV IP,2(W) \ replace PFA by the address after DOES> as execution address
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2CONSTANT [IF]
+\ CONSTANT <name> n -- define a Forth CONSTANT
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV TOS,-2(W) \ PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/TwoCONSTANT
-: 2CONSTANT \ udlo/dlo/Qlo udhi/dhi/Qhi -- to create double or Q15.16 CONSTANT
-CREATE , , \ compile Qhi then Qlo
-DOES> \ execution part addr -- Qhi Qlo
-HI2LO
-SUB #2,PSP
-MOV 2(TOS),0(PSP)
-MOV @TOS,TOS
-MOV @RSP+,IP
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] D. [IF]
+ [UNDEFINED] 2CONSTANT
+ [IF]
+ : 2CONSTANT \ udlo/dlo/Qlo udhi/dhi/Qhi -- to create double or Q15.16 CONSTANT
+ CREATE , , \ compile Qhi then Qlo
+ DOES> \ execution part addr -- Qhi Qlo
+ HI2LO
+ SUB #2,PSP
+ MOV 2(TOS),0(PSP)
+ MOV @TOS,TOS
+ MOV @RSP+,IP
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/double/Dd
\ D. dlo dhi -- display d (signed)
-CODE D.
-MOV #U.,W \ U. + 10 = D.
-ADD #10,W
-MOV W,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] BASE [IF]
+ [UNDEFINED] D.
+ [IF]
+ CODE D.
+ MOV #U.,W \ U. + 10 = D.
+ ADD #10,W
+ MOV W,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/BASE
\ BASE -- a-addr holds conversion radix
-BASEADR CONSTANT BASE
-[THEN]
+ [UNDEFINED] BASE
+ [IF]
+ BASEADR CONSTANT BASE
+ [THEN]
-ECHO
+ ECHO
; -----------------------
; (volatile) tests for FIXPOINT.asm|FIXPOINT.f
3,14159 2CONSTANT PI
PI -1,0 F* 2CONSTANT -PI
-PI D. ; D. is not appropriate -->
+PI D. ; D. is not appropriate -->
-PI D. ; D. is not appropriate -->
-PI F. ; F. is a good choice! --->
+PI F. ; F. is a good choice! --->
-PI F. ; F. is a good choice! --->
-$10 BASE ! PI F.
+$10 BASE ! PI F.
-PI F.
-%10 BASE ! PI F.
+%10 BASE ! PI F.
-PI F.
-#10 BASE ! PI F.
+#10 BASE ! PI F.
-PI F.
- PI 2,0 F* F.
- PI -2,0 F* F.
--PI 2,0 F* F.
--PI -2,0 F* F.
+ PI 2,0 F* F.
+ PI -2,0 F* F.
+-PI 2,0 F* F.
+-PI -2,0 F* F.
- PI 2,0 F/ F.
- PI -2,0 F/ F.
--PI 2,0 F/ F.
--PI -2,0 F/ F.
+ PI 2,0 F/ F.
+ PI -2,0 F/ F.
+-PI 2,0 F/ F.
+-PI -2,0 F/ F.
32768,0 1,0 F* F. ; overflow! -->
32768,0 1,0 F/ F. ; overflow! -->
-32768,0 -1,0 F* F. ; overflow! -->
-32768,0 -1,0 F/ F. ; overflow! -->
-32767,99999 1,0 F* F.
-32767,99999 1,0 F/ F.
-32767,99999 2,0 F/ F.
-32767,99999 4,0 F/ F.
-32767,99999 8,0 F/ F.
-32767,99999 16,0 F/ F.
-
--32768,0 -2,0 F/ F.
--32768,0 -4,0 F/ F.
--32768,0 -8,0 F/ F.
--32768,0 -16,0 F/ F.
--32768,0 -32,0 F/ F.
--32768,0 -64,0 F/ F.
-
--3276,80 -1,0 F/ F.
--327,680 -1,0 F/ F.
--32,7680 -1,0 F/ F.
--3,27680 -1,0 F/ F.
--0,32768 -1,0 F/ F.
+32767,99999 1,0 F* F.
+32767,99999 1,0 F/ F.
+32767,99999 2,0 F/ F.
+32767,99999 4,0 F/ F.
+32767,99999 8,0 F/ F.
+32767,99999 16,0 F/ F.
+
+-32768,0 -2,0 F/ F.
+-32768,0 -4,0 F/ F.
+-32768,0 -8,0 F/ F.
+-32768,0 -16,0 F/ F.
+-32768,0 -32,0 F/ F.
+-32768,0 -64,0 F/ F.
+
+-3276,80 -1,0 F/ F.
+-327,680 -1,0 F/ F.
+-32,7680 -1,0 F/ F.
+-3,27680 -1,0 F/ F.
+-0,32768 -1,0 F/ F.
; SQRT(32768)^2 = 32768
- 181,01933598375 181,01933598375 F* F.
+ 181,01933598375 181,01933598375 F* F.
181,01933598375 -181,01933598375 F* F.
-181,01933598375 181,01933598375 F* F.
-181,01933598375 -181,01933598375 F* F.
-
-RST_STATE
+
+RST_RET
+++ /dev/null
-
-; ---------------------------------
-; FF_SPECS.4th for MSP_EXP430FR5994
-; ---------------------------------
-
-CODE ABORT_FF_SPECS
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_FF_SPECS
-
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
-CODE 0=
-SUB #1,R14
-SUBC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0< [IF]
-CODE 0<
-ADD R14,R14
-SUBC R14,R14
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF]
-CODE BEGIN
- MOV #$4028,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] UNTIL [IF]
-CODE UNTIL
- MOV #$4034,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE AGAIN
-MOV #$403A,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] WHILE [IF]
-: WHILE
-POSTPONE IF SWAP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] REPEAT [IF]
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #$4028,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2* [IF]
-CODE 2*
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] UM/MOD [IF]
-CODE UM/MOD
- PUSH #DROP
- MOV #$4066,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
-CODE MOVE
-MOV R14,R10
-MOV @R15+,R8
-MOV @R15+,R9
-MOV @R15+,R14
-CMP #0,R10
-0<> IF
- CMP R9,R8
- 0<> IF
- U< IF
- BEGIN
- MOV.B @R9+,0(R8)
- ADD #1,R8
- SUB #1,R10
- 0= UNTIL
- MOV @R13+,R0
- THEN
- ADD R10,R8
- ADD R10,R9
- BEGIN
- SUB #1,R9
- SUB #1,R8
- MOV.B @R9,0(R8)
- SUB #1,R10
- 0= UNTIL
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] WORDS [IF]
-: WORDS
-CR
-$1DCA @ $1CE4
-$1810 @ 2*
-MOVE
-BEGIN
- 0 DUP
- $1810 @ 2* 0
- DO
- DUP I $1CE4 + @
- U< IF
- DROP DROP
- I DUP $1CE4 + @
- THEN
- 2 +LOOP
- ?DUP
-WHILE
- DUP
- 2 - @
- ROT
- $1CE4 +
- !
- DUP
- COUNT $7F AND
- TYPE
- C@ $0F AND
- $10 SWAP - SPACES
-REPEAT
-DROP
-;
-[THEN]
-
-[UNDEFINED] CASE [IF]
-: CASE 0 ; IMMEDIATE
-
-: OF
-1+
->R
-POSTPONE OVER POSTPONE =
-POSTPONE IF
-POSTPONE DROP
-R>
-; IMMEDIATE
-
-: ENDOF
->R
-POSTPONE ELSE
-R>
-; IMMEDIATE
-
-: ENDCASE
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] S_ [IF]
-CODE S_
-MOV #0,&$1DB4
-COLON
-$4014 ,
-$20 WORD
-HI2LO
-MOV.B @R14,R14
-ADD #1,R14
-BIT #1,R14
-ADDC R14,&$1DC6
-MOV @R15+,R14
-MOV @R1+,R13
-MOV #$20,&$1DB4
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ESC [IF]
-CODE ESC
-CMP #0,&$1DBE
-0= IF MOV @R13+,R0
-THEN
-COLON
-$1B
-POSTPONE LITERAL
-POSTPONE EMIT
-POSTPONE S_
-POSTPONE TYPE
-; IMMEDIATE
-[THEN]
-
-: SPECS
-PWR_STATE
-ECHO
-ESC [8;40;80t
-39 0 DO CR LOOP
-ESC [H
-ESC [7m
-$0D EMIT ." FastForth V"
-$180E @
-0 <# # $08 HOLD # '.' HOLD #S #> TYPE
-." for MSP430FR"
-HERE
-$1A04 @
-CASE
- $8102 OF ." 5738," $C200 ENDOF
- $8103 OF ." 5739," $C200 ENDOF
- $8160 OF ." 5948," $4400 ENDOF
- $8169 OF ." 5969," $4400 ENDOF
- $825D OF ." 5972," $4400 ENDOF
- $81A8 OF ." 6989," $4400 ENDOF
- $810D OF ." 5986," $4400 ENDOF
- $81F0 OF ." 4133," $C400 ENDOF
- $8240 OF ." 2433," $C400 ENDOF
- $82A1 OF ." 5994," $4000 ENDOF
- $82A6 OF ." 5962," $4000 ENDOF
- $830C OF ." 2355," $8000 ENDOF
- $830D OF ." 2353," $C000 ENDOF
- $831E OF ." 2155," $8000 ENDOF
- $831D OF ." 2153," $C000 ENDOF
- $832A OF ." 2476," $8000 ENDOF
- $832B OF ." 2475," $8000 ENDOF
- $833C OF ." 2633," $C400 ENDOF
- $833D OF ." 2533," $C400 ENDOF
- ABORT" xxxx <-- unrecognized device!"
-ENDCASE
-['] ['] DUP @ $1284 =
-IF ." DTC=1," DROP
-ELSE 2 + @ $1284 =
- IF ." DTC=2,"
- ELSE ." DTC=3,"
- THEN
-THEN
-$20 EMIT
-$1810 @ U. $08 EMIT ." -Entry word set, "
-$1800 @ 0 1000 UM/MOD U.
-?DUP IF $08 EMIT ',' EMIT U.
-THEN ." MHz, "
-- U. ." bytes"
-ESC [0m
-CR
-." /COUNTED-STRING = 255" CR
-." /HOLD = 34" CR
-." /PAD = 84" CR
-." ADDRESS-UNIT-BITS = 16" CR
-." FLOORED = true" CR
-." MAX-CHAR = 255" CR
-." MAX-N = 32767" CR
-." MAX-U = 65535" CR
-." MAX-D = 2147483647" CR
-." MAX-UD = 4294967295" CR
-." STACK-CELLS = 48" CR
-." RETURN-STACK-CELLS= 48" CR
-." DeFiNiTiOnS aRe CaSe-InSeNsItIvE" CR
-CR
-ESC [7m ." KERNEL SPECS" ESC [0m
-CR
-$1812 @
- DUP 0< IF ." 32.768kHz XTAL" CR THEN
-2* DUP 0< IF ." (4/2) UART TERMINAL" CR 2*
- ELSE 2* DUP
- 0< IF ." (RTS) UART TERMINAL" CR
- THEN
- THEN
-2* DUP 0< IF ." (XON/XOFF) UART TERMINAL" CR
- THEN
-2* DUP 0< IF ." Half-Duplex TERMINAL" CR THEN
-2* DUP 0< IF ." I2C_Master TERMINAL" CR THEN
-2* DUP 0< IF ." Q15.16 input" CR THEN
-2* DUP 0< IF ." DOUBLE input" CR THEN
-2* DUP 0< IF ." MSP430_X assembler" CR 2* 2*
- ELSE 2* DUP
- 0< IF ." MSP430 Assembler"
- 2* DUP 0< IF ." with 20bits address"
- THEN CR
- ELSE 2*
- THEN
- THEN
-2*
-2*
-2*
-2*
-2* 0< IF
- [DEFINED] DEFER [IF] ." DEFER word set" CR [THEN]
- [DEFINED] ALSO [IF] ." VOCABULARY word set" CR [THEN]
- [DEFINED] LOAD" [IF] ." SD_CARD Loader" CR [THEN]
- [DEFINED] BOOT [IF] ." bootloader" CR [THEN]
- [DEFINED] READ" [IF] ." SD_CARD Read/Write" CR [THEN]
- CR
- ESC [7m ." OPTIONS" ESC [0m
- CR
- [DEFINED] {CORE_ANS} [IF] ." ANS94 core" CR [THEN]
- [DEFINED] {DOUBLE} [IF] ." DOUBLE word set" CR [THEN]
- [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
- [DEFINED] {FIXPOINT} [IF] ." Q15.16 ADD SUB MUL DIV" CR [THEN]
- [DEFINED] {CORDIC} [IF] ." CORDIC engine" CR [THEN]
- [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
- [DEFINED] {RTC} [IF] ." RTC utility" CR [THEN]
- [DEFINED] {UARTI2CS} [IF] ." UART to I2C_FastForth bridge" CR [THEN]
- [DEFINED] ALSO
- [IF]
- CR
- ESC [7m ." ASSEMBLER word set" ESC [0m
- ALSO ASSEMBLER WORDS PREVIOUS
- CR
- [THEN]
-THEN
-CR
-ESC [7m ." FORTH word set" ESC [0m
-WORDS
-CR
-HI2LO
-MOV #WARM+4,R0
-ENDCODE
-
-SPECS
+++ /dev/null
-
-; --------
-; BOOT.4th for MSP_EXP430FR5994
-; --------
-
-CODE ABORT_BOOTSTRAP
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_BOOTSTRAP
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-$04 = [IF]
- LOAD" SD_TEST.4TH"
-[THEN]
+++ /dev/null
-
-CODE I2CTERM_ABORT
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1812,R14
-BIT #$7800,R14
-0<> IF MOV #0,R14 THEN
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-ABORT" <-- Ouch! unexpected I2C_FastForth target!"
-PWR_STATE
-;
-
-I2CTERM_ABORT
-
-; ------------
-; CHNGBAUD.4th for MSP_EXP430FR5994
-; ------------
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U/ [IF]
-CODE U/
-SUB #2,R15
-MOV #0,0(R15)
-CALL #$4066
-MOV @R15,R14
-ADD #4,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
-ELSE
- XOR #-1,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] < [IF]
-CODE <
- SUB @R15+,R14
- S< ?GOTO FW1
- 0<> IF
-BW1 MOV #-1,R14
- THEN
- MOV @R13+,R0
-ENDCODE
-
-CODE >
- SUB @R15+,R14
- S< ?GOTO BW1
-FW1 AND #0,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] CASE [IF]
-: CASE 0 ; IMMEDIATE
-
-: OF
-1+
->R
-POSTPONE OVER POSTPONE =
-POSTPONE IF
-POSTPONE DROP
-R>
-; IMMEDIATE
-
-: ENDOF
->R
-POSTPONE ELSE
-R>
-; IMMEDIATE
-
-: ENDCASE
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] S_ [IF]
-CODE S_
-MOV #0,&$1DB4
-COLON
-$4014 ,
-$20 WORD
-HI2LO
-MOV.B @R14,R14
-ADD #1,R14
-BIT #1,R14
-ADDC R14,&$1DC6
-MOV @R15+,R14
-MOV @R1+,R13
-MOV #$20,&$1DB4
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ESC [IF]
-CODE ESC
-CMP #0,&$1DBE
-0= IF MOV @R13+,R0
-THEN
-COLON
-$1B
-POSTPONE LITERAL
-POSTPONE EMIT
-POSTPONE S_
-POSTPONE TYPE
-; IMMEDIATE
-[THEN]
-
-: BAD_MHz
-$20 DUP EMIT
- ABORT" only for 1,4,8,16,24 MHz MCLK!"
-;
-
-: OVR_BAUDS
-$20 DUP EMIT ESC [7m
- ." with MCLK = " $1800 @ 1000 U/ .
- ABORT" MHz? don't dream!"
-;
-
-: CHNGBAUD
-PWR_STATE
-ECHO
-ESC [8;42;128t
-41 0 DO CR LOOP
-ESC [H
-
-$1800 @ DUP >R
-." target MCLK = " 1000 U/ . ." MHz" CR
-." choose your baudrate:" CR
-." 0 --> 6 MBds" CR
-." 1 --> 5 MBds" CR
-." 2 --> 4 MBds" CR
-." 3 --> 3 MBds" CR
-." 4 --> 1843200 Bds" CR
-." 5 --> 921600 Bds" CR
-." 6 --> 460800 Bds" CR
-." 7 --> 230400 Bds" CR
-." 8 --> 115200 Bds" CR
-." 9 --> 38400 Bds" CR
-." A --> 19200 Bds" CR
-." B --> 9600 Bds" CR
-." other --> abort" CR
-." your choice: "
-KEY
-
-CASE
-#48 OF ." 6 MBds"
- R> CASE
- #24000 OF $4 $0
- ENDOF
- 24000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#49 OF ." 5 MBds"
- R> CASE
- #24000 OF $4 $EE00 ENDOF
- #20000 OF $4 $0 ENDOF
- 20000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#50 OF ." 4 MBds"
- R> CASE
- #24000 OF $6 $0 ENDOF
- #20000 OF $5 $0 ENDOF
- #16000 OF $4 $0 ENDOF
- 16000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#51 OF ." 3 MBds"
- R> CASE
- #24000 OF $8 $0 ENDOF
- #20000 OF $6 $D600 ENDOF
- #16000 OF $5 $4900 ENDOF
- #12000 OF $4 $0 ENDOF
- 12000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#52 OF ." 1843200 Bds"
- R> CASE
- #24000 OF $0D $0200 ENDOF
- #20000 OF $0A $DF00 ENDOF
- #16000 OF $8 $D600 ENDOF
- #12000 OF $6 $AA00 ENDOF
- #8000 OF $5 $9200 ENDOF
- 8000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#53 OF ." 921600 Bds"
- R> CASE
- #24000 OF $1 $00A1 ENDOF
- #20000 OF $1 $B751 ENDOF
- #16000 OF $11 $4A00 ENDOF
- #12000 OF $0D $0200 ENDOF
- #8000 OF $8 $D600 ENDOF
- #4000 OF $4 $4900 ENDOF
- 4000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#54 OF ." 460800 Bds"
- R> CASE
- #24000 OF $3 $0241 ENDOF
- #20000 OF $2 $92B1 ENDOF
- #16000 OF $2 $BB21 ENDOF
- #12000 OF $1 $00A1 ENDOF
- #8000 OF $11 $4A00 ENDOF
- #4000 OF $8 $D600 ENDOF
- #2000 OF $4 $4900 ENDOF
- 2000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#55 OF ." 230400 Bds"
- R> CASE
- #24000 OF $6 $2081 ENDOF
- #20000 OF $5 $EE61 ENDOF
- #16000 OF $4 $5551 ENDOF
- #12000 OF $3 $0241 ENDOF
- #8000 OF $2 $BB21 ENDOF
- #4000 OF $11 $4A00 ENDOF
- #2000 OF $8 $D600 ENDOF
- #1000 OF $4 $4900 ENDOF
- 1000 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#56 OF ." 115200 Bds"
- R> CASE
- #24000 OF $0D $4901 ENDOF
- #20000 OF $0A $AD01 ENDOF
- #16000 OF $8 $F7A1 ENDOF
- #12000 OF $6 $2081 ENDOF
- #8000 OF $4 $5551 ENDOF
- #4000 OF $2 $BB21 ENDOF
- #2000 OF $11 $4A00 ENDOF
- #1000 OF $8 $D600 ENDOF
- #500 OF $4 $4900 ENDOF
- 500 <
- IF OVR_BAUDS
- THEN BAD_MHz
- ENDCASE
- ENDOF
-#57 OF ." 38400 Bds"
- R> CASE
- #24000 OF $27 $0011 ENDOF
- #16000 OF $1A $D601 ENDOF
- #8000 OF $0D $4901 ENDOF
- #4000 OF $6 $2081 ENDOF
- #1000 OF $1 $00A1 ENDOF
- BAD_MHz
- ENDCASE
- ENDOF
-#65 OF ." 19200 Bds"
- R> CASE
- #24000 OF $4E $0021 ENDOF
- #16000 OF $34 $4911 ENDOF
- #8000 OF $1A $D601 ENDOF
- #4000 OF $0D $4901 ENDOF
- #1000 OF $3 $0241 ENDOF
- BAD_MHz
- ENDCASE
- ENDOF
-#66 OF ." 9600 Bds"
- R> CASE
- #24000 OF $9C $0041 ENDOF
- #16000 OF $68 $D621 ENDOF
- #8000 OF $34 $4911 ENDOF
- #4000 OF $1A $D601 ENDOF
- #1000 OF $6 $2081 ENDOF
- BAD_MHz
- ENDCASE
- ENDOF
- ." abort" ABORT" "
-ENDCASE
-$1804 !
-$1802 !
-CR ESC [7m
-." Change baudrate in Teraterm, save its setup, then reset target."
-;
-
-CHNGBAUD
+++ /dev/null
-
-CODE ABORT_CORDIC
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1812,R14
-BIT #$400,R14
-0<> IF MOV #0,R14 THEN
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-ABORT" build FastForth with FIXPOINT_INPUT addon !"
-PWR_STATE
-;
-
-ABORT_CORDIC
-
-; ----------
-; CORDIC.4th for MSP_EXP430FR5994
-; ----------
-
-[DEFINED] {CORDIC} [IF] {CORDIC} [THEN]
-
-MARKER {CORDIC}
-
-
-
-CREATE T_ARCTAN
-12870 ,
-7598 ,
-4014 ,
-2038 ,
-1023 ,
-512 ,
-256 ,
-128 ,
-64 ,
-32 ,
-16 ,
-8 ,
-4 ,
-2 ,
-1 ,
-
-CREATE T_SCALE
-46340 ,
-41448 ,
-40211 ,
-39900 ,
-39822 ,
-39803 ,
-39798 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-39797 ,
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DABS [IF]
-CODE DABS
-AND #-1,R14
-S< IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HOLDS [IF]
-CODE HOLDS
- MOV @R15+,R9
-BW3 ADD R14,R9
- MOV &$1DB2,R8
-BEGIN SUB #1,R9
- SUB #1,R14
-U>= WHILE SUB #1,R8
- MOV.B @R9,0(R8)
-REPEAT MOV R8,&$1DB2
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-$81EF $1A04 @ U<
-$1A04 @ $81F3 U<
-= [IF] ; MSP430FR413x subfamily without hardware_MPY
-
-[UNDEFINED] F#S [IF]
-CODE F#S
- MOV @R15,R12
- MOV #0,R11
- PUSHM #3,R13
- MOV 2(R15),0(R15)
- MOV R14,2(R15)
-BEGIN MOV &$1DDC,R14
- LO2HI
- UM*
- HI2LO
- CMP #10,R14
- U>= IF ADD #7,R14
- THEN ADD #$30,R14
- MOV @R1,R11
- MOV.B R14,$1D90(R11)
- ADD #1,R11
- MOV R11,0(R1)
- CMP 2(R15),R11
-U>= UNTIL POPM #3,R13
- MOV R11,R14
- MOV R12,2(R15)
- MOV #0,0(R15)
- MOV #$1D90,R9
- GOTO BW3
-ENDCODE
-[THEN]
-
-HDNCODE XSCALE
- MOV T_SCALE(R10),R6
-UMSTAR1 MOV #0,R8
- MOV #0,R12
- MOV #0,R11
- MOV #1,R10
-BEGIN BIT R10,R6
- 0<> IF ADD R9,R12
- ADDC R8,R11
- THEN ADD R9,R9
- ADDC R8,R8
- ADD R10,R10
-U>= UNTIL
- MOV R11,R9
- MOV #$40E2,R6
- MOV @R1+,R0
-ENDCODE
-
-[ELSE] ; hardware multiplier
-
-[UNDEFINED] F#S [IF]
-CODE F#S
- MOV 2(R15),R9
- MOV @R15,2(R15)
- MOV R9,0(R15)
- MOV R14,R11
- MOV #0,R12
-BEGIN MOV @R15,&$4C0
- MOV &$1DDC,&$4C8
- MOV &$4E4,0(R15)
- MOV &$4E6,R14
- CMP #10,R14
- U>= IF ADD #7,R14
- THEN ADD #$30,R14
- MOV.B R14,$1D90(R12)
- ADD #1,R12
- CMP R11,R12
-0= UNTIL MOV R11,R14
- MOV #0,0(R15)
- MOV #$1D90,R9
- GOTO BW3
-ENDCODE
-[THEN]
-
-HDNCODE XSCALE
-MOV T_SCALE(R10),&$4D4
-MOV #0,&$4D6
-MOV R9,&$4C8
-MOV &$4E6,R9
-MOV @R1+,R0
-ENDCODE
-
-[THEN] ; end of hardware multiplier
-
-CODE POL2REC
-PUSH R13
-MOV @R15+,&$4D0
-MOV R14,&$4D2
-MOV #286,&$4C8
-MOV &$4E4,R8
-MOV &$4E6,R14
-MOV #-1,R13
-MOV @R15,R9
-MOV #0,R8
-BEGIN
- ADD #1,R13
- MOV R9,R12
- MOV R8,R11
- MOV #0,R10
- GOTO FW1
- BEGIN
- RRA R12
- RRA R11
- ADD #1,R10
-FW1 CMP R13,R10
- 0= UNTIL
- ADD R10,R10
- CMP #0,R14
- 0>= IF
- SUB R11,R9
- ADD R12,R8
- SUB T_ARCTAN(R10),R14
- ELSE
- ADD R11,R9
- SUB R12,R8
- ADD T_ARCTAN(R10),R14
- THEN
- CMP #0,R14
- 0<> WHILE
- CMP #14,R13
-0= UNTIL
- THEN
-CALL #XSCALE
-MOV R9,0(R15)
-MOV R8,R9
-CALL #XSCALE
-MOV R9,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-
-
-CODE REC2POL
-MOV @R15,R9
-MOV R14,R8
-MOV R8,R11
-CMP #0,R11
-S< IF
- XOR #-1,R11
- ADD #1,R11
-THEN
-MOV R9,R12
-CMP #0,R12
-S< IF
- XOR #-1,R12
- ADD #1,R12
-THEN
-MOV #-1,R14
-CMP #0,R9
-0= IF
- CMP #0,R8
- 0= IF
- LO2HI
- ABORT" null inputs!"
- HI2LO
- THEN
-THEN
-CMP R12,R11
-U< IF
- MOV R12,R11
-THEN
-CMP #16384,R11
- U>= IF
- LO2HI
- ABORT" |x| or |y| >= 16384"
- HI2LO
- THEN
-MOV #1,R12
-RLAM #3,R11
-GOTO FW1
-BEGIN
- ADD R9,R9
- ADD R8,R8
- ADD R12,R12
- ADD R11,R11
-FW1
-U>= UNTIL
-PUSHM #2,R13
-MOV #-1,R13
-MOV #0,R14
- BEGIN
- ADD #1,R13
- MOV R9,R12
- MOV R8,R11
- MOV #0,R10
- GOTO FW1
- BEGIN
- RRA R12
- RRA R11
- ADD #1,R10
-FW1 CMP R13,R10
- 0= UNTIL
- ADD R10,R10
- CMP #0,R8
- S>= IF
- ADD R11,R9
- SUB R12,R8
- ADD T_ARCTAN(R10),R14
- ELSE
- SUB R11,R9
- ADD R12,R8
- SUB T_ARCTAN(R10),R14
- THEN
- CMP #0,R8
- 0<> WHILE
- CMP #14,R13
- 0= UNTIL
- THEN
-CALL #XSCALE
-POPM #2,R13
-GOTO FW1
-BEGIN
- RRA R9
-FW1 RRA R12
-U>= UNTIL
-MOV R9,0(R15)
-
-SUB #4,R15
-MOV R14,R6
-CMP #0,R6
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-MOV #0,2(R15)
-MOV R14,0(R15)
-MOV #286,R14
-CALL #$4066
-MOV @R15+,0(R15)
-CMP #0,R6
-S< IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
-THEN
-MOV #$40E2,R6
-MOV @R13+,R0
-ENDCODE
-
-
-[UNDEFINED] F. [IF]
-CODE F.
-MOV R14,R12
-MOV #4,R11
-MOV &$1DDC,R10
-CMP ##10,R10
-0= IF
- ADD #1,R11
-ELSE
- CMP #%10,R10
- 0= IF
- MOV #16,R11
- THEN
-THEN
-PUSHM #3,R13
-LO2HI
- <# DABS
- R> F#S
- $2C HOLD
- #S
- R> SIGN #>
- TYPE $20 EMIT
-;
-
-[THEN]
-
-PWR_HERE
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-ECHO
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-; -----------------------------------------------------------
-; requires FIXPOINT_INPUT kernel addon, see forthMSP430FR.asm
-; -----------------------------------------------------------
-
-
-10000 89,0 POL2REC . . ; sin, cos -->
-10000 75,0 POL2REC . . ; sin, cos -->
-10000 60,0 POL2REC . . ; sin, cos -->
-10000 45,0 POL2REC . . ; sin, cos -->
-10000 30,0 POL2REC . . ; sin, cos -->
-10000 15,0 POL2REC . . ; sin, cos -->
-10000 1,0 POL2REC . . ; sin, cos -->
-16384 30,0 POL2REC SWAP . . ; x, y -->
-16384 45,0 POL2REC SWAP . . ; x, y -->
-16384 60,0 POL2REC SWAP . . ; x, y -->
-
-10000 -89,0 POL2REC . . ; sin, cos -->
-10000 -75,0 POL2REC . . ; sin, cos -->
-10000 -60,0 POL2REC . . ; sin, cos -->
-10000 -45,0 POL2REC . . ; sin, cos -->
-10000 -30,0 POL2REC . . ; sin, cos -->
-10000 -15,0 POL2REC . . ; sin, cos -->
-10000 -1,0 POL2REC . . ; sin, cos -->
-16384 -30,0 POL2REC SWAP . . ; x, y -->
-16384 -45,0 POL2REC SWAP . . ; x, y -->
-16384 -60,0 POL2REC SWAP . . ; x, y -->
-
--10000 89,0 POL2REC . . ; sin, cos -->
--10000 75,0 POL2REC . . ; sin, cos -->
--10000 60,0 POL2REC . . ; sin, cos -->
--10000 45,0 POL2REC . . ; sin, cos -->
--10000 30,0 POL2REC . . ; sin, cos -->
--10000 15,0 POL2REC . . ; sin, cos -->
--10000 1,0 POL2REC . . ; sin, cos -->
--16384 30,0 POL2REC SWAP . . ; x, y -->
--16384 45,0 POL2REC SWAP . . ; x, y -->
--16384 60,0 POL2REC SWAP . . ; x, y -->
-
--10000 -89,0 POL2REC . . ; sin, cos -->
--10000 -75,0 POL2REC . . ; sin, cos -->
--10000 -60,0 POL2REC . . ; sin, cos -->
--10000 -45,0 POL2REC . . ; sin, cos -->
--10000 -30,0 POL2REC . . ; sin, cos -->
--10000 -15,0 POL2REC . . ; sin, cos -->
--10000 -1,0 POL2REC . . ; sin, cos -->
--16384 -30,0 POL2REC SWAP . . ; x, y -->
--16384 -45,0 POL2REC SWAP . . ; x, y -->
--16384 -60,0 POL2REC SWAP . . ; x, y -->
-
-
-2 1 REC2POL F. . ; phase module -->
-2 -1 REC2POL F. . ; phase module -->
-20 10 REC2POL F. . ; phase module -->
-20 -10 REC2POL F. . ; phase module -->
-200 100 REC2POL F. . ; phase module -->
-100 -100 REC2POL F. . ; phase module -->
-2000 1000 REC2POL F. . ; phase module -->
-1000 -1000 REC2POL F. . ; phase module -->
-16000 8000 REC2POL F. . ; phase module -->
-16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
-
--2 1 REC2POL F. . ; phase module -->
--2 -1 REC2POL F. . ; phase module -->
--20 10 REC2POL F. . ; phase module -->
--20 -10 REC2POL F. . ; phase module -->
--200 100 REC2POL F. . ; phase module -->
--100 -100 REC2POL F. . ; phase module -->
--2000 1000 REC2POL F. . ; phase module -->
--1000 -1000 REC2POL F. . ; phase module -->
--16000 8000 REC2POL F. . ; phase module -->
--16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
-
-10000 89,0 POL2REC REC2POL ROT . F.
-10000 75,0 POL2REC REC2POL ROT . F.
-10000 60,0 POL2REC REC2POL ROT . F.
-10000 45,0 POL2REC REC2POL ROT . F.
-10000 30,0 POL2REC REC2POL ROT . F.
-10000 26,565 POL2REC REC2POL ROT . F.
-10000 15,0 POL2REC REC2POL ROT . F.
-10000 14,036 POL2REC REC2POL ROT . F.
-10000 7,125 POL2REC REC2POL ROT . F.
-10000 1,0 POL2REC REC2POL ROT . F.
-
-
+++ /dev/null
-
-CODE ABORT_CORE_ANS
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_CORE_ANS
-
-; ---------------------------------
-; CORE_ANS.4th for MSP_EXP430FR5994
-; ---------------------------------
-; words complement to pass CORETEST.4TH
-
-[DEFINED] {CORE_ANS} [IF] {CORE_ANS} [THEN]
-
-[UNDEFINED] {CORE_ANS} [IF]
-
-MARKER {CORE_ANS}
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] EXIT [IF]
-CODE EXIT
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DEPTH [IF]
-CODE DEPTH
-MOV R14,-2(R15)
-MOV #$1C80,R14
-SUB R15,R14
-RRA R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] NIP [IF]
-CODE NIP
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] @ [IF]
-CODE @
-MOV @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ! [IF]
-CODE !
-MOV @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C! [IF]
-CODE C!
-MOV.B @R15+,0(R14)
-ADD #1,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C, [IF]
-CODE C,
-MOV &$1DC6,R10
-MOV.B R14,0(R10)
-ADD #1,&$1DC6
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
-CODE 0=
-SUB #1,R14
-SUBC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0< [IF]
-CODE 0<
-ADD R14,R14
-SUBC R14,R14
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] < [IF]
-CODE <
- SUB @R15+,R14
- S< ?GOTO FW1
- 0<> IF
-BW1 MOV #-1,R14
- THEN
- MOV @R13+,R0
-ENDCODE
-
-CODE >
- SUB @R15+,R14
- S< ?GOTO BW1
-FW1 AND #0,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF]
-CODE BEGIN
- MOV #$4028,R0
-ENDCODE IMMEDIATE
-
-CODE UNTIL
- MOV #$4034,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE AGAIN
-MOV #$403A,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-
-: WHILE
-POSTPONE IF SWAP
-; IMMEDIATE
-
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] J [IF]
-CODE J
-SUB #2,R15
-MOV R14,0(R15)
-MOV 4(R1),R14
-SUB 6(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] UNLOOP [IF]
-CODE UNLOOP
-ADD #4,R1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] LEAVE [IF]
-CODE LEAVE
-MOV &$1DC6,R10
-MOV #UNLOOP,0(R10)
-MOV #$403A,2(R10)
-ADD #6,&$1DC6
-ADD #2,&$1C00
-ADD #4,R10
-MOV &$1C00,R9
-MOV R10,0(R9)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OR [IF]
-CODE OR
-BIS @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] XOR [IF]
-CODE XOR
-XOR @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] S>D [IF]
-: S>D
- DUP 0<
-;
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1- [IF]
-CODE 1-
-SUB #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] INVERT [IF]
-CODE INVERT
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] NEGATE [IF]
-CODE NEGATE
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ABS [IF]
-CODE ABS
-CMP #0,R14
-0>= IF
- MOV @R13+,R0
-THEN
-MOV #NEGATE,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] LSHIFT [IF]
-CODE LSHIFT
- MOV @R15+,R10
- AND #$1F,R14
-0<> IF
- BEGIN ADD R10,R10
- SUB #1,R14
- 0= UNTIL
-THEN MOV R10,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] RSHIFT [IF]
-CODE RSHIFT
- MOV @R15+,R10
- AND #$1F,R14
-0<> IF
- BEGIN BIC #1,R2
- RRC R10
- SUB #1,R14
- 0= UNTIL
-THEN MOV R10,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
-CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
-ENDCODE
-
-CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[THEN]
-
-[UNDEFINED] 2* [IF]
-CODE 2*
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2/ [IF]
-CODE 2/
-RRA R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-$1A00 4 + @ $81F3 U<
-$81EF $1A00 4 + @ U<
-= [IF] ; MSP430FR2xxx|MSP430FR4xxx subfamilies without hardware_MPY
-
- [UNDEFINED] M* [IF]
-
-
-
- CODE M*
- MOV @R15,R12
- CMP #0,R12
- S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
- THEN
- XOR R14,R12
- CMP #0,R14
- S< IF
- XOR #-1,R14
- ADD #1,R14
- THEN
- PUSHM #2,R13
- LO2HI
- UM*
- HI2LO
- POPM #2,R13
- CMP #0,R12
- S< IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
- THEN
- MOV @R13+,R0
- ENDCODE
- [THEN]
-
-[ELSE] ; MSP430FRxxxx with hardware_MPY
-
-[UNDEFINED] UM* [IF]
-CODE UM*
- MOV @R15,&$4C0
-BW1 MOV R14,&$4C8
- MOV &$4E4,0(R15)
- MOV &$4E6,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] M* [IF]
-CODE M*
- MOV @R15,&$4C2
- GOTO BW1
-ENDCODE
-[THEN]
-
-[THEN]
-
-[UNDEFINED] UM/MOD [IF]
-CODE UM/MOD
- PUSH #DROP
- MOV #$4066,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SM/REM [IF]
-CODE SM/REM
-MOV R14,R12
-MOV @R15,R11
-CMP #0,R14
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-CMP #0,0(R15)
-S< IF
- XOR #-1,2(R15)
- XOR #-1,0(R15)
- ADD #1,2(R15)
- ADDC #0,0(R15)
-THEN
-PUSHM #3,R13
-LO2HI
- UM/MOD
-HI2LO
-POPM #3,R13
-CMP #0,R11
-S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
-THEN
-XOR R12,R11
-CMP #0,R11
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] FM/MOD [IF]
-: FM/MOD
-SM/REM
-HI2LO
-CMP #0,0(R15)
-0<> IF
- CMP #1,R14
- S< IF
- ADD R12,0(R15)
- SUB #1,R14
- THEN
-THEN
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] * [IF]
-: *
-M* DROP
-;
-[THEN]
-
-[UNDEFINED] /MOD [IF]
-: /MOD
->R DUP 0< R> FM/MOD
-;
-[THEN]
-
-[UNDEFINED] / [IF]
-: /
->R DUP 0< R> FM/MOD NIP
-;
-[THEN]
-
-[UNDEFINED] MOD [IF]
-: MOD
->R DUP 0< R> FM/MOD DROP
-;
-[THEN]
-
-[UNDEFINED] */MOD [IF]
-: */MOD
->R M* R> FM/MOD
-;
-[THEN]
-
-[UNDEFINED] */ [IF]
-: */
->R M* R> FM/MOD NIP
-;
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R@ [IF]
-CODE R@
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] TUCK [IF]
-: TUCK SWAP OVER ;
-[THEN]
-
-[UNDEFINED] 2@ [IF]
-CODE 2@
-BW1 SUB #2,R15
- MOV 2(R14),0(R15)
- MOV @R14,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2! [IF]
-CODE 2!
-BW2 MOV @R15+,0(R14)
- MOV @R15+,2(R14)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DUP [IF]
-CODE 2DUP
-MOV R14,-2(R15)
-MOV @R15,-4(R15)
-SUB #4,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DROP [IF]
-CODE 2DROP
-ADD #2,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2SWAP [IF]
-CODE 2SWAP
-MOV @R15,R10
-MOV 4(R15),0(R15)
-MOV R10,4(R15)
-MOV R14,R10
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2OVER [IF]
-CODE 2OVER
-SUB #4,R15
-MOV R14,2(R15)
-MOV 8(R15),0(R15)
-MOV 6(R15),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] ALIGNED [IF]
-CODE ALIGNED
-BIT #1,R14
-ADDC #0,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ALIGN [IF]
-CODE ALIGN
-BIT #1,&$1DC6
-ADDC #0,&$1DC6
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] CHARS [IF]
-CODE CHARS
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CHAR+ [IF]
-CODE CHAR+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CELLS [IF]
-CODE CELLS
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CELL+ [IF]
-CODE CELL+
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] CHAR [IF]
-: CHAR
- $20 WORD 1+ C@
-;
-[THEN]
-
-[UNDEFINED] [CHAR] [IF]
-: [CHAR]
- CHAR POSTPONE LITERAL
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] +! [IF]
-CODE +!
-ADD @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
-CODE MOVE
-MOV R14,R10
-MOV @R15+,R8
-MOV @R15+,R9
-MOV @R15+,R14
-CMP #0,R10
-0<> IF
- CMP R9,R8
- 0<> IF
- U< IF
- BEGIN
- MOV.B @R9+,0(R8)
- ADD #1,R8
- SUB #1,R10
- 0= UNTIL
- MOV @R13+,R0
- THEN
- ADD R10,R8
- ADD R10,R9
- BEGIN
- SUB #1,R9
- SUB #1,R8
- MOV.B @R9,0(R8)
- SUB #1,R10
- 0= UNTIL
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] FILL [IF]
-CODE FILL
-MOV @R15+,R9
-MOV @R15+,R10
-CMP #0,R9
-0<> IF
- BEGIN
- MOV.B R14,0(R10)
- ADD #1,R10
- SUB #1,R9
- 0= UNTIL
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #$4028,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] HEX [IF]
-CODE HEX
-MOV #$10,&$1DDC
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DECIMAL [IF]
-CODE DECIMAL
-MOV #$0A,&$1DDC
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ( [IF]
-: (
-')' WORD DROP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] .( [IF]
-CODE .(
-MOV #0,&$1DB4
-COLON
-')' WORD
-COUNT TYPE
-$20 $1DB4 !
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] EXECUTE [IF]
-CODE EXECUTE
-PUSH R14
-MOV @R15+,R14
-MOV @R1+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] EVALUATE [IF]
-CODE EVALUATE
-MOV #$1DC0,R9
-MOV @R9+,R12
-MOV @R9+,R11
-MOV @R9+,R10
-PUSHM #4,R13
-LO2HI
-INTERPRET
-HI2LO
-MOV @R1+,&$1DC4
-MOV @R1+,&$1DC2
-MOV @R1+,&$1DC0
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] RECURSE [IF]
-CODE RECURSE
-MOV &$1DC6,R9
-MOV &$1DBA,0(R9)
-ADD #2,&$1DC6
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] SOURCE [IF]
-CODE SOURCE
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1DC0,R14
-MOV &$1DC2,0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DOES> [IF]
-CODE DOES>
-MOV &$1DBA,R10
-MOV #$1285,0(R10)
-MOV R13,2(R10)
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] VARIABLE [IF]
-: VARIABLE
-CREATE
-HI2LO
-MOV #$1287,-4(R10)
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] BASE [IF]
-$1DDC CONSTANT BASE
-[THEN]
-
-[UNDEFINED] >IN [IF]
-$1DC4 CONSTANT >IN
-[THEN]
-
-[UNDEFINED] PAD [IF]
-$1CE4 CONSTANT PAD
-[THEN]
-
-[UNDEFINED] BL [IF]
-$20 CONSTANT BL
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] TO [IF]
-CODE TO
-BIS #$200,R2
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] VALUE [IF]
-: VALUE
-CREATE ,
-DOES>
-HI2LO
-MOV @R1+,R13
-BIT #$200,R2
-0= IF
- MOV @R14,R14
- MOV @R13+,R0
-THEN
-BIC #$200,R2
-MOV @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-RST_HERE
-
-[THEN]
-
-ECHO
-; CORE_ANS.4th for MSP_EXP430FR5994 is loaded
+++ /dev/null
-
-CODE ABORT_DOUBLE
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1812,R14
-BIT #$200,R14
-0<> IF MOV #0,R14 THEN
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-ABORT" build FastForth with DOUBLE_INPUT addon !"
-PWR_STATE
-;
-
-ABORT_DOUBLE
-
-; -----------------------------------------------------
-; DOUBLE.4th for MSP_EXP430FR5994
-; -----------------------------------------------------
-
-[DEFINED] {DOUBLE} [IF] {DOUBLE} [THEN]
-
-MARKER {DOUBLE}
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] @ [IF]
-CODE @
-MOV @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ! [IF]
-CODE !
-MOV @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] < [IF]
-CODE <
- SUB @R15+,R14
- S< ?GOTO FW1
- 0<> IF
-BW1 MOV #-1,R14
- THEN
- MOV @R13+,R0
-ENDCODE
-
-CODE >
- SUB @R15+,R14
- S< ?GOTO BW1
-FW1 AND #0,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] TO [IF]
-CODE TO
-BIS #$200,R2
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DOES> [IF]
-CODE DOES>
-MOV &$1DBA,R10
-MOV #DODOES,0(R10)
-MOV R13,2(R10)
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2@ [IF]
-CODE 2@
-SUB #2,R15
-MOV 2(R14),0(R15)
-MOV @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2! [IF]
-CODE 2!
-MOV @R15+,0(R14)
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DUP [IF]
-CODE 2DUP
-SUB #4,R15
-MOV R14,2(R15)
-MOV 4(R15),0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DROP [IF]
-CODE 2DROP
-ADD #2,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2SWAP [IF]
-CODE 2SWAP
-MOV @R15,R10
-MOV 4(R15),0(R15)
-MOV R10,4(R15)
-MOV R14,R10
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2OVER [IF]
-CODE 2OVER
-SUB #4,R15
-MOV R14,2(R15)
-MOV 8(R15),0(R15)
-MOV 6(R15),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2>R [IF]
-CODE 2>R
-PUSH @R15+
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2R@ [IF]
-CODE 2R@
-SUB #4,R15
-MOV R14,2(R15)
-MOV @R1,R14
-MOV 2(R1),0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2R> [IF]
-CODE 2R>
-SUB #4,R15
-MOV R14,2(R15)
-MOV @R1+,R14
-MOV @R1+,0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] D. [IF]
-CODE D.
-MOV #U.,R10
-ADD #10,R10
-MOV R10,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2ROT [IF]
-CODE 2ROT
-MOV 8(R15),R9
-MOV 6(R15),R8
-MOV 4(R15),8(R15)
-MOV 2(R15),6(R15)
-MOV @R15,4(R15)
-MOV R14,2(R15)
-MOV R9,0(R15)
-MOV R8,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D>S [IF]
-CODE D>S
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D0= [IF]
-CODE D0=
-CMP #0,R14
-MOV #0,R14
-0= IF
- CMP #0,0(R15)
- 0= IF
- MOV #-1,R14
- THEN
-THEN
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D0< [IF]
-CODE D0<
-CMP #0,R14
-MOV #0,R14
-S< IF
- MOV #-1,R14
-THEN
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D= [IF]
-CODE D=
-CMP R14,2(R15)
-MOV #0,R14
-0= IF
- CMP @R15,4(R15)
- 0= IF
- MOV #-1,R14
- THEN
-THEN
-ADD #6,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D< [IF]
-CODE D<
-CMP R14,2(R15)
-MOV #0,R14
-S< IF
- MOV #-1,R14
-THEN
-0= IF
- CMP @R15,4(R15)
- U< IF
- MOV #-1,R14
- THEN
-THEN
-ADD #6,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DU< [IF]
-CODE DU<
-CMP R14,2(R15)
-MOV #0,R14
-U< IF
- MOV #-1,R14
-THEN
-0= IF
- CMP @R15,4(R15)
- U< IF
- MOV #-1,R14
- THEN
-THEN
-ADD #6,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D+ [IF]
-CODE D+
-BW1 ADD @R15+,2(R15)
- ADDC @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] M+ [IF]
-CODE M+
-SUB #2,R15
-CMP #0,R14
-MOV R14,0(R15)
-MOV #-1,R14
-0>= IF
- MOV #0,R14
-THEN
-GOTO BW1
-ENDCODE
-[THEN]
-
-[UNDEFINED] D- [IF]
-CODE D-
-SUB @R15+,2(R15)
-SUBC R14,0(R15)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DNEGATE [IF]
-CODE DNEGATE
-XOR #-1,0(R15)
-XOR #-1,R14
-ADD #1,0(R15)
-ADDC #0,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DABS [IF]
-CODE DABS
-CMP #0,R14
-0>= IF
- MOV @R13+,R0
-THEN
-MOV #DNEGATE,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D2/ [IF]
-CODE D2/
-RRA R14
-RRC 0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D2* [IF]
-CODE D2*
-ADD @R15,0(R15)
-ADDC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DMAX [IF]
-: DMAX
-2OVER 2OVER
-D< IF
- 2>R 2DROP 2R>
-ELSE
- 2DROP
-THEN
-;
-[THEN]
-
-[UNDEFINED] DMIN [IF]
-: DMIN
-2OVER 2OVER
-D< IF
- 2DROP
-ELSE 2>R 2DROP 2R>
-THEN
-;
-
-$1A04 C@ $EF > [IF] ; test for MSP430FR413x devices without hardware_MPY
-
-[UNDEFINED] M*/ [IF]
-CODE M*/
-BIC #$200,R2
-CMP #0,2(R15)
-S< IF
- XOR #-1,4(R15)
- XOR #-1,2(R15)
- ADD #1,4(R15)
- ADDC #0,2(R15)
- BIS #$200,R2
-THEN
-CMP #0,0(R15)
-S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
- XOR #$200,R2
-THEN
- MOV 4(R15),R8
- MOV 2(R15),R11
- MOV @R15+,R12
- MOV #0,R5
- MOV #0,2(R15)
- MOV #0,0(R15)
- MOV #0,R10
- MOV #1,R9
-BEGIN BIT R9,R12
- 0<> IF ADD R8,2(R15)
- ADDC R11,0(R15)
- ADDC R5,R10
- THEN ADD R8,R8
- ADDC R11,R11
- ADDC R5,R5
- ADD R9,R9
-U>= UNTIL
-MOV R14,R11
-MOV @R15,R14
-MOV 2(R15),R12
-MOV #32,R5
-CMP #0,R10
-0= IF
- MOV R14,R10
- CALL #$4078
-ELSE
- CALL #$4080
-THEN
-MOV @R15+,0(R15)
-BIT #$200,R2
-0<> IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
- BIC #$200,R2
- CMP #0,R10
- 0<> IF
- SUB #1,0(R15)
- SUBC #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[ELSE]
-
-[UNDEFINED] M*/ [IF]
-CODE M*/
-MOV 4(R15),&$4D4
-MOV 2(R15),&$4D6
-MOV @R15+,&$4C8
-MOV R14,R11
-MOV R0,R0
-MOV &$4E4,R12
-MOV &$4E6,R14
-MOV &$4E8,R10
-BIC #$200,R2
-CMP #0,R10
-S< IF
- XOR #-1,R12
- XOR #-1,R14
- XOR #-1,R10
- ADD #1,R12
- ADDC #0,R14
- ADDC #0,R10
- BIS #$200,R2
-THEN
-MOV #32,R5
-CMP #0,R10
-0= IF
- MOV R14,R10
- CALL #$4078
-ELSE
- CALL #$4080
-THEN
-MOV @R15+,0(R15)
-BIT #$200,R2
-0<> IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
- BIC #$200,R2
- CMP #0,R10
- 0<> IF
- SUB #1,0(R15)
- SUBC #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[THEN] ; end of software/hardware_MPY
-
-[UNDEFINED] 2VARIABLE [IF]
-: 2VARIABLE
-CREATE
-HI2LO
-ADD #4,&$1DC6
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2CONSTANT [IF]
-: 2CONSTANT
-CREATE
-, ,
-DOES>
-2@
-;
-[THEN]
-
-[UNDEFINED] 2VALUE [IF]
-: 2VALUE
-CREATE , ,
-DOES>
-HI2LO
-MOV @R1+,R13
-BIT #$200,R2
-0= IF
- MOV #2@,R0
-THEN
-BIC #$200,R2
-MOV #2!,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2LITERAL [IF]
-CODE 2LITERAL
-BIS #$200,R2
-MOV #LITERAL,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] D.R [IF]
-: D.R
->R SWAP OVER DABS <# #S ROT SIGN #>
-R> OVER - SPACES TYPE
-;
-[THEN]
-
-RST_HERE
-
-[UNDEFINED] VARIABLE [IF]
-: VARIABLE
-CREATE
-HI2LO
-MOV @R1+,R13
-ADD #2,&$1DC6
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CELLS [IF]
-CODE CELLS
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ALLOT [IF]
-CODE ALLOT
-ADD R14,&$1DC6
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DEPTH [IF]
-CODE DEPTH
-MOV R14,-2(R15)
-MOV #$1C80,R14
-SUB R15,R14
-RRA R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
-CODE 0=
-SUB #1,R14
-SUBC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SOURCE [IF]
-CODE SOURCE
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1DC0,R14
-MOV &$1DC2,0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >IN [IF]
-$1DC4 CONSTANT >IN
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CHAR [IF]
-: CHAR
- $20 WORD 1+ C@
-;
-[THEN]
-
-[UNDEFINED] [CHAR] [IF]
-: [CHAR]
- CHAR POSTPONE LITERAL
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] 2/ [IF]
-CODE 2/
-RRA R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] INVERT [IF]
-CODE INVERT
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] RSHIFT [IF]
-CODE RSHIFT
- MOV @R15+,R10
- AND #$1F,R14
-0<> IF
- BEGIN BIC #1,R2
- RRC R10
- SUB #1,R14
- 0= UNTIL
-THEN MOV R10,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0< [IF]
-CODE 0<
-ADD R14,R14
-SUBC R14,R14
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] S>D [IF]
-: S>D
- DUP 0<
-;
-[THEN]
-
-[UNDEFINED] 1- [IF]
-CODE 1-
-SUB #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] UM/MOD [IF]
-CODE UM/MOD
- PUSH #DROP
- MOV #$4066,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SM/REM [IF]
-CODE SM/REM
-MOV R14,R12
-MOV @R15,R11
-CMP #0,R14
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-CMP #0,0(R15)
-S< IF
- XOR #-1,2(R15)
- XOR #-1,0(R15)
- ADD #1,2(R15)
- ADDC #0,0(R15)
-THEN
-PUSHM #3,R13
-LO2HI
- UM/MOD
-HI2LO
-POPM #3,R13
-CMP #0,R11
-S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
-THEN
-XOR R12,R11
-CMP #0,R11
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] FM/MOD [IF]
-: FM/MOD
-SM/REM
-HI2LO
-CMP #0,0(R15)
-0<> IF
- CMP #1,R14
- S< IF
- ADD R12,0(R15)
- SUB #1,R14
- THEN
-THEN
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] NIP [IF]
-CODE NIP
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] / [IF]
-: /
->R DUP 0< R> FM/MOD NIP
-;
-[THEN]
-
-[UNDEFINED] NEGATE [IF]
-CODE NEGATE
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #$4028,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CHARS [IF]
-CODE CHARS
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
-CODE MOVE
-MOV R14,R10
-MOV @R15+,R8
-MOV @R15+,R9
-MOV @R15+,R14
-CMP #0,R10
-0<> IF
- CMP R9,R8
- 0<> IF
- U< IF
- BEGIN
- MOV.B @R9+,0(R8)
- ADD #1,R8
- SUB #1,R10
- 0= UNTIL
- MOV @R13+,R0
- THEN
- ADD R10,R8
- ADD R10,R9
- BEGIN
- SUB #1,R9
- SUB #1,R8
- MOV.B @R9,0(R8)
- SUB #1,R10
- 0= UNTIL
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DECIMAL [IF]
-CODE DECIMAL
-MOV #$0A,&$1DDC
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] BASE [IF]
-$1DDC CONSTANT BASE
-[THEN]
-
-[UNDEFINED] ( [IF]
-: (
-')' WORD DROP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] .( [IF]
-CODE .(
-MOV #0,&$1DB4
-COLON
-')' WORD
-COUNT TYPE
-$20 $1DB4 !
-; IMMEDIATE
-[THEN]
-
-
-
-
-
-
-
- 0 CONSTANT FALSE
--1 CONSTANT TRUE
-
-VARIABLE VERBOSE
- FALSE VERBOSE !
-
-
-VARIABLE ACTUAL-DEPTH
-CREATE ACTUAL-RESULTS 20 CELLS ALLOT
-
-: T{
- ;
-
-: ->
- DEPTH DUP ACTUAL-DEPTH !
- ?DUP IF
- 0 DO ACTUAL-RESULTS I CELLS + ! LOOP
- THEN ;
-
-: }T
-
- DEPTH ACTUAL-DEPTH @ = IF
- DEPTH ?DUP IF
- 0 DO
- ACTUAL-RESULTS I CELLS + @
- = 0= IF TRUE ABORT" INCORRECT RESULT" THEN
- LOOP
- THEN
- ELSE
- TRUE ABORT" WRONG NUMBER OF RESULTS"
- THEN ;
-
-: TESTING
- SOURCE VERBOSE @
- IF DUP >R TYPE CR R> >IN !
- ELSE >IN ! DROP [CHAR] * EMIT
- THEN ;
-
-ECHO
-
-
-DECIMAL
-
-0 INVERT CONSTANT 1SD
-1SD 1 RSHIFT CONSTANT MAX-INTD
-MAX-INTD INVERT CONSTANT MIN-INTD
-MAX-INTD 2/ CONSTANT HI-INT
-MIN-INTD 2/ CONSTANT LO-INT
-
-
-TESTING interpreter and compiler reading double numbers, with/without prefixes
-
-T{ 1. -> 1 0 }T
-T{ -2. -> -2 -1 }T
-T{ : RDL1 3. ; RDL1 -> 3 0 }T
-T{ : RDL2 -4. ; RDL2 -> -4 -1 }T
-
-VARIABLE OLD-DBASE
-DECIMAL BASE @ OLD-DBASE !
-T{ #12346789. -> 12346789. }T
-T{ #-12346789. -> -12346789. }T
-T{ $12aBcDeF. -> 313249263. }T
-T{ $-12AbCdEf. -> -313249263. }T
-T{ %10010110. -> 150. }T
-T{ %-10010110. -> -150. }T
-T{ BASE @ OLD-DBASE @ = -> TRUE }T
-
-16 OLD-DBASE ! 16 BASE !
-T{ #12346789. -> BC65A5. }T
-T{ #-12346789. -> -BC65A5. }T
-T{ $12aBcDeF. -> 12AbCdeF. }T
-T{ $-12AbCdEf. -> -12ABCDef. }T
-T{ %10010110. -> 96. }T
-T{ %-10010110. -> -96. }T
-T{ BASE @ OLD-DBASE @ = -> TRUE }T
-
-DECIMAL
-T{ : dnmp #8327. $-2cbe. %011010111. ; dnmp -> 8327. -11454. 215. }T
-
-TESTING 2CONSTANT
-
-T{ 1 2 2CONSTANT 2C1 -> }T
-T{ 2C1 -> 1 2 }T
-T{ : CD1 2C1 ; -> }T
-T{ CD1 -> 1 2 }T
-T{ : CD2 2CONSTANT ; -> }T
-T{ -1 -2 CD2 2C2 -> }T
-T{ 2C2 -> -1 -2 }T
-T{ 4 5 2CONSTANT 2C3 IMMEDIATE 2C3 -> 4 5 }T
-T{ : CD6 2C3 2LITERAL ; CD6 -> 4 5 }T
-
-
-1SD MAX-INTD 2CONSTANT MAX-2INT
-0 MIN-INTD 2CONSTANT MIN-2INT
-MAX-2INT 2/ 2CONSTANT HI-2INT
-MIN-2INT 2/ 2CONSTANT LO-2INT
-
-TESTING DNEGATE
-
-T{ 0. DNEGATE -> 0. }T
-T{ 1. DNEGATE -> -1. }T
-T{ -1. DNEGATE -> 1. }T
-T{ MAX-2INT DNEGATE -> MIN-2INT SWAP 1+ SWAP }T
-T{ MIN-2INT SWAP 1+ SWAP DNEGATE -> MAX-2INT }T
-
-TESTING D+ with small integers
-
-T{ 0. 5. D+ -> 5. }T
-T{ -5. 0. D+ -> -5. }T
-T{ 1. 2. D+ -> 3. }T
-T{ 1. -2. D+ -> -1. }T
-T{ -1. 2. D+ -> 1. }T
-T{ -1. -2. D+ -> -3. }T
-T{ -1. 1. D+ -> 0. }T
-
-TESTING D+ with mid range integers
-
-T{ 0 0 0 5 D+ -> 0 5 }T
-T{ -1 5 0 0 D+ -> -1 5 }T
-T{ 0 0 0 -5 D+ -> 0 -5 }T
-T{ 0 -5 -1 0 D+ -> -1 -5 }T
-T{ 0 1 0 2 D+ -> 0 3 }T
-T{ -1 1 0 -2 D+ -> -1 -1 }T
-T{ 0 -1 0 2 D+ -> 0 1 }T
-T{ 0 -1 -1 -2 D+ -> -1 -3 }T
-T{ -1 -1 0 1 D+ -> -1 0 }T
-T{ MIN-INTD 0 2DUP D+ -> 0 1 }T
-T{ MIN-INTD S>D MIN-INTD 0 D+ -> 0 0 }T
-
-TESTING D+ with large double integers
-
-T{ HI-2INT 1. D+ -> 0 HI-INT 1+ }T
-T{ HI-2INT 2DUP D+ -> 1SD 1- MAX-INTD }T
-T{ MAX-2INT MIN-2INT D+ -> -1. }T
-T{ MAX-2INT LO-2INT D+ -> HI-2INT }T
-T{ HI-2INT MIN-2INT D+ 1. D+ -> LO-2INT }T
-T{ LO-2INT 2DUP D+ -> MIN-2INT }T
-
-TESTING D- with small integers
-
-T{ 0. 5. D- -> -5. }T
-T{ 5. 0. D- -> 5. }T
-T{ 0. -5. D- -> 5. }T
-T{ 1. 2. D- -> -1. }T
-T{ 1. -2. D- -> 3. }T
-T{ -1. 2. D- -> -3. }T
-T{ -1. -2. D- -> 1. }T
-T{ -1. -1. D- -> 0. }T
-
-TESTING D- with mid-range integers
-
-T{ 0 0 0 5 D- -> 0 -5 }T
-T{ -1 5 0 0 D- -> -1 5 }T
-T{ 0 0 -1 -5 D- -> 1 4 }T
-T{ 0 -5 0 0 D- -> 0 -5 }T
-T{ -1 1 0 2 D- -> -1 -1 }T
-T{ 0 1 -1 -2 D- -> 1 2 }T
-T{ 0 -1 0 2 D- -> 0 -3 }T
-T{ 0 -1 0 -2 D- -> 0 1 }T
-T{ 0 0 0 1 D- -> 0 -1 }T
-T{ MIN-INTD 0 2DUP D- -> 0. }T
-T{ MIN-INTD S>D MAX-INTD 0 D- -> 1 1SD }T
-
-TESTING D- with large integers
-
-T{ MAX-2INT MAX-2INT D- -> 0. }T
-T{ MIN-2INT MIN-2INT D- -> 0. }T
-T{ MAX-2INT HI-2INT D- -> LO-2INT DNEGATE }T
-T{ HI-2INT LO-2INT D- -> MAX-2INT }T
-T{ LO-2INT HI-2INT D- -> MIN-2INT 1. D+ }T
-T{ MIN-2INT MIN-2INT D- -> 0. }T
-T{ MIN-2INT LO-2INT D- -> LO-2INT }T
-
-TESTING D0< D0=
-
-T{ 0. D0< -> FALSE }T
-T{ 1. D0< -> FALSE }T
-T{ MIN-INTD 0 D0< -> FALSE }T
-T{ 0 MAX-INTD D0< -> FALSE }T
-T{ MAX-2INT D0< -> FALSE }T
-T{ -1. D0< -> TRUE }T
-T{ MIN-2INT D0< -> TRUE }T
-
-T{ 1. D0= -> FALSE }T
-T{ MIN-INTD 0 D0= -> FALSE }T
-T{ MAX-2INT D0= -> FALSE }T
-T{ -1 MAX-INTD D0= -> FALSE }T
-T{ 0. D0= -> TRUE }T
-T{ -1. D0= -> FALSE }T
-T{ 0 MIN-INTD D0= -> FALSE }T
-
-TESTING D2* D2/
-
-T{ 0. D2* -> 0. D2* }T
-T{ MIN-INTD 0 D2* -> 0 1 }T
-T{ HI-2INT D2* -> MAX-2INT 1. D- }T
-T{ LO-2INT D2* -> MIN-2INT }T
-
-T{ 0. D2/ -> 0. }T
-T{ 1. D2/ -> 0. }T
-T{ 0 1 D2/ -> MIN-INTD 0 }T
-T{ MAX-2INT D2/ -> HI-2INT }T
-T{ -1. D2/ -> -1. }T
-T{ MIN-2INT D2/ -> LO-2INT }T
-
-TESTING D< D=
-
-T{ 0. 1. D< -> TRUE }T
-T{ 0. 0. D< -> FALSE }T
-T{ 1. 0. D< -> FALSE }T
-T{ -1. 1. D< -> TRUE }T
-T{ -1. 0. D< -> TRUE }T
-T{ -2. -1. D< -> TRUE }T
-T{ -1. -2. D< -> FALSE }T
-T{ 0 1 1. D< -> FALSE }T
-T{ 1. 0 1 D< -> TRUE }T
-T{ 0 -1 1 -2 D< -> FALSE }T
-T{ 1 -2 0 -1 D< -> TRUE }T
-T{ -1. MAX-2INT D< -> TRUE }T
-T{ MIN-2INT MAX-2INT D< -> TRUE }T
-T{ MAX-2INT -1. D< -> FALSE }T
-T{ MAX-2INT MIN-2INT D< -> FALSE }T
-T{ MAX-2INT 2DUP -1. D+ D< -> FALSE }T
-T{ MIN-2INT 2DUP 1. D+ D< -> TRUE }T
-T{ MAX-INTD S>D 2DUP 1. D+ D< -> TRUE }T
-
-T{ -1. -1. D= -> TRUE }T
-T{ -1. 0. D= -> FALSE }T
-T{ -1. 1. D= -> FALSE }T
-T{ 0. -1. D= -> FALSE }T
-T{ 0. 0. D= -> TRUE }T
-T{ 0. 1. D= -> FALSE }T
-T{ 1. -1. D= -> FALSE }T
-T{ 1. 0. D= -> FALSE }T
-T{ 1. 1. D= -> TRUE }T
-
-T{ 0 -1 0 -1 D= -> TRUE }T
-T{ 0 -1 0 0 D= -> FALSE }T
-T{ 0 -1 0 1 D= -> FALSE }T
-T{ 0 0 0 -1 D= -> FALSE }T
-T{ 0 0 0 0 D= -> TRUE }T
-T{ 0 0 0 1 D= -> FALSE }T
-T{ 0 1 0 -1 D= -> FALSE }T
-T{ 0 1 0 0 D= -> FALSE }T
-T{ 0 1 0 1 D= -> TRUE }T
-
-T{ MAX-2INT MIN-2INT D= -> FALSE }T
-T{ MAX-2INT 0. D= -> FALSE }T
-T{ MAX-2INT MAX-2INT D= -> TRUE }T
-T{ MAX-2INT HI-2INT D= -> FALSE }T
-T{ MAX-2INT MIN-2INT D= -> FALSE }T
-T{ MIN-2INT MIN-2INT D= -> TRUE }T
-T{ MIN-2INT LO-2INT D= -> FALSE }T
-T{ MIN-2INT MAX-2INT D= -> FALSE }T
-
-TESTING 2LITERAL 2VARIABLE
-
-T{ : CD3 [ MAX-2INT ] 2LITERAL ; -> }T
-T{ CD3 -> MAX-2INT }T
-T{ 2VARIABLE 2V1 -> }T
-T{ 0. 2V1 2! -> }T
-T{ 2V1 2@ -> 0. }T
-T{ -1 -2 2V1 2! -> }T
-T{ 2V1 2@ -> -1 -2 }T
-T{ : CD4 2VARIABLE ; -> }T
-T{ CD4 2V2 -> }T
-T{ : CD5 2V2 2! ; -> }T
-T{ -2 -1 CD5 -> }T
-T{ 2V2 2@ -> -2 -1 }T
-T{ 2VARIABLE 2V3 IMMEDIATE 5 6 2V3 2! -> }T
-T{ 2V3 2@ -> 5 6 }T
-T{ : CD7 2V3 [ 2@ ] 2LITERAL ; CD7 -> 5 6 }T
-T{ : CD8 [ 6 7 ] 2V3 [ 2! ] ; 2V3 2@ -> 6 7 }T
-
-TESTING DMAX DMIN
-
-T{ 1. 2. DMAX -> 2. }T
-T{ 1. 0. DMAX -> 1. }T
-T{ 1. -1. DMAX -> 1. }T
-T{ 1. 1. DMAX -> 1. }T
-T{ 0. 1. DMAX -> 1. }T
-T{ 0. -1. DMAX -> 0. }T
-T{ -1. 1. DMAX -> 1. }T
-T{ -1. -2. DMAX -> -1. }T
-
-T{ MAX-2INT HI-2INT DMAX -> MAX-2INT }T
-T{ MAX-2INT MIN-2INT DMAX -> MAX-2INT }T
-T{ MIN-2INT MAX-2INT DMAX -> MAX-2INT }T
-T{ MIN-2INT LO-2INT DMAX -> LO-2INT }T
-
-T{ MAX-2INT 1. DMAX -> MAX-2INT }T
-T{ MAX-2INT -1. DMAX -> MAX-2INT }T
-T{ MIN-2INT 1. DMAX -> 1. }T
-T{ MIN-2INT -1. DMAX -> -1. }T
-
-
-T{ 1. 2. DMIN -> 1. }T
-T{ 1. 0. DMIN -> 0. }T
-T{ 1. -1. DMIN -> -1. }T
-T{ 1. 1. DMIN -> 1. }T
-T{ 0. 1. DMIN -> 0. }T
-T{ 0. -1. DMIN -> -1. }T
-T{ -1. 1. DMIN -> -1. }T
-T{ -1. -2. DMIN -> -2. }T
-
-T{ MAX-2INT HI-2INT DMIN -> HI-2INT }T
-T{ MAX-2INT MIN-2INT DMIN -> MIN-2INT }T
-T{ MIN-2INT MAX-2INT DMIN -> MIN-2INT }T
-T{ MIN-2INT LO-2INT DMIN -> MIN-2INT }T
-
-T{ MAX-2INT 1. DMIN -> 1. }T
-T{ MAX-2INT -1. DMIN -> -1. }T
-T{ MIN-2INT 1. DMIN -> MIN-2INT }T
-T{ MIN-2INT -1. DMIN -> MIN-2INT }T
-
-TESTING D>S DABS
-
-T{ 1234 0 D>S -> 1234 }T
-T{ -1234 -1 D>S -> -1234 }T
-T{ MAX-INTD 0 D>S -> MAX-INTD }T
-T{ MIN-INTD -1 D>S -> MIN-INTD }T
-
-T{ 1. DABS -> 1. }T
-T{ -1. DABS -> 1. }T
-T{ MAX-2INT DABS -> MAX-2INT }T
-T{ MIN-2INT 1. D+ DABS -> MAX-2INT }T
-
-TESTING M+ M*/
-
-T{ HI-2INT 1 M+ -> HI-2INT 1. D+ }T
-T{ MAX-2INT -1 M+ -> MAX-2INT -1. D+ }T
-T{ MIN-2INT 1 M+ -> MIN-2INT 1. D+ }T
-T{ LO-2INT -1 M+ -> LO-2INT -1. D+ }T
-
-
-: ?FLOORED [ -3 2 / -2 = ] LITERAL IF 1. D- THEN ;
-
-T{ 5. 7 11 M*/ -> 3. }T
-T{ 5. -7 11 M*/ -> -3. ?FLOORED }T
-T{ -5. 7 11 M*/ -> -3. ?FLOORED }T
-T{ -5. -7 11 M*/ -> 3. }T
-T{ MAX-2INT 8 16 M*/ -> HI-2INT }T
-T{ MAX-2INT -8 16 M*/ -> HI-2INT DNEGATE ?FLOORED }T
-T{ MIN-2INT 8 16 M*/ -> LO-2INT }T
-T{ MIN-2INT -8 16 M*/ -> LO-2INT DNEGATE }T
-T{ MAX-2INT MAX-INTD MAX-INTD M*/ -> MAX-2INT }T
-T{ MAX-2INT MAX-INTD 2/ MAX-INTD M*/ -> MAX-INTD 1- HI-2INT NIP }T
-T{ MIN-2INT LO-2INT NIP 1+ DUP 1- NEGATE M*/ -> 0 MAX-INTD 1- }T
-T{ MIN-2INT LO-2INT NIP 1- MAX-INTD M*/ -> MIN-INTD 3 + HI-2INT NIP 2 + }T
-T{ MAX-2INT LO-2INT NIP DUP NEGATE M*/ -> MAX-2INT DNEGATE }T
-T{ MIN-2INT MAX-INTD DUP M*/ -> MIN-2INT }T
-
-TESTING D. D.R
-
-MAX-2INT 71 73 M*/ 2CONSTANT DBL1
-MIN-2INT 73 79 M*/ 2CONSTANT DBL2
-
-: D>ASCII ( D -- CADDR U )
- DUP >R <# DABS #S R> SIGN #> ( -- CADDR1 U )
- HERE SWAP 2DUP 2>R CHARS DUP ALLOT MOVE 2R>
-;
-
-DBL1 D>ASCII 2CONSTANT "DBL1"
-DBL2 D>ASCII 2CONSTANT "DBL2"
-
-: DOUBLEOUTPUT
- CR ." You should see lines duplicated:" CR
- 5 SPACES "DBL1" TYPE CR
- 5 SPACES DBL1 D. CR
- 8 SPACES "DBL1" DUP >R TYPE CR
- 5 SPACES DBL1 R> 3 + D.R CR
- 5 SPACES "DBL2" TYPE CR
- 5 SPACES DBL2 D. CR
- 10 SPACES "DBL2" DUP >R TYPE CR
- 5 SPACES DBL2 R> 5 + D.R CR
-;
-
-T{ DOUBLEOUTPUT -> }T
-
-TESTING 2ROT DU< (Double Number extension words)
-
-T{ 1. 2. 3. 2ROT -> 2. 3. 1. }T
-T{ MAX-2INT MIN-2INT 1. 2ROT -> MIN-2INT 1. MAX-2INT }T
-
-T{ 1. 1. DU< -> FALSE }T
-T{ 1. -1. DU< -> TRUE }T
-T{ -1. 1. DU< -> FALSE }T
-T{ -1. -2. DU< -> FALSE }T
-T{ 0 1 1. DU< -> FALSE }T
-T{ 1. 0 1 DU< -> TRUE }T
-T{ 0 -1 1 -2 DU< -> FALSE }T
-T{ 1 -2 0 -1 DU< -> TRUE }T
-
-T{ MAX-2INT HI-2INT DU< -> FALSE }T
-T{ HI-2INT MAX-2INT DU< -> TRUE }T
-T{ MAX-2INT MIN-2INT DU< -> TRUE }T
-T{ MIN-2INT MAX-2INT DU< -> FALSE }T
-T{ MIN-2INT LO-2INT DU< -> TRUE }T
-
-TESTING 2VALUE
-
-T{ 1111 2222 2VALUE 2VAL -> }T
-T{ 2VAL -> 1111 2222 }T
-T{ 3333 4444 TO 2VAL -> }T
-T{ 2VAL -> 3333 4444 }T
-T{ : TO-2VAL TO 2VAL ; 5555 6666 TO-2VAL -> }T
-T{ 2VAL -> 5555 6666 }T
-
-
-CR .( End of Double-Number word tests) CR
+++ /dev/null
-
-; ---------------------------------
-; FF_SPECS.4th for MSP_EXP430FR5994
-; ---------------------------------
-
-CODE ABORT_FF_SPECS
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_FF_SPECS
-
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
-CODE 0=
-SUB #1,R14
-SUBC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0< [IF]
-CODE 0<
-ADD R14,R14
-SUBC R14,R14
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF]
-CODE BEGIN
- MOV #$4028,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] UNTIL [IF]
-CODE UNTIL
- MOV #$4034,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE AGAIN
-MOV #$403A,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] WHILE [IF]
-: WHILE
-POSTPONE IF SWAP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] REPEAT [IF]
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #$4028,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2* [IF]
-CODE 2*
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] UM/MOD [IF]
-CODE UM/MOD
- PUSH #DROP
- MOV #$4066,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
-CODE MOVE
-MOV R14,R10
-MOV @R15+,R8
-MOV @R15+,R9
-MOV @R15+,R14
-CMP #0,R10
-0<> IF
- CMP R9,R8
- 0<> IF
- U< IF
- BEGIN
- MOV.B @R9+,0(R8)
- ADD #1,R8
- SUB #1,R10
- 0= UNTIL
- MOV @R13+,R0
- THEN
- ADD R10,R8
- ADD R10,R9
- BEGIN
- SUB #1,R9
- SUB #1,R8
- MOV.B @R9,0(R8)
- SUB #1,R10
- 0= UNTIL
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] WORDS [IF]
-: WORDS
-CR
-$1DCA @ $1CE4
-$1810 @ 2*
-MOVE
-BEGIN
- 0 DUP
- $1810 @ 2* 0
- DO
- DUP I $1CE4 + @
- U< IF
- DROP DROP
- I DUP $1CE4 + @
- THEN
- 2 +LOOP
- ?DUP
-WHILE
- DUP
- 2 - @
- ROT
- $1CE4 +
- !
- DUP
- COUNT $7F AND
- TYPE
- C@ $0F AND
- $10 SWAP - SPACES
-REPEAT
-DROP
-;
-[THEN]
-
-[UNDEFINED] CASE [IF]
-: CASE 0 ; IMMEDIATE
-
-: OF
-1+
->R
-POSTPONE OVER POSTPONE =
-POSTPONE IF
-POSTPONE DROP
-R>
-; IMMEDIATE
-
-: ENDOF
->R
-POSTPONE ELSE
-R>
-; IMMEDIATE
-
-: ENDCASE
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] S_ [IF]
-CODE S_
-MOV #0,&$1DB4
-COLON
-$4014 ,
-$20 WORD
-HI2LO
-MOV.B @R14,R14
-ADD #1,R14
-BIT #1,R14
-ADDC R14,&$1DC6
-MOV @R15+,R14
-MOV @R1+,R13
-MOV #$20,&$1DB4
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ESC [IF]
-CODE ESC
-CMP #0,&$1DBE
-0= IF MOV @R13+,R0
-THEN
-COLON
-$1B
-POSTPONE LITERAL
-POSTPONE EMIT
-POSTPONE S_
-POSTPONE TYPE
-; IMMEDIATE
-[THEN]
-
-: SPECS
-PWR_STATE
-ECHO
-ESC [8;40;80t
-39 0 DO CR LOOP
-ESC [H
-ESC [7m
-$0D EMIT ." FastForth V"
-$180E @
-0 <# # $08 HOLD # '.' HOLD #S #> TYPE
-." for MSP430FR"
-HERE
-$1A04 @
-CASE
- $8102 OF ." 5738," $C200 ENDOF
- $8103 OF ." 5739," $C200 ENDOF
- $8160 OF ." 5948," $4400 ENDOF
- $8169 OF ." 5969," $4400 ENDOF
- $825D OF ." 5972," $4400 ENDOF
- $81A8 OF ." 6989," $4400 ENDOF
- $810D OF ." 5986," $4400 ENDOF
- $81F0 OF ." 4133," $C400 ENDOF
- $8240 OF ." 2433," $C400 ENDOF
- $82A1 OF ." 5994," $4000 ENDOF
- $82A6 OF ." 5962," $4000 ENDOF
- $830C OF ." 2355," $8000 ENDOF
- $830D OF ." 2353," $C000 ENDOF
- $831E OF ." 2155," $8000 ENDOF
- $831D OF ." 2153," $C000 ENDOF
- $832A OF ." 2476," $8000 ENDOF
- $832B OF ." 2475," $8000 ENDOF
- $833C OF ." 2633," $C400 ENDOF
- $833D OF ." 2533," $C400 ENDOF
- ABORT" xxxx <-- unrecognized device!"
-ENDCASE
-['] ['] DUP @ $1284 =
-IF ." DTC=1," DROP
-ELSE 2 + @ $1284 =
- IF ." DTC=2,"
- ELSE ." DTC=3,"
- THEN
-THEN
-$20 EMIT
-$1810 @ U. $08 EMIT ." -Entry word set, "
-$1800 @ 0 1000 UM/MOD U.
-?DUP IF $08 EMIT ',' EMIT U.
-THEN ." MHz, "
-- U. ." bytes"
-ESC [0m
-CR
-." /COUNTED-STRING = 255" CR
-." /HOLD = 34" CR
-." /PAD = 84" CR
-." ADDRESS-UNIT-BITS = 16" CR
-." FLOORED = true" CR
-." MAX-CHAR = 255" CR
-." MAX-N = 32767" CR
-." MAX-U = 65535" CR
-." MAX-D = 2147483647" CR
-." MAX-UD = 4294967295" CR
-." STACK-CELLS = 48" CR
-." RETURN-STACK-CELLS= 48" CR
-." DeFiNiTiOnS aRe CaSe-InSeNsItIvE" CR
-." Strings are case-sensitive" CR
-CR
-ESC [7m ." KERNEL SPECS" ESC [0m
-CR
-$1812 @
- DUP 0< IF ." 32.768kHz XTAL" CR THEN
-2* DUP 0< IF ." (4/2) UART TERMINAL" CR 2*
- ELSE 2* DUP
- 0< IF ." (RTS) UART TERMINAL" CR
- THEN
- THEN
-2* DUP 0< IF ." (XON/XOFF) UART TERMINAL" CR
- THEN
-2* DUP 0< IF ." Half-Duplex TERMINAL" CR THEN
-2* DUP 0< IF ." I2C_Master TERMINAL" CR THEN
-2* DUP 0< IF ." Q15.16 input" CR THEN
-2* DUP 0< IF ." DOUBLE input" CR THEN
-2* DUP 0< IF ." MSP430_X assembler" CR 2* 2*
- ELSE 2* DUP
- 0< IF ." MSP430 Assembler"
- 2* DUP 0< IF ." with 20bits address"
- THEN CR
- ELSE 2*
- THEN
- THEN
-2*
-2*
-2*
-2*
-2* 0< IF
- [DEFINED] DEFER [IF] ." DEFER word set" CR [THEN]
- [DEFINED] ALSO [IF] ." VOCABULARY word set" CR [THEN]
- [DEFINED] LOAD" [IF] ." SD_CARD Loader" CR [THEN]
- [DEFINED] BOOT [IF] ." bootloader" CR [THEN]
- [DEFINED] READ" [IF] ." SD_CARD Read/Write" CR [THEN]
- CR
- ESC [7m ." OPTIONS" ESC [0m
- CR
- [DEFINED] {CORE_ANS} [IF] ." ANS94 core" CR [THEN]
- [DEFINED] {DOUBLE} [IF] ." DOUBLE word set" CR [THEN]
- [DEFINED] {TOOLS} [IF] ." UTILITY" CR [THEN]
- [DEFINED] {FIXPOINT} [IF] ." Q15.16 ADD SUB MUL DIV" CR [THEN]
- [DEFINED] {CORDIC} [IF] ." CORDIC engine" CR [THEN]
- [DEFINED] {SD_TOOLS} [IF] ." SD_TOOLS" CR [THEN]
- [DEFINED] {RTC} [IF] ." RTC utility" CR [THEN]
- [DEFINED] {UARTI2CS} [IF] ." UART to I2C_FastForth bridge" CR [THEN]
- [DEFINED] ALSO
- [IF]
- CR
- ESC [7m ." ASSEMBLER word set" ESC [0m
- ALSO ASSEMBLER WORDS PREVIOUS
- CR
- [THEN]
-THEN
-CR
-ESC [7m ." FORTH word set" ESC [0m
-WORDS
-CR
-HI2LO
-MOV #WARM+4,R0
-ENDCODE
-
-SPECS
+++ /dev/null
-
-CODE ABORT_FIXPOINT
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1812,R14
-BIT #$400,R14
-0<> IF MOV #0,R14 THEN
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-ABORT" buil FastForth with FIXPOINT_INPUT addon !"
-PWR_STATE
-$1B EMIT $63 EMIT
-;
-
-ABORT_FIXPOINT
-
-; -----------------------------------------------------
-; FIXPOINT.4th for MSP_EXP430FR5994
-; -----------------------------------------------------
-
-[DEFINED] {FIXPOINT} [IF] {FIXPOINT} [THEN]
-
-MARKER {FIXPOINT}
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DABS [IF]
-CODE DABS
-AND #-1,R14
-S< IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HOLDS [IF]
-CODE HOLDS
- MOV @R15+,R9
-BW3 ADD R14,R9
- MOV &$1DB2,R8
-BEGIN SUB #1,R9
- SUB #1,R14
-U>= WHILE SUB #1,R8
- MOV.B @R9,0(R8)
-REPEAT MOV R8,&$1DB2
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-CODE F+
- ADD @R15+,2(R15)
- ADDC @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE F-
- SUB @R15+,2(R15)
- SUBC R14,0(R15)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-$1A00 4 + @ $81F3 U<
-$81EF $1A00 4 + @ U<
-= [IF] ; MSP430FR413x subfamily without hardware_MPY
-
-CODE UDM*
- PUSH R13
- PUSHM #4,R7
- MOV 4(R15),R13
- MOV 2(R15),R11
- MOV @R15,R10
- MOV #0,R7
- MOV #0,R6
- MOV #0,4(R15)
- MOV #0,2(R15)
- MOV #0,R5
- MOV #0,R4
- MOV #1,R9
- MOV #0,R8
-BEGIN CMP #0,R9
- 0<> IF BIT R9,R10
- ELSE BIT R8,R14
- THEN
- 0<> IF ADD R13,4(R15)
- ADDC R11,2(R15)
- ADDC R7,R5
- ADDC R6,R4
- THEN ADD R13,R13
- ADDC R11,R11
- ADDC R7,R7
- ADDC R6,R6
- ADD R9,R9
- ADDC R8,R8
-U>= UNTIL MOV R5,0(R15)
- MOV R4,R14
- POPM #4,R7
- MOV @R1+,R13
- MOV @R13+,R0
-ENDCODE
-
-CODE F*
- MOV 2(R15),R12
- XOR R14,R12
- BIT #$8000,2(R15)
-0<> IF XOR #-1,2(R15)
- XOR #-1,4(R15)
- ADD #1,4(R15)
- ADDC #0,2(R15)
-THEN COLON
- DABS UDM*
- HI2LO
- MOV @R1+,R13
- MOV @R15+,R14
- MOV @R15+,0(R15)
- AND #-1,R12
-S< IF XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
-THEN MOV @R13+,R0
-ENDCODE
-
-[UNDEFINED] F#S [IF]
-CODE F#S
- MOV @R15,R12
- MOV #0,R11
- PUSHM #3,R13
- MOV 2(R15),0(R15)
- MOV R14,2(R15)
-BEGIN MOV &$1DDC,R14
- LO2HI
- UM*
- HI2LO
- CMP #10,R14
- U>= IF ADD #7,R14
- THEN ADD #$30,R14
- MOV @R1,R11
- MOV.B R14,$1D90(R11)
- ADD #1,R11
- MOV R11,0(R1)
- CMP 2(R15),R11
-U>= UNTIL POPM #3,R13
- MOV R11,R14
- MOV R12,2(R15)
- MOV #0,0(R15)
- MOV #$1D90,R9
- GOTO BW3
-ENDCODE
-[THEN]
-
-[ELSE] ; hardware multiplier
-
-CODE F*
- MOV 4(R15),&$4D4
- MOV 2(R15),&$4D6
- MOV @R15,&$4E0
- MOV R14,&$4E2
- ADD #4,R15
- MOV &$4E6,0(R15)
- MOV &$4E8,R14
- MOV @R13+,R0
-ENDCODE
-
-[UNDEFINED] F#S [IF]
-CODE F#S
- MOV 2(R15),R9
- MOV @R15,2(R15)
- MOV R9,0(R15)
- MOV R14,R11
- MOV #0,R12
-BEGIN MOV @R15,&$4C0
- MOV &$1DDC,&$4C8
- MOV &$4E4,0(R15)
- MOV &$4E6,R14
- CMP #10,R14
- U>= IF ADD #7,R14
- THEN ADD #$30,R14
- MOV.B R14,$1D90(R12)
- ADD #1,R12
- CMP R11,R12
-0= UNTIL MOV R11,R14
- MOV #0,0(R15)
- MOV #$1D90,R9
- GOTO BW3
-ENDCODE
-[THEN]
-
-[THEN]
-
-CODE F/
- MOV R14,R8
- MOV @R15+,R10
- MOV @R15+,R9
- MOV @R15,R11
- PUSHM #5,R9
- AND #-1,R8
-S< IF XOR #-1,R10
- XOR #-1,R8
- ADD #1,R10
- ADDC #0,R8
-THEN
- AND #-1,R9
-S< IF XOR #-1,R11
- XOR #-1,R9
- ADD #1,R11
- ADDC #0,R9
-THEN
- MOV R9,R7
- MOV R11,R9
- MOV #0,R11
- MOV #0,R6
- MOV #32,R5
-BW1 CMP R8,R6
- 0= IF CMP R10,R7
- THEN
- U>= IF SUB R10,R7
- SUBC R8,R6
- THEN
- BEGIN ADDC R12,R12
- ADDC R14,R14
- SUB #1,R5
- U>= WHILE
- ADD R11,R11
- ADDC R9,R9
- ADDC R7,R7
- ADDC R6,R6
- U< ?GOTO BW1
- SUB R10,R7
- SUBC R8,R6
- BIS #1,R2
- REPEAT
- POPM #5,R9
- XOR R9,R8
- CMP #0,R8
-S< IF XOR #-1,R12
- XOR #-1,R14
- ADD #1,R12
- ADDC #0,R14
-THEN
- MOV R12,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-[UNDEFINED] F. [IF]
-CODE F.
-MOV R14,R12
-MOV #4,R11
-MOV &$1DDC,R10
-CMP #$0A,R10
-0= IF
- ADD #1,R11
-ELSE
- CMP #2,R10
- 0= IF
- MOV #$10,R11
- THEN
-THEN
-PUSHM #3,R13
-LO2HI
- <# DABS
- R> F#S
- $2C HOLD
- #S
- R> SIGN #>
- TYPE $20 EMIT
-;
-
-CODE S>F
- SUB #2,R15
- MOV #0,0(R15)
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-RST_HERE
-
-; -----------------------
-; complement (volatile) for tests below
-; -----------------------
-
-[UNDEFINED] ! [IF]
-CODE !
-MOV @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DOES> [IF]
-CODE DOES>
-MOV &$1DBA,R10
-MOV #DODOES,0(R10)
-MOV R13,2(R10)
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2CONSTANT [IF]
-: 2CONSTANT
-CREATE , ,
-DOES>
-HI2LO
-SUB #2,R15
-MOV 2(R14),0(R15)
-MOV @R14,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D. [IF]
-CODE D.
-MOV #U.,R10
-ADD #10,R10
-MOV R10,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] BASE [IF]
-$1DDC CONSTANT BASE
-[THEN]
-
-ECHO
-
-; -----------------------
-; (volatile) tests for FIXPOINT.asm|FIXPOINT.4th for MSP_EXP430FR5994
-; -----------------------
-
-3,14159 2CONSTANT PI
-PI -1,0 F* 2CONSTANT -PI
-
-PI D. ; D. is not appropriate -->
--PI D. ; D. is not appropriate -->
-
-PI F. ; F. is a good choice! --->
--PI F. ; F. is a good choice! --->
-
-$10 BASE ! PI F.
- -PI F.
-%10 BASE ! PI F.
- -PI F.
-#10 BASE ! PI F.
- -PI F.
-
- PI 2,0 F* F.
- PI -2,0 F* F.
--PI 2,0 F* F.
--PI -2,0 F* F.
-
- PI 2,0 F/ F.
- PI -2,0 F/ F.
--PI 2,0 F/ F.
--PI -2,0 F/ F.
-
- 32768,0 1,0 F* F. ; overflow! -->
- 32768,0 1,0 F/ F. ; overflow! -->
--32768,0 -1,0 F* F. ; overflow! -->
--32768,0 -1,0 F/ F. ; overflow! -->
-
-32767,99999 1,0 F* F.
-32767,99999 1,0 F/ F.
-32767,99999 2,0 F/ F.
-32767,99999 4,0 F/ F.
-32767,99999 8,0 F/ F.
-32767,99999 16,0 F/ F.
-
--32768,0 -2,0 F/ F.
--32768,0 -4,0 F/ F.
--32768,0 -8,0 F/ F.
--32768,0 -16,0 F/ F.
--32768,0 -32,0 F/ F.
--32768,0 -64,0 F/ F.
-
--3276,80 -1,0 F/ F.
--327,680 -1,0 F/ F.
--32,7680 -1,0 F/ F.
--3,27680 -1,0 F/ F.
--0,32768 -1,0 F/ F.
-
-; SQRT(32768)^2 = 32768
- 181,01933598375 181,01933598375 F* F.
- 181,01933598375 -181,01933598375 F* F.
--181,01933598375 181,01933598375 F* F.
--181,01933598375 -181,01933598375 F* F.
-
-RST_STATE
+++ /dev/null
-
-CODE ABORT_DOUBLE
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1812,R14
-BIT #$200,R14
-0<> IF MOV #0,R14 THEN
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-ABORT" build FastForth with DOUBLE_INPUT addon !"
-PWR_STATE
-;
-
-ABORT_DOUBLE
-
-; -----------------------------------------------------
-; DOUBLE.4th for MSP_EXP430FR5994
-; -----------------------------------------------------
-
-[DEFINED] {DOUBLE} [IF] {DOUBLE} [THEN]
-
-MARKER {DOUBLE}
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] @ [IF]
-CODE @
-MOV @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ! [IF]
-CODE !
-MOV @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] < [IF]
-CODE <
- SUB @R15+,R14
- S< ?GOTO FW1
- 0<> IF
-BW1 MOV #-1,R14
- THEN
- MOV @R13+,R0
-ENDCODE
-
-CODE >
- SUB @R15+,R14
- S< ?GOTO BW1
-FW1 AND #0,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] TO [IF]
-CODE TO
-BIS #$200,R2
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DOES> [IF]
-CODE DOES>
-MOV &$1DBA,R10
-MOV #DODOES,0(R10)
-MOV R13,2(R10)
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2@ [IF]
-CODE 2@
-SUB #2,R15
-MOV 2(R14),0(R15)
-MOV @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2! [IF]
-CODE 2!
-MOV @R15+,0(R14)
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DUP [IF]
-CODE 2DUP
-SUB #4,R15
-MOV R14,2(R15)
-MOV 4(R15),0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DROP [IF]
-CODE 2DROP
-ADD #2,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2SWAP [IF]
-CODE 2SWAP
-MOV @R15,R10
-MOV 4(R15),0(R15)
-MOV R10,4(R15)
-MOV R14,R10
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2OVER [IF]
-CODE 2OVER
-SUB #4,R15
-MOV R14,2(R15)
-MOV 8(R15),0(R15)
-MOV 6(R15),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2>R [IF]
-CODE 2>R
-PUSH @R15+
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2R@ [IF]
-CODE 2R@
-SUB #4,R15
-MOV R14,2(R15)
-MOV @R1,R14
-MOV 2(R1),0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2R> [IF]
-CODE 2R>
-SUB #4,R15
-MOV R14,2(R15)
-MOV @R1+,R14
-MOV @R1+,0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] D. [IF]
-CODE D.
-MOV #U.,R10
-ADD #10,R10
-MOV R10,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2ROT [IF]
-CODE 2ROT
-MOV 8(R15),R9
-MOV 6(R15),R8
-MOV 4(R15),8(R15)
-MOV 2(R15),6(R15)
-MOV @R15,4(R15)
-MOV R14,2(R15)
-MOV R9,0(R15)
-MOV R8,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D>S [IF]
-CODE D>S
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D0= [IF]
-CODE D0=
-CMP #0,R14
-MOV #0,R14
-0= IF
- CMP #0,0(R15)
- 0= IF
- MOV #-1,R14
- THEN
-THEN
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D0< [IF]
-CODE D0<
-CMP #0,R14
-MOV #0,R14
-S< IF
- MOV #-1,R14
-THEN
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D= [IF]
-CODE D=
-CMP R14,2(R15)
-MOV #0,R14
-0= IF
- CMP @R15,4(R15)
- 0= IF
- MOV #-1,R14
- THEN
-THEN
-ADD #6,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D< [IF]
-CODE D<
-CMP R14,2(R15)
-MOV #0,R14
-S< IF
- MOV #-1,R14
-THEN
-0= IF
- CMP @R15,4(R15)
- U< IF
- MOV #-1,R14
- THEN
-THEN
-ADD #6,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DU< [IF]
-CODE DU<
-CMP R14,2(R15)
-MOV #0,R14
-U< IF
- MOV #-1,R14
-THEN
-0= IF
- CMP @R15,4(R15)
- U< IF
- MOV #-1,R14
- THEN
-THEN
-ADD #6,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D+ [IF]
-CODE D+
-BW1 ADD @R15+,2(R15)
- ADDC @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] M+ [IF]
-CODE M+
-SUB #2,R15
-CMP #0,R14
-MOV R14,0(R15)
-MOV #-1,R14
-0>= IF
- MOV #0,R14
-THEN
-GOTO BW1
-ENDCODE
-[THEN]
-
-[UNDEFINED] D- [IF]
-CODE D-
-SUB @R15+,2(R15)
-SUBC R14,0(R15)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DNEGATE [IF]
-CODE DNEGATE
-XOR #-1,0(R15)
-XOR #-1,R14
-ADD #1,0(R15)
-ADDC #0,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DABS [IF]
-CODE DABS
-CMP #0,R14
-0>= IF
- MOV @R13+,R0
-THEN
-MOV #DNEGATE,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D2/ [IF]
-CODE D2/
-RRA R14
-RRC 0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] D2* [IF]
-CODE D2*
-ADD @R15,0(R15)
-ADDC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DMAX [IF]
-: DMAX
-2OVER 2OVER
-D< IF
- 2>R 2DROP 2R>
-ELSE
- 2DROP
-THEN
-;
-[THEN]
-
-[UNDEFINED] DMIN [IF]
-: DMIN
-2OVER 2OVER
-D< IF
- 2DROP
-ELSE 2>R 2DROP 2R>
-THEN
-;
-
-$1A04 C@ $EF > [IF] ; test for MSP430FR413x devices without hardware_MPY
-
-[UNDEFINED] M*/ [IF]
-CODE M*/
-BIC #$200,R2
-CMP #0,2(R15)
-S< IF
- XOR #-1,4(R15)
- XOR #-1,2(R15)
- ADD #1,4(R15)
- ADDC #0,2(R15)
- BIS #$200,R2
-THEN
-CMP #0,0(R15)
-S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
- XOR #$200,R2
-THEN
- MOV 4(R15),R8
- MOV 2(R15),R11
- MOV @R15+,R12
- MOV #0,R5
- MOV #0,2(R15)
- MOV #0,0(R15)
- MOV #0,R10
- MOV #1,R9
-BEGIN BIT R9,R12
- 0<> IF ADD R8,2(R15)
- ADDC R11,0(R15)
- ADDC R5,R10
- THEN ADD R8,R8
- ADDC R11,R11
- ADDC R5,R5
- ADD R9,R9
-U>= UNTIL
-MOV R14,R11
-MOV @R15,R14
-MOV 2(R15),R12
-MOV #32,R5
-CMP #0,R10
-0= IF
- MOV R14,R10
- CALL #$4078
-ELSE
- CALL #$4080
-THEN
-MOV @R15+,0(R15)
-BIT #$200,R2
-0<> IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
- BIC #$200,R2
- CMP #0,R10
- 0<> IF
- SUB #1,0(R15)
- SUBC #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[ELSE]
-
-[UNDEFINED] M*/ [IF]
-CODE M*/
-MOV 4(R15),&$4D4
-MOV 2(R15),&$4D6
-MOV @R15+,&$4C8
-MOV R14,R11
-MOV R0,R0
-MOV &$4E4,R12
-MOV &$4E6,R14
-MOV &$4E8,R10
-BIC #$200,R2
-CMP #0,R10
-S< IF
- XOR #-1,R12
- XOR #-1,R14
- XOR #-1,R10
- ADD #1,R12
- ADDC #0,R14
- ADDC #0,R10
- BIS #$200,R2
-THEN
-MOV #32,R5
-CMP #0,R10
-0= IF
- MOV R14,R10
- CALL #$4078
-ELSE
- CALL #$4080
-THEN
-MOV @R15+,0(R15)
-BIT #$200,R2
-0<> IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
- BIC #$200,R2
- CMP #0,R10
- 0<> IF
- SUB #1,0(R15)
- SUBC #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[THEN] ; end of software/hardware_MPY
-
-[UNDEFINED] 2VARIABLE [IF]
-: 2VARIABLE
-CREATE
-HI2LO
-ADD #4,&$1DC6
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2CONSTANT [IF]
-: 2CONSTANT
-CREATE
-, ,
-DOES>
-2@
-;
-[THEN]
-
-[UNDEFINED] 2VALUE [IF]
-: 2VALUE
-CREATE , ,
-DOES>
-HI2LO
-MOV @R1+,R13
-BIT #$200,R2
-0= IF
- MOV #2@,R0
-THEN
-BIC #$200,R2
-MOV #2!,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2LITERAL [IF]
-CODE 2LITERAL
-BIS #$200,R2
-MOV #LITERAL,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] D.R [IF]
-: D.R
->R SWAP OVER DABS <# #S ROT SIGN #>
-R> OVER - SPACES TYPE
-;
-[THEN]
-
-RST_HERE
-
-[UNDEFINED] VARIABLE [IF]
-: VARIABLE
-CREATE
-HI2LO
-MOV @R1+,R13
-ADD #2,&$1DC6
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CELLS [IF]
-CODE CELLS
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ALLOT [IF]
-CODE ALLOT
-ADD R14,&$1DC6
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DEPTH [IF]
-CODE DEPTH
-MOV R14,-2(R15)
-MOV #$1C80,R14
-SUB R15,R14
-RRA R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
-CODE 0=
-SUB #1,R14
-SUBC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SOURCE [IF]
-CODE SOURCE
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1DC0,R14
-MOV &$1DC2,0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >IN [IF]
-$1DC4 CONSTANT >IN
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CHAR [IF]
-: CHAR
- $20 WORD 1+ C@
-;
-[THEN]
-
-[UNDEFINED] [CHAR] [IF]
-: [CHAR]
- CHAR POSTPONE LITERAL
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] 2/ [IF]
-CODE 2/
-RRA R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] INVERT [IF]
-CODE INVERT
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] RSHIFT [IF]
-CODE RSHIFT
- MOV @R15+,R10
- AND #$1F,R14
-0<> IF
- BEGIN BIC #1,R2
- RRC R10
- SUB #1,R14
- 0= UNTIL
-THEN MOV R10,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0< [IF]
-CODE 0<
-ADD R14,R14
-SUBC R14,R14
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] S>D [IF]
-: S>D
- DUP 0<
-;
-[THEN]
-
-[UNDEFINED] 1- [IF]
-CODE 1-
-SUB #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] UM/MOD [IF]
-CODE UM/MOD
- PUSH #DROP
- MOV #$4066,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SM/REM [IF]
-CODE SM/REM
-MOV R14,R12
-MOV @R15,R11
-CMP #0,R14
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-CMP #0,0(R15)
-S< IF
- XOR #-1,2(R15)
- XOR #-1,0(R15)
- ADD #1,2(R15)
- ADDC #0,0(R15)
-THEN
-PUSHM #3,R13
-LO2HI
- UM/MOD
-HI2LO
-POPM #3,R13
-CMP #0,R11
-S< IF
- XOR #-1,0(R15)
- ADD #1,0(R15)
-THEN
-XOR R12,R11
-CMP #0,R11
-S< IF
- XOR #-1,R14
- ADD #1,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] FM/MOD [IF]
-: FM/MOD
-SM/REM
-HI2LO
-CMP #0,0(R15)
-0<> IF
- CMP #1,R14
- S< IF
- ADD R12,0(R15)
- SUB #1,R14
- THEN
-THEN
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] NIP [IF]
-CODE NIP
-ADD #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] / [IF]
-: /
->R DUP 0< R> FM/MOD NIP
-;
-[THEN]
-
-[UNDEFINED] NEGATE [IF]
-CODE NEGATE
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #$4028,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CHARS [IF]
-CODE CHARS
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
-CODE MOVE
-MOV R14,R10
-MOV @R15+,R8
-MOV @R15+,R9
-MOV @R15+,R14
-CMP #0,R10
-0<> IF
- CMP R9,R8
- 0<> IF
- U< IF
- BEGIN
- MOV.B @R9+,0(R8)
- ADD #1,R8
- SUB #1,R10
- 0= UNTIL
- MOV @R13+,R0
- THEN
- ADD R10,R8
- ADD R10,R9
- BEGIN
- SUB #1,R9
- SUB #1,R8
- MOV.B @R9,0(R8)
- SUB #1,R10
- 0= UNTIL
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DECIMAL [IF]
-CODE DECIMAL
-MOV #$0A,&$1DDC
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] BASE [IF]
-$1DDC CONSTANT BASE
-[THEN]
-
-[UNDEFINED] ( [IF]
-: (
-')' WORD DROP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] .( [IF]
-CODE .(
-MOV #0,&$1DB4
-COLON
-')' WORD
-COUNT TYPE
-$20 $1DB4 !
-; IMMEDIATE
-[THEN]
-
-
-
-
-
-
-
- 0 CONSTANT FALSE
--1 CONSTANT TRUE
-
-VARIABLE VERBOSE
- FALSE VERBOSE !
-
-
-VARIABLE ACTUAL-DEPTH
-CREATE ACTUAL-RESULTS 20 CELLS ALLOT
-
-: T{
- ;
-
-: ->
- DEPTH DUP ACTUAL-DEPTH !
- ?DUP IF
- 0 DO ACTUAL-RESULTS I CELLS + ! LOOP
- THEN ;
-
-: }T
-
- DEPTH ACTUAL-DEPTH @ = IF
- DEPTH ?DUP IF
- 0 DO
- ACTUAL-RESULTS I CELLS + @
- = 0= IF TRUE ABORT" INCORRECT RESULT" THEN
- LOOP
- THEN
- ELSE
- TRUE ABORT" WRONG NUMBER OF RESULTS"
- THEN ;
-
-: TESTING
- SOURCE VERBOSE @
- IF DUP >R TYPE CR R> >IN !
- ELSE >IN ! DROP [CHAR] * EMIT
- THEN ;
-
-ECHO
-
-
-DECIMAL
-
-0 INVERT CONSTANT 1SD
-1SD 1 RSHIFT CONSTANT MAX-INTD
-MAX-INTD INVERT CONSTANT MIN-INTD
-MAX-INTD 2/ CONSTANT HI-INT
-MIN-INTD 2/ CONSTANT LO-INT
-
-
-TESTING interpreter and compiler reading double numbers, with/without prefixes
-
-T{ 1. -> 1 0 }T
-T{ -2. -> -2 -1 }T
-T{ : RDL1 3. ; RDL1 -> 3 0 }T
-T{ : RDL2 -4. ; RDL2 -> -4 -1 }T
-
-VARIABLE OLD-DBASE
-DECIMAL BASE @ OLD-DBASE !
-T{ #12346789. -> 12346789. }T
-T{ #-12346789. -> -12346789. }T
-T{ $12aBcDeF. -> 313249263. }T
-T{ $-12AbCdEf. -> -313249263. }T
-T{ %10010110. -> 150. }T
-T{ %-10010110. -> -150. }T
-T{ BASE @ OLD-DBASE @ = -> TRUE }T
-
-16 OLD-DBASE ! 16 BASE !
-T{ #12346789. -> BC65A5. }T
-T{ #-12346789. -> -BC65A5. }T
-T{ $12aBcDeF. -> 12AbCdeF. }T
-T{ $-12AbCdEf. -> -12ABCDef. }T
-T{ %10010110. -> 96. }T
-T{ %-10010110. -> -96. }T
-T{ BASE @ OLD-DBASE @ = -> TRUE }T
-
-DECIMAL
-T{ : dnmp #8327. $-2cbe. %011010111. ; dnmp -> 8327. -11454. 215. }T
-
-TESTING 2CONSTANT
-
-T{ 1 2 2CONSTANT 2C1 -> }T
-T{ 2C1 -> 1 2 }T
-T{ : CD1 2C1 ; -> }T
-T{ CD1 -> 1 2 }T
-T{ : CD2 2CONSTANT ; -> }T
-T{ -1 -2 CD2 2C2 -> }T
-T{ 2C2 -> -1 -2 }T
-T{ 4 5 2CONSTANT 2C3 IMMEDIATE 2C3 -> 4 5 }T
-T{ : CD6 2C3 2LITERAL ; CD6 -> 4 5 }T
-
-
-1SD MAX-INTD 2CONSTANT MAX-2INT
-0 MIN-INTD 2CONSTANT MIN-2INT
-MAX-2INT 2/ 2CONSTANT HI-2INT
-MIN-2INT 2/ 2CONSTANT LO-2INT
-
-TESTING DNEGATE
-
-T{ 0. DNEGATE -> 0. }T
-T{ 1. DNEGATE -> -1. }T
-T{ -1. DNEGATE -> 1. }T
-T{ MAX-2INT DNEGATE -> MIN-2INT SWAP 1+ SWAP }T
-T{ MIN-2INT SWAP 1+ SWAP DNEGATE -> MAX-2INT }T
-
-TESTING D+ with small integers
-
-T{ 0. 5. D+ -> 5. }T
-T{ -5. 0. D+ -> -5. }T
-T{ 1. 2. D+ -> 3. }T
-T{ 1. -2. D+ -> -1. }T
-T{ -1. 2. D+ -> 1. }T
-T{ -1. -2. D+ -> -3. }T
-T{ -1. 1. D+ -> 0. }T
-
-TESTING D+ with mid range integers
-
-T{ 0 0 0 5 D+ -> 0 5 }T
-T{ -1 5 0 0 D+ -> -1 5 }T
-T{ 0 0 0 -5 D+ -> 0 -5 }T
-T{ 0 -5 -1 0 D+ -> -1 -5 }T
-T{ 0 1 0 2 D+ -> 0 3 }T
-T{ -1 1 0 -2 D+ -> -1 -1 }T
-T{ 0 -1 0 2 D+ -> 0 1 }T
-T{ 0 -1 -1 -2 D+ -> -1 -3 }T
-T{ -1 -1 0 1 D+ -> -1 0 }T
-T{ MIN-INTD 0 2DUP D+ -> 0 1 }T
-T{ MIN-INTD S>D MIN-INTD 0 D+ -> 0 0 }T
-
-TESTING D+ with large double integers
-
-T{ HI-2INT 1. D+ -> 0 HI-INT 1+ }T
-T{ HI-2INT 2DUP D+ -> 1SD 1- MAX-INTD }T
-T{ MAX-2INT MIN-2INT D+ -> -1. }T
-T{ MAX-2INT LO-2INT D+ -> HI-2INT }T
-T{ HI-2INT MIN-2INT D+ 1. D+ -> LO-2INT }T
-T{ LO-2INT 2DUP D+ -> MIN-2INT }T
-
-TESTING D- with small integers
-
-T{ 0. 5. D- -> -5. }T
-T{ 5. 0. D- -> 5. }T
-T{ 0. -5. D- -> 5. }T
-T{ 1. 2. D- -> -1. }T
-T{ 1. -2. D- -> 3. }T
-T{ -1. 2. D- -> -3. }T
-T{ -1. -2. D- -> 1. }T
-T{ -1. -1. D- -> 0. }T
-
-TESTING D- with mid-range integers
-
-T{ 0 0 0 5 D- -> 0 -5 }T
-T{ -1 5 0 0 D- -> -1 5 }T
-T{ 0 0 -1 -5 D- -> 1 4 }T
-T{ 0 -5 0 0 D- -> 0 -5 }T
-T{ -1 1 0 2 D- -> -1 -1 }T
-T{ 0 1 -1 -2 D- -> 1 2 }T
-T{ 0 -1 0 2 D- -> 0 -3 }T
-T{ 0 -1 0 -2 D- -> 0 1 }T
-T{ 0 0 0 1 D- -> 0 -1 }T
-T{ MIN-INTD 0 2DUP D- -> 0. }T
-T{ MIN-INTD S>D MAX-INTD 0 D- -> 1 1SD }T
-
-TESTING D- with large integers
-
-T{ MAX-2INT MAX-2INT D- -> 0. }T
-T{ MIN-2INT MIN-2INT D- -> 0. }T
-T{ MAX-2INT HI-2INT D- -> LO-2INT DNEGATE }T
-T{ HI-2INT LO-2INT D- -> MAX-2INT }T
-T{ LO-2INT HI-2INT D- -> MIN-2INT 1. D+ }T
-T{ MIN-2INT MIN-2INT D- -> 0. }T
-T{ MIN-2INT LO-2INT D- -> LO-2INT }T
-
-TESTING D0< D0=
-
-T{ 0. D0< -> FALSE }T
-T{ 1. D0< -> FALSE }T
-T{ MIN-INTD 0 D0< -> FALSE }T
-T{ 0 MAX-INTD D0< -> FALSE }T
-T{ MAX-2INT D0< -> FALSE }T
-T{ -1. D0< -> TRUE }T
-T{ MIN-2INT D0< -> TRUE }T
-
-T{ 1. D0= -> FALSE }T
-T{ MIN-INTD 0 D0= -> FALSE }T
-T{ MAX-2INT D0= -> FALSE }T
-T{ -1 MAX-INTD D0= -> FALSE }T
-T{ 0. D0= -> TRUE }T
-T{ -1. D0= -> FALSE }T
-T{ 0 MIN-INTD D0= -> FALSE }T
-
-TESTING D2* D2/
-
-T{ 0. D2* -> 0. D2* }T
-T{ MIN-INTD 0 D2* -> 0 1 }T
-T{ HI-2INT D2* -> MAX-2INT 1. D- }T
-T{ LO-2INT D2* -> MIN-2INT }T
-
-T{ 0. D2/ -> 0. }T
-T{ 1. D2/ -> 0. }T
-T{ 0 1 D2/ -> MIN-INTD 0 }T
-T{ MAX-2INT D2/ -> HI-2INT }T
-T{ -1. D2/ -> -1. }T
-T{ MIN-2INT D2/ -> LO-2INT }T
-
-TESTING D< D=
-
-T{ 0. 1. D< -> TRUE }T
-T{ 0. 0. D< -> FALSE }T
-T{ 1. 0. D< -> FALSE }T
-T{ -1. 1. D< -> TRUE }T
-T{ -1. 0. D< -> TRUE }T
-T{ -2. -1. D< -> TRUE }T
-T{ -1. -2. D< -> FALSE }T
-T{ 0 1 1. D< -> FALSE }T
-T{ 1. 0 1 D< -> TRUE }T
-T{ 0 -1 1 -2 D< -> FALSE }T
-T{ 1 -2 0 -1 D< -> TRUE }T
-T{ -1. MAX-2INT D< -> TRUE }T
-T{ MIN-2INT MAX-2INT D< -> TRUE }T
-T{ MAX-2INT -1. D< -> FALSE }T
-T{ MAX-2INT MIN-2INT D< -> FALSE }T
-T{ MAX-2INT 2DUP -1. D+ D< -> FALSE }T
-T{ MIN-2INT 2DUP 1. D+ D< -> TRUE }T
-T{ MAX-INTD S>D 2DUP 1. D+ D< -> TRUE }T
-
-T{ -1. -1. D= -> TRUE }T
-T{ -1. 0. D= -> FALSE }T
-T{ -1. 1. D= -> FALSE }T
-T{ 0. -1. D= -> FALSE }T
-T{ 0. 0. D= -> TRUE }T
-T{ 0. 1. D= -> FALSE }T
-T{ 1. -1. D= -> FALSE }T
-T{ 1. 0. D= -> FALSE }T
-T{ 1. 1. D= -> TRUE }T
-
-T{ 0 -1 0 -1 D= -> TRUE }T
-T{ 0 -1 0 0 D= -> FALSE }T
-T{ 0 -1 0 1 D= -> FALSE }T
-T{ 0 0 0 -1 D= -> FALSE }T
-T{ 0 0 0 0 D= -> TRUE }T
-T{ 0 0 0 1 D= -> FALSE }T
-T{ 0 1 0 -1 D= -> FALSE }T
-T{ 0 1 0 0 D= -> FALSE }T
-T{ 0 1 0 1 D= -> TRUE }T
-
-T{ MAX-2INT MIN-2INT D= -> FALSE }T
-T{ MAX-2INT 0. D= -> FALSE }T
-T{ MAX-2INT MAX-2INT D= -> TRUE }T
-T{ MAX-2INT HI-2INT D= -> FALSE }T
-T{ MAX-2INT MIN-2INT D= -> FALSE }T
-T{ MIN-2INT MIN-2INT D= -> TRUE }T
-T{ MIN-2INT LO-2INT D= -> FALSE }T
-T{ MIN-2INT MAX-2INT D= -> FALSE }T
-
-TESTING 2LITERAL 2VARIABLE
-
-T{ : CD3 [ MAX-2INT ] 2LITERAL ; -> }T
-T{ CD3 -> MAX-2INT }T
-T{ 2VARIABLE 2V1 -> }T
-T{ 0. 2V1 2! -> }T
-T{ 2V1 2@ -> 0. }T
-T{ -1 -2 2V1 2! -> }T
-T{ 2V1 2@ -> -1 -2 }T
-T{ : CD4 2VARIABLE ; -> }T
-T{ CD4 2V2 -> }T
-T{ : CD5 2V2 2! ; -> }T
-T{ -2 -1 CD5 -> }T
-T{ 2V2 2@ -> -2 -1 }T
-T{ 2VARIABLE 2V3 IMMEDIATE 5 6 2V3 2! -> }T
-T{ 2V3 2@ -> 5 6 }T
-T{ : CD7 2V3 [ 2@ ] 2LITERAL ; CD7 -> 5 6 }T
-T{ : CD8 [ 6 7 ] 2V3 [ 2! ] ; 2V3 2@ -> 6 7 }T
-
-TESTING DMAX DMIN
-
-T{ 1. 2. DMAX -> 2. }T
-T{ 1. 0. DMAX -> 1. }T
-T{ 1. -1. DMAX -> 1. }T
-T{ 1. 1. DMAX -> 1. }T
-T{ 0. 1. DMAX -> 1. }T
-T{ 0. -1. DMAX -> 0. }T
-T{ -1. 1. DMAX -> 1. }T
-T{ -1. -2. DMAX -> -1. }T
-
-T{ MAX-2INT HI-2INT DMAX -> MAX-2INT }T
-T{ MAX-2INT MIN-2INT DMAX -> MAX-2INT }T
-T{ MIN-2INT MAX-2INT DMAX -> MAX-2INT }T
-T{ MIN-2INT LO-2INT DMAX -> LO-2INT }T
-
-T{ MAX-2INT 1. DMAX -> MAX-2INT }T
-T{ MAX-2INT -1. DMAX -> MAX-2INT }T
-T{ MIN-2INT 1. DMAX -> 1. }T
-T{ MIN-2INT -1. DMAX -> -1. }T
-
-
-T{ 1. 2. DMIN -> 1. }T
-T{ 1. 0. DMIN -> 0. }T
-T{ 1. -1. DMIN -> -1. }T
-T{ 1. 1. DMIN -> 1. }T
-T{ 0. 1. DMIN -> 0. }T
-T{ 0. -1. DMIN -> -1. }T
-T{ -1. 1. DMIN -> -1. }T
-T{ -1. -2. DMIN -> -2. }T
-
-T{ MAX-2INT HI-2INT DMIN -> HI-2INT }T
-T{ MAX-2INT MIN-2INT DMIN -> MIN-2INT }T
-T{ MIN-2INT MAX-2INT DMIN -> MIN-2INT }T
-T{ MIN-2INT LO-2INT DMIN -> MIN-2INT }T
-
-T{ MAX-2INT 1. DMIN -> 1. }T
-T{ MAX-2INT -1. DMIN -> -1. }T
-T{ MIN-2INT 1. DMIN -> MIN-2INT }T
-T{ MIN-2INT -1. DMIN -> MIN-2INT }T
-
-TESTING D>S DABS
-
-T{ 1234 0 D>S -> 1234 }T
-T{ -1234 -1 D>S -> -1234 }T
-T{ MAX-INTD 0 D>S -> MAX-INTD }T
-T{ MIN-INTD -1 D>S -> MIN-INTD }T
-
-T{ 1. DABS -> 1. }T
-T{ -1. DABS -> 1. }T
-T{ MAX-2INT DABS -> MAX-2INT }T
-T{ MIN-2INT 1. D+ DABS -> MAX-2INT }T
-
-TESTING M+ M*/
-
-T{ HI-2INT 1 M+ -> HI-2INT 1. D+ }T
-T{ MAX-2INT -1 M+ -> MAX-2INT -1. D+ }T
-T{ MIN-2INT 1 M+ -> MIN-2INT 1. D+ }T
-T{ LO-2INT -1 M+ -> LO-2INT -1. D+ }T
-
-
-: ?FLOORED [ -3 2 / -2 = ] LITERAL IF 1. D- THEN ;
-
-T{ 5. 7 11 M*/ -> 3. }T
-T{ 5. -7 11 M*/ -> -3. ?FLOORED }T
-T{ -5. 7 11 M*/ -> -3. ?FLOORED }T
-T{ -5. -7 11 M*/ -> 3. }T
-T{ MAX-2INT 8 16 M*/ -> HI-2INT }T
-T{ MAX-2INT -8 16 M*/ -> HI-2INT DNEGATE ?FLOORED }T
-T{ MIN-2INT 8 16 M*/ -> LO-2INT }T
-T{ MIN-2INT -8 16 M*/ -> LO-2INT DNEGATE }T
-T{ MAX-2INT MAX-INTD MAX-INTD M*/ -> MAX-2INT }T
-T{ MAX-2INT MAX-INTD 2/ MAX-INTD M*/ -> MAX-INTD 1- HI-2INT NIP }T
-T{ MIN-2INT LO-2INT NIP 1+ DUP 1- NEGATE M*/ -> 0 MAX-INTD 1- }T
-T{ MIN-2INT LO-2INT NIP 1- MAX-INTD M*/ -> MIN-INTD 3 + HI-2INT NIP 2 + }T
-T{ MAX-2INT LO-2INT NIP DUP NEGATE M*/ -> MAX-2INT DNEGATE }T
-T{ MIN-2INT MAX-INTD DUP M*/ -> MIN-2INT }T
-
-TESTING D. D.R
-
-MAX-2INT 71 73 M*/ 2CONSTANT DBL1
-MIN-2INT 73 79 M*/ 2CONSTANT DBL2
-
-: D>ASCII ( D -- CADDR U )
- DUP >R <# DABS #S R> SIGN #> ( -- CADDR1 U )
- HERE SWAP 2DUP 2>R CHARS DUP ALLOT MOVE 2R>
-;
-
-DBL1 D>ASCII 2CONSTANT "DBL1"
-DBL2 D>ASCII 2CONSTANT "DBL2"
-
-: DOUBLEOUTPUT
- CR ." You should see lines duplicated:" CR
- 5 SPACES "DBL1" TYPE CR
- 5 SPACES DBL1 D. CR
- 8 SPACES "DBL1" DUP >R TYPE CR
- 5 SPACES DBL1 R> 3 + D.R CR
- 5 SPACES "DBL2" TYPE CR
- 5 SPACES DBL2 D. CR
- 10 SPACES "DBL2" DUP >R TYPE CR
- 5 SPACES DBL2 R> 5 + D.R CR
-;
-
-T{ DOUBLEOUTPUT -> }T
-
-TESTING 2ROT DU< (Double Number extension words)
-
-T{ 1. 2. 3. 2ROT -> 2. 3. 1. }T
-T{ MAX-2INT MIN-2INT 1. 2ROT -> MIN-2INT 1. MAX-2INT }T
-
-T{ 1. 1. DU< -> FALSE }T
-T{ 1. -1. DU< -> TRUE }T
-T{ -1. 1. DU< -> FALSE }T
-T{ -1. -2. DU< -> FALSE }T
-T{ 0 1 1. DU< -> FALSE }T
-T{ 1. 0 1 DU< -> TRUE }T
-T{ 0 -1 1 -2 DU< -> FALSE }T
-T{ 1 -2 0 -1 DU< -> TRUE }T
-
-T{ MAX-2INT HI-2INT DU< -> FALSE }T
-T{ HI-2INT MAX-2INT DU< -> TRUE }T
-T{ MAX-2INT MIN-2INT DU< -> TRUE }T
-T{ MIN-2INT MAX-2INT DU< -> FALSE }T
-T{ MIN-2INT LO-2INT DU< -> TRUE }T
-
-TESTING 2VALUE
-
-T{ 1111 2222 2VALUE 2VAL -> }T
-T{ 2VAL -> 1111 2222 }T
-T{ 3333 4444 TO 2VAL -> }T
-T{ 2VAL -> 3333 4444 }T
-T{ : TO-2VAL TO 2VAL ; 5555 6666 TO-2VAL -> }T
-T{ 2VAL -> 5555 6666 }T
-
-
-CR .( End of Double-Number word tests) CR
+++ /dev/null
-
-; -----------------------------------
-; PROG100k.4th for MSP_EXP430FR5994 = 76 x RC5toLCD.4th for MSP_EXP430FR5994
-; -----------------------------------
-; download source file sized to compile 100 kbytes
-; -----------------------------------
-
-
-CODE ABORT_RC5TOLCD
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_RC5TOLCD
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-
-
-ECHO
- ; downloading PROG100k.4th is done
-RST_HERE ; this app is protected against <reset>
-
+++ /dev/null
-
-; -----------------------------------
-; RC5TOLCD.4th for MSP_EXP430FR5994
-; -----------------------------------
-
-
-CODE ABORT_RC5TOLCD
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_RC5TOLCD
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]
-
-MARKER {RC5TOLCD}
-6 ALLOT
-
-
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-CODE 20_US
-BEGIN
- BEGIN
- BIT #1,&$3C0
- 0<> UNTIL
- BIC #1,&$3C0
- SUB #1,R14
-U< UNTIL
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE TOP_LCD
- BIS.B #4,&$243
- BIT.B #1,&$241
-0= IF
- AND.B #$0F,R14
- MOV.B R14,&$222
- BIC.B #4,&$243
- MOV @R15+,R14
- MOV @R13+,R0
-THEN
- SUB #2,R15
- MOV R14,0(R15)
- BIC.B #4,&$243
- MOV.B &$220,R14
- AND.B #$0F,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE LCD_WRC
- BIS.B #2,&$243
-BW1 SUB #2,R15
- MOV R14,0(R15)
- RRUM #4,R14
- BIC.B #1,&$243
- BIS.B #$0F,&$224
-COLON
- TOP_LCD 2 20_US
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF
- BIC.B #2,&$243
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ;
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-
-
-HDNCODE WDT_INT
-BIT.B #$20,&$240
-0= IF
- CMP #19,&$3D6
- U< IF
- ADD #1,&$3D6
- THEN
-ELSE
- BIT.B #$40,&$240
- 0= IF
- CMP #3,&$3D6
- U>= IF
- SUB #1,&$3D6
- THEN
- THEN
-THEN
-RETI
-ENDCODE
-
-HDNCODE RC5_INT
-$1800 @ 16000 = [IF]
- MOV #1,&$3A0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3A0
-[THEN]
-MOV #1778,R9
-MOV #14,R10
-BEGIN
-MOV #%1011100100,&$380
- RRUM #1,R9
- MOV R9,R8
- RRUM #1,R8
- ADD R9,R8
- BEGIN CMP R8,&$390
- U>= UNTIL
- BIT.B #4,&$200
- ADDC R11,R11
- MOV.B &$200,&$208
- BIC.B #4,&$20C
- SUB #1,R10
-0<> WHILE
- ADD R9,R8
- BEGIN
- MOV &$390,R9
- CMP R8,R9
- U>= IF
- BIC #$30,&$380
- GOTO FW1
- THEN
- BIT.B #4,&$20C
- 0<> UNTIL
-REPEAT
-BIC #$30,&$380
-RLAM #1,R11
-MOV.B R11,R9
-RRUM #2,R9
-BIT #$4000,R11
-0= IF BIS #$40,R9
-THEN
-RRUM #3,R11
-XOR @R1,R11
-BIT #$400,R11
-0= ?GOTO FW2
-XOR #$400,0(R1)
-SUB #8,R15
-MOV R14,6(R15)
-MOV &$1DDC,4(R15)
-MOV #$10,&$1DDC
-MOV R9,0(R15)
-MOV #0,R14
-LO2HI
- LCD_CLEAR
- <# # #S #36 HOLD #>
- ['] LCD_WRC IS EMIT
- TYPE
- ['] EMIT >BODY IS EMIT
-HI2LO
-MOV @R15+,&$1DDC
-MOV @R15+,R14
-FW1 FW2
- MOV @R1+,R2
- BIC #%1111_1000,R2
- MOV @R1+,R0
-ENDCODE
-
-
-HDNCODE STOP_R2L
-CMP #$40AA,&{RC5TOLCD}+8
-0<> IF
- BIC.B #4,&$20A
- BIC.B #4,&$20C
- MOV #0,&$3C0
- MOV #0,&$340
- MOV #0,&$342
- MOV #$40AA,&{RC5TOLCD}+8
- MOV &{RC5TOLCD}+10,&WARM+2
- MOV &{RC5TOLCD}+12,&$FFEA
- MOV &{RC5TOLCD}+14,&$FFDE
- MOV &{RC5TOLCD}+10,R0
-THEN
-MOV @R1+,R0
-ENDCODE
-
-CODE STOP
-BW1
-CALL #STOP_R2L
-COLON
-ECHO
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-
-HDNCODE INI_R2L
-BIC #1,&$130
-MOV &$1808,R14
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #%10_1101_0100,&$3C0
-$1800 @ 16000 = [IF]
- MOV #1,&$3E0
-[THEN]
-$1800 @ 24000 = [IF]
- MOV #2,&$3E0
-[THEN]
- MOV #19,&$3D2
-MOV #%0110_0000,&$3C6
- MOV #10,&$3D6
- BIS.B #$20,&$204
- BIS.B #$20,&$20A
- BIS.B #7,&$245
- BIC.B #7,&$247
- BIS.B #$0F,&$224
- BIC.B #$0F,&$226
- BIS.B #4,&$20A
- BIC.B #4,&$20C
-MOV #%01_0001_0100,&$340
- MOV ##3276,&$352
- MOV #%10000,&$342
-COLON
- #1000 20_US
- %011 TOP_LCD
- #205 20_US
- %011 TOP_LCD
- #5 20_US
- %011 TOP_LCD
- #2 20_US
- %010 TOP_LCD
- #2 20_US
- %00101000 LCD_WRF
- %1000 LCD_WRF
- LCD_CLEAR
- %0110 LCD_WRF
- %1100 LCD_WRF
- LCD_CLEAR
- ['] LCD_HOME IS CR
- ['] LCD_WRC IS EMIT
- CR ." I love you"
- ['] CR >BODY IS CR
- ['] EMIT >BODY IS EMIT
- ." RC5toLCD is running. Type STOP to quit"
- ABORT" "
-;
-
-CODE START
-CMP #$40AA,&{RC5TOLCD}+8
-0= IF
- MOV #STOP_R2L,&{RC5TOLCD}+8
- MOV &WARM+2,&{RC5TOLCD}+10
- MOV #INI_R2L,&WARM+2
- MOV &$FFEA,&{RC5TOLCD}+12
- MOV #WDT_INT,&$FFEA
- MOV &$FFDE,&{RC5TOLCD}+14
- MOV #RC5_INT,&$FFDE
- MOV #INI_R2L,R0
-THEN
-MOV @R13+,R0
-ENDCODE
-
-ECHO
- ; downloading RC5toLCD.4th is done
-RST_HERE ; this app is protected against <reset>
-
-START
+++ /dev/null
-
-CODE ABORT_RTC
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1812,R14
-BIT #$8000,R14
-0<> IF MOV #0,R14 THEN
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-ABORT" target without LF_XTAL !"
-PWR_STATE
-;
-
-ABORT_RTC
-
-; --------------------
-; RTC.4th for MSP_EXP430FR5994
-; --------------------
-
-[DEFINED] {RTC} [IF] {RTC} [THEN]
-
-MARKER {RTC}
-8 ALLOT
-
-
-[UNDEFINED] OR [IF]
-CODE OR
-BIS @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C! [IF]
-CODE C!
-MOV.B @R15+,0(R14)
-ADD #1,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DEPTH [IF]
-CODE DEPTH
-MOV R14,-2(R15)
-MOV #$1C80,R14
-SUB R15,R14
-RRA R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] CASE [IF]
-: CASE 0 ; IMMEDIATE
-
-: OF
-1+
->R
-POSTPONE OVER POSTPONE =
-POSTPONE IF
-POSTPONE DROP
-R>
-; IMMEDIATE
-
-: ENDOF
->R
-POSTPONE ELSE
-R>
-; IMMEDIATE
-
-: ENDCASE
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
-
-CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
-ENDCODE
-
-CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-[UNDEFINED] 2* [IF]
-CODE 2*
-ADD R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] UM* [IF]
-CODE UM*
- MOV @R15,&$4C0
- MOV R14,&$4C8
- MOV &$4E4,0(R15)
- MOV &$4E6,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] UM/MOD [IF]
-CODE UM/MOD
- PUSH #DROP
- MOV #$4066,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U*/ [IF]
-: U*/
->R UM* R> UM/MOD SWAP DROP
-;
-[THEN]
-
-[UNDEFINED] U/MOD [IF]
-: U/MOD
-0 SWAP UM/MOD
-;
-[THEN]
-
-[UNDEFINED] UMOD [IF]
-: UMOD
-U/MOD DROP
-;
-[THEN]
-
-[UNDEFINED] U/ [IF]
-: U/
-U/MOD SWAP DROP
-;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #$4028,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-$81EF $1A04 @ U< ; search device ID: MSP430FR4133 or...
-$1A04 @ $8241 U< ; ...MSP430FR2433
-=
-$830B $1A04 @ U< ; MSP430FR21xx/23xx/24xx/25xx/26xx
-OR ; -- flag
-
-[IF]
-
-
- CREATE $4B0 2 ALLOT
- CREATE $4B1 2 ALLOT
- CREATE $4B2 2 ALLOT
- CREATE $4B3 2 ALLOT
- CREATE $4B4 2 ALLOT
- CREATE $4B5 2 ALLOT
- CREATE $4B6 2 ALLOT
-
- HDNCODE RTC_INT
- ADD #2,R1
- BIT #1,&$4AE
- ADD.B #1,&$4B0
- CMP.B #60,&$4B0
- U>= IF
- MOV.B #0,&$4B0
- ADD.B #1,&$4B1
- CMP.B #60,&$4B1
- U>= IF
- MOV.B #0,&$4B1
- ADD.B #1,&$4B2
- CMP.B #24,&$4B2
- U>= IF
- MOV.B #0,&$4B2
- ADD.B #1,&$4B3
- CMP.B #7,&$4B3
- U>= IF
- MOV.B #0,&$4B3
- THEN
- ADD.B #1,&$4B4
- CMP.B #2,&$4B5
- 0= IF
- COLON
- $4B6 @ 4 UMOD
- IF 29
- ELSE
- $4B6 @ 100 UMOD
- IF 30
- ELSE
- $4B6 @ 400 UMOD
- IF 29
- ELSE 30
- THEN
- THEN
- THEN
- HI2LO
- MOV @R1+,R13
- MOV R14,R9
- MOV @R15+,R14
- ELSE
- MOV #31,R9
- MOV.B &$4B5,R10
- CMP.B #8,R10
- 0>= IF
- ADD.B #1,R10
- THEN
- BIT.B #1,R10
- 0<> IF
- ADD #1,R9
- THEN
- THEN
- CMP.B R9,&$4B4
- U>= IF
- MOV.B #1,&$4B4
- ADD.B #1,&$4B5
- CMP.B #13,&$4B5
- U>= IF
- MOV.B #1,&$4B5
- ADD #1,&$4B6
- THEN
- THEN
- THEN
- THEN
- THEN
- MOV @R1+,R0
- ENDCODE
-
- HDNCODE STOP_RTC
- CMP #$40AA,&{RTC}+8
- 0<> IF
- MOV #{RTC}+10,R9
- MOV #$40AA,-2(R9)
- MOV @R9+,&RTC_VEC
- MOV @R9+,&COLD+2
- MOV @R9+,&WARM+2
- THEN
- MOV #0,&RTCCTL
- MOV.B #XIN,R9
- BIC.B R9,&XT1_SEL
- BIS.B R9,&XT1_DIR
- BIC.B R9,&XT1_OUT
- BIS.B R9,&XT1_OUT
- BIC.B R9,&XT1_OUT
- BIS.B R9,&XT1_OUT
- BIC.B R9,&XT1_DIR
- BIS.B R9,&XT1_SEL
- MOV &COLD+2,R0
- ENDCODE
-
- HDNCODE INI_RTC
- CALL &{RTC}+14
- CMP #0,&RTCCTL
- 0= IF
- MOV #$7F,&RTCMOD
- BIT #-1,&$4AE
- MOV #%0010_0110_0100_0010,&RTCCTL
- THEN
- MOV @R1+,R0
- ENDCODE
-
-
- CODE START_RTC
- CMP #STOP_RTC,&{RTC}+8
- 0<> IF
- MOV #STOP_RTC,&{RTC}+8
- MOV &RTC_VEC,&{RTC}+10
- MOV #RTC_INT,&RTC_VEC
- MOV &COLD+2,&{RTC}+12
- MOV #STOP_RTC,&COLD+2
- MOV &WARM+2,&{RTC}+14
- MOV #INI_RTC,&WARM+2
- THEN
- CALL #INI_RTC
- MOV @R13+,R0
- ENDCODE
-
- : TIME?
- $4B2 C@ 2 U.R $3A EMIT
- $4B1 C@ 2 U.R $3A EMIT
- $4B0 C@ 2 U.R
- ;
-
- : TIME!
- START_RTC
- 2 DEPTH
- U< IF
- $4B0 C!
- $4B1 C!
- $4B2 C!
- THEN
- ." it is " TIME?
- ;
-
- : DATE?
-
-[ELSE]
-
-
- CODE TIME?
- BEGIN
- BIT.B #$10,&$4A2
- 0<> UNTIL
- COLON
- $4B2 C@ 2 U.R $3A EMIT
- $4B1 C@ 2 U.R $3A EMIT
- $4B0 C@ 2 U.R
- ;
-
- : TIME!
- 2 DEPTH
- U< IF
- $4B0 C!
- $4B1 C!
- $4B2 C!
- THEN
- ." it is " TIME?
- ;
-
- CODE DATE?
- BEGIN
- BIT.B #$10,&$4A2
- 0<> UNTIL
- COLON
-
-[THEN]
-
-
- $4B3 C@
- CASE
- 0 OF ." Sat" ENDOF
- 1 OF ." Sun" ENDOF
- 2 OF ." Mon" ENDOF
- 3 OF ." Tue" ENDOF
- 4 OF ." Wed" ENDOF
- 5 OF ." Thu" ENDOF
- 6 OF ." Fri" ENDOF
- ENDCASE
- $4B6 @
- $4B5 C@
- $4B4 C@
- $20 EMIT
- 2 U.R $2F EMIT
- 2 U.R $2F EMIT
- .
-;
-
-
-
-: DATE!
-2 DEPTH
-U< IF
- $4B6 !
- $4B5 C!
- $4B4 C!
-THEN
-$4B4 C@
-$4B5 C@
-$4B6 @
-OVER 3 U<
-IF 1 - SWAP 12 + SWAP
-THEN
-100 U/MOD
-DUP 4 U/ SWAP 2* -
-SWAP DUP 4 U/ + +
-SWAP 1+ 13 5 U*/ + +
-7 UMOD
-$4B3 C!
-." we are on " DATE?
-;
-
-RST_HERE
-
-[UNDEFINED] S_ [IF]
-CODE S_
-MOV #0,&$1DB4
-COLON
-$4014 ,
-$20 WORD
-HI2LO
-MOV.B @R14,R14
-ADD #1,R14
-BIT #1,R14
-ADDC R14,&$1DC6
-MOV @R15+,R14
-MOV @R1+,R13
-MOV #$20,&$1DB4
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ESC [IF]
-CODE ESC
-CMP #0,&$1DBE
-0= IF MOV @R13+,R0
-THEN
-COLON
-$1B
-POSTPONE LITERAL
-POSTPONE EMIT
-POSTPONE S_
-POSTPONE TYPE
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] EXECUTE [IF]
-CODE EXECUTE
-PUSH R14
-MOV @R15+,R14
-MOV @R1+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] EVALUATE [IF]
-CODE EVALUATE
-MOV #$1DC0,R9
-MOV @R9+,R12
-MOV @R9+,R11
-MOV @R9+,R10
-PUSHM #4,R13
-LO2HI
-INTERPRET
-HI2LO
-MOV @R1+,&$1DC4
-MOV @R1+,&$1DC2
-MOV @R1+,&$1DC0
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-: SET_TIME
-ESC [8;40;80t
-39 0 DO CR LOOP
-ESC [H
-CR ." DATE (DMY): "
-$1CE4 DUP #84
-['] ACCEPT >BODY
-EXECUTE
-EVALUATE
-CR DATE!
-CR ." TIME (HMS): "
-$1CE4 DUP #84
-['] ACCEPT >BODY
-EXECUTE
-EVALUATE
-CR TIME!
-RST_STATE
-;
-
-ECHO
-SET_TIME
+++ /dev/null
-
-; -----------
-; SD_TEST.4th for MSP_EXP430FR5994
-; -----------
-
-CODE ABORT_SD_TEST
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_SD_TEST
-
-PWR_STATE
-
-[DEFINED] {SD_TEST} [IF] {SD_TEST} [THEN]
-
-MARKER {SD_TEST}
-
-[UNDEFINED] EXIT [IF]
-CODE EXIT
-MOV @R1+,R13
-MOV @R13+,R0
-
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 0= [IF]
-CODE 0=
-SUB #1,R14
-SUBC R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC6
-MOV &$1DC6,R10
-MOV #$403A,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF]
-CODE BEGIN
- MOV #$4028,R0
-ENDCODE IMMEDIATE
-
-CODE UNTIL
- MOV #$4034,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE AGAIN
-MOV #$403A,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-
-: WHILE
-POSTPONE IF SWAP
-; IMMEDIATE
-
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
- CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
- ENDCODE
-
- CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
- ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBE CONSTANT STATE
-[THEN]
-
-[UNDEFINED] IS [IF]
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R
->R <# 0 # #S #>
-R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DUMP [IF]
-CODE DUMP
-PUSH R13
-PUSH &$1DDC
-MOV #$10,&$1DDC
-ADD @R15,R14
-LO2HI
- SWAP
- DO CR
- I 4 U.R SPACE
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> $1DDC !
-;
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #BEGIN,R0
-ENDCODE
-[THEN]
-
-
-CODE SD_EMIT
-CMP #512,&$201E
-U>= IF
- MOV #WRITE,R9
- CALL 2(R9)
-THEN
-MOV &$201E,R8
-MOV.B R14,$1E00(R8)
-ADD #1,&$201E
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-: SD_TEST
-PWR_HERE
-CR
-." 0 Set date and time" CR
-." 1 Load {TOOLS} words" CR
-." 2 Load {SD_TOOLS} words" CR
-." 3 Load {CORE_COMP} words" CR
-." 4 Load ANS core tests" CR
-." 5 Load a 100k program " CR
-." 6 Read only this source file" CR
-." 7 append a dump of FORTH to YOURFILE.TXT" CR
-." 8 delete YOURFILE.TXT" CR
-." 9 Load TST_WORDS" CR
-." your choice : "
-KEY
-48 - ?DUP
-0= IF
- ." LOAD RTC.4TH" CR
- LOAD" RTC.4TH"
-ELSE 1 - ?DUP
- 0= IF
- ." LOAD UTILITY.4TH" CR
- LOAD" UTILITY.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD SD_TOOLS.4TH" CR
- LOAD" SD_TOOLS.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD CORE_ANS.4TH" CR
- LOAD" CORE_ANS.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD CORETEST.4TH" CR
- LOAD" CORETEST.4TH"
- PWR_STATE
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD PROG100K.4TH" CR
- NOECHO
- LOAD" PROG100K.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." READ PROG100K.4TH" CR
- READ" PROG100K.4TH"
- BEGIN
- READ
- UNTIL
- ELSE 1 - ?DUP
- 0= IF
- ." WRITE YOURFILE.TXT" CR
- WRITE" YOURFILE.TXT"
- ['] SD_EMIT IS EMIT
- $4000 HERE OVER - DUMP
- ['] EMIT >BODY IS EMIT
- CLOSE
- ELSE 1 - ?DUP
- 0= IF
- ." DEL YOURFILE.TXT" CR
- DEL" YOURFILE.TXT"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD TSTWORDS.4TH" CR
- LOAD" TSTWORDS.4TH"
- ELSE
- ." abort" ABORT" "
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
-THEN
-;
-
-
-
-RST_HERE
-
-[THEN]
-
-ECHO SD_TEST
+++ /dev/null
-
-
-; ---------------------------------------------------------------
-; SD_TOOLS.4th for MSP_EXP430FR5994 : BASIC TOOLS for SD Card : DIR FAT SECTOR CLUSTER
-; ---------------------------------------------------------------
-
-CODE ABORT_SD_TOOLS
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_SD_TOOLS
-
-
-[DEFINED] {SD_TOOLS} [IF] {SD_TOOLS} [THEN]
-
-[UNDEFINED] {SD_TOOLS} [IF]
-
-MARKER {SD_TOOLS}
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
-
-CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
-ENDCODE
-
-CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUMP [IF]
-CODE DUMP
-PUSH R13
-PUSH &$1DDC
-MOV #$10,&$1DDC
-ADD @R15,R14
-LO2HI
- SWAP
- DO CR
- I 4 U.R SPACE
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> $1DDC !
-;
-[THEN]
-
-CODE SECTOR.
-BW1 MOV R14,R9
- MOV @R15,R10
- CALL #READ_SWX
-COLON
- <# #S #> TYPE SPACE
- $1E00 $200 DUMP CR ;
-
-CODE CLUSTR.
-BW2 BIT.B #4,&$260
- 0<> IF
- MOV #COLD,R0
- THEN
- MOV.B &$2012,R10
- MOV @R15,R9
- GOTO FW1
- BEGIN
- ADD R9,R9
- ADDC R14,R14
-FW1 RRA R10
- U>= UNTIL
- ADD &$2010,R9
- MOV R9,0(R15)
- ADDC #0,R14
- GOTO BW1
-ENDCODE
-
-CODE FAT
- SUB #4,R15
- MOV R14,2(R15)
- MOV &$2008,0(R15)
- MOV #0,R14
- GOTO BW1
-ENDCODE
-
-CODE DIR
- SUB #4,R15
- MOV R14,2(R15)
- MOV &$202C,0(R15)
- MOV &$202E,R14
- CMP #0,R14
- 0<> ?GOTO BW2
- CMP #1,0(R15)
- 0<> ?GOTO BW2
- MOV &$200E,0(R15)
- GOTO BW1
-ENDCODE
-
-
-RST_HERE
-
-[THEN]
-ECHO
-
+++ /dev/null
-
-; -----------------------------------------------------------------------
-; TEST_ASM.4th for MSP_EXP430FR5994
-; -----------------------------------------------------------------------
-
-CODE ABORT_TEST_ASM
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_TEST_ASM
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-MOV R7,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
-
-CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
-ENDCODE
-
-CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] VARIABLE [IF]
-: VARIABLE
-CREATE
-HI2LO
-MOV #$1287,-4(R10)
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DEFER [IF]
-
-: DEFER
-CREATE
-HI2LO
-MOV #$4030,-4(R10)
-MOV #$403C,-2(R10)
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] LOOP [IF]
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] +LOOP [IF]
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUMP [IF]
-CODE DUMP
-PUSH R13
-PUSH &$1DDC
-MOV #$10,&$1DDC
-ADD @R15,R14
-LO2HI
- SWAP
- DO CR
- I 4 U.R SPACE
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> $1DDC !
-;
-[THEN]
-
-CODE TESTPUSHM
-BW1
- MOV #22222,R8
- MOV #3,R9
- MOV #2,R10
- MOV #1,R11
- MOV #0,R12
-
- PUSHM #4,R13
- POPM #4,R13
- SUB #10,R15
- MOV R14,8(R15)
- MOV R12,6(R15)
- MOV R11,4(R15)
- MOV R10,2(R15)
- MOV R9,0(R15)
- MOV R8,R14
- RRAM #1,R14
- RLAM #2,R14
- RRCM #1,R14
- RRUM #1,R14
- COLON
- space . . . . .
- ;
-
-TESTPUSHM ; you should see 11111 3 2 1 0 -->
-
-CODE TESTPOPM
- GOTO BW1
-ENDCODE
-
-
-TESTPOPM ; you should see 11111 3 2 1 0 -->
-
-
-
-CODE TEST1
-
- MOV &$1DDC,&$1DDC
- CMP #%10,&$1DDC
-0<> IF MOV #2,&$1DDC
-ELSE MOV #$0A,&$1DDC
-THEN
- COLON
- $1DDC @ U.
- ;
-
-
-: TEST2
- $1DDC @ U.
- HI2LO
-
-
- CMP #2, &$1DDC
-0<> IF MOV #2, &$1DDC
-ELSE MOV #10,&$1DDC
-THEN
- MOV @R1+,R13
- MOV @R13+,R0
-ENDCODE
-
-
-CODE TEST3
- CMP #2, &$1DDC
-0<> IF MOV #2, &$1DDC
-ELSE MOV #10,&$1DDC
-THEN COLON
- $1DDC @ U.
-;
-
-
-
-: TEST5
- SPACE
- HI2LO
- SUB #2,R15
- MOV R14,0(R15)
- MOV #%1010,R14
-BEGIN SUB #$0001,R14
- LO2HI
-
- DUP U.
- HI2LO
- CMP #0,R14
-0= UNTIL MOV @R15+,R14
- MOV @R1+,R13
- MOV @R13+,R0
-ENDCODE
-
-TEST5 ; you should see : 9 8 7 6 5 4 3 2 1 0 -->
-
-
-
-[UNDEFINED] C, [IF]
-CODE C,
-MOV &$1DC6,R10
-MOV.B R14,0(R10)
-ADD #1,&$1DC6
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-: BYTES_TABLE_IDX
-CREATE
-0 DO I C,
-LOOP
-DOES>
-+
-;
-
-8 BYTES_TABLE_IDX BYTES_TABLE
-
-2 BYTES_TABLE C@ . ; you should see 2 -->
-
-
-VARIABLE BYTES_TABLE1
-
-$0201 BYTES_TABLE1 !
-
-CODE IDX_TEST1
- MOV.B BYTES_TABLE1(R14),R14
-COLON
- U.
-;
-
-0 IDX_TEST1 ; you should see 1 -->
-
-CODE TEST6
- MOV 0(R15),0(R15)
- MOV @R13+,R0
-ENDCODE
-
-
-1 TEST6 . ; you should see 1 -->
-
-
-
-
-
-CREATE TABLE0
-0 C,
-1 C,
-2 C,
-3 C,
-
-
-CREATE TABLE10
-$10 C,
-$11 C,
-$12 C,
-$13 C,
-
-
-
-CREATE TABLE20
-$20 C,
-$21 C,
-$22 C,
-$23 C,
-
-
-CREATE TABLE
-
-
-TABLE 2 - CONSTANT PFA_TABLE
-
-
-CODE REDIRECT ; <table> -- redirects TABLE to argument <table>
-MOV R14,&PFA_TABLE
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-
-CODE REDIRECT0 ; -- redirects TABLE to TABLE0
-MOV #TABLE0,&PFA_TABLE
-MOV @R13+,R0
-ENDCODE
-
-
-CODE REDIRECT10 ; -- redirects TABLE to TABLE10
-MOV #TABLE10,&PFA_TABLE
-MOV @R13+,R0
-ENDCODE
-
-
-CODE REDIRECT20 ; -- redirects TABLE to TABLE20
-MOV #TABLE20,&PFA_TABLE
-MOV @R13+,R0
-ENDCODE
-
-
-' TABLE0 10 DUMP
-
-' TABLE10 10 DUMP
-
-' TABLE20 10 DUMP
-
-
-TABLE0 REDIRECT TABLE 10 DUMP
-
-TABLE10 REDIRECT TABLE 10 DUMP
-
-TABLE20 REDIRECT TABLE 10 DUMP
-
-
-REDIRECT0 TABLE 10 DUMP
-
-REDIRECT10 TABLE 10 DUMP
-
-REDIRECT20 TABLE 10 DUMP
-
-
-TABLE0 PFA_TABLE ! TABLE 10 DUMP
-
-TABLE10 PFA_TABLE ! TABLE 10 DUMP
-
-TABLE20 PFA_TABLE ! TABLE 10 DUMP
-
-
-
-
-; -----------------------------------------------------------------------
-; create a primary DEFERred assembly word
-; -----------------------------------------------------------------------
-
-
-DEFER TRUC ; here, TRUC is a secondary DEFERred word (i.e. without BODY)
-
-
-
-CODENNM ; leaves its execution address (CFA) on stack
- SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-DUP .
-
-IS TRUC ; TRUC becomes a primary DEFERred word
- ; with its default action (DUP) located at its BODY addresse.
-
-TRUC . ; display R14 value -->
-
-
-' TRUC >BODY IS TRUC ; TRUC is reinitialzed with its default action
-
-
-TRUC . ; display R14 value -->
-
-
-
-
-
+++ /dev/null
-\ -----------------------------
-\ MSP-EXP430FR5969_TSTWORDS.4th
-\ -----------------------------
-
-PWR_STATE
-
-\ -----------------------------------------------------------------------
-\ test some assembler words and show how to mix FORTH/ASSEMBLER routines
-\ -----------------------------------------------------------------------
-LOAD" \misc\TestASM.4th"
-
-\ -------------------------------------
-\ here we returned in the TestWords.4th
-\ -------------------------------------
-ECHO
-\ ----------
-\ LOOP tests
-\ ----------
-: LOOP_TEST 8 0 DO I . LOOP
-;
-
-LOOP_TEST \ you should see 0 1 2 3 4 5 6 7 -->
-
-
-: LOOP_TEST1 \ n <LOOP_TEST1> ---
-
- BEGIN DUP U. 1 -
- ?DUP
- 0= UNTIL
-;
-
-: LOOP_MAX \ FIND_NOTHING --
- 0 0
- DO
- LOOP \ 14 cycles by loop
- ABORT" 65536 LOOP "
-;
-
- : FIND_TEST \ FIND_TEST <word> --
- $20 WORD \ -- c-addr
- 50000 0
- DO \ -- c-addr
- DUP
- FIND DROP DROP
- LOOP
- FIND
- 0= IF ABORT" <-- not found !"
- ELSE ABORT" <-- found !"
- THEN
- ;
-
-\ seeking $ word, FIND jumps all words on their first character so time of word loop is 20 cycles
-\ see FIND in the source file for more information
-\
-\ FIND_TEST <lastword> result @ 8MHz, monothread : 1,2s
-\
-\ FIND_TEST $ results @ 8MHz, monothread, 201 words in vocabulary FORTH :
-\ 27 seconds with only FORTH vocabulary in CONTEXT
-\ 540 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 2.6866 us / word, 21,49 cycles / word (for 20 cycles calculated (see FIND in source file)
-\
-\
-\ FIND_TEST $ results @ 8MHz, 2 threads, 201 words in vocabulary FORTH :
-\ 13 second with only FORTH vocabulary in CONTEXT
-\ 260 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 1,293 us / word, 10,34 cycles / word
-\
-\ FIND_TEST $ results @ 8MHz, 4 threads, 201 words in vocabulary FORTH :
-\ 8 second with only FORTH vocabulary in CONTEXT
-\ 160 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 0,796 us / word, 6,37 cycles / word
-\
-\ FIND_TEST $ results @ 8MHz, 8 threads, 201 words in vocabulary FORTH :
-\ 4.66 second with only FORTH vocabulary in CONTEXT
-\ 93 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 0,4463 us / word, 3,7 cycles / word
-\
-\ FIND_TEST $ results @ 8MHz, 16 threads, 201 words in vocabulary FORTH :
-\ 2,8 second with only FORTH vocabulary in CONTEXT
-\ 56 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 0,278 us / word, 2,22 cycles / word
-\
-\ --------
-\ KEY test
-\ --------
-: KEY_TEST
- ." type a key : "
- KEY EMIT \ wait for a KEY, then emit it
-;
-\ KEY_TEST
+++ /dev/null
-; ----------------------------------------------------------------------
-; UARTI2CS.4th for MSP_EXP430FR5994
-; ----------------------------------------------------------------------
-
-CODE ABORT_UARTI2CS
-SUB #4,R15
-MOV R14,2(R15)
-MOV &$1812,R14
-BIT #$7800,R14
-0<> IF MOV #0,R14 THEN
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-ABORT" <-- Ouch! unexpected I2C_FastForth target!"
-PWR_STATE
-;
-
-ABORT_UARTI2CS
-
-[DEFINED] {UARTI2CS}
-[IF] {UARTI2CS}
-[THEN]
-
-MARKER {UARTI2CS}
-8 ALLOT
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-$FFA2 CONSTANT I2CS_ADR
-
-HDNCODE I2CSTOP
-BIS.B #2,&$265
-MOV R0,R0
-BIS.B #4,&$265
-MOV R0,R0
-BIC.B #2,&$265
-MOV R0,R0
-BIC.B #4,&$265
-MOV @R1+,R0
-ENDCODE
-
-HDNCODE STOP_U2I
-BW1
-CMP #$40AA,&{UARTI2CS}+8
-0<> IF
- CALL #I2CSTOP
- MOV #6,R10
- BIC.B R10,&$265
- BIS.B R10,&$263
- BIS.B R10,&$267
- MOV #0,&$3C0
- MOV #{UARTI2CS}+10,R10
- MOV #$40AA,-2(R10)
- MOV @R10+,&WARM+2
- MOV @R10+,&$FFF0
- MOV @R10+,&$FFF4
- MOV #1,R14
-THEN
-MOV @R1+,R0
-ENDCODE
-
-
-
-HDNCODE U2I_TERM_INT
-ADD #4,R1
-MOV &{UARTI2CS}+16,R10
-MOV #$1CE4,R11
-MOV #$0D,R12
-BEGIN
- MOV.B &$5CC,R8
- ADD #1,R11
- MOV.B R8,-1(R11)
- CMP.B R8,R12
-0<> WHILE
- CMP #0,R10
- 0= IF
- BEGIN
- BIT #2,&$5DC
- 0<> UNTIL
- MOV.B R8,&$5CE
- THEN
- BEGIN
- BIT #1,&$5DC
- 0<> UNTIL
-REPEAT
-CALL #$41C8
-BEGIN
- BIT #1,&$5DC
-0<> UNTIL
-BW2
-MOV.B &$5CC,R12
-MOV.B R12,0(R11)
-BW3
-BIS.B #4,&$265
-MOV.B &I2CS_ADR,R9
-MOV #$1CE4,R8
-MOV R0,R0
-BIS.B #2,&$265
-BEGIN
- MOV.B #8,R10
- BEGIN
- ADD.B R9,R9
- U>= IF
- BIC.B #4,&$265
- ELSE
- BIS.B #4,&$265
- THEN
- BIC.B #2,&$265
- BEGIN
- BIT.B #2,&$261
- 0<> UNTIL
- BIS.B #2,&$265
- SUB #1,R10
- 0= UNTIL
- BIC.B #4,&$265
- BIC.B #2,&$265
- MOV R0,R0
- BIT.B #4,&$261
- BIS.B #2,&$265
-0= WHILE
- CMP R12,R11
-0<> WHILE
- MOV.B @R8+,R9
- MOV R9,R11
-REPEAT
-THEN
-GOTO FW1
-ENDCODE
-
-
-HDNCODE HALF_S_INT
-ADD #4,R1
-FW1
-BW3
-CMP #0,&$1812
-0>= IF
- MOV #%0001_0101_0110,&$3C0
-ELSE
- MOV #%0001_1101_0110,&$3C0
-THEN
-BEGIN
- BIC.B #2,&$265
- BIT #8,&$5CA
- 0<> ?GOTO BW1
- BIS.B #4,&$265
- MOV.B &I2CS_ADR,R8
- BIS.B #1,R8
- $3C00 ,
- BIS.B #2,&$265
- MOV.B #8,R10
- BEGIN
- ADD.B R8,R8
- U>= IF
- BIC.B #4,&$265
- ELSE
- BIS.B #4,&$265
- THEN
- BIC.B #2,&$265
- MOV R0,R0
- BIS.B #2,&$265
- SUB #1,R10
- 0= UNTIL
- BIC.B #4,&$265
- BIC.B #2,&$265
- BEGIN
- BIT.B #2,&$261
- 0<> UNTIL
- BIT.B #4,&$261
- BIS.B #2,&$265
- 0<> IF
- CALL #I2CSTOP
- MOV #$4000,R0
- THEN
- BEGIN
- BEGIN
- BIC.B #4,&$265
- MOV.B #8,R10
- BEGIN
- BIC.B #2,&$265
- MOV R0,R0
- BIT.B #4,&$261
- BIS.B #2,&$265
- ADDC.B R9,R9
- SUB #1,R10
- 0= UNTIL
- CMP.B #-1,R9
- 0= IF
- MOV #2,R9
- THEN
- CMP.B #8,R9
- U>= WHILE
- BEGIN
- BIT #2,&$5DC
- 0<> UNTIL
- BIS.B #4,&$265
- BIC.B #2,&$265
- BEGIN
- BIT.B #2,&$261
- 0<> UNTIL
- MOV.B R9,&$5CE
- BIS.B #2,&$265
- REPEAT
- CMP.B #4,R9
- U>= IF
- MOV #0,&{UARTI2CS}+16
- 0= IF
- MOV #-1,&{UARTI2CS}+16
- THEN
- BIS.B #4,&$265
- THEN
- BIC.B #2,&$265
- BEGIN
- BIT.B #2,&$261
- 0<> UNTIL
- BIT.B #4,&$261
- BIS.B #2,&$265
- 0<> UNTIL
- CMP.B #2,R9
-U>= WHILE
- 0= IF
- MOV #0,&{UARTI2CS}+16
- CALL #$41C6
- BEGIN
- BIC #1,&$5DC
- MOV &$1800,R8
- BEGIN MOV #32,R10
- BEGIN SUB #1,R10
- 0= UNTIL
- SUB #1,R8
- 0= UNTIL
- BIT #1,&$5DC
- 0= UNTIL
- THEN
-REPEAT
-CALL #I2CSTOP
-CMP.B #1,R9
-0= IF
- MOV #$1CE4,R11
- CALL #$41C6
- BEGIN
- BIT #1,&$5DC
- 0<> UNTIL
- CALL #$41C8
- GOTO BW2
-THEN
-MOV #$4000,R0
-ENDCODE
-
-HDNCODE INI_U2I
-CALL &{UARTI2CS}+10
-CMP #$0E,R14
-0<> IF
- CMP #$0A,R14
- U>= ?GOTO BW1
-THEN
-BIT.B #$20,&$240
-0= ?GOTO BW1
-MOV #0,&$1808
-MOV #$800,&$3D2
-BIC.B #6,&$267
-BIC.B #6,&$263
-GOTO BW3
-ENDCODE
-
-: UARTI2CS
-CR I2CS_ADR !
-HI2LO
-CMP #$40AA,&{UARTI2CS}+8
-0= IF
- MOV #STOP_U2I,&{UARTI2CS}+8
- MOV &WARM+2,&{UARTI2CS}+10
- MOV &$FFF0,&{UARTI2CS}+12
- MOV &$FFF4,&{UARTI2CS}+14
-
- MOV #0,&{UARTI2CS}+16
- MOV #INI_U2I,&WARM+2
- MOV #U2I_TERM_INT,&$FFF0
- MOV #HALF_S_INT,&$FFF4
-
-THEN
-MOV #WARM,R0
-ENDCODE
-
-RST_HERE ECHO
-18 UARTI2CS ; TERATERM(Alt-B) or I2C_Master($20+RST) to quit
+++ /dev/null
-
-
-; ------------------------------------------------------------------------------
-; UTILITY.4th for MSP_EXP430FR5994
-; ------------------------------------------------------------------------------
-
-CODE ABORT_UTILITY
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_UTILITY
-
-PWR_STATE
-
-[DEFINED] {TOOLS} [IF] {TOOLS} [THEN]
-
-[UNDEFINED] {TOOLS} [IF]
-
-MARKER {TOOLS}
-
-[UNDEFINED] EXIT [IF]
-CODE EXIT
-MOV @R1+,R13
-MOV @R13+,R0
-
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC6,R14
-ADD #4,&$1DC6
-MOV #$4034,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE THEN
-MOV &$1DC6,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF]
-CODE BEGIN
- MOV #$4028,R0
-ENDCODE IMMEDIATE
-
-CODE UNTIL
- MOV #$4034,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE AGAIN
-MOV #$403A,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-
-: WHILE
-POSTPONE IF SWAP
-; IMMEDIATE
-
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
- MOV R9,-4(R10)
- MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] DROP [IF]
-CODE DROP
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
- MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DUP [IF]
-CODE 2DUP
-MOV R14,-2(R15)
-MOV @R15,-4(R15)
-SUB #4,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
- CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
- ENDCODE
-
- CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
- ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
-CODE MOVE
-MOV R14,R10
-MOV @R15+,R8
-MOV @R15+,R9
-MOV @R15+,R14
-CMP #0,R10
-0<> IF
- CMP R9,R8
- 0= ?GOTO FW1
- U< IF
- BEGIN
- MOV.B @R9+,0(R8)
- ADD #1,R8
- SUB #1,R10
- 0= UNTIL
- MOV @R13+,R0
- ELSE
- ADD R10,R8
- ADD R10,R9
- BEGIN
- SUB #1,R9
- SUB #1,R8
- MOV.B @R9,0(R8)
- SUB #1,R10
- 0= UNTIL
- THEN
-THEN
-FW1 MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] .S [IF]
-CODE .S
- MOV R14,-2(R15)
- MOV R15,R14
- SUB #2,R14
- MOV R14,-6(R15)
- MOV #$1C80,R14
- SUB #2,R14
-BW1 MOV R14,-4(R15)
- SUB #6,R15
- SUB @R15,R14
- RRA R14
-COLON
- $3C EMIT
- .
- $08 EMIT
- $3E EMIT SPACE
- 2DUP 1+
- U< IF
- DROP DROP EXIT
- THEN
- $1DDC @ >R
- $10 $1DDC !
- DO
- I @ U.
- 2 +LOOP
- R> $1DDC !
-;
-[THEN]
-
-[UNDEFINED] .RS [IF]
-CODE .RS
- MOV R14,-2(R15)
- MOV R1,-6(R15)
- MOV #$1CE0,R14
- GOTO BW1
-ENDCODE
-[THEN]
-
-[UNDEFINED] ? [IF]
-CODE ?
- MOV @R14,R14
- MOV #U.,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] WORDS [IF]
-: WORDS
-CR
-$1DCA @ $1CE4
-$1810 @ DUP +
-MOVE
-BEGIN
- 0 DUP
- $1810 @ DUP + 0
- DO
- DUP I $1CE4 + @
- U< IF
- DROP DROP
- I DUP $1CE4 + @
- THEN
- 2 +LOOP
- ?DUP
-WHILE
- DUP
- 2 - @
- ROT
- $1CE4 +
- !
- DUP
- COUNT $7F AND
- TYPE
- C@ $0F AND
- $10 SWAP - SPACES
-REPEAT
-DROP
-;
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R
->R <# 0 # #S #>
-R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DUMP [IF]
-CODE DUMP
-PUSH R13
-PUSH &$1DDC
-MOV #$10,&$1DDC
-ADD @R15,R14
-LO2HI
- SWAP 2DUP
- U. U.
- $FFF0 AND
- DO CR
- I 4 U.R SPACE
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> $1DDC !
-;
-[THEN]
-
-RST_HERE
-
-[THEN]
-ECHO
+++ /dev/null
-\ -*- coding: utf-8 -*-
-
-; -----------------------------------
-; PROG100k.f = 76 x RC5toLCD.f
-; -----------------------------------
-; download source file sized to compile 100 kbytes
-; -----------------------------------
-
-\ TARGET SELECTION ( = the name of \INC\target.pat file without the extension)
-\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
-\ MSP_EXP430FR2355
-\ LP_MSP430FR2476
-\
-\ from scite editor : copy your target selection in (shift+F8) parameter 1:
-\
-\ OR
-\
-\ drag and drop this file onto SendSourceFileToTarget.bat
-\ then select your TARGET when asked.
-\
-\
-\ REGISTERS USAGE
-\ R4 to R7 must be saved before use and restored after
-\ scratch registers Y to S are free for use
-\ under interrupt, IP is free for use
-\ interrupts reset SR register !
-\
-\ PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
-\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7 , R6 , R5 , R4 , R3, R2, R1, R0
-\
-\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
-\
-\ POPM order : PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT, Y, X, W, T, S, IP,TOS,PSP
-\ POPM order : R0, R1, R2, R3, R4 , R5 , R6 , R7 , R8, R9,R10,R11,R12,R13,R14,R15
-\
-\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
-\
-\ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
-\ ASSEMBLER conditionnal usage before ?JMP ?GOTO : S< S>= U< U>= 0= 0<> 0<
-\
-\ FORTH conditionnal : 0= 0< = < > U<
-\
-\ display on a LCD 2x20 CHAR the code sent by an IR remote under philips RC5 protocol
-\ target : any TI MSP-EXP430FRxxxx launchpad (FRAM)
-\ LPM_MODE = LPM0 because use SMCLK for LCDVo
-\
-\ DEMO : driver for IR remote compatible with the PHILIPS RC5 protocol
-\ plus : driver for 5V LCD 2x20 characters display with 4 bits data interface
-\ without usage of an auxiliary 5V to feed the LCD_Vo
-\ and without potentiometer to adjust the LCD contrast :
-\ to adjust LCD contrast, just press S1 (-) or S2 (+)
-\ LCDVo current consumption ~ 500 uA.
-\
-\ ===================================================================================
-\ notice : adjust WDT_TIM_EX0,LCD_TIM_CTL,LCD_TIM_EX0 and 20_us to the target frequency if <> 8MHz !
-\ ===================================================================================
-\
-\
-\ layout : I/O are defined in the launchpad.pat file (don't work with ChipStick_FR2433)
-\
-\ GND <-------+---0V0----------> 1 LCD_Vss
-\ VCC >------ | --3V6-----+----> 2 LCD_Vdd
-\ | |
-\ ___ 470n ---
-\ ^ ---
-\ / \ 1N4148 |
-\ --- |
-\ 100n | 2k2 |
-\ LCD_TIM_.2 >---||--+--^/\/\/v--+----> 3 LCD_Vo (= 0V6 without modulation)
-\ -------------------------> 4 LCD_RW
-\ -------------------------> 5 LCD_RW
-\ -------------------------> 6 LCD_EN
-\ <------------------------> 11 LCD_DB4
-\ <------------------------> 12 LCD_DB5
-\ <------------------------> 13 LCD_DB5
-\ <------------------------> 14 LCD_DB7
-\
-\ <----- LCD contrast + <--- Sw1 <--- (finger) :-)
-\ <----- LCD contrast - <--- Sw2 <--- (finger) :-)
-\
-\ rc5 <--- OUT IR_Receiver (1 TSOP32236)
-
-\ first, we test for downloading driver only if UART TERMINAL target
-CODE ABORT_RC5TOLCD
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_UARTI2CS definition before resuming
-;
-
-ABORT_RC5TOLCD
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] = [IF]
-\ https://forth-standard.org/standard/core/Equal
-\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
-\ https://forth-standard.org/standard/core/IF
-\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/THEN
-\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-\ https://forth-standard.org/standard/core/ELSE
-\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
- MOV @IP+,PC
-THEN \ read LCD bits pattern
- SUB #2,PSP
- MOV TOS,0(PSP)
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV.B &LCD_DB_IN,TOS \ get LCD_Data
- AND.B #LCD_DB,TOS \
- MOV @IP+,PC
-ENDCODE
-
-CODE LCD_WRC \ char -- Write Char
- BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
- RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
- BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
- BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
- TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
-
-CODE LCD_WRF \ func -- Write Fonction
- BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
- GOTO BW1
-ENDCODE
-
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
-
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
-\ CODE LCD_RDS \ -- status Read Status
-\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
-\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
-\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
-\ COLON \ starts a FORTH word
-\ TOP_LCD 2 20_us \ -- %0000_HHHH
-\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
-\ HI2LO \ switch from FORTH to assembler
-\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
-\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
-\ MOV @RSP+,IP \ restore IP saved by COLON
-\ MOV @IP+,PC \
-\ ENDCODE
-\
-\ CODE LCD_RDC \ -- char Read Char
-\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
-\ GOTO BW1
-\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
- THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
-\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
-\ - - \CNTL Counter lentgh \ 00 = 16 bits
-\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
-\ -- \ID input divider \ 10 = /4
-\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
-\ - \TBCLR TimerB Clear
-\ - \TBIE
-\ -\TBIFG
-\ -------------------------------\
-\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\ -- \CM Capture Mode
-\ -- \CCIS
-\ - \SCS
-\ -- \CLLD
-\ - \CAP
-\ --- \OUTMOD \ 011 = set/reset
-\ - \CCIE
-\ - \CCI
-\ - \OUT
-\ - \COV
-\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
-\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
-
-
-ECHO
- ; downloading PROG100k.4th is done
-RST_HERE ; this app is protected against <reset>
-
-\ START
--- /dev/null
+\ -*- coding: utf-8 -*-
+
+; -----------------------------------
+; PROG10K.f
+; -----------------------------------
+
+; load and compile 10kb (9 x RC52LCD)
+
+\ to see kernel options, download FastForthSpecs.f
+\ FastForth kernel options: MSP430ASSEMBLER, CONDCOMP, FREQUENCY = 8/16/24 MHz
+\
+\ TARGET SELECTION ( = the name of \INC\target.pat file without the extension)
+\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
+\ MSP_EXP430FR2355
+\ LP_MSP430FR2476
+\
+\ from scite editor : copy your target selection in (shift+F8) parameter 1:
+\
+\ OR
+\
+\ drag and drop this file onto SendSourceFileToTarget.bat
+\ then select your TARGET when asked.
+\
+\
+\ ================================================================================
+\ REGISTERS USAGE for embedded MSP430 ASSEMBLER
+\ ================================================================================
+\ don't use R2, R3, R4
+\ R5, R6, R7 must be PUSHed/POPed before/after use, OR restored after: MOV #{XDOCOL|XDOCON|R>},{rDODOES|rDOCON|rDOVAR}
+\ scratch registers Y to S are free,
+\ under interrupt, IP is free,
+\ use FORTH rules for reg. TOS, PSP, RSP.
+\
+\ PUSHM order : PSP,TOS, IP, S , T , W , X , Y ,rDOVAR,rDOCON,rDODOES,rDOCOL, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7 , R6 , R5 , R4 , R3, R2, R1, R0
+\
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\
+\ POPM order : PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT, Y, X, W, T, S, IP,TOS,PSP
+\ POPM order : R0, R1, R2, R3, R4 , R5 , R6 , R7 , R8, R9,R10,R11,R12,R13,R14,R15
+\
+\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
+\
+\ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
+\ ASSEMBLER conditionnal usage before ?GOTO : S< S>= U< U>= 0= 0<> 0<
+\
+\
+\ display on a LCD 2x20 CHAR the code sent by an IR remote under philips RC5 protocol
+\ target : any TI MSP-EXP430FRxxxx launchpad (FRAM)
+\ LPM_MODE = LPM0 because use SMCLK for LCDVo
+\
+\ DEMO : driver for IR remote compatible with the PHILIPS RC5 protocol
+\ plus : driver for 5V LCD 2x20 characters display with 4 bits data interface
+\ without usage of an auxiliary 5V to feed the LCD_Vo
+\ and without potentiometer to adjust the LCD contrast :
+\ to adjust LCD contrast, just press S1 (-) or S2 (+)
+\ LCDVo current consumption ~ 500 uA.
+\
+\ ===================================================================================
+\ notice : adjust WDT_TIM_EX0,LCD_TIM_CTL,LCD_TIM_EX0 and 20_us to the target frequency if <> 8MHz !
+\ ===================================================================================
+\
+\
+\ layout : I/O are defined in the launchpad.pat file (don't work with ChipStick_FR2433)
+\
+\ GND <-------o---0V0----------> 1 LCD_Vss
+\ VCC >-------|---3V6-----o----> 2 LCD_Vdd
+\ | |
+\ ___ 470n ---
+\ ^ ---
+\ / \ 1N4148 |
+\ --- |
+\ 100n | 2k2 |
+\ TB0.2 >---||--o--^/\/\/v--o----> 3 LCD_Vo (= 0V6 without modulation)
+\ -------------------------> 4 LCD_RW
+\ -------------------------> 5 LCD_RW
+\ -------------------------> 6 LCD_EN
+\ <------------------------> 11 LCD_DB4
+\ <------------------------> 12 LCD_DB5
+\ <------------------------> 13 LCD_DB5
+\ <------------------------> 14 LCD_DB7
+\
+\ <----- LCD contrast + <--- Sw1 <--- (finger) :-)
+\ <----- LCD contrast - <--- Sw2 <--- (finger) :-)
+\
+\ rc5 <--- OUT IR_Receiver (1 TSOP32236)
+
+
+\ first, we test for downloading driver only if UART TERMINAL target
+ CODE ABORT_RC5TOLCD
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ RST_RET \ remove ABORT_UARTI2CS definition before resuming
+ ;
+
+ ABORT_RC5TOLCD
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+ECHO
+
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/toBODY
+\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV.B &LCD_DB_IN,TOS \ get LCD_Data
+ AND.B #LCD_DB,TOS \
+ MOV @IP+,PC
+ ENDCODE
+
+ CODE LCD_WRC \ char -- Write Char
+ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+BW1 SUB #2,PSP \
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
+ RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
+ BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
+ BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
+ COLON \ high level word starts here
+ TOP_LCD 2 20_US \ write high nibble first
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF \ func -- Write Fonction
+ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_RDS \ -- status Read Status
+\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
+\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
+\ BIS.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=1
+\ COLON \ starts a FORTH word
+\ TOP_LCD 2 20_us \ -- %0000_HHHH
+\ TOP_LCD 2 20_us \ -- %0000_HHHH %0000_LLLL
+\ HI2LO \ switch from FORTH to assembler
+\ RLAM #4,0(PSP) \ -- %HHHH_0000 %0000_LLLL
+\ ADD.B @PSP+,TOS \ -- %HHHH_LLLL
+\ MOV @RSP+,IP \ restore IP saved by COLON
+\ MOV @IP+,PC \
+\ ENDCODE
+\
+\ CODE LCD_RDC \ -- char Read Char
+\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
+\ GOTO BW1
+\ ENDCODE
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
+ THEN
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
+\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
+\ - - \CNTL Counter lentgh \ 00 = 16 bits
+\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
+\ -- \ID input divider \ 10 = /4
+\ -- \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\ - \TBCLR TimerB Clear
+\ - \TBIE
+\ -\TBIFG
+\ ----------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\ -- \CM Capture Mode
+\ -- \CCIS
+\ - \SCS
+\ -- \CLLD
+\ - \CAP
+\ --- \OUTMOD \ 011 = set/reset
+\ - \CCIE
+\ - \CCI
+\ - \OUT
+\ - \COV
+\ -\CCIFG
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
+
+\ START
\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
\
\ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
-\ ASSEMBLER conditionnal usage before ?GOTO : S< S>= U< U>= 0= 0<> 0<
+\ ASSEMBLER conditionnal usage before ?GOTO : S< S>= U< U>= 0= 0<> 0<
\
\
\ display on a LCD 2x20 CHAR the code sent by an IR remote under philips RC5 protocol
\ first, we test for downloading driver only if UART TERMINAL target
-CODE ABORT_RC5TOLCD
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_UARTI2CS definition before resuming
-;
-
-ABORT_RC5TOLCD
-
-
-[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN] \ remove application
-
-MARKER {RC5TOLCD} \ restore the state before MARKER definition
-\ \ {UARTI2CS}+8 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
-6 ALLOT \ {UARTI2CS}+10: make room to save previous INI_APP address
- \ {RC5TOLCD}+12: make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+14: make room to save previous IR_VEC
-
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-\ https://forth-standard.org/standard/core/STATE
-\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
+ CODE ABORT_RC5TOLCD
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ RST_RET \ remove ABORT_UARTI2CS definition before resuming
+ ;
+
+ ABORT_RC5TOLCD
+
+ MARKER {RC5TOLCD} \ restore the state before MARKER definition
+\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
+ 8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
+ \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+ \ {RC5TOLCD}+4 make room to save previous IR_VEC
+ \ {RC5TOLCD}+6 make room for 20 us count loop.
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] = [IF]
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] IF [IF] \ define IF and THEN
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] ELSE [IF]
\ https://forth-standard.org/standard/core/ELSE
\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-\
-\ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
-
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ \ https://forth-standard.org/standard/core/DEFERStore
+\ \ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
+\ [UNDEFINED] IS
+\ [IF] \ define DEFER! and IS
+\ CODE DEFER! \ xt2 xt1 --
+\ MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
+\ MOV @PSP+,TOS \ --
+\ MOV @IP+,PC
+\ ENDCODE
+\
+\ \ https://forth-standard.org/standard/core/IS
+\ \ IS <name> xt --
+\ \ used as is :
+\ \ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+\ \ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
+\ \ or in a definition : ... ['] U. IS DISPLAY ...
+\ \ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+\ \
+\ \ as IS replaces the PFA value of any word, it's a TO alias for VARIABLE and CONSTANT words...
+\
+\ : IS
+\ STATEADR @
+\ IF POSTPONE ['] POSTPONE DEFER!
+\ ELSE ' DEFER!
+\ THEN
+\ ; IMMEDIATE
+\ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
-[UNDEFINED] >BODY [IF]
\ https://forth-standard.org/standard/core/toBODY
\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-\ CODE 20uS \ n -- 8MHz version
-\ BEGIN \ 4 + 16 ~ loop
-\ MOV #39,rDOCON \ 39
-\ BEGIN \ 4 ~ loop
-\ NOP
-\ SUB #1,rDOCON
-\ 0= UNTIL
-\ SUB #1,TOS \ 1
-\ 0= UNTIL
-\ MOV #XDOCON,rDOCON \ 2
-\ MOV @PSP+,TOS
-\ MOV @RSP+,IP \
-\ ENDCODE
-
-CODE 20_US \ n -- n * 20 us
-BEGIN \ here we presume that LCD_TIM_IFG = 1...
- BEGIN
- BIT #1,&LCD_TIM_CTL \ 3
- 0<> UNTIL \ 2 loop until LCD_TIM_IFG set
- BIC #1,&LCD_TIM_CTL \ 3 clear LCD_TIM_IFG
- SUB #1,TOS \ 1
-U< UNTIL \ 2 ...so add a dummy loop with U< instead of 0=
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-
-CODE TOP_LCD \ LCD Sample
-\ \ if write : %xxxx_WWWW --
-\ \ if read : -- %0000_RRRR
- BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
- BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
-0= IF \ write LCD bits pattern
- AND.B #LCD_DB,TOS \
- MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
- BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
- MOV @PSP+,TOS \
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
MOV @IP+,PC
-THEN \ read LCD bits pattern
+ ENDCODE
+ [THEN]
+
+ CODE 20_US \ n --
+ BEGIN \ J_loop 8000 16000 24000 kHz
+ MOV &{RC5TOLCD}+6,X \ 3 X = {40 80 120}
+ SUB #2,X \ +1 X = {38 78 118} I_loops + 2 J_loops = {40 80 120} * 4 cycles
+ BEGIN \ I_loop
+ NOP \ 1
+ SUB #1,X \ +1
+ 0= UNTIL \ +2
+ NOP \ +1
+ SUB #1,TOS \ +1
+ 0= UNTIL \ +2
+ MOV @PSP+,TOS \
+ MOV @RSP+,IP \
+ ENDCODE
+
+\ \ if write : %xxxx_WWWW --
+\ \ if read : -- %0000_RRRR
+ CODE TOP_LCD \ LCD Sample
+ BIS.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 0-->1
+ BIT.B #LCD_RW,&LCD_CMD_IN \ lcd_rw test
+ 0= IF \ write LCD bits pattern
+ AND.B #LCD_DB,TOS \
+ MOV.B TOS,&LCD_DB_OUT \ send LCD_Data
+ BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
+ MOV @PSP+,TOS \
+ MOV @IP+,PC
+ THEN \ read LCD bits pattern
SUB #2,PSP
MOV TOS,0(PSP)
BIC.B #LCD_EN,&LCD_CMD_OUT \ lcd_en 1-->0 ==> strobe data
MOV.B &LCD_DB_IN,TOS \ get LCD_Data
AND.B #LCD_DB,TOS \
MOV @IP+,PC
-ENDCODE
+ ENDCODE
-CODE LCD_WRC \ char -- Write Char
+ CODE LCD_WRC \ char -- Write Char
BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
BW1 SUB #2,PSP \
- MOV TOS,0(PSP) \ -- %xxxx_LLLL %HHHH_LLLL
+ MOV TOS,0(PSP) \ -- %HHHH_LLLL %HHHH_LLLL
RRUM #4,TOS \ -- %xxxx_LLLL %xxxx_HHHH
BIC.B #LCD_RW,&LCD_CMD_OUT \ lcd_rw=0
BIS.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as output
-COLON \ high level word starts here
+ COLON \ high level word starts here
TOP_LCD 2 20_US \ write high nibble first
- TOP_LCD 2 20_US
-;
+ TOP_LCD 2 20_US
+ ;
-CODE LCD_WRF \ func -- Write Fonction
+ CODE LCD_WRF \ func -- Write Fonction
BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
GOTO BW1
-ENDCODE
+ ENDCODE
-: LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
-: LCD_HOME $02 LCD_WRF 100 20_us ;
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ; \ $01 LCD_WrF 80 20_us ==> bad init !
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
-\ [UNDEFINED] OR [IF]
-\
-\ \ https://forth-standard.org/standard/core/OR
-\ \ C OR x1 x2 -- x3 logical OR
-\ CODE OR
-\ BIS @PSP+,TOS
-\ MOV @IP+,PC
-\ ENDCODE
-\
-\ [THEN]
-\
-\ : LCD_ENTRY_SET $04 OR LCD_WrF ;
-\ : LCD_DSP_CTRL $08 OR LCD_WrF ;
-\ : LCD_DSP_SHIFT $10 OR LCD_WrF ;
-\ : LCD_FN_SET $20 OR LCD_WrF ;
-\ : LCD_CGRAM_SET $40 OR LCD_WrF ;
-\ : LCD_GOTO $80 OR LCD_WrF ;
-\
-\
+\ CODE LCD_ENTRY_SET
+\ BIS #$04,TOS
+\ BW1 COLON
+\ LCD_WrF
+\ ;
+\
+\ CODE LCD_DSP_CTRL
+\ BIS#$08,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_DSP_SHIFT
+\ BIS#$10,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_FN_SET
+\ BIS#$20,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_CGRAM_SET
+\ BIS #$40,TOS
+\ GOTO BW1
+\ ENDCODE
+\
+\ CODE LCD_GOTO
+\ BIS #$80,TOS
+\ GOTO BW1
+\ ENDCODE
+\
\ CODE LCD_RDS \ -- status Read Status
\ BIC.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=0
\ BW1 BIC.B #LCD_DB,&LCD_DB_DIR \ LCD_Data as intput
\ MOV @RSP+,IP \ restore IP saved by COLON
\ MOV @IP+,PC \
\ ENDCODE
-\
+\
\ CODE LCD_RDC \ -- char Read Char
\ BIS.B #LCD_RS,&LCD_CMD_OUT \ lcd_rs=1
\ GOTO BW1
\ ENDCODE
-
-
-\ ******************************\
-HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
-\ ******************************\
-\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
-BIT.B #SW2,&SW2_IN \ test switch S2
-0= IF \ case of switch S2 pressed
- CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
- U< IF
- ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+\
+\
+\ ********************************\
+ HDNCODE WDT_INT \ Watchdog interrupt routine, warning : not FORTH executable !
+\ ********************************\
+\ XOR.B #LED1,&LED1_OUT \ to visualise WDT
+ BIT.B #SW2,&SW2_IN \ test switch S2
+ 0= IF \ case of switch S2 pressed
+ CMP #19,&LCD_TIM_CCRn \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
+ U< IF
+ ADD #1,&LCD_TIM_CCRn \ action for switch S2 (P2.5) : 150 mV / increment
+ THEN
+ ELSE
+ BIT.B #SW1,&SW1_IN \ test switch S1 input
+ 0= IF \ case of Switch S1 pressed
+ CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
+ U>= IF \
+ SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
+ THEN \
+ THEN \
+ THEN \
+ RETI \ 5
+ ENDCODE \
+\ ********************************\
+
+\ ********************************\
+ HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
+\ ********************************\
+\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
+\ ********************************\
+\ \ in : SR(9)=old Toggle bit memory (ADD on)
+\ \ SMclock = 8|16|24 MHz
+\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
+\ \ SR(9)=new Toggle bit memory (ADD on)
+\ ********************************\
+\ RC5_FirstStartBitHalfCycle: \
+\ ********************************\
+ MOV #1778,X \ RC5_Period in us
+ MOV #14,W \ count of loop
+ BEGIN \
+\ ****************************\
+\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
+\ ****************************\ |
+ MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ RC5_Compute_3/4_Period: \ |
+ RRUM #1,X \ X=1/2 cycle |
+ MOV X,Y \ ^
+ RRUM #1,Y \ Y=1/4
+ ADD X,Y \ Y=3/4 cycle
+ BEGIN \
+ CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
+ U>= UNTIL \ 2
+\ ****************************\
+\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ****************************\
+ BIT.B #RC5,&IR_IN \ C_flag = IR bit
+ ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
+ MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
+ BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
+ SUB #1,W \ decrement count loop
+\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
+\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
+ 0<> WHILE \ ----> out of loop ----+
+ ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
+ BEGIN \ |
+ MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
+ CMP Y,X \ 1 ^ | cycle time out of bound ?
+ U>= ?GOTO FW1 \ | | quit on truncated RC5 message
+ BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
+ 0<> UNTIL \ 2 | |
+ REPEAT \ ----> loop back --+ | with X = new RC5_period value
+\ ********************************\ |
+\ RC5_SampleEndOf: \ <---------------------+
+\ ********************************\
+ BIC #$30,&RC5_TIM_CTL \ stop timer
+\ ********************************\
+\ RC5_ComputeNewRC5word \
+\ ********************************\
+ RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
+ MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
+ RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_ComputeC6bit \
+\ ********************************\
+ BIT #BIT14,T \ test /C6 bit in T
+ 0= IF BIS #BIT6,X \ set C6 bit in X
+ THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
+\ ********************************\
+\ RC5_CommandByteIsDone \
+\ ********************************\
+\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
+\ ********************************\
+ RRUM #3,T \ new toggle bit = T(13) ==> T(10)
+ XOR @RSP,T \ (new XOR old) Toggle bits
+ BIT #UF10,T \ repeated RC5_command ?
+ 0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
+ XOR #UF10,0(RSP) \ 5 toggle bit memory
+\ ********************************\
+\ Display IR_RC5 code \
+\ ********************************\
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &BASEADR,2(PSP) \ -- TOS Base x TOS
+ MOV #$10,&BASEADR \ set hexadecimal base
+ MOV X,0(PSP) \ -- TOS Base RC5_code TOS convert number to ascii low word = RC5 byte
+ MOV #0,TOS \ -- TOS Base RC5_code 0 convert double number to ascii
+ LO2HI \ switch from assembler to FORTH
+ LCD_CLEAR \ set LCD cursor at home
+ <# # #S #36 HOLD #> \ -- TOS Base adr cnt 32 bits conversion as "$xx"
+ ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
+ TYPE \ -- TOS Base display "$xx" on LCD
+ ['] EMIT >BODY IS EMIT \ restore EMIT
+ HI2LO \ switch from FORTH to assembler
+ MOV @PSP+,&BASEADR \ -- TOS restore current BASE
+ MOV @PSP+,TOS \ --
+FW1 BIC #$30,&RC5_TIM_CTL \ stop timer (case of truncated RC5 message)
+FW2 BIC #%1111_1000,0(RSP) \ force CPU Active Mode and disable GIE in saved SR
+ RETI \
+ ENDCODE \
+\ ********************************\
+
+\ define our STOP_APP
+\ ----------------------------------\
+ HDNCODE STOP_R2L \ called by STOP|INIT_R2L|{RC5TOLCD}
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \ only if START is done
+ BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
+ BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
+ MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER, clear LCD_TIMER IFG
+ MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
+ MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
+ MOV #{RC5TOLCD},W \
+ MOV #RET_ADR,-2(W) \ clear MARKER_DOES call
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV @W+,&UART_WARM+2 \ restore previous ini_APP
+ [ELSE]
+ MOV @W+,&I2C_WARM+2 \ restore previous ini_APP
+ [THEN]
+ MOV @W+,&WDT_TIM_0_VEC \ restore Vector previous value
+ MOV @W+,&IR_VEC \ restore Vector previous value
THEN
-ELSE
- BIT.B #SW1,&SW1_IN \ test switch S1 input
- 0= IF \ case of Switch S1 pressed
- CMP #3,&LCD_TIM_CCRn \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
- U>= IF \
- SUB #1,&LCD_TIM_CCRn \ action for switch S1 (P2.6) : -150 mV / decrement
- THEN \
- THEN \
-THEN \
-RETI \ 5
-ENDCODE
-
-\ ******************************\
-HDNCODE RC5_INT \ wake up on Px.RC5 change interrupt
-\ ******************************\
-\ IR_RC5 driver \ IP,S,T,W,X,Y registers are free for use
-\ ******************************\
-\ \ in : SR(9)=old Toggle bit memory (ADD on)
-\ \ SMclock = 8|16|24 MHz
-\ \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
-\ \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
-\ \ SR(9)=new Toggle bit memory (ADD on)
-\ ******************************\
-\ RC5_FirstStartBitHalfCycle: \
-\ ******************************\ division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
-\ FREQ_KHZ @ 8000 = [IF] \ 8 MHz ?
-\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
-\ [THEN]
-FREQ_KHZ @ 16000 = [IF] \ 16 MHz ?
- MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ 24 MHz ?
- MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
-[THEN]
-MOV #1778,X \ RC5_Period * 1us
-MOV #14,W \ count of loop
-BEGIN \
-\ ******************************\
-\ RC5_HalfCycle \ <--- loop back ---+ with readjusted RC5_Period
-\ ******************************\ |
-MOV #%1011100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ RC5_Compute_3/4_Period: \ |
- RRUM #1,X \ X=1/2 cycle |
- MOV X,Y \ ^
- RRUM #1,Y \ Y=1/4
- ADD X,Y \ Y=3/4 cycle
- BEGIN CMP Y,&RC5_TIM_R \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles
- U>= UNTIL \ 2
-\ ******************************\
-\ RC5_SampleOnFirstQuarter \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
-\ ******************************\
- BIT.B #RC5,&IR_IN \ C_flag = IR bit
- ADDC T,T \ C_flag <-- T(15):T(0) <-- C_flag
- MOV.B &IR_IN,&IR_IES \ preset Px_IES.y state for next IFG
- BIC.B #RC5,&IR_IFG \ clear Px_IFG.y after 4/4 cycle pin change
- SUB #1,W \ decrement count loop
-\ \ count = 13 ==> T = x x x x x x x x |x x x x x x x /C6
-\ \ count = 0 ==> T = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
-0<> WHILE \ ----> out of loop ----+
- ADD X,Y \ | Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
- BEGIN \ |
- MOV &RC5_TIM_R,X \ 3 | X grows from n+1/4 up to n+3/4 cycles
- CMP Y,X \ 1 | cycle time out of bound ?
- U>= IF \ 2 ^ | yes:
- BIC #$30,&RC5_TIM_CTL \ | | stop timer
- GOTO FW1 \ | | quit on truncated RC5 message
- THEN \ | |
- BIT.B #RC5,&IR_IFG \ 3 | | n+1/2 cycles edge is always present
- 0<> UNTIL \ 2 | |
-REPEAT \ ----> loop back --+ | with X = new RC5_period value
-\ ******************************\ |
-\ RC5_SampleEndOf: \ <---------------------+
-\ ******************************\
-BIC #$30,&RC5_TIM_CTL \ stop timer
-\ ******************************\
-\ RC5_ComputeNewRC5word \
-\ ******************************\
-RLAM #1,T \ T = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
-MOV.B T,X \ X = C5 C4 C3 C2 C1 C0 1 0
-RRUM #2,X \ X = 0 0 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_ComputeC6bit \
-\ ******************************\
-BIT #BIT14,T \ test /C6 bit in T
-0= IF BIS #BIT6,X \ set C6 bit in X
-THEN \ X = 0 C6 C5 C4 C3 C2 C1 C0
-\ ******************************\
-\ RC5_CommandByteIsDone \ -- BASE RC5_code
-\ ******************************\
-\ Only New_RC5_Command ADD_ON \ use SR(10) bit as toggle bit
-\ ******************************\
-RRUM #3,T \ new toggle bit = T(13) ==> T(10)
-XOR @RSP,T \ (new XOR old) Toggle bits
-BIT #UF10,T \ repeated RC5_command ?
-0= ?GOTO FW2 \ yes, RETI without UF10 change and without action !
-XOR #UF10,0(RSP) \ 5 toggle bit memory
-\ ******************************\
-\ Display IR_RC5 code \
-\ ******************************\
-SUB #8,PSP \ TOS -- x x x x TOS
-MOV TOS,6(PSP) \ -- Save_TOS x x x TOS
-MOV &BASEADR,4(PSP) \ -- Save_TOS Save_Base x x TOS
-MOV #$10,&BASEADR \ set hexadecimal base
-MOV X,0(PSP) \ -- Save_TOS Save_Base x RC5_code TOS convert number to ascii low word = RC5 byte
-MOV #0,TOS \ -- Save_TOS Save_Base x RC5_code 0 convert number to ascii high word = 0
-LO2HI \ switch from assembler to FORTH
- LCD_CLEAR \ set LCD cursor at home
- <# # #S #36 HOLD #> \ 32 bits conversion as "$xx"
- ['] LCD_WRC IS EMIT \ redirect EMIT to LCD
- TYPE \ -- Save_TOS Save_Base x adr cnt display "$xx" on LCD
- ['] EMIT >BODY IS EMIT \ -- Save_TOS Save_Base TOS restore EMIT
-HI2LO \ -- switch from FORTH to assembler
-MOV @PSP+,&BASEADR \ -- Save_TOS TOS restore current BASE
-MOV @PSP+,TOS \ -- TOS
-FW1 FW2
- MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
- RET \ (instead of RETI)
-ENDCODE
-
-
-\ ------------------------------\
-HDNCODE STOP_R2L \ define new STOP_APP
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \
-0<> IF \ if previous START executing
- BIC.B #RC5,&IR_IE \ clear I/O RC5_Int
- BIC.B #RC5,&IR_IFG \ clear I/O RC5_Int flag
- MOV #0,&LCD_TIM_CTL \ stop LCD_TIMER
- MOV #0,&WDT_TIM_CTL \ stop WDT_TIMER
- MOV #0,&WDT_TIM_CCTL0 \ clear CCIFG0 disable CCIE0
- MOV #RET_ADR,&{RC5TOLCD}+8 \ clear MARKER_DOES call
- MOV &{RC5TOLCD}+10,&WARM+2 \ restore previous ini_APP
- MOV &{RC5TOLCD}+12,&WDT_TIM_0_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+14,&IR_VEC \ restore Vector previous value
- MOV &{RC5TOLCD}+10,PC \ run previous INI_APP, then RET
-THEN
-MOV @RSP+,PC \ RET
-ENDCODE
-
-\ ------------------------------\
-CODE STOP \
-\ ------------------------------\
-BW1 \ <-- INI_R2L for some events
-CALL #STOP_R2L
-COLON \ restore default action of primary DEFERred word WARM (FORTH version)
-ECHO \
-." RC5toLCD is removed,"
-." type START to restart"
-ABORT" "
-;
-\ ------------------------------\
-
-\ ------------------------------\
-HDNCODE INI_R2L \ this routine completes the init of system, i.e. FORTH + this app.
-\ ------------------------------\
-\ activate I/O \
-\ ------------------------------\
-BIC #1,&PM5CTL0 \ activate I/O to enable SW2 test
-\ ------------------------------\
-\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
-\ ------------------------------\
-MOV &RSTIV_MEM,TOS \ SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ RSTIV_MEM = SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_R2L then RET to BODY of WARM
-THEN \
-BIT.B #SW2,&SW2_IN \ hardware SW2+RST ?
-0= ?GOTO BW1 \ hardware SW2+RST execute STOP_U2I then RET to BODY of WARM
-\ CMP #4,TOS \ hardware RST
-\ 0= ?GOTO BW1 \ hardware RST performs STOP.
-\ CMP #2,TOS \ Power_ON event
-\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
-\ CMP #6,TOS \
-\ 0= ?GOTO BW1 \ COLD event performs STOP... uncomment if it's that you want.
-\ CMP #$0A,TOS \
-\ 0= ?GOTO BW1 \ fault event (violation memory protected areas) performs STOP
-\ CMP #$16,TOS \
-\ U>= ?GOTO BW1 \ all other fault events + Deep Reset perform STOP
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM after use and before next RST event!
-\ ------------------------------\
+ MOV @RSP+,PC \ RET to STOP|WARM+4|{RC5TOLCD}
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE STOP \ also called by INIT_R2L for some events
+\ ----------------------------------\
+BW1 CALL #STOP_R2L
+ COLON \
+ ECHO \
+ ." type START to start RC5toLCD"
+ ;
+\ ----------------------------------\
+
+\ this routine completes the INIT_HARD of FORTH, with INIT_HARD for this app.
+\ ----------------------------------\
+ HDNCODE INIT_R2L \ called by START|SYS
+\ ----------------------------------\
\ LCD_TIM_CTL = %0000 0010 1001 0100\$3C0
\ - - \CNTL Counter lentgh \ 00 = 16 bits
\ -- \TBSSEL TimerB clock select \ 10 = SMCLK
\ - \TBCLR TimerB Clear
\ - \TBIE
\ -\TBIFG
-\ -------------------------------\
+\ ----------------------------------\
\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
\ -- \CM Capture Mode
\ -- \CCIS
\ - \OUT
\ - \COV
\ -\CCIFG
-\ -------------------------------\
-\ LCD_TIM_CCRx \
-\ -------------------------------\
-\ LCD_TIM_EX0 \
-\ ------------------------------\
-\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
-\ ------------------------------\
-MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
-\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
-FREQ_KHZ @ 16000 = [IF] \ if 16 MHz
- MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
-[THEN]
-FREQ_KHZ @ 24000 = [IF] \ if 24 MHz
- MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
-[THEN]
- MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
-\ ------------------------------\
+\ ----------------------------------\
+\ LCD_TIM_CCRx \
+\ ----------------------------------\
+\ LCD_TIM_EX0 \
+\ ----------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo; works without interrupt
+\ ----------------------------------\
+ MOV #%10_1101_0100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int, set IFG
+\ MOV #0,&RC5_TIM_EX0 \ predivide by 1 in RC5_TIM_EX0 register, reset value
+\ MOV #0,&LCD_TIM_EX0 \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+ FREQ_KHZ @ 16000 =
+ [IF] \ if 16 MHz
+ MOV #1,&RC5_TIM_EX0 \ predivide by 2 in RC5_TIM_EX0 register
+ MOV #1,&LCD_TIM_EX0 \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+ [THEN]
+ FREQ_KHZ @ 24000 =
+ [IF] \ if 24 MHz
+ MOV #2,&RC5_TIM_EX0 \ predivide by 3 in RC5_TIM_EX0 register
+ MOV #2,&LCD_TIM_EX0 \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+ [THEN]
+ MOV #19,&LCD_TIM_CCR0 \ 19+1=20*1us=20us
+\ ----------------------------------\
\ set LCD_TIM_.2 to generate PWM for LCD_Vo
-\ ------------------------------\
-MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
- MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
-\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
-\ ------------------------------\
- BIS.B #LCDVo,&LCDVo_DIR \
- BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
-\ ------------------------------\
- BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
- BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
-\ ------------------------------\
- BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
- BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
-\ ******************************\
-\ init RC5_Int \
-\ ******************************\
- BIS.B #RC5,&IR_IE \ enable RC5_Int
- BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
-\ ******************************\
-\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
-\ ******************************\
-\ %01 0001 0100 \ TAxCTL
-\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
-\ -- \ ID divided by 1
-\ -- \ MC MODE = up to TAxCCRn
-\ - \ TACLR clear timer count
-\ - \ TAIE
-\ - \ TAIFG
-\ ------------------------------\
-MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
-\ ------------------------------\
-\ 000 \ TAxEX0
-\ --- \ TAIDEX pre divisor
-\ ------------------------------\
-\ %0000 0000 0000 0101 \ TAxCCR0
- MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
-\ ------------------------------\
-\ %0000 0000 0001 0000 \ TAxCCTL0
-\ - \ CAP capture/compare mode = compare
-\ - \ CCIEn
-\ - \ CCIFGn
- MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
-\ ------------------------------\
-\ define LPM mode for ACCEPT \
-\ ------------------------------\
-\ MOV #LPM4+GIE,&LPM_MODE \ with MSP430FR59xx
-\ MOV #LPM2+GIE,&LPM_MODE \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\ \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
-COLON \
-\ ------------------------------\
-\ Init LCD 2x20 \
-\ ------------------------------\
- #1000 20_US \ 1- wait 20 ms
- %011 TOP_LCD \ 2- send DB5=DB4=1
- #205 20_US \ 3- wait 4,1 ms
- %011 TOP_LCD \ 4- send again DB5=DB4=1
- #5 20_US \ 5- wait 0,1 ms
- %011 TOP_LCD \ 6- send again again DB5=DB4=1
- #2 20_US \ wait 40 us = LCD cycle
- %010 TOP_LCD \ 7- send DB5=1 DB4=0
- #2 20_US \ wait 40 us = LCD cycle
- %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
- %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
- %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
- LCD_CLEAR \ 10- "LCD_Clear"
- ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
- ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
- CR ." I love you" \ display message on LCD
- ['] CR >BODY IS CR \ CR executes its default value
- ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
- ." RC5toLCD is running. Type STOP to quit" \ display message on FastForth Terminal
- ABORT" " \
-; \
-\ ------------------------------\
-
-\ ------------------------------\
-CODE START \ this routine replaces WARM and COLD default values by these of this application.
-\ ------------------------------\
-CMP #RET_ADR,&{RC5TOLCD}+8 \ init R2L once, only if MARKER_DOES is not initialized
-0= IF \ if not done, customizes MARKER_DOES
- MOV #STOP_R2L,&{RC5TOLCD}+8 \ execution of {RC5TOLCD} will perform STOP_R2L.
- MOV &WARM+2,&{RC5TOLCD}+10 \ save previous INI_APP subroutine
- MOV #INI_R2L,&WARM+2 \ replace it by RC5toLCD INI_APP
- MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+12 \ save Vector previous value
- MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
- MOV &IR_VEC,&{RC5TOLCD}+14 \ save Vector previous value
- MOV #RC5_INT,&IR_VEC \ init interrupt vector
- MOV #INI_R2L,PC \ then execute new INI_APP, without return
-THEN
-MOV @IP+,PC
-ENDCODE
-\ ------------------------------\
-
+\ ----------------------------------\
+ MOV #%0110_0000,&LCD_TIM_CCTLn \ output mode = set/reset \ clear CCIFG
+ MOV #10,&LCD_TIM_CCRn \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\ MOV #12,&LCD_TIM_CCRn \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ ----------------------------------\
+ BIS.B #LCDVo,&LCDVo_DIR \
+ BIS.B #LCDVo,&LCDVo_SEL \ SEL.2
+\ ----------------------------------\
+ BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
+ BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
+\ ----------------------------------\
+ BIS.B #LCD_DB,&LCD_DB_DIR \ as output, wired to DB(4-7) LCD_Data
+ BIC.B #LCD_DB,&LCD_DB_REN \ LCD_Data pullup/down disable
+\ ----------------------------------\
+\ init RC5_Int \
+\ ----------------------------------\
+ BIS.B #RC5,&IR_IE \ enable RC5_Int
+ BIC.B #RC5,&IR_IFG \ reset RC5_Int flag
+\ ----------------------------------\
+\ init WatchDog WDT_TIM_ \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ----------------------------------\
+\ %01 0001 0100 \ TAxCTL
+\ -- \ TASSEL CLK = ACLK = LFXT = 32768 Hz
+\ -- \ ID divided by 1
+\ -- \ MC MODE = up to TAxCCRn
+\ - \ TACLR clear timer count
+\ - \ TAIE
+\ - \ TAIFG
+\ ----------------------------------\
+ MOV #%01_0001_0100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int,
+\ ----------------------------------\
+\ 000 \ TAxEX0
+\ --- \ TAIDEX pre divisor
+\ ----------------------------------\
+\ %0000 0000 0000 0101 \ TAxCCR0
+ MOV ##3276,&WDT_TIM_CCR0 \ else init WDT_TIM_ for LFXT: 32768/20=1638 ==> 100ms
+\ ----------------------------------\
+\ %0000 0000 0001 0000 \ TAxCCTL0
+\ - \ CAP capture/compare mode = compare
+\ - \ CCIEn
+\ - \ CCIFGn
+ MOV #%10000,&WDT_TIM_CCTL0 \ enable compare interrupt, clear CCIFG0
+\ ----------------------------------\
+\ activate I/O \
+\ ----------------------------------\
+ CALL &{RC5TOLCD} \ run previous INIT_HARD_APP
+\ ----------------------------------\
+\ RESET events handling \ search "SYSRSTIV" in your MSP430FRxxxx datasheet to get listing
+\ ----------------------------------\
+ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas | USERSYS <0 = DEEP_RESET request ?
+ U>= ?GOTO BW1 \ if yes execute STOP_R2L then RET to BODY of WARM
+ THEN \
+\ CMP #2,TOS \ Power_ON event
+\ 0= ?GOTO BW1 \ uncomment if you want to loose application in this case...
+ CMP #4,TOS \ SYSRSTIV|USERSYS RST ?
+ 0= ?GOTO BW1 \ if yes run STOP.
+\ CMP #$0E,TOS \ SYSRSTIV = SVSHIFG SVSH event ?
+\ 0= ?GOTO BW1 \ SVSHIFG SVSH event performs STOP
+\ ----------------------------------\
+ LO2HI \
+\ ----------------------------------\
+\ Init LCD 2x20 \
+\ ----------------------------------\
+ #1000 20_US \ 1- wait 20 ms
+ %011 TOP_LCD \ 2- send DB5=DB4=1
+ #205 20_US \ 3- wait 4,1 ms
+ %011 TOP_LCD \ 4- send again DB5=DB4=1
+ #5 20_US \ 5- wait 0,1 ms
+ %011 TOP_LCD \ 6- send again again DB5=DB4=1
+ #2 20_US \ wait 40 us = LCD cycle
+ %010 TOP_LCD \ 7- send DB5=1 DB4=0
+ #2 20_US \ wait 40 us = LCD cycle
+ %00101000 LCD_WRF \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+ %1000 LCD_WRF \ 9- %1DCB "DisplayControl" : Display off, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ %0110 LCD_WRF \ 11- %01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
+ %1100 LCD_WRF \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off.
+ LCD_CLEAR \ 10- "LCD_Clear"
+ HI2LO \
+ MOV @RSP+,PC \ RET to WARM|START
+ ENDCODE
+\ ----------------------------------\
+
+\ ----------------------------------\
+ CODE START \ this routine replaces INT_HARD_APP default values by these of this application.
+\ ----------------------------------\
+ CMP #WDT_INT,&WDT_TIM_0_VEC \ value set by START
+ 0= IF \
+ MOV @IP+,PC \ does nothing if already initialised
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2 \ execution of {RC5TOLCD} will perform STOP_R2L.
+ KERNEL_ADDON $3C00 TSTBIT \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&UART_WARM+2 \ replace it by RC5toLCD INI_APP
+ [ELSE]
+ MOV &I2C_WARM+2,&{RC5TOLCD} \ save previous INI_APP subroutine
+ MOV #INIT_R2L,&I2C_WARM+2 \ replace it by RC5toLCD INI_APP
+ [THEN]
+ MOV &WDT_TIM_0_VEC,&{RC5TOLCD}+2 \ save Vector previous value
+ MOV #WDT_INT,&WDT_TIM_0_VEC \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+ MOV &IR_VEC,&{RC5TOLCD}+4 \ save Vector previous value
+ MOV #RC5_INT,&IR_VEC \ init interrupt vector
+\ ----------------------------------\
+\ init 20 us count loop \ see 20_US
+\ ----------------------------------\ -- TOS
+ SUB #6,PSP \ -- x x x TOS
+ MOV TOS,4(PSP) \ -- TOS x x TOS
+ MOV &FREQ_KHZ,2(PSP) \ -- TOS DVDlo x TOS
+ MOV #0,0(PSP) \ -- TOS DVDlo DVDhi TOS
+ MOV #200,TOS \ -- TOS DVDlo DVDhi DIVlo
+ CALL #MUSMOD \ -- TOS REMlo QUOTlo QUOThi
+ MOV @PSP,&{RC5TOLCD}+6 \ set count+2 for 20_US
+ ADD #4,PSP \ -- TOS QUOThi
+ MOV @PSP+,TOS \ -- TOS
+\ ----------------------------------\
+ CALL #INIT_R2L \ run new INIT_HARD_APP
+ LO2HI
+\ ['] LCD_HOME IS CR \ ' CR redirected to LCD_HOME
+\ ['] LCD_WRC IS EMIT \ ' EMIT redirected to LCD_WrC
+\ CR ." I love you" \ display message on LCD
+\ ['] CR >BODY IS CR \ CR executes its default value
+\ ['] EMIT >BODY IS EMIT \ EMIT executes its defaulte value
+ ." RC5toLCD is running," \
+ ." Type STOP to quit." \ display message on FastForth Terminal
+ HI2LO
+ MOV #ABORT,PC \ goto FORTH interpreter without WARM message.
+ ENDCODE \
+\ ----------------------------------\
+
+RST_SET
ECHO
- ; downloading RC5toLCD.4th is done
-RST_HERE ; this app is protected against <reset>
-START
+\ START
\ -*- coding: utf-8 -*-
\
\ ==============================================================================
-\ routines RTC for MSP430FRxxxx
+\ routines RTC for MSP430FR5xxx
\ your target must have a LF_XTAL 32768Hz
\ ==============================================================================
\
\
\ TARGET SELECTION ( = the name of \INC\target.pat file without the extension)
\ MSP_EXP430FR5739 MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
-\ MSP_EXP430FR4133 CHIPSTICK_FR2433 MSP_EXP430FR2433 MSP_EXP430FR2355
-\ LP_MSP430FR2476
\
\ from scite editor : copy your target selection in (shift+F8) parameter 1:
\
\
\
-CODE ABORT_RTC
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &KERNEL_ADDON,TOS
-BIT #BIT15,TOS
-0<> IF MOV #0,TOS THEN \ if TOS <> 0 (FIXPOINT input), set TOS = 0
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-$0D EMIT \ return to column 1 without CR
-ABORT" FastForth V3.8 please!"
-ABORT" target without LF_XTAL !"
-PWR_STATE \ if no abort remove this word
-;
-
-ABORT_RTC
+ CODE ABORT_RTC
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &KERNEL_ADDON,TOS
+ BIT #BIT14,TOS
+ 0<> IF MOV #0,TOS THEN \ if TOS <> 0 (FIXPOINT input), set TOS = 0
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ $0D EMIT \ return to column 1 without CR
+ ABORT" FastForth V3.9 please!"
+ ABORT" target without LF_XTAL !"
+ RST_RET \ if no abort remove this word
+ ;
+
+ ABORT_RTC
; --------------------
; RTC.f
\ use :
\ to set date, type : d m y DATE!
\ to view date, type DATE?
-\ to set time, type : h m s TIME!, or h m TIME!
+\ to set time, type : h m [s] TIME!
\ to view time, type TIME?
\
-[DEFINED] {RTC} [IF] {RTC} [THEN]
-MARKER {RTC} \ restore the state before MARKER definition
-\ {RTC}+8 = BODY+4 = RET_ADR: MARKER_DOES does a call to RET_ADR by default
-8 ALLOT \ make room for:
-\ {RTC}+10 for content of previous RTC_VEC
-\ {RTC}+12 for content of previous COLD_PFA
-\ {RTC}+14 for content of previous WARM_PFA
-\ {RTC}+16 for content of previous SLEEP_PFA
+ MARKER {RTC}
-
-[UNDEFINED] OR [IF]
\ https://forth-standard.org/standard/core/OR
\ C OR x1 x2 -- x3 logical OR
-CODE OR
-BIS @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] OR
+ [IF]
+ CODE OR
+ BIS @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] C! [IF]
\ https://forth-standard.org/standard/core/CStore
\ C! char c-addr -- store char in memory
-CODE C!
-MOV.B @PSP+,0(TOS) \ 4
-ADD #1,PSP \ 1
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
+ [UNDEFINED] C!
+ [IF]
+ CODE C!
+ MOV.B @PSP+,0(TOS) \ 4
+ ADD #1,PSP \ 1
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF] \define DUP and DUP?
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DUP
\ DUP x -- x x duplicate top of stack
-CODE DUP
+ [UNDEFINED] DUP
+ [IF] \define DUP and DUP?
+ CODE DUP
BW1 SUB #2,PSP \ 2 push old TOS..
MOV TOS,0(PSP) \ 3 ..onto stack
MOV @IP+,PC \ 4
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/qDUP
\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] DROP [IF]
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DROP
\ DROP x -- drop top of stack
-CODE DROP
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] DEPTH [IF]
\ https://forth-standard.org/standard/core/DEPTH
\ DEPTH -- +n number of items on stack, must leave 0 if stack empty
-CODE DEPTH
-MOV TOS,-2(PSP)
-MOV #PSTACK,TOS
-SUB PSP,TOS \ PSP-S0--> TOS
-RRA TOS \ TOS/2 --> TOS
-SUB #2,PSP \ post decrement stack...
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
+ [UNDEFINED] DEPTH
+ [IF]
+ CODE DEPTH
+ MOV TOS,-2(PSP)
+ MOV #PSTACK,TOS
+ SUB PSP,TOS \ PSP-S0--> TOS
+ RRA TOS \ TOS/2 --> TOS
+ SUB #2,PSP \ post decrement stack...
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS \ 3
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS \ 3
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OnePlus
\ 1+ n1/u1 -- n2/u2 add 1 to TOS
-CODE 1+
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @PSP+,TOS \ 2 u2-u1
-0<> IF
- MOV #-1,TOS \ 1
- U< IF \ 2 flag
- AND #0,TOS \ 1 flag Z = 1
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/OneMinus
+\ 1- n1/u1 -- n2/u2 subtract 1 from TOS
+ [UNDEFINED] 1-
+ [IF]
+ CODE 1-
+ SUB #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @PSP+,TOS \ 2 u2-u1
+ 0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
THEN
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] = [IF]
\ https://forth-standard.org/standard/core/Equal
\ = x1 x2 -- flag test x1=x2
-CODE =
-SUB @PSP+,TOS \ 2
-0<> IF \ 2
- AND #0,TOS \ 1
- MOV @IP+,PC \ 4
-THEN
-XOR #-1,TOS \ 1 flag Z = 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF THEN
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] IF
+ [IF] \ define IF THEN
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ELSE
\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP \ immediate
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
- MOV X,-4(W) \ xloop --> HERE
- MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP
-MOV #XPLOOP,X
-GOTO BW1 \ goto BW1 LOOP
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2 \ goto BW1 LOOP
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+ [UNDEFINED] BEGIN
+ [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+
+ CODE BEGIN
+ MOV #HEREXEC,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+ CODE UNTIL
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+ CODE AGAIN
+ MOV #BRAN,X
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] CASE [IF]
\ https://forth-standard.org/standard/core/CASE
-: CASE 0 ; IMMEDIATE \ -- #of-1
+ [UNDEFINED] CASE
+ [IF]
+ : CASE
+ 0
+ ; IMMEDIATE \ -- #of-1
\ https://forth-standard.org/standard/core/OF
-: OF \ #of-1 -- orgOF #of
-1+ \ count OFs
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE OVER POSTPONE = \ copy and test case value
-POSTPONE IF \ add orig to control flow stack
-POSTPONE DROP \ discards case value if =
-R> \ we can bring count back now
-; IMMEDIATE
+ : OF \ #of-1 -- orgOF #of
+ 1+ \ count OFs
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE OVER POSTPONE = \ copy and test case value
+ POSTPONE IF \ add orig to control flow stack
+ POSTPONE DROP \ discards case value if =
+ R> \ we can bring count back now
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/ENDOF
-: ENDOF \ orgOF #of -- orgENDOF #of
->R \ move off the stack in case the control-flow stack is the data stack.
-POSTPONE ELSE
-R> \ we can bring count back now
-; IMMEDIATE
+ : ENDOF \ orgOF #of -- orgENDOF #of
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE ELSE
+ R> \ we can bring count back now
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/ENDCASE
-: ENDCASE \ orgENDOF1..orgENDOFn #of --
-POSTPONE DROP
-0 DO
- POSTPONE THEN
-LOOP
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] + [IF]
+ : ENDCASE \ orgENDOF1..orgENDOFn #of --
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] - [IF]
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF] \define MAX and MIN
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-CODE MAX \ n1 n2 -- n3 signed maximum
+ [UNDEFINED] MAX
+ [IF] \define MAX and MIN
+ CODE MAX \ n1 n2 -- n3 signed maximum
CMP @PSP,TOS \ n2-n1
S< ?GOTO FW1 \ n2<n1
BW1 ADD #2,PSP
MOV @IP+,PC
-ENDCODE
+ ENDCODE
-CODE MIN \ n1 n2 -- n3 signed minimum
- CMP @PSP,TOS \ n2-n1
- S< ?GOTO BW1 \ n2<n1
+ CODE MIN \ n1 n2 -- n3 signed minimum
+ CMP @PSP,TOS \ n2-n1
+ S< ?GOTO BW1 \ n2<n1
FW1 MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE
+ ENDCODE
-[THEN] \ MAX
+ [THEN] \ MAX
-[UNDEFINED] 2* [IF]
\ https://forth-standard.org/standard/core/TwoTimes
\ 2* x1 -- x2 arithmetic left shift
-CODE 2*
-ADD TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 2*
+ [IF]
+ CODE 2*
+ ADD TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] UM* [IF] \ case of hardware_MPY
\ https://forth-standard.org/standard/core/UMTimes
\ UM* u1 u2 -- udlo udhi unsigned 16x16->32 mult.
-CODE UM*
+ [UNDEFINED] UM*
+ [IF] \ case of hardware_MPY
+ CODE UM*
MOV @PSP,&MPY \ Load 1st operand for unsigned multiplication
BW1 MOV TOS,&OP2 \ Load 2nd operand
MOV &RES0,0(PSP) \ low result on stack
MOV &RES1,TOS \ high result in TOS
MOV @IP+,PC
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/MTimes
\ M* n1 n2 -- dlo dhi signed 16*16->32 multiply
-CODE M*
+ CODE M*
MOV @PSP,&MPYS \ Load 1st operand for signed multiplication
GOTO BW1
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] UM/MOD [IF]
\ https://forth-standard.org/standard/core/UMDivMOD
\ UM/MOD udlo|udhi u1 -- ur uq unsigned 32/16->r16 q16
-CODE UM/MOD
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
PUSH #DROP \
MOV #MUSMOD,PC \ execute MUSMOD then return to DROP
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] U*/ [IF]
\ U*/ u1 u2 u3 -- uq u1*u2/u3
-: U*/
->R UM* R> UM/MOD SWAP DROP
-;
-[THEN]
+ : U*/
+ >R UM* R> UM/MOD SWAP DROP
+ ;
-[UNDEFINED] U/MOD [IF]
\ U/MOD u1 u2 -- ur uq unsigned division
-: U/MOD
-0 SWAP UM/MOD
-;
-[THEN]
+ : U/MOD
+ 0 SWAP UM/MOD
+ ;
-[UNDEFINED] UMOD [IF]
\ UMOD u1 u2 -- ur unsigned division
-: UMOD
-U/MOD DROP
-;
-[THEN]
+ : UMOD
+ U/MOD DROP
+ ;
-[UNDEFINED] U/ [IF]
\ https://forth-standard.org/standard/core/Div
\ U/ u1 u2 -- uq signed quotient
-: U/
-U/MOD SWAP DROP
-;
-[THEN]
+ : U/
+ U/MOD SWAP DROP
+ ;
-[UNDEFINED] SPACES [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
+ [UNDEFINED] SPACES
+ [IF]
+ : SPACES
BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #HEREXEC,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R \ u n -- display u unsigned in n width (n >= 2)
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-$81EF DEVICEID @ U< ; search device ID: MSP430FR4133 or...
-DEVICEID @ $8241 U< ; ...MSP430FR2433
-=
-$830B DEVICEID @ U< ; MSP430FR21xx/23xx/24xx/25xx/26xx
-OR ; -- flag
-
-[IF]
-
-\ ==============================================================================
-\ driver for RTC without calendar
-\ ==============================================================================
-
- CREATE RTCSEC 2 ALLOT
- CREATE RTCMIN 2 ALLOT
- CREATE RTCHOUR 2 ALLOT
- CREATE RTCDOW 2 ALLOT
- CREATE RTCDAY 2 ALLOT
- CREATE RTCMON 2 ALLOT
- CREATE RTCYEAR 2 ALLOT
-
-\ ************************************\
- HDNCODE RTC_INT \ computes sec min hour day month year
-\ ************************************\
- ADD #2,RSP \ remove previous_SR
- BIT #1,&RTCIV \ clear RTC_IFG
- ADD.B #1,&RTCSEC \ sec+1
- CMP.B #60,&RTCSEC
- U>= IF
- MOV.B #0,&RTCSEC \ sec=0
- ADD.B #1,&RTCMIN \ min+1
- CMP.B #60,&RTCMIN
- U>= IF
- MOV.B #0,&RTCMIN \ min=0
- ADD.B #1,&RTCHOUR \ hour+1
- CMP.B #24,&RTCHOUR
- U>= IF
- MOV.B #0,&RTCHOUR \ hour=0
- ADD.B #1,&RTCDOW \ dow+1
- CMP.B #7,&RTCDOW
- U>= IF
- MOV.B #0,&RTCDOW \ dow=0
- THEN
- ADD.B #1,&RTCDAY \ day+1
- CMP.B #2,&RTCMON \ February month ?
-\ ------------------------\ here we compute leap year
- 0= IF \ yes
- COLON
- RTCYEAR @ 4 UMOD
- IF 29
- ELSE
- RTCYEAR @ 100 UMOD
- IF 30
- ELSE
- RTCYEAR @ 400 UMOD
- IF 29
- ELSE 30
- THEN
- THEN
- THEN
- HI2LO
- MOV @RSP+,IP
- MOV TOS,X \ X = 29|30
- MOV @PSP+,TOS
-\ ------------------------\
- ELSE \ month other than Feb
- MOV #31,X
- MOV.B &RTCMON,W
- CMP.B #8,W
- 0>= IF \ month >= August?
- ADD.B #1,W
- THEN
- BIT.B #1,W \
- 0<> IF
- ADD #1,X \ 31 days / month
- THEN
- THEN
- CMP.B X,&RTCDAY
- U>= IF \ max day of month is exceeded
- MOV.B #1,&RTCDAY \ day=1
- ADD.B #1,&RTCMON \ mon+1
- CMP.B #13,&RTCMON
- U>= IF
- MOV.B #1,&RTCMON \ mon=1
- ADD #1,&RTCYEAR \ year+1
- THEN
- THEN
- THEN
- THEN
- THEN \
- MOV @RSP+,PC \ RET to BACKGrouND routine, with GIE disabled
- ENDCODE
-
-\ ------------------------\
- HDNCODE STOP_RTC \ define STOP_RTC as new COLD_APP subroutine, called by {RTC}|WIPE|RST|COLD|SYS_failures.
-\ ------------------------\ ------------------------------------------
- CMP #RET_ADR,&{RTC}+8 \
- 0<> IF \ and only if RTC_APP is started by START_RTC
- MOV #{RTC}+10,X \
- MOV #RET_ADR,-2(X) \ restore {RTC}+8 default value
- MOV @X+,&RTC_VEC \ restore previous RTC_VEC content from {RTC}+10
- MOV @X+,&COLD+2 \ restore previous STOP_APP from {RTC}+12 to COLD_PFA
- MOV @X+,&WARM+2 \ restore previous INI_APP from {RTC}+14 to WARM_PFA
-\ MOV @X+,&SLEEP+2 \ restore previous BACKGND_APP from {RTC}+16 to SLEEP_PFA
- THEN
-\ ------------------------\
- MOV #0,&RTCCTL \ stops RTC and RTC_INT, see RTC15 in MSP430FR2xxx errata sheet
- MOV.B #XIN,X \ X = bit_position of XT1 Xtal
- BIC.B X,&XT1_SEL \ XIN as GPIO
- BIS.B X,&XT1_DIR \ XIN as output
- BIC.B X,&XT1_OUT \ RTC15 :"toggle twice XIN ouput"
- BIS.B X,&XT1_OUT \ "with at least 2 rising or falling edges".
- BIC.B X,&XT1_OUT \
- BIS.B X,&XT1_OUT \
- BIC.B X,&XT1_DIR \ restore default state of XIN
- BIS.B X,&XT1_SEL \ XIN as XT1 input
-\ ------------------------\
- MOV &COLD+2,PC \ 5 link (branch) to the previous STOP_APP subroutine,
-\ ------------------------\ then RET to MARKER_DOES or to COLD+4
- ENDCODE \
-\ ------------------------\
-
-\ ----------------------------------------\
- HDNCODE INI_RTC \ define INI_HDWR_APP called first by START_RTC then by WARM
-\ ----------------------------------------\ ---------------------------------------------------------
- CALL &{RTC}+14 \ call previous INI_APP (which sets TOS = RSTIV_MEM)
- CMP #0,&RTCCTL \ if RTCCTL = 0 = reset state, app is STOPPED and must to be started
- 0= IF \ and if RTCCTL <> 0, we don't restart app and no time is lost.
- MOV #$7F,&RTCMOD \ RTCMOD = 127
- BIT #-1,&RTCIV \ clear RTC_IFG
- MOV #%0010_0110_0100_0010,&RTCCTL \ starts RTC with XT1CLK/256, enables RTC_INT
- THEN
- MOV @RSP+,PC \ RET to BODYWARM|START_RTC
- ENDCODE \
-\ ----------------------------------------\
-
-\\ -------------------------------------------------------------------------------
-\\ WARNING! because RTC_INT have higher priority than eUSCI used for TERMINAL,
-\\ BACKGND_APP default subroutine execute pending RTC_INT, so you can download a file without RTC time lost.
-\\ but if you manualy type a command, pending RTC_INT may not be executed during this time.
-\\ -------------------------------------------------------------------------------
-\\ --------------------\
-\\ HDNCODE BACKGND_RTC \ define BACKGND_RTC to replace actual BACKGND_APP
-\\ --------------------\
-\ BEGIN \
-\ MOV &LPM_MODE,SR \ enter to SLEEP mode, waiting RTC_INT
-\ AGAIN \ loop back to BEGIN is executed before CPU shut down
-\\ --------------------\
-\ ENDCODE \
-\\ -------------------------------------------------------------------------------
-\\ WARNING! because unlinked, this BACKGND_APP doesn't execute XON, TERMINAL is MUTEd
-\\ but maybe that is what you want: RTC time keeps its accuracy.
-\\ -------------------------------------------------------------------------------
-
-\ --------------------------------\
- CODE START_RTC \ save current content of WARM_PFA, COLD_PFA, SLEEP_PFA, RTC_VEC
-\ --------------------------------\ then replace them by INI_RTC, STOP_RTC, BACKGND_RTC, RTC_INT then execute INI_RTC.
- CMP #STOP_RTC,&{RTC}+8 \ content of {RTC}+8 = STOP_RTC ?
- 0<> IF \ if not
- MOV #STOP_RTC,&{RTC}+8 \ STOP_RTC must be executed by MARKER_DOES of {RTC}, else RTC15 hangs out!
- MOV &RTC_VEC,&{RTC}+10 \ save content of RTC_VEC to {RTC}+10...
- MOV #RTC_INT,&RTC_VEC \ then set RTC_VEC with RTC_INT
- MOV &COLD+2,&{RTC}+12 \ save content of COLD_PFA to {RTC}+12...
- MOV #STOP_RTC,&COLD+2 \ ...and replace it by STOP_RTC, else RTC15 hangs out with Deep_RST!
- MOV &WARM+2,&{RTC}+14 \ save content of WARM_PFA to {RTC}+14...
- MOV #INI_RTC,&WARM+2 \ ...and replace it by INI_RTC
-\ MOV &SLEEP+2,&{RTC}+16 \ save content of SLEEP_PFA to {RTC}+16...
-\ MOV #BACKGND_RTC,&SLEEP+2 \ ...and replace it by BACKGND_RTC
- THEN \
- CALL #INI_RTC \
- MOV @IP+,PC \
-\ --------------------------------\
- ENDCODE
-\ --------------------------------\
-
- : TIME? \ display time
- RTCHOUR C@ 2 U.R $3A EMIT
- RTCMIN C@ 2 U.R $3A EMIT
- RTCSEC C@ 2 U.R
+ ?DUP
+ WHILE
+ 'SP' EMIT
+ 1-
+ REPEAT
;
-
- : TIME! \ hour min sec ---
- START_RTC \ if not yet done, obviously!
- 2 DEPTH
- U< IF \ if 3 numbers on stack
- RTCSEC C!
- RTCMIN C!
- RTCHOUR C!
- THEN
- ." it is " TIME?
- ;
-
- : DATE? \ display date
+ [THEN]
-[ELSE]
-
-\ ==============================================================================
-\ driver RTC for RTC_B|RTC_C hardware with calendar
-\ ==============================================================================
+ [UNDEFINED] U.R
+ [IF]
+ : U.R \ u n -- display u unsigned in n width (n >= 2)
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
CODE TIME?
BEGIN
BIT.B #RTCRDY,&RTCCTL1
0<> UNTIL \ wait until RTCRDY high
COLON
- RTCHOUR C@ 2 U.R $3A EMIT
- RTCMIN C@ 2 U.R $3A EMIT
- RTCSEC C@ 2 U.R
+ RTCHOUR C@ 2 U.R ':' EMIT
+ RTCMIN C@ 2 U.R ':' EMIT
+ RTCSEC C@ 2 U.R
;
-
+
: TIME!
2 DEPTH
U< IF \ if 3 numbers on stack
RTCMIN C!
RTCHOUR C!
THEN
- ." it is " TIME?
+ ." it is " TIME?
;
CODE DATE? \ display date
0<> UNTIL \ wait until windows time RTC_ReaDY is high
COLON
-[THEN]
+\ [THEN]
\ ==============================================================================
\ end of RTC software|harware calendar
4 OF ." Wed" ENDOF
5 OF ." Thu" ENDOF
6 OF ." Fri" ENDOF
- ENDCASE
+ ENDCASE
RTCYEAR @
RTCMON C@
RTCDAY C@ \ -- year mon day
$20 EMIT
- 2 U.R $2F EMIT \ -- year mon
- 2 U.R $2F EMIT \ -- year
+ 2 U.R '/' EMIT \ -- year mon
+ 2 U.R '/' EMIT \ -- year
. \ --
-;
-
-
+ ;
-: DATE! \ year mon day --
-2 DEPTH
-U< IF \ if 3 numbers on stack
- RTCYEAR !
- RTCMON C!
- RTCDAY C!
-THEN
-RTCDAY C@
-RTCMON C@
-RTCYEAR @ \ -- day mon year
+ : DATE! \ year mon day --
+ 2 DEPTH
+ U< IF \ if 3 numbers on stack
+ RTCYEAR !
+ RTCMON C!
+ RTCDAY C!
+ THEN
+ RTCDAY C@
+ RTCMON C@
+ RTCYEAR @ \ -- day mon year
\ ------------------------------------------
\ Zeller's congruence for gregorian calendar
\ see https://www.rosettacode.org/wiki/Day_of_the_week#Forth
\ : ZELLER \ day mon year -- weekday {0=Sat, ..., 6=Fri}
-\ OVER 3 < \
-\ IF 1- SWAP 12 + SWAP
+\ OVER 3 < \
+\ IF 1- SWAP 12 + SWAP
\ THEN \ -- d m' y' with m' {3=March, ..., 14=february}
\ 100 /MOD \ -- d m' K J with K = y' in century, J = century
-\ DUP 4 / SWAP 2* - \ -- d m' K (J/4 - 2J)
-\ SWAP DUP 4 / + + \ -- d m' ((J/4 - 2J) + (K + K/4))
+\ DUP 4 / SWAP 2* - \ -- d m' K (J/4 - 2J)
+\ SWAP DUP 4 / + + \ -- d m' ((J/4 - 2J) + (K + K/4))
\ SWAP 1+ 13 5 */ + + \ -- (d + (((J/4 - 2J) + (K + K/4)) + (m+1)*13/5))
-\ 7 MOD \ -- weekday = {0=Sat, ..., 6=Fri}
+\ 7 MOD \ -- weekday = {0=Sat, ..., 6=Fri}
\ ------------------------------------------
-OVER 3 U< \
-IF 1 - SWAP 12 + SWAP
-THEN \ -- d m' y' with m' {3=March, ..., 14=february}
-100 U/MOD \ -- d m' K J with K = y' in century, J = century
-DUP 4 U/ SWAP 2* - \ -- d m' K (J/4 - 2J)
-SWAP DUP 4 U/ + + \ -- d m' ((J/4 - 2J) + (K + K/4))
-SWAP 1+ 13 5 U*/ + + \ -- (d + (((J/4 - 2J) + (K + K/4)) + (m+1)*13/5))
-7 UMOD \ -- weekday = {0=Sat, ..., 6=Fri}
+ OVER 3 U< \
+ IF 1 - SWAP 12 + SWAP
+ THEN \ -- d m' y' with m' {3=March, ..., 14=february}
+ 100 U/MOD \ -- d m' K J with K = y' in century, J = century
+ DUP 4 U/ SWAP 2* - \ -- d m' K (J/4 - 2J)
+ SWAP DUP 4 U/ + + \ -- d m' ((J/4 - 2J) + (K + K/4))
+ SWAP 1+ 13 5 U*/ + + \ -- (d + (((J/4 - 2J) + (K + K/4)) + (m+1)*13/5))
+ 7 UMOD \ -- weekday = {0=Sat, ..., 6=Fri}
\ ------------------------------------------
-RTCDOW C! \ --
-." we are on " DATE?
-;
-
-RST_HERE
-
-[UNDEFINED] S_ [IF]
-CODE S_ \ Squote alias with blank instead quote separator
-MOV #0,&CAPS \ turn CAPS OFF
-COLON
-XSQUOTE , \ compile run-time code
-$20 WORD \ -- c-addr (= HERE)
-HI2LO
-MOV.B @TOS,TOS \ -- len compile string
-ADD #1,TOS \ -- len+1
-BIT #1,TOS \ C = ~Z
-ADDC TOS,&DP \ store aligned DP
-MOV @PSP+,TOS \ --
-MOV @RSP+,IP \ pop paired with push COLON
-MOV #$20,&CAPS \ turn CAPS ON (default state)
-MOV @IP+,PC \ NEXT
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ESC [IF]
-CODE ESC
-CMP #0,&STATEADR
-0= IF MOV @IP+,PC \ interpret time usage disallowed
-THEN
-COLON
-$1B \ -- char escape
-POSTPONE LITERAL \ compile-time code : lit $1B
-POSTPONE EMIT \ compile-time code : EMIT
-POSTPONE S_ \ compile-time code : S_ <escape_sequence>
-POSTPONE TYPE \ compile-time code : TYPE
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
+ RTCDOW C! \ --
+ ." we are on " DATE?
+ ;
+
+ RST_SET
+
+ [UNDEFINED] S_
+ [IF]
+ CODE S_ \ Squote alias with blank instead quote separator
+ MOV #0,&CAPS \ turn CAPS OFF
+ COLON
+ XSQUOTE , \ compile run-time code
+ $20 WORD \ -- c-addr (= HERE)
+ HI2LO
+ MOV.B @TOS,TOS \ -- len compile string
+ ADD #1,TOS \ -- len+1
+ BIT #1,TOS \ C = ~Z
+ ADDC TOS,&DP \ store aligned DP
+ MOV @PSP+,TOS \ --
+ MOV @RSP+,IP \ pop paired with push COLON
+ MOV #$20,&CAPS \ turn CAPS ON (default state)
+ MOV @IP+,PC \ NEXT
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ESC
+ [IF]
+ CODE ESC
+ CMP #0,&STATEADR
+ 0= IF MOV @IP+,PC \ interpret time usage disallowed
+ THEN
+ COLON
+ $1B \ -- char escape
+ POSTPONE LITERAL \ compile-time code : lit $1B
+ POSTPONE EMIT \ compile-time code : EMIT
+ POSTPONE S_ \ compile-time code : S_ <escape_sequence>
+ POSTPONE TYPE \ compile-time code : TYPE
+ ; IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toBODY
\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] EXECUTE [IF] \ "
\ https://forth-standard.org/standard/core/EXECUTE
\ EXECUTE i*x xt -- j*x execute Forth word at 'xt'
-CODE EXECUTE
-PUSH TOS \ 3 push xt
-MOV @PSP+,TOS \ 2
-MOV @RSP+,PC \ 4 xt --> PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] EVALUATE [IF]
+ [UNDEFINED] EXECUTE
+ [IF] \ "
+ CODE EXECUTE
+ PUSH TOS \ 3 push xt
+ MOV @PSP+,TOS \ 2
+ MOV @RSP+,PC \ 4 xt --> PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/EVALUATE
\ EVALUATE \ i*x c-addr u -- j*x interpret string
-CODE EVALUATE
-MOV #SOURCE_LEN,X \ 2
-MOV @X+,S \ 2 S = SOURCE_LEN
-MOV @X+,T \ 2 T = SOURCE_ORG
-MOV @X+,W \ 2 W = TOIN
-PUSHM #4,IP \ 6 PUSHM IP,S,T,W
-LO2HI
-INTERPRET
-HI2LO
-MOV @RSP+,&TOIN \ 4
-MOV @RSP+,&SOURCE_ORG \ 4
-MOV @RSP+,&SOURCE_LEN \ 4
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-: SET_TIME
-ESC [8;40;80t \ set terminal display 42L * 80C
-39 0 DO CR LOOP \ to avoid erasing any line of source, create 42 empty lines
-ESC [H \ then set cursor home
-CR ." DATE (DMY): "
-PAD_ORG DUP PAD_LEN
-['] ACCEPT >BODY \ find default part of deferred ACCEPT (terminal input)
-EXECUTE \ wait human input for D M Y
-EVALUATE \ interpret this input
-CR DATE! \ set date
-CR ." TIME (HMS): "
-PAD_ORG DUP PAD_LEN
-['] ACCEPT >BODY \ find default part of deferred ACCEPT (terminal input)
-EXECUTE \ wait human input for H M S
-EVALUATE \ interpret this input
-CR TIME! \ set time
-RST_STATE \ remove code beyond RST_HERE
-;
-
+ [UNDEFINED] EVALUATE
+ [IF]
+ CODE EVALUATE
+ MOV #SOURCE_LEN,X \ 2
+ MOV @X+,S \ 2 S = SOURCE_LEN
+ MOV @X+,T \ 2 T = SOURCE_ORG
+ MOV @X+,W \ 2 W = TOIN
+ PUSHM #4,IP \ 6 PUSHM IP,S,T,W
+ LO2HI
+ [ ' \ 8 + , ] \ compile INTERPRET = BACKSLASH + 8
+ HI2LO
+ MOV @RSP+,&TOIN \ 4
+ MOV @RSP+,&SOURCE_ORG \ 4
+ MOV @RSP+,&SOURCE_LEN \ 4
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+
+\ DEFER CR \ DEFERed definition, by default executes that of :NONAME
+ CODE CR \ create a DEFER definition of CR
+ MOV #NEXT_ADR,PC
+ ENDCODE
+
+ :NONAME \ starts at BODY address of DEFERed CR
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR \ CR executes :NONAME by default
+ [THEN]
+
+ : SET_TIME
+ ESC [8;40;80t \ set terminal display 42L * 80C
+ 39 0 DO CR LOOP \ to avoid erasing any line of source, create 42 empty lines
+ ESC [H \ then set cursor home
+ CR ." DATE (DMY): "
+ PAD_ORG DUP PAD_LEN
+ ['] ACCEPT >BODY \ find default part of deferred ACCEPT (terminal input)
+ EXECUTE \ wait human input for D M Y
+ EVALUATE \ interpret this input
+ CR DATE! \ set date
+ CR ." TIME (HMS): "
+ PAD_ORG DUP PAD_LEN
+ ['] ACCEPT >BODY \ find default part of deferred ACCEPT (terminal input)
+ EXECUTE \ wait human input for H M S
+ EVALUATE \ interpret this input
+ CR TIME! \ set time
+ RST_RET \ remove code beyond RST_HERE
+ ;
+
ECHO
SET_TIME
--- /dev/null
+
+; --------
+; BOOT.4th for MSP_EXP430FR5994
+; --------
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ SUB #1,R14
+ SUBC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] EXECUTE
+ [IF]
+ CODE EXECUTE
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R1+,R0
+ ENDCODE
+ [THEN]
+
+ $04 =
+ [IF]
+ RST_RET
+ NOECHO LOAD" SD_TEST.4TH"
+ [ELSE]
+ ' SYS $0A + EXECUTE
+ [THEN]
--- /dev/null
+
+ CODE I2CTERM_ABORT
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$180E,R14
+ BIT #$3C00,R14
+ 0<> IF MOV #0,R14 THEN
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ABORT" <-- Ouch! unexpected I2C_FastForth target!"
+ RST_RET
+ ;
+
+I2CTERM_ABORT
+
+; ------------
+; CHNGBAUD.4th for MSP_EXP430FR5994
+; ------------
+
+ [UNDEFINED] DUP [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DROP [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CR [IF]
+ DEFER CR
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] 1+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U/ [IF]
+ CODE U/
+ SUB #2,R15
+ MOV #0,0(R15)
+ CALL #$403E
+ MOV @R15,R14
+ ADD #4,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R> [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] = [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ ELSE
+ XOR #-1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] < [IF]
+ CODE <
+ SUB @R15+,R14
+ S< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE >
+ SUB @R15+,R14
+ S< ?GOTO BW1
+FW1 AND #0,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] CASE [IF]
+ : CASE 0 ; IMMEDIATE
+
+
+ : OF
+ 1+
+ >R
+ POSTPONE OVER POSTPONE =
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
+
+ : ENDOF
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
+
+ : ENDCASE
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] S_ [IF]
+ CODE S_
+ MOV #0,&$1DC0
+ COLON
+ $401E ,
+ $20 WORD
+ HI2LO
+ MOV.B @R14,R14
+ ADD #1,R14
+ BIT #1,R14
+ ADDC R14,&$1DC8
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV #$20,&$1DC0
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ESC [IF]
+ CODE ESC
+ CMP #0,&$1DBC
+ 0= IF MOV @R13+,R0
+ THEN
+ COLON
+ $1B
+ POSTPONE LITERAL
+ POSTPONE EMIT
+ POSTPONE S_
+ POSTPONE TYPE
+ ; IMMEDIATE
+ [THEN]
+
+ : BAD_MHz
+ $20 DUP EMIT
+ ABORT" only for 1,4,8,16,24 MHz MCLK!"
+ ;
+
+ : OVR_BAUDS
+ $20 DUP EMIT ESC [7m
+ ." with MCLK = " $1800 @ 1000 U/ .
+ ABORT" MHz? don't dream!"
+ ;
+
+ : CHNGBAUD
+ RST_RET
+ ECHO
+ ESC [8;42;80t
+ 41 0 DO CR LOOP
+ ESC [H
+
+ $1800 @ DUP >R
+ ." target MCLK = " 1000 U/ . ." MHz" CR
+ ." choose your baudrate:" CR
+ ." 0 --> 6 MBds" CR
+ ." 1 --> 5 MBds" CR
+ ." 2 --> 4 MBds" CR
+ ." 3 --> 3 MBds" CR
+ ." 4 --> 1843200 Bds" CR
+ ." 5 --> 921600 Bds" CR
+ ." 6 --> 460800 Bds" CR
+ ." 7 --> 230400 Bds" CR
+ ." 8 --> 115200 Bds" CR
+ ." 9 --> 38400 Bds" CR
+ ." A --> 19200 Bds" CR
+ ." B --> 9600 Bds" CR
+ ." other --> abort" CR
+ ." your choice: "
+ KEY
+ CASE
+ #48 OF ." 6 MBds"
+ R> CASE
+ #24000 OF $4 $0
+ ENDOF
+ 24000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #49 OF ." 5 MBds"
+ R> CASE
+ #24000 OF $4 $EE00 ENDOF
+ #20000 OF $4 $0 ENDOF
+ 20000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #50 OF ." 4 MBds"
+ R> CASE
+ #24000 OF $6 $0 ENDOF
+ #20000 OF $5 $0 ENDOF
+ #16000 OF $4 $0 ENDOF
+ 16000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #51 OF ." 3 MBds"
+ R> CASE
+ #24000 OF $8 $0 ENDOF
+ #20000 OF $6 $D600 ENDOF
+ #16000 OF $5 $4900 ENDOF
+ #12000 OF $4 $0 ENDOF
+ 12000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #52 OF ." 1843200 Bds"
+ R> CASE
+ #24000 OF $0D $0200 ENDOF
+ #20000 OF $0A $DF00 ENDOF
+ #16000 OF $8 $D600 ENDOF
+ #12000 OF $6 $AA00 ENDOF
+ #8000 OF $5 $9200 ENDOF
+ 8000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #53 OF ." 921600 Bds"
+ R> CASE
+ #24000 OF $1 $00A1 ENDOF
+ #20000 OF $1 $B751 ENDOF
+ #16000 OF $11 $4A00 ENDOF
+ #12000 OF $0D $0200 ENDOF
+ #8000 OF $8 $D600 ENDOF
+ #4000 OF $4 $4900 ENDOF
+ 4000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #54 OF ." 460800 Bds"
+ R> CASE
+ #24000 OF $3 $0241 ENDOF
+ #20000 OF $2 $92B1 ENDOF
+ #16000 OF $2 $BB21 ENDOF
+ #12000 OF $1 $00A1 ENDOF
+ #8000 OF $11 $4A00 ENDOF
+ #4000 OF $8 $D600 ENDOF
+ #2000 OF $4 $4900 ENDOF
+ 2000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #55 OF ." 230400 Bds"
+ R> CASE
+ #24000 OF $6 $2081 ENDOF
+ #20000 OF $5 $EE61 ENDOF
+ #16000 OF $4 $5551 ENDOF
+ #12000 OF $3 $0241 ENDOF
+ #8000 OF $2 $BB21 ENDOF
+ #4000 OF $11 $4A00 ENDOF
+ #2000 OF $8 $D600 ENDOF
+ #1000 OF $4 $4900 ENDOF
+ 1000 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #56 OF ." 115200 Bds"
+ R> CASE
+ #24000 OF $0D $4901 ENDOF
+ #20000 OF $0A $AD01 ENDOF
+ #16000 OF $8 $F7A1 ENDOF
+ #12000 OF $6 $2081 ENDOF
+ #8000 OF $4 $5551 ENDOF
+ #4000 OF $2 $BB21 ENDOF
+ #2000 OF $11 $4A00 ENDOF
+ #1000 OF $8 $D600 ENDOF
+ #500 OF $4 $4900 ENDOF
+ 500 <
+ IF OVR_BAUDS
+ THEN BAD_MHz
+ ENDCASE
+ ENDOF
+ #57 OF ." 38400 Bds"
+ R> CASE
+ #24000 OF $27 $0011 ENDOF
+ #16000 OF $1A $D601 ENDOF
+ #8000 OF $0D $4901 ENDOF
+ #4000 OF $6 $2081 ENDOF
+ #1000 OF $1 $00A1 ENDOF
+ BAD_MHz
+ ENDCASE
+ ENDOF
+ #65 OF ." 19200 Bds"
+ R> CASE
+ #24000 OF $4E $0021 ENDOF
+ #16000 OF $34 $4911 ENDOF
+ #8000 OF $1A $D601 ENDOF
+ #4000 OF $0D $4901 ENDOF
+ #1000 OF $3 $0241 ENDOF
+ BAD_MHz
+ ENDCASE
+ ENDOF
+ #66 OF ." 9600 Bds"
+ R> CASE
+ #24000 OF $9C $0041 ENDOF
+ #16000 OF $68 $D621 ENDOF
+ #8000 OF $34 $4911 ENDOF
+ #4000 OF $1A $D601 ENDOF
+ #1000 OF $6 $2081 ENDOF
+ BAD_MHz
+ ENDCASE
+ ENDOF
+ ." abort" ABORT" "
+ ENDCASE
+ $1804 !
+ $1802 !
+ CR ESC [7m
+ ." Change baudrate in Teraterm, save its setup, then reset target."
+ ;
+
+ CHNGBAUD
--- /dev/null
+
+ CODE ABORT_CORDIC
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$180E,R14
+ BIT #$100,R14
+ 0<> IF MOV #0,R14 THEN
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ABORT" build FastForth with FIXPOINT_INPUT addon"
+ RST_RET
+ ;
+
+ ABORT_CORDIC
+
+; ----------
+; CORDIC.4th for MSP_EXP430FR5994
+; ----------
+
+MARKER {CORDIC}
+
+ CREATE T_ARCTAN
+ 12870 ,
+ 7598 ,
+ 4014 ,
+ 2038 ,
+ 1023 ,
+ 512 ,
+ 256 ,
+ 128 ,
+ 64 ,
+ 32 ,
+ 16 ,
+ 8 ,
+ 4 ,
+ 2 ,
+ 1 ,
+
+ CREATE T_SCALE
+ 46340 ,
+ 41448 ,
+ 40211 ,
+ 39900 ,
+ 39822 ,
+ 39803 ,
+ 39798 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+ 39797 ,
+
+ [UNDEFINED] DABS
+ [IF]
+ CODE DABS
+ AND #-1,R14
+ S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ RST_SET
+
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ $180E 1 TSTBIT
+
+ RST_RET
+
+ [IF] ; MSP430FRxxxx with hardware_MPY
+
+ [UNDEFINED] HOLDS
+ [IF]
+ CODE HOLDS
+ MOV @R15+,R9
+BW3 ADD R14,R9
+ MOV &$1DB2,R8
+ BEGIN
+ SUB #1,R9
+ SUB #1,R14
+ U>= WHILE
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ REPEAT
+ MOV R8,&$1DB2
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] F#S
+ [IF]
+ CODE F#S
+ MOV 2(R15),R9
+ MOV @R15,2(R15)
+ MOV R9,0(R15)
+ MOV R14,R11
+ MOV #0,R12
+ BEGIN MOV @R15,&$4C0
+ MOV &$1DBE,&$4C8
+ MOV &$4E4,0(R15)
+ MOV &$4E6,R14
+ CMP #10,R14
+ U>= IF ADD #7,R14
+ THEN ADD #$30,R14
+ MOV.B R14,$1D90(R12)
+ ADD #1,R12
+ CMP R11,R12
+ 0= UNTIL MOV R11,R14
+ MOV #0,0(R15)
+ MOV #$1D90,R9
+ GOTO BW3
+ ENDCODE
+ [THEN]
+
+ HDNCODE XSCALE
+ MOV T_SCALE(R10),&$4D4
+ MOV #0,&$4D6
+ MOV R9,&$4C8
+ MOV &$4E6,R9
+ MOV @R1+,R0
+ ENDCODE
+
+ [ELSE] ; no hardware multiplier
+
+ [UNDEFINED] HOLDS
+ [IF]
+ CODE HOLDS
+ MOV @R15+,R9
+BW3 ADD R14,R9
+ MOV &$1DB2,R8
+ BEGIN
+ SUB #1,R9
+ SUB #1,R14
+ U>= WHILE
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ REPEAT
+ MOV R8,&$1DB2
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] F#S
+ [IF]
+ CODE F#S
+ MOV @R15,R12
+ MOV #0,R11
+ PUSHM #3,R13
+ MOV 2(R15),0(R15)
+ MOV R14,2(R15)
+ BEGIN MOV &$1DBE,R14
+ LO2HI
+ UM*
+ HI2LO
+ CMP #10,R14
+ U>= IF ADD #7,R14
+ THEN ADD #$30,R14
+ MOV @R1,R11
+ MOV.B R14,$1D90(R11)
+ ADD #1,R11
+ MOV R11,0(R1)
+ CMP 2(R15),R11
+ U>= UNTIL POPM #3,R13
+ MOV R11,R14
+ MOV R12,2(R15)
+ MOV #0,0(R15)
+ MOV #$1D90,R9
+ GOTO BW3
+ ENDCODE
+ [THEN]
+
+ HDNCODE XSCALE
+ MOV T_SCALE(R10),R6
+ UMSTAR1 MOV #0,R8
+ MOV #0,R12
+ MOV #0,R11
+ MOV #1,R10
+ BEGIN BIT R10,R6
+ 0<> IF ADD R9,R12
+ ADDC R8,R11
+ THEN ADD R9,R9
+ ADDC R8,R8
+ ADD R10,R10
+ U>= UNTIL
+ MOV R11,R9
+ MOV #$40C4,R6
+ MOV @R1+,R0
+ ENDCODE
+
+ [THEN] ; endcase of hardware multiplier
+
+ CODE POL2REC
+ PUSH R13
+ MOV @R15+,&$4D0
+ MOV R14,&$4D2
+ MOV #286,&$4C8
+ MOV &$4E4,R8
+ MOV &$4E6,R14
+ MOV #-1,R13
+ MOV @R15,R9
+ MOV #0,R8
+ BEGIN
+ ADD #1,R13
+ MOV R9,R12
+ MOV R8,R11
+ MOV #0,R10
+ GOTO FW1
+ BEGIN
+ RRA R12
+ RRA R11
+ ADD #1,R10
+FW1 CMP R13,R10
+ 0= UNTIL
+ ADD R10,R10
+ CMP #0,R14
+ 0>= IF
+ SUB R11,R9
+ ADD R12,R8
+ SUB T_ARCTAN(R10),R14
+ ELSE
+ ADD R11,R9
+ SUB R12,R8
+ ADD T_ARCTAN(R10),R14
+ THEN
+ CMP #0,R14
+ 0<> WHILE
+ CMP #14,R13
+ 0= UNTIL
+ THEN
+ CALL #XSCALE
+ MOV R9,0(R15)
+ MOV R8,R9
+ CALL #XSCALE
+ MOV R9,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+
+
+ CODE REC2POL
+ MOV @R15,R9
+ MOV R14,R8
+ MOV R8,R11
+ CMP #0,R11
+ S< IF
+ XOR #-1,R11
+ ADD #1,R11
+ THEN
+ MOV R9,R12
+ CMP #0,R12
+ S< IF
+ XOR #-1,R12
+ ADD #1,R12
+ THEN
+ MOV #-1,R14
+ CMP #0,R9
+ 0= IF
+ CMP #0,R8
+ 0= IF
+ LO2HI
+ ABORT" null inputs!"
+ HI2LO
+ THEN
+ THEN
+ CMP R12,R11
+ U< IF
+ MOV R12,R11
+ THEN
+ CMP #16384,R11
+ U>= IF
+ LO2HI
+ ABORT" |x| or |y| >= 16384"
+ HI2LO
+ THEN
+ MOV #1,R12
+ RLAM #3,R11
+ GOTO FW1
+ BEGIN
+ ADD R9,R9
+ ADD R8,R8
+ ADD R12,R12
+ ADD R11,R11
+FW1
+ U>= UNTIL
+ PUSHM #2,R13
+ MOV #-1,R13
+ MOV #0,R14
+ BEGIN
+ ADD #1,R13
+ MOV R9,R12
+ MOV R8,R11
+ MOV #0,R10
+ GOTO FW1
+ BEGIN
+ RRA R12
+ RRA R11
+ ADD #1,R10
+FW1 CMP R13,R10
+ 0= UNTIL
+ ADD R10,R10
+ CMP #0,R8
+ S>= IF
+ ADD R11,R9
+ SUB R12,R8
+ ADD T_ARCTAN(R10),R14
+ ELSE
+ SUB R11,R9
+ ADD R12,R8
+ SUB T_ARCTAN(R10),R14
+ THEN
+ CMP #0,R8
+ 0<> WHILE
+ CMP #14,R13
+ 0= UNTIL
+ THEN
+ CALL #XSCALE
+ POPM #2,R13
+ GOTO FW1
+ BEGIN
+ RRA R9
+FW1 RRA R12
+ U>= UNTIL
+ MOV R9,0(R15)
+ SUB #4,R15
+ MOV R14,R6
+ CMP #0,R6
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ MOV #0,2(R15)
+ MOV R14,0(R15)
+ MOV #286,R14
+ CALL #$403E
+ MOV @R15+,0(R15)
+ CMP #0,R6
+ S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+ THEN
+ MOV #$40C4,R6
+ MOV @R13+,R0
+ ENDCODE
+
+
+ [UNDEFINED] F.
+ [IF]
+ CODE F.
+ MOV R14,R12
+ MOV #4,R11
+ MOV &$1DBE,R10
+ CMP ##10,R10
+ 0= IF
+ ADD #1,R11
+ ELSE
+ CMP #%10,R10
+ 0= IF
+ MOV #16,R11
+ THEN
+ THEN
+ PUSHM #3,R13
+ LO2HI
+ <# DABS
+ R> F#S
+ $2C HOLD
+ #S
+ R> SIGN #>
+ TYPE $20 EMIT
+ ;
+
+ [THEN]
+
+RST_SET
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV 2(R15),R14
+ MOV R10,2(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ECHO
+
+10000 89,0 POL2REC . . ; sin, cos -->
+10000 75,0 POL2REC . . ; sin, cos -->
+10000 60,0 POL2REC . . ; sin, cos -->
+10000 45,0 POL2REC . . ; sin, cos -->
+10000 30,0 POL2REC . . ; sin, cos -->
+10000 15,0 POL2REC . . ; sin, cos -->
+10000 1,0 POL2REC . . ; sin, cos -->
+16384 30,0 POL2REC SWAP . . ; x, y -->
+16384 45,0 POL2REC SWAP . . ; x, y -->
+16384 60,0 POL2REC SWAP . . ; x, y -->
+
+10000 -89,0 POL2REC . . ; sin, cos -->
+10000 -75,0 POL2REC . . ; sin, cos -->
+10000 -60,0 POL2REC . . ; sin, cos -->
+10000 -45,0 POL2REC . . ; sin, cos -->
+10000 -30,0 POL2REC . . ; sin, cos -->
+10000 -15,0 POL2REC . . ; sin, cos -->
+10000 -1,0 POL2REC . . ; sin, cos -->
+16384 -30,0 POL2REC SWAP . . ; x, y -->
+16384 -45,0 POL2REC SWAP . . ; x, y -->
+16384 -60,0 POL2REC SWAP . . ; x, y -->
+
+-10000 89,0 POL2REC . . ; sin, cos -->
+-10000 75,0 POL2REC . . ; sin, cos -->
+-10000 60,0 POL2REC . . ; sin, cos -->
+-10000 45,0 POL2REC . . ; sin, cos -->
+-10000 30,0 POL2REC . . ; sin, cos -->
+-10000 15,0 POL2REC . . ; sin, cos -->
+-10000 1,0 POL2REC . . ; sin, cos -->
+-16384 30,0 POL2REC SWAP . . ; x, y -->
+-16384 45,0 POL2REC SWAP . . ; x, y -->
+-16384 60,0 POL2REC SWAP . . ; x, y -->
+
+-10000 -89,0 POL2REC . . ; sin, cos -->
+-10000 -75,0 POL2REC . . ; sin, cos -->
+-10000 -60,0 POL2REC . . ; sin, cos -->
+-10000 -45,0 POL2REC . . ; sin, cos -->
+-10000 -30,0 POL2REC . . ; sin, cos -->
+-10000 -15,0 POL2REC . . ; sin, cos -->
+-10000 -1,0 POL2REC . . ; sin, cos -->
+-16384 -30,0 POL2REC SWAP . . ; x, y -->
+-16384 -45,0 POL2REC SWAP . . ; x, y -->
+-16384 -60,0 POL2REC SWAP . . ; x, y -->
+
+
+2 1 REC2POL F. . ; phase module -->
+2 -1 REC2POL F. . ; phase module -->
+20 10 REC2POL F. . ; phase module -->
+20 -10 REC2POL F. . ; phase module -->
+200 100 REC2POL F. . ; phase module -->
+100 -100 REC2POL F. . ; phase module -->
+2000 1000 REC2POL F. . ; phase module -->
+1000 -1000 REC2POL F. . ; phase module -->
+16000 8000 REC2POL F. . ; phase module -->
+16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
+
+-2 1 REC2POL F. . ; phase module -->
+-2 -1 REC2POL F. . ; phase module -->
+-20 10 REC2POL F. . ; phase module -->
+-20 -10 REC2POL F. . ; phase module -->
+-200 100 REC2POL F. . ; phase module -->
+-100 -100 REC2POL F. . ; phase module -->
+-2000 1000 REC2POL F. . ; phase module -->
+-1000 -1000 REC2POL F. . ; phase module -->
+-16000 8000 REC2POL F. . ; phase module -->
+-16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
+
+10000 89,0 POL2REC REC2POL ROT . F.
+10000 75,0 POL2REC REC2POL ROT . F.
+10000 60,0 POL2REC REC2POL ROT . F.
+10000 45,0 POL2REC REC2POL ROT . F.
+10000 30,0 POL2REC REC2POL ROT . F.
+10000 26,565 POL2REC REC2POL ROT . F.
+10000 15,0 POL2REC REC2POL ROT . F.
+10000 14,036 POL2REC REC2POL ROT . F.
+10000 7,125 POL2REC REC2POL ROT . F.
+10000 1,0 POL2REC REC2POL ROT . F.
+
+
-PWR_STATE
+\ ; -------------------------------------
+\ ; CORETEST.4TH for any FastForth target
+\ ; -------------------------------------
-: COMPNOTFOUND
-$0D EMIT \ return to column 1
-1 ABORT" {CORE_ANS} word set not found!"
+MARKER {CORETEST}
+
+: ABORT_TEST \ flag --
+$0D EMIT \ return to column 1
+POSTPONE {CORETEST} \ remove all test words
+ABORT" {CORE_ANS} word set not found !"
;
-[DEFINED] {CORE_ANS} [IF]
+[UNDEFINED] {CORE_ANS} ABORT_TEST
: CORETESTSUCCESS
-$0A BASE !
-$0D EMIT \ return to column 1
-1 ABORT" CORE tests success!"
+$0D EMIT \ -- $0D return to column 1
+$0A BASE ! \ set decimal
+{CORETEST} \ remove all test words
+." CORETEST + COREPLUSTEST success!" \ true --
;
+[UNDEFINED] SM/REM [IF]
+CODE SM/REM
+MOV R14,R12
+MOV @R15,R11
+CMP #0,R14
+S< IF
+ XOR #-1,R14
+ ADD #1,R14
+THEN
+CMP #0,0(R15)
+S< IF
+ XOR #-1,2(R15)
+ XOR #-1,0(R15)
+ ADD #1,2(R15)
+ ADDC #0,0(R15)
+THEN
+PUSHM #3,R13
+LO2HI
+ UM/MOD
+HI2LO
+POPM #3,R13
+CMP #0,R11
+S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+THEN
+XOR R12,R11
+CMP #0,R11
+S< IF
+ XOR #-1,R14
+ ADD #1,R14
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] FM/MOD [IF]
+\ https://forth-standard.org/standard/core/FMDivMOD
+\ FM/MOD d1 n1 -- r q floored signed div'n
+: FM/MOD
+SM/REM
+HI2LO \ -- remainder quotient S=divisor
+CMP #0,0(R15) \ remainder <> 0 ?
+0<> IF
+ CMP #1,R14 \ quotient < 1 ?
+ S< IF
+ ADD R12,0(R15) \ add divisor to remainder
+ SUB #1,R14 \ decrement quotient
+ THEN
+THEN
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
\ From: John Hayes S1I
\ Subject: tester.fr
\ Date: Mon, 27 Nov 95 13:10:09 PST
T{ 1STA 1+ -> 2NDA }T \ ... BY ONE ADDRESS UNIT
( MISSING TEST: NEGATIVE ALLOT )
+\ Added by GWJ so that ALIGN can be used before , (comma) is tested
+1 ALIGNED CONSTANT ALMNT \ -- 1|2|4|8 for 8|16|32|64 bit alignment
+ALIGN
+T{ HERE 1 ALLOT ALIGN HERE SWAP - ALMNT = -> <TRUE> }T
+\ End of extra test
+
HERE 1 ,
HERE 2 ,
CONSTANT 2ND
T{ 0 0 GN' 0' >NUMBER -> 0 0 GN-CONSUMED }T
T{ 0 0 GN' 1' >NUMBER -> 1 0 GN-CONSUMED }T
T{ 1 0 GN' 1' >NUMBER -> BASE @ 1+ 0 GN-CONSUMED }T
-T{ 0 0 GN' -' >NUMBER -> 0 0 GN-STRING }T \ SHOULD FAIL TO CONVERT THESE
+\ FOLLOWING SHOULD FAIL TO CONVERT
+T{ 0 0 GN' -' >NUMBER -> 0 0 GN-STRING }T
T{ 0 0 GN' +' >NUMBER -> 0 0 GN-STRING }T
T{ 0 0 GN' .' >NUMBER -> 0 0 GN-STRING }T
T{ 0 0 GN' G' MAX-BASE >NUMBER-BASED -> 10 0 GN-CONSUMED }T
T{ 0 0 GN' Z' MAX-BASE >NUMBER-BASED -> 23 0 GN-CONSUMED }T
-: GN1 \ ( UD BASE -- UD' LEN ) UD SHOULD EQUAL UD' AND LEN SHOULD BE ZERO.
+: GN1 \ ( UD BASE -- UD' LEN )
+\ UD SHOULD EQUAL UD' AND LEN SHOULD BE ZERO.
BASE @ >R BASE !
<# #S #>
0 0 2SWAP >NUMBER SWAP DROP \ RETURN LENGTH ONLY
: ACCEPT-TEST
CR ." PLEASE TYPE UP TO 80 CHARACTERS: "
ABUF 80 \ ACCEPT \ JMT
-['] ACCEPT DUP @ $4030 = \ JMT: if CFA content = $4030 (MOV @PC+,PC), ACCEPT is deferred
-IF >BODY \ JMT: find default part of deferred ACCEPT
-THEN EXECUTE \ JMT: execute ACCEPT
+ ['] ACCEPT >BODY \ JMT: find default part of deferred ACCEPT
+ EXECUTE \ JMT: execute ACCEPT
CR ." RECEIVED: " [CHAR] " EMIT
ABUF SWAP TYPE [CHAR] " EMIT CR
;
T{ GDX -> 123 234 }T
-CR .( End of Core word set tests)
-
-CORETESTSUCCESS
+CR .( End of Core word set tests) \ "
+
+\ =============================================================================
+\ COREPLUSTEST
+\ =============================================================================
+\ Additional tests on the the ANS Forth Core word set
+\ -----------------------------------------------------------------------------
+\ https://raw.githubusercontent.com/gerryjackson/forth2012-test-suite/master/src/coreplustest.fth
+
+\ This program was written by Gerry Jackson in 2007, with contributions from
+\ others where indicated, and is in the public domain - it can be distributed
+\ and/or modified in any way but please retain this notice.
+
+\ This program is distributed in the hope that it will be useful,
+\ but WITHOUT ANY WARRANTY; without even the implied warranty of
+\ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+\ The tests are not claimed to be comprehensive or correct
+
+\ -----------------------------------------------------------------------------
+\ The tests are based on John Hayes test program for the core word set
+\
+\ This file provides some more tests on Core words where the original Hayes
+\ tests are thought to be incomplete
+\
+\ Words tested in this file are:
+\ DO I +LOOP RECURSE ELSE >IN IMMEDIATE FIND IF...BEGIN...REPEAT ALLOT DOES>
+\ and
+\ Parsing behaviour
+\ Number prefixes # $ % and 'A' character input
+\ Definition names
+\ -----------------------------------------------------------------------------
+\ Assumptions and dependencies:
+\ - tester.fr or ttester.fs has been loaded prior to this file
+\ - core.fr has been loaded so that constants <TRUE> MAX-INT, MIN-INT and
+\ MAX-UINT are defined
+\ -----------------------------------------------------------------------------
+
+DECIMAL
+
+TESTING DO +LOOP with run-time increment, negative increment, infinite loop
+\ Contributed by Reinhold Straub
+
+VARIABLE ITERATIONS
+VARIABLE INCREMENT
+: GD7 ( LIMIT START INCREMENT -- )
+ INCREMENT !
+ 0 ITERATIONS !
+ DO
+ 1 ITERATIONS +!
+ I
+ ITERATIONS @ 6 = IF LEAVE THEN
+ INCREMENT @
+ +LOOP ITERATIONS @
+;
-[ELSE] COMPNOTFOUND ; download CORE_ANS.f before CORETEST.4TH
+T{ 4 4 -1 GD7 -> 4 1 }T
+T{ 1 4 -1 GD7 -> 4 3 2 1 4 }T
+T{ 4 1 -1 GD7 -> 1 0 -1 -2 -3 -4 6 }T
+T{ 4 1 0 GD7 -> 1 1 1 1 1 1 6 }T
+T{ 0 0 0 GD7 -> 0 0 0 0 0 0 6 }T
+T{ 1 4 0 GD7 -> 4 4 4 4 4 4 6 }T
+T{ 1 4 1 GD7 -> 4 5 6 7 8 9 6 }T
+T{ 4 1 1 GD7 -> 1 2 3 3 }T
+T{ 4 4 1 GD7 -> 4 5 6 7 8 9 6 }T
+T{ 2 -1 -1 GD7 -> -1 -2 -3 -4 -5 -6 6 }T
+T{ -1 2 -1 GD7 -> 2 1 0 -1 4 }T
+T{ 2 -1 0 GD7 -> -1 -1 -1 -1 -1 -1 6 }T
+T{ -1 2 0 GD7 -> 2 2 2 2 2 2 6 }T
+T{ -1 2 1 GD7 -> 2 3 4 5 6 7 6 }T
+T{ 2 -1 1 GD7 -> -1 0 1 3 }T
+T{ -20 30 -10 GD7 -> 30 20 10 0 -10 -20 6 }T
+T{ -20 31 -10 GD7 -> 31 21 11 1 -9 -19 6 }T
+T{ -20 29 -10 GD7 -> 29 19 9 -1 -11 5 }T
+
+\ -----------------------------------------------------------------------------
+TESTING DO +LOOP with large and small increments
+
+\ Contributed by Andrew Haley
+
+MAX-UINT 8 RSHIFT 1+ CONSTANT USTEP
+USTEP NEGATE CONSTANT -USTEP
+MAX-INT 7 RSHIFT 1+ CONSTANT STEP
+STEP NEGATE CONSTANT -STEP
+
+VARIABLE BUMP
+
+T{ : GD8 BUMP ! DO 1+ BUMP @ +LOOP ; -> }T
+
+T{ 0 MAX-UINT 0 USTEP GD8 -> 256 }T
+T{ 0 0 MAX-UINT -USTEP GD8 -> 256 }T
+
+T{ 0 MAX-INT MIN-INT STEP GD8 -> 256 }T
+T{ 0 MIN-INT MAX-INT -STEP GD8 -> 256 }T
+
+\ Two's complement arithmetic, wraps around modulo wordsize
+\ Only tested if the Forth system does wrap around, use of conditional
+\ compilation deliberately avoided
+
+MAX-INT 1+ MIN-INT = CONSTANT +WRAP?
+MIN-INT 1- MAX-INT = CONSTANT -WRAP?
+MAX-UINT 1+ 0= CONSTANT +UWRAP?
+0 1- MAX-UINT = CONSTANT -UWRAP?
+
+: GD9 ( n limit start step f result -- )
+ >R IF GD8 ELSE 2DROP 2DROP R@ THEN -> R> }T
+;
-[THEN]
+T{ 0 0 0 USTEP +UWRAP? 256 GD9
+T{ 0 0 0 -USTEP -UWRAP? 1 GD9
+T{ 0 MIN-INT MAX-INT STEP +WRAP? 1 GD9
+T{ 0 MAX-INT MIN-INT -STEP -WRAP? 1 GD9
+
+\ -----------------------------------------------------------------------------
+TESTING DO +LOOP with maximum and minimum increments
+
+: (-MI) MAX-INT DUP NEGATE + 0= IF MAX-INT NEGATE ELSE -32767 THEN ;
+(-MI) CONSTANT -MAX-INT
+
+T{ 0 1 0 MAX-INT GD8 -> 1 }T
+T{ 0 -MAX-INT NEGATE -MAX-INT OVER GD8 -> 2 }T
+
+T{ 0 MAX-INT 0 MAX-INT GD8 -> 1 }T
+T{ 0 MAX-INT 1 MAX-INT GD8 -> 1 }T
+T{ 0 MAX-INT -1 MAX-INT GD8 -> 2 }T
+T{ 0 MAX-INT DUP 1- MAX-INT GD8 -> 1 }T
+
+T{ 0 MIN-INT 1+ 0 MIN-INT GD8 -> 1 }T
+T{ 0 MIN-INT 1+ -1 MIN-INT GD8 -> 1 }T
+T{ 0 MIN-INT 1+ 1 MIN-INT GD8 -> 2 }T
+T{ 0 MIN-INT 1+ DUP MIN-INT GD8 -> 1 }T
+
+\ -----------------------------------------------------------------------------
+\ TESTING +LOOP setting I to an arbitrary value
+
+\ The specification for +LOOP permits the loop index I to be set to any value
+\ including a value outside the range given to the corresponding DO.
+
+\ SET-I is a helper to set I in a DO ... +LOOP to a given value
+\ n2 is the value of I in a DO ... +LOOP
+\ n3 is a test value
+\ If n2=n3 then return n1-n2 else return 1
+: SET-I ( n1 n2 n3 -- n1-n2 | 1 )
+ OVER = IF - ELSE 2DROP 1 THEN
+;
+
+: -SET-I ( n1 n2 n3 -- n1-n2 | -1 )
+ SET-I DUP 1 = IF NEGATE THEN
+;
+
+: PL1 20 1 DO I 18 I 3 SET-I +LOOP ;
+T{ PL1 -> 1 2 3 18 19 }T
+: PL2 20 1 DO I 20 I 2 SET-I +LOOP ;
+T{ PL2 -> 1 2 }T
+: PL3 20 5 DO I 19 I 2 SET-I DUP 1 = IF DROP 0 I 6 SET-I THEN +LOOP ;
+T{ PL3 -> 5 6 0 1 2 19 }T
+: PL4 20 1 DO I MAX-INT I 4 SET-I +LOOP ;
+T{ PL4 -> 1 2 3 4 }T
+: PL5 -20 -1 DO I -19 I -3 -SET-I +LOOP ;
+T{ PL5 -> -1 -2 -3 -19 -20 }T
+: PL6 -20 -1 DO I -21 I -4 -SET-I +LOOP ;
+T{ PL6 -> -1 -2 -3 -4 }T
+: PL7 -20 -1 DO I MIN-INT I -5 -SET-I +LOOP ;
+T{ PL7 -> -1 -2 -3 -4 -5 }T
+: PL8 -20 -5 DO I -20 I -2 -SET-I DUP -1 = IF DROP 0 I -6 -SET-I THEN +LOOP ;
+T{ PL8 -> -5 -6 0 -1 -2 -20 }T
+
+\ -----------------------------------------------------------------------------
+TESTING multiple RECURSEs in one colon definition
+
+: ACK ( m n -- u ) \ Ackermann function, from Rosetta Code
+ OVER 0= IF NIP 1+ EXIT THEN \ ack(0, n) = n+1
+ SWAP 1- SWAP ( -- m-1 n )
+ DUP 0= IF 1+ RECURSE EXIT THEN \ ack(m, 0) = ack(m-1, 1)
+ 1- OVER 1+ SWAP RECURSE RECURSE \ ack(m, n) = ack(m-1, ack(m,n-1))
+;
+
+T{ 0 0 ACK -> 1 }T
+T{ 3 0 ACK -> 5 }T
+T{ 2 4 ACK -> 11 }T
+
+\ -----------------------------------------------------------------------------
+TESTING multiple ELSE's in an IF statement
+\ Discussed on comp.lang.forth and accepted as valid ANS Forth
+
+: MELSE IF 1 ELSE 2 ELSE 3 ELSE 4 ELSE 5 THEN ;
+T{ 0 MELSE -> 2 4 }T
+T{ -1 MELSE -> 1 3 5 }T
+
+\ -----------------------------------------------------------------------------
+TESTING manipulation of >IN in interpreter mode
+
+T{ 12345 DEPTH OVER 9 < 34 AND + 3 + >IN ! -> 12345 2345 345 45 5 }T
+T{ 14145 8115 ?DUP 0= 34 AND >IN +! TUCK MOD 14 >IN ! GCD CALCULATION -> 15 }T
+
+\ -----------------------------------------------------------------------------
+TESTING IMMEDIATE with CONSTANT VARIABLE and CREATE [ ... DOES> ]
+
+T{ 123 CONSTANT IW1 IMMEDIATE IW1 -> 123 }T
+T{ : IW2 IW1 LITERAL ; IW2 -> 123 }T
+T{ VARIABLE IW3 IMMEDIATE 234 IW3 ! IW3 @ -> 234 }T
+T{ : IW4 IW3 [ @ ] LITERAL ; IW4 -> 234 }T
+T{ :NONAME [ 345 ] IW3 [ ! ] ; DROP IW3 @ -> 345 }T
+T{ CREATE IW5 456 , IMMEDIATE -> }T
+T{ :NONAME IW5 [ @ IW3 ! ] ; DROP IW3 @ -> 456 }T
+T{ : IW6 CREATE , IMMEDIATE DOES> @ 1+ ; -> }T
+T{ 111 IW6 IW7 IW7 -> 112 }T
+T{ : IW8 IW7 LITERAL 1+ ; IW8 -> 113 }T
+T{ : IW9 CREATE , DOES> @ 2 + IMMEDIATE ; -> }T
+: FIND-IW BL WORD FIND NIP ; ( -- 0 | 1 | -1 )
+T{ 222 IW9 IW10 FIND-IW IW10 -> -1 }T \ IW10 is not immediate
+T{ IW10 FIND-IW IW10 -> 224 1 }T \ IW10 becomes immediate
+
+\ -----------------------------------------------------------------------------
+TESTING that IMMEDIATE doesn't toggle a flag
+
+VARIABLE IT1 0 IT1 !
+: IT2 1234 IT1 ! ; IMMEDIATE IMMEDIATE
+T{ : IT3 IT2 ; IT1 @ -> 1234 }T
+
+\ -----------------------------------------------------------------------------
+TESTING parsing behaviour of S" ." and (
+\ which should parse to just beyond the terminating character no space needed
+
+T{ : GC5 S" A string"2DROP ; GC5 -> }T
+T{ ( A comment)1234 -> 1234 }T
+T{ : PB1 CR ." You should see 2345: "." 2345"( A comment) CR ; PB1 -> }T
+
+\ -----------------------------------------------------------------------------
+TESTING number prefixes # $ % and 'c' character input
+\ Adapted from the Forth 200X Draft 14.5 document
+
+VARIABLE OLD-BASE
+DECIMAL BASE @ OLD-BASE !
+T{ #1289 -> 1289 }T
+T{ #-1289 -> -1289 }T
+T{ $12eF -> 4847 }T
+T{ $-12eF -> -4847 }T
+T{ %10010110 -> 150 }T
+T{ %-10010110 -> -150 }T
+T{ 'z' -> 122 }T
+T{ 'Z' -> 90 }T
+\ Check BASE is unchanged
+T{ BASE @ OLD-BASE @ = -> <TRUE> }T
+
+\ Repeat in Hex mode
+16 OLD-BASE ! 16 BASE !
+T{ #1289 -> 509 }T
+T{ #-1289 -> -509 }T
+T{ $12eF -> 12EF }T
+T{ $-12eF -> -12EF }T
+T{ %10010110 -> 96 }T
+T{ %-10010110 -> -96 }T
+T{ 'z' -> 7a }T
+T{ 'Z' -> 5a }T
+\ Check BASE is unchanged
+T{ BASE @ OLD-BASE @ = -> <TRUE> }T \ 2
+
+DECIMAL
+\ Check number prefixes in compile mode
+T{ : nmp #8327 $-2cbe %011010111 ''' ; nmp -> 8327 -11454 215 39 }T
+
+\ -----------------------------------------------------------------------------
+TESTING definition names
+\ should support {1..31} graphical characters
+: !"#$%&'()*+,-./0123456789:;<=>? 1 ;
+T{ !"#$%&'()*+,-./0123456789:;<=>? -> 1 }T
+: @ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^ 2 ;
+T{ @ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^ -> 2 }T
+: _`abcdefghijklmnopqrstuvwxyz{|} 3 ;
+T{ _`abcdefghijklmnopqrstuvwxyz{|} -> 3 }T
+: _`abcdefghijklmnopqrstuvwxyz{|~ 4 ; \ Last character different
+T{ _`abcdefghijklmnopqrstuvwxyz{|~ -> 4 }T
+T{ _`abcdefghijklmnopqrstuvwxyz{|} -> 3 }T
+
+\ -----------------------------------------------------------------------------
+TESTING FIND with a zero length string and a non-existent word
+
+CREATE EMPTYSTRING 0 C,
+: EMPTYSTRING-FIND-CHECK ( c-addr 0 | xt 1 | xt -1 -- t|f )
+ DUP IF ." FIND returns a TRUE value for an empty string!" CR THEN
+ 0= SWAP EMPTYSTRING = = ;
+T{ EMPTYSTRING FIND EMPTYSTRING-FIND-CHECK -> <TRUE> }T
+
+CREATE NON-EXISTENT-WORD \ Same as in exceptiontest.fth
+ 15 C, CHAR $ C, CHAR $ C, CHAR Q C, CHAR W C, CHAR E C, CHAR Q C,
+ CHAR W C, CHAR E C, CHAR Q C, CHAR W C, CHAR E C, CHAR R C, CHAR T C,
+ CHAR $ C, CHAR $ C,
+T{ NON-EXISTENT-WORD FIND -> NON-EXISTENT-WORD 0 }T
+
+\ -----------------------------------------------------------------------------
+TESTING IF ... BEGIN ... REPEAT (unstructured)
+
+T{ : UNS1 DUP 0 > IF 9 SWAP BEGIN 1+ DUP 3 > IF EXIT THEN REPEAT ; -> }T
+T{ -6 UNS1 -> -6 }T
+T{ 1 UNS1 -> 9 4 }T
+
+\ -----------------------------------------------------------------------------
+TESTING DOES> doesn't cause a problem with a CREATEd address
+
+: MAKE-2CONST DOES> 2@ ;
+T{ CREATE 2K 3 , 2K , MAKE-2CONST 2K -> ' 2K >BODY 3 }T
+
+\ -----------------------------------------------------------------------------
+TESTING ALLOT ( n -- ) where n <= 0
+
+T{ HERE 5 ALLOT -5 ALLOT HERE = -> <TRUE> }T
+T{ HERE 0 ALLOT HERE = -> <TRUE> }T
+
+\ -----------------------------------------------------------------------------
+
+CR .( End of additional Core tests) \ "
+
+\ -----------------------------------------------------------------------------
+TESTING TO VALUE :NONAME IS DEFER
+
+T{ 111 VALUE v1 -> }T
+T{ -999 VALUE v2 -> }T
+T{ v1 -> 111 }T
+T{ v2 -> -999 }T
+T{ 222 TO v1 -> }T
+T{ v1 -> 222 }T
+T{ : vd1 v1 ; -> }T
+T{ vd1 -> 222 }T
+T{ : vd2 TO v2 ; -> }T
+T{ v2 -> -999 }T
+T{ -333 vd2 -> }T
+T{ v2 -> -333 }T
+T{ v1 -> 222 }T
+
+VARIABLE nn1
+VARIABLE nn2
+T{ :NONAME 1234 ; nn1 ! -> }T
+T{ :NONAME 9876 ; nn2 ! -> }T
+T{ nn1 @ EXECUTE -> 1234 }T
+T{ nn2 @ EXECUTE -> 9876 }T
+
+T{ :NONAME ( n -- 0,1,..n ) DUP IF DUP >R 1- RECURSE R> THEN ;
+ CONSTANT RN1 -> }T
+T{ 0 RN1 EXECUTE -> 0 }T
+T{ 4 RN1 EXECUTE -> 0 1 2 3 4 }T
+
+:NONAME ( n -- n1 ) \ Multiple RECURSEs in one definition
+ 1- DUP
+ CASE 0 OF EXIT ENDOF
+ 1 OF 11 SWAP RECURSE ENDOF
+ 2 OF 22 SWAP RECURSE ENDOF
+ 3 OF 33 SWAP RECURSE ENDOF
+ DROP ABS RECURSE EXIT
+ ENDCASE
+; CONSTANT RN2
+
+T{ 1 RN2 EXECUTE -> 0 }T
+T{ 2 RN2 EXECUTE -> 11 0 }T
+T{ 4 RN2 EXECUTE -> 33 22 11 0 }T
+T{ 25 RN2 EXECUTE -> 33 22 11 0 }T
+
+
+T{ DEFER defer5 -> }T
+T{ : is-defer5 IS defer5 ; -> }T
+T{ ' * IS defer5 -> }T
+T{ 2 3 defer5 -> 6 }T
+T{ ' + is-defer5 -> }T
+T{ 1 2 defer5 -> 3 }T
+
+\ -----------------------------------------------------------------------------
+TESTING MARKER (contributed by James Bowman)
+
+T{ : MA? BL WORD FIND NIP 0<> ; -> }T
+T{ MARKER MA0 -> }T
+T{ : MA1 111 ; -> }T
+T{ MARKER MA2 -> }T
+T{ : MA1 222 ; -> }T
+T{ MA? MA0 MA? MA1 MA? MA2 -> TRUE TRUE TRUE }T
+T{ MA1 MA2 MA1 -> 222 111 }T
+T{ MA? MA0 MA? MA1 MA? MA2 -> TRUE TRUE FALSE }T
+T{ MA0 -> }T
+T{ MA? MA0 MA? MA1 MA? MA2 -> FALSE FALSE FALSE }T
+
+CORETESTSUCCESS
--- /dev/null
+
+ CODE ABORT_CORE_ANS
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ;
+
+ ABORT_CORE_ANS
+
+ [UNDEFINED] BC!
+ [IF]
+ CODE BC!
+ BIC @R15+,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] BS!
+ [IF]
+ CODE BS!
+ BIS @R15+,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ $8000 $180E BC!
+
+ RST_RET
+
+; ----------------------------------
+; CORE_ANS.4th for MSP_EXP430FR5994
+; ----------------------------------
+
+ MARKER {CORE_ANS}
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #$4032,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] EXIT
+ [IF]
+ CODE EXIT
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DEPTH
+ [IF]
+ CODE DEPTH
+ MOV R14,-2(R15)
+ MOV #$1C80,R14
+ SUB R15,R14
+ RRA R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ PUSH R14
+ MOV @R15,R14
+ MOV @R1+,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] NIP
+ [IF]
+ CODE NIP
+ ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] @
+ [IF]
+ CODE @
+ MOV @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] !
+ [IF]
+ CODE !
+ MOV @R15+,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C!
+ [IF]
+ CODE C!
+ MOV.B @R15+,0(R14)
+ ADD #1,R15
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C,
+ [IF]
+ CODE C,
+ MOV &$1DC8,R10
+ MOV.B R14,0(R10)
+ ADD #1,&$1DC8
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,R14
+ SUBC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0<>
+ [IF]
+ CODE 0<>
+ SUB #1,R14
+ SUBC R14,R14
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0<
+ [IF]
+ CODE 0<
+BW1 ADD R14,R14
+ SUBC R14,R14
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+
+ [UNDEFINED] S>D
+ [IF]
+ : S>D
+ DUP 0<
+ ;
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ SUB #1,R14
+ SUBC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U<
+ [IF]
+
+ CODE U<
+ SUB @R15+,R14
+ U< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE U>
+ SUB @R15+,R14
+ U< ?GOTO BW1
+FW1 AND #0,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] <
+ [IF]
+
+ CODE <
+ SUB @R15+,R14
+ S< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE >
+ SUB @R15+,R14
+ S< ?GOTO BW1
+FW1 AND #0,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] BEGIN
+ [IF]
+
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] J
+ [IF]
+ CODE J
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV 4(R1),R14
+ SUB 6(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] UNLOOP
+ [IF]
+ CODE UNLOOP
+ ADD #4,R1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] LEAVE
+ [IF]
+ CODE LEAVE
+ MOV &$1DC8,R10
+ MOV #UNLOOP,0(R10)
+ MOV #$40B2,2(R10)
+ ADD #6,&$1DC8
+ ADD #2,&$1C00
+ ADD #4,R10
+ MOV &$1C00,R9
+ MOV R10,0(R9)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] AND
+ [IF]
+ CODE AND
+ AND @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OR
+ [IF]
+ CODE OR
+ BIS @R15+,R14
+ AND #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] XOR
+ [IF]
+ CODE XOR
+ XOR @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1-
+ [IF]
+ CODE 1-
+ SUB #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] INVERT
+ [IF]
+ CODE INVERT
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] NEGATE
+ [IF]
+ CODE NEGATE
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ABS
+ [IF]
+ CODE ABS
+ CMP #0,R14
+ 0>= IF
+ MOV @R13+,R0
+ THEN
+ MOV #NEGATE,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] LSHIFT
+ [IF]
+ CODE LSHIFT
+ MOV @R15+,R10
+ AND #$1F,R14
+ 0<> IF
+ BEGIN
+ ADD R10,R10
+ SUB #1,R14
+ 0= UNTIL
+ THEN
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] RSHIFT
+ [IF]
+ CODE RSHIFT
+ MOV @R15+,R10
+ AND #$1F,R14
+ 0<> IF
+ BEGIN
+ BIC #1,R2
+ RRC R10
+ SUB #1,R14
+ 0= UNTIL
+ THEN
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF]
+
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2*
+ [IF]
+ CODE 2*
+ ADD R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ RST_SET
+
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ $180E 1 TSTBIT
+ RST_RET
+
+ [IF]
+ CODE UM*
+ MOV @R15,&$4C0
+BW1 MOV R14,&$4C8
+ MOV &$4E4,0(R15)
+ MOV &$4E6,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE M*
+ MOV @R15,&$4C2
+ GOTO BW1
+ ENDCODE
+
+ [ELSE] ; MSP430FRxxxx with hardware_MPY
+ [UNDEFINED] M* [IF]
+ CODE M*
+ MOV @R15,R12
+ CMP #0,R12
+ S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+ THEN
+ XOR R14,R12
+ CMP #0,R14
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ PUSHM #2,R13
+ LO2HI
+ UM*
+ HI2LO
+ POPM #2,R13
+ CMP #0,R12
+ S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+ [THEN] ; endof hardware_MPY
+
+
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
+ PUSH #DROP
+ MOV #$403E,R0
+ ENDCODE
+ [THEN]
+
+
+
+ $180E @ 0< ; test the switch: $8000 / SYMETRIC DIVISION
+ [IF]
+ [UNDEFINED] FM/MOD
+ [IF]
+ CODE FM/MOD
+ MOV R14,R12
+ MOV @R15,R11
+ CMP #0,R14
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ CMP #0,0(R15)
+ S< IF
+ XOR #-1,2(R15)
+ XOR #-1,0(R15)
+ ADD #1,2(R15)
+ ADDC #0,0(R15)
+ THEN
+ PUSHM #2,R12
+ CALL #$403E
+ MOV @R15+,R14
+ POPM #2,R12
+ CMP #0,R11
+ S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+ THEN
+ XOR R12,R11
+ CMP #0,R11
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+
+ CMP #0,0(R15)
+ 0<> IF
+ CMP #1,R14
+ S< IF
+ ADD R12,0(R15)
+ SUB #1,R14
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+ [ELSE]
+ [UNDEFINED] SM/REM
+ [IF]
+ CODE SM/REM
+ MOV R14,R12
+ MOV @R15,R11
+ CMP #0,R14
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ CMP #0,0(R15)
+ S< IF
+ XOR #-1,2(R15)
+ XOR #-1,0(R15)
+ ADD #1,2(R15)
+ ADDC #0,0(R15)
+ THEN
+ PUSHM #2,R12
+ CALL #$403E
+ MOV @R15+,R14
+ POPM #2,R12
+ CMP #0,R11
+ S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+ THEN
+ XOR R12,R11
+ CMP #0,R11
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+ [THEN]
+
+ [UNDEFINED] *
+ [IF]
+ : *
+ M* DROP
+ ;
+ [THEN]
+
+ [UNDEFINED] /MOD
+ [IF]
+ : /MOD
+ >R DUP 0< R>
+ [ $180E @ 0< ]
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ ;
+ [THEN]
+
+ [UNDEFINED] /
+ [IF]
+ : /
+ >R DUP 0< R>
+ [ $180E @ 0< ]
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ NIP
+ ;
+ [THEN]
+
+ [UNDEFINED] MOD
+ [IF]
+ : MOD
+ >R DUP 0< R>
+ [ $180E @ 0< ]
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ DROP
+ ;
+ [THEN]
+
+ [UNDEFINED] */MOD
+ [IF]
+ : */MOD
+ >R M* R>
+ [ $180E @ 0< ]
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ ;
+ [THEN]
+
+ [UNDEFINED] */
+ [IF]
+ : */
+ >R M* R>
+ [ $180E @ 0< ]
+ [IF] FM/MOD
+ [ELSE] SM/REM
+ [THEN]
+ NIP
+ ;
+ [THEN]
+
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV 2(R15),R14
+ MOV R10,2(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R@
+ [IF]
+ CODE R@
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] TUCK
+ [IF]
+ : TUCK SWAP OVER ;
+ [THEN]
+
+ [UNDEFINED] 2@
+ [IF]
+ CODE 2@
+ SUB #2,R15
+ MOV 2(R14),0(R15)
+ MOV @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2!
+ [IF]
+ CODE 2!
+ MOV @R15+,0(R14)
+ MOV @R15+,2(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2DUP
+ [IF]
+ CODE 2DUP
+ MOV R14,-2(R15)
+ MOV @R15,-4(R15)
+ SUB #4,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2DROP
+ [IF]
+ CODE 2DROP
+ ADD #2,R15
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2SWAP
+ [IF]
+ CODE 2SWAP
+ MOV @R15,R10
+ MOV 4(R15),0(R15)
+ MOV R10,4(R15)
+ MOV R14,R10
+ MOV 2(R15),R14
+ MOV R10,2(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2OVER
+ [IF]
+ CODE 2OVER
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV 8(R15),0(R15)
+ MOV 6(R15),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ALIGNED
+ [IF]
+ CODE ALIGNED
+ BIT #1,R14
+ ADDC #0,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ALIGN
+ [IF]
+ CODE ALIGN
+ BIT #1,&$1DC8
+ ADDC #0,&$1DC8
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CHARS
+ [IF]
+ CODE CHARS
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CHAR+
+ [IF]
+ CODE CHAR+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CELLS
+ [IF]
+ CODE CELLS
+ ADD R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CELL+
+ [IF]
+ CODE CELL+
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CHAR
+ [IF]
+ : CHAR
+ $20 WORD 1+ C@
+ ;
+ [THEN]
+
+ [UNDEFINED] [CHAR]
+ [IF]
+ : [CHAR]
+ CHAR POSTPONE LITERAL
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] +!
+ [IF]
+ CODE +!
+ ADD @R15+,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV R14,R10
+ MOV @R15+,R8
+ MOV @R15+,R9
+ MOV @R15+,R14
+ CMP #0,R10
+ 0<> IF
+ CMP R9,R8
+ 0<> IF
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ THEN
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] FILL
+ [IF]
+ CODE FILL
+ MOV @R15+,R9
+ MOV @R15+,R10
+ CMP #0,R9
+ 0<> IF
+ BEGIN
+ MOV.B R14,0(R10)
+ ADD #1,R10
+ SUB #1,R9
+ 0= UNTIL
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] HEX
+ [IF]
+ CODE HEX
+ MOV #$10,&$1DBE
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+
+ [UNDEFINED] DECIMAL
+ [IF]
+ CODE DECIMAL
+ MOV #$0A,&$1DBE
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ( ; )
+ [IF]
+ : (
+ ')' WORD DROP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] .( ; "
+ [IF]
+ CODE .( ; "
+ MOV #0,&$1DC0
+ COLON
+ ')' WORD
+ COUNT TYPE
+ HI2LO
+ MOV #$20,&$1DC0
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] EXECUTE
+ [IF]
+ CODE EXECUTE
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R1+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] EVALUATE
+ [IF]
+ CODE EVALUATE
+ MOV #$1DC2,R9
+ MOV @R9+,R12
+ MOV @R9+,R11
+ MOV @R9+,R10
+ PUSHM #4,R13
+ LO2HI
+ [ ' \ 8 + , ]
+ HI2LO
+ MOV @R1+,&$1DC6
+ MOV @R1+,&$1DC4
+ MOV @R1+,&$1DC2
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] RECURSE
+ [IF]
+ CODE RECURSE
+ MOV &$1DC8,R9
+ MOV &$1DB8,0(R9)
+ ADD #2,&$1DC8
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] SOURCE
+ [IF]
+ CODE SOURCE
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$1DC2,R14
+ MOV &$1DC4,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] VARIABLE
+ [IF]
+ : VARIABLE
+ CREATE
+ HI2LO
+ MOV #$1287,-4(R10)
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] STATE
+ [IF]
+ $1DBC CONSTANT STATE
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ [UNDEFINED] >IN
+ [IF]
+ $1DC6 CONSTANT >IN
+ [THEN]
+
+ [UNDEFINED] PAD
+ [IF]
+ $1CE4 CONSTANT PAD
+ [THEN]
+
+ [UNDEFINED] BL
+ [IF]
+ $20 CONSTANT BL
+ [THEN]
+
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ : SPACES
+ BEGIN
+ ?DUP
+ WHILE
+ $20 EMIT
+ 1-
+ REPEAT
+ ;
+ [THEN]
+
+ [UNDEFINED] DEFER
+ [IF]
+ : DEFER
+ CREATE
+ HI2LO
+ MOV #$4030,-4(R10)
+ MOV #$40B4,-2(R10)
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] TO
+ [IF]
+ CODE TO
+ BIS #$200,R2
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] VALUE
+ [IF]
+ : VALUE
+ CREATE ,
+ DOES>
+ HI2LO
+ MOV @R1+,R13
+ BIT #$200,R2
+ 0= IF
+ MOV @R14,R14
+ MOV @R13+,R0
+ THEN
+ BIC #$200,R2
+ MOV #!,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CASE
+ [IF]
+
+ : CASE 0
+ ; IMMEDIATE
+
+ : OF
+ 1+
+ >R
+ POSTPONE OVER POSTPONE =
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
+
+ : ENDOF
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
+
+ : ENDCASE
+ POSTPONE DROP
+ 0 DO POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ RST_SET
+
+ ECHO
+; CORE_ANS.4th for MSP_EXP430FR5994 is loaded
+
--- /dev/null
+
+ CODE ABORT_DOUBLE
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$180E,R14
+ BIT #$80,R14
+ 0<> IF MOV #0,R14 THEN
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ABORT" build FastForth with DOUBLE_INPUT addon !"
+ RST_RET
+ ;
+
+ ABORT_DOUBLE
+
+; -----------------------------------------------------
+; DOUBLE.4th for MSP_EXP430FR5994
+; -----------------------------------------------------
+
+ MARKER {DOUBLE}
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0<
+ [IF]
+ CODE 0<
+ ADD R14,R14
+ SUBC R14,R14
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] NIP
+ [IF]
+ CODE NIP
+ ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
+ PUSH #DROP
+ MOV #$403E,R0
+ ENDCODE
+ [THEN]
+
+ $180E @ 0< ; test the switch: $8000 / SYMETRIC DIVISION
+ [IF] ; $8000 DIVISION
+ [UNDEFINED] FM/MOD
+ [IF]
+ CODE FM/MOD
+ MOV R14,R12
+ MOV @R15,R11
+ CMP #0,R14
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ CMP #0,0(R15)
+ S< IF
+ XOR #-1,2(R15)
+ XOR #-1,0(R15)
+ ADD #1,2(R15)
+ ADDC #0,0(R15)
+ THEN
+ PUSHM #3,R13
+ LO2HI
+ UM/MOD
+ HI2LO
+ POPM #3,R13
+ CMP #0,R11
+ S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+ THEN
+ XOR R12,R11
+ CMP #0,R11
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+
+ CMP #0,0(R15)
+ 0<> IF
+ CMP #1,R14
+ S< IF
+ ADD R12,0(R15)
+ SUB #1,R14
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [ELSE] ; SYMETRIC DIVISION
+ [UNDEFINED] SM/REM
+ [IF]
+ CODE SM/REM
+ MOV R14,R12
+ MOV @R15,R11
+ CMP #0,R14
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ CMP #0,0(R15)
+ S< IF
+ XOR #-1,2(R15)
+ XOR #-1,0(R15)
+ ADD #1,2(R15)
+ ADDC #0,0(R15)
+ THEN
+ PUSHM #3,R13
+ LO2HI
+ UM/MOD
+ HI2LO
+ POPM #3,R13
+ CMP #0,R11
+ S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+ THEN
+ XOR R12,R11
+ CMP #0,R11
+ S< IF
+ XOR #-1,R14
+ ADD #1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+ [THEN]
+
+ [UNDEFINED] /
+ [IF]
+ : /
+ >R DUP 0< R>
+ [ $180E @ 0< ] [IF]
+ FM/MOD
+ [ELSE]
+ SM/REM
+ [THEN]
+ NIP
+ ;
+ [THEN]
+
+ [UNDEFINED] @
+ [IF]
+ CODE @
+ MOV @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] !
+ [IF]
+ CODE !
+ MOV @R15+,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV 2(R15),R14
+ MOV R10,2(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] <
+ [IF]
+ CODE <
+ SUB @R15+,R14
+ S< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE >
+ SUB @R15+,R14
+ S< ?GOTO BW1
+FW1 AND #0,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] TO
+ [IF]
+ CODE TO
+ BIS #$200,R2
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DOES>
+ [IF]
+ CODE DOES>
+ MOV &$1DB8,R10
+ MOV #$1285,0(R10)
+ MOV R13,2(R10)
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2@
+ [IF]
+ CODE 2@
+ SUB #2,R15
+ MOV 2(R14),0(R15)
+ MOV @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2!
+ [IF]
+ CODE 2!
+ MOV @R15+,0(R14)
+ MOV @R15+,2(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2DUP
+ [IF]
+ CODE 2DUP
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV 4(R15),0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2DROP
+ [IF]
+ CODE 2DROP
+ ADD #2,R15
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2SWAP
+ [IF]
+ CODE 2SWAP
+ MOV @R15,R10
+ MOV 4(R15),0(R15)
+ MOV R10,4(R15)
+ MOV R14,R10
+ MOV 2(R15),R14
+ MOV R10,2(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2OVER
+ [IF]
+ CODE 2OVER
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV 8(R15),0(R15)
+ MOV 6(R15),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2>R
+ [IF]
+ CODE 2>R
+ PUSH @R15+
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2R@
+ [IF]
+ CODE 2R@
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV @R1,R14
+ MOV 2(R1),0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2R>
+ [IF]
+ CODE 2R>
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV @R1+,R14
+ MOV @R1+,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+
+ [UNDEFINED] D.
+ [IF]
+ CODE D.
+ MOV R14,R12
+ MOV #U.+10,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2ROT
+ [IF]
+ CODE 2ROT
+ MOV 8(R15),R9
+ MOV 6(R15),R8
+ MOV 4(R15),8(R15)
+ MOV 2(R15),6(R15)
+ MOV @R15,4(R15)
+ MOV R14,2(R15)
+ MOV R9,0(R15)
+ MOV R8,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D>S
+ [IF]
+ CODE D>S
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D0=
+ [IF]
+ CODE D0=
+ CMP #0,R14
+ MOV #0,R14
+ 0= IF
+ CMP #0,0(R15)
+ 0= IF
+ MOV #-1,R14
+ THEN
+ THEN
+ ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D0<
+ [IF]
+ CODE D0<
+ CMP #0,R14
+ MOV #0,R14
+ S< IF
+ MOV #-1,R14
+ THEN
+ ADD #2,R15
+ AND #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D=
+ [IF]
+ CODE D=
+ CMP R14,2(R15)
+ MOV #0,R14
+ 0= IF
+ CMP @R15,4(R15)
+ 0= IF
+ MOV #-1,R14
+ THEN
+ THEN
+ ADD #6,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D<
+ [IF]
+ CODE D<
+ CMP R14,2(R15)
+ MOV #0,R14
+ S< IF
+ MOV #-1,R14
+ THEN
+ 0= IF
+ CMP @R15,4(R15)
+ U< IF
+ MOV #-1,R14
+ THEN
+ THEN
+ ADD #6,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DU<
+ [IF]
+ CODE DU<
+ CMP R14,2(R15)
+ MOV #0,R14
+ U< IF
+ MOV #-1,R14
+ THEN
+ 0= IF
+ CMP @R15,4(R15)
+ U< IF
+ MOV #-1,R14
+ THEN
+ THEN
+ ADD #6,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D+
+ [IF]
+ CODE D+
+BW1 ADD @R15+,2(R15)
+ ADDC @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE M+
+ SUB #2,R15
+ CMP #0,R14
+ MOV R14,0(R15)
+ MOV #-1,R14
+ 0>= IF
+ MOV #0,R14
+ THEN
+ GOTO BW1
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D-
+ [IF]
+ CODE D-
+ SUB @R15+,2(R15)
+ SUBC R14,0(R15)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DNEGATE
+ [IF]
+ CODE DNEGATE
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DABS
+ [IF]
+ CODE DABS
+ CMP #0,R14
+ 0>= IF
+ MOV @R13+,R0
+ THEN
+ MOV #DNEGATE,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D2/
+ [IF]
+ CODE D2/
+ RRA R14
+ RRC 0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D2*
+ [IF]
+ CODE D2*
+ ADD @R15,0(R15)
+ ADDC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DMAX
+ [IF]
+ : DMAX
+ 2OVER 2OVER
+ D< IF
+ 2>R 2DROP 2R>
+ ELSE
+ 2DROP
+ THEN
+ ;
+ [THEN]
+
+ [UNDEFINED] DMIN
+ [IF]
+ : DMIN
+ 2OVER 2OVER
+ D< IF
+ 2DROP
+ ELSE
+ 2>R 2DROP 2R>
+ THEN
+ ;
+ [THEN]
+
+ RST_SET
+
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ $180E 1 TSTBIT
+
+ RST_RET
+
+ [IF] ; MSP430FRxxxx with hardware_MPY
+
+ [UNDEFINED] M*/
+ [IF]
+ CODE M*/
+ MOV 4(R15),&$4D4
+ MOV 2(R15),&$4D6
+ MOV @R15+,&$4C8
+ MOV R14,R11
+ MOV R0,R0
+ MOV &$4E4,R12
+ MOV &$4E6,R14
+ MOV &$4E8,R10
+ MOV #0,R6
+ CMP #0,R10
+ S< IF
+ XOR #-1,R12
+ XOR #-1,R14
+ XOR #-1,R10
+ ADD #1,R12
+ ADDC #0,R14
+ ADDC #0,R10
+ MOV #-1,R6
+ THEN
+
+ [ELSE] ; no hardware multiplier
+ [UNDEFINED] M*/
+ [IF]
+ CODE M*/
+ MOV #0,R6
+ CMP #0,2(R15)
+ S< IF
+ XOR #-1,4(R15)
+ XOR #-1,2(R15)
+ ADD #1,4(R15)
+ ADDC #0,2(R15)
+ MOV #-1,R6
+ THEN
+ CMP #0,0(R15)
+ S< IF
+ XOR #-1,0(R15)
+ ADD #1,0(R15)
+ XOR #-1,R6
+ THEN
+ MOV 4(R15),R8
+ MOV 2(R15),R11
+ MOV @R15+,R12
+ MOV #0,R5
+ MOV #0,2(R15)
+ MOV #0,0(R15)
+ MOV #0,R10
+ MOV #1,R9
+ BEGIN BIT R9,R12
+ 0<> IF ADD R8,2(R15)
+ ADDC R11,0(R15)
+ ADDC R5,R10
+ THEN ADD R8,R8
+ ADDC R11,R11
+ ADDC R5,R5
+ ADD R9,R9
+ U>= UNTIL
+ MOV R14,R11
+ MOV @R15,R14
+ MOV 2(R15),R12
+ [THEN]
+
+ [THEN] ; endcase of software/hardware_MPY
+
+ MOV #32,R5
+ CMP #0,R10
+ 0= IF
+ MOV R14,R10
+ CALL #$4050
+ ELSE
+ CALL #$4058
+ THEN
+ MOV @R15+,0(R15)
+ CMP #0,R6
+ 0<> IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+ CMP #0,&$180E
+ S< IF
+ CMP #0,R10
+ 0<> IF
+ SUB #1,0(R15)
+ SUBC #0,R14
+ THEN
+ THEN
+ THEN
+ MOV #$40B6,R5
+ MOV #$40C4,R6
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2VARIABLE
+ [IF]
+ : 2VARIABLE
+ CREATE
+ HI2LO
+ ADD #4,&$1DC8
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2CONSTANT
+ [IF]
+ : 2CONSTANT
+ CREATE
+ , ,
+ DOES>
+ 2@
+ ;
+ [THEN]
+
+ [UNDEFINED] 2VALUE
+ [IF]
+ : 2VALUE
+ CREATE , ,
+ DOES>
+ HI2LO
+ MOV @R1+,R13
+ BIT #$200,R2
+ 0= IF
+ MOV #2@,R0
+ THEN
+ BIC #$200,R2
+ MOV #2!,R0
+ ENDCODE
+ [THEN]
+
+
+ [UNDEFINED] 2LITERAL
+ [IF]
+ CODE 2LITERAL
+ BIS #$200,R2
+ MOV #LITERAL,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] D.R
+ [IF]
+ : D.R
+ >R SWAP OVER DABS <# #S ROT SIGN #>
+ R> OVER - SPACES TYPE
+ ;
+ [THEN]
+
+ RST_SET
+
+; Complement to pass DOUBLE TESTS
+
+ [UNDEFINED] VARIABLE
+ [IF]
+ : VARIABLE
+ CREATE
+ HI2LO
+ MOV #$1287,-4(R10)
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CELLS
+ [IF]
+ CODE CELLS
+ ADD R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DEPTH
+ [IF]
+ CODE DEPTH
+ MOV R14,-2(R15)
+ MOV #$1C80,R14
+ SUB R15,R14
+ RRA R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,R14
+ SUBC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SOURCE
+ [IF]
+ CODE SOURCE
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$1DC2,R14
+ MOV &$1DC4,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >IN
+ [IF]
+ $1DC6 CONSTANT >IN
+ [THEN]
+
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CHAR
+ [IF]
+ : CHAR
+ $20 WORD 1+ C@
+ ;
+ [THEN]
+
+ [UNDEFINED] [CHAR]
+ [IF]
+ : [CHAR]
+ CHAR POSTPONE LITERAL
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] INVERT
+ [IF]
+ CODE INVERT
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] RSHIFT
+ [IF]
+ CODE RSHIFT
+ MOV @R15+,R10
+ AND #$1F,R14
+ 0<> IF
+ BEGIN
+ BIC #1,R2
+ RRC R10
+ SUB #1,R14
+ 0= UNTIL
+ THEN
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] S>D
+ [IF]
+ : S>D
+ DUP 0<
+ ;
+ [THEN]
+
+ [UNDEFINED] 1-
+ [IF]
+ CODE 1-
+ SUB #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] NEGATE
+ [IF]
+ CODE NEGATE
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #$4032,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CHARS
+ [IF]
+ CODE CHARS
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV R14,R10
+ MOV @R15+,R8
+ MOV @R15+,R9
+ MOV @R15+,R14
+ CMP #0,R10
+ 0<> IF
+ CMP R9,R8
+ 0<> IF
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ THEN
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DECIMAL
+ [IF]
+ CODE DECIMAL
+ MOV #$0A,&$1DBE
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ [UNDEFINED] ( ; )
+ [IF]
+ : (
+ ')' WORD DROP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] .( ; "
+ [IF]
+ CODE .( ; "
+ MOV #0,&$1DC0
+ COLON
+ ')' WORD
+ COUNT TYPE
+ $20 $1DC0 !
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+ DEFER CR
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+
+ 0 CONSTANT FALSE
+-1 CONSTANT TRUE
+
+VARIABLE VERBOSE
+ FALSE VERBOSE !
+
+VARIABLE ACTUAL-DEPTH
+CREATE ACTUAL-RESULTS 20 CELLS ALLOT
+
+: T{
+ ;
+
+: ->
+ DEPTH DUP ACTUAL-DEPTH !
+ ?DUP IF
+ 0 DO ACTUAL-RESULTS I CELLS + ! LOOP
+ THEN ;
+
+: }T
+
+ DEPTH ACTUAL-DEPTH @ = IF
+ DEPTH ?DUP IF
+ 0 DO
+ ACTUAL-RESULTS I CELLS + @
+ = 0= IF TRUE ABORT" INCORRECT RESULT" THEN
+ LOOP
+ THEN
+ ELSE
+ TRUE ABORT" WRONG NUMBER OF RESULTS"
+ THEN ;
+
+: TESTING
+ SOURCE VERBOSE @
+ IF DUP >R TYPE CR R> >IN !
+ ELSE >IN ! DROP [CHAR] * EMIT
+ THEN ;
+
+
+DECIMAL
+
+0 INVERT CONSTANT 1SD
+1SD 1 RSHIFT CONSTANT MAX-INTD
+MAX-INTD INVERT CONSTANT MIN-INTD
+MAX-INTD 2/ CONSTANT HI-INT
+MIN-INTD 2/ CONSTANT LO-INT
+
+
+ECHO
+
+TESTING interpreter and compiler reading double numbers, with/without prefixes
+
+T{ 1. -> 1 0 }T
+T{ -2. -> -2 -1 }T
+T{ : RDL1 3. ; RDL1 -> 3 0 }T
+T{ : RDL2 -4. ; RDL2 -> -4 -1 }T
+
+VARIABLE OLD-DBASE
+DECIMAL BASE @ OLD-DBASE !
+T{ #12346789. -> 12346789. }T
+T{ #-12346789. -> -12346789. }T
+T{ $12aBcDeF. -> 313249263. }T
+T{ $-12AbCdEf. -> -313249263. }T
+T{ %10010110. -> 150. }T
+T{ %-10010110. -> -150. }T
+T{ BASE @ OLD-DBASE @ = -> TRUE }T
+
+16 OLD-DBASE ! 16 BASE !
+T{ #12346789. -> BC65A5. }T
+T{ #-12346789. -> -BC65A5. }T
+T{ $12aBcDeF. -> 12AbCdeF. }T
+T{ $-12AbCdEf. -> -12ABCDef. }T
+T{ %10010110. -> 96. }T
+T{ %-10010110. -> -96. }T
+T{ BASE @ OLD-DBASE @ = -> TRUE }T
+
+DECIMAL
+T{ : dnmp #8327. $-2cbe. %011010111. ; dnmp -> 8327. -11454. 215. }T
+
+TESTING 2CONSTANT
+
+T{ 1 2 2CONSTANT 2C1 -> }T
+T{ 2C1 -> 1 2 }T
+T{ : CD1 2C1 ; -> }T
+T{ CD1 -> 1 2 }T
+T{ : CD2 2CONSTANT ; -> }T
+T{ -1 -2 CD2 2C2 -> }T
+T{ 2C2 -> -1 -2 }T
+T{ 4 5 2CONSTANT 2C3 IMMEDIATE 2C3 -> 4 5 }T
+T{ : CD6 2C3 2LITERAL ; CD6 -> 4 5 }T
+
+
+1SD MAX-INTD 2CONSTANT MAX-2INT
+0 MIN-INTD 2CONSTANT MIN-2INT
+MAX-2INT 2/ 2CONSTANT HI-2INT
+MIN-2INT 2/ 2CONSTANT LO-2INT
+
+TESTING DNEGATE
+
+T{ 0. DNEGATE -> 0. }T
+T{ 1. DNEGATE -> -1. }T
+T{ -1. DNEGATE -> 1. }T
+T{ MAX-2INT DNEGATE -> MIN-2INT SWAP 1+ SWAP }T
+T{ MIN-2INT SWAP 1+ SWAP DNEGATE -> MAX-2INT }T
+
+TESTING D+ with small integers
+
+T{ 0. 5. D+ -> 5. }T
+T{ -5. 0. D+ -> -5. }T
+T{ 1. 2. D+ -> 3. }T
+T{ 1. -2. D+ -> -1. }T
+T{ -1. 2. D+ -> 1. }T
+T{ -1. -2. D+ -> -3. }T
+T{ -1. 1. D+ -> 0. }T
+
+TESTING D+ with mid range integers
+
+T{ 0 0 0 5 D+ -> 0 5 }T
+T{ -1 5 0 0 D+ -> -1 5 }T
+T{ 0 0 0 -5 D+ -> 0 -5 }T
+T{ 0 -5 -1 0 D+ -> -1 -5 }T
+T{ 0 1 0 2 D+ -> 0 3 }T
+T{ -1 1 0 -2 D+ -> -1 -1 }T
+T{ 0 -1 0 2 D+ -> 0 1 }T
+T{ 0 -1 -1 -2 D+ -> -1 -3 }T
+T{ -1 -1 0 1 D+ -> -1 0 }T
+T{ MIN-INTD 0 2DUP D+ -> 0 1 }T
+T{ MIN-INTD S>D MIN-INTD 0 D+ -> 0 0 }T
+
+TESTING D+ with large double integers
+
+T{ HI-2INT 1. D+ -> 0 HI-INT 1+ }T
+T{ HI-2INT 2DUP D+ -> 1SD 1- MAX-INTD }T
+T{ MAX-2INT MIN-2INT D+ -> -1. }T
+T{ MAX-2INT LO-2INT D+ -> HI-2INT }T
+T{ HI-2INT MIN-2INT D+ 1. D+ -> LO-2INT }T
+T{ LO-2INT 2DUP D+ -> MIN-2INT }T
+
+TESTING D- with small integers
+
+T{ 0. 5. D- -> -5. }T
+T{ 5. 0. D- -> 5. }T
+T{ 0. -5. D- -> 5. }T
+T{ 1. 2. D- -> -1. }T
+T{ 1. -2. D- -> 3. }T
+T{ -1. 2. D- -> -3. }T
+T{ -1. -2. D- -> 1. }T
+T{ -1. -1. D- -> 0. }T
+
+TESTING D- with mid-range integers
+
+T{ 0 0 0 5 D- -> 0 -5 }T
+T{ -1 5 0 0 D- -> -1 5 }T
+T{ 0 0 -1 -5 D- -> 1 4 }T
+T{ 0 -5 0 0 D- -> 0 -5 }T
+T{ -1 1 0 2 D- -> -1 -1 }T
+T{ 0 1 -1 -2 D- -> 1 2 }T
+T{ 0 -1 0 2 D- -> 0 -3 }T
+T{ 0 -1 0 -2 D- -> 0 1 }T
+T{ 0 0 0 1 D- -> 0 -1 }T
+T{ MIN-INTD 0 2DUP D- -> 0. }T
+T{ MIN-INTD S>D MAX-INTD 0 D- -> 1 1SD }T
+
+TESTING D- with large integers
+
+T{ MAX-2INT MAX-2INT D- -> 0. }T
+T{ MIN-2INT MIN-2INT D- -> 0. }T
+T{ MAX-2INT HI-2INT D- -> LO-2INT DNEGATE }T
+T{ HI-2INT LO-2INT D- -> MAX-2INT }T
+T{ LO-2INT HI-2INT D- -> MIN-2INT 1. D+ }T
+T{ MIN-2INT MIN-2INT D- -> 0. }T
+T{ MIN-2INT LO-2INT D- -> LO-2INT }T
+
+TESTING D0< D0=
+
+T{ 0. D0< -> FALSE }T
+T{ 1. D0< -> FALSE }T
+T{ MIN-INTD 0 D0< -> FALSE }T
+T{ 0 MAX-INTD D0< -> FALSE }T
+T{ MAX-2INT D0< -> FALSE }T
+T{ -1. D0< -> TRUE }T
+T{ MIN-2INT D0< -> TRUE }T
+
+T{ 1. D0= -> FALSE }T
+T{ MIN-INTD 0 D0= -> FALSE }T
+T{ MAX-2INT D0= -> FALSE }T
+T{ -1 MAX-INTD D0= -> FALSE }T
+T{ 0. D0= -> TRUE }T
+T{ -1. D0= -> FALSE }T
+T{ 0 MIN-INTD D0= -> FALSE }T
+
+TESTING D2* D2/
+
+T{ 0. D2* -> 0. D2* }T
+T{ MIN-INTD 0 D2* -> 0 1 }T
+T{ HI-2INT D2* -> MAX-2INT 1. D- }T
+T{ LO-2INT D2* -> MIN-2INT }T
+
+T{ 0. D2/ -> 0. }T
+T{ 1. D2/ -> 0. }T
+T{ 0 1 D2/ -> MIN-INTD 0 }T
+T{ MAX-2INT D2/ -> HI-2INT }T
+T{ -1. D2/ -> -1. }T
+T{ MIN-2INT D2/ -> LO-2INT }T
+
+TESTING D< D=
+
+T{ 0. 1. D< -> TRUE }T
+T{ 0. 0. D< -> FALSE }T
+T{ 1. 0. D< -> FALSE }T
+T{ -1. 1. D< -> TRUE }T
+T{ -1. 0. D< -> TRUE }T
+T{ -2. -1. D< -> TRUE }T
+T{ -1. -2. D< -> FALSE }T
+T{ 0 1 1. D< -> FALSE }T
+T{ 1. 0 1 D< -> TRUE }T
+T{ 0 -1 1 -2 D< -> FALSE }T
+T{ 1 -2 0 -1 D< -> TRUE }T
+T{ -1. MAX-2INT D< -> TRUE }T
+T{ MIN-2INT MAX-2INT D< -> TRUE }T
+T{ MAX-2INT -1. D< -> FALSE }T
+T{ MAX-2INT MIN-2INT D< -> FALSE }T
+T{ MAX-2INT 2DUP -1. D+ D< -> FALSE }T
+T{ MIN-2INT 2DUP 1. D+ D< -> TRUE }T
+T{ MAX-INTD S>D 2DUP 1. D+ D< -> TRUE }T
+
+T{ -1. -1. D= -> TRUE }T
+T{ -1. 0. D= -> FALSE }T
+T{ -1. 1. D= -> FALSE }T
+T{ 0. -1. D= -> FALSE }T
+T{ 0. 0. D= -> TRUE }T
+T{ 0. 1. D= -> FALSE }T
+T{ 1. -1. D= -> FALSE }T
+T{ 1. 0. D= -> FALSE }T
+T{ 1. 1. D= -> TRUE }T
+
+T{ 0 -1 0 -1 D= -> TRUE }T
+T{ 0 -1 0 0 D= -> FALSE }T
+T{ 0 -1 0 1 D= -> FALSE }T
+T{ 0 0 0 -1 D= -> FALSE }T
+T{ 0 0 0 0 D= -> TRUE }T
+T{ 0 0 0 1 D= -> FALSE }T
+T{ 0 1 0 -1 D= -> FALSE }T
+T{ 0 1 0 0 D= -> FALSE }T
+T{ 0 1 0 1 D= -> TRUE }T
+
+T{ MAX-2INT MIN-2INT D= -> FALSE }T
+T{ MAX-2INT 0. D= -> FALSE }T
+T{ MAX-2INT MAX-2INT D= -> TRUE }T
+T{ MAX-2INT HI-2INT D= -> FALSE }T
+T{ MAX-2INT MIN-2INT D= -> FALSE }T
+T{ MIN-2INT MIN-2INT D= -> TRUE }T
+T{ MIN-2INT LO-2INT D= -> FALSE }T
+T{ MIN-2INT MAX-2INT D= -> FALSE }T
+
+TESTING 2LITERAL 2VARIABLE
+
+T{ : CD3 [ MAX-2INT ] 2LITERAL ; -> }T
+T{ CD3 -> MAX-2INT }T
+T{ 2VARIABLE 2V1 -> }T
+T{ 0. 2V1 2! -> }T
+T{ 2V1 2@ -> 0. }T
+T{ -1 -2 2V1 2! -> }T
+T{ 2V1 2@ -> -1 -2 }T
+T{ : CD4 2VARIABLE ; -> }T
+T{ CD4 2V2 -> }T
+T{ : CD5 2V2 2! ; -> }T
+T{ -2 -1 CD5 -> }T
+T{ 2V2 2@ -> -2 -1 }T
+T{ 2VARIABLE 2V3 IMMEDIATE 5 6 2V3 2! -> }T
+T{ 2V3 2@ -> 5 6 }T
+T{ : CD7 2V3 [ 2@ ] 2LITERAL ; CD7 -> 5 6 }T
+T{ : CD8 [ 6 7 ] 2V3 [ 2! ] ; 2V3 2@ -> 6 7 }T
+
+TESTING DMAX DMIN
+
+T{ 1. 2. DMAX -> 2. }T
+T{ 1. 0. DMAX -> 1. }T
+T{ 1. -1. DMAX -> 1. }T
+T{ 1. 1. DMAX -> 1. }T
+T{ 0. 1. DMAX -> 1. }T
+T{ 0. -1. DMAX -> 0. }T
+T{ -1. 1. DMAX -> 1. }T
+T{ -1. -2. DMAX -> -1. }T
+
+T{ MAX-2INT HI-2INT DMAX -> MAX-2INT }T
+T{ MAX-2INT MIN-2INT DMAX -> MAX-2INT }T
+T{ MIN-2INT MAX-2INT DMAX -> MAX-2INT }T
+T{ MIN-2INT LO-2INT DMAX -> LO-2INT }T
+
+T{ MAX-2INT 1. DMAX -> MAX-2INT }T
+T{ MAX-2INT -1. DMAX -> MAX-2INT }T
+T{ MIN-2INT 1. DMAX -> 1. }T
+T{ MIN-2INT -1. DMAX -> -1. }T
+
+
+T{ 1. 2. DMIN -> 1. }T
+T{ 1. 0. DMIN -> 0. }T
+T{ 1. -1. DMIN -> -1. }T
+T{ 1. 1. DMIN -> 1. }T
+T{ 0. 1. DMIN -> 0. }T
+T{ 0. -1. DMIN -> -1. }T
+T{ -1. 1. DMIN -> -1. }T
+T{ -1. -2. DMIN -> -2. }T
+
+T{ MAX-2INT HI-2INT DMIN -> HI-2INT }T
+T{ MAX-2INT MIN-2INT DMIN -> MIN-2INT }T
+T{ MIN-2INT MAX-2INT DMIN -> MIN-2INT }T
+T{ MIN-2INT LO-2INT DMIN -> MIN-2INT }T
+
+T{ MAX-2INT 1. DMIN -> 1. }T
+T{ MAX-2INT -1. DMIN -> -1. }T
+T{ MIN-2INT 1. DMIN -> MIN-2INT }T
+T{ MIN-2INT -1. DMIN -> MIN-2INT }T
+
+TESTING D>S DABS
+
+T{ 1234 0 D>S -> 1234 }T
+T{ -1234 -1 D>S -> -1234 }T
+T{ MAX-INTD 0 D>S -> MAX-INTD }T
+T{ MIN-INTD -1 D>S -> MIN-INTD }T
+
+T{ 1. DABS -> 1. }T
+T{ -1. DABS -> 1. }T
+T{ MAX-2INT DABS -> MAX-2INT }T
+T{ MIN-2INT 1. D+ DABS -> MAX-2INT }T
+
+TESTING M+ M*/
+
+T{ HI-2INT 1 M+ -> HI-2INT 1. D+ }T
+T{ MAX-2INT -1 M+ -> MAX-2INT -1. D+ }T
+T{ MIN-2INT 1 M+ -> MIN-2INT 1. D+ }T
+T{ LO-2INT -1 M+ -> LO-2INT -1. D+ }T
+
+
+: ?$8000 [ -3 2 / -2 = ] LITERAL IF 1. D- THEN ;
+
+T{ 5. 7 11 M*/ -> 3. }T
+T{ 5. -7 11 M*/ -> -3. ?$8000 }T
+T{ -5. 7 11 M*/ -> -3. ?$8000 }T
+T{ -5. -7 11 M*/ -> 3. }T
+T{ MAX-2INT 8 16 M*/ -> HI-2INT }T
+T{ MAX-2INT -8 16 M*/ -> HI-2INT DNEGATE ?$8000 }T
+T{ MIN-2INT 8 16 M*/ -> LO-2INT }T
+T{ MIN-2INT -8 16 M*/ -> LO-2INT DNEGATE }T
+T{ MAX-2INT MAX-INTD MAX-INTD M*/ -> MAX-2INT }T
+T{ MAX-2INT MAX-INTD 2/ MAX-INTD M*/ -> MAX-INTD 1- HI-2INT NIP }T
+T{ MIN-2INT LO-2INT NIP 1+ DUP 1- NEGATE M*/ -> 0 MAX-INTD 1- }T
+T{ MIN-2INT LO-2INT NIP 1- MAX-INTD M*/ -> MIN-INTD 3 + HI-2INT NIP 2 + }T
+T{ MAX-2INT LO-2INT NIP DUP NEGATE M*/ -> MAX-2INT DNEGATE }T
+T{ MIN-2INT MAX-INTD DUP M*/ -> MIN-2INT }T
+
+TESTING D. D.R
+
+MAX-2INT 71 73 M*/ 2CONSTANT DBL1
+MIN-2INT 73 79 M*/ 2CONSTANT DBL2
+
+: D>ASCII ( D -- CADDR U )
+ DUP >R <# DABS #S R> SIGN #> ( -- CADDR1 U )
+ HERE SWAP 2DUP 2>R CHARS DUP ALLOT MOVE 2R>
+;
+
+DBL1 D>ASCII 2CONSTANT "DBL1"
+DBL2 D>ASCII 2CONSTANT "DBL2"
+
+: DOUBLEOUTPUT
+ CR ." You should see lines duplicated:" CR
+ 5 SPACES "DBL1" TYPE CR
+ 5 SPACES DBL1 D. CR
+ 8 SPACES "DBL1" DUP >R TYPE CR
+ 5 SPACES DBL1 R> 3 + D.R CR
+ 5 SPACES "DBL2" TYPE CR
+ 5 SPACES DBL2 D. CR
+ 10 SPACES "DBL2" DUP >R TYPE CR
+ 5 SPACES DBL2 R> 5 + D.R CR
+;
+
+T{ DOUBLEOUTPUT -> }T
+
+TESTING 2ROT DU< (Double Number extension words)
+
+T{ 1. 2. 3. 2ROT -> 2. 3. 1. }T
+T{ MAX-2INT MIN-2INT 1. 2ROT -> MIN-2INT 1. MAX-2INT }T
+
+T{ 1. 1. DU< -> FALSE }T
+T{ 1. -1. DU< -> TRUE }T
+T{ -1. 1. DU< -> FALSE }T
+T{ -1. -2. DU< -> FALSE }T
+T{ 0 1 1. DU< -> FALSE }T
+T{ 1. 0 1 DU< -> TRUE }T
+T{ 0 -1 1 -2 DU< -> FALSE }T
+T{ 1 -2 0 -1 DU< -> TRUE }T
+
+T{ MAX-2INT HI-2INT DU< -> FALSE }T
+T{ HI-2INT MAX-2INT DU< -> TRUE }T
+T{ MAX-2INT MIN-2INT DU< -> TRUE }T
+T{ MIN-2INT MAX-2INT DU< -> FALSE }T
+T{ MIN-2INT LO-2INT DU< -> TRUE }T
+
+TESTING 2VALUE
+
+T{ 1111 2222 2VALUE 2VAL -> }T
+T{ 2VAL -> 1111 2222 }T
+T{ 3333 4444 TO 2VAL -> }T
+T{ 2VAL -> 3333 4444 }T
+T{ : TO-2VAL TO 2VAL ; 5555 6666 TO-2VAL -> }T
+T{ 2VAL -> 5555 6666 }T
+
+
+CR .( End of Double-Number word tests) CR
--- /dev/null
+
+; ---------------------------------
+; FF_SPECS.4th for MSP_EXP430FR5994
+; ---------------------------------
+
+ CODE ABORT_FF_SPECS
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ RST_RET
+ ;
+
+ ABORT_FF_SPECS
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV 2(R15),R14
+ MOV R10,2(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0<
+ [IF]
+ CODE 0<
+ ADD R14,R14
+ SUBC R14,R14
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @R15+,R14
+ U< ?GOTO FW1
+ 0<> IF
+BW1 MOV #-1,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE U>
+ SUB @R15+,R14
+ U< ?GOTO BW1
+FW1 AND #0,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] BEGIN
+ [IF]
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] WHILE
+ [IF]
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] REPEAT
+ [IF]
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #$4032,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2*
+ [IF]
+ CODE 2*
+ ADD R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
+ PUSH #DROP
+ MOV #$403E,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV R14,R10
+ MOV @R15+,R8
+ MOV @R15+,R9
+ MOV @R15+,R14
+ CMP #0,R10
+ 0<> IF
+ CMP R9,R8
+ 0<> IF
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ THEN
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+
+ [THEN]
+
+ : WORDS
+ $1CE4
+ $180C @ 2*
+ MOVE
+ BEGIN
+ 0 DUP
+ $180C @ 2* 0
+ DO
+ DUP I $1CE4 + @
+ U< IF
+ DROP DROP
+ I DUP $1CE4 + @
+ THEN
+ 2 +LOOP
+ ?DUP
+ WHILE
+ DUP
+ 2 - @
+ ROT
+ $1CE4 +
+ !
+ COUNT 2/
+ DUP >R TYPE
+ $10 R> - SPACES
+ REPEAT
+ DROP
+ ;
+
+ [UNDEFINED] CASE
+ [IF]
+ : CASE
+ 0
+ ; IMMEDIATE
+
+ : OF
+ 1+
+ >R
+ POSTPONE OVER
+ POSTPONE =
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
+
+ : ENDOF
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
+
+ : ENDCASE
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] S_
+ [IF]
+ CODE S_
+ MOV #0,&$1DC0
+ COLON
+ $401E ,
+ $20 WORD
+ HI2LO
+ MOV.B @R14,R14
+ ADD #1,R14
+ BIT #1,R14
+ ADDC R14,&$1DC8
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV #$20,&$1DC0
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ESC
+ [IF]
+ CODE ESC
+ CMP #0,&$1DBC
+ 0= IF MOV @R13+,R0
+ THEN
+ COLON
+ $1B
+ POSTPONE LITERAL
+ POSTPONE EMIT
+ POSTPONE S_
+ POSTPONE TYPE
+ ; IMMEDIATE
+ [THEN]
+
+ [DEFINED] FORTH
+ [IF]
+ CODE BODY>SQNFA
+ SUB #2,R15
+ SUB #4,R14
+ MOV R14,R8
+ MOV R8,R9
+ BEGIN
+ SUB #2,R9
+ MOV R9,0(R15)
+ MOV.B @R9+,R14
+ RRA R14
+ MOV R14,R10
+ BIT #1,R10
+ 0= IF
+ ADD #1,R10
+ THEN
+ ADD R9,R10
+ CMP R10,R8
+ 0<> WHILE
+ MOV @R15,R9
+ REPEAT
+ MOV R9,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ : SPECS
+ RST_RET
+ ECHO
+ ESC [8;42;80t
+
+ ESC [7m
+ CR ." FastForth V"
+ $180A @
+ 0 <# # $08 HOLD # '.' HOLD #S #> TYPE
+ ." for MSP430FR"
+ HERE
+ $1A04 @
+ CASE
+
+ $8102 OF ." 5738," $C200 ENDOF
+ $8103 OF ." 5739," $C200 ENDOF
+ $810D OF ." 5986," $4400 ENDOF
+ $8160 OF ." 5948," $4400 ENDOF
+ $8169 OF ." 5969," $4400 ENDOF
+ $81A8 OF ." 6989," $4400 ENDOF
+ $81F0 OF ." 4133," $C400 ENDOF
+ $8240 OF ." 2433," $C400 ENDOF
+ $825D OF ." 5972," $4400 ENDOF
+ $82A1 OF ." 5994," $4000 ENDOF
+ $82A6 OF ." 5962," $4000 ENDOF
+ $830C OF ." 2355," $8000 ENDOF
+ $830D OF ." 2353," $C000 ENDOF
+ $831E OF ." 2155," $8000 ENDOF
+ $831D OF ." 2153," $C000 ENDOF
+ $832A OF ." 2476," $8000 ENDOF
+ $832B OF ." 2475," $8000 ENDOF
+ $833C OF ." 2633," $C400 ENDOF
+ $833D OF ." 2533," $C400 ENDOF
+ ABORT" xxxx <-- unrecognized device!"
+ ENDCASE
+ ['] ['] DUP @ $1284 =
+ IF ." DTC=1," DROP
+ ELSE 2 + @ $1284 =
+ IF ." DTC=2,"
+ ELSE ." DTC=3,"
+ THEN
+ THEN
+ $20 EMIT
+ $180C @ U. $08 EMIT
+ ." -Entry word set, "
+ $1800 @ 0 1000 UM/MOD U.
+ ?DUP IF $08 EMIT ',' EMIT U.
+ THEN ." MHz, "
+ - U. ." bytes"
+ ESC [0m
+
+ CR
+ ." /COUNTED-STRING = 255" CR
+ ." /HOLD = 34" CR
+ ." /PAD = 84" CR
+ ." ADDRESS-UNIT-BITS = 16" CR
+ ." FLOORED DIVISION = "
+ $180E @
+ 0< IF ." true"
+ ELSE ." false"
+ THEN CR
+ ." MAX-CHAR = 255" CR
+ ." MAX-N = 32767" CR
+ ." MAX-U = 65535" CR
+ ." MAX-D = 2147483647" CR
+ ." MAX-UD = 4294967295" CR
+ ." STACK-CELLS = 48" CR
+ ." RETURN-STACK-CELLS= 48" CR
+ ." Definitions are forced to UPPERCASE." CR
+
+ CR ESC [7m ." Kernel add-ons" ESC [0m CR
+ $180E @
+ 2* DUP 0< IF ." 32.768kHz LF XTAL" CR THEN
+ 2* DUP 0< IF ." /RTS /CTS " 2*
+ ELSE 2* DUP
+ 0< IF ." /RTS " THEN
+ THEN
+ 2* DUP 0< IF ." XON/XOFF " THEN
+ 2* DUP 0< IF ." Half-Duplex " THEN
+ 2* DUP 0< IF ." I2C_Master TERMINAL"
+ ELSE ." UART TERMINAL" THEN CR
+ 2* DUP 0< IF 2* DUP 0< IF ." DOUBLE and "
+ THEN ." Q15.16 numbers handling" CR
+ ELSE 2* DUP 0< IF ." DOUBLE numbers handling" CR
+ THEN
+ THEN
+ 2* DUP 0< IF ." MSP430_X assembler with TI's syntax"
+ CR 2* 2*
+ ELSE
+ 2* DUP
+ 0< IF ." MSP430 Assembler"
+ 2* DUP
+ 0< IF ." , 20bits extended addresses,"
+ THEN
+ ELSE 2*
+ THEN
+ ." with TI's syntax" CR
+ THEN DROP
+ [DEFINED] FORTH [IF] ." word-set management" CR
+ [THEN]
+ [DEFINED] LOAD" [IF] ." SD_CARD Load" CR
+ [THEN]
+ [DEFINED] BOOT [IF] ." SD_CARD Bootloader" CR
+ [THEN]
+ [DEFINED] READ" [IF] ." SD_CARD Read/Write" CR
+ [THEN]
+
+ $1DCA
+ BEGIN
+ @ ?DUP
+ WHILE
+ DUP $180C @ 2* -
+ CR ESC [7m
+ [DEFINED] FORTH
+ [IF] DUP BODY>SQNFA
+ [ELSE] OVER @
+ IF S" hidden"
+ ELSE S" FORTH"
+ THEN
+ [THEN]
+ TYPE ." word-set"
+ ESC [0m CR
+ WORDS CR
+ REPEAT
+
+ CR ESC [7m ." EXTENSIONS" ESC [0m
+ [DEFINED] {CORE_ANS} [IF] CR ." core ANS94"
+ [THEN]
+ [DEFINED] {DOUBLE} [IF] CR ." DOUBLE word set"
+ [THEN]
+ [DEFINED] {UTILITY} [IF] CR ." UTILITY"
+ [THEN]
+ [DEFINED] {FIXPOINT} [IF] CR ." Q15.16 ADD SUB MUL DIV"
+ [THEN]
+ [DEFINED] {CORDIC} [IF] CR ." CORDIC engine"
+ [THEN]
+ [DEFINED] {SD_TOOLS} [IF] CR ." SD_TOOLS"
+ [THEN]
+ [DEFINED] {RTC} [IF] CR ." RTC utility"
+ [THEN]
+ [DEFINED] {UARTI2CS} [IF] CR ." UART to I2C_FastForth bridge"
+ [THEN]
+ CR
+ 0 SYS
+ ;
+
+SPECS
--- /dev/null
+
+ CODE ABORT_FIXPOINT
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$180E,R14
+ BIT #$100,R14
+ 0<> IF MOV #0,R14 THEN
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ABORT" build FastForth with Q15.16_INPUT addon !"
+ RST_RET
+ $1B EMIT $63 EMIT
+ ;
+
+ ABORT_FIXPOINT
+
+; -----------------------------------------------------
+; FIXPOINT.4th for MSP_EXP430FR5994
+; -----------------------------------------------------
+
+ MARKER {FIXPOINT}
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @R15+,R14
+ 0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DABS
+ [IF]
+ CODE DABS
+ AND #-1,R14
+ S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] HOLDS
+ [IF]
+ CODE HOLDS
+ MOV @R15+,R9
+BW3 ADD R14,R9
+ MOV &$1DB2,R8
+ BEGIN
+ SUB #1,R9
+ SUB #1,R14
+ U>= WHILE
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ REPEAT
+ MOV R8,&$1DB2
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE F+
+ ADD @R15+,2(R15)
+ ADDC @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE F-
+ SUB @R15+,2(R15)
+ SUBC R14,0(R15)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ $1A00 4 + @ $81F3 U<
+ $81EF $1A00 4 + @ U<
+ = [IF] ; MSP430FR413x subfamily without hardware_MPY
+
+ CODE UDM*
+ PUSH R13
+ PUSHM #4,R7
+ MOV 4(R15),R13
+ MOV 2(R15),R11
+ MOV @R15,R10
+ MOV #0,R7
+ MOV #0,R6
+ MOV #0,4(R15)
+ MOV #0,2(R15)
+ MOV #0,R5
+ MOV #0,R4
+ MOV #1,R9
+ MOV #0,R8
+ BEGIN
+ CMP #0,R9
+ 0<> IF
+ BIT R9,R10
+ ELSE
+ BIT R8,R14
+ THEN
+ 0<> IF
+ ADD R13,4(R15)
+ ADDC R11,2(R15)
+ ADDC R7,R5
+ ADDC R6,R4
+ THEN
+ ADD R13,R13
+ ADDC R11,R11
+ ADDC R7,R7
+ ADDC R6,R6
+ ADD R9,R9
+ ADDC R8,R8
+ U>= UNTIL
+ MOV R5,0(R15)
+ MOV R4,R14
+ POPM #4,R7
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE F*
+ MOV 2(R15),R12
+ XOR R14,R12
+ BIT #$8000,2(R15)
+ 0<> IF
+ XOR #-1,2(R15)
+ XOR #-1,4(R15)
+ ADD #1,4(R15)
+ ADDC #0,2(R15)
+ THEN
+ COLON
+ DABS UDM*
+ HI2LO
+ MOV @R1+,R13
+ MOV @R15+,R14
+ MOV @R15+,0(R15)
+ AND #-1,R12
+ S< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE F#S
+ MOV @R15,R12
+ MOV #0,R11
+ PUSHM #3,R13
+ MOV 2(R15),0(R15)
+ MOV R14,2(R15)
+ BEGIN
+ MOV &$1DBE,R14
+ LO2HI
+ UM*
+ HI2LO
+ CMP #10,R14
+ U>= IF
+ ADD #7,R14
+ THEN
+ ADD #$30,R14
+ MOV @R1,R11
+ MOV.B R14,$1D90(R11)
+ ADD #1,R11
+ MOV R11,0(R1)
+ CMP 2(R15),R11
+ U>= UNTIL
+ POPM #3,R13
+ MOV R11,R14
+ MOV R12,2(R15)
+ MOV #0,0(R15)
+ MOV #$1D90,R9
+ GOTO BW3
+ ENDCODE
+
+ [ELSE] ; hardware multiplier
+
+ CODE F*
+ MOV 4(R15),&$4D4
+ MOV 2(R15),&$4D6
+ MOV @R15,&$4E0
+ MOV R14,&$4E2
+ ADD #4,R15
+ MOV &$4E6,0(R15)
+ MOV &$4E8,R14
+ MOV @R13+,R0
+ ENDCODE
+
+
+ CODE F#S
+ MOV 2(R15),R9
+ MOV @R15,2(R15)
+ MOV R9,0(R15)
+ MOV R14,R11
+ MOV #0,R12
+ BEGIN
+ MOV @R15,&$4C0
+ MOV &$1DBE,&$4C8
+ MOV &$4E4,0(R15)
+ MOV &$4E6,R14
+ CMP #10,R14
+ U>= IF
+ ADD #7,R14
+ THEN
+ ADD #$30,R14
+ MOV.B R14,$1D90(R12)
+ ADD #1,R12
+ CMP R11,R12
+ 0= UNTIL
+ MOV R11,R14
+ MOV #0,0(R15)
+ MOV #$1D90,R9
+ GOTO BW3
+ ENDCODE
+
+ [THEN] ; end of hardware/software multiplier
+
+ CODE F/
+ MOV R14,R8
+ MOV @R15+,R10
+ MOV @R15+,R9
+ MOV @R15,R11
+ PUSHM #5,R9
+ AND #-1,R8
+ S< IF
+ XOR #-1,R10
+ XOR #-1,R8
+ ADD #1,R10
+ ADDC #0,R8
+ THEN
+ AND #-1,R9
+ S< IF
+ XOR #-1,R11
+ XOR #-1,R9
+ ADD #1,R11
+ ADDC #0,R9
+ THEN
+ MOV R9,R7
+ MOV R11,R9
+ MOV #0,R11
+ MOV #0,R6
+ MOV #32,R5
+BW1 CMP R8,R6
+ 0= IF
+ CMP R10,R7
+ THEN
+ U>= IF
+ SUB R10,R7
+ SUBC R8,R6
+ THEN
+ BEGIN
+ ADDC R12,R12
+ ADDC R14,R14
+ SUB #1,R5
+ U>= WHILE
+ ADD R11,R11
+ ADDC R9,R9
+ ADDC R7,R7
+ ADDC R6,R6
+ U< ?GOTO BW1
+ SUB R10,R7
+ SUBC R8,R6
+ BIS #1,R2
+ REPEAT
+ POPM #5,R9
+ XOR R9,R8
+ CMP #0,R8
+ S< IF
+ XOR #-1,R12
+ XOR #-1,R14
+ ADD #1,R12
+ ADDC #0,R14
+ THEN
+ MOV R12,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE F.
+ MOV R14,R12
+ MOV #4,R11
+ MOV &$1DBE,R10
+ CMP #$0A,R10
+ 0= IF
+ ADD #1,R11
+ ELSE
+ CMP #2,R10
+ 0= IF
+ MOV #$10,R11
+ THEN
+ THEN
+ PUSHM #3,R13
+ LO2HI
+ <# DABS
+ R> F#S
+ $2C HOLD
+ #S
+ R> SIGN #>
+ TYPE $20 EMIT
+ ;
+
+ CODE S>F
+ SUB #2,R15
+ MOV #0,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ RST_SET
+
+; -----------------------
+; complement (volatile) for tests below
+; -----------------------
+
+ [UNDEFINED] !
+ [IF]
+ CODE !
+ MOV @R15+,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DOES>
+ [IF]
+ CODE DOES>
+ MOV &$1DB8,R10
+ MOV #$1285,0(R10)
+ MOV R13,2(R10)
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2CONSTANT
+ [IF]
+ : 2CONSTANT
+ CREATE , ,
+ DOES>
+ HI2LO
+ SUB #2,R15
+ MOV 2(R14),0(R15)
+ MOV @R14,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] D.
+ [IF]
+ CODE D.
+ MOV #U.,R10
+ ADD #10,R10
+ MOV R10,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ ECHO
+
+; -----------------------
+; (volatile) tests for FIXPOINT.asm|FIXPOINT.4th for MSP_EXP430FR5994
+; -----------------------
+
+3,14159 2CONSTANT PI
+PI -1,0 F* 2CONSTANT -PI
+
+PI D. ; D. is not appropriate -->
+-PI D. ; D. is not appropriate -->
+
+PI F. ; F. is a good choice! --->
+-PI F. ; F. is a good choice! --->
+
+$10 BASE ! PI F.
+ -PI F.
+%10 BASE ! PI F.
+ -PI F.
+#10 BASE ! PI F.
+ -PI F.
+
+ PI 2,0 F* F.
+ PI -2,0 F* F.
+-PI 2,0 F* F.
+-PI -2,0 F* F.
+
+ PI 2,0 F/ F.
+ PI -2,0 F/ F.
+-PI 2,0 F/ F.
+-PI -2,0 F/ F.
+
+ 32768,0 1,0 F* F. ; overflow! -->
+ 32768,0 1,0 F/ F. ; overflow! -->
+-32768,0 -1,0 F* F. ; overflow! -->
+-32768,0 -1,0 F/ F. ; overflow! -->
+
+32767,99999 1,0 F* F.
+32767,99999 1,0 F/ F.
+32767,99999 2,0 F/ F.
+32767,99999 4,0 F/ F.
+32767,99999 8,0 F/ F.
+32767,99999 16,0 F/ F.
+
+-32768,0 -2,0 F/ F.
+-32768,0 -4,0 F/ F.
+-32768,0 -8,0 F/ F.
+-32768,0 -16,0 F/ F.
+-32768,0 -32,0 F/ F.
+-32768,0 -64,0 F/ F.
+
+-3276,80 -1,0 F/ F.
+-327,680 -1,0 F/ F.
+-32,7680 -1,0 F/ F.
+-3,27680 -1,0 F/ F.
+-0,32768 -1,0 F/ F.
+
+; SQRT(32768)^2 = 32768
+ 181,01933598375 181,01933598375 F* F.
+ 181,01933598375 -181,01933598375 F* F.
+-181,01933598375 181,01933598375 F* F.
+-181,01933598375 -181,01933598375 F* F.
+
+RST_RET
--- /dev/null
+
+; -----------
+; SD_TEST.4th for MSP_EXP430FR5994
+; -----------
+
+ CODE ABORT_SD_TEST
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ [UNDEFINED] WRITE
+ [IF]
+ 1 ABORT" no SD_CARD_READ_WRITE addon!"
+ [THEN]
+ RST_RET
+ ;
+
+ ABORT_SD_TEST
+
+ MARKER {SD_TEST}
+
+ [UNDEFINED] EXIT
+ [IF]
+ CODE EXIT
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,R14
+ SUBC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] BEGIN
+ [IF]
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF]
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] STATE
+ [IF]
+ $1DBC CONSTANT STATE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ [UNDEFINED] DUMP
+ [IF]
+ CODE DUMP
+ PUSH R13
+ PUSH &BASE
+ MOV #$10,&BASE
+ ADD @R15,R14
+ LO2HI
+ SWAP
+ DO
+ I 4 U.R SPACE
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ CR
+ $10 +LOOP
+ R> BASE !
+ ;
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #BEGIN,R0
+ ENDCODE
+ [THEN]
+
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] = [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CASE
+ [IF]
+ : CASE
+ 0
+ ; IMMEDIATE
+
+ : OF
+ 1+
+ >R
+ POSTPONE OVER
+ POSTPONE =
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
+
+ : ENDOF
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
+
+ : ENDCASE
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ CODE SD_EMIT
+ CMP #$200,&$201E
+ U>= IF
+ CALL &WRITE+2
+ THEN
+ MOV &$201E,R8
+ MOV.B R14,$1E00(R8)
+ ADD #1,&$201E
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+: DOESWRITE
+ ['] SD_EMIT IS EMIT
+ $4000 HERE OVER - DUMP
+ ['] EMIT >BODY IS EMIT
+ CLOSE
+ ." , done"
+;
+
+ : SD_TEST
+ ECHO
+ $0D EMIT
+ ." ? Fast Forth Specifs" CR
+ ." 0 Set date and time" CR
+ ." 1 Load {UTILTY} words" CR
+ ." 2 Load {SD_TOOLS} words" CR
+ ." 3 Load {CORE_COMP} words" CR
+ ." 4 Load ANS core tests" CR
+ ." 5 Load a 10k program " CR
+ ." 6 Read only this source file" CR
+ ." 7 write FORTH dump in YOURFILE.TXT" CR
+ ." 8 append FORTH dump to YOURFILE.TXT" CR
+ ." 9 Load TST_WORDS" CR
+ ." your choice : "
+ KEY DUP EMIT CR
+ {SD_TEST}
+ CASE
+ '?' OF LOAD" FF_SPECS.4TH" ENDOF
+ '0' OF LOAD" RTC.4TH" ENDOF
+ '1' OF LOAD" UTILITY.4TH" ENDOF
+ '2' OF LOAD" SD_TOOLS.4TH" ENDOF
+ '3' OF LOAD" CORE_ANS.4TH" ENDOF
+ '4' OF LOAD" CORETEST.4TH" ENDOF
+ '5' OF LOAD" PROG10K.4TH" ENDOF
+ '6' OF READ" PROG10K.4TH"
+ BEGIN READ
+ UNTIL ." , done" ENDOF
+ '7' OF ECHO
+ WRITE" YOURFILE.TXT"
+ DOESWRITE ENDOF
+ '8' OF ECHO
+ APPEND" YOURFILE.TXT"
+ DOESWRITE ENDOF
+ '9' OF LOAD" TSTWORDS.4TH" ENDOF
+ ENDCASE
+ ;
+
+ [THEN]
+
+SD_TEST
--- /dev/null
+
+; -----------------------------------------------------------------------
+; TEST_ASM.4th for MSP_EXP430FR5994
+; -----------------------------------------------------------------------
+
+ CODE ABORT_TEST_ASM
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ RST_RET
+ ;
+
+ ABORT_TEST_ASM
+
+ MARKER {TEST_ASM}
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ MOV R7,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF]
+
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] VARIABLE
+ [IF]
+ : VARIABLE
+ CREATE
+ HI2LO
+ MOV #$1287,-4(R10)
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DEFER
+ [IF]
+
+ : DEFER
+ CREATE
+ HI2LO
+ MOV #$4030,-4(R10)
+ MOV #$40B4,-2(R10)
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ PUSH R14
+ MOV @R15,R14
+ MOV @R1+,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] BEGIN
+ [IF]
+
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+ DEFER CR
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] DUMP
+ [IF]
+ CODE DUMP
+ PUSH R13
+ PUSH &BASE
+ MOV #$10,&$1DBE
+ ADD @R15,R14
+ LO2HI
+ SWAP
+ DO CR
+ I 4 U.R SPACE
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> BASE !
+ ;
+ [THEN]
+
+ CODE TESTPUSHM
+BW1
+ MOV #22222,R8
+ MOV #3,R9
+ MOV #2,R10
+ MOV #1,R11
+ MOV #0,R12
+
+ PUSHM #4,R13
+ POPM #4,R13
+ SUB #10,R15
+ MOV R14,8(R15)
+ MOV R12,6(R15)
+ MOV R11,4(R15)
+ MOV R10,2(R15)
+ MOV R9,0(R15)
+ MOV R8,R14
+ RRAM #1,R14
+ RLAM #2,R14
+ RRCM #1,R14
+ RRUM #1,R14
+ COLON
+ space . . . . .
+ ;
+
+ TESTPUSHM ; you should see 11111 3 2 1 0 -->
+
+ CODE TESTPOPM
+ GOTO BW1
+ ENDCODE
+
+ TESTPOPM ; you should see 11111 3 2 1 0 -->
+
+
+
+ CODE TEST1
+
+ MOV &BASE,&BASE
+ CMP #%10,&BASE
+ 0<> IF MOV #2,&BASE
+ ELSE MOV #$0A,&BASE
+ THEN
+ COLON
+ BASE @ U.
+ ;
+
+
+ : TEST2
+ BASE @ U.
+ HI2LO
+
+
+ CMP #2, &BASE
+ 0<> IF MOV #2, &BASE
+ ELSE MOV #10,&BASE
+ THEN
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE TEST3
+ CMP #2, &BASE
+ 0<> IF MOV #2, &BASE
+ ELSE MOV #10,&BASE
+ THEN COLON
+ BASE @ U.
+ ;
+
+
+: TEST5
+ SPACE
+ HI2LO
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV #%1010,R14
+BEGIN SUB #$0001,R14
+ LO2HI
+
+ DUP U.
+ HI2LO
+ CMP #0,R14
+0= UNTIL MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ENDCODE
+
+TEST5 ; you should see : 9 8 7 6 5 4 3 2 1 0 -->
+
+
+
+[UNDEFINED] C, [IF]
+CODE C,
+MOV &$1DC8,R10
+MOV.B R14,0(R10)
+ADD #1,&$1DC8
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] C@ [IF]
+CODE C@
+MOV.B @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+: BYTES_TABLE_IDX
+CREATE
+0 DO I C,
+LOOP
+DOES>
++
+;
+
+8 BYTES_TABLE_IDX BYTES_TABLE
+
+2 BYTES_TABLE C@ . ; you should see 2 -->
+
+
+VARIABLE BYTES_TABLE1
+
+$0201 BYTES_TABLE1 !
+
+CODE IDX_TEST1
+ MOV.B BYTES_TABLE1(R14),R14
+COLON
+ U.
+;
+
+0 IDX_TEST1 ; you should see 1 -->
+
+CODE TEST6
+ MOV 0(R15),0(R15)
+ MOV @R13+,R0
+ENDCODE
+
+
+1 TEST6 . ; you should see 1 -->
+
+
+
+
+
+CREATE TABLE0
+0 C,
+1 C,
+2 C,
+3 C,
+
+
+CREATE TABLE10
+$10 C,
+$11 C,
+$12 C,
+$13 C,
+
+
+
+CREATE TABLE20
+$20 C,
+$21 C,
+$22 C,
+$23 C,
+
+
+CREATE TABLE
+
+
+TABLE 2 - CONSTANT PFA_TABLE
+
+
+CODE REDIRECT ; <table> -- redirects TABLE to argument <table>
+MOV R14,&PFA_TABLE
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+
+
+CODE REDIRECT0 ; -- redirects TABLE to TABLE0
+MOV #TABLE0,&PFA_TABLE
+MOV @R13+,R0
+ENDCODE
+
+
+CODE REDIRECT10 ; -- redirects TABLE to TABLE10
+MOV #TABLE10,&PFA_TABLE
+MOV @R13+,R0
+ENDCODE
+
+
+CODE REDIRECT20 ; -- redirects TABLE to TABLE20
+MOV #TABLE20,&PFA_TABLE
+MOV @R13+,R0
+ENDCODE
+
+
+' TABLE0 10 DUMP
+
+' TABLE10 10 DUMP
+
+' TABLE20 10 DUMP
+
+
+TABLE0 REDIRECT TABLE 10 DUMP
+
+TABLE10 REDIRECT TABLE 10 DUMP
+
+TABLE20 REDIRECT TABLE 10 DUMP
+
+
+REDIRECT0 TABLE 10 DUMP
+
+REDIRECT10 TABLE 10 DUMP
+
+REDIRECT20 TABLE 10 DUMP
+
+
+TABLE0 PFA_TABLE ! TABLE 10 DUMP
+
+TABLE10 PFA_TABLE ! TABLE 10 DUMP
+
+TABLE20 PFA_TABLE ! TABLE 10 DUMP
+
+
+
+
+; -----------------------------------------------------------------------
+; create a primary DEFERred assembly word
+; -----------------------------------------------------------------------
+
+
+DEFER TRUC ; here, TRUC is a secondary DEFERred word (i.e. without BODY)
+
+
+CODENNM ; does DUP
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE ; leaves its execution address (CFA) on stack
+
+DUP .
+
+IS TRUC ; TRUC becomes a primary DEFERred word
+ ; with its default action (DUP) located at its BODY addresse.
+
+TRUC . ; display R14 value -->
+
+
+
+' TRUC >BODY IS TRUC ; TRUC is reinitialized with its default action
+
+
+TRUC . ; display R14 value -->
+
+
+
+
+
--- /dev/null
+
+
+MARKER {PID}
+
+[UNDEFINED] VARIABLE [IF]
+: VARIABLE
+CREATE
+HI2LO
+MOV @R1+,R13
+MOV #$1287,-4(R10)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] CONSTANT [IF]
+: CONSTANT
+CREATE
+HI2LO
+MOV R14,-2(R10)
+MOV @R15+,R14
+MOV @R1+,R13
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] STATE [IF]
+$1DBC CONSTANT STATE
+[THEN]
+
+[UNDEFINED] ROT [IF]
+CODE ROT
+MOV @R15,R10
+MOV R14,0(R15)
+MOV 2(R15),R14
+MOV R10,2(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SWAP [IF]
+CODE SWAP
+MOV @R15,R10
+MOV R14,0(R15)
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DUP [IF]
+CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ENDCODE
+
+CODE ?DUP
+CMP #0,R14
+0<> ?GOTO BW1
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] AND [IF]
+CODE AND
+AND @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] SPACE [IF]
+: SPACE
+$20 EMIT ;
+[THEN]
+
+[UNDEFINED] R> [IF]
+CODE R>
+MOV R7,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] @ [IF]
+CODE @
+MOV @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] ! [IF]
+CODE !
+MOV @R15+,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] C@ [IF]
+CODE C@
+MOV.B @R14,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 1+ [IF]
+CODE 1+
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] + [IF]
+CODE +
+ADD @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] - [IF]
+CODE -
+SUB @R15+,R14
+XOR #-1,R14
+ADD #1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] MAX [IF]
+CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ENDCODE
+
+CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE
+[THEN]
+
+
+[UNDEFINED] 2NIP [IF]
+CODE 2NIP
+MOV @R15,R9
+ADD #4,R15
+MOV R9,0(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2DUP [IF]
+CODE 2DUP
+SUB #4,R15
+MOV R14,2(R15)
+MOV 4(R15),0(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2SWAP [IF]
+CODE 2SWAP
+MOV @R15,R10
+MOV 4(R15),0(R15)
+MOV R10,4(R15)
+MOV R14,R10
+MOV 2(R15),R14
+MOV R10,2(R15)
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2ROT [IF]
+CODE 2ROT
+MOV 8(R15),R9
+MOV 6(R15),R8
+MOV 4(R15),8(R15)
+MOV 2(R15),6(R15)
+MOV @R15,4(R15)
+MOV R14,2(R15)
+MOV R9,0(R15)
+MOV R8,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2DROP [IF]
+CODE 2DROP
+ADD #2,R15
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2OVER [IF]
+CODE 2OVER
+SUB #4,R15
+MOV R14,2(R15)
+MOV 8(R15),0(R15)
+MOV 6(R15),R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] DABS [IF]
+CODE DABS
+AND #-1,R14
+U< IF
+ XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] 2@ [IF]
+
+
+ CODE 2@
+ SUB #2,R15
+ MOV 2(R14),0(R15)
+ MOV @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+[THEN]
+
+[UNDEFINED] 2! [IF]
+
+
+ CODE 2!
+ MOV @R15+,0(R14)
+ MOV @R15+,2(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+[THEN]
+
+CODE 2>R
+PUSH @R15+
+PUSH R14
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+
+CODE 2R@
+SUB #4,R15
+MOV R14,2(R15)
+MOV @R1,R14
+MOV 2(R1),0(R15)
+MOV @R13+,R0
+ENDCODE
+
+CODE 2R>
+SUB #4,R15
+MOV R14,2(R15)
+MOV @R1+,R14
+MOV @R1+,0(R15)
+MOV @R13+,R0
+ENDCODE
+
+[UNDEFINED] 2VARIABLE [IF]
+: 2VARIABLE
+CREATE 4 ALLOT
+;
+[THEN]
+
+[UNDEFINED] 2CONSTANT [IF]
+
+ : 2CONSTANT
+ CREATE , ,
+ DOES> 2@
+ ;
+[THEN]
+
+[UNDEFINED] <> [IF]
+CODE <>
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] = [IF]
+CODE =
+SUB @R15+,R14
+0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+THEN
+XOR #-1,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] U< [IF]
+CODE U<
+SUB @R15+,R14
+0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IF [IF]
+CODE IF
+SUB #2,R15
+MOV R14,0(R15)
+MOV &$1DC8,R14
+ADD #4,&$1DC8
+MOV #$40AC,0(R14)
+ADD #2,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] THEN [IF]
+CODE THEN
+MOV &$1DC8,0(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] ELSE [IF]
+CODE ELSE
+ADD #4,&$1DC8
+MOV &$1DC8,R10
+MOV #$40B2,-4(R10)
+MOV R10,0(R14)
+SUB #2,R10
+MOV R10,R14
+MOV @R13+,R0
+ENDCODE IMMEDIATE
+[THEN]
+
+[UNDEFINED] DEFER! [IF]
+CODE DEFER!
+MOV @R15+,2(R14)
+MOV @R15+,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+[UNDEFINED] IS [IF]
+: IS
+STATE @
+IF POSTPONE ['] POSTPONE DEFER!
+ELSE ' DEFER!
+THEN
+; IMMEDIATE
+[THEN]
+
+[UNDEFINED] >BODY [IF]
+CODE >BODY
+ADD #4,R14
+MOV @R13+,R0
+ENDCODE
+[THEN]
+
+CODE F+
+BW1 ADD @R15+,2(R15)
+ ADDC @R15+,R14
+ MOV @R13+,R0
+ENDCODE
+
+CODE F-
+BW1 SUB @R15+,2(R15)
+ SUBC R14,0(R15)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE
+
+CODE HOLDS
+BW3 MOV @R15+,R9
+ ADD R14,R9
+ MOV &$1DB2,R8
+BEGIN SUB #1,R9
+ SUB #1,R14
+U>= WHILE SUB #1,R8
+ MOV.B @R9,0(R8)
+REPEAT MOV R8,&$1DB2
+ MOV @R15+,R14
+ MOV @R13+,R0
+ENDCODE
+
+$1A00 4 + @ $81F3 U<
+$81EF $1A00 4 + @ U<
+= [IF] ; MSP430FR2xxx|MSP430FR4xxx subfamilies without hardware_MPY
+
+
+CODE F/
+ PUSHM #4,R7
+ MOV @R15+,R6
+ MOV @R15+,R9
+ MOV #0,R10
+ MOV @R15,R8
+ MOV #0,R11
+ MOV R9,R12
+ XOR R14,R12
+ AND #-1,R9
+S< IF XOR #-1,R8
+ XOR #-1,R9
+ ADD #1,R8
+ ADDC #0,R9
+THEN AND #-1,R14
+S< IF XOR #-1,R6
+ XOR #-1,R14
+ ADD #1,R6
+ ADDC #0,R14
+THEN
+ MOV #32,R5
+BW1 CMP R14,R10
+ 0= IF CMP R6,R9
+ THEN
+ U>= IF SUB R6,R9
+ SUBC R14,R10
+ THEN
+BW2 ADDC R7,R7
+ ADDC R4,R4
+ SUB #1,R5
+ 0< ?GOTO FW1
+ ADD R11,R11
+ ADDC R8,R8
+ ADDC R9,R9
+ ADDC R10,R10
+ U< ?GOTO BW1
+ SUB R6,R9
+ SUBC R14,R10
+ BIS #1,R2
+ GOTO BW2
+FW1
+ MOV R7,0(R15)
+ MOV R4,R14
+ POPM #4,R7
+BW1 AND #-1,R12
+S< IF XOR #-1,0(R15)
+ XOR #-1,R14
+ ADD #1,0(R15)
+ ADDC #0,R14
+THEN MOV @R13+,R0
+ENDCODE
+
+CODE F#S
+ MOV 2(R15),R9
+ MOV @R15,2(R15)
+ MOV R9,0(R15)
+ PUSHM #2,R14
+ MOV #0,R12
+BEGIN PUSH R12
+ MOV &$1DBE,R14
+ LO2HI
+ UM*
+ HI2LO
+ SUB #2,R13
+ CMP #10,R14
+ U>= IF ADD #7,R14
+ THEN ADD #$30,R14
+ MOV @R1+,R12
+ MOV.B R14,$1D90(R12)
+ ADD #1,R12
+ CMP 2(R1),R12
+U>= UNTIL
+ POPM #2,R14
+ MOV #0,0(R15)
+ SUB #2,R15
+ MOV #$1D90,0(R15)
+ GOTO BW3
+ENDCODE
+
+CODE UDM*
+ PUSH R13
+ PUSHM #4,R7
+ MOV 4(R15),R13
+ MOV 2(R15),R11
+ MOV @R15,R10
+ MOV #0,R4
+ MOV #0,R5
+ MOV #0,4(R15)
+ MOV #0,2(R15)
+ MOV #0,R6
+ MOV #0,R7
+ MOV #1,R9
+ MOV #0,R8
+BEGIN CMP #0,R9
+ 0<> IF BIT R9,R10
+ ELSE BIT R8,R14
+ THEN
+ 0<> IF ADD R13,4(R15)
+ ADDC R11,2(R15)
+ ADDC R4,R6
+ ADDC R5,R7
+ THEN ADD R13,R13
+ ADDC R11,R11
+ ADDC R4,R4
+ ADDC R5,R5
+ ADD R9,R9
+ ADDC R8,R8
+U>= UNTIL MOV R6,0(R15)
+ MOV R7,R14
+ POPM #4,R7
+ MOV @R1+,R13
+ MOV @R13+,R0
+ENDCODE
+
+CODE F*
+ MOV 2(R15),R12
+ XOR R14,R12
+ BIT #$8000,2(R15)
+0<> IF XOR #-1,2(R15)
+ XOR #-1,4(R15)
+ ADD #1,4(R15)
+ ADDC #0,2(R15)
+THEN
+ COLON
+ DABS UDM*
+ HI2LO
+ MOV @R1+,R13
+ MOV @R15+,R14
+ MOV @R15+,0(R15)
+ GOTO BW1
+ENDCODE
+
+[ELSE]
+
+CODE F/
+ PUSHM #4,R7
+ MOV @R15+,R6
+ MOV @R15+,R9
+ MOV #0,R10
+ MOV @R15,R8
+ MOV #0,R11
+ MOV R9,R12
+ XOR R14,R12
+ AND #-1,R9
+S< IF XOR #-1,R8
+ XOR #-1,R9
+ ADD #1,R8
+ ADDC #0,R9
+THEN AND #-1,R14
+S< IF XOR #-1,R6
+ XOR #-1,R14
+ ADD #1,R6
+ ADDC #0,R14
+THEN MOV #32,R5
+BW1 CMP R14,R10
+ 0= IF
+ CMP R6,R9
+ THEN
+ U>= IF
+ SUB R6,R9
+ SUBC R14,R10
+ THEN
+BW2 ADDC R7,R7
+ ADDC R4,R4
+ SUB #1,R5
+ 0< ?GOTO FW1
+ ADD R11,R11
+ ADDC R8,R8
+ ADDC R9,R9
+ ADDC R10,R10
+ U< ?GOTO BW1
+ SUB R6,R9
+ SUBC R14,R10
+ BIS #1,R2
+ GOTO BW2
+FW1 AND #-1,R12
+S< IF XOR #-1,R7
+ XOR #-1,R4
+ ADD #1,R7
+ ADDC #0,R4
+THEN MOV R7,0(R15)
+ MOV R4,R14
+ POPM #4,R7
+ MOV @R13+,R0
+ENDCODE
+
+CODE F#S
+ MOV 2(R15),R9
+ MOV @R15,2(R15)
+ MOV R9,0(R15)
+ MOV R14,R11
+ MOV #0,R12
+BEGIN MOV @R15,&$4C0
+ MOV &$1DBE,&$4C8
+ MOV &$4E4,0(R15)
+ MOV &$4E6,R14
+ CMP #10,R14
+ U>= IF ADD #7,R14
+ THEN ADD #$30,R14
+ MOV.B R14,$1D90(R12)
+ ADD #1,R12
+ CMP R11,R12
+0= UNTIL MOV #0,0(R15)
+ MOV R11,R14
+ SUB #2,R15
+ MOV #$1D90,0(R15)
+ GOTO BW3
+ENDCODE
+
+CODE F*
+ MOV 4(R15),&$4D4
+ MOV 2(R15),&$4D6
+ MOV @R15,&$4E0
+ MOV R14,&$4E2
+ ADD #4,R15
+ MOV &$4E6,0(R15)
+ MOV &$4E8,R14
+ MOV @R13+,R0
+ENDCODE
+
+[THEN]
+
+CODE F.N
+MOV R14,R11
+MOV @R15+,R14
+MOV R14,R12
+PUSHM #3,R13
+LO2HI
+ <# DABS
+ R> F#S
+ $2C HOLD
+ #S
+ R> SIGN #>
+ TYPE SPACE
+;
+
+
+CODE D<
+ MOV @R15+,R12
+ MOV @R15+,R11
+ MOV @R15+,R10
+BW1 CMP R14,R11
+ MOV #0,R14
+S< IF MOV #-1,R14
+THEN
+0= IF CMP R12,R10
+ S< IF MOV #-1,R14
+ THEN
+THEN
+MOV @R13+,R0
+ENDCODE
+
+CODE D>
+MOV R14,R11
+MOV @R15+,R10
+MOV @R15+,R14
+MOV @R15+,R12
+GOTO BW1
+ENDCODE
+
+CODE S2F
+ SUB #2,R15
+ MOV #0,0(R15)
+ MOV @R13+,R0
+ENDCODE
+
+: F2S
+ SWAP $8000 AND IF 1 + THEN ;
+
+: DMIN
+ 2OVER 2OVER
+ D< IF 2DROP ELSE 2NIP THEN
+;
+
+: DMAX
+ 2OVER 2OVER
+ D> IF 2DROP ELSE 2NIP THEN
+;
+
+: DRANGE
+ 2ROT DMIN DMAX
+;
+
+: RANGE
+ ROT MIN MAX
+;
+
+: F.000 3 F.N ;
+
+2VARIABLE KP
+2VARIABLE KI
+2VARIABLE KD
+VARIABLE SETPOINT
+
+VARIABLE SAMPLE_TIME
+VARIABLE OUT_MAX
+VARIABLE OUT_MIN
+VARIABLE OUT-OVERRIDE
+
+VARIABLE SET-VAL
+VARIABLE INPUT_PREV
+2VARIABLE I_SUM
+
+VARIABLE DEBUG
+0 DEBUG !
+
+: ?DEBUG DEBUG @ ;
+
+
+
+: CALC-R6
+KP 2@ F*
+?DEBUG IF ." Pval:" 2DUP F2S .
+THEN
+;
+
+
+: CALC-I
+KI 2@ F*
+I_SUM 2@ F+
+OUT_MIN @ S2F
+OUT_MAX @ S2F
+DRANGE
+2DUP I_SUM 2!
+?DEBUG IF ." Ival:" 2DUP F2S .
+THEN
+;
+
+: CALC-D
+
+ INPUT_PREV @ -
+ S2F KD 2@ F*
+?DEBUG IF ." Dval:" 2DUP F2S .
+THEN
+;
+
+: PID_COMPUTE
+DUP DUP SET-VAL @ SWAP - S2F
+2DUP CALC-R6
+2SWAP CALC-I F+
+ROT CALC-D F-
+
+F2S
+?DEBUG IF ." OUT:" DUP .
+THEN
+SWAP INPUT_PREV !
+OUT_MIN @ OUT_MAX @ RANGE
+?DEBUG IF ." PWM:" DUP .
+THEN
+;
+
+
+: SET
+ SET-VAL ! ;
+
+: TUNING
+
+
+ SAMPLE_TIME @ S2F 1000,0 F/ 2>R
+
+ 2R@ F/ KD 2!
+ 2R> F* KI 2!
+ KP 2! ;
+
+: PID-INIT
+ OUT_MAX !
+ OUT_MIN !
+ SAMPLE_TIME !
+ TUNING
+ 0 OUT-OVERRIDE !
+ CR ." PID initialized - kp:" KP 2@ F.000 ." ki:" KI 2@ F.000 ." kd:" KD 2@ F.000
+;
+
+: PID
+ OUT-OVERRIDE @ -1 = IF
+ PID_COMPUTE
+ ELSE
+ CR ." SET:" SET-VAL @ . ." IS:" DUP .
+ INPUT_PREV !
+ OUT-OVERRIDE @
+ ." PWM:" DUP .
+ THEN ;
+
+: MANUAL
+ OUT-OVERRIDE ! ;
+
+
+: AUTO
+ OUT-OVERRIDE @ -1 <> IF
+
+ OUT-OVERRIDE @
+ OUT_MIN @ OUT_MAX @ RANGE
+ S2F I_SUM 2!
+ -1 OUT-OVERRIDE !
+ THEN ;
+
+: AUTOHOLD
+ INPUT_PREV @ SET-VAL !
+ AUTO ;
+
+
+
+
+CODE STOP
+ MOV @R13+,R0
+ENDCODE
+
+CODE APP_INIT
+ MOV @R13+,R0
+ENDCODE
+
+CODE START
+ MOV @R13+,R0
+ENDCODE
+
+
+ECHO
--- /dev/null
+
+; -----------------------------------
+; PROG10K.4th for MSP_EXP430FR5994
+; -----------------------------------
+
+; load and compile 10kb (9 x RC52LCD)
+
+
+
+ CODE ABORT_RC5TOLCD
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ RST_RET
+ ;
+
+ ABORT_RC5TOLCD
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+ECHO
+
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+
--- /dev/null
+
+; -----------------------------------
+; RC5TOLCD.4th for MSP_EXP430FR5994
+; -----------------------------------
+
+
+ CODE ABORT_RC5TOLCD
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ RST_RET
+ ;
+
+ ABORT_RC5TOLCD
+
+ MARKER {RC5TOLCD}
+ 8 ALLOT
+
+
+
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ CODE 20_US
+ BEGIN
+ MOV &{RC5TOLCD}+6,R9
+ SUB #2,R9
+ BEGIN
+ MOV #0,R3
+ SUB #1,R9
+ 0= UNTIL
+ MOV #0,R3
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R15+,R14
+ MOV @R1+,R13
+ ENDCODE
+
+ CODE TOP_LCD
+ BIS.B #4,&$243
+ BIT.B #1,&$241
+ 0= IF
+ AND.B #$0F,R14
+ MOV.B R14,&$222
+ BIC.B #4,&$243
+ MOV @R15+,R14
+ MOV @R13+,R0
+ THEN
+ SUB #2,R15
+ MOV R14,0(R15)
+ BIC.B #4,&$243
+ MOV.B &$220,R14
+ AND.B #$0F,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LCD_WRC
+ BIS.B #2,&$243
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ RRUM #4,R14
+ BIC.B #1,&$243
+ BIS.B #$0F,&$224
+ COLON
+ TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
+ ;
+
+ CODE LCD_WRF
+ BIC.B #2,&$243
+ GOTO BW1
+ ENDCODE
+
+ : LCD_CLEAR $01 LCD_WRF 100 20_us ;
+ : LCD_HOME $02 LCD_WRF 100 20_us ;
+
+ HDNCODE WDT_INT
+ BIT.B #$20,&$240
+ 0= IF
+ CMP #19,&$3D6
+ U< IF
+ ADD #1,&$3D6
+ THEN
+ ELSE
+ BIT.B #$40,&$240
+ 0= IF
+ CMP #3,&$3D6
+ U>= IF
+ SUB #1,&$3D6
+ THEN
+ THEN
+ THEN
+ RETI
+ ENDCODE
+
+ HDNCODE RC5_INT
+ MOV #1778,R9
+ MOV #14,R10
+ BEGIN
+ MOV #%1011100100,&$380
+ RRUM #1,R9
+ MOV R9,R8
+ RRUM #1,R8
+ ADD R9,R8
+ BEGIN
+ CMP R8,&$390
+ U>= UNTIL
+ BIT.B #4,&$200
+ ADDC R11,R11
+ MOV.B &$200,&$208
+ BIC.B #4,&$20C
+ SUB #1,R10
+ 0<> WHILE
+ ADD R9,R8
+ BEGIN
+ MOV &$390,R9
+ CMP R8,R9
+ U>= ?GOTO FW1
+ BIT.B #4,&$20C
+ 0<> UNTIL
+ REPEAT
+ BIC #$30,&$380
+ RLAM #1,R11
+ MOV.B R11,R9
+ RRUM #2,R9
+ BIT #$4000,R11
+ 0= IF BIS #$40,R9
+ THEN
+ RRUM #3,R11
+ XOR @R1,R11
+ BIT #$400,R11
+ 0= ?GOTO FW2
+ XOR #$400,0(R1)
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1DBE,2(R15)
+ MOV #$10,&$1DBE
+ MOV R9,0(R15)
+ MOV #0,R14
+ LO2HI
+ LCD_CLEAR
+ <# # #S #36 HOLD #>
+ ['] LCD_WRC IS EMIT
+ TYPE
+ ['] EMIT >BODY IS EMIT
+ HI2LO
+ MOV @R15+,&$1DBE
+ MOV @R15+,R14
+FW1 BIC #$30,&$380
+FW2 BIC #%1111_1000,0(R1)
+ RETI
+ ENDCODE
+
+ HDNCODE STOP_R2L
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ BIC.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #0,&$3C0
+ MOV #0,&$340
+ MOV #0,&$342
+ MOV #{RC5TOLCD},R10
+ MOV #$4082,-2(R10)
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV @R10+,&UART_WARM+2
+ [ELSE]
+ MOV @R10+,&$4180+2
+ [THEN]
+ MOV @R10+,&$FFEA
+ MOV @R10+,&$FFDE
+ THEN
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE STOP
+BW1 CALL #STOP_R2L
+ COLON
+ ECHO
+ ." type START to start RC5toLCD"
+ ;
+
+ HDNCODE INIT_R2L
+ MOV #%10_1101_0100,&$3C0
+ $1800 @ 16000 =
+ [IF]
+ MOV #1,&$3A0
+ MOV #1,&$3E0
+ [THEN]
+ $1800 @ 24000 =
+ [IF]
+ MOV #2,&$3A0
+ MOV #2,&$3E0
+ [THEN]
+ MOV #19,&$3D2
+ MOV #%0110_0000,&$3C6
+ MOV #10,&$3D6
+ BIS.B #$20,&$204
+ BIS.B #$20,&$20A
+ BIS.B #7,&$245
+ BIC.B #7,&$247
+ BIS.B #$0F,&$224
+ BIC.B #$0F,&$226
+ BIS.B #4,&$20A
+ BIC.B #4,&$20C
+ MOV #%01_0001_0100,&$340
+ MOV ##3276,&$352
+ MOV #%10000,&$342
+ CALL &{RC5TOLCD}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ CMP #4,R14
+ 0= ?GOTO BW1
+ LO2HI
+ #1000 20_US
+ %011 TOP_LCD
+ #205 20_US
+ %011 TOP_LCD
+ #5 20_US
+ %011 TOP_LCD
+ #2 20_US
+ %010 TOP_LCD
+ #2 20_US
+ %00101000 LCD_WRF
+ %1000 LCD_WRF
+ LCD_CLEAR
+ %0110 LCD_WRF
+ %1100 LCD_WRF
+ LCD_CLEAR
+ HI2LO
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE START
+ CMP #WDT_INT,&$FFEA
+ 0= IF
+ MOV @R13+,R0
+ THEN
+ MOV #STOP_R2L,&{RC5TOLCD}-2
+ $180E $3C00 TSTBIT
+ [IF]
+ MOV &UART_WARM+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&UART_WARM+2
+ [ELSE]
+ MOV &$4180+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4180+2
+ [THEN]
+ MOV &$FFEA,&{RC5TOLCD}+2
+ MOV #WDT_INT,&$FFEA
+ MOV &$FFDE,&{RC5TOLCD}+4
+ MOV #RC5_INT,&$FFDE
+ SUB #6,R15
+ MOV R14,4(R15)
+ MOV &$1800,2(R15)
+ MOV #0,0(R15)
+ MOV #200,R14
+ CALL #$403E
+ MOV @R15,&{RC5TOLCD}+6
+ ADD #4,R15
+ MOV @R15+,R14
+ CALL #INIT_R2L
+ LO2HI
+ ." RC5toLCD is running,"
+ ." Type STOP to quit."
+ HI2LO
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+RST_SET
+ECHO
+
--- /dev/null
+
+ CODE ABORT_RTC
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$180E,R14
+ BIT #$4000,R14
+ 0<> IF MOV #0,R14 THEN
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ABORT" target without LF_XTAL !"
+ RST_RET
+ ;
+
+ ABORT_RTC
+
+; --------------------
+; RTC.4th for MSP_EXP430FR5994
+; --------------------
+
+
+ MARKER {RTC}
+
+ [UNDEFINED] OR
+ [IF]
+ CODE OR
+ BIS @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C!
+ [IF]
+ CODE C!
+ MOV.B @R15+,0(R14)
+ ADD #1,R15
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DEPTH
+ [IF]
+ CODE DEPTH
+ MOV R14,-2(R15)
+ MOV #$1C80,R14
+ SUB R15,R14
+ RRA R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1-
+ [IF]
+ CODE 1-
+ SUB #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @R15+,R14
+ 0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] BEGIN
+ [IF]
+
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] CASE
+ [IF]
+ : CASE
+ 0
+ ; IMMEDIATE
+
+ : OF
+ 1+
+ >R
+ POSTPONE OVER POSTPONE =
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
+
+ : ENDOF
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
+
+ : ENDCASE
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF]
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ [THEN]
+
+ [UNDEFINED] 2*
+ [IF]
+ CODE 2*
+ ADD R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] UM*
+ [IF]
+ CODE UM*
+ MOV @R15,&$4C0
+BW1 MOV R14,&$4C8
+ MOV &$4E4,0(R15)
+ MOV &$4E6,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE M*
+ MOV @R15,&$4C2
+ GOTO BW1
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] UM/MOD
+ [IF]
+ CODE UM/MOD
+ PUSH #DROP
+ MOV #$403E,R0
+ ENDCODE
+ [THEN]
+
+ : U*/
+ >R UM* R> UM/MOD SWAP DROP
+ ;
+
+ : U/MOD
+ 0 SWAP UM/MOD
+ ;
+
+ : UMOD
+ U/MOD DROP
+ ;
+
+ : U/
+ U/MOD SWAP DROP
+ ;
+
+ [UNDEFINED] SPACES
+ [IF]
+ : SPACES
+ BEGIN
+ ?DUP
+ WHILE
+ $20 EMIT
+ 1-
+ REPEAT
+ ;
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ CODE TIME?
+ BEGIN
+ BIT.B #$10,&$4A2
+ 0<> UNTIL
+ COLON
+ $4B2 C@ 2 U.R ':' EMIT
+ $4B1 C@ 2 U.R ':' EMIT
+ $4B0 C@ 2 U.R
+ ;
+
+ : TIME!
+ 2 DEPTH
+ U< IF
+ $4B0 C!
+ $4B1 C!
+ $4B2 C!
+ THEN
+ ." it is " TIME?
+ ;
+
+ CODE DATE?
+ BEGIN
+ BIT.B #$10,&$4A2
+ 0<> UNTIL
+ COLON
+
+
+
+ $4B3 C@
+ CASE
+ 0 OF ." Sat" ENDOF
+ 1 OF ." Sun" ENDOF
+ 2 OF ." Mon" ENDOF
+ 3 OF ." Tue" ENDOF
+ 4 OF ." Wed" ENDOF
+ 5 OF ." Thu" ENDOF
+ 6 OF ." Fri" ENDOF
+ ENDCASE
+ $4B6 @
+ $4B5 C@
+ $4B4 C@
+ $20 EMIT
+ 2 U.R '/' EMIT
+ 2 U.R '/' EMIT
+ .
+ ;
+
+ : DATE!
+ 2 DEPTH
+ U< IF
+ $4B6 !
+ $4B5 C!
+ $4B4 C!
+ THEN
+ $4B4 C@
+ $4B5 C@
+ $4B6 @
+ OVER 3 U<
+ IF 1 - SWAP 12 + SWAP
+ THEN
+ 100 U/MOD
+ DUP 4 U/ SWAP 2* -
+ SWAP DUP 4 U/ + +
+ SWAP 1+ 13 5 U*/ + +
+ 7 UMOD
+ $4B3 C!
+ ." we are on " DATE?
+ ;
+
+ RST_SET
+
+ [UNDEFINED] S_
+ [IF]
+ CODE S_
+ MOV #0,&$1DC0
+ COLON
+ $401E ,
+ $20 WORD
+ HI2LO
+ MOV.B @R14,R14
+ ADD #1,R14
+ BIT #1,R14
+ ADDC R14,&$1DC8
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV #$20,&$1DC0
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ESC
+ [IF]
+ CODE ESC
+ CMP #0,&$1DBC
+ 0= IF MOV @R13+,R0
+ THEN
+ COLON
+ $1B
+ POSTPONE LITERAL
+ POSTPONE EMIT
+ POSTPONE S_
+ POSTPONE TYPE
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] EXECUTE
+ [IF]
+ CODE EXECUTE
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R1+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] EVALUATE
+ [IF]
+ CODE EVALUATE
+ MOV #$1DC2,R9
+ MOV @R9+,R12
+ MOV @R9+,R11
+ MOV @R9+,R10
+ PUSHM #4,R13
+ LO2HI
+ [ ' \ 8 + , ]
+ HI2LO
+ MOV @R1+,&$1DC6
+ MOV @R1+,&$1DC4
+ MOV @R1+,&$1DC2
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ : SET_TIME
+ ESC [8;40;80t
+ 39 0 DO CR LOOP
+ ESC [H
+ CR ." DATE (DMY): "
+ $1CE4 DUP #84
+ ['] ACCEPT >BODY
+ EXECUTE
+ EVALUATE
+ CR DATE!
+ CR ." TIME (HMS): "
+ $1CE4 DUP #84
+ ['] ACCEPT >BODY
+ EXECUTE
+ EVALUATE
+ CR TIME!
+ RST_RET
+ ;
+
+ECHO
+SET_TIME
--- /dev/null
+
+; -----------
+; SD_TEST.4th for MSP_EXP430FR5994
+; -----------
+
+ CODE ABORT_SD_TEST
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ [UNDEFINED] WRITE
+ [IF]
+ 1 ABORT" no SD_CARD_READ_WRITE addon!"
+ [THEN]
+ RST_RET
+ ;
+
+ ABORT_SD_TEST
+
+ MARKER {SD_TEST}
+
+ [UNDEFINED] EXIT
+ [IF]
+ CODE EXIT
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,R14
+ SUBC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] BEGIN
+ [IF]
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF]
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] STATE
+ [IF]
+ $1DBC CONSTANT STATE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ [UNDEFINED] DUMP
+ [IF]
+ CODE DUMP
+ PUSH R13
+ PUSH &BASE
+ MOV #$10,&BASE
+ ADD @R15,R14
+ LO2HI
+ SWAP
+ DO
+ I 4 U.R SPACE
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ CR
+ $10 +LOOP
+ R> BASE !
+ ;
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #BEGIN,R0
+ ENDCODE
+ [THEN]
+
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @R15+,R14
+ 0<> IF
+ AND #0,R14
+ MOV @R13+,R0
+ THEN
+ XOR #-1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CASE
+ [IF]
+ : CASE
+ 0
+ ; IMMEDIATE
+
+ : OF
+ 1+
+ >R
+ POSTPONE OVER
+ POSTPONE =
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
+
+ : ENDOF
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
+
+ : ENDCASE
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
+
+ CODE SD_EMIT
+ CMP #$200,&$201E
+ U>= IF
+ CALL &WRITE+2
+ THEN
+ MOV &$201E,R8
+ MOV.B R14,$1E00(R8)
+ ADD #1,&$201E
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ : DOESWRITE
+ ['] SD_EMIT IS EMIT
+ $4000 HERE OVER - DUMP
+ ['] EMIT >BODY IS EMIT
+ CLOSE
+ ;
+
+ : SD_TEST
+ ECHO
+ $0D EMIT
+ CR
+ ." ----------" CR
+ ." Bootloader" CR
+ ." ----------" CR
+ ." ? Fast Forth Specifs" CR
+ ." 0 Set date and time" CR
+ ." 1 Load {UTILITY} words" CR
+ ." 2 Load {SD_TOOLS} words" CR
+ ." 3 Load {CORE_COMP} words" CR
+ ." 4 Load ANS core tests" CR
+ ." 5 Load a source file to make 10k program" CR
+ ." 6 Read it only (47k)" CR
+ ." 7 write FORTH dump in YOURFILE.TXT" CR
+ ." 8 append FORTH dump to YOURFILE.TXT" CR
+ ." 9 delete YOURFILE.TXT" CR
+ ." your choice: "
+ KEY DUP EMIT
+ NOECHO
+ {SD_TEST}
+ CASE
+ '?' OF LOAD" FF_SPECS.4TH" ENDOF
+ '0' OF LOAD" RTC.4TH" ENDOF
+ '1' OF LOAD" UTILITY.4TH" ENDOF
+ '2' OF LOAD" SD_TOOLS.4TH" ENDOF
+ '3' OF LOAD" CORE_ANS.4TH" ENDOF
+ '4' OF LOAD" CORETEST.4TH" ENDOF
+ '5' OF LOAD" PROG10K.4TH" ENDOF
+ '6' OF READ" PROG10K.4TH"
+ BEGIN READ
+ UNTIL ENDOF
+ '7' OF WRITE" YOURFILE.TXT"
+ DOESWRITE ENDOF
+ '8' OF APPEND" YOURFILE.TXT"
+ DOESWRITE ENDOF
+ '9' OF DEL" YOURFILE.TXT" ENDOF
+ ENDCASE
+ CR
+ ;
+
+SD_TEST
--- /dev/null
+
+
+; ---------------------------------------------------------------
+; SD_TOOLS.4th for MSP_EXP430FR5994
+; BASIC TOOLS for SD Card : DIR FAT SECTOR CLUSTER
+; ---------------------------------------------------------------
+
+ CODE ABORT_SD_TOOLS
+ SUB #4,R15
+ MOV R14,2(R15)
+ [UNDEFINED] LOAD" \ "
+ [IF]
+ MOV #-1,0(R15)
+ [ELSE]
+ MOV #0,0(R15)
+ [THEN]
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ABORT" Builds FastForth with SD_CARD_LOADER addon.."
+ RST_RET
+ ;
+
+ ABORT_SD_TOOLS
+
+ MARKER {SD_TOOLS}
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #$4032,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF]
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] DUMP
+ [IF]
+ CODE DUMP
+ PUSH R13
+ PUSH &$1DBE
+ MOV #$10,&$1DBE
+ ADD @R15,R14
+ LO2HI
+ SWAP
+ $FFF0 AND
+ DO CR
+ I 4 U.R SPACE
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> $1DBE !
+ ;
+ [THEN]
+
+ CODE SECTOR.
+BW1 MOV R14,R9
+ MOV @R15,R10
+ CALL #R_SECT_WX
+ COLON
+ SPACE <# #S #> TYPE
+ $1E00 $200 DUMP CR ;
+
+ CODE CLUSTER.
+BW2 BIT.B #4,&$260
+ 0<> IF
+ MOV #SYS+$16,R0
+ THEN
+ MOV.B &$2012,R10
+ MOV @R15,R9
+ BEGIN
+ RRA R10
+ U< WHILE
+ ADD R9,R9
+ ADDC R14,R14
+ REPEAT
+ ADD &$2010,R9
+ MOV R9,0(R15)
+ ADDC #0,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE FAT
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$2008,0(R15)
+ MOV #0,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE DIR
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$202C,0(R15)
+ MOV &$202E,R14
+ GOTO BW2
+ ENDCODE
+
+ RST_SET ECHO
; TESTXASM.4th for MSP_EXP430FR5994
; -----------------------------------------------------------------------
-CODE ABORT_TEST_ASMX
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$180E,R14
-SUB #308,R14
-COLON
-$0D EMIT
-ABORT" FastForth V3.8 please!"
-PWR_STATE
-;
-
-ABORT_TEST_ASMX
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
+ CODE ABORT_TEST_ASMX
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ RST_RET
+ ;
+
+ ABORT_TEST_ASMX
+
+ MARKER {TEST_ASMX}
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
-CODE MAX
+ [UNDEFINED] MAX
+ [IF]
+ CODE MAX
CMP @R15,R14
S< ?GOTO FW1
BW1 ADD #2,R15
MOV @R13+,R0
-ENDCODE
-
-CODE MIN
+ ENDCODE
+
+ CODE MIN
CMP @R15,R14
S< ?GOTO BW1
FW1 MOV @R15+,R14
MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] BL [IF]
-#32 CONSTANT BL
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-BL EMIT ;
-[THEN]
-
-[UNDEFINED] SPACES [IF]
-CODE SPACES
-CMP #0,R14
-0<> IF
- PUSH R13
- BEGIN
- LO2HI
- BL EMIT
- HI2LO
- SUB #2,R13
- SUB #1,R14
- 0= UNTIL
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
MOV @R1+,R13
-THEN
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
-CODE OVER
-MOV R14,-2(R15)
-MOV @R15,R14
-SUB #2,R15
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
-CODE >R
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
-[UNDEFINED] U.R [IF]
-: U.R
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
-[UNDEFINED] DO [IF]
-CODE DO
-SUB #2,R15
-MOV R14,0(R15)
-ADD #2,&$1DC6
-MOV &$1DC6,R14
-MOV #$403E,-2(R14)
-ADD #2,&$1C00
-MOV &$1C00,R10
-MOV #0,0(R10)
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE LOOP
- MOV #$4060,R9
-BW1 ADD #4,&$1DC6
- MOV &$1DC6,R10
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
MOV R9,-4(R10)
MOV R14,-2(R10)
-BEGIN
- MOV &$1C00,R14
- SUB #2,&$1C00
- MOV @R14,R14
- CMP #0,R14
-0<> WHILE
- MOV R10,0(R14)
-REPEAT
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
MOV @R15+,R14
MOV @R13+,R0
-ENDCODE IMMEDIATE
-
-CODE +LOOP
-MOV #$404E,R9
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
-CODE I
-SUB #2,R15
-MOV R14,0(R15)
-MOV @R1,R14
-SUB 2(R1),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUMP [IF]
-CODE DUMP
-PUSH R13
-PUSH &$1DDC
-MOV #$10,&$1DDC
-ADD @R15,R14
-LO2HI
- SWAP
- DO CR
- I 4 U.R SPACE
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I
- DO I C@ $7E MIN BL MAX EMIT LOOP
- $10 +LOOP
- R> $1DDC !
-;
-[THEN]
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+ DEFER CR
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ [UNDEFINED] DUMP
+ [IF]
+ CODE DUMP
+ PUSH R13
+ PUSH &BASE
+ MOV #$10,&BASE
+ ADD @R15,R14
+ LO2HI
+ SWAP
+ DO CR
+ I 4 U.R SPACE
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> BASE !
+ ;
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #$4032,R0
+ ENDCODE
+ [THEN]
+
+ RST_SET
+
+
+ ECHO
+
+; -----------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER: CALLA (without extended word)
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
+; indexed instructions must be written as $xxxx(REG) (single numbers)
+; -----------------------------------------------------------------------------
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #$4028,R0
+HERE
+CODE TT
+CALLA R10
ENDCODE
-[THEN]
-
-PWR_HERE
-
-
-ECHO
-; --------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV : Adda|Cmpa|Mova|Suba (without extended word)
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
-; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+HERE OVER - DUMP
+; you should see: 4A 13
+RST_RET
HERE
-CODE TEST
-MOVA @R10,R11
+CODE TT
+CALLA $3456(R10)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 5A 13 56 34
+RST_RET
HERE
-CODE TEST
-MOVA @R11+,R10
+CODE TT
+CALLA 0(R15)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>1A 0B<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 5F 13 00 00
+RST_RET
HERE
-CODE TEST
-MOVA &$1.2345,R11
+CODE TT
+CALLA @R10
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>2B 01 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 6A 13
+RST_RET
HERE
-CODE TEST
-MOVA $.1234(R10),R12
+CODE TT
+CALLA @R15
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>3C 0A 34 12<04 44 55 4D
-PWR_STATE
+; you should see: 6F 13
+RST_RET
HERE
-CODE TEST
-MOVA R11,&$1.2345
+CODE TT
+CALLA @R10+
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>61 0B 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 7A 13
+RST_RET
HERE
-CODE TEST
-MOVA R12,$.1234(R10)
+CODE TT
+CALLA &$2.3456
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>7A 0C 34 12<04 44 55 4D
-PWR_STATE
+; you should see: 82 13 56 34
+RST_RET
HERE
-CODE TEST
-MOVA #$0.1,R12
+CODE TT
+CALLA #$5.6789
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>8C 00 01 00<04 44 55 4D
-PWR_STATE
+; you should see: B5 13 89 67
+RST_RET
+
+; -----------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV : Adda|Cmpa|Mova|Suba
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
+; indexed instructions must be written as $xxxx(REG) (single numbers)
+; -----------------------------------------------------------------------------
HERE
-CODE TEST
-CMPA #$1.2345,R12
+CODE TT
+MOVA @R10,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>9C 01 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 0B 0A
+RST_RET
HERE
-CODE TEST
-ADDA #$2.3456,R12
+CODE TT
+MOVA @R11+,R10
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>AC 02 56 34<04 44 55 4D
-PWR_STATE
+; you should see: 1A 0B
+RST_RET
HERE
-CODE TEST
-SUBA #$3.4567,R12
+CODE TT
+MOVA &$1.2345,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>BC 03 67 45<04 44 55 4D
-PWR_STATE
+; you should see: 2B 01 45 23
+RST_RET
+HERE
+CODE TT
+MOVA 2(R15),R14
+ENDCODE
+HERE OVER - DUMP
+; you should see: 3E 0F 02 00
+RST_RET
+HERE
+CODE TT
+MOVA $1234(R10),R12
+ENDCODE
+HERE OVER - DUMP
+; you should see: 3C 0A 34 12
+RST_RET
HERE
-CODE TEST
-MOVA R10,R11
+CODE TT
+MOVA R11,&$1.2345
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>CB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 61 0B 45 23
+RST_RET
HERE
-CODE TEST
-CMPA R10,R11
+CODE TT
+MOVA R14,0(R15)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>DB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 7F 0E 00 00
+RST_RET
HERE
-CODE TEST
-ADDA R10,R11
+CODE TT
+MOVA R12,$1234(R10)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>EB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 7A 0C 34 12
+RST_RET
HERE
-CODE TEST
-SUBA R10,R11
+CODE TT
+MOVA #$0.1,R12
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>FB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 8C 00 01 00
+RST_RET
-; --------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER: CALLA (without extended word)
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
-; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+HERE
+CODE TT
+CMPA #$1.2345,R12
+ENDCODE
+HERE OVER - DUMP
+; you should see: 9C 01 45 23
+RST_RET
HERE
-CODE TEST
-CALLA R10
+CODE TT
+ADDA #$2.3456,R12
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>4A 13<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: AC 02 56 34
+RST_RET
HERE
-CODE TEST
-CALLA $.3456(R10)
+CODE TT
+SUBA #$3.4567,R12
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>5A 13 56 34<04 44 55 4D
-PWR_STATE
+; you should see: BC 03 67 45
+RST_RET
HERE
-CODE TEST
-CALLA @R10
+CODE TT
+MOVA R10,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>6A 13<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: CB 0A
+RST_RET
HERE
-CODE TEST
-CALLA @R10+
+CODE TT
+CMPA R10,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>7A 13<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: DB 0A
+RST_RET
HERE
-CODE TEST
-CALLA &$2.3456
+CODE TT
+ADDA R10,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>82 13 56 34<04 44 55 4D
-PWR_STATE
+; you should see: EB 0A
+RST_RET
HERE
-CODE TEST
-CALLA #$5.6789
+CODE TT
+SUBA R10,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>B5 13 89 67<04 44 55 4D
-PWR_STATE
+; you should see: FB 0A
+RST_RET
-; --------------------------------------------------------------------------------
+; -----------------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES V extended double operand
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+; -----------------------------------------------------------------------------
HERE
-CODE TEST
+CODE TT
MOV R12,R11
MOVX R12,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 4C 40 18 0B 4C<04 44
-PWR_STATE
+; you should see: 0B 4C 40 18 0B 4C
+RST_RET
HERE
-CODE TEST
+CODE TT
ADD R11,R11
ADDX.A R11,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 5B 00 18 4B 5B<04 44
-PWR_STATE
+; you should see: 0B 5B 00 18 4B 5B
+RST_RET
HERE
-CODE TEST
+CODE TT
ADD R11,R11
RPT R9
ADDX.A R11,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 5B 89 18 4B 5B<04 44
-PWR_STATE
+; you should see: 0B 5B 89 18 4B 5B
+RST_RET
HERE
-CODE TEST
+CODE TT
ADD R11,R11
RPT #8
ADDX.A R11,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 5B 07 18 4B 5B<04 44
-PWR_STATE
+; you should see: 0B 5B 07 18 4B 5B
+RST_RET
HERE
-CODE TEST
+CODE TT
ADDC #$9876,R11
ADDCX.A #$5.9876,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>3B 60 76 98 80 1A 7B 60
-; 76 98<04 44 55 4D
-PWR_STATE
+; you should see: 3B 60 76 98 80 1A 7B 60 76 98
+RST_RET
HERE
-CODE TEST
+CODE TT
ADDC &$9876,R11
ADDCX.A &$5.9876,R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>1B 62 76 98 80 1A 5B 62
-; 76 98<04 44 55 4D
-PWR_STATE
+; you should see: 1B 62 76 98 80 1A 5B 62 76 98
+RST_RET
HERE
-CODE TEST
+CODE TT
XOR.B $5432(R12),R11
XORX.B $6.5432(R12),R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>5B EC 32 54 46 18 5B EC
-; 32 54<04 44 55 4D
-PWR_STATE
+; you should see: 5B EC 32 54 46 18 5B EC 32 54
+RST_RET
HERE
-CODE TEST
+CODE TT
SUBC R11,$5432(R12)
SUBCX.A R11,$6.5432(R12)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>8C 7B 32 54 06 18 CC 7B
-; 32 54<04 44 55 4D
-PWR_STATE
+; you should see: 8C 7B 32 54 06 18 CC 7B 32 54
+RST_RET
HERE
-CODE TEST
+CODE TT
XOR.B R11,$5432(R12)
XORX.B R11,$6.5432(R12)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>CC EB 32 54 46 18 CC EB
-; 32 54<04 44 55 4D
-PWR_STATE
-
-; --------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand (take count of RPT)
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
+; you should see: CC EB 32 54 46 18 CC EB 32 54
+RST_RET
+
+; -----------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+; -----------------------------------------------------------------------------
HERE
-CODE TEST
+CODE TT
RRA R9
RRAX R9
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>09 11 40 18 09 11<04 44
-PWR_STATE
+; you should see: 09 11 40 18 09 11
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC @R9
RRCX.A @R9
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>29 10 00 18 69 10<04 44
-PWR_STATE
+; you should see: 29 10 00 18 69 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC @R12
RRCX.A @R12
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>2C 10 00 18 6C 10<04 44
-PWR_STATE
+; you should see: 2C 10 00 18 6C 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC @R9+
RRUX.A @R9+
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>39 10 00 19 79 10<04 44
-PWR_STATE
+; you should see: 39 10 00 19 79 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC R11
RPT #9
RRUX.A R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 10 08 19 4B 10<04 44
-PWR_STATE
+; you should see: 0B 10 08 19 4B 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC R11
RPT R9
RRUX.A R11
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 10 89 19 4B 10<04 44
-PWR_STATE
+; you should see: 0B 10 89 19 4B 10
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH #$2345
PUSHX #$0.2345
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>30 12 45 23 40 18 30 12
-; 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 30 12 45 23 40 18 30 12 45 23
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH &$5678
PUSHX.A &$4.5678
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>12 12 78 56 00 1A 52 12
-; 78 56<04 44 55 4D
-PWR_STATE
+; you should see: 12 12 78 56 00 1A 52 12 78 56
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH.B &$33
PUSHX.B &$.33
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>52 12 33 00 40 18 52 12
-; 33 00<04 44 55 4D
-PWR_STATE
+; you should see: 52 12 33 00 40 18 52 12 33 00
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH.B $3344(R11)
PUSHX.B $.3344(R11)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>5B 12 44 33 40 18 5B 12
-; 44 33<04 44 55 4D
-PWR_STATE
+; you should see: 5B 12 44 33 40 18 5B 12 44 33
+RST_RET
+
+ [UNDEFINED] BASE
+ [IF]
+ ' # 2 + CONSTANT BASE
+ [THEN]
: %.
-$1DDC @ %10 $1DDC ! SWAP 8 EMIT . $1DDC !
+BASE @ %10 BASE ! SWAP 8 EMIT . BASE !
+RST_RET
;
: %U.
-$1DDC @ %10 $1DDC ! SWAP 8 EMIT U. $1DDC ! ;
-
-PWR_HERE
+BASE @ %10 BASE ! SWAP 8 EMIT U. BASE !
+RST_RET
+;
+RST_SET
; ================
; RRUX test
MOV #%.,R0
ENDCODE
-RRUX_T ; you should see %111100001111000 --> %
-
-PWR_STATE
+RRUX_T ; %
+; you should see: %111100001111000
; ================
; RRUX repeat test
MOV #%.,R0
ENDCODE
-RRUX_T ; you should see %111100001111000 --> %
-
-PWR_STATE
+RRUX_T ; %
+; you should see: %111100001111000
CODE RRUX_T
MOV #$F0F0,R8
MOV #%.,R0
ENDCODE
-RRUX_T ; you should see %111100001111 --> %
-
-PWR_STATE
+RRUX_T ; --> %
+; you should see: %111100001111
CODE RRUX_T
MOV #$F0F0,R8
MOV #%.,R0
ENDCODE
-RRUX_T ; you should see %11110000 --> %
-
-PWR_STATE
-
+RRUX_T ; %
+; you should see: %11110000
; ================
; RRCX test
; ================
-
CODE RRCX_T
MOV #$8000,R8
BIC #1,R2
MOV #%U.,R0
ENDCODE
-RRCX_T ; you should see %100000000000000 --> %
-
-PWR_STATE
+RRCX_T ; %
+; you should see: %100000000000000
; ================
; RRCX repeat test
MOV #%U.,R0
ENDCODE
-RRCX_T ; you should see %100000000000000 --> %
-
-PWR_STATE
+RRCX_T ; %
+; you should see: %100000000000000
CODE RRCX_T
MOV #$8000,R8
MOV #%U.,R0
ENDCODE
-RRCX_T ; you should see %10000000 --> %
-
-PWR_STATE
+RRCX_T ; %
+; you should see: %10000000
; ================
; RRAX test
; ================
-
CODE RRAX_T
MOV #$8000,R8
RRAX R8
MOV #%.,R0
ENDCODE
-RRAX_T ; you should see %-100000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-100000000000000
; ================
; RRAX repeat test
MOV #%.,R0
ENDCODE
-RRAX_T ; you should see %-100000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-100000000000000
CODE RRAX_T
MOV #$8000,R8
MOV #%.,R0
ENDCODE
-RRAX_T ; you should see %-10000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-10000000000000
CODE RRAX_T
MOV #$8000,R8
MOV #%.,R0
ENDCODE
-RRAX_T ; you should see %-1000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-1000000000000
CODE RRAX_T
MOV #$8000,R8
MOV #%.,R0
ENDCODE
-RRAX_T ; you should see %-100000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-100000000
; ================
; RLAX test
RLAX_T ; you should see -2 -->
-PWR_STATE
-
; ================
; RLAX repeat test
; ================
RLAX_T ; you should see -2 -->
-PWR_STATE
-
CODE RLAX_T
MOV #-1,R8
RPT #2
RLAX_T ; you should see -4 -->
-PWR_STATE
-
CODE RLAX_T
MOV #-1,R8
RPT #3
RLAX_T ; you should see -8 -->
-PWR_STATE
-
CODE RLAX_T
MOV #-1,R8
RPT #8
RLAX_T ; you should see -256 -->
-PWR_STATE
-
; ================
; ADDX test
; ================
ADDX_T ; you should see -1 -->
-PWR_STATE
-
; ================
; ADDX repeat test
; ================
ADDX_T ; you should see -1 -->
-PWR_STATE
-
CODE ADDX_T
MOV #0,R8
MOV #-1,R9
ADDX_T ; you should see -2 -->
-PWR_STATE
-
CODE ADDX_T
MOV #0,R8
MOV #-1,R9
ADDX_T ; you should see -8 -->
-PWR_STATE
-
-
; ================
; SUBX test
; ================
SUBX_T ; you should see 1 -->
-PWR_STATE
-
; ================
; SUBX repeat test
; ================
SUBX_T ; you should see 1 -->
-PWR_STATE
-
CODE SUBX_T
MOV #0,R8
MOV #-1,R9
SUBX_T ; you should see 2 -->
-PWR_STATE
-
CODE SUBX_T
MOV #0,R8
MOV #-1,R9
SUBX_T ; you should see 8 -->
-PWR_STATE
-
CODE SUBX_T
MOV #15,R10
MOV #0,R8
SUBX_T ; you should see 16 -->
-PWR_STATE
-
CODE SUBX_T
MOV #32,R10
MOV #0,R8
SUBX_T ; you should see 1 -->
-PWR_STATE
-
CODE SUBX_T
MOV #33,R10
MOV #0,R8
SUBX_T ; you should see 2 -->
-RST_STATE
+{TEST_ASMX}
--- /dev/null
+
+ CODE ABORT_TSTWORDS
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ RST_RET
+ ;
+
+ ABORT_TSTWORDS
+
+ [DEFINED] {TSTWORDS} [IF] {TSTWORDS} [THEN]
+
+ MARKER {TSTWORDS}
+
+
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,R14
+ SUBC R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV #$40B2,-4(R10)
+ MOV R10,0(R14)
+ SUB #2,R10
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ PUSH R14
+ MOV @R15,R14
+ MOV @R1+,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] BEGIN
+ [IF]
+
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ RST_SET
+LOAD" \misc\TestASM.4th"
+
+ECHO
+
+
+: LOOP_TEST 8 0 DO I . LOOP
+;
+
+LOOP_TEST
+
+
+: LOOP_TEST1
+ BEGIN DUP U. 1 -
+ ?DUP
+ 0= UNTIL
+;
+: FIND_TEST
+ $20 WORD
+ 50000 0
+ DO
+ DUP
+ FIND DROP DROP
+ LOOP
+ FIND
+ 0= IF ABORT" <-- not found !"
+ ELSE ABORT" <-- found !"
+ THEN
+ ;
+\
\ No newline at end of file
--- /dev/null
+
+; ---------------------------------------------------------
+; UARTI2CS.4th for MSP_EXP430FR5994
+; ---------------------------------------------------------
+
+ CODE ABORT_UARTI2CS
+ SUB #4,R15
+ MOV R14,2(R15)
+ MOV &$180E,R14
+ BIT #$3C00,R14
+ 0<> IF MOV #0,R14 THEN
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ ABORT" <-- Ouch! unexpected I2C_FastForth target!"
+ RST_RET
+ ;
+
+ ABORT_UARTI2CS
+
+ MARKER {UARTI2CS}
+ 10 ALLOT
+
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT
+ MOV @R15+,R9
+ AND @R9,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ HDNCODE I2CM_STOP
+ BIS.B #2,&$265
+ MOV R0,R0
+ BIS.B #4,&$265
+ MOV R0,R0
+ BIC.B #2,&$265
+ MOV R0,R0
+ BIC.B #4,&$265
+ MOV @R1+,R0
+ ENDCODE
+
+ CODE REMOVE_U2I
+BW1
+ BIC.B #1,&$202
+ BIC.B #1,&$204
+ BIC.B #2,&$202
+ BIC.B #2,&$204
+ CALL #I2CM_STOP
+ MOV #6,R10
+ BIC.B R10,&$265
+ BIS.B R10,&$263
+ BIS.B R10,&$267
+ MOV #0,&$3C0
+ MOV #0,&$3C6
+ BIC.B #$80,&$20C
+ BIC.B #$80,&$204
+ BIC.B #$40,&$21A
+ CMP #$4082,&{UARTI2CS}-2
+ 0<> IF
+ MOV #{UARTI2CS},R10
+ MOV #$4082,-2(R10)
+ MOV @R10+,&$183E
+ MOV @R10+,&$1840
+ MOV @R10+,&$FFF0
+ MOV @R10+,&$FFDE
+ THEN
+ MOV #1,R14
+ MOV #UART_WARM+4,R0
+ ENDCODE
+
+ HDNCODE I2CM_START
+ BIS.B #4,&$265
+ BIS.B &{UARTI2CS}+8,R9
+ MOV R0,R0
+ BIS.B #2,&$265
+ MOV.B #8,R10
+ BEGIN
+ ADD.B R9,R9
+ U>= IF
+ BIC.B #4,&$265
+ ELSE
+ BIS.B #4,&$265
+ THEN
+ BIC.B #2,&$265
+ BIT.B #4,&$261
+ BIS.B #2,&$265
+ 0= IF
+ BIT.B #4,&$265
+ 0= IF
+ BIS.B #6,&$265
+ BIC.B #6,&I2CSM_IES
+ BEGIN
+ BIT.B #6,&I2CSM_IFG
+ BIC.B #6,&I2CSM_IFG
+ 0<> IF
+ MOV #9,R10
+ ELSE
+ $3C00 ,
+ $3C00 ,
+ THEN
+ SUB #1,R10
+ 0= UNTIL
+ ADD #2,R1
+ MOV @R1+,R0
+ THEN
+ THEN
+ SUB #1,R10
+ 0= UNTIL
+ BIC.B #4,&$265
+ BIC.B #2,&$265
+ BEGIN
+ BIT.B #2,&$261
+ 0<> UNTIL
+ BIT.B #4,&$261
+ BIS.B #2,&$265
+ MOV @R1+,0(R1)
+ MOV @R1+,R0
+ ENDCODE
+
+
+ HDNCODE U2I_TERM_INT
+ ADD #4,R1
+ BEGIN
+ MOV.B &$5CC,R8
+ MOV.B R8,$1CE4(R11)
+ ADD #1,R11
+ CMP.B R8,R12
+ 0<> WHILE
+ CMP #4,R10
+ 0<> IF
+ BEGIN
+ BIT #2,&$5DC
+ 0<> UNTIL
+ MOV.B R8,&$5CE
+ THEN
+ BEGIN
+ BIT #1,&$5DC
+ 0<> UNTIL
+ REPEAT
+ CALL #ACCEPT+$2A
+ BEGIN
+ BIT #1,&$5DC
+ 0<> UNTIL
+BW2
+ MOV.B &$5CC,R12
+ MOV.B R12,$1CE4(R11)
+ PUSH R0
+ MOV #0,R9
+ CALL #I2CM_START
+ 0<> ?GOTO FW2
+ BIS.B #1,&$202
+ MOV #$1CE4,R8
+ BEGIN
+ MOV.B @R8,R9
+ MOV.B #8,R10
+ BEGIN
+ ADD.B R9,R9
+ U>= IF
+ BIC.B #4,&$265
+ ELSE
+ BIS.B #4,&$265
+ THEN
+ BIC.B #2,&$265
+ MOV R0,R0
+ BIS.B #2,&$265
+ SUB #1,R10
+ 0= UNTIL
+ BIC.B #4,&$265
+ BIC.B #2,&$265
+ BEGIN
+ BIT.B #2,&$261
+ 0<> UNTIL
+ BIT.B #4,&$261
+ BIS.B #2,&$265
+ 0= WHILE
+ CMP.B @R8+,R12
+ 0= UNTIL
+ THEN
+ BIC.B #1,&$202
+ GOTO FW1
+ ENDCODE
+
+ HDNCODE 500MS_INT
+ ADD #4,R1
+FW1
+FW2
+ PUSH R0
+ BEGIN
+ BIT #8,&$5CA
+ 0<> ?GOTO BW1
+ BIT.B #$20,&$240
+ 0= ?GOTO BW1
+ BIC.B #2,&$265
+ MOV #1,R9
+ CALL #I2CM_START
+ 0<> IF
+ CALL #I2CM_STOP
+ MOV #'.',&$5CE
+ MOV #$4000,R0
+ THEN
+ BIS.B #2,&$202
+ BEGIN
+ BEGIN
+ BIC.B #4,&$265
+ MOV.B #8,R10
+ BEGIN
+ BIC.B #2,&$265
+ BIT.B #4,&$261
+ BIS.B #2,&$265
+ ADDC.B R9,R9
+ SUB #1,R10
+ 0= UNTIL
+ CMP.B #-1,R9
+ 0= IF
+ MOV #2,R9
+ THEN
+ CMP.B #8,R9
+ U>= WHILE
+ BIS.B #4,&$265
+ BIC.B #2,&$265
+ BEGIN
+ BIT.B #2,&$261
+ 0<> UNTIL
+ BIS.B #2,&$265
+ BEGIN
+ BIT #2,&$5DC
+ 0<> UNTIL
+ MOV.B R9,&$5CE
+ REPEAT
+ CMP.B #4,R9
+ U>= IF
+ MOV.B R9,&{UARTI2CS}+9
+ BIS.B #4,&$265
+ THEN
+ BIC.B #2,&$265
+ BEGIN
+ BIT.B #2,&$261
+ 0<> UNTIL
+ BIT.B #4,&$261
+ BIS.B #2,&$265
+ 0<> UNTIL
+ CMP.B #2,R9
+ U>= WHILE
+ 0= IF
+ MOV.B #0,&{UARTI2CS}+9
+ CALL #KEY+$8
+ BEGIN
+ BIC #1,&$5DC
+ MOV &$1800,R9
+ BEGIN MOV #65,R10
+ BEGIN SUB #1,R10
+ 0= UNTIL
+ SUB #1,R9
+ 0= UNTIL
+ BIT #1,&$5DC
+ 0= UNTIL
+ THEN
+ REPEAT
+ CALL #I2CM_STOP
+ BIC.B #2,&$202
+ CMP.B #0,R9
+ 0= IF
+ MOV #$4000,R0
+ THEN
+ CALL #KEY+$8
+ BEGIN
+ BIT #1,&$5DC
+ 0<> UNTIL
+ CALL #ACCEPT+$2A
+ MOV #0,R11
+ GOTO BW2
+ ENDCODE
+
+ HDNCODE SLEEP_U2I
+ $180E $4000 TSTBIT
+ [IF] MOV #%1_1001_0100,&$3C0 ; if ACLK=LFXTAL
+ [ELSE] MOV #%1_0001_0100,&$3C0 ; if ACLK=VLO
+ [THEN]
+ MOV.B &{UARTI2CS}+9,R10
+ MOV #$0D,R12
+ MOV #0,R11
+ BIC #$40,&$21C
+ MOV &{UARTI2CS}+2,R0
+ ENDCODE
+
+ HDNCODE INIT_U2I
+ MOV #4096,&$3D2
+ MOV #$60,&$3C6
+ MOV #4095,&$3D6
+ BIS.B #$80,&$204
+ BIS.B #$80,&$20C
+ BIS.B #$40,&$21A
+ BIC.B #6,&$267
+ BIC.B #6,&$263
+ BIS.B #1,&$204
+ BIS.B #2,&$204
+ CALL &{UARTI2CS}
+ CMP #$0E,R14
+ 0<> IF
+ CMP #$0A,R14
+ U>= ?GOTO BW1
+ THEN
+ BIS.B #$40,&$21C
+ MOV #ALLOT+$8,R0
+ ENDCODE
+
+ : UARTI2CS
+ $0D EMIT $0A EMIT
+ HI2LO
+ MOV @R1+,R13
+ BEGIN
+ BIT #1,&$5CA
+ 0= UNTIL
+ CMP #$4082,&{UARTI2CS}-2
+ 0= IF
+ MOV #REMOVE_U2I,&{UARTI2CS}-2
+ MOV &$183E,&{UARTI2CS}
+ MOV &$1840,&{UARTI2CS}+2
+ MOV &$FFF0,&{UARTI2CS}+4
+ MOV &$FFDE,&{UARTI2CS}+6
+ MOV R14,&{UARTI2CS}+8
+ THEN
+ MOV #0,R14
+ MOV #INIT_U2I,&$183E
+ MOV #SLEEP_U2I,&$1840
+ MOV #U2I_TERM_INT,&$FFF0
+ MOV #500MS_INT,&$FFDE
+ MOV #INIT_U2I,R0
+ ENDCODE
+
+ RST_SET ECHO
+
+ $12 UARTI2CS ; TERATERM(Alt-B) or USB_to_I2C_bridge(SW2) to quit
--- /dev/null
+
+
+; --------------------------------
+; UTILITY.4th for MSP_EXP430FR5994
+; --------------------------------
+
+ CODE ABORT_UTILITY
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$180A,R14
+ SUB #309,R14
+ COLON
+ $0D EMIT
+ ABORT" FastForth V3.9 please!"
+ RST_RET
+ ;
+
+ ABORT_UTILITY
+
+ MARKER {UTILITY}
+
+ [UNDEFINED] EXIT
+ [IF]
+ CODE EXIT
+ MOV @R1+,R13
+ MOV @R13+,R0
+
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV R10,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @R15+,R14
+ 0<> IF
+ MOV #-1,R14
+ U< IF
+ AND #0,R14
+ THEN
+ THEN
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] IF
+ [IF]
+ CODE IF
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV &$1DC8,R14
+ ADD #4,&$1DC8
+ MOV #$40AC,0(R14)
+ ADD #2,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE THEN
+ MOV &$1DC8,0(R14)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] BEGIN [IF]
+ CODE BEGIN
+ MOV #$4032,R0
+ ENDCODE IMMEDIATE
+
+ CODE UNTIL
+ MOV #$40AC,R9
+BW1 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ CODE AGAIN
+ MOV #$40B2,R9
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF]
+ HDNCODE XDO
+ MOV #$8000,R9
+ SUB @R15+,R9
+ MOV R14,R8
+ ADD R9,R8
+ PUSHM #2,R9
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE DO
+ SUB #2,R15
+ MOV R14,0(R15)
+ ADD #2,&$1DC8
+ MOV &$1DC8,R14
+ MOV #XDO,-2(R14)
+ ADD #2,&$1C00
+ MOV &$1C00,R10
+ MOV #0,0(R10)
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP
+ ADD #1,0(R1)
+BW1 BIT #$100,R2
+ 0= IF
+ MOV @R13,R13
+ MOV @R13+,R0
+ THEN
+ ADD #4,R1
+ ADD #2,R13
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE LOOP
+ MOV #XLOOP,R9
+BW2 ADD #4,&$1DC8
+ MOV &$1DC8,R10
+ MOV R9,-4(R10)
+ MOV R14,-2(R10)
+ BEGIN
+ MOV &$1C00,R14
+ SUB #2,&$1C00
+ MOV @R14,R14
+ CMP #0,R14
+ 0<> WHILE
+ MOV R10,0(R14)
+ REPEAT
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE IMMEDIATE
+
+ HDNCODE XPLOO
+ ADD R14,0(R1)
+ MOV @R15+,R14
+ GOTO BW1
+ ENDCODE
+
+ CODE +LOOP
+ MOV #XPLOO,R9
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1,R14
+ SUB 2(R1),R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH R14
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R1+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
+
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,R14
+ 0<> IF
+ PUSH R13
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,R13
+ SUB #1,R14
+ 0= UNTIL
+ MOV @R1+,R13
+ THEN
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 2DUP
+ [IF]
+ CODE 2DUP
+ MOV R14,-2(R15)
+ MOV @R15,-4(R15)
+ SUB #4,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @R15+,R14
+ XOR #-1,R14
+ ADD #1,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @R14,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] AND
+ [IF]
+ CODE AND
+ AND @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @R15,R10
+ MOV R14,0(R15)
+ MOV 2(R15),R14
+ MOV R10,2(R15)
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF]
+ CODE MAX
+ CMP @R15,R14
+ S< ?GOTO FW1
+BW1 ADD #2,R15
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE MIN
+ CMP @R15,R14
+ S< ?GOTO BW1
+FW1 MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV R14,-2(R15)
+ MOV @R15,R14
+ SUB #2,R15
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV R14,R10
+ MOV @R15+,R8
+ MOV @R15+,R9
+ MOV @R15+,R14
+ CMP #0,R10
+ 0<> IF
+ CMP R9,R8
+ 0= ?GOTO FW1
+ U< IF
+ BEGIN
+ MOV.B @R9+,0(R8)
+ ADD #1,R8
+ SUB #1,R10
+ 0= UNTIL
+ MOV @R13+,R0
+ ELSE
+ ADD R10,R8
+ ADD R10,R9
+ BEGIN
+ SUB #1,R9
+ SUB #1,R8
+ MOV.B @R9,0(R8)
+ SUB #1,R10
+ 0= UNTIL
+ THEN
+ THEN
+FW1 MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV R14,-2(R10)
+ MOV @R15+,R14
+ MOV @R1+,R13
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] BASE
+ [IF]
+ $1DBE CONSTANT BASE
+ [THEN]
+
+ [UNDEFINED] .S
+ [IF]
+ CODE .S
+ MOV R14,-2(R15)
+ MOV R15,R14
+ SUB #2,R14
+ MOV R14,-6(R15)
+ MOV #$1C80,R14
+ SUB #2,R14
+BW1 MOV R14,-4(R15)
+ SUB #6,R15
+ SUB @R15,R14
+ RRA R14
+ COLON
+ $3C EMIT
+ .
+ $08 EMIT
+ $3E EMIT SPACE
+ 2DUP 1+
+ U< IF
+ DROP DROP EXIT
+ THEN
+ BASE @ >R
+ $10 BASE !
+ DO
+ '$' EMIT
+ I @ U.
+ 2 +LOOP
+ R> BASE !
+ ;
+ [THEN]
+
+ [UNDEFINED] .RS
+ [IF]
+ CODE .RS
+ MOV R14,-2(R15)
+ MOV R1,-6(R15)
+ MOV #$1CE0,R14
+ GOTO BW1
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] ?
+ [IF]
+ CODE ?
+ MOV @R14,R14
+ MOV #U.,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] CR
+ [IF]
+
+ CODE CR
+ MOV #$40B4,R0
+ ENDCODE
+
+ :NONAME
+ $0D EMIT $0A EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] WORDS
+ [IF]
+ : WORDS
+ CR
+ $1DCE @ $1CE4
+ $180C @ DUP +
+ MOVE
+ BEGIN
+ 0 DUP
+ $180C @ DUP + 0
+ DO
+ DUP I $1CE4 + @
+ U< IF
+ DROP DROP
+ I DUP
+ $1CE4 + @
+ THEN
+ 2 +LOOP
+ ?DUP
+ WHILE
+ DUP
+ 2 - @
+ ROT
+ $1CE4 +
+ !
+ COUNT 2/
+ DUP >R TYPE
+ R> $10 SWAP - SPACES
+ REPEAT
+ DROP
+ ;
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ [UNDEFINED] DUMP
+ [IF]
+ CODE DUMP
+ PUSH R13
+ PUSH &$1DBE
+ MOV #$10,&$1DBE
+ ADD @R15,R14
+ LO2HI
+ SWAP
+ $FFF0 AND
+ DO CR
+ I 4 U.R SPACE
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> BASE !
+ ;
+ [THEN]
+
+ RST_SET
+
+ [THEN] ECHO ; endof [UNDEFINED] {TOOLS}
+
\ FREQUENCY .equ 16
\ THREADS .equ 16
\ TERMINALBAUDRATE .equ what_you_want
-\
+\
\ uncomment: CONDCOMP
\ MSP430ASSEMBLER
\ SD_CARD_LOADER
\ SD_CARD_READ_WRITE
-\
+\
\ compile for your target (CTRL+0)
\
\ program your target via TI interface (CTRL+1)
\ copy RTC.f to \RTC.4TH ( doesn't work with if FR2xxx or FR4xxx)
\ first, we test for downloading driver only if UART TERMINAL target
-CODE ABORT_SD_TEST
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_SD_TEST definition before resuming
-;
-
-ABORT_SD_TEST
-
-PWR_STATE
-
-[DEFINED] {SD_TEST} [IF] {SD_TEST} [THEN] \ remove it if defined out of kernel
-
-MARKER {SD_TEST}
+ CODE ABORT_SD_TEST
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ [UNDEFINED] WRITE
+ [IF]
+ 1 ABORT" no SD_CARD_READ_WRITE addon!"
+ [THEN]
+ RST_RET \ remove ABORT_SD_TEST definition before resuming
+ ;
+
+ ABORT_SD_TEST
+
+ MARKER {SD_TEST}
-[UNDEFINED] EXIT [IF]
\ https://forth-standard.org/standard/core/EXIT
\ EXIT -- exit a colon definition; CALL #EXIT performs ASMtoFORTH (10 cycles)
\ JMP #EXIT performs EXIT
-CODE EXIT
-MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
-MOV @IP+,PC \ 4 = NEXT
- \ 6 (ITC-2)
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
+ [UNDEFINED] EXIT
+ [IF]
+ CODE EXIT
+ MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
+ MOV @IP+,PC \ 4 = NEXT
+ ENDCODE \ 6 (ITC-2)
+ [THEN]
+
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toBODY
\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] >BODY
+ [IF]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] 0= [IF]
\ https://forth-standard.org/standard/core/ZeroEqual
\ 0= n/u -- flag return true if TOS=0
-CODE 0=
-SUB #1,TOS \ borrow (clear cy) if TOS was 0
-SUBC TOS,TOS \ TOS=-1 if borrow was set
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF] \ define IF and THEN
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,TOS \ borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS \ TOS=-1 if borrow was set
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/ELSE
\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-CODE ELSE \ immediate
-ADD #4,&DP \ make room to compile two words
-MOV &DP,W \ W=HERE+4
-MOV #BRAN,-4(W)
-MOV W,0(TOS) \ HERE+4 ==> [IFadr]
-SUB #2,W \ HERE+2
-MOV W,TOS \ -- ELSEadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE \ immediate
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/BEGIN
\ BEGIN -- BEGINadr initialize backward branch
-CODE BEGIN
+ [UNDEFINED] BEGIN
+ [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+ CODE BEGIN
MOV #HEREXEC,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/UNTIL
\ UNTIL BEGINadr -- resolve conditional backward branch
-CODE UNTIL \ immediate
+ CODE UNTIL \ immediate
MOV #QFBRAN,X
BW1 ADD #4,&DP \ compile two words
MOV &DP,W \ W = HERE
MOV TOS,-2(W) \ compile bakcward adr at HERE+2
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/AGAIN
\ AGAIN BEGINadr -- resolve uncondionnal backward branch
-CODE AGAIN \ immediate
-MOV #BRAN,X
-GOTO BW1
-ENDCODE IMMEDIATE
+ CODE AGAIN \ immediate
+ MOV #BRAN,X
+ GOTO BW1
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/WHILE
\ WHILE BEGINadr -- WHILEadr BEGINadr
-: WHILE \ immediate
-POSTPONE IF SWAP
-; IMMEDIATE
+ : WHILE \ immediate
+ POSTPONE IF SWAP
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/REPEAT
\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP \ immediate
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
- MOV X,-4(W) \ xloop --> HERE
- MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP \ immediate
-MOV #XPLOOP,X
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2 \ goto BW1 LOOP
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] I [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] - [IF]
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF] \ define MAX and MIN
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF] \ define MAX and MIN
CODE MAX \ n1 n2 -- n3 signed maximum
- CMP @PSP,TOS \ n2-n1
- S< ?GOTO FW1 \ n2<n1
-BW1 ADD #2,PSP
- MOV @IP+,PC
+ CMP @PSP,TOS \ n2-n1
+ S< ?GOTO FW1 \ n2<n1
+BW1 ADD #2,PSP
+ MOV @IP+,PC
ENDCODE
CODE MIN \ n1 n2 -- n3 signed minimum
- CMP @PSP,TOS \ n2-n1
- S< ?GOTO BW1 \ n2<n1
-FW1 MOV @PSP+,TOS
- MOV @IP+,PC
+ CMP @PSP,TOS \ n2-n1
+ S< ?GOTO BW1 \ n2<n1
+FW1 MOV @PSP+,TOS
+ MOV @IP+,PC
ENDCODE
-[THEN]
+ [THEN]
-[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SPACE [IF]
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
-: SPACE
-$20 EMIT ;
-[THEN]
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
-[UNDEFINED] SPACES [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
-ENDCODE
-[THEN]
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,TOS
+ 0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,IP
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+ THEN
+ MOV @PSP+,TOS \ -- drop n
+ NEXT
+ ENDCODE
+ [THEN]
-[UNDEFINED] DUP [IF] \ define DUP and DUP?
\ https://forth-standard.org/standard/core/DUP
\ DUP x -- x x duplicate top of stack
-CODE DUP
+ [UNDEFINED] DUP
+ [IF] \ define DUP and DUP?
+ CODE DUP
BW1 SUB #2,PSP \ 2 push old TOS..
MOV TOS,0(PSP) \ 3 ..onto stack
MOV @IP+,PC \ 4
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/qDUP
\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
+\ CONSTANT <name> n -- define a Forth CONSTANT
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV TOS,-2(W) \ PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/STATE
\ STATE -- a-addr holds compiler state
-STATEADR CONSTANT STATE
-[THEN]
-
-[UNDEFINED] IS [IF] \ define DEFER! and IS
-\ https://forth-standard.org/standard/core/DEFERStore
-\ Set the word xt1 to execute xt2. An ambiguous condition exists if xt1 is not for a word defined by DEFER.
-CODE DEFER! \ xt2 xt1 --
-MOV @PSP+,2(TOS) \ -- xt1=CFA_DEFER xt2 --> [CFA_DEFER+2]
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE
-
-\ https://forth-standard.org/standard/core/IS
-\ IS <name> xt --
-\ used as is :
-\ DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-\ inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-\ or in a definition : ... ['] U. IS DISPLAY ...
-\ KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] U.R [IF] \ defined in {UTILITY}
-: U.R \ u n -- display u unsigned in n width (n >= 2)
->R <# 0 # #S #>
-R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DUMP [IF] \ defined in {UTILITY}
-\ https://forth-standard.org/standard/tools/DUMP
-CODE DUMP \ adr n -- dump memory
-PUSH IP
-PUSH &BASEADR \ save current base
-MOV #$10,&BASEADR \ HEX base
-ADD @PSP,TOS \ -- ORG END
-LO2HI
- SWAP \ -- END ORG
- DO CR \ generate line
- I 4 U.R SPACE \ generate address
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I \ display 16 chars
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> BASEADR ! \ restore current base
-;
-[THEN]
-
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #BEGIN,PC
-ENDCODE
-[THEN]
-
+ [UNDEFINED] STATE
+ [IF]
+ STATEADR CONSTANT STATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+
+\ DEFER CR \ DEFERed definition, by default executes that of :NONAME
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
-\ SD_EMIT c -- output char c to a SD_CARD file opened as write
-CODE SD_EMIT
-CMP #512,&BufferPtr \ 512 bytes by sector
-U>= IF \ if file buffer is full
- MOV #WRITE,X \ CALL #Write_File
- CALL 2(X) \ BufferPtr = 0
-THEN
-MOV &BufferPtr,Y \ 3
-MOV.B TOS,SD_BUF(Y) \ 3
-ADD #1,&BufferPtr \ 4
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC
-ENDCODE
-
-: SD_TEST
-PWR_HERE \ remove all volatile programs from MAIN memory
-CR
-." 0 Set date and time" CR
-." 1 Load {TOOLS} words" CR
-." 2 Load {SD_TOOLS} words" CR
-." 3 Load {CORE_COMP} words" CR
-." 4 Load ANS core tests" CR
-." 5 Load a 100k program " CR
-." 6 Read only this source file" CR
-." 7 append a dump of FORTH to YOURFILE.TXT" CR
-." 8 delete YOURFILE.TXT" CR
-." 9 Load TST_WORDS" CR
-." your choice : "
-KEY
-48 - ?DUP
-0= IF
- ." LOAD RTC.4TH" CR
- LOAD" RTC.4TH"
-ELSE 1 - ?DUP
- 0= IF
- ." LOAD UTILITY.4TH" CR
- LOAD" UTILITY.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD SD_TOOLS.4TH" CR
- LOAD" SD_TOOLS.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD CORE_ANS.4TH" CR
- LOAD" CORE_ANS.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD CORETEST.4TH" CR
- LOAD" CORETEST.4TH"
- PWR_STATE
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD PROG100K.4TH" CR
- NOECHO
- LOAD" PROG100K.4TH"
- ELSE 1 - ?DUP
- 0= IF
- ." READ PROG100K.4TH" CR
- READ" PROG100K.4TH"
- BEGIN
- READ \ sequentially read 512 bytes
- UNTIL \ prog100k.4TH is closed
- ELSE 1 - ?DUP
- 0= IF
- ." WRITE YOURFILE.TXT" CR
- WRITE" YOURFILE.TXT"
- ['] SD_EMIT IS EMIT
-\ ." va te faire voir"
- MAIN_ORG HERE OVER - DUMP
- ['] EMIT >BODY IS EMIT
- CLOSE
- ELSE 1 - ?DUP
- 0= IF
- ." DEL YOURFILE.TXT" CR
- DEL" YOURFILE.TXT"
- ELSE 1 - ?DUP
- 0= IF
- ." LOAD TSTWORDS.4TH" CR
- LOAD" TSTWORDS.4TH"
- ELSE
- ." abort" ABORT" "
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
- THEN
-THEN
-;
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF] \ defined in {UTILITY}
+ : U.R \ u n -- display u unsigned in n width (n >= 2)
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+\ https://forth-standard.org/standard/core/BASE
+\ BASE -- a-addr holds conversion radix
+ [UNDEFINED] BASE
+ [IF]
+ BASEADR CONSTANT BASE
+ [THEN]
+\ https://forth-standard.org/standard/tools/DUMP
+ [UNDEFINED] DUMP
+ [IF] \ defined in {UTILITY}
+ CODE DUMP \ adr n -- dump memory
+ PUSH IP
+ PUSH &BASE \ save current base
+ MOV #$10,&BASE \ HEX base
+ ADD @PSP,TOS \ -- ORG END
+ LO2HI
+ SWAP \ -- END ORG
+ DO \ generate line
+ I 4 U.R SPACE \ generate address
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I \ display 16 chars
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ CR
+ $10 +LOOP
+ R> BASE ! \ restore current base
+ ;
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #BEGIN,PC
+ ENDCODE
+ [THEN]
-RST_HERE
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/OnePlus
+\ 1+ n1/u1 -- n2/u2 add 1 to TOS
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/Equal
+\ = x1 x2 -- flag test x1=x2
+ [UNDEFINED] =
+ [IF]
+ CODE =
+ SUB @PSP+,TOS \ 2
+ 0<> IF \ 2
+ AND #0,TOS \ 1
+ MOV @IP+,PC \ 4
+ THEN
+ XOR #-1,TOS \ 1 flag Z = 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CASE
+ [UNDEFINED] CASE
+ [IF]
+ : CASE
+ 0
+ ; IMMEDIATE \ -- #of-1
+
+\ https://forth-standard.org/standard/core/OF
+ : OF \ #of-1 -- orgOF #of
+ 1+ \ count OFs
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE OVER
+ POSTPONE = \ copy and test case value
+ POSTPONE IF \ add orig to control flow stack
+ POSTPONE DROP \ discards case value if =
+ R> \ we can bring count back now
+ ; IMMEDIATE
+
+\ https://forth-standard.org/standard/core/ENDOF
+ : ENDOF \ orgOF #of -- orgENDOF #of
+ >R \ move off the stack in case the control-flow stack is the data stack.
+ POSTPONE ELSE
+ R> \ we can bring count back now
+ ; IMMEDIATE
+
+\ https://forth-standard.org/standard/core/ENDCASE
+ : ENDCASE \ orgENDOF1..orgENDOFn #of --
+ POSTPONE DROP
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
+ [THEN]
-[THEN]
+\ SD_EMIT c -- output char c to a SD_CARD file opened as write
+ CODE SD_EMIT
+ CMP #$200,&BufferPtr \ 512 bytes by sector
+ U>= IF \ if file buffer is full
+ CALL &WRITE+2 \ CALL #Write_File ; BufferPtr = 0
+ THEN
+ MOV &BufferPtr,Y \ 3
+ MOV.B TOS,SD_BUF(Y) \ 3
+ ADD #1,&BufferPtr \ 4
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC
+ ENDCODE
-ECHO SD_TEST
+ : DOESWRITE
+ ['] SD_EMIT IS EMIT
+ MAIN_ORG HERE OVER - DUMP
+ ['] EMIT >BODY IS EMIT
+ CLOSE
+ ;
+
+ : SD_TEST
+ ECHO
+ 'CR' EMIT
+ CR
+ ." ----------" CR
+ ." Bootloader" CR
+ ." ----------" CR
+ ." ? Fast Forth Specifs" CR
+ ." 0 Set date and time" CR
+ ." 1 Load {UTILITY} words" CR
+ ." 2 Load {SD_TOOLS} words" CR
+ ." 3 Load {CORE_COMP} words" CR
+ ." 4 Load ANS core tests" CR
+ ." 5 Load a source file to make 10k program" CR
+ ." 6 Read it only (47k)" CR
+ ." 7 write FORTH dump in YOURFILE.TXT" CR
+ ." 8 append FORTH dump to YOURFILE.TXT" CR
+ ." 9 delete YOURFILE.TXT" CR
+ ." your choice: "
+ KEY DUP EMIT
+ NOECHO
+ {SD_TEST} \ remove {SD_TEST} application
+ CASE
+ '?' OF LOAD" FF_SPECS.4TH" ENDOF \
+ '0' OF LOAD" RTC.4TH" ENDOF
+ '1' OF LOAD" UTILITY.4TH" ENDOF
+ '2' OF LOAD" SD_TOOLS.4TH" ENDOF
+ '3' OF LOAD" CORE_ANS.4TH" ENDOF
+ '4' OF LOAD" CORETEST.4TH" ENDOF
+ '5' OF LOAD" PROG10K.4TH" ENDOF \ download one ko, so no erasure here
+ '6' OF READ" PROG10K.4TH"
+ BEGIN READ \ sequentially read 512 bytes
+ UNTIL ENDOF \ prog10k.4TH is closed
+ '7' OF WRITE" YOURFILE.TXT"
+ DOESWRITE ENDOF
+ '8' OF APPEND" YOURFILE.TXT"
+ DOESWRITE ENDOF
+ '9' OF DEL" YOURFILE.TXT" ENDOF
+ ENDCASE
+ CR
+ ;
+
+SD_TEST
\ ASSEMBLER conditionnal usage with ?JMP ?GOTO S< S>= U< U>= 0= 0<> 0<
; ---------------------------------------------------------------
-; SD_TOOLS.f : BASIC TOOLS for SD Card : DIR FAT SECTOR CLUSTER
+; SD_TOOLS.f
+; BASIC TOOLS for SD Card : DIR FAT SECTOR CLUSTER
; ---------------------------------------------------------------
\ first, we test for downloading driver only if UART TERMINAL target
-CODE ABORT_SD_TOOLS
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_UARTI2CS definition before resuming
-;
-
-ABORT_SD_TOOLS
-
-
-[DEFINED] {SD_TOOLS} [IF] {SD_TOOLS} [THEN]
-
-[UNDEFINED] {SD_TOOLS} [IF]
-
-MARKER {SD_TOOLS}
+ CODE ABORT_SD_TOOLS
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ [UNDEFINED] LOAD" \ "
+ [IF]
+ MOV #-1,0(PSP)
+ [ELSE]
+ MOV #0,0(PSP)
+ [THEN]
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ ABORT" Builds FastForth with SD_CARD_LOADER addon.."
+ RST_RET \ remove ABORT_UARTI2CS definition before resuming
+ ;
+
+ ABORT_SD_TOOLS
+
+ MARKER {SD_TOOLS}
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #HEREXEC,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/AND
+\ C AND x1 x2 -- x3 logical AND
+ [UNDEFINED] AND
+ [IF]
+ CODE AND
+ AND @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF] \ define MAX and MIN
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-CODE MAX \ n1 n2 -- n3 signed maximum
+ [UNDEFINED] MAX
+ [IF] \ define MAX and MIN
+ CODE MAX \ n1 n2 -- n3 signed maximum
CMP @PSP,TOS \ n2-n1
S< ?GOTO FW1 \ n2<n1
BW1 ADD #2,PSP
MOV @IP+,PC
-ENDCODE
+ ENDCODE
-CODE MIN \ n1 n2 -- n3 signed minimum
+ CODE MIN \ n1 n2 -- n3 signed minimum
CMP @PSP,TOS \ n2-n1
S< ?GOTO BW1 \ n2<n1
FW1 MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE
+ ENDCODE
+ [THEN]
-[THEN]
-
-[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SPACE [IF]
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
-: SPACE
-$20 EMIT ;
-[THEN]
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
-[UNDEFINED] SPACES [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,TOS
+ 0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,IP
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+ THEN
+ MOV @PSP+,TOS \ -- drop n
+ NEXT
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] OVER [IF]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] >R [IF]
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] U.R [IF] \ defined in {UTILITY}
-: U.R \ u n -- display u unsigned in n width (n >= 2)
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF] \ defined in {UTILITY}
+ : U.R \ u n -- display u unsigned in n width (n >= 2)
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
- MOV X,-4(W) \ xloop --> HERE
- MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP
-MOV #XPLOOP,X
-GOTO BW1 \ goto BW1 LOOP
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2 \ goto BW1 LOOP
+ ENDCODE IMMEDIATE
+ [THEN]
+
-[UNDEFINED] I [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUMP [IF] \ defined in {UTILITY}
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+\ create a primary defered word, i.e. with its default runtime beginning at the >BODY of the definition
+ CODE CR \ part I : DEFERed definition of CR
+ MOV #NEXT_ADR,PC \ [PFA] = NEXT_ADR
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
\ https://forth-standard.org/standard/tools/DUMP
-CODE DUMP \ adr n -- dump memory
-PUSH IP
-PUSH &BASEADR \ save current base
-MOV #$10,&BASEADR \ HEX base
-ADD @PSP,TOS \ -- ORG END
-LO2HI
- SWAP \ -- END ORG
- DO CR \ generate line
- I 4 U.R SPACE \ generate address
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I \ display 16 chars
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> BASEADR ! \ restore current base
-;
-[THEN]
+ [UNDEFINED] DUMP
+ [IF] \ defined in {UTILITY}
+ CODE DUMP \ adr n -- dump memory
+ PUSH IP
+ PUSH &BASEADR \ save current base
+ MOV #$10,&BASEADR \ HEX base
+ ADD @PSP,TOS \ -- ORG END
+ LO2HI
+ SWAP \ -- END ORG
+ $FFF0 AND \ -- END ORG_modulo_16
+ DO CR \ generate line
+ I 4 U.R SPACE \ generate address
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I \ display 16 chars
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> BASEADR ! \ restore current base
+ ;
+ [THEN]
\ display content of a sector
-\ ----------------------------------\
-CODE SECTOR. \ sector. -- don't forget to add decimal point to your sector number
-\ ----------------------------------\
+\ --------------------------------\
+ CODE SECTOR. \ sector. -- don't forget to add decimal point to your sector number
+\ --------------------------------\
BW1 MOV TOS,X \ X = SectorH
MOV @PSP,W \ W = sectorL
- CALL #READ_SWX \ W = SectorLO X = SectorHI
-COLON \
- <# #S #> TYPE SPACE \ ud -- display the double number
+ CALL #R_SECT_WX \ W = SectorLO X = SectorHI
+ COLON \
+ SPACE <# #S #> TYPE \ ud -- display the double number
SD_BUF $200 DUMP CR ; \ then dump the sector
-\ ----------------------------------\
+\ --------------------------------\
\ display first sector of a Cluster
-\ ----------------------------------\
-CODE CLUSTR. \ cluster. -- don't forget to add decimal point to your cluster number
-\ ----------------------------------\
+\ --------------------------------\
+ CODE CLUSTER. \ cluster. -- don't forget to add decimal point to your cluster number
+\ --------------------------------\
BW2 BIT.B #CD_SD,&SD_CDIN \ test Card Detect: memory card present ?
- 0<> IF
- MOV #COLD,PC \ no: force COLD
+ 0<> IF \ no: force COLD
+ MOV #COLD,PC \ no
THEN
MOV.B &SecPerClus,W \ SecPerClus(54321) = multiplicator
MOV @PSP,X \ X = ClusterL
- GOTO FW1 \
BEGIN
+ RRA W \ shift one right multiplicator
+ U< WHILE \ carry clear
ADD X,X \ (RLA) shift one left MULTIPLICANDlo16
ADDC TOS,TOS \ (RLC) shift one left MULTIPLICANDhi8
-FW1 RRA W \ shift one right multiplicator
- U>= UNTIL \ carry set
+ REPEAT
ADD &OrgClusters,X \ add OrgClusters = sector of virtual cluster 0 (word size)
- MOV X,0(PSP)
+ MOV X,0(PSP)
ADDC #0,TOS \ don't forget carry
GOTO BW1 \ jump to SECTOR
-ENDCODE
-\ ----------------------------------\
+ ENDCODE
+\ --------------------------------\
-\ ----------------------------------\
-CODE FAT \ Display CurFATsector
-\ ----------------------------------\
+\ --------------------------------\
+ CODE FAT \ Display FATsector
+\ --------------------------------\
SUB #4,PSP \
MOV TOS,2(PSP) \
MOV &OrgFAT1,0(PSP) \
MOV #0,TOS \ FATsectorHI = 0
GOTO BW1 \ jump to SECTOR
-ENDCODE
-\ ----------------------------------\
+ ENDCODE
+\ --------------------------------\
-\ ----------------------------------\
-CODE DIR \ Display CurrentDir first sector
-\ ----------------------------------\
+\ --------------------------------\
+ CODE DIR \ Display CurrentDir first sector
+\ --------------------------------\
SUB #4,PSP \
MOV TOS,2(PSP) \ save TOS
MOV &DIRclusterL,0(PSP) \
MOV &DIRclusterH,TOS \
- CMP #0,TOS
- 0<> ?GOTO BW2 \ jump to CLUSTER
- CMP #1,0(PSP) \ cluster 1 ?
- 0<> ?GOTO BW2 \ jump to CLUSTER
- MOV &OrgRootDir,0(PSP) \ if yes, special case of FAT16 OrgRootDir
- GOTO BW1 \ jump to SECTOR
-ENDCODE
-\ ----------------------------------\
-
-
-RST_HERE
-
-[THEN]
-ECHO
+ GOTO BW2 \ jump to SECTOR
+ ENDCODE
+\ --------------------------------\
+ RST_SET ECHO
\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
\
\ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
-\ ASSEMBLER conditionnal usage before ?JMP ?GOTO : S< S>= U< U>= 0= 0<> 0<
+\ ASSEMBLER conditionnal usage before ?JMP ?GOTO : S< S>= U< U>= 0= 0<> 0<
\
\ FORTH conditionnal : 0= 0< = < > U<
\ first, we test for downloading driver only if UART TERMINAL target
-CODE ABORT_TEST_ASM
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_TEST_ASM definition before resuming
-;
+ CODE ABORT_TEST_ASM
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ RST_RET \ remove ABORT_TEST_ASM definition before resuming
+ ;
-ABORT_TEST_ASM \ abort test
+ ABORT_TEST_ASM \ abort test
-[UNDEFINED] >R [IF]
+ MARKER {TEST_ASM}
+
+ [UNDEFINED] >R
+ [IF]
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] R> [IF]
+ [UNDEFINED] R>
+ [IF]
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-MOV rDOVAR,PC
-ENDCODE
-[THEN]
+ CODE R>
+ MOV rDOVAR,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] + [IF]
+ [UNDEFINED] +
+ [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] - [IF]
+ [UNDEFINED] -
+ [IF]
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SWAP [IF]
+ [UNDEFINED] SWAP
+ [IF]
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] MAX [IF] \ MAX and MIN are defined in {UTILITY}
+ [UNDEFINED] MAX
+ [IF] \ MAX and MIN are defined in {UTILITY}
-CODE MAX \ n1 n2 -- n3 signed maximum
+ CODE MAX \ n1 n2 -- n3 signed maximum
CMP @PSP,TOS \ n2-n1
S< ?GOTO FW1 \ n2<n1
BW1 ADD #2,PSP
MOV @IP+,PC
-ENDCODE
+ ENDCODE
-CODE MIN \ n1 n2 -- n3 signed minimum
+ CODE MIN \ n1 n2 -- n3 signed minimum
CMP @PSP,TOS \ n2-n1
S< ?GOTO BW1 \ n2<n1
FW1 MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE
+ ENDCODE
-[THEN]
+ [THEN]
-[UNDEFINED] C@ [IF]
+ [UNDEFINED] C@
+ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] VARIABLE [IF]
+ [UNDEFINED] VARIABLE
+ [IF]
\ https://forth-standard.org/standard/core/VARIABLE
\ VARIABLE <name> -- define a Forth VARIABLE
-: VARIABLE
-CREATE
-HI2LO
-MOV #$1287,-4(W) \ CFA = CALL rDOVAR
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ : VARIABLE
+ CREATE
+ HI2LO
+ MOV #$1287,-4(W) \ CFA = CALL rDOVAR
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] CONSTANT [IF]
+ [UNDEFINED] CONSTANT
+ [IF]
\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+\ CONSTANT <name> n -- define a Forth CONSTANT
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV TOS,-2(W) \ PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] DEFER [IF]
+ [UNDEFINED] DEFER
+ [IF]
\ https://forth-standard.org/standard/core/DEFER
\ DEFER "<spaces>name" --
\Skip leading space delimiters. Parse name delimited by a space.
\name Execution: --
\Execute the xt that name is set to execute, i.e. NEXT (nothing),
\until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
-: DEFER
-CREATE
-HI2LO
-MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
-MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ : DEFER
+ CREATE
+ HI2LO
+ MOV #$4030,-4(W) \ CFA = MOV @PC+,PC = BR MOV @IP+,PC
+ MOV #NEXT_ADR,-2(W) \ PFA = address of MOV @IP+,PC to do nothing.
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] >BODY [IF]
+ [UNDEFINED] >BODY
+ [IF]
\ https://forth-standard.org/standard/core/toBODY
\ >BODY -- addr leave BODY of a CREATEd word\ also leave default ACTION-OF primary DEFERred word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE >BODY
+ ADD #4,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SPACE [IF]
+ [UNDEFINED] SPACE
+ [IF]
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
-: SPACE
-$20 EMIT ;
-[THEN]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
-[UNDEFINED] SPACES [IF]
+ [UNDEFINED] SPACES
+ [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF] \ define DUP and ?DUP
+ CODE SPACES
+ CMP #0,TOS
+ 0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,IP
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+ THEN
+ MOV @PSP+,TOS \ -- drop n
+ NEXT
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF] \ define DUP and ?DUP
\ https://forth-standard.org/standard/core/DUP
\ DUP x -- x x duplicate top of stack
-CODE DUP
+ CODE DUP
BW1 SUB #2,PSP \ 2 push old TOS..
MOV TOS,0(PSP) \ 3 ..onto stack
MOV @IP+,PC \ 4
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/qDUP
\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] OVER [IF]
+ [UNDEFINED] OVER
+ [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF] \ defined in {UTILITY}
+ : U.R \ u n -- display u unsigned in n width (n >= 2)
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ [UNDEFINED] IF
+ [IF] \ define IF THEN
+
+ CODE IF
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
-[UNDEFINED] U.R [IF] \ defined in {UTILITY}
-: U.R \ u n -- display u unsigned in n width (n >= 2)
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ PUSH TOS \ 3
+ MOV @PSP,TOS \ 2
+ MOV @RSP+,0(PSP) \ 4
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+ [UNDEFINED] BEGIN
+ [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+
+ CODE BEGIN
+ MOV #HEREXEC,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+ CODE UNTIL
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+ CODE AGAIN
+ MOV #BRAN,X
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
-[UNDEFINED] DO [IF]
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0, init
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
-[UNDEFINED] LOOP [IF]
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP \ immediate
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
MOV X,-4(W) \ xloop --> HERE
MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
+ ENDCODE IMMEDIATE
-[UNDEFINED] +LOOP [IF]
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP \ immediate
-MOV #XPLOOP,X
-GOTO BW1
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] I [IF]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] I
+ [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUMP [IF] \ defined in {UTILITY}
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/BASE
+\ BASE -- a-addr holds conversion radix
+ [UNDEFINED] BASE
+ [IF]
+ BASEADR CONSTANT BASE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+ DEFER CR \ DEFERed definition, by default executes that of :NONAME
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+ [UNDEFINED] DUMP
+ [IF] \ defined in {UTILITY}
\ https://forth-standard.org/standard/tools/DUMP
-CODE DUMP \ adr n -- dump memory
-PUSH IP
-PUSH &BASEADR \ save current base
-MOV #$10,&BASEADR \ HEX base
-ADD @PSP,TOS \ -- ORG END
-LO2HI
- SWAP \ -- END ORG
- DO CR \ generate line
- I 4 U.R SPACE \ generate address
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I \ display 16 chars
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> BASEADR ! \ restore current base
-;
-[THEN]
+ CODE DUMP \ adr n -- dump memory
+ PUSH IP
+ PUSH &BASE \ save current base
+ MOV #$10,&BASEADR \ HEX base
+ ADD @PSP,TOS \ -- ORG END
+ LO2HI
+ SWAP \ -- END ORG
+ DO CR \ generate line
+ I 4 U.R SPACE \ generate address
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I \ display 16 chars
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> BASE ! \ restore current base
+ ;
+ [THEN]
\ -----------------------------------------------------------------------
\ test CPUx instructions PUSHM, POPM, RLAM, RRAM, RRCM, RRUM
\ -----------------------------------------------------------------------
-CODE TESTPUSHM
+ CODE TESTPUSHM
BW1
-\ PUSHM #16,R14 \ uncomment to test error "out of bounds"
-\ PUSHM #2,R0 \ uncomment to test error "out of bounds"
-\ PUSHM #0,IP \ uncomment to test error "out of bounds"
-\ POPM #17,R15 \ uncomment to test error "out of bounds"
-\ POPM #2,R0 \ uncomment to test error "out of bounds"
-\ POPM #0,IP \ uncomment to test error "out of bounds"
- MOV #22222,Y
- MOV #3,X
- MOV #2,W
- MOV #1,T
- MOV #0,S
-
- PUSHM #4,IP \ PUSHM IP,S,T,W
- POPM #4,IP \ POPM W,T,S,IP
- SUB #10,PSP
- MOV TOS,8(PSP) \ save old TOS
- MOV S,6(PSP)
- MOV T,4(PSP)
- MOV W,2(PSP)
- MOV X,0(PSP)
- MOV Y,TOS
-\ RLAM #0,TOS \ uncomment to test error "out of bounds"
-\ RLAM #5,TOS \ uncomment to test error "out of bounds"
- RRAM #1,TOS \ 0 < shift value < 5
- RLAM #2,TOS
- RRCM #1,TOS
- RRUM #1,TOS
- COLON \ high level part of the word starts here...
- space . . . . .
- ; \ and finishes here.
- \
-TESTPUSHM ; you should see 11111 3 2 1 0 -->
-
-CODE TESTPOPM
+\ PUSHM #16,R14 \ uncomment to test error "out of bounds"
+\ PUSHM #2,R0 \ uncomment to test error "out of bounds"
+\ PUSHM #0,IP \ uncomment to test error "out of bounds"
+\ POPM #17,R15 \ uncomment to test error "out of bounds"
+\ POPM #2,R0 \ uncomment to test error "out of bounds"
+\ POPM #0,IP \ uncomment to test error "out of bounds"
+ MOV #22222,Y
+ MOV #3,X
+ MOV #2,W
+ MOV #1,T
+ MOV #0,S
+
+ PUSHM #4,IP \ PUSHM IP,S,T,W
+ POPM #4,IP \ POPM W,T,S,IP
+ SUB #10,PSP
+ MOV TOS,8(PSP) \ save old TOS
+ MOV S,6(PSP)
+ MOV T,4(PSP)
+ MOV W,2(PSP)
+ MOV X,0(PSP)
+ MOV Y,TOS
+\ RLAM #0,TOS \ uncomment to test error "out of bounds"
+\ RLAM #5,TOS \ uncomment to test error "out of bounds"
+ RRAM #1,TOS \ 0 < shift value < 5
+ RLAM #2,TOS
+ RRCM #1,TOS
+ RRUM #1,TOS
+ COLON \ high level part of the word starts here...
+ space . . . . .
+ ; \ and finishes here.
+
+ TESTPUSHM ; you should see 11111 3 2 1 0 -->
+
+ CODE TESTPOPM
GOTO BW1 \ JMP TESTPUSHM
-ENDCODE
+ ENDCODE
- \
-TESTPOPM ; you should see 11111 3 2 1 0 -->
+ TESTPOPM ; you should see 11111 3 2 1 0 -->
\ test symbolic branch in assembler
\ test a FORTH section encapsulated in an assembly word
\ -----------------------------------------------------------------------
-CODE TEST1 \ the word "CODE" add ASSEMBLER as CONTEXT vocabulary...
-
- MOV &BASEADR,&BASEADR \ to test &xxxx src operand
- CMP #%10,&BASEADR
-0<> IF MOV #2,&BASEADR \ if base <> 2
-ELSE MOV #$0A,&BASEADR \ else base = 2
-THEN
- COLON \ tips : no "ok" displayed in start of line <==> compilation mode
- BASEADR @ U. \ always display 10 !
- ;
+ CODE TEST1 \ the word "CODE" add ASSEMBLER as CONTEXT vocabulary...
+
+ MOV &BASE,&BASE \ to test &xxxx src operand
+ CMP #%10,&BASE
+ 0<> IF MOV #2,&BASE \ if base <> 2
+ ELSE MOV #$0A,&BASE \ else base = 2
+ THEN
+ COLON \ tips : no "ok" displayed in start of line <==> compilation mode
+ BASE @ U. \ always display 10 !
+ ;
\
\ -----------------------------------------------------------------------
\ test a word that starts as word FORTH and ends as assembly word
\ -----------------------------------------------------------------------
-: TEST2 \ ":" starts compilation
- BASEADR @ U. \ always display 10 !
- HI2LO \ switch FORTH to ASM : compile one word (next address)
- \ add vocabulary ASSEMBLER as CONTEXT vocabulary
- \ switch in interpret mode
- CMP #2, &BASEADR
-0<> IF MOV #2, &BASEADR \ if variable system BASE <> 2
-ELSE MOV #10,&BASEADR \ else (BASE = 2)
-THEN
-\ MOV #EXIT,PC \ to pair with ":" i.e. to restore IP saved by : then execute NEXT.
+ : TEST2 \ ":" starts compilation
+ BASE @ U. \ always display 10 !
+ HI2LO \ switch FORTH to ASM : compile one word (next address)
+ \ add vocabulary ASSEMBLER as CONTEXT vocabulary
+ \ switch in interpret mode
+ CMP #2, &BASE
+ 0<> IF MOV #2, &BASE \ if variable system BASE <> 2
+ ELSE MOV #10,&BASE \ else (BASE = 2)
+ THEN
+\ MOV #EXIT,PC \ to pair with ":" i.e. to restore IP saved by : then execute NEXT.
\ but even compile two words, it's better to compile an inline EXIT :
- MOV @RSP+,IP \ restore IP
- MOV @IP+,PC \ = NEXT
-ENDCODE \ ends assembler : remove vocabulary ASSEMBLER from CONTEXT
- \
+ MOV @RSP+,IP \ restore IP
+ MOV @IP+,PC \ = NEXT
+ ENDCODE \ ends assembler : remove vocabulary ASSEMBLER from CONTEXT
+\
\ -----------------------------------------------------------------------
\ test a word that starts as assembly word and ends as FORTH word
\ -----------------------------------------------------------------------
-CODE TEST3 \ "CODE" starts assembler, i.e. add ASSEMBLER as CONTEXT vocabulary
- CMP #2, &BASEADR
-0<> IF MOV #2, &BASEADR \ if variable system BASE <> 2
-ELSE MOV #10,&BASEADR \ else (BASE = 2)
-THEN COLON \
- BASEADR @ U. \ always display 10 !
-; \
- \
+ CODE TEST3 \ "CODE" starts assembler, i.e. add ASSEMBLER as CONTEXT vocabulary
+ CMP #2, &BASE
+ 0<> IF MOV #2, &BASE \ if variable system BASE <> 2
+ ELSE MOV #10,&BASE \ else (BASE = 2)
+ THEN COLON \
+ BASE @ U. \ always display 10 !
+ ; \
+\
\ -----------------------------------------------------------------------
HI2LO
CMP #0,TOS
0= UNTIL MOV @PSP+,TOS
-\ MOV #EXIT,PC \ to pair with ":" i.e. to restore IP saved by : then execute NEXT.
+\ MOV #EXIT,PC \ to pair with ":" i.e. to restore IP saved by : then execute NEXT.
MOV @RSP+,IP \ restore IP
MOV @IP+,PC \ = NEXT
ENDCODE
[THEN]
: BYTES_TABLE_IDX
-CREATE
+CREATE
0 DO I C,
LOOP
DOES>
CODE IDX_TEST1 \ index -- value
MOV.B BYTES_TABLE1(TOS),TOS \ -- value
COLON
- U.
-;
+ U.
+;
0 IDX_TEST1 ; you should see 1 -->
\ -----------------------------------------------------------------------
-\ tests access to a CREATED word with assembler
+\ tests access to a CREATED word with assembler
\ -----------------------------------------------------------------------
TABLE 2 - CONSTANT PFA_TABLE \ PFA_TABLE leave the PFA of TABLE
-CODE REDIRECT ; <table> -- redirects TABLE to argument <table>
+CODE REDIRECT ; <table> -- redirects TABLE to argument <table>
MOV TOS,&PFA_TABLE
MOV @PSP+,TOS
MOV @IP+,PC
ENDCODE
\
-CODE REDIRECT0 ; -- redirects TABLE to TABLE0
+CODE REDIRECT0 ; -- redirects TABLE to TABLE0
MOV #TABLE0,&PFA_TABLE
MOV @IP+,PC
ENDCODE
\
-CODE REDIRECT10 ; -- redirects TABLE to TABLE10
+CODE REDIRECT10 ; -- redirects TABLE to TABLE10
MOV #TABLE10,&PFA_TABLE
MOV @IP+,PC
ENDCODE
\
-CODE REDIRECT20 ; -- redirects TABLE to TABLE20
+CODE REDIRECT20 ; -- redirects TABLE to TABLE20
MOV #TABLE20,&PFA_TABLE
MOV @IP+,PC
ENDCODE
\
\ -----------------------------------------------------------------------
-\ tests behaviour of assembly error
+\ tests behaviour of assembly error
\ -----------------------------------------------------------------------
\ R16 causes an error, assembler context is aborted and the word TEST7 is "hidden".
DEFER TRUC ; here, TRUC is a secondary DEFERred word (i.e. without BODY)
- \
-CODENNM ; leaves its execution address (CFA) on stack
+CODENNM ; does DUP
SUB #2,PSP
MOV TOS,0(PSP)
MOV @IP+,PC
-ENDCODE
+ENDCODE ; leaves its execution address (CFA) on stack
DUP .
TRUC . ; display TOS value -->
-' TRUC >BODY IS TRUC ; TRUC is reinitialzed with its default action
+\ ' DROP IS TRUC ; TRUC is redirected to DROP
+\
+\ TRUC ; The generated error displays stack empty! in reverse video, removes the TRUC definition and restarts the interpretation after the end of the file. And as you see, FastForth is able to display long lines, interesting, doesn't it? -->
+\
+
+' TRUC >BODY IS TRUC ; TRUC is reinitialized with its default action
-TRUC . ; display TOS value -->
+TRUC . ; display TOS value -->
-\ ' DROP IS TRUC ; TRUC is redirected to DROP
-\
-\ TRUC ; The generated error displays stack empty! in reverse video, removes the TRUC definition and restarts the interpretation after the end of the file. And as you see, FastForth is able to display long lines, interesting, doesn't it? -->
-\
\ bla
\ bla
\ bla
-\
-\
-\
-\
-\
-\
-\
+\
+\
+\
+\
+\
+\
+\
\ bla
\ ...
\
\ TARGET SELECTION ( = the name of \INC\target.pat file without the extension)
\ MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
-\
+\ MSP_EXP430FR2355
\ from scite editor : copy your target selection in (shift+F8) parameter 1:
\
\ OR
\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
\
\ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
-\ ASSEMBLER conditionnal usage before ?JMP ?GOTO : S< S>= U< U>= 0= 0<> 0<
+\ ASSEMBLER conditionnal usage before ?JMP ?GOTO : S< S>= U< U>= 0= 0<> 0<
\
\ FORTH conditionnal : 0= 0< = < > U<
-CODE ABORT_TEST_ASMX
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_TEST_ASM definition before resuming
-;
+ CODE ABORT_TEST_ASMX
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ RST_RET \ remove ABORT_TEST_ASM definition before resuming
+ ;
-ABORT_TEST_ASMX \ abort test
+ ABORT_TEST_ASMX \ abort test
+
+ MARKER {TEST_ASMX}
-[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] - [IF]
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF] \ define MAX and MIN
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1 ( = -n3)
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-CODE MAX \ n1 n2 -- n3 signed maximum
+ [UNDEFINED] MAX
+ [IF] \ define MAX and MIN
+ CODE MAX \ n1 n2 -- n3 signed maximum
CMP @PSP,TOS \ n2-n1
S< ?GOTO FW1 \ n2<n1
BW1 ADD #2,PSP
MOV @IP+,PC
-ENDCODE
+ ENDCODE
-CODE MIN \ n1 n2 -- n3 signed minimum
+ CODE MIN \ n1 n2 -- n3 signed minimum
CMP @PSP,TOS \ n2-n1
S< ?GOTO BW1 \ n2<n1
FW1 MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE
+ ENDCODE
+ [THEN]
-[THEN]
-
-[UNDEFINED] C@ [IF]
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] CONSTANT [IF]
\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] BL [IF]
-\ https://forth-standard.org/standard/core/BL
-\ BL -- char an ASCII space
-#32 CONSTANT BL
-[THEN]
-
-[UNDEFINED] SPACE [IF]
+\ CONSTANT <name> n -- define a Forth CONSTANT
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV TOS,-2(W) \ PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
-: SPACE
-BL EMIT ;
-[THEN]
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
-[UNDEFINED] SPACES [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- BL EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
-ENDCODE
-[THEN]
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,TOS
+ 0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,IP
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+ THEN
+ MOV @PSP+,TOS \ -- drop n
+ NEXT
+ ENDCODE
+ [THEN]
-[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] SWAP [IF]
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] >R [IF]
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] R> [IF]
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] U.R [IF] \ defined in {UTILITY}
-: U.R \ u n -- display u unsigned in n width (n >= 2)
- >R <# 0 # #S #>
- R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF] \ defined in {UTILITY}
+ : U.R \ u n -- display u unsigned in n width (n >= 2)
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0, init
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/LOOP
\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
MOV X,-4(W) \ xloop --> HERE
MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP
-MOV #XPLOOP,X
-GOTO BW1 \ goto BW1 LOOP
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] I [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+ DEFER CR \ DEFERed definition, by default executes that of :NONAME
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/BASE
+\ BASE -- a-addr holds conversion radix
+ [UNDEFINED] BASE
+ [IF]
+ BASEADR CONSTANT BASE
+ [THEN]
-[UNDEFINED] DUMP [IF] \ defined in {UTILITY}
\ https://forth-standard.org/standard/tools/DUMP
-CODE DUMP \ adr n -- dump memory
-PUSH IP
-PUSH &BASEADR \ save current base
-MOV #$10,&BASEADR \ HEX base
-ADD @PSP,TOS \ -- ORG END
-LO2HI
- SWAP \ -- END ORG
- DO CR \ generate line
- I 4 U.R SPACE \ generate address
- I 8 + I
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 +
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I \ display 16 chars
- DO I C@ $7E MIN BL MAX EMIT LOOP
- $10 +LOOP
- R> BASEADR ! \ restore current base
-;
-[THEN]
+ [UNDEFINED] DUMP
+ [IF] \ defined in {UTILITY}
+ CODE DUMP \ adr n -- dump memory
+ PUSH IP
+ PUSH &BASE \ save current base
+ MOV #$10,&BASE \ HEX base
+ ADD @PSP,TOS \ -- ORG END
+ LO2HI
+ SWAP \ -- END ORG
+ DO CR \ generate line
+ I 4 U.R SPACE \ generate address
+ I 8 + I
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 +
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I \ display 16 chars
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> BASE ! \ restore current base
+ ;
+ [THEN]
+
+ [UNDEFINED] HERE
+ [IF]
+ CODE HERE
+ MOV #HEREXEC,PC
+ ENDCODE
+ [THEN]
+
+ RST_SET
+
+
+ ECHO
+
+; -----------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER: CALLA (without extended word)
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
+; indexed instructions must be written as $xxxx(REG) (single numbers)
+; -----------------------------------------------------------------------------
-[UNDEFINED] HERE [IF]
-CODE HERE
-MOV #HEREXEC,PC
+HERE
+CODE TT
+CALLA W
ENDCODE
-[THEN]
-
-PWR_HERE
-
-
-ECHO
-; --------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV : Adda|Cmpa|Mova|Suba (without extended word)
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
-; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+HERE OVER - DUMP
+; you should see: 4A 13
+RST_RET
HERE
-CODE TEST
-MOVA @W,T
+CODE TT
+CALLA $3456(W)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 5A 13 56 34
+RST_RET
HERE
-CODE TEST
-MOVA @T+,W
+CODE TT
+CALLA 0(PSP)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>1A 0B<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 5F 13 00 00
+RST_RET
HERE
-CODE TEST
-MOVA &$1.2345,T
+CODE TT
+CALLA @W
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>2B 01 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 6A 13
+RST_RET
HERE
-CODE TEST
-MOVA $.1234(W),S
+CODE TT
+CALLA @PSP
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>3C 0A 34 12<04 44 55 4D
-PWR_STATE
+; you should see: 6F 13
+RST_RET
HERE
-CODE TEST
-MOVA T,&$1.2345
+CODE TT
+CALLA @W+
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>61 0B 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 7A 13
+RST_RET
HERE
-CODE TEST
-MOVA S,$.1234(W)
+CODE TT
+CALLA &$2.3456
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>7A 0C 34 12<04 44 55 4D
-PWR_STATE
+; you should see: 82 13 56 34
+RST_RET
HERE
-CODE TEST
-MOVA #$0.1,S
+CODE TT
+CALLA #$5.6789
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>8C 00 01 00<04 44 55 4D
-PWR_STATE
+; you should see: B5 13 89 67
+RST_RET
+
+; -----------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV : Adda|Cmpa|Mova|Suba
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
+; indexed instructions must be written as $xxxx(REG) (single numbers)
+; -----------------------------------------------------------------------------
HERE
-CODE TEST
-CMPA #$1.2345,S
+CODE TT
+MOVA @W,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>9C 01 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 0B 0A
+RST_RET
HERE
-CODE TEST
-ADDA #$2.3456,S
+CODE TT
+MOVA @T+,W
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>AC 02 56 34<04 44 55 4D
-PWR_STATE
+; you should see: 1A 0B
+RST_RET
HERE
-CODE TEST
-SUBA #$3.4567,S
+CODE TT
+MOVA &$1.2345,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>BC 03 67 45<04 44 55 4D
-PWR_STATE
+; you should see: 2B 01 45 23
+RST_RET
+HERE
+CODE TT
+MOVA 2(PSP),TOS
+ENDCODE
+HERE OVER - DUMP
+; you should see: 3E 0F 02 00
+RST_RET
+HERE
+CODE TT
+MOVA $1234(W),S
+ENDCODE
+HERE OVER - DUMP
+; you should see: 3C 0A 34 12
+RST_RET
HERE
-CODE TEST
-MOVA W,T
+CODE TT
+MOVA T,&$1.2345
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>CB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 61 0B 45 23
+RST_RET
HERE
-CODE TEST
-CMPA W,T
+CODE TT
+MOVA TOS,0(PSP)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>DB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 7F 0E 00 00
+RST_RET
HERE
-CODE TEST
-ADDA W,T
+CODE TT
+MOVA S,$1234(W)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>EB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 7A 0C 34 12
+RST_RET
HERE
-CODE TEST
-SUBA W,T
+CODE TT
+MOVA #$0.1,S
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>FB 0A<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: 8C 00 01 00
+RST_RET
-; --------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER: CALLA (without extended word)
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
-; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+HERE
+CODE TT
+CMPA #$1.2345,S
+ENDCODE
+HERE OVER - DUMP
+; you should see: 9C 01 45 23
+RST_RET
HERE
-CODE TEST
-CALLA W
+CODE TT
+ADDA #$2.3456,S
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>4A 13<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: AC 02 56 34
+RST_RET
HERE
-CODE TEST
-CALLA $.3456(W)
+CODE TT
+SUBA #$3.4567,S
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>5A 13 56 34<04 44 55 4D
-PWR_STATE
+; you should see: BC 03 67 45
+RST_RET
HERE
-CODE TEST
-CALLA @W
+CODE TT
+MOVA W,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>6A 13<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: CB 0A
+RST_RET
HERE
-CODE TEST
-CALLA @W+
+CODE TT
+CMPA W,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>7A 13<04 44 55 4D 50 4F
-PWR_STATE
+; you should see: DB 0A
+RST_RET
HERE
-CODE TEST
-CALLA &$2.3456
+CODE TT
+ADDA W,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>82 13 56 34<04 44 55 4D
-PWR_STATE
+; you should see: EB 0A
+RST_RET
HERE
-CODE TEST
-CALLA #$5.6789
+CODE TT
+SUBA W,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>B5 13 89 67<04 44 55 4D
-PWR_STATE
+; you should see: FB 0A
+RST_RET
-; --------------------------------------------------------------------------------
+; -----------------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES V extended double operand
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+; -----------------------------------------------------------------------------
HERE
-CODE TEST
+CODE TT
MOV S,T
MOVX S,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 4C 40 18 0B 4C<04 44
-PWR_STATE
+; you should see: 0B 4C 40 18 0B 4C
+RST_RET
HERE
-CODE TEST
+CODE TT
ADD T,T
ADDX.A T,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 5B 00 18 4B 5B<04 44
-PWR_STATE
+; you should see: 0B 5B 00 18 4B 5B
+RST_RET
HERE
-CODE TEST
+CODE TT
ADD T,T
RPT X
ADDX.A T,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 5B 89 18 4B 5B<04 44
-PWR_STATE
+; you should see: 0B 5B 89 18 4B 5B
+RST_RET
HERE
-CODE TEST
+CODE TT
ADD T,T
RPT #8
ADDX.A T,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 5B 07 18 4B 5B<04 44
-PWR_STATE
+; you should see: 0B 5B 07 18 4B 5B
+RST_RET
HERE
-CODE TEST
+CODE TT
ADDC #$9876,T
ADDCX.A #$5.9876,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>3B 60 76 98 80 1A 7B 60
-; 76 98<04 44 55 4D
-PWR_STATE
+; you should see: 3B 60 76 98 80 1A 7B 60 76 98
+RST_RET
HERE
-CODE TEST
+CODE TT
ADDC &$9876,T
ADDCX.A &$5.9876,T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>1B 62 76 98 80 1A 5B 62
-; 76 98<04 44 55 4D
-PWR_STATE
+; you should see: 1B 62 76 98 80 1A 5B 62 76 98
+RST_RET
HERE
-CODE TEST
+CODE TT
XOR.B $5432(S),T
XORX.B $6.5432(S),T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>5B EC 32 54 46 18 5B EC
-; 32 54<04 44 55 4D
-PWR_STATE
+; you should see: 5B EC 32 54 46 18 5B EC 32 54
+RST_RET
HERE
-CODE TEST
+CODE TT
SUBC T,$5432(S)
SUBCX.A T,$6.5432(S)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>8C 7B 32 54 06 18 CC 7B
-; 32 54<04 44 55 4D
-PWR_STATE
+; you should see: 8C 7B 32 54 06 18 CC 7B 32 54
+RST_RET
HERE
-CODE TEST
+CODE TT
XOR.B T,$5432(S)
XORX.B T,$6.5432(S)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>CC EB 32 54 46 18 CC EB
-; 32 54<04 44 55 4D
-PWR_STATE
-
-; --------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand (take count of RPT)
-; --------------------------------------------------------------------------------
-; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
+; you should see: CC EB 32 54 46 18 CC EB 32 54
+RST_RET
+
+; -----------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand
+; -----------------------------------------------------------------------------
+; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
-; --------------------------------------------------------------------------------
+; -----------------------------------------------------------------------------
HERE
-CODE TEST
+CODE TT
RRA X
RRAX X
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>09 11 40 18 09 11<04 44
-PWR_STATE
+; you should see: 09 11 40 18 09 11
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC @X
RRCX.A @X
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>29 10 00 18 69 10<04 44
-PWR_STATE
+; you should see: 29 10 00 18 69 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC @S
RRCX.A @S
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>2C 10 00 18 6C 10<04 44
-PWR_STATE
+; you should see: 2C 10 00 18 6C 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC @X+
RRUX.A @X+
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>39 10 00 19 79 10<04 44
-PWR_STATE
+; you should see: 39 10 00 19 79 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC T
RPT #9
RRUX.A T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 10 08 19 4B 10<04 44
-PWR_STATE
+; you should see: 0B 10 08 19 4B 10
+RST_RET
HERE
-CODE TEST
+CODE TT
RRC T
RPT X
RRUX.A T
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>0B 10 89 19 4B 10<04 44
-PWR_STATE
+; you should see: 0B 10 89 19 4B 10
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH #$2345
PUSHX #$0.2345
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>30 12 45 23 40 18 30 12
-; 45 23<04 44 55 4D
-PWR_STATE
+; you should see: 30 12 45 23 40 18 30 12 45 23
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH &$5678
PUSHX.A &$4.5678
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>12 12 78 56 00 1A 52 12
-; 78 56<04 44 55 4D
-PWR_STATE
+; you should see: 12 12 78 56 00 1A 52 12 78 56
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH.B &$33
PUSHX.B &$.33
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>52 12 33 00 40 18 52 12
-; 33 00<04 44 55 4D
-PWR_STATE
+; you should see: 52 12 33 00 40 18 52 12 33 00
+RST_RET
HERE
-CODE TEST
+CODE TT
PUSH.B $3344(T)
PUSHX.B $.3344(T)
ENDCODE
HERE OVER - DUMP
-; you should see: 45 53 54 52>5B 12 44 33 40 18 5B 12
-; 44 33<04 44 55 4D
-PWR_STATE
+; you should see: 5B 12 44 33 40 18 5B 12 44 33
+RST_RET
+
+\ https://forth-standard.org/standard/core/BASE
+\ BASE -- a-addr holds conversion radix
+ [UNDEFINED] BASE
+ [IF]
+ ' # 2 + CONSTANT BASE
+ [THEN]
: %.
-BASEADR @ %10 BASEADR ! SWAP 8 EMIT . BASEADR !
+BASE @ %10 BASE ! SWAP 8 EMIT . BASE !
+RST_RET
;
: %U.
-BASEADR @ %10 BASEADR ! SWAP 8 EMIT U. BASEADR ! ;
-
-PWR_HERE
+BASE @ %10 BASE ! SWAP 8 EMIT U. BASE !
+RST_RET
+;
+RST_SET
; ================
; RRUX test
MOV #%.,PC
ENDCODE
-RRUX_T ; you should see %111100001111000 --> %
-
-PWR_STATE
+RRUX_T ; %
+; you should see: %111100001111000
; ================
; RRUX repeat test
MOV #%.,PC
ENDCODE
-RRUX_T ; you should see %111100001111000 --> %
-
-PWR_STATE
+RRUX_T ; %
+; you should see: %111100001111000
CODE RRUX_T
MOV #$F0F0,Y
MOV #%.,PC
ENDCODE
-RRUX_T ; you should see %111100001111 --> %
-
-PWR_STATE
+RRUX_T ; --> %
+; you should see: %111100001111
CODE RRUX_T
MOV #$F0F0,Y
MOV #%.,PC
ENDCODE
-RRUX_T ; you should see %11110000 --> %
-
-PWR_STATE
-
+RRUX_T ; %
+; you should see: %11110000
; ================
; RRCX test
; ================
-
CODE RRCX_T
MOV #$8000,Y
BIC #C,SR
MOV #%U.,PC
ENDCODE
-RRCX_T ; you should see %100000000000000 --> %
-
-PWR_STATE
+RRCX_T ; %
+; you should see: %100000000000000
; ================
; RRCX repeat test
MOV #%U.,PC
ENDCODE
-RRCX_T ; you should see %100000000000000 --> %
-
-PWR_STATE
+RRCX_T ; %
+; you should see: %100000000000000
CODE RRCX_T
MOV #$8000,Y
MOV #%U.,PC
ENDCODE
-RRCX_T ; you should see %10000000 --> %
-
-PWR_STATE
+RRCX_T ; %
+; you should see: %10000000
; ================
; RRAX test
; ================
-
CODE RRAX_T
MOV #$8000,Y
RRAX Y
MOV #%.,PC
ENDCODE
-RRAX_T ; you should see %-100000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-100000000000000
; ================
; RRAX repeat test
MOV #%.,PC
ENDCODE
-RRAX_T ; you should see %-100000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-100000000000000
CODE RRAX_T
MOV #$8000,Y
MOV #%.,PC
ENDCODE
-RRAX_T ; you should see %-10000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-10000000000000
CODE RRAX_T
MOV #$8000,Y
MOV #%.,PC
ENDCODE
-RRAX_T ; you should see %-1000000000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-1000000000000
CODE RRAX_T
MOV #$8000,Y
MOV #%.,PC
ENDCODE
-RRAX_T ; you should see %-100000000 --> %
-
-PWR_STATE
+RRAX_T ; %
+; you should see: %-100000000
; ================
; RLAX test
RLAX_T ; you should see -2 -->
-PWR_STATE
-
; ================
; RLAX repeat test
; ================
RLAX_T ; you should see -2 -->
-PWR_STATE
-
CODE RLAX_T
MOV #-1,Y
RPT #2
RLAX_T ; you should see -4 -->
-PWR_STATE
-
CODE RLAX_T
MOV #-1,Y
RPT #3
RLAX_T ; you should see -8 -->
-PWR_STATE
-
CODE RLAX_T
MOV #-1,Y
RPT #8
RLAX_T ; you should see -256 -->
-PWR_STATE
-
; ================
; ADDX test
; ================
ADDX_T ; you should see -1 -->
-PWR_STATE
-
; ================
; ADDX repeat test
; ================
ADDX_T ; you should see -1 -->
-PWR_STATE
-
CODE ADDX_T
MOV #0,Y
MOV #-1,X
ADDX_T ; you should see -2 -->
-PWR_STATE
-
CODE ADDX_T
MOV #0,Y
MOV #-1,X
ADDX_T ; you should see -8 -->
-PWR_STATE
-
-
; ================
; SUBX test
; ================
SUBX_T ; you should see 1 -->
-PWR_STATE
-
; ================
; SUBX repeat test
; ================
SUBX_T ; you should see 1 -->
-PWR_STATE
-
CODE SUBX_T
MOV #0,Y
MOV #-1,X
SUBX_T ; you should see 2 -->
-PWR_STATE
-
CODE SUBX_T
MOV #0,Y
MOV #-1,X
SUBX_T ; you should see 8 -->
-PWR_STATE
-
CODE SUBX_T \ W register = R10
MOV #15,W \ RPT [W] times, modulo 16 <--> RPT #16
MOV #0,Y
SUBX_T ; you should see 16 -->
-PWR_STATE
-
CODE SUBX_T
MOV #32,W \ RPT [W] times, modulo 16 <--> RPT #1
MOV #0,Y
SUBX_T ; you should see 1 -->
-PWR_STATE
-
CODE SUBX_T
MOV #33,W \ RPT [W] times, modulo 16 <--> RPT #2
MOV #0,Y
SUBX_T ; you should see 2 -->
-RST_STATE
+{TEST_ASMX}
+++ /dev/null
-\ -----------------------------
-\ MSP-EXP430FR5969_TSTWORDS.4th
-\ -----------------------------
-
-PWR_STATE
-
-\ -----------------------------------------------------------------------
-\ test some assembler words and show how to mix FORTH/ASSEMBLER routines
-\ -----------------------------------------------------------------------
-LOAD" \misc\TestASM.4th"
-
-\ -------------------------------------
-\ here we returned in the TestWords.4th
-\ -------------------------------------
-ECHO
-\ ----------
-\ LOOP tests
-\ ----------
-: LOOP_TEST 8 0 DO I . LOOP
-;
-
-LOOP_TEST \ you should see 0 1 2 3 4 5 6 7 -->
-
-
-: LOOP_TEST1 \ n <LOOP_TEST1> ---
-
- BEGIN DUP U. 1 -
- ?DUP
- 0= UNTIL
-;
-
-: LOOP_MAX \ FIND_NOTHING --
- 0 0
- DO
- LOOP \ 14 cycles by loop
- ABORT" 65536 LOOP "
-;
-
- : FIND_TEST \ FIND_TEST <word> --
- $20 WORD \ -- c-addr
- 50000 0
- DO \ -- c-addr
- DUP
- FIND DROP DROP
- LOOP
- FIND
- 0= IF ABORT" <-- not found !"
- ELSE ABORT" <-- found !"
- THEN
- ;
-
-\ seeking $ word, FIND jumps all words on their first character so time of word loop is 20 cycles
-\ see FIND in the source file for more information
-\
-\ FIND_TEST <lastword> result @ 8MHz, monothread : 1,2s
-\
-\ FIND_TEST $ results @ 8MHz, monothread, 201 words in vocabulary FORTH :
-\ 27 seconds with only FORTH vocabulary in CONTEXT
-\ 540 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 2.6866 us / word, 21,49 cycles / word (for 20 cycles calculated (see FIND in source file)
-\
-\
-\ FIND_TEST $ results @ 8MHz, 2 threads, 201 words in vocabulary FORTH :
-\ 13 second with only FORTH vocabulary in CONTEXT
-\ 260 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 1,293 us / word, 10,34 cycles / word
-\
-\ FIND_TEST $ results @ 8MHz, 4 threads, 201 words in vocabulary FORTH :
-\ 8 second with only FORTH vocabulary in CONTEXT
-\ 160 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 0,796 us / word, 6,37 cycles / word
-\
-\ FIND_TEST $ results @ 8MHz, 8 threads, 201 words in vocabulary FORTH :
-\ 4.66 second with only FORTH vocabulary in CONTEXT
-\ 93 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 0,4463 us / word, 3,7 cycles / word
-\
-\ FIND_TEST $ results @ 8MHz, 16 threads, 201 words in vocabulary FORTH :
-\ 2,8 second with only FORTH vocabulary in CONTEXT
-\ 56 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
-\ 0,278 us / word, 2,22 cycles / word
-\
-\ --------
-\ KEY test
-\ --------
-: KEY_TEST
- ." type a key : "
- KEY EMIT \ wait for a KEY, then emit it
-;
-\ KEY_TEST
--- /dev/null
+\ -----------------------------
+\ MSP-EXP430FR5969_TSTWORDS.f
+\ -----------------------------
+
+\ first, we test for downloading driver only if UART TERMINAL target
+ CODE ABORT_TSTWORDS
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ RST_RET \ remove ABORT_TEST_ASM definition before resuming
+ ;
+
+ ABORT_TSTWORDS \ abort test
+
+ [DEFINED] {TSTWORDS} [IF] {TSTWORDS} [THEN] \ remove it
+
+ MARKER {TSTWORDS}
+
+
+\ https://forth-standard.org/standard/core/ZeroEqual
+\ 0= n/u -- flag return true if TOS=0
+ [UNDEFINED] 0=
+ [IF]
+ CODE 0=
+ SUB #1,TOS \ 1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS \ 1 TOS=-1 if borrow was set
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DUP
+ [IF] \ define DUP and ?DUP
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+ CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/IF
+\ IF -- IFadr initialize conditional forward branch
+ [UNDEFINED] IF
+ [IF] \ define IF THEN
+
+ CODE IF
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/THEN
+\ THEN IFadr -- resolve forward branch
+ CODE THEN
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/ELSE
+\ ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
+ [UNDEFINED] ELSE
+ [IF]
+ CODE ELSE
+ ADD #4,&DP \ make room to compile two words
+ MOV &DP,W \ W=HERE+4
+ MOV #BRAN,-4(W)
+ MOV W,0(TOS) \ HERE+4 ==> [IFadr]
+ SUB #2,W \ HERE+2
+ MOV W,TOS \ -- ELSEadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/SWAP
+\ SWAP x1 x2 -- x2 x1 swap top two items
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ PUSH TOS \ 3
+ MOV @PSP,TOS \ 2
+ MOV @RSP+,0(PSP) \ 4
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/BEGIN
+\ BEGIN -- BEGINadr initialize backward branch
+ [UNDEFINED] BEGIN
+ [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+
+ CODE BEGIN
+ MOV #HEREXEC,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/UNTIL
+\ UNTIL BEGINadr -- resolve conditional backward branch
+ CODE UNTIL
+ MOV #QFBRAN,X
+BW1 ADD #4,&DP \ compile two words
+ MOV &DP,W \ W = HERE
+ MOV X,-4(W) \ compile Bran or QFBRAN at HERE
+ MOV TOS,-2(W) \ compile bakcward adr at HERE+2
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/AGAIN
+\ AGAIN BEGINadr -- resolve uncondionnal backward branch
+ CODE AGAIN
+ MOV #BRAN,X
+ GOTO BW1
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/WHILE
+\ WHILE BEGINadr -- WHILEadr BEGINadr
+ : WHILE
+ POSTPONE IF SWAP
+ ; IMMEDIATE
+
+\ https://forth-standard.org/standard/core/REPEAT
+\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
+
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
+
+\ https://forth-standard.org/standard/core/DO
+\ DO -- DOadr L: -- 0
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0, init
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/LOOP
+\ LOOP DOadr -- L-- an an-1 .. a1 0
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
+ MOV #XLOOP,X
+BW2 ADD #4,&DP \ make room to compile two words
+ MOV &DP,W
+ MOV X,-4(W) \ xloop --> HERE
+ MOV TOS,-2(W) \ DOadr --> HERE+2
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+\ https://forth-standard.org/standard/core/PlusLOOP
+\ +LOOP adrs -- L-- an an-1 .. a1 0
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
+
+
+ RST_SET
+\ -----------------------------------------------------------------------
+\ test some assembler words and show how to mix FORTH/ASSEMBLER routines
+\ -----------------------------------------------------------------------
+LOAD" \misc\TestASM.4th"
+
+ECHO
+
+\ -------------------------------------
+\ here we returned in the TestWords.4th
+\ -------------------------------------
+
+\ ----------
+\ LOOP tests
+\ ----------
+: LOOP_TEST 8 0 DO I . LOOP
+;
+
+LOOP_TEST \ you should see 0 1 2 3 4 5 6 7 -->
+
+
+: LOOP_TEST1 \ n <LOOP_TEST1> ---
+ BEGIN DUP U. 1 -
+ ?DUP
+ 0= UNTIL
+;
+\
+\ : LOOP_MAX \ FIND_NOTHING --
+\ 0 0
+\ DO
+\ LOOP \ 14 cycles by loop
+\ ABORT" 65536 LOOP "
+\ ;
+\
+: FIND_TEST \ FIND_TEST <word> --
+ $20 WORD \ -- c-addr
+ 50000 0
+ DO \ -- c-addr
+ DUP
+ FIND DROP DROP
+ LOOP
+ FIND
+ 0= IF ABORT" <-- not found !"
+ ELSE ABORT" <-- found !"
+ THEN
+ ;
+\
+\ \ seeking $ word, FIND jumps all words on their first character so time of word loop is 20 cycles
+\ \ see FIND in the source file for more information
+\ \
+\ \ FIND_TEST <lastword> result @ 8MHz, monothread : 1,2s
+\ \
+\ \ FIND_TEST $ results @ 8MHz, monothread, 201 words in vocabulary FORTH :
+\ \ 27 seconds with only FORTH vocabulary in CONTEXT
+\ \ 540 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ \ 2.6866 us / word, 21,49 cycles / word (for 20 cycles calculated (see FIND in source file)
+\ \
+\ \
+\ \ FIND_TEST $ results @ 8MHz, 2 threads, 201 words in vocabulary FORTH :
+\ \ 13 second with only FORTH vocabulary in CONTEXT
+\ \ 260 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ \ 1,293 us / word, 10,34 cycles / word
+\ \
+\ \ FIND_TEST $ results @ 8MHz, 4 threads, 201 words in vocabulary FORTH :
+\ \ 8 second with only FORTH vocabulary in CONTEXT
+\ \ 160 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ \ 0,796 us / word, 6,37 cycles / word
+\ \
+\ \ FIND_TEST $ results @ 8MHz, 8 threads, 201 words in vocabulary FORTH :
+\ \ 4.66 second with only FORTH vocabulary in CONTEXT
+\ \ 93 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ \ 0,4463 us / word, 3,7 cycles / word
+\ \
+\ \ FIND_TEST $ results @ 8MHz, 16 threads, 201 words in vocabulary FORTH :
+\ \ 2,8 second with only FORTH vocabulary in CONTEXT
+\ \ 56 us for one search ( which gives the delay for QNUMBER in INTERPRET routine)
+\ \ 0,278 us / word, 2,22 cycles / word
+\ \
+\ \ --------
+\ \ KEY test
+\ \ --------
+\ : KEY_TEST
+\ ." type a key : "
+\ KEY EMIT \ wait for a KEY, then emit it
+\ ;
+\ \ KEY_TEST
+\
\ No newline at end of file
\
\ FastForth kernel compilation minimal options:
\ TERMINAL3WIRES, TERMINAL4WIRES
-\ MSP430ASSEMBLER, CONDCOMP
\
\ ================================================================================
\ REGISTERS USAGE for embedded MSP430 ASSEMBLER
\ ================================================================================
\ don't use R2, R3,
\ R4, R5, R6, R7 must be PUSHed/POPed before/after use
-\ scratch registers S to Y are free,
-\ under interrupt, IP is free,
-\ Apply FORTH rules for TOS, PSP, RSP registers use.
+\ scratch registers S,T,W,X and Y are free,
+\ in interrupt routines, IP is free,
+\ Apply FORTH rules for TOS, PSP, RSP registers.
\
\ PUSHM order : PSP,TOS, IP, S , T , W , X , Y ,rDOVAR,rDOCON,rDODOES,rDOCOL, R3, SR,RSP, PC
\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7 , R6 , R5 , R4 , R3, R2, R1, R0
\
-\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack, with IP first pushed
\
\ POPM order : PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT, Y, X, W, T, S, IP,TOS,PSP
\ POPM order : R0, R1, R2, R3, R4 , R5 , R6 , R7 , R8, R9,R10,R11,R12,R13,R14,R15
\
-\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
+\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack, with IP last poped
\
\ ASSEMBLER conditionnal usage before IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
-\ ASSEMBLER conditionnal usage before ?GOTO : S< S>= U< U>= 0= 0<> 0<
+\ ASSEMBLER conditionnal usage before ?GOTO : S< S>= U< U>= 0= 0<> 0<
\
\ ================================================================================
\ coupled to a PL2303HXD/TA cable, this driver enables a FastForth target to act as USB to I2C_Slave bridge,
\ In addition, it simulates a full duplex communication while the I2C bus is only half duplex.
\ Don't forget to wire 3k3 pull up resistors on wires SDA SCL!
\ ================================================================================
-\
+\
\ driver test : MCLK=24MHz, PL2303HXD with shortened cable (20cm), WIFI off, all windows apps closed else Scite and TERATERM.
-\ -----------
-\ / ┌────────────────────────────────┐
-\ notebook USB to I2C_Slave bridge +-- I2C -->| up to 112 I2C_Slave targets |
+\ ----------- .
+\ . ┌────────────────────────────────┐
+\ notebook USB to I2C bridge +-- I2C -->| up to 112 I2C_Slave targets |
\ ┌───────────────┐ ╔════════════════════════════════════════════════════════════╗ / ┌───────────────────────────────┐ |
-\ | | ║ PL2303HXD target running UARTI2CS @ 24MHz ║ +-- I2C -->| MSP430FR4133 @ 1 MHz | |
+\ | | ║ PL2303HXD device running UARTI2CS @ 24MHz ║ +-- I2C -->| MSP430FR4133 @ 1 MHz | |
\ | | ║───────────────┐ ┌────────────────────────────────║ / ┌───────────────────────────────┐ |──┘
\ | | ║ | 3 wires | MSP430FR2355 @ 24MHz ║/ | MSP430FR5738 @ 24 MHz | |
-\ | TERATERM -o--> USB --o--> USB2UART --o--> UART --o--> FAST FORTH ---> UARTI2CS --o--> I2C --o--> FAST FORTH with option |──┘
-\ | terminal | ║ | 6 MBds | (I2C MASTER) ║ | TERMINAL_I2C (I2C SLAVE) |
+\ | TERATERM -o--> USB --o--> USB2UART --o--> UART --o--> FAST FORTH ---> UARTI2CS --o--> I2C --o--> FAST FORTH with |──┘
+\ | terminal | ║ | 6 MBds | (I2C MASTER) ║ | I2C TERMINAL |
\ | | ║───────────────┘ └────────────────────────────────║ └───────────────────────────────┘
-\ | | ║ |<- l=20cm->| ║
-\ └───────────────┘ ╚════════════════════════════════════════════════════════════╝
+\ | | ║ |<- l=20cm->| ║
+\ └───────────────┘ ╚════════════════════════════════════════════════════════════╝
\
\ test results :
\ ------------
\ downloading (+ interpret + compile + execute) CORETEST.4TH to I2C Master target = 1016ms.
\ downloading (+ interpret + compile + execute) CORETEST.4TH to I2C Slave target = 1422ms.
\ the difference (406 ms) is the time of the I2C Half duplex exchange.
-\ [(45906 chars * 9 bits) + (1533 * 31)] / 0,406 = 1,135 MHz (9 bits / char + (2*START + 2*STOP + 2*addr + CTRL_Char) / line)
+\ [(45906 chars * 9 bits) + (1533 * 31)] / 0,406 = 1,135 MHz (9 bits / char + (2*START + 2*STOP + 2*addr + CTRL_Char) / line)
\ ==> 113 % of I2C Fast-mode Plus (Fm+)!
-\
+\
\ also connected to and tested with another I2C_FastForth target with MCLK = 1MHz (I2C CLK = MCLK ! ).
\
\ The I2C_Slave address is defined as 'MYSLAVEADR' in forthMSP430FR.asm source file of I2C_Slave target.
-\ You can use any pin for SDA and SCL, preferably in the interval Px0...Px3.
-\ you will find SCA and SCL pin by searching 'SM_BUS' in your \inc\target.pat files (I2C_Master and I2C_Slave)
+\ You can use any pin for SDA and SCL, preferably in the interval Px0...Px3.
\ don't forget to add 3.3k pullup resitors on wires SDA and SCL.
\
\
\
\ 1- the I2C bus is Master to Slave oriented, the Slave does not decide anything.
\ This order of things allows in any case to establish the connection.
-\ The I2C Master device is therefore placed on the control TERMINAL side and the FastForth target on the I2C Slave side.
-\ But once the link is established, we have to find a trick to reverse the roles,
+\ The I2C Master device is therefore placed on the TERMINAL side and the FastForth target on the I2C Slave side.
+\ But once the link is established, we have to find a trick to reverse the roles,
\ so that the slave can take control of the data exchange.
\
-\ 2- The I2C bus operates on half duplex.
+\ 2- The I2C bus operates on half duplex.
\ Another trick will be to simulate an I2C_Master TERMINAL in Full Duplex mode.
\
+\ 3- Without forgetting a visual effect to show the lack of I2C connection...
+\
\ Solution: The slave "slavishly" sends control characters to the master,
\ and since this one obeys a bigger man than himself: the programmer..,
\ he makes it his "masterly" duty to obey the slave.
\
-\ To take control of the master, the slave emits 1 of 6+1 CTRL-Char:
+\ To take control of the master, the slave emits one of 5+1 CTRL-Char:
\ CTRL-Char $00 sent by ACCEPT (before falling asleep with SLEEP),
\ CTRL-Char $01 sent by KEY: request to send a single character entered on TERMINAL,
\ CTRL-Char $02 sent by ABORT": request to abort the file being downloaded if any,
\ followed by a START RX for ABORT" message,
-\ CTRL-Char $03 sent by WARM, to do a reSTART RX for WARM message,
\ CTRL-Char $04 sent by NOECHO, to switch the UART to half-duplex mode,
\ CTRL-Char $05 sent by ECHO, to switch the UART to full duplex mode.
\
\ Finally, if the master receives a $FF as data, he considers the link broken,
-\ it performs ABORT which forces a START RX on a loop.
+\ it performs ABORT which forces a START RX into a 500 ms loop with an appropriate visual effect...
\
-\ Once the slave sends the CTRL_Char $00, he falls asleep,
-\ On receipt of this CTRL_Char, the master also falls asleep, awaiting a UART RX interruption.
+\ Once the slave sends the CTRL_Char $00, he falls asleep,
+\ On its receipt, the master also falls asleep, awaiting a UART RX interruption.
\ As long as the TERMINAL is silent, the master and the slave remain in SLEEP mode,
\ (a part the Tx0_INT interrupt every 1/2 s).
\ SLEEP mode is LPM0 for the master (UART does not work if LPMx > LPM0), LPM4 for the slave.
\ -------------
\ Since the slave can't wake up the master with a dedicated interrupt, the master must generate one
\ cyclically to listen to the slave.
-\ HALF_S_INT is used to generate a 1/2 second interrupt, obviously taken into account only when the master goes to sleep.
-\ It performs a (re)START RX that enables the I2C link to be re-established following a RESET performed on I2C_Slave.
-\
-\ This interruption also allows the UARTI2CS program to exit when Teraterm sends a BREAK (Alt-B).
-\
-\ the other interruption U2I_TERM_INT is used to communicate with TERMINAL, by replacing of the TERM_INT one.
-\
-\ Software +----------------------------------+ Hardware
-\ I2C Master | +-------------------+ | I2C Slave
-\ | | | |
-\ UART to I2C bridge SCL SDA connected to: SDA SCL I2CFastForth target
-\ ------------------- ---- ---- ---- ---- ------------------
-\ MSP_EXP430FR5739 P4.1 P4.0 P1.6 P1.7 MSP_EXP430FR5739
-\ MSP_EXP430FR5969 P1.3 P1.2 P1.6 P1.7 MSP_EXP430FR5969
-\ MSP_EXP430FR5994 P8.1 P8.2 P7.0 P7.1 MSP_EXP430FR5994
-\ MSP_EXP430FR6989 P1.5 P1.3 P1.6 P1.7 MSP_EXP430FR6989
-\ MSP_EXP430FR4133 P8.3 P8.2 P5.2 P5.3 MSP_EXP430FR4133
-\ CHIPSTICK_FR2433 P2.2 P2.0 P1.2 P1.3 CHIPSTICK_FR2433
-\ MSP_EXP430FR2433 P3.1 P3.2 P1.2 P1.3 MSP_EXP430FR2433
-\ MSP_EXP430FR2355 P3.3 P3.2 P1.2 P1.3 MSP_EXP430FR2355
-\ LP_MSP430FR2476 P3.3 P3.2 P4.4 P4.3 LP_MSP430FR2476
+\ 500MS_INT is used to generate a 1/2 second interrupt, obviously taken into account only when the master goes to sleep.
+\ It performs a (re)START RX that enables the I2C link to be re-established following a RESET performed on I2C_Slave side.
+\
+\ This interruption also allows to exit the UARTI2CS program when user sends a software BREAK (Teraterm(Alt-B)), or presses SW2.
+\
+\ the other interruption U2I_TERM_INT is used to link the TERMINAL with UARTI2CS instead of FORTH interpreter.
\
\ don't forget to link 3V3 and GND on each side and to add 3k3 pullup resistors on SDA and SCL.
+\
+\ because Txi_int > UCxi_int > Pi.j_int and to ensure U2I_TERM_INT priority greater than 500MS_INT
+\ we choose P1.7 = TB0.2 output linked to P1.6 to use P1.6_int instead of Txi_int for 500MS_INT.
-; ----------------------------------------------------------------------
-; UARTI2CS.f (Software I2C Master)
-; ----------------------------------------------------------------------
-
-\ first, we do some tests before downloading application
-CODE ABORT_UARTI2CS
-SUB #4,PSP
-MOV TOS,2(PSP)
-MOV &KERNEL_ADDON,TOS
-BIT #$7800,TOS
-0<> IF MOV #0,TOS THEN \ if TOS <> 0 (UART TERMINAL), set TOS = 0
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-$0D EMIT \ return to column 1 without CR
-ABORT" FastForth V3.8 please!"
-ABORT" <-- Ouch! unexpected I2C_FastForth target!"
-PWR_STATE \ remove the ABORT_UARTI2CS definition before continuing the download.
-;
-
-ABORT_UARTI2CS \ abort test
+; --------------------------------------------------------- \
+; UARTI2CS.f \ UART to I2C bridge for I2C_FastForth TERMINAL----------+
+; --------------------------------------------------------- \ |
+\ |
+\ |
+\ GND------------------------------GND |
+\ Vcc-------------o---o------------Vcc |
+\ | | |
+\ 3 3 |
+\ k k |
+\ 3 3 v
+\ I2C_FastForth | | UARTI2CS +---------------------------------------+
+\ hardware +--------------|---o-------------+ Software | +-----------------------------+ |
+\ I2C Slave | +-------o----------+ | I2C Master | | +------(option)-----+ | |
+\ | | | | | | | | | |
+\ I2C_FastForth(s) SCL SDA connected to: SDA SCL of I2C to UART bridge TXD RXD RTS connected to : CTS TXD RXD UARTtoUSB <--> COMx <--> TERMINAL
+\ ------------------ ---- ---- ---- ---- ------------------ --- --- --- --- --- --- --------- ---- ------------
+\ MSP_EXP430FR5739 P1.7 P1.6 P4.0 P4.1 MSP_EXP430FR5739 P2.0 P2.1 P2.2 PL2303TA TERATERM.EXE
+\ MSP_EXP430FR5969 P1.7 P1.6 P1.2 P1.3 MSP_EXP430FR5969 P2.0 P2.1 P4.1 PL2303HXD
+\ MSP_EXP430FR5994 P7.1 P7.0 P8.2 P8.1 MSP_EXP430FR5994 P2.0 P2.1 P4.2 CP2102
+\ MSP_EXP430FR6989 P1.7 P1.6 P1.3 P1.5 MSP_EXP430FR6989 P3.4 P3.5 P3.0
+\ MSP_EXP430FR4133 P5.3 P5.2 P8.2 P8.3 MSP_EXP430FR4133 P1.0 P1.1 P2.3
+\ CHIPSTICK_FR2433 P1.3 P1.2 P2.0 P2.2 CHIPSTICK_FR2433 P1.4 P1.5 P3.2
+\ MSP_EXP430FR2433 P1.3 P1.2 P3.2 P3.1 MSP_EXP430FR2433 P1.4 P1.5 P1.0
+\ MSP_EXP430FR2355 P1.3 P1.2 P3.2 P3.3 MSP_EXP430FR2355 P4.3 P4.2 P2.0
+\ LP_MSP430FR2476 P4.3 P4.4 P3.2 P3.3 LP_MSP430FR2476 P1.4 P1.5 P6.1
-[DEFINED] {UARTI2CS} [IF] {UARTI2CS} [THEN] \ remove {UARTI2CS} if already defined
+\ first, we do some tests allowing the download
+\ ------------------------\
+ CODE ABORT_UARTI2CS \
+\ ------------------------\
+ SUB #4,PSP
+ MOV TOS,2(PSP)
+ MOV &KERNEL_ADDON,TOS
+ BIT #$3C00,TOS \ BIT13|BIT12|BIT11|BIT10 test (UART TERMINAL test)
+ 0<> IF MOV #0,TOS THEN \ if TOS <> 0 (UART TERMINAL), set TOS = 0
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ $0D EMIT \ return to column 1 without CR
+ ABORT" FastForth V3.9 please!"
+ ABORT" <-- Ouch! unexpected I2C_FastForth target!"
+ RST_RET \ remove the ABORT_UARTI2CS definition before continuing the download.
+ ;
-MARKER {UARTI2CS} \ {UARTI2CS}+8 = RET_ADR by default
-8 ALLOT \ {UARTI2CS}+10 <-- previous INI_APP
-\ {UARTI2CS}+12 <-- previous TERM_VEC
-\ {UARTI2CS}+14 <-- previous Tx0_x_VEC
-\ {UARTI2CS}+16 <-- Half_Duplex flag : 0=ECHO, <>0=NOECHO
+ ABORT_UARTI2CS \ run tests
-[UNDEFINED] CONSTANT [IF]
-\ https://forth-standard.org/standard/core/CONSTANT
-\ CONSTANT <name> n -- define a Forth CONSTANT
-: CONSTANT
-CREATE
-HI2LO
-MOV TOS,-2(W) \ PFA = n
-MOV @PSP+,TOS
-MOV @RSP+,IP
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ MARKER {UARTI2CS} \ USER_PARAM-2 addr = {UARTI2CS}-2 <-- REMOVE_APP (RET_ADR by default)
+ 10 ALLOT \ USER_PARAM addr = {UARTI2CS} <-- previous HARD_APP
+\ USER_PARAM+2 addr = {UARTI2CS}+2 <-- previous SLEEP_APP
+\ USER_PARAM+4 addr = {UARTI2CS}+4 <-- previous TERM_VEC
+\ USER_PARAM+6 addr = {UARTI2CS}+6 <-- previous P1_VEC
+\ USER_PARAM+8 addr = {UARTI2CS}+8 <-- I2C_Slave_Addr << 1
+\ USER_PARAM+9 addr = {UARTI2CS}+9 <-- Half_Duplex flag : 4 --> NOECHO, <> 4 --> ECHO
-I2CSLA0 CONSTANT I2CS_ADR \ I2CSLA0=$FFA2
+ [UNDEFINED] TSTBIT
+ [IF]
+ CODE TSTBIT \ addr bit_mask -- true/flase flag
+ MOV @PSP+,X
+ AND @X,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
\ note: HDNCODE definitions are HiDdeN and cannot be executed from TERMINAL
-\---------------------------\
-HDNCODE I2CSTOP \ sends a STOP on I2C_BUS
-\---------------------------\ _
-BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ force SCL as output (low)
-NOP3 \ 3 l _
-BIS.B #SM_SDA,&I2CSM_DIR \ 3 l v_ SDA as output ==> SDA low
-NOP3 \ 3 l _
-BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
-NOP3 \ 3 h _
-BIC.B #SM_SDA,&I2CSM_DIR \ 3 h _^ relase SDA (high) when SCL is high = STOP
-MOV @RSP+,PC \
-ENDCODE \
-\---------------------------\
-
-\---------------------------\
-HDNCODE STOP_U2I \ STOP_APP subroutine, the next of TERATERM(ALT+B)|SW2+RST|SYS_failures
-\ --------------------------\ UARTI2CS can't be stopped by any other means.
-BW1 \ <-- I2C_MASTER_RX <-- TERATERM break (Alt+B)
-CMP #RET_ADR,&{UARTI2CS}+8 \
-0<> IF \ run STOP_U2I once, only if MARKER_DOES is already initialized
-\ \ ----------------------\
-\ BIC.B #LED2,&LED2_DIR \ set RX green led OFF
-\ BIC.B #LED2,&LED2_OUT \ set RX green led OFF
-\ BIC.B #LED1,&LED1_DIR \ set TX red led OFF
-\ BIC.B #LED1,&LED1_OUT \ set TX red led OFF
-\ \ ----------------------\
- CALL #I2CSTOP \ stop properly I2C_BUS
- MOV #SM_BUS,W \
- BIC.B W,&I2CSM_DIR \ restore I2C_BUS I/O as input
- BIS.B W,&I2CSM_OUT \ with pull up resistors
- BIS.B W,&I2CSM_REN \
-\ MOV #0,&TA0CTL \ stop timer and clear its interrupt flags IE, IFG
- MOV #0,&TB0CTL \ stop timer and clear its interrupt flags IE, IFG
-\ --------------------------\
- MOV #{UARTI2CS}+10,W \ W = addr of first saved param after MARKER_DOES
- MOV #RET_ADR,-2(W) \ don't forget: restore default MARKER_DOES call address !
- MOV @W+,&WARM+2 \ restore previous (default) INI_APP address
- MOV @W+,&TERM_VEC \ restore previous (default) TERM_VEC value
-\ MOV @W+,&TA0_X_VEC \ restore previous (default) TB0_x_VEC value
- MOV @W+,&TB0_X_VEC \ restore previous (default) TB0_x_VEC value
- MOV #1,TOS \ to identify Alt+B|SW2+RST request in WARM message
-THEN \
-\ --------------------------\ when STOP_U2I is the next of: TERATERM(ALT+B)|SW2+RESET|SYS_failures
-MOV @RSP+,PC \ RET to: WARM_BODY|WARM_BODY|WARM_BODY
-ENDCODE \
-\ --------------------------\
+\ ----------------------------\
+ HDNCODE I2CM_STOP \ sends a STOP on I2C_BUS
+\ ----------------------------\ _
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ force SCL as output (low)
+ NOP3 \ 3 l _
+ BIS.B #SM_SDA,&I2CSM_DIR \ 3 l v_ SDA as output ==> SDA low
+ NOP3 \ 3 l _
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+ NOP3 \ 3 h _
+ BIC.B #SM_SDA,&I2CSM_DIR \ 3 h _^ relase SDA (high) when SCL is high = STOP
+ MOV @RSP+,PC \
+ ENDCODE \
+\ ----------------------------\
+\ ----------------------------\
+ CODE REMOVE_U2I \
+\ ----------------------------\
+BW1 \ <-- TERATERM(ALT+B)|USBtoI2C_bridge(SW2)|SYS_failures
+\ vvvvvvvvvvvv OPTION vvvvvvvv\
+ BIC.B #LED1,&LED1_OUT \ set TX red led OFF
+ BIC.B #LED1,&LED1_DIR \ set TX red led pin as input
+ BIC.B #LED2,&LED2_OUT \ set RX green led OFF
+ BIC.B #LED2,&LED2_DIR \ set RX green led pin as input
+\ ^^^^^^^^^^^^ OPTION ^^^^^^^^\
+ CALL #I2CM_STOP \ stop properly I2C_BUS
+ MOV #SM_BUS,W \
+ BIC.B W,&I2CSM_DIR \ restore I2C_BUS I/O as input
+ BIS.B W,&I2CSM_OUT \ with pull up resistors
+ BIS.B W,&I2CSM_REN \
+\ ----------------------------\
+ MOV #0,&TB0CTL \ stop TBO
+ BIC.B #BIT7,&P1SEL1 \ clear P1.7 SEL1
+ BIC.B #BIT7,&P1DIR \ P1.7 as input
+ BIC.B #BIT6,&P1IE \ stop P1.6 int
+\ ----------------------------\
+ CMP #RET_ADR,&{UARTI2CS}-2 \
+ 0<> IF
+ MOV #{UARTI2CS},W \ W = addr of first user parameter following MARKER
+ MOV #RET_ADR,-2(W) \ don't forget: restore default MARKER_DOES call address !
+ MOV @W+,&HARD_APP \ restore previous (default) HARD_APP value
+ MOV @W+,&SLEEP_APP \ restore previous (default) SLEEP_APP value
+ MOV @W+,&TERM_VEC \ restore previous (default) TERM_VEC value
+ MOV @W+,&P1_VEC \ restore previous (default) P1_VEC value
+ THEN
+\ ----------------------------\
+ MOV #1,TOS \ TOS = USERSYS value we want for TERATERM(ALT+B)|USBtoI2C_bridge(SW2)|SYS_failures events
+ MOV #UART_WARM+4,PC \ display WARM message then RET to FORTH interpreter
+ ENDCODE \ REMOVE_U2I is redirected to this CODENNM definition
+\ ----------------------------\
-\ \ vvvvvvvMulti-Master-Modevvvvvv\
-\ HDNCODE DO_IDLE \
-\ MOV #4,W \ 1 wait bus idle time = 5 µs @ 16 MHz
-\ BEGIN
-\ BIT.B #SM_SCL,&I2CSM_IN \ 3
-\ 0= IF \ 2
-\ MOV #4,W \ 1 if SCL is LOW
-\ THEN
-\ BIT.B #SM_SDA,&I2CSM_IN \ 3
-\ 0= IF \ 2
-\ MOV #4,W \ 1 if SDA is LOW
-\ THEN
-\ SUB #1,W \ 1
-\ 0= UNTIL \ 2
-\ MOV @RSP+,PC
-\ ENDCODE
-\ \ ^^^^^^^Multi-Master-Mode^^^^^^\
+\ ----------------------------------------\
+ HDNCODE I2CM_START \ WX use I2C_Master TX ADdRess with collision detection and resolution
+\ ----------------------------------------\ _
+ BIS.B #SM_SDA,&I2CSM_DIR \ 3 v_ force SDA as output (low)
+ BIS.B &{UARTI2CS}+8,X \ 3 X = Slave_Address&flag
+ NOP3 \ 3
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 v_ force SCL as output (low)
+\ ----------------------------------------\
+\ I2C_Master_Send_I2C_Addr \
+\ ----------------------------------------\
+ MOV.B #8,W \ 1 l count for 7 bits address + R/w bit
+ BEGIN \
+ ADD.B X,X \ 1 l shift one left
+ U>= IF \ 2 l carry set ?
+ BIC.B #SM_SDA,&I2CSM_DIR \ 3 l yes : SDA as input ==> SDA high because pull up resistor
+ ELSE \ 2 l
+ BIS.B #SM_SDA,&I2CSM_DIR \ 3 l no : SDA as output ==> SDA low
+ THEN \ l _
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+\ BEGIN \
+\ BIT.B #SM_SCL,&I2CSM_IN \ 3 h The I2C_Slave hardware takes the I2C address without delay even if the CPU is in the LPM4 state (wired logic).
+\ 0<> UNTIL \ 2 h
+ BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
+\ vvvvvvvvv Multi-Master-Mode vvvvvvvv\
+ 0= IF \ 2 l if SDA input low
+ BIT.B #SM_SDA,&I2CSM_DIR \ 3 l + SDA command high
+ 0= IF \ 2 l = collision detected
+ BIS.B #SM_BUS,&I2CSM_DIR \ 4 l release SDA,SCL
+ BIC.B #SM_BUS,&I2CSM_IES \ 4 l set IES for SDA_IFG and SCL_IFG on low_to_high transition
+ BEGIN \ SDA_IFG=1, SCL_IFG=1
+ BIT.B #SM_BUS,&I2CSM_IFG \ 4 SM_BUS IFG ?
+ BIC.B #SM_BUS,&I2CSM_IFG \ 4 clear SM_BUS IFG
+ 0<> IF \ 2 if yes
+\ MOV #3,W \ 2 SCL is still active: load for 8*15/MHz = 5.6 µs delay @ 8 MHz
+\ MOV #6,W \ 2 SCL is still active: load for 8*15/MHz = 5.6 µs delay @ 16 MHz
+ MOV #9,W \ 2 SCL is still active: load for 8*15/MHz = 5.6 µs delay @ 24 MHz
+ ELSE \ 2 if no
+ NOP2 \ 2 does the same
+ NOP2 \ 2 time as if yes
+ THEN
+ SUB #1,W \ 1
+ 0= UNTIL \ 2 end of collision process
+ ADD #2,RSP \ remove RET to Nack/Ack processing and select..
+ MOV @RSP+,PC \ 2 l RET to ReStart after a collision detection
+ THEN \
+ THEN \
+\ ^^^^^^^^^ Multi-Master-Mode ^^^^^^^^\
+ SUB #1,W \ 1 l bits count-1
+ 0= UNTIL \ 2 l
+\ ----------------------------------------\
+\ I2C_Master_TX get Slave Ack/Nack \
+\ ----------------------------------------\ _
+ BIC.B #SM_SDA,&I2CSM_DIR \ 3 l _^_ after TX address we must release SDA to read Ack/Nack from Slave
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+ BEGIN \ we must wait I2C_Slave software
+ BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released
+ 0<> UNTIL \ 2 h because Slave can strech SCL low (wake up from interrupt)
+ BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA state
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
+\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^\
+ MOV @RSP+,0(RSP) \ remove RET to ReStart after a collision detection
+\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvv\
+ MOV @RSP+,PC \ RET to Nack/Ack select
+ ENDCODE
+\ ----------------------------------------\
-\ **************************************\
-HDNCODE U2I_TERM_INT \ UART RX interrupt starts on first char of each line sent by TERMINAL
-\ **************************************\
-ADD #4,RSP \ 1 remove unused PC_RET and SR_RET
-\ --------------------------------------\
-MOV &{UARTI2CS}+16,W \ 3 W = HALF_DUPLEX = 0 if ECHO, -1 if NOECHO
-MOV #PAD_ORG,T \ 2 T = buffer pointer for UART_TERMINAL input
-MOV #$0D,S \ 2 S = 'CR' = penultimate char of line to be RXed by UART
-BEGIN \
- MOV.B &TERM_RXBUF,Y \ 3 move char from TERM_RXBUF...
- ADD #1,T \ 1
- MOV.B Y,-1(T) \ 3 ... to input buffer
- CMP.B Y,S \ 1 char = CR ? (if yes goto next REPEAT)
-0<> WHILE \ 2 if <>
- CMP #0,W \ 1 HALF_DUPLEX = 0 ?
- 0= IF \ 2 yes, echo is ON
- BEGIN \ )
- BIT #2,&TERM_IFG \ 3 > Test TX_Buf empty, mandatory for low baudrates
- 0<> UNTIL \ 2 )
- MOV.B Y,&TERM_TXBUF \ 3 echo char to UART_TERMINAL
- THEN \
- BEGIN \
- BIT #1,&TERM_IFG \ 3 wait for next char received
- 0<> UNTIL \ 2
-REPEAT \ 2 31 cycles loop ==> up to UART 2.58 Mbds @ 8MHz
-CALL #UART_RXOFF \ stops UART RX still char CR is received, the LF char is being transmitted.
-BEGIN \
- BIT #1,&TERM_IFG \ 3 char LF received ?
-0<> UNTIL \ 2
-\ --------------------------------------\
-BW2 \ <=== Ctrl_char $01 (KEY input)
-\ --------------------------------------\
-MOV.B &TERM_RXBUF,S \ 3 S = last char RXed by UART (LF|KEY)
-MOV.B S,0(T) \ 4 store it into buffer
-\ ======================================\
-\ ======================================\
-\ I2C MASTER TX \ now we transmit UART RX buffer (PAD) to I2C_Slave, S = LF|KEY = last char to transmit
-\ ======================================\
-\ ======================================\
-BW3 \ <=== multi master TX
-\ --------------------------------------\
-\ BIS.B #LED1,&LED1_DIR \ red led ON = I2C TX
-\ BIS.B #LED1,&LED1_OUT \ red led ON = I2C TX
-\ --------------------------------------\
-\ I2C_Master_TX_Start \ here, SDA and SCL must be in idle state
-\ --------------------------------------\ _
-BIS.B #SM_SDA,&I2CSM_DIR \ 3 l v_ force SDA low when SCL is high = START
-MOV.B &I2CS_ADR,X \ 3 h X = Slave_Address
-MOV #PAD_ORG,Y \ 2 h Y = buffer pointer for I2C_Master TX
-NOP3 \ 3 h _
-BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ force SCL as output (low)
-\ --------------------------------------\
-BEGIN
-\ ------------------------------------\
-\ I2C_Master_TX address/Data \
-\ ------------------------------------\
- MOV.B #8,W \ 1 l prepare 8 bits address
- BEGIN \
- ADD.B X,X \ 1 l shift one left
- U>= IF \ 2 l carry set ?
- BIC.B #SM_SDA,&I2CSM_DIR \ 3 l yes : SDA as input ==> SDA high because pull up resistor
- ELSE \ 2 l
- BIS.B #SM_SDA,&I2CSM_DIR \ 3 l no : SDA as output ==> SDA low
- THEN \ l _
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
- BEGIN \ we must wait I2C_Slave software
- BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released
- 0<> UNTIL \ 2 h (because Slave can strech SCL low)
-\ \ vvvvvvvvMulti-Master-Modevvvvvvv\
-\ BIT.B #SM_SDA,&I2CSM_IN \ 3 h test SDA
-\ \ ^^^^^^^^Multi-Master-Mode^^^^^^^\ _
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
-\ \ vvvvvvvvvvvvMulti-Master-Modevvvvvvvvvvv\
-\ 0= IF \ 2 l SDA input low
-\ BIT.B #SM_SDA,&I2CSM_DIR \ 3 l + SDA command high
-\ 0= IF \ 2 l = collision detected
-\ BIS.B #SM_SCL,&I2CSM_DIR \ 4 l release SCL first
-\ CALL #DO_IDLE \ wait stable idle state
-\ GOTO BW3 \ 2 l goto START TX
-\ THEN \
-\ THEN \
-\ \ ^^^^^^^^^^^^Multi-Master-Mode^^^^^^^^^^^\
- SUB #1,W \ 1 l bits count-1
- 0= UNTIL \ 2 l
-\ ------------------------------------\
- BIC.B #SM_SDA,&I2CSM_DIR \ 3 l after TX byte we must release SDA to read Ack/Nack from Slave
-\ ------------------------------------\
-\ I2C_Master_TX get Slave Ack/Nack \
-\ ------------------------------------\ _
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
-\ BEGIN \
-\ BIT.B #SM_SCL,&I2CSM_IN \ 3 h testing SCL released is useless
-\ 0<> UNTIL \ 2 h because no risk of Slave streching SCL low
- NOP3 \ 3 h replaced by NOP3.
- BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA state
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low, to keep I2C_BUS until next I2C_MASTER START (RX|TX)
-\ ------------------------------------\
-0= WHILE \ 1- Slave Ack received \ 2 l out of loop if Nack (goto THEN next REPEAT)
-\ ------------------------------------\
-\ I2C_Master_TX_data_loop \
-\ ------------------------------------\
- CMP S,T \ 1 last char TXed = last char RXed ? (when address is sent, T = 16bits <> S = 8bits)
-\ ------------------------------------\
-0<> WHILE \ 2- TXed char <> last char \ 2 out of loop if TXed char T = last char S to be TXed (goto below REPEAT)
-\ ------------------------------------\
- MOV.B @Y+,X \ 2 l get next RXed char
- MOV X,T \ 1 T = last TX char for comparaison above, on next loop.
-REPEAT \ <-- WHILE2 search "Extended control-flow patterns"...
-THEN \ <-- WHILE1 ...in https://forth-standard.org/standard/rationale
-\ \ --------------------------------------\
-\ BIC.B #LED1,&LED1_DIR \ red led OFF = endof I2C TX
-\ BIC.B #LED1,&LED1_OUT \ red led OFF = endof I2C TX
-\ \ --------------------------------------\
-GOTO FW1 \ X > 4 ==> reSTART RX repeated every 1/2s
-\ ======================================\
-\ END OF I2C MASTER TX \ SCL is kept low until START RX --┐
-\ ======================================\ |
-ENDCODE \ |
-\ **************************************\ v
+\ ****************************************\
+ HDNCODE U2I_TERM_INT \ UART RX interrupt starts on first char of each line sent by TERMINAL
+\ ****************************************\
+ ADD #4,RSP \ 1 remove unused PC_RET and SR_RET
+\ ----------------------------------------\
+\ get one line from UART TERMINAL to PAD \ S = 'CR', T = 0
+\ ----------------------------------------\
+ BEGIN \
+ MOV.B &TERM_RXBUF,Y \ 3 move char from TERM_RXBUF...
+ MOV.B Y,PAD_ORG(T) \ 3 ... to input buffer
+ ADD #1,T \ 1
+ CMP.B Y,S \ 1 char = CR ? (if yes goto next REPEAT)
+ 0<> WHILE \ 2 if <>
+ CMP #4,W \ 1 HALF_DUPLEX = 4 ?
+ 0<> IF \ 2 no, echo is ON
+ BEGIN \ )
+ BIT #2,&TERM_IFG \ 3 > Test TX_Buf empty, mandatory for low baudrates
+ 0<> UNTIL \ 2 )
+ MOV.B Y,&TERM_TXBUF \ 3 return all characters to UART_TERMINAL except CR+LF which will be later by I2C_SLAVE
+ THEN \
+ BEGIN \
+ BIT #1,&TERM_IFG \ 3 wait for next char received
+ 0<> UNTIL \ 2
+ REPEAT \ 2 2 cycles loop ==> up to UART 2.58 Mbds @ 8MHz
+ CALL #UART_RXOFF \ stops UART RX still char CR is received, the LF char is being transmitted.
+ BEGIN \
+ BIT #1,&TERM_IFG \ 3 char LF received ?
+ 0<> UNTIL \ 2
+\ ----------------------------------------\
+BW2 \ <=== KEY input from TERMINAL, via I2C_MASTER
+\ ----------------------------------------\
+ MOV.B &TERM_RXBUF,S \ 3 S = last char RXed by UART (LF|KEY_input), used by I2C_MASTER_TX as last byte to be TXed.
+ MOV.B S,PAD_ORG(T) \ 3 store it into buffer
+\ ========================================\ here I2C_Slave is sleeping in its ACCEPT routine
+\ I2C MASTER TX \ now we transmit UART RX buffer (PAD) to I2C_Slave, S = LF|KEY = last char to transmit
+\ ========================================\
+\ ----------------------------------------\
+\ I2C_Master_TX_Start \ S = last char UART RXed
+\ ----------------------------------------\
+\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^\
+ PUSH PC \ PUSH next address as RET for START with collision detection
+\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvv\
+ MOV #0,X \ to Start I2C_Master_TX
+ CALL #I2CM_START \WX use return to I2C_Master_TX_Start if collision detection on I2C address
+ 0<> ?GOTO FW2 \ if Nack on address
+\ vvvvvvvvvvvvvvv OPTION vvvvvvvvvvvvvvvvv\
+ BIS.B #LED1,&LED1_OUT \ red led ON = I2C TX
+\ ^^^^^^^^^^^^^^^ OPTION ^^^^^^^^^^^^^^^^^\
+ MOV #PAD_ORG,Y \ 2 Y = buffer pointer for I2C_Master TX datas
+ BEGIN \
+ MOV.B @Y,X \ 2 l get first char to be TX
+\ ------------------------------------\
+\ I2C_Master_TX Data from PAD \
+\ ------------------------------------\
+ MOV.B #8,W \ 1 l count for 8 bits data
+ BEGIN \
+ ADD.B X,X \ 1 l shift one left
+ U>= IF \ 2 l carry set ?
+ BIC.B #SM_SDA,&I2CSM_DIR \ 3 l yes : SDA as input ==> SDA high because pull up resistor
+ ELSE \ 2 l
+ BIS.B #SM_SDA,&I2CSM_DIR \ 3 l no : SDA as output ==> SDA low
+ THEN \ l _
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+\ --------------------------------\
+ BEGIN \
+ BIT.B #SM_SCL,&I2CSM_IN \ 3 h TERM2SD" doesn't work if you replace this test by NOP3 !
+ 0<> UNTIL \ 2 h
+\ --------------------------------\ _
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
+ SUB #1,W \ 1 l bits count-1
+ 0= UNTIL \ 2 l
+\ ------------------------------------\
+ BIC.B #SM_SDA,&I2CSM_DIR \ 3 l after TX byte we must release SDA to read Ack/Nack from Slave
+\ ------------------------------------\
+\ I2C_Master_TX get Slave Ack/Nack \
+\ ------------------------------------\ _
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+ BEGIN \
+ BIT.B #SM_SCL,&I2CSM_IN \ 3 h
+ 0<> UNTIL \ 2 h
+ BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA state
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low, to keep I2C_BUS until next I2C_MASTER START (RX|TX)
+\ ----------------------------------------\
+ 0= WHILE \ 1- Slave Ack received \ 2 l out of loop if Nack on data
+\ ----------------------------------------\
+\ I2C_Master_TX_Data_Loop \
+\ ----------------------------------------\
+ CMP.B @Y+,S \ 2 last char I2C TXed = last char UART RXed (LF|KEY) ?
+\ ----------------------------------------\
+ 0= UNTIL \ TXed char = last char \ 2
+\ ----------------------------------------\
+ THEN \ <-- WHILE1 case of I2C_Slave Nack on Master_TX
+\ vvvvvvvvvvvvvvv OPTION vvvvvvvvvvvvvvvvv\
+ BIC.B #LED1,&LED1_OUT \ red led OFF = endof I2C TX
+\ ^^^^^^^^^^^^^^^ OPTION ^^^^^^^^^^^^^^^^^\
+ GOTO FW1 \ SCL is kept low ──────────┐
+\ ========================================\ |
+\ END OF I2C MASTER TX \ |
+\ ========================================\ |
+ ENDCODE \ |
+\ ****************************************\ v
-\ **************************************\
-HDNCODE HALF_S_INT \ wakes up every 1/2s to listen I2C Slave or break from TERMINAL.
-\ **************************************\
-ADD #4,RSP \ 1 remove PC_RET and SR_RET |
-\ --------------------------------------\ |
-FW1 \ <-- the next of TERM_INT above <--┘
-BW3 \ <-- the next of INI_U2I below <--┐
-\ --------------------------------------\ |
-CMP #0,&KERNEL_ADDON \ 3 KERNEL_ADDON(BIT15) = LF XTAL flag
-0>= IF \ if no LF XTAL
-\ MOV #%0001_0101_0110,&TA0CTL \ 3 (re)starts RX_timer,ACLK=VLO=8kHz,/2=4096Hz,up mode,clear timer,enable TA0 int, clear IFG
- MOV #%0001_0101_0110,&TB0CTL \ 3 (re)starts RX_timer,ACLK=VLO=8kHz,/2=4096Hz,up mode,clear timer,enable TB0 int, clear IFG
-ELSE \ if LF XTAL
-\ MOV #%0001_1101_0110,&TA0CTL \ 3 (re)starts RX_timer,ACLK=LFXTAL=32768,/8=4096Hz,up mode,clear timer,enable TA0 int, clear IFG
- MOV #%0001_1101_0110,&TB0CTL \ 3 (re)starts RX_timer,ACLK=LFXTAL=32738,/8=4096Hz,up mode,clear timer,enable TB0 int, clear IFG
-THEN \
-\ ======================================\
-\ I2C_MASTER RX \ le driver I2C_Master envoie START RX en boucle continue (X < 4) ou discontinue (X >= 4).
-\ ======================================\ le test d'un break en provenance de l'UART est intégré dans cette boucle.
-BEGIN \ I2C MASTER START RX \ ABORT|WARM loop back
-\ ------------------------------------\ _
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL to enable ReSTART RX
- BIT #8,&TERM_STATW \ 3 break (Alt+B) sent by TERATERM ?
- 0<> ?GOTO BW1 \ goto STOP_U2I, exit to WARM+4.
-\ ------------------------------------\
-\ I2C_Master_RX_Start_Cond \ here, SDA and SCL must be in idle state
-\ ------------------------------------\ _
- BIS.B #SM_SDA,&I2CSM_DIR \ 3 l v_ force SDA as output (low)
- MOV.B &I2CS_ADR,Y \ 3 h X = Slave_Address
- BIS.B #1,Y \ 1 h set Master RX
- NOP2 \ 2 _
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ force SCL as output (low)
-\ ------------------------------------\
-\ I2C_Master_RX_Send_address \ may be SCL is held low by slave
-\ ------------------------------------\
- MOV.B #8,W \ 1 l prepare 8 bits address
- BEGIN \
- ADD.B Y,Y \ 1 l shift one left
- U>= IF \ 2 l carry set ?
- BIC.B #SM_SDA,&I2CSM_DIR \ 3 l yes : SDA as input ==> SDA high because pull up resistor
- ELSE \ 2 l
- BIS.B #SM_SDA,&I2CSM_DIR \ 3 l no : SDA as output ==> SDA low
- THEN \ _
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
-\ BEGIN \
-\ BIT.B #SM_SCL,&I2CSM_IN \ 3 h testing SCL released is useless
-\ 0<> UNTIL \ 2 h because no risk of Slave streching SCL low
- NOP3 \ 3 replaced by NOP3
-\ \ vvvvvvMulti-Master-Modevvvvvvvvv\
-\ BIT.B #SM_SDA,&I2CSM_IN \ 3 h test SDA
-\ \ ^^^^^^Multi-Master-Mode^^^^^^^^^\ _
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ force SCL as output (low)
-\ \ vvvvvvvvvvvvMulti-Master-Modevvvvvvvvvvv\
-\ 0= IF \ 2 l SDA input low
-\ BIT.B #SM_SDA,&I2CSM_DIR \ 3 l + SDA command high
-\ 0= IF \ 2 l = collision detected
-\ BIS.B #SM_SCL,&I2CSM_DIR \ 4 l release SCL first
-\ CALL #DO_IDLE \ wait stable idle state
-\ GOTO BW3 \ 2 l goto START RX
-\ THEN \
-\ THEN \
-\ \ ^^^^^^^^^^^^Multi-Master-Mode^^^^^^^^^^^\
- SUB #1,W \ 1 l bits count - 1
- 0= UNTIL \ 2 l
-\ ------------------------------------\
-\ Wait Ack/Nack on address \
-\ ------------------------------------\ _
- BIC.B #SM_SDA,&I2CSM_DIR \ 3 l _^_ after TX address we must release SDA to read Ack/Nack from Slave
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
- BEGIN \ we must wait I2C_Slave software
- BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released
- 0<> UNTIL \ 2 h (because Slave can strech SCL low)
- BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
-\ ------------------------------------\
- 0<> IF \ Nack_On_Address \ 2 l
-\ --------------------------------\
-\ I2C_Master Send STOP \
-\ --------------------------------\
- CALL #I2CSTOP \
- MOV #SLEEP,PC \ 4 goto dodo for 1/2 s .. wake up by HALF_S_INT
- THEN \ 2
-\ ------------------------------------\
-\ I2C_Master_RX_data \
-\ \ ------------------------------------\
-\ BIS.B #LED2,&LED2_DIR \ green led ON = I2C RX
-\ BIS.B #LED2,&LED2_OUT \ green led ON = I2C RX
-\ \ ------------------------------------\
- BEGIN
- BEGIN
- BIC.B #SM_SDA,&I2CSM_DIR \ 4 l after Ack and before RX next byte, we must release SDA
- MOV.B #8,W \ 1 l prepare 8 bits transaction
-\ ----------------------------\
- BEGIN \
-\ -------------------------\ _
-\ do SCL pulse \ SCL _| |_
-\ -------------------------\ _
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
-\ BEGIN \
-\ BIT.B #SM_SCL,&I2CSM_IN \ 3 h testing SCL released is useless
-\ 0<> UNTIL \ 2 h because no risk of Slave streching SCL low
- NOP3 \ 3 replaced by NOP3
- BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low 13~
- ADDC.B X,X \ 1 l C <--- X(7) ... X(0) <--- SDA
- SUB #1,W \ 1 l count down of bits
- 0= UNTIL \ 2 l here, slave releases SDA
-\ ----------------------------\
-\ case of RX data $FF \
-\ ----------------------------\
- CMP.B #-1,X \ 1
- 0= IF \ 2 received char $FF: let's consider that the slave is lost...
- MOV #2,X \ to do ABORT action
- THEN \
-\ ----------------------------\
- CMP.B #8,X \ 1 l $08 = char BS
- U>= WHILE \ 2 l ASCII char received, from char 'BS' up to char $7F.
-\ ----------------------------\
- BEGIN \
- BIT #2,&TERM_IFG \ 3 l UART TX buffer empty ?
- 0<> UNTIL \ 2 l loop if no
-\ ----------------------------\
- BIS.B #SM_SDA,&I2CSM_DIR \ 3 l prepare Ack
-\ ----------------------------\
-\ I2C_Master_RX Send Ack \ on ASCII char >= $08
-\ ----------------------------\ _
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
- BEGIN \ we must wait I2C_Slave software
- BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released
- 0<> UNTIL \ 2 h (because Slave can strech SCL low)
-\ ----------------------------\
- MOV.B X,&TERM_TXBUF \ 3 h send RXed ASCII char to UART TERMINAL
-\ ----------------------------\ _
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
- REPEAT \ 2 l loop back to I2C_Master_RX_data for chars >= 8
-\ --------------------------------\
-\ case of RX CTRL_Chars < $08 \ here Master holds SCL low, Slave can test it: CMP #8,&TERM_STATW
-\ --------------------------------\ see forthMSP430FR_TERM_I2C.asm
- CMP.B #4,X \ 1
- U>= IF \ 2
- MOV #0,&{UARTI2CS}+16 \ preset ECHO
- 0= IF \ 2
- MOV #-1,&{UARTI2CS}+16 \ 3 set NOECHO if char $04
- THEN
- BIS.B #SM_SDA,&I2CSM_DIR \ 3 l prepare Ack for Ctrl_Chars $04 $05
+\ wakes up every 1/2s by P1.6 int to listen I2C Slave or
+\ break from TERMINAL/USB_to_I2C_bridge.
+\ ********************************************\ |
+ HDNCODE 500MS_INT \ |
+\ ********************************************\ |
+ ADD #4,RSP \ 1 remove PC_RET, SR_RET |
+\ --------------------------------------------\ |
+FW1 \ <────── does START <──────┘
+FW2 \ <────── if Nack on Address Master TX
+\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^^^^^\
+ PUSH PC \ PUSH next address as RET for START with collision detection
+\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvvvvvv\
+\ ============================================\
+\ I2C_MASTER RX \ le driver I2C_Master envoie START RX en boucle continue (X < 4) ou discontinue (X >= 4).
+\ ============================================\ le test d'un break en provenance de l'UART est intégré dans cette boucle.
+ BEGIN \
+\ ----------------------------------------\
+\ QUIT on user request tests \
+\ ----------------------------------------\
+ BIT #8,&TERM_STATW \ 3 break sent by TERATERM (Alt+B) ?
+ 0<> ?GOTO BW1 \ 2 goto REMOVE_U2I, RET to WARM+4 with TOS=1.
+ BIT.B #SW2,&SW2_IN \ 3 USB_to_I2C_bridge(SW2) pressed ?
+ 0= ?GOTO BW1 \ 2 goto REMOVE_U2I, RET to WARM+4 with TOS=1.
+\ ----------------------------------------\
+\ I2C MASTER START RX \
+\ ----------------------------------------\ _
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL to enable START RX
+ MOV #1,X \ to Start I2C_Master as RX
+ CALL #I2CM_START \ Start MASTER RX
+ 0<> IF \ if Nack_On_Address
+ CALL #I2CM_STOP \ I2C_Master Send STOP
+ MOV #'.',&TERM_TXBUF \ to view the absence of I2C_target at the I2C_Addr provided.
+ MOV #SLEEP,PC \ which executes SLEEP_U2I then RXON before LPM0 shut down.
+ THEN \
+\ ----------------------------------------\
+\ I2C_Master_RX_data \
+\ ----------------------------------------\
+\ vvvvvvvvvvvvv OPTION vvvvvvvvvvvvvvvvvvv\
+ BIS.B #LED2,&LED2_OUT \ green led ON = I2C RX
+\ ^^^^^^^^^^^^^ OPTION ^^^^^^^^^^^^^^^^^^^\
+ BEGIN \
+ BEGIN \
+ BIC.B #SM_SDA,&I2CSM_DIR \ 4 l after Ack and before RX next byte, we must release SDA
+ MOV.B #8,W \ 1 l prepare 8 bits transaction
+ BEGIN \
+\ ----------------------------\ _
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+\ ----------------------------\
+ BIT.B #SM_SDA,&I2CSM_IN \ 3 h get SDA
+\ ----------------------------\ _
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low 13~
+ ADDC.B X,X \ 1 l C <--- X(7) ... X(0) <--- SDA
+ SUB #1,W \ 1 l count down of bits
+ 0= UNTIL \ 2 l here, slave has set SDA for next bit
+\ --------------------------------\
+\ case of RX data $FF \ case of -1 SYS for example
+\ --------------------------------\
+ CMP.B #-1,X \ 1
+ 0= IF \ 2 received char $FF: let's consider that the slave is lost...
+ MOV #2,X \ to do ABORT action after Nack sent
+ THEN \
+\ --------------------------------\
+ CMP.B #8,X \ 1 l $08 = char BS
+ U>= WHILE \ 2 l ASCII char received, from char 'BS' up to char $7F.
+\ --------------------------------\
+\ I2C_Master_RX Send Ack \ on ASCII char >= $08
+\ --------------------------------\
+ BIS.B #SM_SDA,&I2CSM_DIR \ 3 l _ set SDA as Ack
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+ BEGIN \ we must wait I2C_Slave software (data processing)
+ BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released,
+ 0<> UNTIL \ 2 h _ because Slave can strech SCL low
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
+\ --------------------------------\
+\ I2C_Master echoes to TERMINAL \
+\ --------------------------------\
+ BEGIN \
+ BIT #2,&TERM_IFG \ 3 l UART TX buffer empty ?
+ 0<> UNTIL \ 2 l loop if no
+ MOV.B X,&TERM_TXBUF \ 3 h send RXed ASCII char to UART TERMINAL
+ REPEAT \ 2 l loop back to I2C_Master_RX_data for chars >= 8
+\ ------------------------------------\
+\ case of RX CTRL_Chars < $08 \ here Master holds SCL low, Slave can test it: CMP #8,&TERM_STATW
+\ ------------------------------------\ see forthMSP430FR_TERM_I2C.asm
+ CMP.B #4,X \ 1
+ U>= IF \ 2
+ MOV.B X,&{UARTI2CS}+9 \ set NOECHO = $04, ECHO = $05
+ BIS.B #SM_SDA,&I2CSM_DIR \ 3 l prepare Ack for Ctrl_Chars $04 $05
+ THEN \
+\ ------------------------------------\
+\ Master_RX send Ack/Nack on data \ Ack for $04, $05, Nack for $00, $01, $02
+\ ------------------------------------\ _
+ BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
+ BEGIN \ we must wait I2C_Slave software (data processing)
+ BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released
+ 0<> UNTIL \ 2 h (because Slave can strech SCL low)
+ BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA as TX Ack/Nack state
+ BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
+\ ------------------------------------\ l
+ 0<> UNTIL \ if Ack, loop back to Master_RX data for CTRL_Char $04,$05
+\ ----------------------------------------\
+\ Nack is sent by Master \ l case of CTRL-Char {$00|$01|$02}
+\ ----------------------------------------\
+ CMP.B #2,X \ $02 = ctrl_char for ABORT request
+ U>= WHILE \
+\ ----------------------------------------\
+\ CTRL_Char $02|$03 \ l if ABORT request, SDA is high, SCL is low
+\ ----------------------------------------\
+ 0= IF \ if ABORT request $02 :
+ MOV.B #0,&{UARTI2CS}+9 \ set echo ON I2C_Master side
+ CALL #UART_RXON \ resume UART downloading source file
+ BEGIN \
+ BIC #UCRXIFG,&TERM_IFG \ clear UCRXIFG
+ MOV &FREQ_KHZ,X \ 1000, 2000, 4000, 8000, 16000, 240000
+\ BEGIN MOV #32,W \ 2~ <-------+ windows 10 seems very slow...
+\ BEGIN SUB #1,W \ 1~ <---+ | ==> ((32*3)+5)*FREQ_KHZ/1000 = 101ms delay
+\ 0= UNTIL \ 2~ 3~ loop ---+ | to refill its USB buffer
+\ SUB #1,X \ 1~ |
+\ 0= UNTIL \ 2~ 101~ loop -----+
+ BEGIN MOV #65,W \ 2~ <-------+ linux with minicom seems very very slow...
+ BEGIN SUB #1,W \ 1~ <---+ | ==> ((65*3)+5)*FREQ_KHZ/1000 = 200ms delay
+ 0= UNTIL \ 2~ 3~ loop ---+ | to refill its USB buffer
+ SUB #1,X \ 1~ |
+ 0= UNTIL \ 2~ 200~ loop -----+
+ BIT #UCRXIFG,&TERM_IFG \ 4 new char in TERMRXBUF during this delay ?
+ 0= UNTIL \ 2 yes, the input stream may be still active: loop back
THEN
-\ --------------------------------\
-\ Master_RX send Ack/Nack on data \ Ack for $04, $05, Nack for $00, $01, $02, $03
-\ --------------------------------\ _
- BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
- BEGIN \ we must wait I2C_Slave software
- BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released
- 0<> UNTIL \ 2 h (because Slave can strech SCL low)
- BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA as TX Ack/Nack state
- BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
-\ --------------------------------\ l
- 0<> UNTIL \ if Ack, loop back to Master_RX data for CTRL_Char $04,$05
-\ ------------------------------------\
-\ Nack is sent by Master \ l case of CTRL-Char {$00|$01|$02|$03}
-\ ------------------------------------\
- CMP.B #2,X \ $02 = ctrl_char for ABORT request
-U>= WHILE \ $03 = Ctrl_Char for WARM request
-\ ------------------------------------\
-\ CTRL_Char $02|$03 \ l if ABORT|WARM requests, SDA is high, SCL is low
-\ ------------------------------------\
- 0= IF \ if ABORT request:
- MOV #0,&{UARTI2CS}+16 \ set echo ON I2C_Master side
- CALL #UART_RXON \ resume UART downloading source file
- BEGIN \
- BIC #UCRXIFG,&TERM_IFG \ clear UCRXIFG
- MOV &FREQ_KHZ,Y \ 1000, 2000, 4000, 8000, 16000, 240000
- BEGIN MOV #32,W \ 2~ <-------+ windows 10 seems very slow...
- BEGIN SUB #1,W \ 1~ <---+ | ==> ((32*3)+5)*1000 = 101ms delay
- 0= UNTIL \ 2~ 3~ loop ---+ | to refill its USB buffer
- SUB #1,Y \ 1~ |
- 0= UNTIL \ 2~ 101~ loop -----+
-\ BEGIN MOV #65,W \ <-------+ linux with minicom seems very very slow...
-\ BEGIN SUB #1,W \ <---+ | ==> ((65*3)+5)*1000 = 200ms delay
-\ 0= UNTIL \ 3~ loop ---+ | to refill its USB buffer
-\ SUB #1,Y \ |
-\ 0= UNTIL \ 200~ loop -----+
- BIT #UCRXIFG,&TERM_IFG \ 4 new char in TERMRXBUF during this delay ?
- 0= UNTIL \ 2 yes, the input stream may be still active: loop back
- THEN \
-REPEAT \ l loop back to reSTART RX
-\ --------------------------------------\
-\ I2C_Master_RX Send STOP \ l remainder: CTRL_Chars $00,$01
-\ --------------------------------------\
-CALL #I2CSTOP \
-\ \ --------------------------------------\
-\ BIC.B #LED2,&LED2_DIR \ green led OFF = endof I2C RX
-\ BIC.B #LED2,&LED2_OUT \ green led OFF = endof I2C RX
-\ ======================================\
-\ END OF I2C MASTER RX \ here I2C_bus is freed, Nack on Ctrl_char $FF|$00|$01 remains to be processed.
-\ ======================================\
-\ I2C_Slave KEY ctl_char $01 \ I2C_Slave request for KEY input
-\ --------------------------------------\
-CMP.B #1,X \
-\ Quand I2C_Master reçoit ce caractère de contrôle,
-\ il attend un caractère en provenance de TERMINAL UART
-\ et une fois ce caractère reçu reSTART TX pour l'envoyer à I2C_Slave
-0= IF \
- MOV #PAD_ORG,T \ ready to store KEY char: MOV.B S,0(T)
- CALL #UART_RXON \ enables TERMINAL to TX; use no registers
- BEGIN \ wait for a char
- BIT #UCRXIFG,&TERM_IFG \ received char ?
- 0<> UNTIL \
- CALL #UART_RXOFF \ stops UART RX then
- GOTO BW2 \ goto end of UART RX line input, for receiving last char
-THEN \
-\ --------------------------------------\
-\ I2C_Slave ACCEPT ctrl_char $00 \ I2C_Slave requests I2C_Master to stop RX and start TX
-\ --------------------------------------\
-\ en début de sa routine ACCEPT, I2C_Slave envoie sur le bus I2C le caractère de contrôle $00
-\ avant de s'endormir avec SLEEP
-\ I2C_Master envoie NACK + STOP pour signifier la fin de la transaction.
-\ --------------------------------------\
-\ et si I2C_Slave est sorti de son sommeil par un START RX, idem.
-\ --------------------------------------\
-MOV #SLEEP,PC \ executes RXON (that enables TERMINAL to TX) before LPM0 shut down.
-\ --------------------------------------\
-\ I2C_Master se réveillera au premier caractère saisi sur le TERMINAL ==> TERM_INT,
-\ ou en fin du temps TxIFG ==> HALF_S_INT\
-ENDCODE \
-\ **************************************\
+ REPEAT \ loop back to reSTART RX
+\ --------------------------------------------\
+\ I2C_Master_RX Send STOP \ remainder: CTRL_Chars $00,$01
+\ --------------------------------------------\
+ CALL #I2CM_STOP \
+\ vvvvvvvvvvvvvvv OPTION vvvvvvvvvvvvvvvvvvvvv\
+ BIC.B #LED2,&LED2_OUT \ green led OFF = endof I2C RX
+\ ^^^^^^^^^^^^^^^ OPTION ^^^^^^^^^^^^^^^^^^^^^\
+\ ============================================\
+\ END OF I2C MASTER RX \ here I2C_bus is freed, Nack on Ctrl_char $00|$01 remains to be processed.
+\ ============================================\
+ CMP.B #0,X \
+\ --------------------------------------------\
+\ I2C_Slave ACCEPT ctrl_char $00 \ I2C_Slave requests I2C_Master to stop RX
+\ --------------------------------------------\
+\ en début de sa routine ACCEPT, I2C_Slave envoie sur le bus I2C le caractère de contrôle $00
+\ avant de s'endormir avec SLEEP.
+\ Quand I2C_Slave est sorti de son sommeil par un START RX, il renvoie aussi un $00.
+\ I2C_Master envoie alors ce NACK + STOP pour signifier la fin de la transaction.
+\ --------------------------------------------\
+\ I2C_Master se réveillera au premier caractère saisi sur le TERMINAL ==> TERM_INT,
+\ ou en fin du temps TxIFG ==> 500MS_INT \
+ 0= IF \ prepare U2I_TERM_INT environment
+ MOV #SLEEP,PC \ which executes SLEEP_U2I then RXON, enabling TERMINAL TX, before LPM0 shut down.
+ THEN \
+\ --------------------------------------------\
+\ I2C_Slave KEY ctl_char $01 \ I2C_Slave request for KEY input
+\ --------------------------------------------\
+\ Quand I2C_Master reçoit ce caractère de contrôle,
+\ il attend un caractère en provenance de TERMINAL UART
+\ et une fois ce caractère reçu ReStart TX pour l'envoyer à I2C_Slave
+ CALL #UART_RXON \ enables TERMINAL to TX; use no registers
+ BEGIN \ wait for a char
+ BIT #UCRXIFG,&TERM_IFG \ received char ?
+ 0<> UNTIL \
+ CALL #UART_RXOFF \ stops UART RX; use no registers
+ MOV #0,T \ ready to store KEY char as last char to be received
+ GOTO BW2 \ goto end of UART RX line input
+ ENDCODE \
+\ ********************************************\
-\---------------------------\
-HDNCODE INI_U2I \ define INI_HARD_APP subroutine called by WARM
-\ --------------------------\
-CALL &{UARTI2CS}+10 \ previous INI_APP executing init TERM_UC, activates I/O and sets TOS = RSTIV_MEM.
-\ --------------------------\ TOS = SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
-CMP #$0E,TOS \ SVSHIFG SVSH event ?
-0<> IF \ if not
- CMP #$0A,TOS \ RSTIV_MEM >= violation memory protected areas ?
- U>= ?GOTO BW1 \ execute STOP_U2I then RET to BODY of WARM
-THEN \ RSTIV_MEM = {$00,$02,$04,$6,$0E} as: {WARM,PWR_ON,RST,COLD,SVSH_Threshold}
-BIT.B #SW2,&SW2_IN \ SW2 pressed ?
-0= ?GOTO BW1 \ if yes execute STOP_U2I then RET to BODY of WARM
-MOV #0,&RSTIV_MEM \ clear RSTIV_MEM before next RST event!
-\ --------------------------\
-\ init HALF_S_INT \ used to scan I2C_Slave hard RESET and to slow (re)START RX loop
-\ --------------------------\
-MOV #$800,&TB0CCR0 \ time = (2047+1)/4096 = 0.5s
-\ MOV #$800,&TA0CCR0 \ time = (2047+1)/4096 = 0.5s
-\ --------------------------\
-\ init I2C_MASTER I/O \ see \inc\your_target.pat to find I2C MASTER SDA & SCL pins (as SM_BUS)
-\ --------------------------\
-BIC.B #SM_BUS,&I2CSM_REN \ remove internal pullup resistors to avoid pulling down resistors with next instruction:
-BIC.B #SM_BUS,&I2CSM_OUT \ preset SDA + SCL output LOW
-\ --------------------------\
-GOTO BW3 \ goto I2C_Master START RX loop, with no other return than ALT+B|SW2+RST
-\ --------------------------\
-ENDCODE \
-\ --------------------------\
-\
-\ ==============================================================
-\ Driver UART to I2CM which does the bridge USB to I2C_FastForth
-\ ==============================================================
+\ --------------------------------------------\
+ HDNCODE SLEEP_U2I \ new SLEEP_APP subroutine called by SLEEP before shutdown
+\ --------------------------------------------\
+ KERNEL_ADDON LF_XTAL TSTBIT \
+ [IF] MOV #%1_1001_0100,&TB0CTL ; if ACLK=LFXTAL \ 3 (re)starts RX_timer,ACLK=LFXTAL=32768/4=8192Hz,up mode,clear timer
+ [ELSE] MOV #%1_0001_0100,&TB0CTL ; if ACLK=VLO \ 3 (re)starts RX_timer,ACLK=VLO=8kHz, up mode,clear timer
+ [THEN] \
+ MOV.B &{UARTI2CS}+9,W \ 3 W = HALF_DUPLEX = $04 if NOECHO, $05 if ECHO
+ MOV #'CR',S \ 2 S = 'CR' = penultimate char of line to be RXed by UART
+ MOV #0,T \ 2 T = init buffer pointer for UART_TERMINAL input
+ BIC #BIT6,&P1IFG \ 3 clear P1.6 IFG
+ MOV &{UARTI2CS}+2,PC \ which executes RXON, enabling TERMINAL TX, before LPM0 shut down.
+ ENDCODE \
+\ --------------------------------------------\
+\ ----------------------------\
+ HDNCODE INIT_U2I \ adds the INIT_HARD_APP to HARD_APP called by PUC|WARM
+\ ----------------------------\
+\ init 500MS_INT \ used to scan I2C_Slave hard RESET and to slow down (re)START RX loop
+\ ----------------------------\
+\ MOV #%10_1101_0100,&TB0_CTL \ ACLK/4=8192Hz, up mode, clear timer
+ MOV #4096,&TB0CCR0 \ time 0.5s
+\ ------------------------------\
+\ set TB0.2 to generate pulse \
+\ ------------------------------\
+ MOV #$60,&TB0CCTL2 \ output mode = set/reset
+ MOV #4095,&TB0CCR2 \ 0.12 ms pulse
+ BIS.B #BIT7,&P1DIR \ P1.7 as output
+ BIS.B #BIT7,&P1SEL1 \ P1.7 as TB0.2 output
+ BIS.B #BIT6,&P1IE
+\ ----------------------------\
+\ init I2C_MASTER I/O \ see \inc\your_target.pat to find I2C MASTER SDA & SCL pins (as SM_BUS)
+\ ----------------------------\
+ BIC.B #SM_BUS,&I2CSM_REN \ remove internal pull up resistors because the next instruction which change them to pull down resistors
+ BIC.B #SM_BUS,&I2CSM_OUT \ preset SDA + SCL output LOW
+\ ----------------------------\
+\ vvvvvvvvv OPTION vvvvvvvvvvv\
+ BIS.B #LED1,&LED1_DIR \ set red led (I2C TX) pin as output
+ BIS.B #LED2,&LED2_DIR \ set green led (I2C RX) pin as output
+\ ^^^^^^^^^ OPTION ^^^^^^^^^^^\
+\ ----------------------------\
+\ run previous INIT_HARD_APP \
+\ ----------------------------\
+ CALL &{UARTI2CS} \ execute previous INIT_HARD_APP to init TERM_UC, activates I/O.
+\ ----------------------------\ TOS = SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
+\ define new SYSRSTIV select \
+\ ----------------------------\
+ CMP #$0E,TOS \ SVSHIFG SVSH event ?
+ 0<> IF \ if not
+ CMP #$0A,TOS \ SYSRSTIV >= violation memory protected areas ?
+ U>= ?GOTO BW1 \ if yes goto REMOVE_U2I, RET to WARM+4.
+ THEN \ else TOS = SYSRSTIV = {$02,$06,$0E} as: {PWR_ON,RST,SVSH_Threshold}
+ BIS.B #BIT6,&P1IFG \ to force wake up from SLEEP to execute 500MS_INT.
+\ ----------------------------\
+ MOV #ABORT,PC \ skip WARM message, goto ABORT --> ACCEPT --> SLEEP.
+ ENDCODE \
+\ ----------------------------\
+\
+\
+\ ==============================================================================
+\ Driver UART to I2C to do a bridge USB to I2C_FastForth devices
+\ ==============================================================================
+\
\ I2C address mini = 10h, maxi = 0EEh (I2C-bus specification and user manual V6)
-\ type on TERMINAL "16 UARTI2CS" to link teraterm TERMINAL with FastForth I2C_Slave at address $10
-\ you can also link with last known I2C_Slave address : "I2CS_ADR @ UARTI2CS"
-\
-: UARTI2CS \ I2C_Slave_Address_%0 --
-CR I2CS_ADR ! \ -- save I2C_Slave_Address_%0
-HI2LO
-CMP #RET_ADR,&{UARTI2CS}+8 \
-0= IF \ save parameters only if MARKER_DOES is not initialized
- MOV #STOP_U2I,&{UARTI2CS}+8 \ MARKER_DOES of {UARTI2CS} will do CALL &{UARTI2CS}+8 = CALL #STOP_U2I
- MOV &WARM+2,&{UARTI2CS}+10 \ save previous INI_APP from WARM PFA to {UARTI2CS}+10
- MOV &TERM_VEC,&{UARTI2CS}+12 \ save previous TERM_VEC value to {UARTI2CS}+12, see target.pat
- MOV &TB0_X_VEC,&{UARTI2CS}+14 \ save previous TB0_X_VEC value to {UARTI2CS}+14
- \ MOV &TA0_X_VEC,&{UARTI2CS}+14 \ save previous TA0_X_VEC value to {UARTI2CS}+14
- MOV #0,&{UARTI2CS}+16 \ reset Half_Duplex variable (set ECHO ON)
- MOV #INI_U2I,&WARM+2 \ replace INI_APP by new INI_U2I
- MOV #U2I_TERM_INT,&TERM_VEC \ set TERM_VEC with U2I_TERM_INT
- MOV #HALF_S_INT,&TB0_X_VEC \ set TB0_X_VEC with HALF_S_INT
- \ MOV #HALF_S_INT,&TA0_X_VEC \ set TA0_X_VEC with HALF_S_INT
-THEN
-MOV #WARM,PC \ execute INI_U2I then goto BW3; abort with Alt-B or SW2+RST.
-ENDCODE
+\ type on TERMINAL "$12 UARTI2CS" to link teraterm TERMINAL with FastForth I2C_Slave target at address $12
+
+\ UARTI2CS starts the USB to I2C bridge, to quit: TERATERM(Alt-B) or USB_to_I2C_bridge(SW2)
+\ --------------------------------\
+ : UARTI2CS \ I2C_Addr&b0 --
+\ --------------------------------\ init UARTI2CS environment.
+ 'CR' EMIT 'LF' EMIT \
+ HI2LO
+ MOV @RSP+,IP \
+ BEGIN
+ BIT #1,&TERM_STATW \ uart busy ?
+ 0= UNTIL \ wait end of 'LF' TX
+ CMP #RET_ADR,&{UARTI2CS}-2 \
+ 0= IF
+ MOV #REMOVE_U2I,&{UARTI2CS}-2 \ MARKER_DOES of {UARTI2CS} will CALL &{UARTI2CS}-2 = CALL #REMOVE_U2I
+ MOV &HARD_APP,&{UARTI2CS} \ save previous HARD_APP to {UARTI2CS}
+ MOV &SLEEP_APP,&{UARTI2CS}+2 \ save previous SLEEP_APP to {UARTI2CS}+2
+ MOV &TERM_VEC,&{UARTI2CS}+4 \ save previous TERM_VEC value to {UARTI2CS}+4, see target.pat
+ MOV &P1_VEC,&{UARTI2CS}+6 \ save previous P1_VEC value to {UARTI2CS}+6
+ MOV TOS,&{UARTI2CS}+8 \ -- I2C_Addr&0 save I2C address, set ECHO
+\ MOV.B #0,&{UARTI2CS}+9 \ set ECHO ON
+ THEN
+ MOV #0,TOS \ -- 0 to enter in INIT_U2I with 0 SYS
+ MOV #INIT_U2I,&HARD_APP \ replace HARD_APP by new INIT_U2I
+ MOV #SLEEP_U2I,&SLEEP_APP \ replace HARD_APP by new INIT_U2I
+ MOV #U2I_TERM_INT,&TERM_VEC \ set TERM_VEC with U2I_TERM_INT
+ MOV #500MS_INT,&P1_VEC \ set P1_VEC as 500MS_INT
+ MOV #INIT_U2I,PC \ load INIT_U2I
+ ENDCODE \
+\ --------------------------------\
+
+ RST_SET ECHO
-RST_HERE ECHO
-18 UARTI2CS ; TERATERM(Alt-B) or I2C_Master(SW2+RST) to quit
+ $12 UARTI2CS ; TERATERM(Alt-B) or USB_to_I2C_bridge(SW2) to quit
\ ASSEMBLER conditionnal usage with IF UNTIL WHILE S< S>= U< U>= 0= 0<> 0>=
\ ASSEMBLER conditionnal usage with ?JMP ?GOTO S< S>= U< U>= 0= 0<> 0<
-; ------------------------------------------------------------------------------
+; --------------------------------
; UTILITY.f
-; ------------------------------------------------------------------------------
+; --------------------------------
\ first, we test for downloading driver only if UART TERMINAL target
-CODE ABORT_UTILITY
-SUB #2,PSP
-MOV TOS,0(PSP)
-MOV &VERSION,TOS
-SUB #308,TOS \ FastForth V3.8
-COLON
-'CR' EMIT \ return to column 1 without 'LF'
-ABORT" FastForth V3.8 please!"
-PWR_STATE \ remove ABORT_UTILITY definition before resuming
-;
+ CODE ABORT_UTILITY
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV &VERSION,TOS
+ SUB #309,TOS \ FastForth V3.9
+ COLON
+ 'CR' EMIT \ return to column 1 without 'LF'
+ ABORT" FastForth V3.9 please!"
+ RST_RET \ remove ABORT_UTILITY definition before resuming
+ ;
-ABORT_UTILITY
+ ABORT_UTILITY
-PWR_STATE
+ MARKER {UTILITY}
-[DEFINED] {TOOLS} [IF] {TOOLS} [THEN]
-
-[UNDEFINED] {TOOLS} [IF]
-
-MARKER {TOOLS}
-
-[UNDEFINED] EXIT [IF]
\ https://forth-standard.org/standard/core/EXIT
\ EXIT -- exit a colon definition; CALL #EXIT performs ASMtoFORTH (10 cycles)
\ JMP #EXIT performs EXIT
-CODE EXIT
-MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
-MOV @IP+,PC \ 4 = NEXT
- \ 6 (ITC-2)
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
+ [UNDEFINED] EXIT
+ [IF]
+ CODE EXIT
+ MOV @RSP+,IP \ 2 pop previous IP (or next PC) from return stack
+ MOV @IP+,PC \ 4 = NEXT
+ \ 6 (ITC-2)
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SWAP
\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] SWAP
+ [IF]
+ CODE SWAP
+ MOV @PSP,W \ 2
+ MOV TOS,0(PSP) \ 3
+ MOV W,TOS \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
\ https://forth-standard.org/standard/core/Uless
\ U< u1 u2 -- flag test u1<u2, unsigned
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @PSP+,TOS \ 2 u2-u1
-0<> IF
- MOV #-1,TOS \ 1
- U< IF \ 2 flag
- AND #0,TOS \ 1 flag Z = 1
+ [UNDEFINED] U<
+ [IF]
+ CODE U<
+ SUB @PSP+,TOS \ 2 u2-u1
+ 0<> IF
+ MOV #-1,TOS \ 1
+ U< IF \ 2 flag
+ AND #0,TOS \ 1 flag Z = 1
+ THEN
THEN
-THEN
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] IF [IF] \ define IF and THEN
\ https://forth-standard.org/standard/core/IF
\ IF -- IFadr initialize conditional forward branch
-CODE IF \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-MOV &DP,TOS \ -- HERE
-ADD #4,&DP \ compile one word, reserve one word
-MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
-ADD #2,TOS \ -- HERE+2=IFadr
-MOV @IP+,PC
-ENDCODE IMMEDIATE
+ [UNDEFINED] IF
+ [IF] \ define IF and THEN
+ CODE IF \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ MOV &DP,TOS \ -- HERE
+ ADD #4,&DP \ compile one word, reserve one word
+ MOV #QFBRAN,0(TOS) \ -- HERE compile QFBRAN
+ ADD #2,TOS \ -- HERE+2=IFadr
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/THEN
\ THEN IFadr -- resolve forward branch
-CODE THEN \ immediate
-MOV &DP,0(TOS) \ -- IFadr
-MOV @PSP+,TOS \ --
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] BEGIN [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+ CODE THEN \ immediate
+ MOV &DP,0(TOS) \ -- IFadr
+ MOV @PSP+,TOS \ --
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+ [THEN]
+
\ https://forth-standard.org/standard/core/BEGIN
\ BEGIN -- BEGINadr initialize backward branch
-CODE BEGIN
+ [UNDEFINED] BEGIN [IF] \ define BEGIN UNTIL AGAIN WHILE REPEAT
+ CODE BEGIN
MOV #HEREXEC,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/UNTIL
\ UNTIL BEGINadr -- resolve conditional backward branch
-CODE UNTIL
+ CODE UNTIL \ immediate
MOV #QFBRAN,X
BW1 ADD #4,&DP \ compile two words
MOV &DP,W \ W = HERE
MOV TOS,-2(W) \ compile bakcward adr at HERE+2
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/AGAIN
\ AGAIN BEGINadr -- resolve uncondionnal backward branch
-CODE AGAIN
-MOV #BRAN,X
-GOTO BW1
-ENDCODE IMMEDIATE
+ CODE AGAIN \ immediate
+ MOV #BRAN,X
+ GOTO BW1
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/WHILE
\ WHILE BEGINadr -- WHILEadr BEGINadr
-: WHILE
-POSTPONE IF SWAP
-; IMMEDIATE
+ : WHILE \ immediate
+ POSTPONE IF SWAP
+ ; IMMEDIATE
\ https://forth-standard.org/standard/core/REPEAT
\ REPEAT WHILEadr BEGINadr -- resolve WHILE loop
-: REPEAT
-POSTPONE AGAIN POSTPONE THEN
-; IMMEDIATE
-[THEN]
+ : REPEAT
+ POSTPONE AGAIN POSTPONE THEN
+ ; IMMEDIATE
+ [THEN]
-[UNDEFINED] DO [IF] \ define DO LOOP +LOOP
\ https://forth-standard.org/standard/core/DO
\ DO -- DOadr L: -- 0
-CODE DO \ immediate
-SUB #2,PSP \
-MOV TOS,0(PSP) \
-ADD #2,&DP \ make room to compile xdo
-MOV &DP,TOS \ -- HERE+2
-MOV #XDO,-2(TOS) \ compile xdo
-ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
-MOV &LEAVEPTR,W \
-MOV #0,0(W) \ -- HERE+2 L-- 0
-MOV @IP+,PC
-ENDCODE IMMEDIATE
-
-\ https://forth-standard.org/standard/core/LOOP
-\ LOOP DOadr -- L-- an an-1 .. a1 0
-CODE LOOP \ immediate
+ [UNDEFINED] DO
+ [IF] \ define DO LOOP +LOOP
+ HDNCODE XDO \ DO run time
+ MOV #$8000,X \ 2 compute 8000h-limit = "fudge factor"
+ SUB @PSP+,X \ 2
+ MOV TOS,Y \ 1 loop ctr = index+fudge
+ ADD X,Y \ 1 Y = INDEX
+ PUSHM #2,X \ 4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+ CODE DO \ immediate
+ SUB #2,PSP \
+ MOV TOS,0(PSP) \
+ ADD #2,&DP \ make room to compile xdo
+ MOV &DP,TOS \ -- HERE+2
+ MOV #XDO,-2(TOS) \ compile xdo
+ ADD #2,&LEAVEPTR \ -- HERE+2 LEAVEPTR+2
+ MOV &LEAVEPTR,W \
+ MOV #0,0(W) \ -- HERE+2 L-- 0
+ MOV @IP+,PC
+ ENDCODE IMMEDIATE
+
+ HDNCODE XLOOP \ LOOP run time
+ ADD #1,0(RSP) \ 4 increment INDEX
+BW1 BIT #$100,SR \ 2 is overflow bit set?
+ 0= IF \ branch if no overflow
+ MOV @IP,IP
+ MOV @IP+,PC
+ THEN
+ ADD #4,RSP \ 1 empties RSP
+ ADD #2,IP \ 1 overflow = loop done, skip branch ofs
+ MOV @IP+,PC \ 4 14~ taken or not taken xloop/loop
+ ENDCODE \
+
+ CODE LOOP
MOV #XLOOP,X
-BW1 ADD #4,&DP \ make room to compile two words
+BW2 ADD #4,&DP \ make room to compile two words
MOV &DP,W
MOV X,-4(W) \ xloop --> HERE
MOV TOS,-2(W) \ DOadr --> HERE+2
-BEGIN \ resolve all "leave" adr
- MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR \ --
- MOV @TOS,TOS \ -- first LeaveStack value
- CMP #0,TOS \ -- = value left by DO ?
-0<> WHILE
- MOV W,0(TOS) \ move adr after loop as UNLOOP adr
-REPEAT
+ BEGIN \ resolve all "leave" adr
+ MOV &LEAVEPTR,TOS \ -- Adr of top LeaveStack cell
+ SUB #2,&LEAVEPTR \ --
+ MOV @TOS,TOS \ -- first LeaveStack value
+ CMP #0,TOS \ -- = value left by DO ?
+ 0<> WHILE
+ MOV W,0(TOS) \ move adr after loop as UNLOOP adr
+ REPEAT
MOV @PSP+,TOS
MOV @IP+,PC
-ENDCODE IMMEDIATE
+ ENDCODE IMMEDIATE
\ https://forth-standard.org/standard/core/PlusLOOP
\ +LOOP adrs -- L-- an an-1 .. a1 0
-CODE +LOOP
-MOV #XPLOOP,X
-GOTO BW1 \ goto BW1 LOOP
-ENDCODE IMMEDIATE
-[THEN]
+ HDNCODE XPLOO \ +LOOP run time
+ ADD TOS,0(RSP) \ 4 increment INDEX by TOS value
+ MOV @PSP+,TOS \ 2 get new TOS, doesn't change flags
+ GOTO BW1 \ 2
+ ENDCODE \
+
+ CODE +LOOP
+ MOV #XPLOO,X
+ GOTO BW2
+ ENDCODE IMMEDIATE
+ [THEN]
-[UNDEFINED] I [IF]
\ https://forth-standard.org/standard/core/I
\ I -- n R: sys1 sys2 -- sys1 sys2
\ get the innermost loop index
-CODE I
-SUB #2,PSP \ 1 make room in TOS
-MOV TOS,0(PSP) \ 3
-MOV @RSP,TOS \ 2 index = loopctr - fudge
-SUB 2(RSP),TOS \ 3
-MOV @IP+,PC \ 4 13~
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF] \ define DUP and ?DUP
+ [UNDEFINED] I
+ [IF]
+ CODE I
+ SUB #2,PSP \ 1 make room in TOS
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP,TOS \ 2 index = loopctr - fudge
+ SUB 2(RSP),TOS \ 3
+ MOV @IP+,PC \ 4 13~
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/DUP
\ DUP x -- x x duplicate top of stack
-CODE DUP
+ [UNDEFINED] DUP
+ [IF] \ define DUP and ?DUP
+ CODE DUP
BW1 SUB #2,PSP \ 2 push old TOS..
MOV TOS,0(PSP) \ 3 ..onto stack
MOV @IP+,PC \ 4
-ENDCODE
+ ENDCODE
\ https://forth-standard.org/standard/core/qDUP
\ ?DUP x -- 0 | x x DUP if nonzero
-CODE ?DUP
-CMP #0,TOS \ 2 test for TOS nonzero
-0<> ?GOTO BW1 \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-\ https://forth-standard.org/standard/core/SWAP
-\ SWAP x1 x2 -- x2 x1 swap top two items
-CODE SWAP
-MOV @PSP,W \ 2
-MOV TOS,0(PSP) \ 3
-MOV W,TOS \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] DROP [IF]
\ https://forth-standard.org/standard/core/DROP
\ DROP x -- drop top of stack
-CODE DROP
-MOV @PSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
-[UNDEFINED] >R [IF]
\ https://forth-standard.org/standard/core/toR
\ >R x -- R: -- x push to return stack
-CODE >R
-PUSH TOS
-MOV @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] R> [IF]
+ [UNDEFINED] >R
+ [IF]
+ CODE >R
+ PUSH TOS
+ MOV @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/Rfrom
\ R> -- x R: x -- pop from return stack ; CALL #RFROM performs DOVAR
-CODE R>
-SUB #2,PSP \ 1
-MOV TOS,0(PSP) \ 3
-MOV @RSP+,TOS \ 2
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACE [IF]
+ [UNDEFINED] R>
+ [IF]
+ CODE R>
+ SUB #2,PSP \ 1
+ MOV TOS,0(PSP) \ 3
+ MOV @RSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/SPACE
\ SPACE -- output a space
-: SPACE
-$20 EMIT ;
-[THEN]
+ [UNDEFINED] SPACE
+ [IF]
+ : SPACE
+ $20 EMIT ;
+ [THEN]
-[UNDEFINED] SPACES [IF]
\ https://forth-standard.org/standard/core/SPACES
\ SPACES n -- output n spaces
-CODE SPACES
-CMP #0,TOS
-0<> IF
- PUSH IP
- BEGIN
- LO2HI
- $20 EMIT
- HI2LO
- SUB #2,IP
- SUB #1,TOS
- 0= UNTIL
- MOV @RSP+,IP
-THEN
-MOV @PSP+,TOS \ -- drop n
-NEXT
-ENDCODE
-[THEN]
+ [UNDEFINED] SPACES
+ [IF]
+ CODE SPACES
+ CMP #0,TOS
+ 0<> IF
+ PUSH IP
+ BEGIN
+ LO2HI
+ $20 EMIT
+ HI2LO
+ SUB #2,IP
+ SUB #1,TOS
+ 0= UNTIL
+ MOV @RSP+,IP
+ THEN
+ MOV @PSP+,TOS \ -- drop n
+ NEXT
+ ENDCODE
+ [THEN]
-[UNDEFINED] 2DUP [IF] \
\ https://forth-standard.org/standard/core/TwoDUP
\ 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
-CODE 2DUP
-MOV TOS,-2(PSP) \ 3
-MOV @PSP,-4(PSP) \ 4
-SUB #4,PSP \ 1
-MOV @IP+,PC \ 4
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
+ [UNDEFINED] 2DUP
+ [IF] \
+ CODE 2DUP
+ MOV TOS,-2(PSP) \ 3
+ MOV @PSP,-4(PSP) \ 4
+ SUB #4,PSP \ 1
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/OnePlus
\ 1+ n1/u1 -- n2/u2 add 1 to TOS
-CODE 1+
-ADD #1,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] 1+
+ [IF]
+ CODE 1+
+ ADD #1,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] + [IF]
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
-CODE +
-ADD @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] +
+ [IF]
+ CODE +
+ ADD @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] - [IF]
\ https://forth-standard.org/standard/core/Minus
\ - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
-CODE -
-SUB @PSP+,TOS \ 2 -- n2-n1
-XOR #-1,TOS \ 1
-ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
+ [UNDEFINED] -
+ [IF]
+ CODE -
+ SUB @PSP+,TOS \ 2 -- n2-n1
+ XOR #-1,TOS \ 1
+ ADD #1,TOS \ 1 -- n3 = -(n2-n1) = n1-n2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/CFetch
\ C@ c-addr -- char fetch char from memory
-CODE C@
-MOV.B @TOS,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] C@
+ [IF]
+ CODE C@
+ MOV.B @TOS,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] AND [IF]
\ https://forth-standard.org/standard/core/AND
\ C AND x1 x2 -- x3 logical AND
-CODE AND
-AND @PSP+,TOS
-MOV @IP+,PC
-ENDCODE
-[THEN]
+ [UNDEFINED] AND
+ [IF]
+ CODE AND
+ AND @PSP+,TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] ROT [IF]
\ https://forth-standard.org/standard/core/ROT
\ ROT x1 x2 x3 -- x2 x3 x1
-CODE ROT
-MOV @PSP,W \ 2 fetch x2
-MOV TOS,0(PSP) \ 3 store x3
-MOV 2(PSP),TOS \ 3 fetch x1
-MOV W,2(PSP) \ 3 store x2
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF] \ define MAX and MIN
- CODE MAX \ n1 n2 -- n3 signed maximum
- CMP @PSP,TOS \ n2-n1
- S< ?GOTO FW1 \ n2<n1
-BW1 ADD #2,PSP
- MOV @IP+,PC
+ [UNDEFINED] ROT
+ [IF]
+ CODE ROT
+ MOV @PSP,W \ 2 fetch x2
+ MOV TOS,0(PSP) \ 3 store x3
+ MOV 2(PSP),TOS \ 3 fetch x1
+ MOV W,2(PSP) \ 3 store x2
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] MAX
+ [IF] \ define MAX and MIN
+ CODE MAX \ n1 n2 -- n3 signed maximum
+ CMP @PSP,TOS \ n2-n1
+ S< ?GOTO FW1 \ n2<n1
+BW1 ADD #2,PSP
+ MOV @IP+,PC
ENDCODE
- CODE MIN \ n1 n2 -- n3 signed minimum
- CMP @PSP,TOS \ n2-n1
- S< ?GOTO BW1 \ n2<n1
-FW1 MOV @PSP+,TOS
- MOV @IP+,PC
+ CODE MIN \ n1 n2 -- n3 signed minimum
+ CMP @PSP,TOS \ n2-n1
+ S< ?GOTO BW1 \ n2<n1
+FW1 MOV @PSP+,TOS
+ MOV @IP+,PC
ENDCODE
-[THEN]
+ [THEN]
-[UNDEFINED] OVER [IF]
\ https://forth-standard.org/standard/core/OVER
\ OVER x1 x2 -- x1 x2 x1
-CODE OVER
-MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
-MOV @PSP,TOS \ 2 -- x1 (x2) x1
-SUB #2,PSP \ 1 -- x1 x2 x1
-MOV @IP+,PC
-ENDCODE
-[THEN]
-
-[UNDEFINED] MOVE [IF]
+ [UNDEFINED] OVER
+ [IF]
+ CODE OVER
+ MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
+ MOV @PSP,TOS \ 2 -- x1 (x2) x1
+ SUB #2,PSP \ 1 -- x1 x2 x1
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
\ https://forth-standard.org/standard/core/MOVE
\ MOVE addr1 addr2 u -- smart move
\ VERSION FOR 1 ADDRESS UNIT = 1 CHAR
-CODE MOVE
-MOV TOS,W \ W = cnt
-MOV @PSP+,Y \ Y = addr2 = dst
-MOV @PSP+,X \ X = addr1 = src
-MOV @PSP+,TOS \ pop new TOS
-CMP #0,W \ count = 0 ?
-0<> IF \ if 0, already done !
- CMP X,Y \ Y-X \ dst - src
- 0= ?GOTO FW1 \ already done !
- U< IF \ U< if src > dst
- BEGIN \ copy W bytes
- MOV.B @X+,0(Y)
- ADD #1,Y
- SUB #1,W
- 0= UNTIL
- MOV @IP+,PC
- ELSE \ U>= if dst > src
- ADD W,Y \ copy W bytes beginning with the end
- ADD W,X
- BEGIN
- SUB #1,X
- SUB #1,Y
- MOV.B @X,0(Y)
- SUB #1,W
- 0= UNTIL
+ [UNDEFINED] MOVE
+ [IF]
+ CODE MOVE
+ MOV TOS,W \ W = cnt
+ MOV @PSP+,Y \ Y = addr2 = dst
+ MOV @PSP+,X \ X = addr1 = src
+ MOV @PSP+,TOS \ pop new TOS
+ CMP #0,W \ count = 0 ?
+ 0<> IF \ if 0, already done !
+ CMP X,Y \ Y-X \ dst - src
+ 0= ?GOTO FW1 \ already done !
+ U< IF \ U< if src > dst
+ BEGIN \ copy W bytes
+ MOV.B @X+,0(Y)
+ ADD #1,Y
+ SUB #1,W
+ 0= UNTIL
+ MOV @IP+,PC
+ ELSE \ U>= if dst > src
+ ADD W,Y \ copy W bytes beginning with the end
+ ADD W,X
+ BEGIN
+ SUB #1,X
+ SUB #1,Y
+ MOV.B @X,0(Y)
+ SUB #1,W
+ 0= UNTIL
+ THEN
THEN
-THEN
FW1 MOV @IP+,PC
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CONSTANT
+\ CONSTANT <name> n -- define a Forth CONSTANT
+ [UNDEFINED] CONSTANT
+ [IF]
+ : CONSTANT
+ CREATE
+ HI2LO
+ MOV TOS,-2(W) \ PFA = n
+ MOV @PSP+,TOS
+ MOV @RSP+,IP
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/BASE
+\ BASE -- a-addr holds conversion radix
+ [UNDEFINED] BASE
+ [IF]
+ BASEADR CONSTANT BASE
+ [THEN]
-[UNDEFINED] .S [IF] \
\ https://forth-standard.org/standard/tools/DotS
-\ .S TOS -- TOS display <depth> of param Stack and stack contents in hedadecimal if not empty
-CODE .S
+\ .S TOS -- TOS display <depth> of param Stack and stack contents in hexadecimal if not empty
+ [UNDEFINED] .S
+ [IF] \
+ CODE .S
MOV TOS,-2(PSP) \ -- TOS ( TOS x x )
MOV PSP,TOS \ -- PSP ( TOS x x )
SUB #2,TOS \ -- PSP ( TOS x x ) to take count that TOS is first cell
MOV #PSTACK,TOS \ -- P0 ( TOS x PSP )
SUB #2,TOS \ -- P0 ( TOS x PSP ) to take count that TOS is first cell
BW1 MOV TOS,-4(PSP) \ -- S0 ( TOS S0 PSP ) | -- TOS ( TOS R0 RSP )
- SUB #6,PSP \ -- TOS S0 PSP S0 | -- TOS R0 RSP R0
- SUB @PSP,TOS \ -- TOS S0 PSP S0-SP | -- TOS R0 RSP R0-RSP
- RRA TOS \ -- TOS S0 PSP #cells | -- TOS R0 RSP #cells
-COLON
+ SUB #6,PSP \ -- TOS S0 PSP S0 | -- TOS R0 RSP R0
+ SUB @PSP,TOS \ -- TOS S0 PSP S0-SP | -- TOS R0 RSP R0-RSP
+ RRA TOS \ -- TOS S0 PSP #cells | -- TOS R0 RSP #cells
+ COLON
$3C EMIT \ char '<'
. \ display #cells
$08 EMIT \ backspace
$3E EMIT SPACE \ char '>' SPACE
- 2DUP 1+ \
- U< IF
+ 2DUP 1+ \
+ U< IF
DROP DROP EXIT
THEN \ display content of stack in hexadecimal
- BASEADR @ >R
- $10 BASEADR !
- DO
+ BASE @ >R \ base_address @ >R
+ $10 BASE !
+ DO
+ '$' EMIT
I @ U.
2 +LOOP
- R> BASEADR !
-;
-[THEN]
+ R> BASE !
+ ;
+ [THEN]
-[UNDEFINED] .RS [IF] \
\ .RS TOS -- TOS display <depth> of Return Stack and stack contents if not empty
-CODE .RS
- MOV TOS,-2(PSP) \ -- TOS ( TOS x x )
+ [UNDEFINED] .RS
+ [IF] \
+ CODE .RS
+ MOV TOS,-2(PSP) \ -- TOS ( TOS x x )
MOV RSP,-6(PSP) \ -- TOS ( TOS x RSP )
MOV #RSTACK,TOS \ -- R0 ( TOS x RSP )
GOTO BW1
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
-[UNDEFINED] ? [IF] \
\ https://forth-standard.org/standard/tools/q
\ ? adr -- display the content of adr
-CODE ?
+ [UNDEFINED] ?
+ [IF] \
+ CODE ?
MOV @TOS,TOS
MOV #U.,PC \ goto U.
-ENDCODE
-[THEN]
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/CR
+\ CR -- send CR+LF to the output device
+ [UNDEFINED] CR
+ [IF]
+
+\ DEFER CR \ DEFERed definition, by default executes that of :NONAME
+ CODE CR \ create a DEFER definition of CR
+ MOV #NEXT_ADR,PC
+ ENDCODE
+
+ :NONAME
+ 'CR' EMIT 'LF' EMIT
+ ; IS CR
+ [THEN]
+
+\ https://forth-standard.org/standard/core/TwoDiv
+\ 2/ x1 -- x2 arithmetic right shift
+ [UNDEFINED] 2/
+ [IF]
+ CODE 2/
+ RRA TOS
+ MOV @IP+,PC
+ ENDCODE
+ [THEN]
-[UNDEFINED] WORDS [IF]
\ https://forth-standard.org/standard/tools/WORDS
\ list all words of vocabulary first in CONTEXT.
-: WORDS \ --
-CR
-CONTEXT @ PAD_ORG \ -- VOC_BODY PAD_ORG MOVE all threads of VOC_BODY in PAD_ORG
-THREADS @ DUP + \ -- VOC_BODY PAD_ORG THREAD*2
-MOVE \ -- vocabumary entries are copied in PAD_ORG
-BEGIN \ --
- 0 DUP \ -- ptr=0 MAX=0
- THREADS @ DUP + 0 \ -- ptr=0 MAX=0 THREADS*2 0
- DO \ -- ptr MAX I = PAD_ptr = thread*2
- DUP I PAD_ORG + @ \ -- ptr MAX MAX NFAx
- U< IF \ -- ptr MAX if MAX U< NFAx
- DROP DROP \ -- drop ptr and MAX
- I DUP PAD_ORG + @ \ -- new_ptr new_MAX
- THEN \
- 2 +LOOP \ -- ptr MAX
- ?DUP \ -- ptr MAX MAX | -- ptr 0 (all threads in PAD_ORG = 0)
-WHILE \ -- ptr MAX replace it by its LFA
- DUP \ -- ptr MAX MAX
- 2 - @ \ -- ptr MAX [LFA]
- ROT \ -- MAX [LFA] ptr
- PAD_ORG + \ -- MAX [LFA] thread
- ! \ -- MAX [LFA]=new_NFA updates PAD_ORG+ptr
- DUP \ -- MAX MAX
- COUNT $7F AND \ -- MAX addr count (with suppr. of immediate bit)
- TYPE \ -- MAX
- C@ $0F AND \ -- count_of_chars
- $10 SWAP - SPACES \ -- complete with spaces modulo 16 chars
-REPEAT \ --
-DROP \ ptr --
-; \ all threads in PAD_ORG are filled with 0
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R \ u n -- display u unsigned in n width (n >= 2)
->R <# 0 # #S #>
-R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DUMP [IF] \
+ [UNDEFINED] WORDS
+ [IF]
+ : WORDS \ --
+ CR
+ CONTEXT @ PAD_ORG \ -- VOC_BODY PAD_ORG MOVE all threads of VOC_BODY in PAD_ORG
+ THREADS @ DUP + \ -- VOC_BODY PAD_ORG THREAD*2
+ MOVE \ -- vocabumary entries are copied in PAD_ORG
+ BEGIN \ --
+ 0 DUP \ -- ptr=0 MAX=0
+ THREADS @ DUP + 0 \ -- ptr=0 MAX=0 THREADS*2 0
+ DO \ -- ptr MAX I = PAD_ptr = thread*2
+ DUP I PAD_ORG + @ \ -- ptr MAX MAX NFAx
+ U< IF \ -- ptr MAX if MAX U< NFAx
+ DROP DROP \ -- drop ptr and MAX
+ I DUP
+ PAD_ORG + @ \ -- new_ptr new_MAX
+ THEN \
+ 2 +LOOP \ -- ptr MAX
+ ?DUP \ -- ptr MAX MAX | -- ptr 0 (all threads in PAD_ORG = 0)
+ WHILE \ -- ptr MAX replace it by its LFA
+ DUP \ -- ptr MAX MAX
+ 2 - @ \ -- ptr MAX [LFA]
+ ROT \ -- MAX [LFA] ptr
+ PAD_ORG + \ -- MAX [LFA] thread
+ ! \ -- MAX MAX=highest_NFA [LFA]=new_NFA updates PAD_ORG+ptr
+ COUNT 2/ \ -- addr count 2/ to hide Immediate flag
+ DUP >R TYPE \ -- R-- count
+ R> $10 SWAP - SPACES \ -- R-- complete with spaces modulo 16 chars
+ REPEAT \ --
+ DROP \ ptr --
+ ; \ all threads in PAD_ORG are filled with 0
+ [THEN]
+
+ [UNDEFINED] U.R
+ [IF]
+ : U.R \ u n -- display u unsigned in n width (n >= 2)
+ >R <# 0 # #S #>
+ R> OVER - 0 MAX SPACES TYPE
+ ;
+ [THEN]
+
\ https://forth-standard.org/standard/tools/DUMP
-CODE DUMP \ adr n -- dump memory
-PUSH IP
-PUSH &BASEADR \ save current base
-MOV #$10,&BASEADR \ HEX base
-ADD @PSP,TOS \ -- ORG END
-LO2HI
- SWAP 2DUP \ -- END ORG END ORG
- U. U. \ -- END ORG display org end
- $FFF0 AND \ -- END ORG_modulo_16
- DO CR \ generate line
- I 4 U.R SPACE \ generate address
- I 8 + I \ display first 8 bytes
- DO I C@ 3 U.R LOOP
- SPACE
- I $10 + I 8 + \ display last 8 bytes
- DO I C@ 3 U.R LOOP
- SPACE SPACE
- I $10 + I \ display 16 chars
- DO I C@ $7E MIN $20 MAX EMIT LOOP
- $10 +LOOP
- R> BASEADR ! \ restore current base
-;
-[THEN] \ endof [UNDEFINED] DUMP
-
-RST_HERE
-
-[THEN] \ endof [UNDEFINED] {TOOLS}
-ECHO
+ [UNDEFINED] DUMP
+ [IF]
+ CODE DUMP \ adr n -- dump memory
+ PUSH IP
+ PUSH &BASEADR \ save current base
+ MOV #$10,&BASEADR \ HEX base
+ ADD @PSP,TOS \ -- ORG END
+ LO2HI
+ SWAP \ -- END ORG
+ $FFF0 AND \ -- END ORG_modulo_16
+ DO CR \ generate line
+ I 4 U.R SPACE \ generate address
+ I 8 + I \ display first 8 bytes
+ DO I C@ 3 U.R LOOP
+ SPACE
+ I $10 + I 8 + \ display last 8 bytes
+ DO I C@ 3 U.R LOOP
+ SPACE SPACE
+ I $10 + I \ display 16 chars
+ DO I C@ $7E MIN $20 MAX EMIT LOOP
+ $10 +LOOP
+ R> BASE ! \ restore current base
+ ;
+ [THEN] \ endof [UNDEFINED] DUMP
+
+ RST_SET
+
+ [THEN] ECHO ; endof [UNDEFINED] {TOOLS}
+
-# FastForth for all MSP430FRxxxx TI's devices, light, fast, efficient, reliable.
+## FastForth for MSP430FRxxxx TI's CPUs, light, fast, reliable.
-Tested on TI MSP-EXP430FR(5739,5969,5994,6989,4133,2355,2433) launchpads, at 1, 2, 4, 8, 12, 16 MHz plus 20MHz & 24MHz with MSP430FR(23xx,57xx) devices.
+Tested on TI MSP-EXP430FR 5739,
+[5969](https://duckduckgo.com/?q=MSP-EXP430FR5969),
+[5994](https://duckduckgo.com/?q=MSP-EXP430FR5994),
+6989,
+4133,
+[2476](https://duckduckgo.com/?q=Lp-MSP430FR2476),
+[2355](https://duckduckgo.com/?q=MSP-EXP430FR2355),
+2433) launchpads, at 1, 2, 4, 8, 12, 16 MHz plus 20 & 24 MHz with MSP430FR(23xx,57xx) devices.
-FastForth is a **5kB size** "load interpret compile" operating system for MSP430 devices with FRAM which includes:
+FastForth is a "load interpret compile execute" operating system for the CPU's MSP430 Texas Instruments with FRAM:
-* FORTH kernel with interpreting decimal, hex, binary numbers (#,$,% prefixes), double numbers and Q15.16 numbers,
+* LOAD: choice of the TERMINAL (TERATERM.exe) interface:
-* the assembler, **label free, with TI's syntax**,
+ * UART TERMINAL up to 6MBds @ MCLK=24MHz, with software (XON/XOFF) and/or hardware (RTS) control flow, **transmit delay: 0 ms/char, 0 ms/line**
-* easy roundtrip between FORTH and ASSEMBLER in definitions, with only 2 switches: `HI2LO` and `LO2HI`,
+ * a very well designed **I2C TERMINAL up to 1MHz**, with a behaviour full duplex, ready to communicate with all modules **I2C_FastForth** wired onto bus,
+
+* INTERPRET: with a 16-entry word-set that speeds up the FORTH interpreter by 4,
-* conditional compilation,
+* COMPILE: in addition to the FORTH engine, the **MSP430 assembler (label free) with syntax TI's**,
-* efficient memory management which can be modulated according to these 3 levels: power on, reset, deep reset,
+and as result **"load interpret compile" a source file is faster and easier than loading its binary equivalent** via the TI's eZFET interface:
+For example, with MCLK=24MHz, THREADS=16, UART=6MBds 8n1, a [PL2303GC](https://duckduckgo.com/?q=DSD+TECH+SH-U06A+PL2303GC) and Teraterm.exe as TERMINAL, the download/interpret/execute process of the file CORETEST is done at an effective rate close to 43KB/s (430kBds).
+with a bridge UARTtoI2C and an I2C_Slave target MCLK=24MHz, THREADS=16, the effective rate is the same ( I don't understand but it's like this...)
-* automatic memory releasing with MARKER tags,
+Despite its **size of 5 kb** FastForth includes:
-* robust and visual error handling,
+* FORTH kernel with interpreting decimal, hex, binary (#,$,% prefixed) numbers, digits separator '_', 'char', double numbers and Q15.16 numbers,
-* choice of the TERMINAL (TERATERM.exe) interface:
+* the MSP430 16 bits assembler (1,5 kb),
- * UART TERMINAL up to 6MBds @ MCLK=24MHz, with software (XON/XOFF) and/or hardware (RTS) control flow, **transmit delay: 0 ms/char, 0 ms/line**
+* a good error management which interrupts the downloading at the slightest error,
- * **I2C TERMINAL up to 1MHz**, "full duplex" like, allowing to communicate with several **I2C_FastForth** targets,
-
-* and therefore, **"loading, interpreting, compiling" a source file is faster and easier than loading its binary equivalent**,
+* a memory management which can be modulated according to these 3 levels: MARKER, RESET, DEEP_RESET,
+
+* everything you need to write a real time application made of a mix of FORTH/assembler:
+
+ * the complete set of the FORTH building words,
+
+ * conditional compilation,
+
+ * thanks to [GEMA preprocessor](http://gema.sourceforge.net/new/index.shtml), the compilation of all symbolic addresses without having to declare them in FORTH,
-* transmission errors, if any, are automatically rejected by the on-board interpreter,
+ * easy roundtrip between FORTH and assembler with only two switches 'one word' `HI2LO` and `LO2HI`,
-* CPU in sleep mode LPM0:LPM4, awaiting a command from UART:I2C TERMINAL, or any user interrupt event,
+ * automatic releasing memory with MARKER tags,
-* direct access to all SFR and other symbolic addresses by use of [GEMA preprocessor](https://github.com/NeonMan/gema),
+ * Fully configurable sequences: reset, initialisation and background,
-* Fully configurable reset, initialisation and background sequences.
+ * CPU in sleep mode LPM0|LPM4 in awaiting a command from UART|I2C TERMINAL, and ready to process any interrupts.
-For only 3 kbytes in addition, you have the primitives to access the SD\_CARD FAT16 and FAT32: read, write, del, download source files and also copy them from PC to the SD_Card. It works with all SD\_CARD memories from 64MB to 64GB. The cycle to read/write a byte is below 1 us @ 16 MHz.
+For only 3 kbytes in addition, we have the primitives to access the SD_CARD FAT16 and FAT32: read, write, del, download source files and also to copy them from PC to the SD_Card.
+It works with all SD\_CARD memories from 64MB to 64GB with FAT32 format.
+The cycle to read/write a **byte** is below 1us @ 16 MHz.
-With all the kernel addons, including extended\_ASM and SD\_Card driver, FastForth size is **10 kB**.
+With all the kernel addons, including the 20 bits MSP430\_X assembler and the SD\_Card driver, FastForth size is **10 kB**.
+
+After downloading CORE_ANS.f file (+2 kb), FastForth passes successfully the CORE ANS94 + COREPLUSTEST tests.
However, if all works well with Windows 10, it works less well with Linux due to the lack of a good alternative to TERATERM...
-Note: for every update, download all subdirectories to correctly update the project, without missing configurations files.
+Note: please, for each update download all subdirectories to correctly update the project.
## how to connect TERMINAL
------------------------------------------------------------------------------------------
(modify this first: open the box and weld red wire on 3.3V pad).
-### programming with MSP430Flasher/UniFlash and FET interface
+### programming with MSP430Flasher/UniFlash and FET interface:
- TI Launchpad <--> CP2102/PL2302TA cable <------> USB <-------------> TERATERM.exe
- RX <--- TX )
- GND <--> GND > used by FastForth TERMINAL
- TX ---> RX )
- RTS ---> CTS (optionnal) RTS pin Px.y is described in your \inc\launchpad.asm)
-
+ J101 connector
+ |
+ v
TI Launchpad <--> FET interface <-------------> USB <-------------> MSP430Flasher.exe/UniFlash
Vcc <--- 3V3
TST/SBWTCK <--> SBWTCK
GND <--> GND
RST/SBWTDIO <--> SBWTDIO
-### programming with BSL_Scripter.exe
+ TI Launchpad <--> CP2102/PL2302TA cable <------> USB <-------------> TERATERM.exe
+ RX <--- TX )
+ GND <--> GND > used by FastForth TERMINAL
+ TX ---> RX )
+ RTS ---> CTS (optionnal) RTS pin Px.y is described in your \inc\launchpad.asm)
+
+### programming with BSL_Scripter.exe (don't work with MSP-EXP430FR2355 launchpad)
+ J101 connector
+ |
+ v
MSP430FRxxxx <--> CP2102/PL2303TA cable <------> USB <-------->+<--> TERATERM.exe
RX <--- TX ) |
GND <--> GND > used by FastForth TERMINAL +<--> BSL_Scripter.exe
To see all specifications of FastForth, download \MSP430-FORTH\FF_SPECS.f.
-To change the terminal baudrate on the fly, 9600 Bauds up to 6 MBds, download \MSP430-FORTH\CHNGBAUD.f.
+To change the UART TERMINAL baudrate on the fly, 9600 Bauds up to 6 MBds, download \MSP430-FORTH\CHNGBAUD.f.
Beyond 1 MBds, shorten the PL2303HXD cable, down to 50 cm for 6MBds.
XON/XOFF flow control allows 3.75kV galvanic isolation of terminal input with SOIC8 Si8622EC|ISO7021.
-With powered SOIC16W ISOW7821, you have 5kV rms isolation for both XON/XOFF TERMINAL and a 3V3 75mA supply.
-If you choose I2C_FastForth for your target, you will need of one more to make the USBtoI2C bridge.
+If you choose I2C_FastForth for your project, you will need of one more launchpad to make the USBtoI2C bridge.
See driver for I2C_FastForth: \MSP430-FORTH\UARTI2CS.f.
After downloading of complementary words in \MSP430-FORTH\ANS_COMP.f, FastForth executes CORETEST.4th
-in less than a second, and without errors which ensures its compatibility with the FORTH CORE ANS94 standard.
+in one second, and without errors which ensures its compatibility with the FORTH CORE ANS94 standard.
Notice that FAST FORTH interprets lines up to 84 chars, only SPACE as delimiter, only CR+LF as
End Of Line, and BACKSPACE.
What is new ?
-------------
+### V309
+
+* = V308 - 344 bytes.
+
+* removed `INTERPRET`, `CR` and the useless error line displaying.
+
+* Removed `PWR_HERE` and `PWR_STATE`, replaced `RST_HERE` by `RST_SET` and `RST_STATE` by `RST_RET`.
+
+* Replaced `WIPE` by `-1 SYS`, `COLD` by `6 SYS` and `WARM` by `0 SYS` or simply `SYS`.
+
+* replaced `VOCABULARY` with `WORDSET`. `ALSO` is also :-) removed because the executing of a definition created by `WORDSET` adds it into the CONTEXT stack. For example, typing `FORTH` adds it into CONTEXT. Note that as result the use of ONLY is modified: `FORTH ONLY` instead of `ONLY FORTH`.
+
+* modified QNUMBER QABORT `ABORT` `QUIT` `HI2LO` `PREVIOUS` `WORD` `FIND` `>NUMBER` `TYPE` `#>` `COUNT` `SWAP` `TICK` `POSTPONE` `COLON` `[ELSE]` plus the assembler.
+
+* The bootstrap ON/OFF is modified: `BOOT` / `NOBOOT` to enable / disable it.
+
+* the word-set `ASSEMBLER` is renamed `hidden` because it stores not only the ASM instructions definitions but also HDNCODE definitions.
+
+* when you executes a `MARKER` definition, it starts by removing its previous definition if exists.
+
+* Some bugs corrected:
+ * QNUMBER FORWDOES `TYPE` `WORD`,
+ * `M*/` in \MSP430-FORTH\DOUBLE.f file,
+ * the assembler handles correctly argument+/-offset.
+
+* User can choose floored or symmetric division. See \MSP430-FORTH\ANS_CORE.f
+
+* the words `:NONAME` `IS` `DOES>` `CODENNM` are added to the core and there is still enough room in its 5kb for the VOCABULARY_SET add-on.
+ DEFER is not included because too easy to replace by a CODE definition, see CR in file CORE_ANS.f.
+
+* When used with VOCABULARY_SET activated, `RST_SET`/`RST_RET` and definition/use of `MARKER` tags save/restore the full word-set environment: DP, CURRENT, CONTEXT stack, VOCLINK.
+
+* FF_SPECS.f displays all word-sets, including the `hidden` one.
+
+* the SD_Card driver is rewritten. Only FAT32 format is supported. I suggest 4kb sized clusters.
+ The old WRITE" command is duplicated :
+ ** `WRITE"` to create a new file (or to overwrite it if exists),
+ ** `APPEND"` to append to a file (or to create it if not exists)
+
+
### V308
-* 16 bytes removed from (Kernel + Conditional_Compilation + Assembler).
+* = V307 - 16 bytes.
* Source file copy from TERMINAL to the SD\_Card of any I2C\_FastForth target works fine.
-* The bootstrap call is modified: `' BOOT IS WARM` to enable it, `' BOOT [PFA] IS WARM` to remove it.
+* ~~The bootstrap call is modified: `' BOOT IS WARM` to enable it, `' BOOT [PFA] IS WARM` to remove it~~.
-* ASM definitions are renamed HDNCODE (HiDdeN CODE), ENDASM is replaced by ENDCODE.
+* `ASM` definitions are renamed `HDNCODE` (HiDdeN CODE), `ENDASM` is replaced by `ENDCODE`.
- HDNCODE definitions are identical to low level CODE ones, but are hidden because defined in the ASSEMBLER word set, and can be used only
+ `HDNCODE` definitions are identical to low level `CODE` ones, but are hidden because defined in the ~~`ASSEMBLER`~~ `hidden` word set, and must be used only
in the scope of another low level CODE definition. See use in \MSP430-FORTH\UARTI2CS.f.
* FastForth passes CORETEST + COREPLUSTEST tests. See modified \MSP430-FORTH\CORETEST.4TH
-* Double number word D< corrected in \MSP430-FORTH\DOUBLE.f
+* Double number word `D<` corrected in \MSP430-FORTH\DOUBLE.f
### V307
`MOV #RXON,&SLEEP+2` to store RXON addr at SLEEP+2 addr.
`MOV.B BUFFER+-1(X),TOS` to load the byte at BUFFER-1(X) addr in the register TOS.
-* COLD does same than hardware RST.
- WIPE does same than hardware SW1+RST (DEEP_RESET).
+* ~~`COLD` does same than hardware RST~~.
+ `6 SYS` does same than hardware RST.
+ ~~`WIPE` does same than hardware SW1+RST (DEEP_RESET)~~.
+ `-1 SYS` does same than hardware SW1+RST (DEEP_RESET).
* More complicated:
-In the FastForth init process, COLD WARM SLEEP are modified and INI_FORTH is added.
-They start each with an immediate call to a paired assembly subroutine:
-
- RST_SYS failures ->+ +<- ABORT_TERM <- ABORT" <-(error)<-+-<-COMPILE/EXECUTE<-INTERPRET<-+
- | | | ^
- | v v |
- SW1+RST->+<-RST | +--> INI_FORTH -> ABORT" ->+->QUIT>-+->ACCEPT->+ +->ACCEPT->+
- | | --------- ^ | ^
- v v | v |
- WIPE --->+->COLD-->+--> PUC --> INI_FORTH --> WARM -->+ +->SLEEP->+
- ---- --------- ---- -----
+In the FastForth init process, COLD WARM SLEEP are modified and INIT_FORTH is added.
+They start each with a call to a paired assembly subroutine:
- subroutine: COLD_APP INI_SOFT_APP INI_HARD_APP BACKGND_APP
- default CALL# COLD_TERM RET_ADR INIT_TERM RXON
- Default action: wait TERMINAL idle do nothing init TERM UCAx enable TERMINAL TX
- + unlock I/O's (send RXON + /RTS)
+ RST_SYS failures --------->+ +<- ABORT_TERM <--------(error)<------------+<--COMPILE/EXECUTE<-INTERPRET<-+
+ | | | ^
+ RST ------------>+ | v v |
+ v | +-> INIT_FORTH -> ABORT" ->+-> ABORT->QUIT->+->ACCEPT->+ +->ACCEPT->+
+ SW1+RST -------->+ | ========== ^ | ^
+ v v | v |
+ -n SYS --------->+->COLD-->+->PUC->+-> INIT_FORTH --> WARM" ->+ +->SLEEP->+
+ ^ ==== ^ ========== ==== =====
+ | |
+ +n SYS (even) -->+ (NOPUC)
+ |
+ +n SYS (odd) --------------------->+
+ ^
+ [0] SYS -------------------------->+
+
+ CALL... &COLD_APP &SOFT_APP &HARD_APP &SLEEP_APP
+ ========= ========= ========= ==========
+ Default subroutine... COLD_TERM RET_ADR INIT_TERM RXON
+ Default action... wait TERM idle do nothing init TERM UC, unlock I/O enable TERMINAL to TX
+
+ note: -n SYS|SW1+RST reset the default subroutine of these four calls.
-
On the other hand, MARKER is modified in such a way that MARKER\_DOES executes a CALL to
-the content of BODY+4, by default RET_ADR:
+the content of USER_BODY-2, by default RET_ADR:
- MARKER [CFA] = DODOES
- [PFA] = MARKER_DOES
- [BODY] = previous DP (Dictionnary Pointer)
- [BODY+2] = previous VOCLINK (if word-set addon)
- [BODY+4] = RET_ADR
-
-By replacing [BODY+4] with the address of a new defined subroutine (named for example: STOP_XXX),
-MARKER_DOES will execute it to restore all critical pointers saved at BODY+6, BODY+8...
-
-Thus, with MARKER and the definition of subroutines COLD_XXX, INI_SOFT_XXX, INI_HARD_XXX, BACKGND_XXX
-the programmer has full control of his "XXX" real time application using interrupts,
-with everything he needs to start it, stop it, and also to properly remove it with
-a 'soft' MARKER word, avoiding the use of a WIPE or a SW1+RST of the last chance.
-
-See examples in /MSP430-FORTH/UARTI2CS.f, /MSP430-FORTH/RTC.f.
+ MARKER [CFA] = DODOES
+ [PFA] = MARKER_DOES
+ [BODY] = previous DP (Dictionnary Pointer)
+ ...
+ [USER_PARAM-2] = RET_ADR as REMOVE_APP by default
-notes:
-* RST and SW1+RST (deep RST) are hardware redirected to COLD via NMI and the USER\_NMI vector.
-
-* INI\_SOFT\_SD is used as INI\_SOFT\_APP alias by the SD_CARD driver to reinit handles.
+By replacing [USER_PARAM-2] with the address of a new defined subroutine (named for example: REMOVE_XXX),
+MARKER_DOES will execute it to restore n critical pointers (room made by 2n ALLOT) at USER_PARAM, USER_PARAM+2, ...
-* WIPE|SW1+RST initialises this four APP calls plus TERMINAL\_INT Vector.
+Thus, with MARKER and the definition of subroutines STOP_XXX, INIT_SOFT_XXX, INIT_HARD_XXX, BACKGND_XXX,
+the programmer has full control of his "XXX" real time application using interrupts,
+with everything he needs to start, stop and remove it properly, thanks to a 'soft' MARKER definition,
+avoiding the (SW1+RST) of the last chance.
+See example in /MSP430-FORTH/UARTI2CS.f.
### V306
A newcomer: FastForth for I2C TERMINAL. With the driver UART2I2CS running on another FastForth target,
we have the USB to I2C_Slave bridge we need: one TERMINAL for up to 112 I2C_FastForth targets.
- +---------------------------+
- notebook USB to I2C_Slave bridge +-I2C-| others I2C_slave target |
- +-----------+ +-------------------------------------------------+ / +--------------------------+ |
- | | ¦ PL2303HXD target running UARTI2CS @24MHz¦ +-I2C-| MSP430FR4133 @ 1 MHz | |
- | | ¦------------+ +----------------------------¦ / +--------------------------+ |--+
- | | ¦ | 3wires| MSP430FR2355 @ 24MHz ¦/ | MSP430FR5738 @ 24 MHz | |
- | TERATERM -o->USB-o->USB2UART->o->UART-o-> FAST FORTH -> UARTI2CS -o-I2C-o-> FAST FORTH with option |--+
+ +-------------------------+
+ notebook USB to I2C_Slave bridge +-I2C-| others I2C_slave target |
+ +-----------+ +-------------------------------------------------+ / +-------------------------+ |
+ | | ¦ PL2303HXD target running UARTI2CS @24MHz¦ +-I2C-| MSP430FR4133 @ 1 MHz | |
+ | | ¦------------+ +----------------------------¦ / +--------------------------+ |-+
+ | | ¦ | 3wires| MSP430FR2355 @ 24MHz ¦/ | MSP430FR5738 @ 24 MHz | |
+ | TERATERM -o->USB-o->USB2UART->o->UART-o-> FAST FORTH -> UARTI2CS -o-I2C-o-> FAST FORTH with option |-+
| terminal | ¦ | 6MBds | (I2C MASTER) ¦ | TERMINAL_I2C (I2C SLAVE)|
| | ¦------------+ +----------------------------¦ +--------------------------+
| | ¦ |< 20cm>| ¦ up to 112 I2C_Slave targets
With the indicated MCLK and UART speed, Coretest.4th is downloaded to (and executed by) I2C_Slave in 800ms.
The driver UARTI2CS works without error from 1MHz to 24MHz MCLK and from 115200Bds up to 6MBds UART.
- With I2C_Master running at 24 MHz, the I2C bus frequency is about 1MHz, and it works fine even if I2C_slave is running at 1 MHz.
+ With I2C_Master running at 24 MHz, the I2C bus frequency is about 1MHz, and it works fine
+ even if I2C_slave is running at 1 MHz.
Don't forget to add two 3k3 pullup resistors on SCL and SDA...
the Multi Master Mode works but is not tested in multi master environment.
"cerise sur le gâteau": when they wait for a TERMINAL input (idle state),
both I2C_Master and I2C_Slave(s) are sleeping in LPMx mode and the bus I2C is freed.
- LPM4 mode is available for I2C_Slave devices.
-
- The driver UART2I2CS doesn't use the UCBx I2C_Master hardware, really too bad, but
- profitably its software version, much more faster, which consumes just two I/O (better in the range Px0-Px3),
- the UCBx remaining available for another I2C_Slave or SPI driver.
+ The I2C_slave driver handles LPM4 mode.
+ The UART2I2CS does not use TI's horrible UCBx_I2C_Master driver, but a much faster software driver,
+ with the UCBx still available for an I2C_Slave or SPI driver.
##### HOW TO DO ?
- first you make a I2C cable (GND,SDA,SCL,3V3) between your 2 LaunchPad, with 3,3k pullup resistors on SDA and SCL lines.
- see each of two /inc/target.pat files to know SDA ans SCL pins.
+ first you make the I2C cable (GND,SDA,SCL,3V3) between your 2 LaunchPad, with 3,3k pullup resistors
+ on SDA and SCL lines. See in forthMSP430FR_TERM_I2C.asm to select SDA and SCL pins.
to compile FastForth for I2C TERMINAL from forthMSP430FR.asm file:
- 1- uncomment the line "TERMINAL_I2C".
- 2- search "I2CSLAVEADR" line and set your <slave address you want>, i.e. 10h.
- 3- compile file then prog your I2C_Slave LaunchPad.
+ - uncomment the line "TERMINAL_I2C".
+ - search "I2CSLAVEADR" line and set your <slave address you want>, i.e. 10h.
+ - compile file then prog your I2C_Slave LaunchPad.
with the another LaunchPad running FastForth:
At the end of UART2I2CS.f file set the <slave address you want>, i.e. $10.
### PREVIOUS versions
Unlocking I/O's is transfered from RESET to WARM.
-Thus, by redirecting WARM, you can add I/O's configuration of your application before unlock them.
+Thus, by redirecting WARM, you can add I/O's configuration of your application before unlocking.
The structure of primary DEFERred words as KEY,EMIT,CR,WARM... is modified,
you can obviously mix LOW/HIGH levels in CODENNM and :NONAME
-All interpretation/compilation errors now execute PWR_STATE, so any incorrect definition
+All interpretation/compilation errors now execute ~~`PWR_RET`~~~ `RST_RET`, so any incorrect definition
and all its source file will be automatically erased.
\prog(.bat) to do what ?...
\config\
- \asm.properties configuration for *.inc,*.asm files
- \forth.properties configuration for *.f,*.4th files
- \fortran.properties configuration for *.pat files
- \SendFile.ttl TERATERM macro file to send source file to FASTFORTH
- \SendToSD.ttl TERATERM macro file to send source file to embedded SD_CARD
- \build(.bat) called by scite to build target.txt program
- \BSL_prog(.bat) to flash target with target.txt file with BSL_Scripter
- \FET_prog(.bat) to flash target with target.txt file with MSP430Flasher
- \CopyTo_SD_Card(.bat) to copy in your MSP430-FORTH
- \SendSource(.bat) to send file to FASTFORTH
- \Preprocess(.bat) to convert generic .f file to specific .4th file
- \CopySourceFileToTarget_SD_Card.bat copy it in any user folder for drag'n drop use
- \SendSourceFileToTarget.bat copy it in any user folder for drag'n drop use
- \PreprocessSourceFile.bat copy it in any user folder for drag'n drop use
- \SelectTarget.bat called to select target, device and deviceID
+ \asm.properties configuration for *.inc,*.asm files
+ \forth.properties configuration for *.f,*.4th files
+ \fortran.properties configuration for *.pat files
+ \SciTEDirectory.properties copy it to your project root folder
+ \SciTEUser.properties copy it in your home directory
+ \SendFile.ttl TERATERM macro file to send source file to FASTFORTH
+ \SendToSD.ttl TERATERM macro file to send source file to embedded SD_CARD
+ \build(.bat) called by scite to build target.txt program
+ \BSL_prog(.bat) to flash target with target.txt file with BSL_Scripter
+ \FET_prog(.bat) to flash target with target.txt file with MSP430Flasher
+ \CopyTo_SD_Card(.bat) to copy in your MSP430-FORTH
+ \SendSource(.bat) to send file to FASTFORTH
+ \Preprocess(.bat) to convert generic .f file to specific .4th file
+ \CopySourceFileToTarget_SD_Card.bat copy it in any user folder for drag'n drop use
+ \SendSourceFileToTarget.bat copy it in any user folder for drag'n drop use
+ \PreprocessSourceFile.bat copy it in any user folder for drag'n drop use
+ \SelectTarget.bat called to select target, device and deviceID
\inc\ MACRO ASsembler files.inc, files.asm, GEMA preprocessor files.pat
- \MSP430FRxxxx.inc device configuration for AS assembler
- \MSP430FRxxxx.asm device init code for AS assembler
- \MSP_EXP430FRxxxx.asm target configuration for AS assembler
+ \TargetInit.asm select target configuration file for AS assembler
+ \MSP_EXP430FRxxxx.asm target minimalist hardware config to compile FastForth
+ \ThingsInFirst.inc general configuration for AS assembler
+ \MSP430FRxxxx.inc device declarations
+ \ThingsInLast.inc general post configuration for AS assembler
\FastForthREGtoTI.pat converts FORTH symbolic registers names to TI Rx registers
\tiREGtoFastForth.pat converts TI Rx registers to FORTH symbolic registers names
\MSP430FRxxxx.pat device configuration for gema preprocessor
\MSP_EXP430FRxxxx.pat target configuration for gema preprocessor
- \ThingsInFirst.inc general pre configuration for AS assembler
- \ThingsInLast.inc general post configuration for AS assembler
\prog\ SciTEGlobal.properties, TERATERM.INI + programs.url
\FF_SPECS.f shows all specificities of FAST-FORTH compiled on your target
\RTC.f set date and time, one example of MARKER use.
\RC5toLCD.f multitasking example
- \SD_test.f tests for SD_CARD driver
+ \SD_TEST.f tests for SD_CARD driver
\SD_TOOLS.f same as SD_TOOLS.asm, (but erasable)
\TESTASM.f some tests for embedded assembler
\TESTXASM.f some tests for embedded extended assembler
\UTILITY.f same as UTILITY.asm, (but erasable)
-Note: all actions (flashing target, download files) can be made by using bat files directly,.
+Note: all actions (flashing target, download files) can be made by using bat files directly.
The next is to download IDE (WINDOWS):
## First get TI's programs
* [sCiTE single file executable](https://www.scintilla.org/SciTEDownload.html) to drive:\prog\, then rename Scxxx.exe to scite.exe
-* [Macro AS](http://john.ccac.rwth-aachen.de:8000/ftp/as/precompiled/i386-unknown-win32/aswcurr.zip), unzip in drive:\prog\
+* [Macro AS](http://john.ccac.rwth-aachen.de:8000/ftp/as/precompiled/i386-unknown-win32/aswcurr-142-bld158.zip), unzip in drive:\prog\
* [srecord](https://sourceforge.net/projects/srecord/files/srecord-win32/1.64/), unzip in drive:\prog\
* assemble (CTRL+0). A window asks you for 4 parameters:
-* set target as first param, i.e. MSP_EXP430FR5969
+* set your target as first param, i.e. MSP_EXP430FR5969
* then execute. the output will be \binaries\MSP_EXP430FR5969.txt
## Connect the FAST FORTH target to a serial terminal
-you will need an USBtoUART cable with a PL2303TA or PL2303HXD device that allows both XON/XOFF
+you will need an USBtoUART cable with a PL2303TA|PL2303HXD|PL1303GC device that allows both XON/XOFF
and hardware control flow :
-[PL2303HXD 3.3V](http://www.google.com/search?q=PL2303HXD+3.3V+cable)
+[PL2303GC](https://duckduckgo.com/?q=DSD+TECH+SH-U06A+PL2303GC)
[PL2303 driver](http://www.prolific.com.tw/US/ShowProduct.aspx?p_id=225&pcid=41)
WARNING! always verify VCC PIN = 3.3V before use to supply your target with.
or with a CP2102 device and 3.3V/5V that allows XON/XOFF control flow up to 921600 Bds:
-[CP2102 3.3V](https://www.google.com/search?q=cp2102+3.3V+6PIN)
+[CP2102 3.3V](https://duckduckgo.com/q=cp2102+3.3V+6PIN)
[CP2102 driver](https://www.silabs.com/products/development-tools/software/usb-to-uart-bridge-vcp-drivers)
WARNING! always verify VCC PIN = 3.3V before use to supply your target with.
If you have MSP-EXP430FR5994, nothing to do.
For the choice of a SD card socket be carefull, pin CD (Card Detect) must be present!
-google search: "micro SD card 9 pin"
+web search: "micro SD card 9 pin"
Look for the good wiring in /Launchpad.asm file
#### Compile with SD_Card addon
If you remove the SD memory card reader and then reset, all SD\_IO pins are available except SD_CD.
Drive letters are always ignored.
- LOAD" path\filename.4th".
+ LOAD" path\filename.4th" relative path,
+ LOAD" \path\filename.4th" absolute path.
The file is interpreted by FORTH in same manner than from the serial terminal.
When EOF is reached, the file is automatically closed.
LOAD" \" Root becomes the current folder.
- READ" path\filename.ext".
+ READ" filename.ext" reads a file in current directory,
+ READ" \filename.ext" reads a file in root directory.
The first sector of this file is loaded in BUFFER.
-To read next sectors, use the command READ that loads the next sector in the buffer,
-and leaves on the stack a flag that is true when the EOF is reached.
+To read next sectors, use the command READ which loads the next sector in the buffer
+and leaves on the stack a true flag when the EOF is reached.
The file is automatically closed. See tstwords.4th for basic usage.
-The variable BufferLen keep the count of bytes to be read (0 to 512).
+The variable BufferLen keep the count of bytes to be read (1 to 512).
-If you want to anticipate the end, use the CLOSE command.
+If you want to anticipate the end, remove the false flag left by the previous READ then use the CLOSE command.
WRITE" path\filename.ext".
-If the file does not exist, create it, else open it and set the write pointer at the end of the file,
+If the file does not exist, create it else open it, and set the write pointer at the end of the file,
ready to append chars.
+The command WRITE writes the buffer and increments the current sector.
+
See example of use in \MSP430-FORTH\SD_TEST.f.
-To overwrite an existing file: DEL" file" then WRITE" file".
+To overwrite an existing file:
-Use CLOSE to close the file.
+ DEL" path\filename.ext" (no error issued),
+ WRITE" path\filename.ext".
+Use CLOSE to close this file.
- DEL" path\filename.ext". If the file is not found, do nothing, no error.
#### Copy source file to SD_Card
First, remove the USBtoUART bridge then reconnect it. Perhaps it was in suspend state...
-If the system is always freezed, press <reset> button on the MSP-EXP430FR5xxx ; FORTH restarts
-as it was after the last RST_HERE command.
+If the system is always freezed, press `RST` button on the MSP-EXP430FR5xxx ; FORTH restarts
+as it was after the last `RST_SET` command.
If the system does not restart again, press `SW1+RESET`.
-FORTH restarts in the state it is in its object txt file.
-
-Here is the FastForth memory management, one of its major assets :
+FORTH restarts in the state of its object file.
- case 1 : when you type `PWR_STATE` the program beyond PWR_HERE marker is lost.
+Here is the FastForth memory management, one of its major assets, with both hardware events and software equivalent for COLD and WIPE levels:
- case 1.1 : when you type `WARM`, FORTH interpreter is restarted, the program beyond PWR_HERE is lost.
- The WARM display starts with "#0".
+* RST_RET
- case 1.2 : Power ON performs a reset and the program beyond PWR_HERE is lost.
- the WARM display starts with the SYSRSTIV value "#2".
-
- case 1.3 : SVSHIFG SVSH event, same effects,
- the WARM display starts with the SYSRSTIV decimal value "#14".
+ * when you type `RST_RET` the program beyond the last RST_SET is lost.
-
- case 2 : when you type `RST_STATE` the program beyond RST_HERE marker is lost.
+ * Running a `MARKER` definition will remove it and the program beyond. In addition the user can link it a routine to remove modified configuration in system: vectors, hardware, IOs...
- case 2.1 : <RESET> performs reset and the program beyond RST_HERE is lost,
- the WARM display starts with the SYSRSTIV value "#4".
+* WARM level : SYS --> WARM display --> SLEEP.
+
+ * when you type `0 SYS`, FORTH interpreter is restarted without program lost, without WARM display.
- case 2.2 : when you type `COLD` (software reset), same effects,
- the WARM display starts with the SYSRSTIV value "#6".
+ * when you type `SYS`, FORTH restarts, the program beyond RST_SET is lost, INIT_FORTH and INIT_HARD_APP (INIT_TERM by default) are executed, the WARM display starts by "#1".
- case 2.3 : PUC on failure, same effects,
- The WARM display starts with the SYSRSTIV decimal value.
+ * when you type `+n SYS` (n>0, odd), same effects, the WARM display starts by "#+n".
+
+* COLD level : PUC --> `SYS` --> WARM display --> SLEEP.
+ * Power ON : the WARM display starts with the SYSRSTIV value "#2".
- case 3 : when you type `WIPE` (software Deep Reset)
- * all programs donwloaded from the terminal or the SD_Card are lost,
- * the default state of COLD_APP, INI_SOFT_APP, INI_HARD_APP and BACKGND_APP are restored,
- * all "defered" words are initialised with their default value,
- * same thing for interrupts vectors,
- * and SIGNATURES area is cleared (FFh).
- The WARM display starts with #-1.
+ * SVSHIFG SVSH event (dropout supply) : the WARM display starts with the SYSRSTIV value: "#14".
- case 3.1 : <SW1+RESET> performs hardware deep reset, same effects.
- The WARM display starts with #-1.
+ * hardware `RST` : the WARM display starts with the SYSRSTIV value "#4".
- case 3.2 : after compiling new FastForth, same effects obviously!
- The WARM display starts with #-3.
+ * PUC on failure : the WARM display starts with the SYSRSTIV value: #n.
+ * `+n SYS` (n>0 and even) is the software RESET : the WARM display starts with the SYSRSTIV value "#+n" (even).
+
- case 4 : FastForth keeps the memory of all resident definitions. During source file download the
- conditionnal compilation allows to compile only non-resident definitions.
+* WIPE level : PUC --> `-n SYS` --> WARM display --> SLEEP
- case 4.1 : Running a "MARKER" definition will delete anything compiled beyond that.
- By starting a source file with this "MARKER" tag, the memory is first cleared of
- all the contents of that source file each time it is reloaded.
+ * `-n SYS` (n<0) performs the software Deep Reset:
+
+ * INIT_FORTH and INIT_HARD_APP (INIT_TERM by default) are executed,
+ * all programs donwloaded from the terminal or from the SD_Card are lost,
+ * the default state of COLD_APP, INI_SOFT_APP, INI_HARD_APP and BACKGND_APP is restored,
+ * all "defered" words are initialised with their default value,
+ * all interrupts vectors also,
+ * SIGNATURES area is FFh full filled.
+ * WARM display = #-n.
+ * hardware `SW1+RESET` does same effects, WARM display = #-1.
+
+ * recompiling FastForth, too, WARM display = #-3.
+* ERROR : ABORT" --> ABORT" display --> SLEEP.
+
+ * when an error occurs, FASTFORTH discards the end of current downloading if any, does same as `SYS` then displays the error message. In this way, any error is followed by the complete erasure of the bad defined word causing this error, and also by discarding the end of downloading of the source file including it.
-As all other words FORTH, PWR_STATE PWR_HERE RST_STATE RST_HERE and MARKER defn. may be also used in definitions.
+ * It is strongly recommended to end any source file with `RST_SET` to protect it program from any subsequent error.
-If you have previously set 'NOECHO', there is no WARM display.
-With I2C_FastForth, WARM display is preceded by the I2C slave address, example; `@18`.
-If an error occurs from the interpreter, FORTH is restarted, the error is always displayed and the program beyond PWR_HERE is lost.
+As all other words FORTH, RST_SET RST_RET and MARKER definitions may be freely used in compiling mode.
-In this way, any error is followed by the complete erasure of a bad definined word causing this error,
-or by that of the downloaded source file including it.
+If you have previously set 'NOECHO', there is no WARM, COLD, WIPE display.
-It is therefore recommended to end a source file with at least 'PWR_HERE' to protect it
-from any subsequent error.
+With I2C_FastForth version, WARM display is preceded by the decimal I2C slave address, example: `@18`.
## VOCABULARY ADD-ON
-These words are not ANS94 compliant, they are those of F83 standard.
-
-For example, after loading SD_TOOLS add-on, you can type: ALSO ASSEMBLER WORDS PREVIOUS WORDS
+These words are not ANS94 compliant.
- With `ALSO ASSEMBLER`, the vocabulary ASSEMBLER is added to the search CONTEXT thus the ASSEMBLER words
- become visible,
-
- WORDS display the words of ASSEMBLER then those of FORTH,
-
- PREVIOUS remove the vocabulary ASSEMBLER form the CONTEXT, and the ASSEMBLER words become hidden,
-
- so the last WORDS display only FORTH words.
-
-In the forthMSP430FR_ASM.asm, see the FORTH word CODE that add ASSEMBLER to the search CONTEXT and the ASSEMBLER word ENDCODE
- that remove ASSEMBLER from search CONTEXT. Thus, the assembler words can be used only between CODE and ENDCODE.
+The CONTEXT stack is 8 word_set sized.
-The CONTEXT can grow up to 6 vocabularies by using the word ALSO.
+after typing: WORDSET TRUC \ a new word-set called TRUC is created
-If you want add words to the assembler you must type: ALSO ASSEMBLER DEFINITIONS,
-The vocabulary ASSEMBLER is added to the search CONTEXT as previously but also becomes the CURRENT vocabulary in which the new words will be stored.
+ TRUC adds the word-set TRUC first in the CONTEXT stack, the interpreter search existing definitions first in TRUC
+ PREVIOUS removes TRUC from CONTEXT
-Finally, `FORTH ONLY DEFINITIONS` limits the search CONTEXT to FORTH and the CURRENT vocabulary is FORTH.
+ DEFINITIONS adds news definitions in the first word-set in the CONTEXT stack, i.e. TRUC,
+ PREVIOUS removes TRUC from CONTEXT but new definitions are still added in TRUC
+ DEFINITIONS new definitions are added into the previous first word-set in the CONTEXT stack,
+ after `-1 SYS`: the FORTH word-set.
-**WARNING !** it is discouraged to execute any definition included in the assembler word-set.
## EMBEDDED ASSEMBLER
FAST FORTH knows three kinds of definitions :
-* high level FORTH definitions : <name> ... ;
+* high level FORTH definitions `: <name> ... ;`
-* low level definitions CODE <name> ... ENDCODE
+* low level definitions `CODE <name> ... ENDCODE`
-* low level hidden definitions HDNCODE <name> ... ENDCODE
- they are hidden because not FORTH executable.
+* low level hidden definitions `HDNCODE <name> ... ENDCODE` which are deliberately hidden because they are not executable by FORTH.
Examples:
- : NOOP \ FORTH definiton "NOOP", do nothing
+ : NOOP \ FORTH definition "NOOP", does nothing
DUP
DROP
;
THEN
\ else return to background task SLEEP
MOV @RSP+,SR \ restore SR flags
- BIC #%1111_1000,SR \ but force CPU Active Mode
+ BIC #%0111_1000,SR \ but force CPU Active Mode, disable all interrupts
RET \ (instead of RETI)
ENDCODE
-A the end of low level CODE definition, the instruction MOV @IP+,PC jumps to the next definition.
+At the end of low level CODE definition, the instruction MOV @IP+,PC jumps to the next definition.
This faster (4 cycles) and shorter (one word) instruction replaces the famous pair of assembly
instructions : CALL #LABEL ... RET (4+4 cycles, 2+1 words). The register IP is the Interpretative Pointer.
-High level FORTH definitions starts with a boot code "DOCOL" that save the IP pointer, reload it with the first address
-of a list of execution addresses, then performs a postincrement branch to this first address.
-The list ends with the address of another piece of code: EXIT (6 cycles) that restores IP before the instruction MOV @IP+,PC.
+High level FORTH definitions starts with a boot code "DOCOL" which saves the IP pointer and loads it with the first address
+of a list of execution addresses, then performs a postincrement branch to the first one.
+The list ends with the address of another piece of code: EXIT (6 cycles) which restores IP before the instruction MOV @IP+,PC.
here, the compilation of low level ADD definition :
and the one of the high level word NOOP :
header \ compiled by the word :
- execution addr CALL rDOCOL \ boot code "DOCOL" compiled by the word :
+ execution addr
+ DOCOL PUSH IP \ boot code "DOCOL"...
+ CALL rDOCOL \ ...compiled by the word :
addr of DUP \ execution addr of DUP
addr of DROP \ execution addr of DROP
addr of EXIT \ execution addr of EXIT compiled by the word ;
If we see the code "MIX\_FORTH\_ASM" after compilation :
header \ compiled by :
- exec@ CALL rDOCOL \ boot code "DOCOL" (which saves IP onto stack) compiled by :
+ exec@ PUSH IP \
+ CALL rDOCOL
addr of SWAP
addr of DUP
next addr \ addr of asm1, compiled by HI2LO
header \ compiled by CODE
exec@ asm1
asm2
+ DOCOL PUSH IP
CALL rDOCOL \ "DOCOL" compiled by COLON
addr of word1
addr of word2
addr of EXIT \ EXIT restores IP from stack then executes MOV @IP+,PC
-A new step
+A new step:
: MIX_FORTH_ASM_FORTH \ definition of a FORTH word starts with :
word1
the compiled result
- header \ compiled by :
- exec@ CALL rDOCOL \ "DOCOL" boot code compiled by :
+ header \ )
+ exec@ PUSH IP \ > compiled by :
+ CALL rDOCOL \ )
addr of word1
addr of word2
...
MOV #0,IP \ IP is free for use
asm1 \ assembly instruction
...
- CALL #EXIT \ compiled by LO2HI
+ CALL rDOCOL \ compiled by LO2HI
addr of word3
addr of word4
addr of EXIT \ compiled by ;
-EXIT is used twice !
-
-the first time, by LO2HI :
-
- EXIT MOV @RSP+,IP \ 2 pop into IP the PC pushed on return stack by CALL #EXIT
- MOV @IP+,PC \ 4 execute the routine at addr3
-
-then at the end of FORTH word (addr5):
-
- EXIT MOV @RSP+,IP \ 2 pop old IP from return stack
- MOV @IP+,PC \ 4 execute the routine pointed by the old IP
-
Still another step :
CODE MIX_ASM_FORTH_ASM \ CODE starts a low level word
asm1
asm2
- COLON \ switch to start FORTH word (COLON saves IP)
+ COLON \ start high level definition
word
...
- HI2LO \ FORTH to assembler switch
+ HI2LO \ switch high to low level
asm3
asm4
MOV @RSP+,IP \ restore IP
asm1
asm2
...
- COLON \ starts high level
+ COLON \ starts high level definition
word1
word2
...
header \ compiled by CODE
exec@ asm
asm
- CALL rDOCOL \ "DOCOL" compiled by COLON
+ DOCOL PUSH IP \ compiled...
+ CALL rDOCOL \ ...by COLON
addr
addr
next address \ compiled by HI2LO
asm
asm
- CALL #EXIT \ compiled by LO2HI
+ CALL rDOCOL \ compiled by LO2HI
addr
addr
EXIT addr \ that restores IP from return stack and then executes MOV @IP+,PC
you can MIX conditional branches with a mix of FORTH/assembly: see TEST5 in the demo file \MSP430-FORTH\TESTASM.4TH
-FAST FORTH have one pass assembler, not able to make forward jump.
+FAST FORTH have one pass assembler, not able to resolve forward jumps.
I have added possibility of several "non canonical" jumps, up to 3 backward and up to 3 forward jumps to label :
ENDCODE
Forward labels FWx are for single use, backward labels BWx can solve several jumps,
-until new definition.
+until their new definition.
### SYMBOLIC ASSEMBLER ? YES !
With the three bat files in \MSP430_FORTH folder all is done automatically.
+### WHAT ABOUT VARIABLES, CONSTANTS...
+
+In addition to the FORTH VARIABLE and CONSTANT definitions, the macroassembler allows to use symbolic variables and constants
+which are compiled / executed as number by the FORTH interpreter, also by the assembler, but only in the scope of a source use.f file with their declaration done in a use.pat file.
+
+On the other hand, the CONSTANT, VARIABLE and MARKER definitions are correctly handled by the assembler which provides for each case the expected argument: the constant, the address of the variable and the address of the first user variable with MARKER.
+
+Example:
+
+ VARIABLE BASE
+ $10 BASE !
+ 2 CONSTANT TWO
+ MARKER {MYAPP}
+ 'ESC' , 'XON' C, 'XOFF' C,
+
+ HDNCODE EXAMPLE \ hidden definition because linked in the hidden word-set
+ CMP #RET_ADR,&{MYAPP}-2 \ compare content of {MYAPP}-2 address with RET_ADR
+ MOV &BASE,X \ X = 16
+ MOV #BASE,X \ X = address of base
+ MOV @X,X \ X = 16
+ MOV #TWO,Y \ Y = 2
+ MOV &{MYAPP},W \ W = $1B
+ MOV.B &{MYAPP}+2,W \ W = 17
+ MOV.B &{MYAPP}+3,W \ W = 19
+ MOV @IP+PC
+ ENDCODE
+
+ CODE RUN_EXAMPLE
+ MOV #EXAMPLE,PC \ = BR EXAMPLE runs EXAMPLE, without return
+ ENDCODE
+
+
# COMPILE FAST FORTH FOR YOUR TARGET
1- in forthMSP430FR.asm "TARGET configuration" create a line for your target, example:
3- in \inc\ThingsInFirst.inc add one "device.inc" item:
.IFDEF MY_MSP430FR5738_1
- UCA0_UART ; defines uart used by FORTH input terminal
+ UCA0_UART ; defines uart used for TERMINAL
LF_XTAL ; defines if your module have a 32768 Hz xtal, to enable it.
UCB0_SD ; defines UC used for SD Card driver if any
.include "MSP430FR5738.inc" ; include device declarations
# ANNEXES
-Here you have a good view of MSP430 assembly:
+Here you have a good overview of MSP430 assembly:
[MSP430 ISA](http://www.ece.utep.edu/courses/web3376/Notes_files/ee3376-isa.pdf)
FastForth embedded assembler doesn't recognize the (useless) TI's symbolic addressing mode: ADD.B EDE,TONI.
-REGISTERS correspondence (you can use freely ASM or TI or FASTFORTH registers's names).
+REGISTERS correspondence (you can freely use ASM or TI or FASTFORTH registers's names).
- ASSEMBLER TI FASTFORTH comment
+ ASM TI FASTFORTH comment
R0 PC PC Program Counter
R1 SP RSP Return Stack Pointer
**REGISTERS use**
The FASTFORTH registers rDOCOL, rDOVAR, rDOCON and rDODOES must be preserved.
-If you use them you may either PUSHM #4,M before and POPM #4,M after,
-or use then restore FastForth default values:
-xdocol, xdovar, xdocon, xdodoes. See device.pat.
+If you use them you may either `PUSHM #4,M` before and `POPM #4,M after`,
+or use them directly then restore FastForth default values:
+
+`MOV #INIT_DOXXX,X`
+`MOV @X+,rDOCOL`
+`MOV @X+,rDODOES`
+`MOV @X+,rDOCON`
+`MOV @X,rDOVAR`
+
+(Search `INIT_DOXXX` in your \inc\device.pat)
+
+If you want to restore only rDODOES, rDOCON and rDOVAR:
+
+`MOV #INIT_DOXXX+4,X`
+`MOV @X+,rDODOES`
+`MOV @X+,rDOCON`
+`MOV @X,rDOVAR`
+
+If you want to restore only rDODOES and rDOCON:
+
+`MOV #XDODOES,rDODOES`
+`MOV #XDOCON,rDOCON`
When you use these registers you can't call any FORTH words created by them at the same time!
-don't use R3 and use R2 only with BIC, BIT, BIS instructions in register mode.
+don't use R3 and use R2 (SR) only with BIC, BIT, BIS instructions in register mode.
The bits 0-11 of SR register are saved by interrupts and restored by the instruction RETI.
you can use freely UF9 UF10 and UF11 as SR bits 9-11.
register RSP is the Return Stack Pointer (SP).
-to push one cell on the RSP stack : `PUSH <what you want>`
+to push one cell on the RSP stack: `PUSH <what you want>`
-to pop one cell from the RSP stack : `MOV @RSP+,<where you want>`
+to pop one cell from the RSP stack: `MOV @RSP+,<where you want>`
-don't never pop a byte with instruction `MOV.B @RSP+, ...`
+don't never push or pop a byte on RSP stack !
to push multiple registers on the RSP stack :
- PUSHM #n,Rx \ with 0 <= x-(n-1) < 16
+`PUSHM #n,Rx`, with 0 <= x-(n-1) < 16
to pop multiple registers from the RSP stack :
- POPM #n,Rx \ with 0 <= x-(n-1) < 16
+`POPM #n,Rx`, with 0 <= x-(n-1) < 16
PUSHM order : PSP,TOS, IP, S , T , W , X , Y ,rDOVAR,rDOCON,rDODOES,rDOCOL, R3, SR,RSP, PC
PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7 , R6 , R5 , R4 , R3, R2, R1, R0
-example : `PUSHM #6,IP` pushes `IP,S,T,W,X,Y` registers to return stack
+example : `PUSHM #6,IP` pushes IP,S,T,W,X,Y registers to return stack
POPM order : PC,RSP, SR, R3,rDOCOL,rDODOES,rDOCON,rDOVAR, Y , X , W , T , S , IP,TOS,PSP
POPM order : R0, R1, R2, R3, R4 , R5 , R6 , R7 , R8, R9,R10,R11,R12,R13,R14,R15
-example : `POPM #6,IP` pulls `Y,X,W,T,S,IP` registers from return stack
+example : `POPM #6,IP` pulls Y,X,W,T,S,IP registers from return stack
-Error occurs if `#n` is out of bounds.
+Error occurs if #n is out of bounds.
**conditionnal jumps use**
0>= with IF UNTIL WHILE
0< with ?GOTO
-
# FAST FORTH resumed
-
- RETURN-STACK-CELLS = 48 maximum size of the return stack, in cells
- STACK-CELLS = 48 maximum size of the data stack, in cells
- /COUNTED-STRING = 255 maximum size of a counted string, in characters
+ RETURN-STACK-CELLS = 48 max size of the return stack, in cells
+ STACK-CELLS = 48 max size of the data stack, in cells
+ /COUNTED-STRING = 255 max size of a counted string, in characters
/HOLD = 34 size of the pictured numeric output string buffer, in characters
/PAD = 84 size of the scratch area pointed to by PAD, in characters
- ADDRESS-UNIT-BITS = 16 size of one address unit, in bits
- FLOORED = true true if floored division is the default
- MAX-CHAR = 255 maximum value of any character in the implementation-defined character set
+ ADDRESS-UNIT-BITS = 16 size of one address unit, in bits
+ FLOORED = true true if floored division is the default
+ MAX-CHAR = 255 max value of any character in the implementation-defined character set
MAX-N = 32767 largest usable signed integer
MAX-U = 65535 largest usable unsigned integer
MAX-D = 2147483647 largest usable signed double number
MAX-UD = 4294967295 largest usable unsigned double number
- DeFiNiTiOnS aRe CaSe-InSeNsItIvE Strings are case-sensitive
-
+ DeFiNiTiOnS aRe CaSe-InSeNsItIvE they are compiled in their CAPS_ON form.
## FORTH word-set
-It is reduced to a minimum, but nevertheless extensible up to ... $FF80 !
-
- RST_HERE PWR_HERE RST_STATE PWR_STATE CREATE ; : IMMEDIATE
- POSTPONE ] [ \ ' ['] ABORT" INTERPRET
- COUNT LITERAL ALLOT , >NUMBER FIND WORD ."
- S" . U. SIGN HOLD #> #S #
- <# ! @ CR TYPE NOECHO ECHO EMIT
- KEY ACCEPT COLD WARM WIPE
-
-[CREATE ](https://forth-standard.org/standard/core/CREATE)
-[; ](https://forth-standard.org/standard/core/Semi)
-[: ](https://forth-standard.org/standard/core/Colon)
-[IMMEDIATE ](https://forth-standard.org/standard/core/IMMEDIATE)
-[POSTPONE ](https://forth-standard.org/standard/core/POSTPONE)
-[\] ](https://forth-standard.org/standard/core/right-bracket)
-[\[ ](https://forth-standard.org/standard/core/Bracket)
-[\\ ](https://forth-standard.org/standard/block/bs)
-[\[\'\] ](https://forth-standard.org/standard/core/BracketTick)
-[\' ](https://forth-standard.org/standard/core/Tick)
-[ABORT" ](https://forth-standard.org/standard/core/ABORTq)
-[COUNT ](https://forth-standard.org/standard/core/COUNT)
-[LITERAL ](https://forth-standard.org/standard/core/LITERAL)
-[ALLOT ](https://forth-standard.org/standard/core/ALLOT)
-[, ](https://forth-standard.org/standard/core/Comma)
-[>NUMBER ](https://forth-standard.org/standard/core/toNUMBER)
-[FIND ](https://forth-standard.org/standard/core/FIND)
-[WORD ](https://forth-standard.org/standard/core/WORD)
-[." ](https://forth-standard.org/standard/core/Dotq)
-[S" ](https://forth-standard.org/standard/core/Sq)
-[. ](https://forth-standard.org/standard/core/d)
-[U. ](https://forth-standard.org/standard/core/Ud)
-[SIGN ](https://forth-standard.org/standard/core/SIGN)
-[HOLD ](https://forth-standard.org/standard/core/HOLD)
-[#> ](https://forth-standard.org/standard/core/num-end)
-[#S ](https://forth-standard.org/standard/core/numS)
-[# ](https://forth-standard.org/standard/core/num)
-[<# ](https://forth-standard.org/standard/core/num-start)
-[! ](https://forth-standard.org/standard/core/Store)
-[@ ](https://forth-standard.org/standard/core/Fetch)
-[CR ](https://forth-standard.org/standard/core/CR)
-[TYPE ](https://forth-standard.org/standard/core/TYPE)
-[EMIT ](https://forth-standard.org/standard/core/EMIT)
-[KEY ](https://forth-standard.org/standard/core/KEY)
-[ACCEPT ](https://forth-standard.org/standard/core/ACCEPT)
-
- COLD PFA of COLD content = STOP_APP subroutine address, by default --> STOP_TERM
- WARM PFA of WARM content = INI_APP subroutine address, by default --> ENABLE_IO
- WIPE resets the program memory to its original state (Deep_RST have same effect).
- RST_HERE defines the bound of the program memory protected against COLD or hardware reset.
- PWR_HERE defines the bound of the program memory protected against ON/OFF and also against any error occurring.
- RST_STATE removes all words defined after RST_HERE (COLD or <reset> have same effet)
- PWR_STATE removes all words defined after PWR_HERE (an error has same effect)
- INTERPRET text interpreter, common part of EVALUATE and QUIT.
- NOECHO stop display on output
- ECHO start display on output
-
-### words added by the option MSP430ASSEMBLER:
-
- HDNCODE CODE HI2LO
-
- CODE <word> creates a word written in assembler.
- this defined <word> must be ended with ENDCODE unless COLON or LO2HI use.
- HDNCODE <word> creates a word written in assembler but not interpretable by FORTH (because ended by RET instr.).
- Visible only from assembler
+Reduced to 53 definitions, but with everything necessary to be expandable up to $FF80.
+
+RST_SET,
+RST_RET,
+[MARKER ](https://forth-standard.org/standard/core/MARKER),
+HI2LO,
+CODENNM,
+HDNCODE,
+CODE,
+[IS ](https://forth-standard.org/standard/core/IS),
+[\:NONAME ](https://forth-standard.org/standard/core/ColonNONAME),
+[DOES> ](https://forth-standard.org/standard/core/DOES),
+[CREATE ](https://forth-standard.org/standard/core/CREATE),
+[IMMEDIATE ](https://forth-standard.org/standard/core/IMMEDIATE),
+[; ](https://forth-standard.org/standard/core/Semi),
+[: ](https://forth-standard.org/standard/core/Colon),
+[POSTPONE ](https://forth-standard.org/standard/core/POSTPONE),
+[\\ ](https://forth-standard.org/standard/core/bs),
+[\] ](https://forth-standard.org/standard/core/right-bracket),
+[\[ ](https://forth-standard.org/standard/core/Bracket),
+[\[\'\] ](https://forth-standard.org/standard/core/BracketTick),
+[\' ](https://forth-standard.org/standard/core/Tick),
+[ABORT" ](https://forth-standard.org/standard/core/ABORTq),
+[ALLOT ](https://forth-standard.org/standard/core/ALLOT),
+[COUNT ](https://forth-standard.org/standard/core/COUNT),
+[LITERAL ](https://forth-standard.org/standard/core/LITERAL),
+[, ](https://forth-standard.org/standard/core/Comma),
+[>NUMBER ](https://forth-standard.org/standard/core/toNUMBER),
+[FIND ](https://forth-standard.org/standard/core/FIND),
+[WORD ](https://forth-standard.org/standard/core/WORD),
+[." ](https://forth-standard.org/standard/core/Dotq),
+[S" ](https://forth-standard.org/standard/core/Sq),
+[. ](https://forth-standard.org/standard/core/d),
+[U. ](https://forth-standard.org/standard/core/Ud),
+[SIGN ](https://forth-standard.org/standard/core/SIGN),
+[HOLD ](https://forth-standard.org/standard/core/HOLD),
+[#> ](https://forth-standard.org/standard/core/num-end),
+[#S ](https://forth-standard.org/standard/core/numS),
+[# ](https://forth-standard.org/standard/core/num),
+[<# ](https://forth-standard.org/standard/core/num-start),
+[\[UNDEFINED\] ](https://forth-standard.org/standard/tools/BracketUNDEFINED),
+[\[DEFINED\] ](https://forth-standard.org/standard/tools/BracketDEFINED),
+[\[IF\] ](https://forth-standard.org/standard/tools/BracketIF),
+[\[THEN\] ](https://forth-standard.org/standard/tools/BracketTHEN)
+[\[ELSE\] ](https://forth-standard.org/standard/tools/BracketELSE),
+[! ](https://forth-standard.org/standard/core/Store),
+[@ ](https://forth-standard.org/standard/core/Fetch),
+[TYPE ](https://forth-standard.org/standard/core/TYPE),
+NOECHO,
+ECHO,
+[EMIT ](https://forth-standard.org/standard/core/EMIT),
+[KEY ](https://forth-standard.org/standard/core/KEY),
+[ACCEPT ](https://forth-standard.org/standard/core/ACCEPT),
+SYS.
+
+Words ACCEPT KEY EMIT are DEFERred definitions. ACCEPT doesn't use KEY.
+
+ RST_SET defines the bound of the program memory protected against any PUC.
+ RST_RET removes all words defined after RST_SET
HI2LO used to switch compilation from high level (FORTH) to low level (assembler).
-
-### Other words are useable in any source_files.f, see \inc\device.pat file :
-
- SLEEP CODE_WITHOUT_RETURN: CPU shutdown
+ CODENNM the assembler counterpart of :NONAME.
+ CODE <name> creates a definition written in assembler.
+ this defined <name> must be ended with ENDCODE unless COLON or LO2HI use.
+ HDNCODE <name> creates a word same as CODE but in the hidden word-set to be visible only in the assembly mode.
+ NOECHO disables display on the TERMINAL
+ ECHO enables display on the TERMINAL
+ SYS 0 SYS | SYS restarts the interpreter,
+ +n (odd) SYS initializes the hardware and restarts the FORTH engine,
+ +n (even) SYS does software RESET, initializes the hardware and restarts the FORTH engine,
+ -n SYS same as +n (even) SYS, plus resets the program memory to its original state.
+
+### Other words/addresses which are usable in any generic source_files.f
+
+**All constants, variables and definitions included in \inc\device.pat and \inc\target.pat files are usable by
+the assembler and also by the FORTH interpreter (except the definitions).**
+
+ see definitions in forthMSP430FR.asm:
+ SLEEP ASM CODE_WITHOUT_RETURN: CPU shutdown
LIT CODE compiled by LITERAL
XSQUOTE CODE compiled by S" and S_
HEREXEC CODE HERE and BEGIN execute address
QFBRAN CODE compiled by IF UNTIL
BRAN CODE compiled by ELSE REPEAT AGAIN
NEXT_ADR CODE NEXT instruction (MOV @IP+,PC)
- XDO CODE compiled by DO
- XPLOOP CODE compiled by +LOOP
- XLOOP CODE compiled by LOOP
MUSMOD ASM 32/16 unsigned division, used by ?NUMBER, UM/MOD
MDIV1DIV2 ASM input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
MDIV1 ASM input for 48/16 unsigned division, see DOUBLE M*/
- RET_ADR ASM content of INI_FORTH_PFA and MARKER+8 definitions,
+ RET_ADR ASM RET address,
SETIB CODE Set Input Buffer with org & len values, reset >IN pointer
REFILL CODE accept one line from input and leave org len of input buffer
- CIB_ADR [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
+ CIB_ORG Current Input Buffer address, default value: TIB_ORG; may be redirected to SDIB_ORG
XDODOES to restore rDODOES: `MOV #XDODOES,rDODOES`
XDOCON to restore rDOCON: `MOV #XDOCON,rDOCON`
XDOVAR to restore rDOVAR: `MOV #XDOVAR,rDOVAR`
- ! to restore rDOCOL: `MOV &WIPE_DOCOL,rDOCOL`
- INI_FORTH CODE_WITHOUT_RETURN common part of RST and QABORT, starts FORTH engine
- QABORT CODE_WITHOUT_RETURN run-time part of ABORT"
- ABORT_TERM CODE_WITHOUT_RETURN called by QABORT, also by QREVEAL and INTERPRET
- UART_COLD_TERM ASM, content of COLD_PFA by default
- UART_INIT_TERM ASM, content of WARM_PFA by default
- UART_RXON ASM, content of SLEEP_PFA by default
- UART_RXOFF ASM, called by ACCEPT before Receiving char LF.
- I2C_COLD_TERM ASM, content of COLD_PFA by default
- I2C_INIT_TERM ASM, content of WARM_PFA by default
- I2C_RXON ASM, content of SLEEP_PFA by default
- I2C_CTRL_CH ASM, used as is: `MOV.B #CTRL_CHAR,Y`
- ! `CALL #I2C_CTRL_CH`
+ to restore rDOCOL: `MOV &INIT_DOCOL,rDOCOL`
+ INIT_FORTH CODE_WITHOUT_RETURN, common part of SYS and QABORT, starts FORTH engine
+ QABORT CODE_WITHOUT_RETURN, run-time part of ABORT"
ABORT ABORT address
QUIT QUIT address
+ see definitions in forthMSP430FR_TERM_UART.asm:
+ ABORT_TERM CODE_WITHOUT_RETURN, called by QABORT, QREVEAL and INTERPRET
+ UART_WARM
+ UART_INIT_TERM ASM CODE, content of UART_WARM+2 by default
+ UART_COLD_TERM ASM CODE, content of UART_COLD+2 by default
+ UART_INIT_SOFT ASM CODE, content of INIT_FORTH+2 by default = RET address
+ UART_RXON ASM CODE, content of SLEEP+2 by default
+ UART_RXOFF ASM CODE, called by ACCEPT
-### Other variables useable in source_files.f, see \inc\device.pat file :
-
- FREQ_KHZ FREQUENCY (in kHz)
- TERMBRW_RST TERMBRW_RST
- TERMMCTLW_RST TERMMCTLW_RST
- I2CSLAVEADR I2C_SLAVE address
- I2CSLAVEADR1
- LPM_MODE LPM_MODE value, LPM0+GIE is the default value
- RSTIV_MEM SYSRSTIV memory, set to -1 to do Deep RESET
- RST_DP RST value for DP
- RST_VOC RST value for VOClink
- VERSION
- THREADS
- KERNEL_ADDON
-
- WIPE_INI MOV #WIPE_INI,X
- WIPE_COLD WIPE value for PFA_COLD
- WIPE_INI_FORTH WIPE value for PFA_INI_FORTH
- WIPE_SLEEP WIPE value for PFA_SLEEP
- WIPE_WARM WIPE value for PFA_WARM
- WIPE_TERM_INT WIPE value for TERMINAL vector
- WIPE_DP WIPE value for RST_DP
- WIPE_VOC WIPE value for RST_VOC
-
- INI_FORTH_INI MOV #INI_FORTH_INI,X \ >BODY instruction of default INI_SOFT_APP
- INIT_ACCEPT FORTH value for PFAACCEPT
- INIT_CR FORTH value for PFACR
- INIT_EMIT FORTH value for PFAEMIT
- INIT_KEY FORTH value for PFAKEY
- INIT_CIB FORTH value for CIB_ADR
- HALF_FORTH_INI to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
- ! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
- ! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
- ! MOV @RSP+,PC \ then RET
- INIT_DOCOL FORTH value for rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
- INIT_DODOES FORTH value for rDODOES (R5)
- INIT_DOCON FORTH value for rDOCON (R6)
- INIT_DOVAR FORTH value for rDOVAR (R7)
- INIT_CAPS FORTH value for CAPS
- INIT_BASE FORTH value for BASE
-
-
-
-## MSP430ASSEMBLER word-set
-
- ?GOTO GOTO FW3 FW2 FW1 BW3 BW2
- BW1 REPEAT WHILE AGAIN UNTIL ELSE THEN
- IF 0= 0<> U>= U< 0< 0>=
- S< S>= RRUM RLAM RRAM RRCM POPM
- PUSHM CALL PUSH.B PUSH SXT RRA.B RRA
- SWPB RRC.B RRC AND.B AND XOR.B XOR
- BIS.B BIS BIC.B BIC BIT.B BIT DADD.B
- DADD CMP.B CMP SUB.B SUB SUBC.B SUBC
- ADDC.B ADDC ADD.B ADD MOV.B MOV RETI
- LO2HI COLON ENDASM ENDCODE
+ see definitions in forthMSP430FR_TERM_I2C.asm:
+ ABORT_TERM CODE_WITHOUT_RETURN, called by QABORT, QREVEAL and INTERPRET
+ I2C_WARM
+ I2C_INIT_TERM ASM CODE, content of I2C_WARM+2 by default
+ I2C_COLD_TERM ASM CODE, content of I2C_COLD+2 by default = RET address
+ I2C_INIT_SOFT ASM CODE, content of INIT_FORTH+2 by default = RET address
+ I2C_RXON ASM CODE, content of SLEEP+2 by default
+ I2C_CTRL_CH ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+ CALL #I2C_CTRL_CH
+
+
+## MSP430ASSEMBLER word-set (in the hidden word-set)
[ADD, ADD.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=135),
[ADDC, ADDC.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=136),
[PUSH, PUSH.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=168),
[RETI ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=170),
[RRA, RRA.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=173),
-[RRC, RRC.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=174)
-[SUB, SUB.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=179)
-[SUBC, SUBC.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=180)
-[SWPB ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=181)
-[SXT ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=182)
-[XOR, XOR.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=184)
-[RRUM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=218)
-[RLAM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=208)
-[RRAM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=211)
-[RRCM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=214)
-[POPM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=204)
-[PUSHM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=205)
+[RRC, RRC.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=174),
+[SUB, SUB.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=179),
+[SUBC, SUBC.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=180),
+[SWPB ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=181),
+[SXT ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=182),
+[XOR, XOR.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=184),
+[RRUM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=218),
+[RLAM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=208),
+[RRAM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=211),
+[RRCM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=214),
+[POPM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=204),
+[PUSHM ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=205),
+?GOTO,
+GOTO,
+BW3,
+BW2,
+BW1,
+FW3,
+FW2,
+FW1,
+REPEAT,
+WHILE,
+AGAIN,
+UNTIL,
+ELSE,
+THEN,
+IF,
+0=,
+0<>,
+U>=,
+U<,
+0<,
+0>=,
+S<,
+S>=,
+LO2HI,
+COLON,
+ENDCODE.
?GOTO used after a conditionnal (0=,0<>,U>=,U<,0<,S<,S>=) to branch to a label FWx or BWx
GOTO used as unconditionnal branch to a label FWx or BWx
0>= conditionnal, to use only with IF UNTIL WHILE
S< conditionnal
S>= conditionnal
- LO2HI switches compilation between low level and high level modes without saving IP register.
- COLON pushes IP then performs LO2HI, used as: CODE <word> ... assembler instr ... COLON ... FORTH words ... ;
+ LO2HI switches compilation from low level to high level modes without saving IP register.
+ COLON pushes IP then performs LO2HI.
ENDCODE to end a CODE or HDNCODE definition.
#### EXTENDED_MEM WORDS set:
[XORX, XORX.A, XORX.B ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=227),
[RPT ](http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=119)
-### CONDCOMP ADD-ON
-
-[MARKER ](https://forth-standard.org/standard/core/MARKER),
-[\[DEFINED\] ](https://forth-standard.org/standard/tools/BracketDEFINED),
-[\[UNDEFINED\] ](https://forth-standard.org/standard/tools/BracketUNDEFINED),
-[\[IF\] ](https://forth-standard.org/standard/tools/BracketIF),
-[\[ELSE\] ](https://forth-standard.org/standard/tools/BracketELSE),
-[\[THEN\] ](https://forth-standard.org/standard/tools/BracketTHEN)
-
-
### VOCABULARY ADD-ON
[DEFINITIONS ](https://forth-standard.org/standard/search/DEFINITIONS),
-[ONLY ](https://forth-standard.org/standard/search/ONLY),
[PREVIOUS ](https://forth-standard.org/standard/search/PREVIOUS),
-[ALSO ](https://forth-standard.org/standard/search/ALSO)
-
-ASSEMBLER sets ASSEMBLER as CONTEXT word set
-FORTH sets FORTH as CONTEXT word set
-VOCABULARY <name> creates a new word-set
-
+ONLY,
+FORTH,
+WORDSET.
-### NONAME ADD-ON
-
-[\:NONAME ](https://forth-standard.org/standard/core/ColonNONAME),
-[DEFER ](https://forth-standard.org/standard/core/DEFER),
-[IS ](https://forth-standard.org/standard/core/IS)
-
-CODENNM is the assembly counterpart of :NONAME.
+ FORTH adds FORTH as first CONTEXT word-set
+ FORTH ONLY clears the CONTEXT stack, same as `-1 SYS`
+ WORDSET <name> creates a new word-set named <name>
+ <name> adds this named word-set in the CONTEXT stack
### SD_CARD_LOADER ADD-ON
- LOAD" LOAD" SD_TEST.4TH" loads source file SD_TEST.4TH from SD_Card and compile it.
+ LOAD" SD_TEST.4TH" loads source file SD_TEST.4TH from SD_Card and compile it.
+ BOOT enable bootstrap
+ NOBOOT disable bootstrap
+Once bootloader is enabled, any PUC event loads (and executes) the file \BOOT.4TH from the SD_Card.
### SD_CARD_READ_WRITE ADD-ON
- TERM2SD" SD_EMIT WRITE READ CLOSE DEL" WRITE"
- READ"
-
- TERM2SD" TERM2SD" SD_TEST.4TH" copy input file to SD_CARD (use CopySourceFileToTarget_SD_Card.bat to do)
+TERM2SD",
+SD_EMIT,
+WRITE,
+READ,
+CLOSE,
+DEL",
+WRITE",
+APPEND",
+READ".
+
+ TERM2SD" TERM2SD" SD_TEST.4TH" copy input file to SD_CARD
+ (use CopySourceFileToTarget_SD_Card.bat to do)
SD_EMIT sends output stream at the end of last opened as write file.
- WRITE write sequentially BUFFER content to a sector
- READ read sequentially a sector to BUFFER
+ WRITE write sequentially the content of SD_buf to a file
+ READ read sequentially a file in SD_buf, leave a flag, false when the file is automatically closed.
CLOSE close last opened file.
DEL" DEL" SD_TEST.4TH" remove this file from SD_CARD.
- WRITE" WRITE" TRUC" open or create TRUC file ready to write to the end of this file
- READ" READ" TRUC" open TRUC and load its first sector in BUFFER
-
-
-
-### BOOTLOADER
-
-to enable bootloader: `' BOOT IS WARM`,
-to disable bootloader: `' BOOT [PFA] IS WARM`
-
-Once bootloader enabled, any PUC event loads (and executes) the file \BOOT.4TH from the SD_Card.
+ WRITE" WRITE" TRUC" create or overwrite a file TRUC ready to write to its beginning.
+ APPEND" APPEND" TRUC" open or create a file TRUC ready to write to the end of this file
+ READ" READ" TRUC" open TRUC and load its first sector in SD_buf
## OPTIONNAL ADD-ON
-* when ADD-ONs are compiled with the kernel, their respective MARKER word identified with braces {} does nothing.
- Sources are in the folder \ADDON, as source.asm file.
-
-* when ADD-ONs are downloaded, their respective MARKER word identified with braces {} removes all ADD-ONs words.
+* Their respective MARKER word identified with braces {} removes all ADD-ONs words.
Sources are in the folder \MSP430-FORTH\, as source.f file.
### ANS_COMP
Adds complement to pass FORTH ANS94 core test.
-[VALUE ](https://forth-standard.org/standard/core/VALUE),
-[TO ](https://forth-standard.org/standard/core/TO),
-[BEGIN ](https://forth-standard.org/standard/core/BEGIN),
-[DOES> ](https://forth-standard.org/standard/core/DOES),
-[SPACES ](https://forth-standard.org/standard/core/SPACES),
-[SPACE ](https://forth-standard.org/standard/core/SPACE),
-[BL ](https://forth-standard.org/standard/core/BL),
-[PAD ](https://forth-standard.org/standard/core/PAD),
-[>IN ](https://forth-standard.org/standard/core/toIN),
-[BASE ](https://forth-standard.org/standard/core/BASE),
-[STATE ](https://forth-standard.org/standard/core/STATE),
-[CONSTANT ](https://forth-standard.org/standard/core/CONSTANT),
-[VARIABLE ](https://forth-standard.org/standard/core/VARIABLE),
-[SOURCE ](https://forth-standard.org/standard/core/SOURCE),
-[RECURSE ](https://forth-standard.org/standard/core/RECURSE),
-[EVALUATE ](https://forth-standard.org/standard/core/EVALUATE),
-[EXECUTE ](https://forth-standard.org/standard/core/EXECUTE),
-[>BODY ](https://forth-standard.org/standard/core/toBODY),
-[.( ](https://forth-standard.org/standard/core/Dotp),
-[( ](https://forth-standard.org/standard/core/p),
-[DECIMAL ](https://forth-standard.org/standard/core/DECIMAL),
-[HEX ](https://forth-standard.org/standard/core/HEX),
-[HERE ](https://forth-standard.org/standard/core/HERE),
-[FILL ](https://forth-standard.org/standard/core/FILL),
-[MOVE ](https://forth-standard.org/standard/core/MOVE),
-[+! ](https://forth-standard.org/standard/core/PlusStore),
-[[CHAR] ](https://forth-standard.org/standard/core/BracketCHAR),
-[CHAR ](https://forth-standard.org/standard/core/CHAR),
-[CELL+ ](https://forth-standard.org/standard/core/CELLPlus),
-[CELLS ](https://forth-standard.org/standard/core/CELLS),
-[CHAR+ ](https://forth-standard.org/standard/core/CHARPlus),
-[CHARS ](https://forth-standard.org/standard/core/CHARS),
-[ALIGN ](https://forth-standard.org/standard/core/ALIGN),
-[ALIGNED ](https://forth-standard.org/standard/core/ALIGNED),
-[2OVER ](https://forth-standard.org/standard/core/TwoOVER),
-[2SWAP ](https://forth-standard.org/standard/core/TwoSWAP),
-[2DROP ](https://forth-standard.org/standard/core/TwoDROP),
-[2DUP ](https://forth-standard.org/standard/core/TwoDUP),
-[2! ](https://forth-standard.org/standard/core/TwoStore),
-[2@ ](https://forth-standard.org/standard/core/TwoFetch),
-[R@ ](https://forth-standard.org/standard/core/RFetch),
-[ROT ](https://forth-standard.org/standard/core/ROT),
-[OVER ](https://forth-standard.org/standard/core/OVER),
-[*/ ](https://forth-standard.org/standard/core/TimesDiv),
-[*/MOD ](https://forth-standard.org/standard/core/TimesDivMOD),
-[MOD ](https://forth-standard.org/standard/core/MOD),
-[/ ](https://forth-standard.org/standard/core/Div),
-[/MOD ](https://forth-standard.org/standard/core/DivMOD),
-[* ](https://forth-standard.org/standard/core/Times),
-[FM/MOD ](https://forth-standard.org/standard/core/FMDivMOD),
-[ABS ](https://forth-standard.org/standard/core/ABS),
-[NEGATE ](https://forth-standard.org/standard/core/NEGATE),
-[SM/REM ](https://forth-standard.org/standard/core/SMDivREM),
-[UM/MOD ](https://forth-standard.org/standard/core/UMDivMOD),
-[M* ](https://forth-standard.org/standard/core/MTimes),
-[UM* ](https://forth-standard.org/standard/core/UMTimes),
-[2/ ](https://forth-standard.org/standard/core/TwoDiv),
-[2* ](https://forth-standard.org/standard/core/TwoTimes),
-[MIN ](https://forth-standard.org/standard/core/MIN),
-[MAX ](https://forth-standard.org/standard/core/MAX),
-[RSHIFT ](https://forth-standard.org/standard/core/RSHIFT),
-[LSHIFT ](https://forth-standard.org/standard/core/LSHIFT),
-[INVERT ](https://forth-standard.org/standard/core/INVERT),
-[1- ](https://forth-standard.org/standard/core/OneMinus),
-[1+ ](https://forth-standard.org/standard/core/OnePlus),
-[S>D ](https://forth-standard.org/standard/core/StoD),
-[XOR ](https://forth-standard.org/standard/core/XOR),
-[OR ](https://forth-standard.org/standard/core/OR),
-[AND ](https://forth-standard.org/standard/core/AND),
-[LEAVE ](https://forth-standard.org/standard/core/LEAVE),
-[UNLOOP ](https://forth-standard.org/standard/core/UNLOOP),
-[J ](https://forth-standard.org/standard/core/J),
-[I ](https://forth-standard.org/standard/core/I),
-[+LOOP ](https://forth-standard.org/standard/core/PlusLOOP),
-[LOOP ](https://forth-standard.org/standard/core/LOOP),
-[DO ](https://forth-standard.org/standard/core/DO),
-[REPEAT ](https://forth-standard.org/standard/core/REPEAT),
-[WHILE ](https://forth-standard.org/standard/core/WHILE),
-[AGAIN ](https://forth-standard.org/standard/core/AGAIN),
-[UNTIL ](https://forth-standard.org/standard/core/UNTIL),
-[THEN ](https://forth-standard.org/standard/core/THEN),
-[ELSE ](https://forth-standard.org/standard/core/ELSE),
-[IF ](https://forth-standard.org/standard/core/IF),
-[> ](https://forth-standard.org/standard/core/more),
-[< ](https://forth-standard.org/standard/core/less),
-[U< ](https://forth-standard.org/standard/core/Uless),
-[= ](https://forth-standard.org/standard/core/Equal),
-[0< ](https://forth-standard.org/standard/core/Zeroless),
-[0= ](https://forth-standard.org/standard/core/ZeroEqual),
-[C, ](https://forth-standard.org/standard/core/CComma),
-[C! ](https://forth-standard.org/standard/core/CStore),
-[C@ ](https://forth-standard.org/standard/core/CFetch),
-[R> ](https://forth-standard.org/standard/core/Rfrom),
-[>R ](https://forth-standard.org/standard/core/toR),
-[NIP ](https://forth-standard.org/standard/core/NIP),
-[DROP ](https://forth-standard.org/standard/core/DROP),
-[SWAP ](https://forth-standard.org/standard/core/SWAP),
-[DEPTH ](https://forth-standard.org/standard/core/DEPTH),
-[EXIT ](https://forth-standard.org/standard/core/EXIT),
-[?DUP ](https://forth-standard.org/standard/core/qDUP),
-[DUP ](https://forth-standard.org/standard/core/DUP),
-[- ](https://forth-standard.org/standard/core/Minus),
-[+ ](https://forth-standard.org/standard/core/Plus)
+[VALUE ](https://forth-standard.org/standard/core/VALUE),
+[TO ](https://forth-standard.org/standard/core/TO),
+[DEFER ](https://forth-standard.org/standard/core/DEFER),
+[BEGIN ](https://forth-standard.org/standard/core/BEGIN),
+[SPACES ](https://forth-standard.org/standard/core/SPACES),
+[SPACE ](https://forth-standard.org/standard/core/SPACE),
+[BL ](https://forth-standard.org/standard/core/BL),
+[PAD ](https://forth-standard.org/standard/core/PAD),
+[>IN ](https://forth-standard.org/standard/core/toIN),
+[BASE ](https://forth-standard.org/standard/core/BASE),
+[STATE ](https://forth-standard.org/standard/core/STATE),
+[CONSTANT ](https://forth-standard.org/standard/core/CONSTANT),
+[VARIABLE ](https://forth-standard.org/standard/core/VARIABLE),
+[SOURCE ](https://forth-standard.org/standard/core/SOURCE),
+[RECURSE ](https://forth-standard.org/standard/core/RECURSE),
+[EVALUATE ](https://forth-standard.org/standard/core/EVALUATE),
+[EXECUTE ](https://forth-standard.org/standard/core/EXECUTE),
+[>BODY ](https://forth-standard.org/standard/core/toBODY),
+[.( ](https://forth-standard.org/standard/core/Dotp),
+[( ](https://forth-standard.org/standard/core/p),
+[DECIMAL ](https://forth-standard.org/standard/core/DECIMAL),
+[HEX ](https://forth-standard.org/standard/core/HEX),
+[HERE ](https://forth-standard.org/standard/core/HERE),
+[FILL ](https://forth-standard.org/standard/core/FILL),
+[MOVE ](https://forth-standard.org/standard/core/MOVE),
+[+! ](https://forth-standard.org/standard/core/PlusStore),
+[[CHAR] ](https://forth-standard.org/standard/core/BracketCHAR),
+[CHAR ](https://forth-standard.org/standard/core/CHAR),
+[CELL+ ](https://forth-standard.org/standard/core/CELLPlus),
+[CELLS ](https://forth-standard.org/standard/core/CELLS),
+[CHAR+ ](https://forth-standard.org/standard/core/CHARPlus),
+[CHARS ](https://forth-standard.org/standard/core/CHARS),
+[ALIGN ](https://forth-standard.org/standard/core/ALIGN),
+[ALIGNED ](https://forth-standard.org/standard/core/ALIGNED),
+[2OVER ](https://forth-standard.org/standard/core/TwoOVER),
+[2SWAP ](https://forth-standard.org/standard/core/TwoSWAP),
+[2DROP ](https://forth-standard.org/standard/core/TwoDROP),
+[2DUP ](https://forth-standard.org/standard/core/TwoDUP),
+[2! ](https://forth-standard.org/standard/core/TwoStore),
+[2@ ](https://forth-standard.org/standard/core/TwoFetch),
+[R@ ](https://forth-standard.org/standard/core/RFetch),
+[ROT ](https://forth-standard.org/standard/core/ROT),
+[OVER ](https://forth-standard.org/standard/core/OVER),
+[*/ ](https://forth-standard.org/standard/core/TimesDiv),
+[*/MOD ](https://forth-standard.org/standard/core/TimesDivMOD),
+[MOD ](https://forth-standard.org/standard/core/MOD),
+[/ ](https://forth-standard.org/standard/core/Div),
+[/MOD ](https://forth-standard.org/standard/core/DivMOD),
+[* ](https://forth-standard.org/standard/core/Times),
+[FM/MOD ](https://forth-standard.org/standard/core/FMDivMOD),
+[ABS ](https://forth-standard.org/standard/core/ABS),
+[NEGATE ](https://forth-standard.org/standard/core/NEGATE),
+[SM/REM ](https://forth-standard.org/standard/core/SMDivREM),
+[UM/MOD ](https://forth-standard.org/standard/core/UMDivMOD),
+[M* ](https://forth-standard.org/standard/core/MTimes),
+[UM* ](https://forth-standard.org/standard/core/UMTimes),
+[2/ ](https://forth-standard.org/standard/core/TwoDiv),
+[2* ](https://forth-standard.org/standard/core/TwoTimes),
+[MIN ](https://forth-standard.org/standard/core/MIN),
+[MAX ](https://forth-standard.org/standard/core/MAX),
+[RSHIFT ](https://forth-standard.org/standard/core/RSHIFT),
+[LSHIFT ](https://forth-standard.org/standard/core/LSHIFT),
+[INVERT ](https://forth-standard.org/standard/core/INVERT),
+[1- ](https://forth-standard.org/standard/core/OneMinus),
+[1+ ](https://forth-standard.org/standard/core/OnePlus),
+[S>D ](https://forth-standard.org/standard/core/StoD),
+[XOR ](https://forth-standard.org/standard/core/XOR),
+[OR ](https://forth-standard.org/standard/core/OR),
+[AND ](https://forth-standard.org/standard/core/AND),
+[LEAVE ](https://forth-standard.org/standard/core/LEAVE),
+[UNLOOP ](https://forth-standard.org/standard/core/UNLOOP),
+[J ](https://forth-standard.org/standard/core/J),
+[I ](https://forth-standard.org/standard/core/I),
+[+LOOP ](https://forth-standard.org/standard/core/PlusLOOP),
+[LOOP ](https://forth-standard.org/standard/core/LOOP),
+[DO ](https://forth-standard.org/standard/core/DO),
+[REPEAT ](https://forth-standard.org/standard/core/REPEAT),
+[WHILE ](https://forth-standard.org/standard/core/WHILE),
+[AGAIN ](https://forth-standard.org/standard/core/AGAIN),
+[UNTIL ](https://forth-standard.org/standard/core/UNTIL),
+[THEN ](https://forth-standard.org/standard/core/THEN),
+[ELSE ](https://forth-standard.org/standard/core/ELSE),
+[IF ](https://forth-standard.org/standard/core/IF),
+[> ](https://forth-standard.org/standard/core/more),
+[< ](https://forth-standard.org/standard/core/less),
+[U< ](https://forth-standard.org/standard/core/Uless),
+[= ](https://forth-standard.org/standard/core/Equal),
+[0< ](https://forth-standard.org/standard/core/Zeroless),
+[0= ](https://forth-standard.org/standard/core/ZeroEqual),
+[C, ](https://forth-standard.org/standard/core/CComma),
+[C! ](https://forth-standard.org/standard/core/CStore),
+[C@ ](https://forth-standard.org/standard/core/CFetch),
+[R> ](https://forth-standard.org/standard/core/Rfrom),
+[>R ](https://forth-standard.org/standard/core/toR),
+[NIP ](https://forth-standard.org/standard/core/NIP),
+[DROP ](https://forth-standard.org/standard/core/DROP),
+[SWAP ](https://forth-standard.org/standard/core/SWAP),
+[DEPTH ](https://forth-standard.org/standard/core/DEPTH),
+[EXIT ](https://forth-standard.org/standard/core/EXIT),
+[?DUP ](https://forth-standard.org/standard/core/qDUP),
+[DUP ](https://forth-standard.org/standard/core/DUP),
+[- ](https://forth-standard.org/standard/core/Minus),
+[+ ](https://forth-standard.org/standard/core/Plus),
+[CR ](https://forth-standard.org/standard/core/CR).
### FIXPOINT
- S>F F. F* F#S F/ F- F+
- HOLDS {FIXPOINT}
+S>F,
+F.,
+F*,
+F#S,
+F/,
+F-,
+F+,
+[HOLDS ](https://forth-standard.org/standard/core/HOLDS).
S>F u/n -- Qlo Qhi convert u/n in a Q15.16 value
F. display a Q15.16 value
F/ Q15.16 division
F- Q15.16 soustraction
F+ Q15.16 addition
- HOLDS https://forth-standard.org/standard/core/HOLDS
### UTILITY
- DUMP U.R WORDS ? .RS .S {TOOLS}
-
[DUMP ](https://forth-standard.org/standard/tools/DUMP),
[U.R ](https://forth-standard.org/standard/core/UDotR),
-[WORDS ](https://forth-standard.org/standard/tools/WORDS),
+[WORDS ](https://forth-standard.org/standard/tools/WORDS),
[? ](https://forth-standard.org/standard/tools/q),
[.S ](https://forth-standard.org/standard/tools/DotS),
+.RS.
.RS displays Return Stack content
### SD_TOOLS
- DIR FAT CLUSTER SECTOR {SD_TOOLS}
-
DIR dump first sector of current directory
FAT dump first sector of FAT1
- CLUSTER .123 CLUSTER displays first sector of cluster 123
- SECTOR .123456789 SECTOR displays sector 123456789
+ CLUSTER. .123 CLUSTER. displays first sector of cluster 123
+ SECTOR. .123456789 SECTOR. displays sector 123456789
### DOUBLE word set
First search from ti.com: [MSP430Flasher](http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430Flasher/latest/index_FDS.html)
untar in a home folder then:
+* set executable flag in permission of this file
* open MSPFlasher-1.3.16-linux-x64-installer.run
* install in MSP430Flasher (under home)
-# SciTEDirectoriy.properties\r
+# SciTEDirectory.properties\r
# For Windows, place in your directory project folder\r
# Documentation at http://www.scintilla.org/SciTEDoc.html\r
\r
-# Globals\r
-buffers.zorder.switching=1\r
+# # Globals\r
+# \r
+# PLAT_WIN=1\r
+# PLAT_GTK=0\r
+# position.maximize=1\r
+# \r
+# save.session=1\r
+# save.recent=1\r
+# save.session=1\r
+# session.bookmarks=1\r
+# \r
+# buffers.zorder.switching=1\r
+# properties.directory.enable=1\r
+# check.if.already.open=1\r
+\r
+\r
+# \r
+# # Window sizes and visibility\r
+# if PLAT_WIN\r
+# position.left=-1\r
+# position.top=0\r
+# if PLAT_GTK\r
+# position.left=5\r
+# position.top=22\r
+# \r
+# position.width=1000\r
+# position.height=768\r
+# position.maximize=1\r
+# #position.tile=1\r
+# #full.screen.hides.menu=1\r
+# minimize.to.tray=0\r
+# split.vertical=1\r
+# output.horizontal.size=400\r
+# output.vertical.size=600\r
+# output.initial.hide=1\r
+# #horizontal.scrollbar=0\r
+# #horizontal.scroll.width=10000\r
+# #horizontal.scroll.width.tracking=0\r
+# #output.horizontal.scrollbar=0\r
+# #output.horizontal.scroll.width=10000\r
+# #output.horizontal.scroll.width.tracking=0\r
+# #output.scroll=0\r
+# error.select.line=1\r
+# #end.at.last.line=0\r
+# tabbar.visible=1\r
+# #tabbar.hide.one=1\r
+# tabbar.multiline=0\r
+# toolbar.large=1\r
+# toolbar.visible=1\r
+# #toolbar.detachable=1\r
+# #toolbar.usestockicons=1\r
+# #menubar.detachable=1\r
+# #undo.redo.lazy=1\r
+# statusbar.visible=1\r
+# #fileselector.width=800\r
+# #fileselector.height=600\r
+# #fileselector.show.hidden=1\r
+# magnification=0\r
+# output.magnification=-4\r
+# \r
+# # Sizes and visibility in edit pane\r
+# line.margin.visible=1\r
+# line.margin.width=4\r
+# margin.width=16\r
+# fold.margin.width=0\r
+# #fold.margin.colour=#00FF00\r
+# #fold.margin.highlight.colour=#0000FF\r
+# blank.margin.left=20\r
+# #blank.margin.right=4\r
+# buffered.draw=1\r
+# #two.phase.draw=0\r
+# use.palette=0\r
+\r
+\r
+# #Element styles\r
+# \r
+# #view.eol=1\r
+# #control.char.symbol=. \r
+# caret.period=500\r
+# view.whitespace=0\r
+# view.indentation.whitespace=1\r
+# view.indentation.guides=0\r
+# view.indentation.examine=3\r
+# highlight.indentation.guides=1\r
+# caret.fore=#FF0000\r
+# #caret.additional.blinks=0\r
+# caret.width=3\r
+# caret.line.back=#222222\r
+# calltip.back=#FFF0FE\r
\r
-# Window sizes and visibility\r
-#if PLAT_WIN\r
-# position.left=-1\r
-# position.top=0\r
-#if PLAT_GTK\r
-# position.left=5\r
-# position.top=22\r
-#position.width=-1\r
-#position.height=-1\r
-#position.maximize=1\r
-#position.tile=1\r
-#full.screen.hides.menu=1\r
-minimize.to.tray=0\r
-split.vertical=1\r
-output.horizontal.size=400\r
-output.vertical.size=600\r
-output.initial.hide=1\r
-#horizontal.scrollbar=0\r
-#horizontal.scroll.width=10000\r
-#horizontal.scroll.width.tracking=0\r
-#output.horizontal.scrollbar=0\r
-#output.horizontal.scroll.width=10000\r
-#output.horizontal.scroll.width.tracking=0\r
-#output.scroll=0\r
-error.select.line=1\r
-#end.at.last.line=0\r
-tabbar.visible=1\r
-#tabbar.hide.one=1\r
-tabbar.multiline=0\r
-toolbar.visible=1\r
-#toolbar.detachable=1\r
-#toolbar.usestockicons=1\r
-#menubar.detachable=1\r
-#undo.redo.lazy=1\r
-statusbar.visible=1\r
-#fileselector.width=800\r
-#fileselector.height=600\r
-#fileselector.show.hidden=1\r
-magnification=0\r
-output.magnification=-4\r
-\r
-# Sizes and visibility in edit pane\r
-line.margin.visible=1\r
-line.margin.width=4\r
-margin.width=16\r
-fold.margin.width=0\r
-#fold.margin.colour=#00FF00\r
-#fold.margin.highlight.colour=#0000FF\r
-blank.margin.left=20\r
-#blank.margin.right=4\r
-buffered.draw=1\r
-#two.phase.draw=0\r
-use.palette=0\r
-\r
-\r
-#Element styles\r
-\r
-\r
-#view.eol=1\r
-#control.char.symbol=. \r
-caret.period=500\r
-view.whitespace=0\r
-view.indentation.whitespace=1\r
-view.indentation.guides=0\r
-view.indentation.examine=3\r
-highlight.indentation.guides=1\r
-caret.fore=#FF0000\r
-#caret.additional.blinks=0\r
-caret.width=3\r
-caret.line.back=#222222\r
-calltip.back=#FFF0FE\r
edge.column=80\r
edge.mode=1\r
edge.colour=#404040\r
+\r
braces.check=1\r
braces.sloppy=1\r
\r
# black background\r
-selection.fore=#000000\r
-selection.alpha=256\r
-selection.back=#808080\r
+selection.fore=#FFFFFF\r
+#selection.alpha=256\r
+selection.back=#808080A0\r
#selection.additional.fore=#0000A0\r
#selection.additional.back=#000080\r
#selection.additional.alpha=20\r
#indicators.under=1\r
\r
\r
-# Scripting\r
-ext.lua.startup.script=$(SciteUserHome)/SciTEStartup.lua\r
-ext.lua.auto.reload=1\r
-#ext.lua.reset=1\r
-\r
\r
# Checking\r
are.you.sure=1\r
#save.on.deactivate=1\r
are.you.sure.on.reload=1\r
reload.preserves.undo=1\r
-check.if.already.open=1\r
+#check.if.already.open=1\r
#temp.files.sync.load=1\r
default.file.ext=.txt\r
#source.default.extensions=.h|.cxx|.bat\r
title.full.path=1\r
title.show.buffers=1\r
pathbar.visible=1\r
-#save.session=1\r
#save.recent=1\r
#save.session=1\r
#session.bookmarks=1\r
#visible.policy.lines=4\r
#time.commands=1\r
#caret.sticky=1\r
-properties.directory.enable=1\r
+#properties.directory.enable=1\r
\r
# Status Bar\r
statusbar.number=4\r
-statusbar.text.2=\\r
-li=$(LineNumber) co=$(ColumnNumber) $(OverType) ($(EOLMode)) $(FileAttr)\r
statusbar.text.1=\\r
+li=$(LineNumber) co=$(ColumnNumber) $(OverType) ($(EOLMode)) $(FileAttr)\r
+statusbar.text.2=\\r
$(BufferLength) chars in $(NbOfLines) lines. Sel: $(SelHeight) lines, $(SelLength) chars.\r
statusbar.text.3=\\r
Now is: Date=$(CurrentDate) Time=$(CurrentTime)\r
$(FileNameExt) : $(FileDate) \97 $(FileTime) | $(FileAttr)\r
\r
if PLAT_WIN\r
- command.scite.help="https://www.scintilla.org/SciTEDoc.html"\r
- command.scite.help.subsystem=2\r
+ command.scite.help=C:\Program Files\SRWare Iron\iron.exe "C:\Program Files\SciTE\SciTEDoc.html"\r
+ command.scite.help.subsystem=2\r
if PLAT_GTK\r
- command.print.*=a2ps "$(FileNameExt)"\r
- command.scite.help=file://$(SciteDefaultHome)/SciTEDoc.html\r
-\r
-# Internationalisation\r
-# Japanese input code page 932 and ShiftJIS character set 128\r
-#code.page=932\r
-#character.set=128\r
-# Unicode\r
-#code.page=65001\r
-code.page=0\r
-#character.set=204\r
-# Required for Unicode to work on GTK+:\r
-#LC_CTYPE=en_US.UTF-8\r
-if PLAT_GTK\r
- output.code.page=65001\r
-if PLAT_MAC\r
- output.code.page=65001\r
-\r
-# Export\r
-#export.keep.ext=1\r
-export.html.wysiwyg=1\r
-#export.html.tabs=1\r
-#export.html.folding=1\r
-export.html.styleused=1\r
-export.html.title.fullpath=1\r
-#export.rtf.tabs=1\r
-#export.rtf.font.face=Arial\r
-#export.rtf.font.size=9\r
-#export.rtf.tabsize=8\r
-#export.rtf.wysiwyg=0\r
-#export.tex.title.fullpath=1\r
-# Magnification (added to default screen font size)\r
-export.pdf.magnification=-2\r
-# Font: Courier, Helvetica or Times (Courier line-wraps)\r
-export.pdf.font=Courier\r
-# Page size (in points): width, height\r
-# E.g. Letter 612,792; A4 595,842; maximum 14400,14400\r
-#export.pdf.pagesize=595,842\r
-export.pdf.pagesize=842,595\r
-# Margins (in points): left, right, top, bottom\r
-export.pdf.margins=28,28,28,28\r
-export.xml.collapse.spaces=1\r
-export.xml.collapse.lines=1\r
+ command.print.*=a2ps "$(FileNameExt)"\r
+ command.scite.help=xdg-open "file://$(SciteDefaultHome)/SciTEDoc.html"\r
+ \r
+# # Internationalisation\r
+# # Japanese input code page 932 and ShiftJIS character set 128\r
+# #code.page=932\r
+# #character.set=128\r
+# # Unicode\r
+# #code.page=65001\r
+# code.page=0\r
+# #character.set=204\r
+# # Required for Unicode to work on GTK+:\r
+# #LC_CTYPE=en_US.UTF-8\r
+# if PLAT_GTK\r
+# output.code.page=65001\r
+# if PLAT_MAC\r
+# output.code.page=65001\r
+\r
+# # Export\r
+# #export.keep.ext=1\r
+# export.html.wysiwyg=1\r
+# #export.html.tabs=1\r
+# #export.html.folding=1\r
+# export.html.styleused=1\r
+# export.html.title.fullpath=1\r
+# #export.rtf.tabs=1\r
+# #export.rtf.font.face=Arial\r
+# #export.rtf.font.size=9\r
+# #export.rtf.tabsize=8\r
+# #export.rtf.wysiwyg=0\r
+# #export.tex.title.fullpath=1\r
+# # Magnification (added to default screen font size)\r
+# export.pdf.magnification=0\r
+# # Font: Courier, Helvetica or Times (Courier line-wraps)\r
+# export.pdf.font=Courier\r
+# # Page size (in points): width, height\r
+# # E.g. Letter 612,792; A4 595,842; maximum 14400,14400\r
+# export.pdf.pagesize=595,842\r
+# # Margins (in points): left, right, top, bottom\r
+# export.pdf.margins=56,28,28,28\r
+# export.xml.collapse.spaces=1\r
+# export.xml.collapse.lines=1\r
\r
# Define values for use in the imported properties files\r
chars.alpha=abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ\r
-chars.numeric=0123456789ABCDEFabcdefx\r
+chars.numeric=0123456789ABCDEFabcdef\r
chars.accented=\8a\9a\8c\9c\9fÿÀàÁáÂâÃãÄäÅåÆæÇçÈèÉéÊêËëÌìÍíÎîÏïÐðÑñÒòÓóÔôÕõÖØøÙùÚúÛûÜüÝýÞþßö\r
# This is a better set for Russian:\r
#chars.accented=ÀàÁáÂâÃãÄäÅ娸ÆæÇçÈèÉéÊêËëÌìÍíÎîÏïÐðÑñÒòÓóÔôÕõÖö×÷ØøÙùÚúÛûÜüÝýÞþßÿ\r
#save.filter=$(open.filter)\r
\r
# Give symbolic names to the set of fonts used in the standard styles.\r
-if PLAT_WIN\r
- font.base=font:Lucida Console,size:10\r
- font.small=font:Lucida Console,size:10\r
- font.comment=font:Lucida Console,size:10\r
- font.code.comment.box=$(font.comment)\r
- font.code.comment.line=$(font.comment)\r
- font.code.comment.doc=$(font.comment)\r
- font.code.comment.nested=$(font.comment)\r
- font.text=font:Lucida Console,size:10\r
- font.text.comment=font:Lucida Console,size:10\r
- font.embedded.base=font:Lucida Console,size:10\r
- font.embedded.comment=font:Lucida Console,size:10\r
- font.monospace=font:Lucida Console,size:10\r
- font.vbs=font:Lucida Sans Unicode,size:10\r
-\r
-if PLAT_GTK\r
- font.base=font:Bitstream Vera Sans Mono,size:10\r
- font.small=font:Bitstream Vera Sans Mono,size:10\r
- font.comment=font:Bitstream Vera Sans Mono,size:10\r
- font.code.comment.box=$(font.comment)\r
- font.code.comment.line=$(font.comment)\r
- font.code.comment.doc=$(font.comment)\r
- font.code.comment.nested=$(font.comment)\r
- font.text=font:Bitstream Vera Sans Mono,size:10\r
- font.text.comment=font:Bitstream Vera Sans Mono,size:10\r
- font.embedded.base=font:Bitstream Vera Sans Mono,size:10\r
- font.embedded.comment=font:Bitstream Vera Sans Mono,size:10\r
- font.monospace=font:Bitstream Vera Sans Mono,size:10\r
- font.vbs=font:Bitstream Vera Sans Mono,size:10\r
-\r
-if PLAT_MAC\r
- font.base=font:Verdana,size:12\r
- font.small=font:Verdana,size:10\r
- font.comment=font:Georgia,size:13\r
- font.code.comment.box=$(font.comment)\r
- font.code.comment.line=$(font.comment)\r
- font.code.comment.doc=$(font.comment)\r
- font.code.comment.nested=$(font.comment)\r
- font.text=font:Times New Roman,size:13\r
- font.text.comment=font:Verdana,size:11\r
- font.embedded.base=font:Verdana,size:11\r
- font.embedded.comment=font:Comic Sans MS,size:10\r
- font.monospace=font:Courier New,size:12\r
- font.vbs=font:Lucida Sans Unicode,size:12\r
- font.js=$(font.comment)\r
+#if PLAT_WIN\r
+# font.base=font:Lucida Console,size:10\r
+# font.small=font:Lucida Console,size:10\r
+# font.comment=font:Lucida Console,size:10\r
+# font.code.comment.box=$(font.comment)\r
+# font.code.comment.line=$(font.comment)\r
+# font.code.comment.doc=$(font.comment)\r
+# font.code.comment.nested=$(font.comment)\r
+# font.text=font:Lucida Console,size:10\r
+# font.text.comment=font:Lucida Console,size:10\r
+# font.embedded.base=font:Lucida Console,size:10\r
+# font.embedded.comment=font:Lucida Console,size:10\r
+# font.monospace=font:Lucida Console,size:10\r
+# font.vbs=font:Lucida Sans Unicode,size:10\r
+#if PLAT_GTK\r
+# font.base=font:Bitstream Vera Sans Mono,size:10\r
+# font.small=font:Bitstream Vera Sans Mono,size:10\r
+# font.comment=font:Bitstream Vera Sans Mono,size:10\r
+# font.code.comment.box=$(font.comment)\r
+# font.code.comment.line=$(font.comment)\r
+# font.code.comment.doc=$(font.comment)\r
+# font.code.comment.nested=$(font.comment)\r
+# font.text=font:Bitstream Vera Sans Mono,size:10\r
+# font.text.comment=font:Bitstream Vera Sans Mono,size:10\r
+# font.embedded.base=font:Bitstream Vera Sans Mono,size:10\r
+# font.embedded.comment=font:Bitstream Vera Sans Mono,size:10\r
+# font.monospace=font:Bitstream Vera Sans Mono,size:10\r
+# font.vbs=font:Bitstream Vera Sans Mono,size:10\r
+#if PLAT_MAC\r
+# font.base=font:Verdana,size:12\r
+# font.small=font:Verdana,size:10\r
+# font.comment=font:Georgia,size:13\r
+# font.code.comment.box=$(font.comment)\r
+# font.code.comment.line=$(font.comment)\r
+# font.code.comment.doc=$(font.comment)\r
+# font.code.comment.nested=$(font.comment)\r
+# font.text=font:Times New Roman,size:13\r
+# font.text.comment=font:Verdana,size:11\r
+# font.embedded.base=font:Verdana,size:11\r
+# font.embedded.comment=font:Comic Sans MS,size:10\r
+# font.monospace=font:Courier New,size:12\r
+# font.vbs=font:Lucida Sans Unicode,size:12\r
+# font.js=$(font.comment)\r
\r
# Old GTK+ font settings are faster but not antialiased\r
#~ font.base=font:lucidatypewriter,size:12\r
#~ font.monospace=font:courier,size:12\r
#~ font.vbs=font:new century schoolbook,size:12\r
\r
-# Give symbolic names to the set of colours used in the standard styles.\r
-colour.code.comment.box=fore:#00FF00\r
-colour.code.comment.line=fore:#00FF00\r
-colour.code.comment.doc=fore:#3F703F\r
-colour.code.comment.nested=fore:#A0C0A0\r
-colour.text.comment=fore:#0000FF,back:#FFFFFF\r
-colour.other.comment=fore:#00FF00\r
-colour.embedded.comment=back:#E0EEFF\r
-colour.embedded.js=back:#F0F0FF\r
-colour.notused=back:#FF0000\r
-#couleur des nombres\r
-colour.number=fore:#FF00FF\r
-#couleur des instructions du langage\r
-colour.keyword=fore:#FF0000\r
-#couleur chaînes entre guillemets\r
-colour.string=fore:#00FFFF\r
-colour.char=fore:#7F7F7F\r
-colour.operator=fore:#00FF00\r
-colour.preproc=fore:#FF7F00\r
-colour.error=fore:#FFFF00,back:#FF0000\r
-\r
-# Global default styles for all languages\r
-# Default style, black background\r
-style.*.32=back:#000000,fore:#FFFFFF,font:Lucida Console,size:10\r
-# Line number\r
-style.*.33=back:#404040,$(font.base))\r
-# Brace highlight\r
-style.*.34=back:#222222,fore:#8080FF,bold\r
-# Brace incomplete highlight\r
-style.*.35=back:#222222,fore:#FF0000,bold\r
-# Control characters\r
-style.*.36=\r
-# Indentation guides\r
-style.*.37=fore:#C0C0C0,back:#FFFFFF\r
-\r
-# Printing - only works on Windows\r
-if PLAT_WIN\r
- #print.colour.mode=1\r
- print.magnification=-1\r
- # Setup: left, right, top, bottom margins, in local units:\r
- # hundredths of millimeters or thousandths of inches\r
- print.margins=2000,1000,1000,1000\r
- # Header/footer:\r
- # && = &; &p = current page\r
- # &f = file name; &F = full path\r
- # &d = file date; &D = current date\r
- # &t = file time; &T = full time\r
- print.header.format=$(FileNameExt) \97 Printed on $(CurrentDate), $(CurrentTime) \97 Page $(CurrentPage)\r
- print.footer.format=$(FilePath) \97 File date: $(FileDate) \97 File time: $(FileTime)\r
- # Header/footer style\r
- print.header.style=font:Arial,size:12,bold\r
- print.footer.style=font:Arial Narrow,size:10,italics\r
+## Give symbolic names to the set of colours used in the standard styles.\r
+#colour.code.comment.box=fore:#00FF00\r
+#colour.code.comment.line=fore:#00FF00\r
+#colour.code.comment.doc=fore:#3F703F\r
+#colour.code.comment.nested=fore:#A0C0A0\r
+#colour.text.comment=fore:#0000FF,back:#FFFFFF\r
+#colour.other.comment=fore:#00FF00\r
+#colour.embedded.comment=back:#E0EEFF\r
+#colour.embedded.js=back:#F0F0FF\r
+#colour.notused=back:#FF0000\r
+##couleur des nombres\r
+#colour.number=fore:#FF00FF\r
+##couleur des instructions du langage\r
+#colour.keyword=fore:#FF0000\r
+##couleur chaînes entre guillemets\r
+#colour.string=fore:#00FFFF\r
+#colour.char=fore:#7F7F7F\r
+#colour.operator=fore:#00FF00\r
+#colour.preproc=fore:#FF7F00\r
+#colour.error=fore:#FFFF00,back:#FF0000\r
+#\r
+# command or return status\r
+## Global default styles for all languages\r
+## Default style, black background\r
+#style.*.32=back:#000000,fore:#FFFFFF,font:Lucida Console,size:10\r
+## Line number\r
+#style.*.33=back:#404040,$(font.base))\r
+## Brace highlight\r
+#style.*.34=back:#222222,fore:#8080FF,bold\r
+## Brace incomplete highlight\r
+#style.*.35=back:#222222,fore:#FF0000,bold\r
+## Control characters\r
+#style.*.36=\r
+## Indentation guides\r
+#style.*.37=fore:#C0C0C0,back:#FFFFFF\r
+\r
+## Printing - only works on Windows\r
+#if PLAT_WIN\r
+# #print.colour.mode=1\r
+# print.magnification=-1\r
+# # Setup: left, right, top, bottom margins, in local units:\r
+# # hundredths of millimeters or thousandths of inches\r
+# print.margins=2000,1000,1000,1000\r
+# # Header/footer:\r
+# # && = &; &p = current page\r
+# # &f = file name; &F = full path\r
+# # &d = file date; &D = current date\r
+# # &t = file time; &T = full time\r
+# print.header.format=$(FileNameExt) \97 Printed on $(CurrentDate), $(CurrentTime) \97 Page $(CurrentPage)\r
+# print.footer.format=$(FilePath) \97 File date: $(FileDate) \97 File time: $(FileTime)\r
+# # Header/footer style\r
+# print.header.style=font:Arial,size:12,bold\r
+# print.footer.style=font:Arial Narrow,size:10,italics\r
\r
# Warnings - only works on Windows and needs to be pointed at files on machine\r
#if PLAT_WIN\r
\r
menu.language=\\r
Text|txt|Shift+F11|\\r
+#Ada|ads||\\r
+#Apache Confi&g|conf||\\r
+Assembler|asm||\\r
+#ASN.1|asn1||\\r
+#Avenue|ave||\\r
+#Baan|bc||\\r
&Batch|bat||\\r
+#Bullant|ant||\\r
+#&C / C++|c||\\r
+#CMake|cmake||\\r
+#C&#|cs||\\r
+#COBOL|cob||\\r
+#Csound|orc||\\r
+#CSS|css||\\r
+#D|d||\\r
&Difference|diff||\\r
+#&Eiffel|e||\\r
+#Erlang|erl||\\r
&Errorlist|err||\\r
+#FlagShip|prg||\\r
+Forth|forth||\\r
+&Fortran|f90||\\r
+#Gap|g||\\r
+#Haskell|hs||\\r
H&ypertext|html|F12|\\r
+#&InnoSetup|iss||\\r
+#&Java|java||\\r
+#Java&Script|js||\\r
+#&Kix|kix||\\r
+#Lisp|lisp||\\r
+#Lot|lot||\\r
+#Lout|lt||\\r
+#Lu&a|lua||\\r
+#Matlab|m.matlab||\\r
&Makefile|mak|Ctrl+Shift+F11|\\r
+#MetaPost|mp||\\r
+#MMIXAL|mms||\\r
+#Modula-3|m3||\\r
+#&nnCron crontab|tab||\\r
+#NSIS|nsis||\\r
+#Objective Caml|ml||\\r
+#Octave|m.octave||\\r
+#Opal|impl||\\r
+#Pascal|pas||\\r
+#Pe&rl|pl||\\r
+#P&HP|php||\\r
+#P&LSQL|spec||\\r
+#P&ostScript|ps||\\r
+#P&OV-Ray SDL|pov||\\r
+#PowerShell|ps1||\\r
+#PowerPro|powerpro||\\r
&Properties|properties||\\r
+#Pytho&n|py||\\r
+#R|R||\\r
+#Reso&urce|rc||\\r
+#Ruby|rb||\\r
+#Shell|sh||\\r
+#S&QL|sql||\\r
+#Specman|e||\\r
+#&TCL|tcl||\\r
+#TeX|tex||\\r
+#&txt2tags|t2t||\\r
+#&VB|vb||\\r
+#VBScr&ipt|vbs||\\r
+#Verilog|v||\\r
+#VHDL|vhd||\\r
+#&XML|xml|$(keyXML)|\\r
+#YAML|yaml||\r
\r
# User defined key commands\r
user.shortcuts=\\r
#Next File|IDM_NEXTFILE|\\r
#Prev File|IDM_PREVFILE|\r
\r
-if PLAT_WIN\r
- import \config\asm\r
- import \config\forth\r
- import \config\fortran\r
- import \config\hex\r
- import \config\others\r
-if PLAT_GTK\r
-FF=$HOME/CloudStation/projets/msp430\r
-export FF\r
-PATH=/usr/local/MSPFlasher:$PATH\r
-export PATH\r
-# import /home/thoorens/CloudStation/projets/msp430/config/asm\r
-# import /home/thoorens/CloudStation/projets/msp430/config/forth\r
-# import /home/thoorens/CloudStation/projets/msp430/config/fortran\r
-# import /home/thoorens/CloudStation/projets/msp430/config/hex\r
-# import /home/thoorens/CloudStation/projets/msp430/config/others\r
-\r
-\r
-\r
+#if PLAT_WIN\r
+import A:\projets\msp430\config\asm\r
+import A:\projets\msp430\config\forth\r
+import A:\projets\msp430\config\fortran\r
+import A:\projets\msp430\config\hex\r
+import A:\projets\msp430\config\others\r
import Z:\config\asm\r
import Z:\config\forth\r
import Z:\config\fortran\r
import Z:\config\hex\r
import Z:\config\others\r
\r
+#if PLAT_GTK\r
import /home/thoorens/CloudStation/projets/msp430/config/asm\r
import /home/thoorens/CloudStation/projets/msp430/config/forth\r
import /home/thoorens/CloudStation/projets/msp430/config/fortran\r
import /home/thoorens/CloudStation/projets/msp430/config/hex\r
import /home/thoorens/CloudStation/projets/msp430/config/others\r
\r
-# Error list styles\r
-\r
-style.errorlist.32=fore:#B0B000,$(font.small)\r
-# Default\r
-style.errorlist.0=fore:#FFFFFF\r
-# Microsoft Error\r
-style.errorlist.3=fore:#0080FF\r
-# command or return status\r
-style.errorlist.4=fore:#FF00FF\r
-\r
-# Text matched with find in files and message part of GCC errors\r
-style.errorlist.21=fore:#FF0000\r
+import /home/jean_mi/CloudStation/projets/msp430/config/asm\r
+import /home/jean_mi/CloudStation/projets/msp430/config/forth\r
+import /home/jean_mi/CloudStation/projets/msp430/config/fortran\r
+import /home/jean_mi/CloudStation/projets/msp430/config/hex\r
+import /home/jean_mi/CloudStation/projets/msp430/config/others\r
\r
\r
\r
--- /dev/null
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-@FF80
-FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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-02 82 02 82 02 82 02 82 02 82 02 82 02 82 1A 8D
-q
+++ /dev/null
-Fri Nov 6 19:33:33 2020: * -----/|-------------------------------------------------------------------- *
-Fri Nov 6 19:33:33 2020: * / |__ *
-Fri Nov 6 19:33:33 2020: * /_ / MSP Flasher v1.3.20 *
-Fri Nov 6 19:33:33 2020: * | / *
-Fri Nov 6 19:33:33 2020: * -----|/-------------------------------------------------------------------- *
-Fri Nov 6 19:33:33 2020: *
-Fri Nov 6 19:33:33 2020: * Evaluating triggers...done
-Fri Nov 6 19:33:34 2020: * Checking for available FET debuggers:
-Fri Nov 6 19:33:34 2020: * Found USB FET @ COM11 <- Selected
-Fri Nov 6 19:33:34 2020: * Initializing interface @ COM11...done
-Fri Nov 6 19:33:35 2020: * Checking firmware compatibility:
-Fri Nov 6 19:33:35 2020: * FET firmware is up to date.
-Fri Nov 6 19:33:35 2020: * Reading FW version...
-Fri Nov 6 19:33:35 2020: * Debugger does not support target voltages other than 3000 mV!
-Fri Nov 6 19:33:35 2020: * Setting VCC to 3000 mV...done
-Fri Nov 6 19:33:35 2020: * Accessing device...done
-Fri Nov 6 19:33:35 2020: * Reading device information...
-Fri Nov 6 19:33:35 2020: * Warning: Found device does not match -n selection:
-Fri Nov 6 19:33:35 2020: - Selected: MSP430FR6989
-Fri Nov 6 19:33:35 2020: - Found: MSP430FR5994
-Fri Nov 6 19:33:35 2020: - Continue? (Y/N): Fri Nov 6 19:33:41 2020: n
-Fri Nov 6 19:33:41 2020: * Resetting device (RST/NMI)...done
-Fri Nov 6 19:33:42 2020: * Starting target code execution...done
-Fri Nov 6 19:33:43 2020: * Disconnecting from device...done
-Fri Nov 6 19:33:43 2020: *
-Fri Nov 6 19:33:43 2020: * ----------------------------------------------------------------------------
-Fri Nov 6 19:33:43 2020: * Driver : closed (No error)
-Fri Nov 6 19:33:43 2020: * ----------------------------------------------------------------------------
-Fri Nov 6 19:33:43 2020: */
-Fri Nov 6 19:33:53 2020: * -----/|-------------------------------------------------------------------- *
-Fri Nov 6 19:33:53 2020: * / |__ *
-Fri Nov 6 19:33:53 2020: * /_ / MSP Flasher v1.3.20 *
-Fri Nov 6 19:33:53 2020: * | / *
-Fri Nov 6 19:33:53 2020: * -----|/-------------------------------------------------------------------- *
-Fri Nov 6 19:33:53 2020: *
-Fri Nov 6 19:33:53 2020: * Evaluating triggers...done
-Fri Nov 6 19:33:53 2020: * Checking for available FET debuggers:
-Fri Nov 6 19:33:53 2020: * Found USB FET @ COM11 <- Selected
-Fri Nov 6 19:33:53 2020: * Initializing interface @ COM11...done
-Fri Nov 6 19:33:54 2020: * Checking firmware compatibility:
-Fri Nov 6 19:33:54 2020: * FET firmware is up to date.
-Fri Nov 6 19:33:54 2020: * Reading FW version...
-Fri Nov 6 19:33:54 2020: * Debugger does not support target voltages other than 3000 mV!
-Fri Nov 6 19:33:54 2020: * Setting VCC to 3000 mV...done
-Fri Nov 6 19:33:54 2020: * Accessing device...done
-Fri Nov 6 19:33:54 2020: * Reading device information...done
-Fri Nov 6 19:33:54 2020: * Loading file into device...done
-Fri Nov 6 19:33:56 2020: * Verifying memory (B:\binaries\MSP_EXP430FR5994_16MHz_I2C.txt)...done
-Fri Nov 6 19:33:58 2020: *
-Fri Nov 6 19:33:58 2020: * ----------------------------------------------------------------------------
-Fri Nov 6 19:33:58 2020: * Arguments : -s -m SBW2 -n MSP430FR5994 -v -w B:\binaries\MSP_EXP430FR5994_16MHz_I2C.txt -z [RESET,VCC]
-Fri Nov 6 19:33:58 2020: * ----------------------------------------------------------------------------
-Fri Nov 6 19:33:58 2020: * Driver : loaded
-Fri Nov 6 19:33:58 2020: * Dll Version : 31400000
-Fri Nov 6 19:33:58 2020: * FwVersion : 31200000
-Fri Nov 6 19:33:58 2020: * Interface : TIUSB
-Fri Nov 6 19:33:58 2020: * HwVersion : E 4.0
-Fri Nov 6 19:33:58 2020: * JTAG Mode : AUTO
-Fri Nov 6 19:33:58 2020: * Device : MSP430FR5994
-Fri Nov 6 19:33:58 2020: * EEM : Level 5, ClockCntrl 2
-Fri Nov 6 19:33:58 2020: * Erase Mode : ERASE_ALL
-Fri Nov 6 19:33:58 2020: * Prog.File : B:\binaries\MSP_EXP430FR5994_16MHz_I2C.txt
-Fri Nov 6 19:33:58 2020: * Verified : TRUE
-Fri Nov 6 19:33:58 2020: * BSL Unlock : FALSE
-Fri Nov 6 19:33:58 2020: * InfoA Access: FALSE
-Fri Nov 6 19:33:58 2020: * VCC ON : 3000 mV
-Fri Nov 6 19:33:58 2020: * ----------------------------------------------------------------------------
-Fri Nov 6 19:33:58 2020: * Resetting device (RST/NMI)...done
-Fri Nov 6 19:33:59 2020: * Starting target code execution...done
-Fri Nov 6 19:33:59 2020: * Disconnecting from device...done
-Fri Nov 6 19:33:59 2020: *
-Fri Nov 6 19:33:59 2020: * ----------------------------------------------------------------------------
-Fri Nov 6 19:33:59 2020: * Driver : closed (No error)
-Fri Nov 6 19:33:59 2020: * ----------------------------------------------------------------------------
-Fri Nov 6 19:33:59 2020: */
--- /dev/null
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--- /dev/null
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-6E 4E 1E 53 1E B3 82 6E C6 1D 3E 4F 3D 41 30 4D
-D4 48 82 2E 22 00 0D 12 84 12 E4 48 0A 44 5C 47
-5A 4B 60 48 18 46 04 57 4F 52 44 00 3C 40 C0 1D
-39 4C 3A 4C 09 5A 3A 5C 28 4C 09 9A 1D 24 7E 9A
-FC 27 1A 83 3B 40 60 00 15 42 B4 1D FA 90 27 00
-00 00 01 20 05 43 C8 4C 00 00 09 9A 0B 24 7C 4A
-4E 9C 08 24 18 53 4B 9C F6 2F 7C 90 7B 00 F3 2F
-4C 85 F1 3F 35 40 D4 44 1A 82 C2 1D 82 4A C4 1D
-1E 42 C6 1D 08 8E CE 48 00 00 30 4D 00 00 04 46
-49 4E 44 00 2F 83 0C 4E 66 4C 75 40 80 00 3B 40
-CA 1D 3E 4B 0E 93 1E 24 58 4C 01 00 78 F0 1E 00
-0E 58 2E 53 1E 4E FE FF 0E 93 F3 27 09 4E 78 49
-48 C5 48 96 F7 23 0A 4C FA 99 01 00 F3 23 1A 53
-58 83 FA 23 19 B3 09 63 0C 49 CE 93 00 00 1E 43
-01 30 2E 83 8F 4C 00 00 36 40 E2 44 35 40 D4 44
-30 4D 00 00 07 3E 4E 55 4D 42 45 52 3C 4F 38 4F
-29 4F 2F 82 1B 42 DC 1D 6A 4C 7A 80 30 00 7A 90
-0A 00 05 28 7A 80 07 00 7A 90 0A 00 12 28 0A 9B
-22 C3 0F 2C 82 49 D0 04 82 48 D2 04 82 4B C8 04
-19 42 E4 04 18 42 E6 04 09 5A 08 63 1C 53 1E 83
-E3 23 8F 4C 00 00 8F 48 02 00 8F 49 04 00 30 4D
-32 C0 00 02 1B 42 DC 1D 0C 43 2D 15 3D 40 AE 4A
-09 43 08 43 3F 82 8F 4E 06 00 0C 4E 7E 4C FC 90
-27 00 00 00 07 20 5C 4C 01 00 8F 4C 04 00 7E 90
-03 00 48 3C 6A 4C 7A 80 2D 00 04 28 BD 23 B1 43
-02 00 0A 3C 2B 43 7A 52 07 24 3B 52 6A 53 04 24
-3B 40 10 00 7A 53 36 20 1C 53 1E 83 EB 3F B0 4A
-31 24 2D 83 7A 90 28 00 C1 27 32 B0 00 02 2A 20
-32 D0 00 02 7A 90 F7 00 B9 27 7A 90 F5 00 22 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-79 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 66 44 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 4A 93 2B 17 0E 4C 82 4B DC 1D 06 24 32 C0
-00 02 3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00
-04 00 BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00
-BF E3 00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02
-01 20 2F 53 30 4D 00 00 01 2C 1A 42 C6 1D 8A 4E
-00 00 A2 53 C6 1D 3E 4F 30 4D 58 4B 87 4C 49 54
-45 52 41 4C 82 93 BE 1D 0D 24 09 4E 1A 42 C6 1D
-A2 52 C6 1D BA 40 0A 44 00 00 8A 49 02 00 3E 4F
-32 B0 00 02 32 C0 00 02 03 24 8A 4E 02 00 EE 3F
-30 4D 66 48 05 43 4F 55 4E 54 2F 83 1E 53 8F 4E
-00 00 5E 4E FF FF 30 4D 7A 48 09 49 4E 54 45 52
-50 52 45 54 0D 12 84 12 AC 44 14 4C 2C 49 D0 4B
-9C 26 3D 40 D8 4B DE 3E DA 4B 0A 4E 3E 4F 3D 40
-F4 4B 36 27 3D 40 CA 4B 1A E2 BE 1D B6 27 0E 12
-3E 4F 30 41 F6 4B 3E 4F 3D 40 CA 4B BB 23 DE 53
-00 00 68 4E 08 5E F8 40 3F 00 00 00 3D 40 96 4D
-CC 3F FE 4B 86 12 20 00 E6 47 05 41 4C 4C 4F 54
-82 5E C6 1D 3E 4F 30 4D 3F 40 80 1C 0E 43 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D 84 12 8E 47
-BC 44 C4 4B C4 47 F6 47 14 44 0C 73 74 61 63 6B
-20 65 6D 70 74 79 21 00 2A 45 0A 44 40 FF 28 44
-FE 47 14 44 0A 46 52 41 4D 20 66 75 6C 6C 21 00
-2A 45 3A 44 3E 4C 1A 4C 86 41 42 4F 52 54 22 00
-0D 12 84 12 E4 48 0A 44 2A 45 5A 4B 60 48 8E 49
-01 27 0D 12 84 12 14 4C 2C 49 94 49 34 44 12 4C
-60 48 00 00 83 5B 27 5D 0D 12 84 12 92 4C 0A 44
-0A 44 5A 4B 5A 4B 60 48 A4 4C 81 5B 82 43 BE 1D
-30 4D 0C 48 01 5D B2 43 BE 1D 30 4D C4 4C 81 5C
-92 42 C0 1D C4 1D 30 4D 00 00 88 50 4F 53 54 50
-4F 4E 45 00 0D 12 84 12 14 4C 2C 49 94 49 A8 47
-34 44 12 4C F6 47 34 44 06 4D 0A 44 0A 44 5A 4B
-5A 4B 0A 44 5A 4B 5A 4B 60 48 BA 4C 01 3A 30 12
-56 4D 92 B3 C6 1D A2 63 C6 1D 0D 12 84 12 14 4C
-2C 49 24 4D 3D 41 08 4E 7A 4E 5A D3 5A 53 0A 58
-19 42 DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F 82 48
-B6 1D 82 49 B8 1D 82 4A BA 1D 82 4F BC 1D 2A 52
-82 4A C6 1D 30 41 BA 40 0D 12 FC FF BA 40 84 12
-FE FF B2 43 BE 1D 30 4D 82 9F BC 1D 09 20 18 42
-B6 1D 19 42 B8 1D A8 49 FE FF 89 48 00 00 30 4D
-0D 12 84 12 14 44 0F 73 74 61 63 6B 20 6D 69 73
-6D 61 74 63 68 21 36 45 0C 4D 81 3B 82 93 BE 1D
-97 27 0D 12 84 12 0A 44 60 48 5A 4B 68 4D BC 4C
-60 48 BA 4B 09 49 4D 4D 45 44 49 41 54 45 18 42
-B6 1D F8 D0 80 00 00 00 30 4D A4 4B 06 43 52 45
-41 54 45 00 B0 12 12 4D BA 40 86 12 FC FF 8A 4A
-FE FF C9 3F CC 4D 04 43 4F 44 45 00 B0 12 12 4D
-A2 82 C6 1D 0D 12 84 12 04 50 DE 4F 60 48 B4 4D
-07 48 44 4E 43 4F 44 45 B2 40 E2 4F DA 1D EE 3F
-00 00 07 45 4E 44 43 4F 44 45 0D 12 84 12 68 4D
-1E 50 3C 50 60 48 00 00 05 43 4F 4C 4F 4E 1A 42
-C6 1D BA 40 0D 12 00 00 BA 40 84 12 02 00 A2 52
-C6 1D B2 43 BE 1D 0D 12 84 12 1E 50 3C 50 60 48
-00 00 05 4C 4F 32 48 49 A2 83 C6 1D 1A 42 C6 1D
-EB 3F 00 4E 85 48 49 32 4C 4F 0D 12 84 12 28 44
-AC 4F 5A 4B BC 4C F4 4D 60 48 9A 4D 86 5B 54 48
-45 4E 5D 00 30 4D 0C 4E 38 4F 3B 4F 39 4F 0E 4B
-0E 5C 10 24 1B 83 06 30 1C 83 04 30 19 53 F9 98
-FF FF F5 27 2D 4D 3E 4F 30 4D 2F 53 9F 83 00 00
-F9 23 2F 53 2D 53 F7 3F 7C 4E 86 5B 45 4C 53 45
-5D 00 0D 12 84 12 0A 44 00 00 D8 47 14 4C 2C 49
-AA 4B A0 47 34 44 14 4F AE 47 14 44 06 5B 54 48
-45 4E 5D 00 86 4E EE 4E AA 4E CC 4E 60 48 AE 47
-14 44 06 5B 45 4C 53 45 5D 00 86 4E 04 4F AA 4E
-CA 4E 60 48 14 44 04 5B 49 46 5D 00 86 4E CC 4E
-3A 44 CA 4E 82 47 14 44 05 0D 0A 6B 6F 20 5C 47
-BC 44 AC 44 3A 44 CC 4E BA 4E 84 5B 49 46 5D 00
-0E 93 3E 4F C6 27 30 4D 2F 53 30 4D 2A 4F 89 5B
-44 45 46 49 4E 45 44 5D 0D 12 84 12 14 4C 2C 49
-94 49 38 4F 60 48 3E 4F 8B 5B 55 4E 44 45 46 49
-4E 45 44 5D 0D 12 84 12 48 4F F0 47 60 48 70 4F
-B2 4E 0A 18 2E 53 BE 12 3E 4F 3D 41 90 3C 6C 4B
-06 4D 41 52 4B 45 52 00 B0 12 12 4D BA 40 85 12
-FC FF BA 40 6E 4F FE FF 28 83 8A 48 00 00 BA 40
-AA 44 04 00 B2 50 06 00 C6 1D E1 3E 2E 53 30 4D
-0A 44 CA 1D E8 47 60 48 85 12 B0 4F 78 4C E6 4D
-2C 47 90 4C 64 4E F6 46 80 4F 12 49 A8 50 BC 50
-9C 48 26 49 00 00 58 4F CE 4C F4 49 00 00 85 12
-B0 4F 84 56 EA 56 2C 56 3A 57 F2 55 00 00 BE 53
-00 00 02 58 E6 57 56 56 94 56 CE 54 00 00 00 00
-56 57 DC 4F 3A 40 0C 00 39 40 D6 1D 08 49 28 53
-19 83 18 83 E8 49 00 00 1A 83 FA 23 30 4D 3A 40
-0E 00 38 40 CA 1D 09 48 29 53 F8 49 00 00 18 53
-1A 83 FB 23 30 4D 82 43 CC 1D 30 4D 92 42 CA 1D
-DA 1D 30 4D B8 4F 36 50 3C 50 4C 50 1A 42 20 18
-82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40 10 00 09 4A
-08 49 29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00
-1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D
-DA 4C 09 50 57 52 5F 53 54 41 54 45 85 12 44 50
-0E 58 E0 48 09 52 53 54 5F 53 54 41 54 45 92 42
-0A 18 90 50 F3 3F 82 50 08 50 57 52 5F 48 45 52
-45 00 92 42 C6 1D 90 50 30 4D 94 50 08 52 53 54
-5F 48 45 52 45 00 92 42 C6 1D 0A 18 F2 3F 3E 90
-0E 00 DC 27 2E 92 E3 37 0E 93 D8 37 39 40 10 00
-29 83 B9 43 80 FF FC 23 B9 40 1A 51 FE FF 29 83
-B9 40 02 46 FE FF 39 90 AE FF F9 23 39 40 14 18
-B2 49 04 46 B2 49 FA 44 B2 49 02 44 B2 49 20 46
-B2 49 E4 FF B2 49 0A 18 C2 3F B2 D0 03 00 04 01
-B2 D0 10 00 00 01 B2 40 80 5A 5C 01 31 40 E0 1C
-3F 40 80 1C 39 40 00 08 29 83 89 43 00 1C FC 23
-B2 D3 06 02 B2 40 FE FF 02 02 B2 43 26 02 B2 43
-22 02 D2 D3 24 02 B2 43 46 02 B2 43 42 02 B2 43
-66 02 B2 43 62 02 B2 43 86 02 B2 40 7F FF 82 02
-F2 43 26 03 F2 43 22 03 F2 40 A5 00 61 01 82 43
-66 01 B2 40 33 00 64 01 D2 43 61 01 39 40 40 00
-18 42 00 18 18 83 FE 23 19 83 FA 23 B2 42 B0 01
-F2 D0 10 00 2A 03 F2 C0 40 00 A2 04 1E 42 08 18
-82 43 08 18 1E D2 9E 01 B0 12 F8 44 1E 46 38 40
-C0 1D 0A 4E 39 48 2E 48 09 5E 1E 52 C4 1D 09 9E
-03 24 7A 9E FC 27 1E 83 0A 4E 2A 88 82 4A C4 1D
-30 4D 1C 15 0E 12 12 12 C4 1D 84 12 2C 49 94 49
-F0 47 34 44 FE 51 50 4A 34 44 18 52 12 52 00 52
-3C 4E 3C 80 87 12 05 24 1C 53 02 20 2E 4E 01 3C
-2E 83 21 52 1B 17 30 41 1A 52 B2 41 C4 1D 3E 41
-84 12 0A 44 2B 00 2C 49 94 49 F0 47 34 44 36 52
-50 4A 34 44 12 4C BA 47 2C 49 50 4A 34 44 12 4C
-42 52 3E 5F E7 3F 3E 40 28 00 B0 12 E2 51 19 42
-C6 1D A2 53 C6 1D 89 4E 00 00 3E 40 29 00 92 92
-C0 1D C4 1D 02 20 30 40 80 4D 1C 15 12 12 C4 1D
-92 53 C4 1D 84 12 2C 49 50 4A 34 44 8A 52 80 52
-21 53 3E 90 10 00 C6 2B 7F 2D 8C 52 B2 41 C4 1D
-C1 3F 0D 12 84 12 14 4C BE 51 9C 52 0C 43 1B 42
-C6 1D A2 53 C6 1D 6A 4E 3E 4F 7A 90 23 00 27 20
-92 53 C4 1D B0 12 E2 51 3C 40 00 03 0E 93 1C 24
-3C 40 10 03 1E 93 18 24 3C 40 20 03 2E 93 14 24
-3C 40 20 02 2E 92 10 24 3C 40 30 02 3E 92 0C 24
-3C 40 30 03 3E 93 08 24 3C 40 30 00 19 42 C6 1D
-A2 53 C6 1D 89 4E 00 00 3E 4F 3D 41 30 4D 7A 90
-26 00 07 20 3C 40 10 02 92 53 C4 1D B0 12 E2 51
-ED 3F 7A 90 40 00 16 20 3C 40 20 00 92 53 C4 1D
-B0 12 6A 52 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
-6A 52 92 92 C0 1D C4 1D 02 24 92 53 C4 1D 8E 10
-0C 5E DA 3F B0 12 6A 52 FA 23 3C 50 10 00 B0 12
-46 52 EF 3F 0C 43 1B 42 C6 1D A2 53 C6 1D 0D 12
-84 12 14 4C BE 51 68 53 FE 90 26 00 00 00 3E 40
-20 00 03 20 3C 50 82 00 C7 3F B0 12 6A 52 E0 23
-3C 50 80 00 B0 12 46 52 DB 3F 00 00 04 52 45 54
-49 00 0D 12 84 12 0A 44 00 13 5A 4B 60 48 0A 44
-2C 00 92 52 5E 53 A8 53 09 4B 2E 4E 0E DC A2 3F
-52 4E 03 4D 4F 56 85 12 9E 53 00 40 B2 53 05 4D
-4F 56 2E 42 85 12 9E 53 40 40 00 00 03 41 44 44
-85 12 9E 53 00 50 CC 53 05 41 44 44 2E 42 85 12
-9E 53 40 50 D8 53 04 41 44 44 43 00 85 12 9E 53
-00 60 E6 53 06 41 44 44 43 2E 42 00 85 12 9E 53
-40 60 8C 53 04 53 55 42 43 00 85 12 9E 53 00 70
-04 54 06 53 55 42 43 2E 42 00 85 12 9E 53 40 70
-12 54 03 53 55 42 85 12 9E 53 00 80 22 54 05 53
-55 42 2E 42 85 12 9E 53 40 80 28 4E 03 43 4D 50
-85 12 9E 53 00 90 3C 54 05 43 4D 50 2E 42 85 12
-9E 53 40 90 12 4E 04 44 41 44 44 00 85 12 9E 53
-00 A0 56 54 06 44 41 44 44 2E 42 00 85 12 9E 53
-40 A0 48 54 03 42 49 54 85 12 9E 53 00 B0 74 54
-05 42 49 54 2E 42 85 12 9E 53 40 B0 80 54 03 42
-49 43 85 12 9E 53 00 C0 8E 54 05 42 49 43 2E 42
-85 12 9E 53 40 C0 9A 54 03 42 49 53 85 12 9E 53
-00 D0 A8 54 05 42 49 53 2E 42 85 12 9E 53 40 D0
-00 00 03 58 4F 52 85 12 9E 53 00 E0 C2 54 05 58
-4F 52 2E 42 85 12 9E 53 40 E0 F4 53 03 41 4E 44
-85 12 9E 53 00 F0 DC 54 05 41 4E 44 2E 42 85 12
-9E 53 40 F0 14 4C 92 52 FA 54 0A 4C 3C F0 70 00
-8A 10 3A F0 0F 00 0C DA 4F 3F 2E 54 03 52 52 43
-85 12 F4 54 00 10 0C 55 05 52 52 43 2E 42 85 12
-F4 54 40 10 18 55 04 53 57 50 42 00 85 12 F4 54
-80 10 26 55 03 52 52 41 85 12 F4 54 00 11 34 55
-05 52 52 41 2E 42 85 12 F4 54 40 11 40 55 03 53
-58 54 85 12 F4 54 80 11 00 00 04 50 55 53 48 00
-85 12 F4 54 00 12 5A 55 06 50 55 53 48 2E 42 00
-85 12 F4 54 40 12 B4 54 04 43 41 4C 4C 00 85 12
-F4 54 80 12 1A 53 0E 4A 0D 12 84 12 D6 48 14 44
-0D 6F 75 74 20 6F 66 20 62 6F 75 6E 64 73 36 45
-4E 55 03 53 3E 3D 86 12 00 38 A2 55 02 53 3C 00
-86 12 00 34 68 55 03 30 3E 3D 86 12 00 30 B6 55
-02 30 3C 00 86 12 00 30 00 00 02 55 3C 00 86 12
-00 2C CA 55 03 55 3E 3D 86 12 00 28 C0 55 03 30
-3C 3E 86 12 00 24 DE 55 02 30 3D 00 86 12 00 20
-00 00 02 49 46 00 1A 42 C6 1D 8A 4E 00 00 A2 53
-C6 1D 0E 4A 30 4D D4 55 04 54 48 45 4E 00 1A 42
-C6 1D 08 4E 3E 4F 09 48 29 53 0A 89 0A 11 3A 90
-00 02 B1 2F 88 DA 00 00 30 4D 64 54 04 45 4C 53
-45 00 1A 42 C6 1D BA 40 00 3C 00 00 A2 53 C6 1D
-2F 83 8F 4A 00 00 E3 3F 78 55 05 42 45 47 49 4E
-30 40 28 44 08 56 05 55 4E 54 49 4C 3A 4F 08 4E
-3E 4F 19 42 C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE
-8A 3B 3A F0 FF 03 08 DA 89 48 00 00 A2 53 C6 1D
-30 4D E8 54 05 41 47 41 49 4E 0A 4E 38 40 00 3C
-E7 3F 00 00 05 57 48 49 4C 45 0D 12 84 12 F6 55
-BA 47 60 48 AC 55 06 52 45 50 45 41 54 00 0D 12
-84 12 8A 56 0E 56 60 48 BA 56 3D 41 08 4E 3E 4F
-2A 48 B2 92 C4 1D CB 2F 98 42 C6 1D 00 00 30 4D
-4A 56 03 42 57 31 85 12 B8 56 00 00 D2 56 03 42
-57 32 85 12 B8 56 00 00 DE 56 03 42 57 33 85 12
-B8 56 00 00 F6 56 3D 41 1A 42 C6 1D 28 4E B2 92
-C4 1D 88 2B BA 4F 00 00 A2 53 C6 1D 8E 4A 00 00
-3E 4F 30 4D 00 00 03 46 57 31 85 12 F4 56 00 00
-16 57 03 46 57 32 85 12 F4 56 00 00 22 57 03 46
-57 33 85 12 F4 56 00 00 2E 57 04 47 4F 54 4F 00
-2F 83 8F 4E 00 00 3E 40 00 3C 0D 12 84 12 92 4C
-EE 4B 60 48 00 00 05 3F 47 4F 54 4F 3E 90 00 30
-F4 27 3E E0 00 04 3E B0 00 10 EF 27 3E E0 00 08
-EC 3F 14 4C BE 51 78 57 92 53 C4 1D 3E 40 2C 00
-84 12 2C 49 50 4A 34 44 12 4C 54 53 8E 57 0A 4E
-3E 4F 1A 83 F7 32 29 4E 59 0E 0A 28 08 4C 59 0A
-01 28 0C 8A 08 8A 38 90 10 00 EC 2E 5A 0E AB 3E
-2A 92 E8 2E 8A 10 5A 06 A6 3E A6 56 04 52 52 43
-4D 00 85 12 72 57 50 00 BC 57 04 52 52 41 4D 00
-85 12 72 57 50 01 CA 57 04 52 4C 41 4D 00 85 12
-72 57 50 02 D8 57 04 52 52 55 4D 00 85 12 72 57
-50 03 E8 55 05 50 55 53 48 4D 85 12 72 57 00 15
-F4 57 04 50 4F 50 4D 00 85 12 72 57 00 17
-@FF80
-FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-77 00 10 00 12 00 14 00 16 00 00 00 02 46 02 46
-02 46 02 46 02 46 02 46 02 46 02 46 02 46 02 46
-02 46 02 46 02 46 02 46 02 46 02 46 02 46 02 46
-02 46 02 46 02 46 02 46 02 46 02 46 02 46 02 46
-02 46 02 46 94 46 02 46 02 46 02 46 02 46 02 46
-02 46 02 46 02 46 02 46 02 46 02 46 02 46 1A 51
-q
:: %1 = target name without ext. of \binaries\target.txt file
:: %2 = port COMx in use
:: %~d1 = drive: of %1
-:: %~n1 = target name without ext. of %1
+:: %~nx1 = target name with ext. of %1
@set PortCOM=%2
@if 1%PortCOM% == 1 CALL %~d1\config\Select.bat SelectPortCOM
@%~d1\prog\BSL-Scripter.exe --log --quiet --initComm [INVOKE,%PortCOM%,UART,9600,PARITY] --device FRxx --erase ERASE_ALL --exit [RESET]
-@%~d1\prog\BSL-Scripter.exe --log --initComm [INVOKE,%PortCOM%,UART,9600,PARITY] --device FRxx --speed FAST --bslPwd %~d1\binaries\pass32_default.txt -w %~d1\binaries\%~n1.txt --exit [RESET]
+@%~d1\prog\BSL-Scripter.exe --log --initComm [INVOKE,%PortCOM%,UART,9600,PARITY] --device FRxx --speed FAST --bslPwd %~dp1binaries\pass32_default.txt -w %~dp1binaries\%~nx1 --exit [RESET]
@pause
call %~d1\config\Select.bat SelectTemplate
-@start %~d1\config\CopyTo_SD_Card.bat %1 %~d1\inc\%template% %2
+@start %~d1\config\CopyTo_SD_Card.bat %1 %~dp1inc\%template% %2
::PAUSE > NUL
exit
:: %1 is file.f or file.4th to be send
-:: optionnal %2 may be used by CopyTo_SD_Card.bat
\ No newline at end of file
+:: optionnal %2 may be used by CopyTo_SD_Card.bat
::used by CopySourceFileToTarget_SD_Card.bat or by scite editor Tools menu
::echo %2
-::echo %~d1\inc\%~n2.pat
+::echo %~dp1..\inc\%~n2.pat
@ECHO OFF
goto badend
)
-IF NOT EXIST %~d1\inc\%~n2.pat (
-echo %~d1\inc\%~n2.pat not found!
+IF NOT EXIST %~dp1..\inc\%~n2.pat (
+echo %~dp1..\inc\%~n2.pat not found!
goto badend
)
:preprocessF
-@%~d1\prog\gema.exe -nobackup -line -t '-\r\n=\r\n' -f %~d1\inc\%~n2.pat %~dpn1.f %~dpn1.4TH
-@call %~d1\config\Select.bat SelectDeviceId %~d1\inc\%~n2.pat
+@%~d1\prog\gema.exe -nobackup -line -t '-\r\n=\r\n' -f %~dp1..\inc\%~n2.pat %~dpn1.f %~dpn1.4TH
+@call %~d1\config\Select.bat SelectDeviceId %~dp1..\inc\%~n2.pat
:DownloadF
@taskkill /F /IM ttermpro.exe 1> NUL 2>&1
::@echo off
-@call %~d1\config\Select.bat SelectDevice %1
-@echo %device% programmation
-%~d1\prog\msp430flasher -s -m SBW2 -u -n %device% -v -w %~d1\binaries\%~n1.txt -z [RESET,VCC]
+@if F%1==F (
+ @echo no file to do that!
+) else (
+ @call %~d1\config\Select.bat SelectDevice %1
+ @IF EXIST %~dp1binaries\%~n1.txt GOTO progtxt
+ @IF EXIST %~dp1binaries\%~n1.hex GOTO proghex
+)
+@exit
+
+:progtxt
+%~d1\prog\msp430flasher -s -m SBW2 -u -n %device% -v -w %~dp1binaries\%~n1.txt -z [RESET,VCC]
+@exit
+:proghex
+%~d1\prog\msp430flasher -s -m SBW2 -u -n %device% -v -w %~dp1binaries\%~n1.hex -z [RESET,VCC]
@exit
:: your git copy must be the root of a virtual drive
-:: %n1 = file filename (= target) to flash
+:: %n1 = filename of file to flash
+:: %nx1 = filename.ext of file to flash
:: -s : force update
:: -m : select SBW2 mode
:: -u : Unlocks locked flash memory (INFOA) for writing.
--- /dev/null
+@1800
+80 3E 12 00 00 00 F8 00 00 00 35 01 10 00 E0 43
+56 41 B8 5C 44 41 76 5B DC 42 1A 4C 96 65 62 4C
+CA 42 4E 43 2A 43 3C 1D E0 1C E2 45 B6 40 C4 40
+F8 44 20 00 0A 00 00 1C 1A 4C 1A 4C 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+q
if "%1" == "" set howtoread=MAIN
if "%2" == "" set readfile=MAIN_DUMP
-%~d1\prog\msp430flasher -m SBW2 -r [%readfile%_%howtoread%.txt,%howtoread%] -z [VCC=3000]
+%~d1\prog\msp430flasher -m SBW2 -r [%readfile%.HEX,%howtoread%] -z [VCC=3000]
::%~d1\prog\srec_cat %readfile%_%howtoread%.HEX -intel -output %readfile%_%howtoread%.bin -Binary
::%~d1\prog\HxD\HxD.exe" %readfile%_%howtoread%.bin
--- /dev/null
+
+:: usage: MSP430Read RAM|INFO|MAIN|BSL output
+
+::set howtoread=%1
+::set readfile=%2
+::if "%1" == "" set howtoread=MAIN
+::if "%2" == "" set readfile=MAIN_DUMP
+
+%~d1\prog\msp430flasher -m SBW2 -r [target_INFO.txt,INFO] -z [VCC=3000]
+::%~d1\prog\srec_cat %readfile%_%howtoread%.HEX -intel -output %readfile%_%howtoread%.bin -Binary
+::%~d1\prog\HxD\HxD.exe" %readfile%_%howtoread%.bin
+
+pause
--- /dev/null
+
+:: usage: MSP430Read RAM|INFO|MAIN|BSL output
+
+::set howtoread=%1
+::set readfile=%2
+::if "%1" == "" set howtoread=MAIN
+::if "%2" == "" set readfile=MAIN_DUMP
+
+%~d1\prog\msp430flasher -m SBW2 -r [target_MAIN.txt,MAIN] -z [VCC=3000]
+::%~d1\prog\srec_cat %readfile%_%howtoread%.HEX -intel -output %readfile%_%howtoread%.bin -Binary
+::%~d1\prog\HxD\HxD.exe" %readfile%_%howtoread%.bin
+
+pause
--- /dev/null
+
+:: usage: MSP430Read RAM|INFO|MAIN|BSL output
+
+::set howtoread=%1
+::set readfile=%2
+::if "%1" == "" set howtoread=MAIN
+::if "%2" == "" set readfile=MAIN_DUMP
+
+%~d1\prog\msp430flasher -m SBW2 -r [target_RAM.txt,RAM] -z [VCC=3000]
+::%~d1\prog\srec_cat %readfile%_%howtoread%.HEX -intel -output %readfile%_%howtoread%.bin -Binary
+::%~d1\prog\HxD\HxD.exe" %readfile%_%howtoread%.bin
+
+pause
@ECHO OFF
::echo %2
-::echo %~d1\inc\%~n2.pat
+::echo %~dp1..\inc\%~n2.pat
IF "%2" == "" (
echo no file to be preprocessed!
goto badend
)
-IF NOT EXIST %~d1\inc\%~n2.pat (
-echo %~d1\inc\%~n2.pat not found!
+IF NOT EXIST %~dp1..\inc\%~n2.pat (
+echo %~dp1..\inc\%~n2.pat not found!
goto badend
)
:preprocess
-%~d1\prog\gema.exe -nobackup -line -t '-\r\n=\r\n' -f %~d1\inc\%~n2.pat %~dpn1.f %~dp1LAST.4TH
-XCOPY /D /Y %~dp1LAST.4TH %~dp1\%~n2\%~n1.4TH* > NUL
+%~d1\prog\gema.exe -nobackup -line -t '-\r\n=\r\n' -f %~dp1..\inc\%~n2.pat %~dpn1.f %~dp1LAST.4TH
+
+call %~d1\config\Select.bat SelectDevice %~dp1..\inc\%~n2.pat
+if not exist %~dp1SD_%device:~3% MD %~dp1SD_%device:~3% > NUL
+COPY /y %~dp1LAST.4TH %~dp1SD_%device:~3%\%~n1.4TH > NUL
exit
:: %~dpn1.f is the symbolic source file
::used as link in any folder to drag and drop file.f on it.
::@call SelectTarget.bat
@call %~d1\config\Select.bat SelectTemplate
-@start %~d1\config\Preprocess.bat %1 %~d1\inc\%template% %2
+@start %~d1\config\Preprocess.bat %1 %~dp1..\inc\%template% %2
exit
:: %1 is file.f to be preprocessed
-:: %2 is used by Preprocess.bat as an unexpected third parameter
\ No newline at end of file
+:: %2 is used by Preprocess.bat as an unexpected third parameter
--- /dev/null
+# SciTEUser.properties
+# For Windows, place in your home directory
+# Documentation at http://www.scintilla.org/SciTEDoc.html
+
+# Globals
+
+PLAT_WIN=1
+PLAT_GTK=0
+position.maximize=1
+
+save.session=1
+save.recent=1
+save.session=1
+session.bookmarks=1
+
+buffers.zorder.switching=1
+properties.directory.enable=1
+check.if.already.open=1
+
+# # Scripting
+# ext.lua.startup.script=$(SciteUserHome)/SciTEStartup.lua
+# ext.lua.auto.reload=1
+# #ext.lua.reset=1
+
+
+# Window sizes and visibility
+if PLAT_WIN
+ position.left=-1
+ position.top=0
+if PLAT_GTK
+ position.left=5
+ position.top=22
+
+position.width=1000
+position.height=768
+position.maximize=1
+#position.tile=1
+#full.screen.hides.menu=1
+minimize.to.tray=0
+split.vertical=1
+output.horizontal.size=400
+output.vertical.size=600
+output.initial.hide=1
+#horizontal.scrollbar=0
+#horizontal.scroll.width=10000
+#horizontal.scroll.width.tracking=0
+#output.horizontal.scrollbar=0
+#output.horizontal.scroll.width=10000
+#output.horizontal.scroll.width.tracking=0
+#output.scroll=0
+error.select.line=1
+#end.at.last.line=0
+tabbar.visible=1
+#tabbar.hide.one=1
+tabbar.multiline=0
+toolbar.large=1
+toolbar.visible=1
+#toolbar.detachable=1
+#toolbar.usestockicons=1
+#menubar.detachable=1
+#undo.redo.lazy=1
+statusbar.visible=1
+#fileselector.width=800
+#fileselector.height=600
+#fileselector.show.hidden=1
+magnification=0
+output.magnification=-4
+
+# Sizes and visibility in edit pane
+line.margin.visible=1
+line.margin.width=4
+margin.width=16
+fold.margin.width=0
+#fold.margin.colour=#00FF00
+#fold.margin.highlight.colour=#0000FF
+blank.margin.left=20
+#blank.margin.right=4
+buffered.draw=1
+#two.phase.draw=0
+use.palette=0
+
+#Element styles
+
+#view.eol=1
+#control.char.symbol=.
+caret.period=500
+view.whitespace=0
+view.indentation.whitespace=1
+view.indentation.guides=0
+view.indentation.examine=3
+highlight.indentation.guides=1
+caret.fore=#FF0000
+#caret.additional.blinks=0
+caret.width=3
+caret.line.back=#222222
+calltip.back=#FFF0FE
+
+# Internationalisation
+# Japanese input code page 932 and ShiftJIS character set 128
+#code.page=932
+#character.set=128
+# Unicode
+#code.page=65001
+code.page=0
+#character.set=204
+# Required for Unicode to work on GTK+:
+#LC_CTYPE=en_US.UTF-8
+if PLAT_GTK
+ output.code.page=65001
+if PLAT_MAC
+ output.code.page=65001
+
+# Export
+#export.keep.ext=1
+export.html.wysiwyg=1
+#export.html.tabs=1
+#export.html.folding=1
+export.html.styleused=1
+export.html.title.fullpath=1
+#export.rtf.tabs=1
+#export.rtf.font.face=Arial
+#export.rtf.font.size=9
+#export.rtf.tabsize=8
+#export.rtf.wysiwyg=0
+#export.tex.title.fullpath=1
+# Magnification (added to default screen font size)
+export.pdf.magnification=0
+# Font: Courier, Helvetica or Times (Courier line-wraps)
+export.pdf.font=Courier
+# Page size (in points): width, height
+# E.g. Letter 612,792; A4 595,842; maximum 14400,14400
+export.pdf.pagesize=595,842
+# Margins (in points): left, right, top, bottom
+export.pdf.margins=56,28,28,28
+export.xml.collapse.spaces=1
+export.xml.collapse.lines=1
+
+if PLAT_WIN
+ font.base=font:Lucida Console,size:10
+ font.small=font:Lucida Console,size:10
+ font.comment=font:Lucida Console,size:10
+ font.code.comment.box=$(font.comment)
+ font.code.comment.line=$(font.comment)
+ font.code.comment.doc=$(font.comment)
+ font.code.comment.nested=$(font.comment)
+ font.text=font:Lucida Console,size:10
+ font.text.comment=font:Lucida Console,size:10
+ font.embedded.base=font:Lucida Console,size:10
+ font.embedded.comment=font:Lucida Console,size:10
+ font.monospace=font:Lucida Console,size:10
+ font.vbs=font:Lucida Sans Unicode,size:10
+if PLAT_GTK
+ font.base=font:Bitstream Vera Sans Mono,size:10
+ font.small=font:Bitstream Vera Sans Mono,size:10
+ font.comment=font:Bitstream Vera Sans Mono,size:10
+ font.code.comment.box=$(font.comment)
+ font.code.comment.line=$(font.comment)
+ font.code.comment.doc=$(font.comment)
+ font.code.comment.nested=$(font.comment)
+ font.text=font:Bitstream Vera Sans Mono,size:10
+ font.text.comment=font:Bitstream Vera Sans Mono,size:10
+ font.embedded.base=font:Bitstream Vera Sans Mono,size:10
+ font.embedded.comment=font:Bitstream Vera Sans Mono,size:10
+ font.monospace=font:Bitstream Vera Sans Mono,size:10
+ font.vbs=font:Bitstream Vera Sans Mono,size:10
+if PLAT_MAC
+ font.base=font:Verdana,size:12
+ font.small=font:Verdana,size:10
+ font.comment=font:Georgia,size:13
+ font.code.comment.box=$(font.comment)
+ font.code.comment.line=$(font.comment)
+ font.code.comment.doc=$(font.comment)
+ font.code.comment.nested=$(font.comment)
+ font.text=font:Times New Roman,size:13
+ font.text.comment=font:Verdana,size:11
+ font.embedded.base=font:Verdana,size:11
+ font.embedded.comment=font:Comic Sans MS,size:10
+ font.monospace=font:Courier New,size:12
+ font.vbs=font:Lucida Sans Unicode,size:12
+
+font.js=$(font.comment)
+
+# Give symbolic names to the set of colours used in the standard styles.
+colour.code.comment.box=fore:#00FF00
+colour.code.comment.line=fore:#00FF00
+colour.code.comment.doc=fore:#3F703F
+colour.code.comment.nested=fore:#A0C0A0
+colour.text.comment=fore:#0000FF,back:#FFFFFF
+colour.other.comment=fore:#00FF00
+colour.embedded.comment=back:#E0EEFF
+colour.embedded.js=back:#F0F0FF
+colour.notused=back:#FF0000
+#couleur des nombres
+colour.number=fore:#FF00FF
+#couleur des instructions du langage
+colour.keyword=fore:#FF0000
+#couleur chaînes entre guillemets
+colour.string=fore:#00FFFF
+colour.char=fore:#7F7F7F
+colour.operator=fore:#00FF00
+colour.preproc=fore:#FF7F00
+colour.error=fore:#FFFF00,back:#FF0000
+
+# Global default styles for all languages
+# Default style, black background
+style.*.32=back:#000000,fore:#FFFFFF,font:Lucida Console,size:10
+# Line number
+style.*.33=back:#404040,$(font.base))
+# Brace highlight
+style.*.34=back:#222222,fore:#8080FF,bold
+# Brace incomplete highlight
+style.*.35=back:#222222,fore:#FF0000,bold
+# Control characters
+style.*.36=
+# Indentation guides
+style.*.37=fore:#C0C0C0,back:#FFFFFF
+
+
+# Error list styles
+
+style.errorlist.32=fore:#B0B000,$(font.small)
+# Default
+style.errorlist.0=fore:#FFFFFF
+# Microsoft Error
+style.errorlist.3=fore:#0080FF
+# command or return status
+style.errorlist.4=fore:#FF00FF
+
+# Text matched with find in files and message part of GCC errors
+style.errorlist.21=fore:#FF0000
+
+# Printing - only works on Windows
+if PLAT_WIN
+ #print.colour.mode=1
+ print.magnification=-1
+ # Setup: left, right, top, bottom margins, in local units:
+ # hundredths of millimeters or thousandths of inches
+ print.margins=2000,1000,1000,1000
+ # Header/footer:
+ # && = &; &p = current page
+ # &f = file name; &F = full path
+ # &d = file date; &D = current date
+ # &t = file time; &T = full time
+ print.header.format=$(FileNameExt) \97 Printed on $(CurrentDate), $(CurrentTime) \97 Page $(CurrentPage)
+ print.footer.format=$(FilePath) \97 File date: $(FileDate) \97 File time: $(FileTime)
+ # Header/footer style
+ print.header.style=font:Arial,size:12,bold
+ print.footer.style=font:Arial Narrow,size:10,italics
+
+
@echo 7 CHIPSTICK_FR2433
@echo 8 MSP_EXP430FR2355
@echo 9 LP_MSP430FR2476
+
@set /p choice=your choice:
@if %choice% == 1 set template=MSP_EXP430FR5739
--- /dev/null
+#!/bin/bash
+
+echo $1
+echo $2
+echo $3
+
+#gema -nobackup -line -t '\r\n=\n' -f ../inc/$2.pat $1.f $FF/MSP430-FORTH/$1.4th
+gema -nobackup -line -t '\r\n=\n' -f ../inc/$2.pat $1.f $1.4th
+gema -line -t '\n=\r\n' ../MSP430-FORTH/$1.4th ../MSP430-FORTH/LAST.4th
+#rm ../MSP430-FORTH/$1.4th
+
+
+cat LAST.4th > /dev/ttyUSB0
+#cp LAST.4th /dev/ttyUSB0
; DEVICE ID TEST
; ==============
-sendln 'CODE ?ID'; CODE ?ID
-sendln 'CMP #0,R14 0<> IF SUB &$1A04,R14 THEN'; CMP #0,TOS 0<> IF SUB &DEVICEID,TOS THEN
-sendln 'COLON '; COLON
-sendln '$1B EMIT $63 EMIT'; $1B EMIT $63 EMIT \ send 'ESC c' (clear screen)
-sendln 'CR ABORT" Device'39's ID mismatch!" ' ; CR ABORT" Device's ID mismatch!"
-sendln 'PWR_STATE ;' ; PWR_STATE ;
+sendln 'CODE ?ID' ; CODE ?ID
+sendln 'CMP #0,R14 0<> IF SUB &$1A04,R14 THEN' ; CMP #0,TOS 0<> IF SUB &DEVICEID,TOS THEN
+sendln 'COLON ' ; COLON
+sendln '$1B EMIT $63 EMIT' ; $1B EMIT $63 EMIT \ send 'ESC c' (clear screen)
+;sendln '13 EMIT $10 EMIT' ; CR
+sendln ' ABORT" Device'39's ID mismatch!" ' ; ABORT" Device's ID mismatch!"
+sendln 'RST_RET ;' ; RST_RET ;
sendln param5 ' ?ID NOECHO' ; send: %deviceID% ?ID NOECHO
-#!/bin/bash
-
echo $1
echo $2
echo $3
-#gema -nobackup -line -t '\r\n=\n' -f $FF/inc/$2.pat $1.f $FF/MSP430-FORTH/$1.4th
-gema -nobackup -line -t '\r\n=\n' -f $FF/inc/$2.pat $1.f $1.4th
-gema -line -t '\n=\r\n' $FF/MSP430-FORTH/$1.4th $FF/MSP430-FORTH/LAST.4th
-#rm $FF/MSP430-FORTH/$1.4th
+#gema -nobackup -line -t '\r\n=\n' -f ../inc/$2.pat $1.f $FF/MSP430-FORTH/$1.4th
+gema -nobackup -line -t '\r\n=\n' -f ../inc/$2.pat $1.f ./LAST.4th
+gema -line -t '\n=\r\n' ./LAST.4th $1.4th
+rm ./LAST.4th
-cat LAST.4th > /dev/ttyUSB0
+wine "c:\Program Files (x86)\teraterm\ttermpro.exe /V ..\config\SendFile.ttl $1.4TH /C $3 "
+#cat $1.4th > /dev/ttyUSB0
#cp LAST.4th /dev/ttyUSB0
::used by SendSourceFileToTarget.bat or by scite editor Tools menu
::echo %2
-::echo %~d1\inc\%~n2.pat
+::echo %~dp1..\inc\%~n2.pat
@ECHO OFF
goto badend
)
-IF NOT EXIST %~d1\inc\%~n2.pat (
-echo %~d1\inc\%~n2.pat not found!
+IF NOT EXIST %~dp1..\inc\%~n2.pat (
+echo %~dp1..\inc\%~n2.pat not found!
goto badend
)
:preprocessF
-@%~d1\prog\gema.exe -nobackup -line -t '-\r\n=\r\n' -f %~d1\inc\%~n2.pat %~dpn1.f %~dpn1.4TH
-@call %~d1\config\Select.bat SelectDeviceId %~d1\inc\%~n2.pat
+@%~d1\prog\gema.exe -nobackup -line -t '-\r\n=\r\n' -f %~dp1..\inc\%~n2.pat %~dpn1.f %~dpn1.4TH
+@call %~d1\config\Select.bat SelectDeviceId %~dp1..\inc\%~n2.pat
:DownloadF
@taskkill /F /IM ttermpro.exe 1> NUL 2>&1
@"C:\Program Files (x86)\teraterm\ttpmacro.exe" /V %~d1\config\SendFile.ttl %~dpn1.4TH /C %3 %deviceid%
:EndF
-@MOVE "%~dpn1.4TH" "%~dp1\LAST.4TH" > NUL
+@MOVE "%~dpn1.4TH" "%~dp1LAST.4TH" > NUL
+call %~d1\config\Select.bat SelectDevice %~dp1..\inc\%~n2.pat
+if not exist %~dp1SD_%device:~3% MD %~dp1SD_%device:~3% > NUL
+COPY /y %~dp1LAST.4TH %~dp1SD_%device:~3%\%~n1.4TH > NUL
exit
@"C:\Program Files (x86)\teraterm\ttpmacro.exe" /V %~d1\config\SendFile.ttl %~dpn1.4TH /C %2 0
:End4th
-@COPY "%~dpn1.4TH" "%~dp1\LAST.4TH" > NUL
+@COPY "%~dpn1.4TH" "%~dp1LAST.4TH" > NUL
exit
call %~d1\config\Select.bat SelectTemplate
-start %~d1\config\SendSource.bat %1 %~d1\inc\%template% ECHO
+start %~d1\config\SendSource.bat %1 %~dp1..\inc\%template% ECHO
::PAUSE > NUL
exit
; DEVICE ID TEST
; ==============
-sendln 'CODE ?ID'; CODE ?ID
-sendln 'CMP #0,R14 0<> IF SUB &$1A04,R14 THEN'; CMP #0,TOS 0<> IF SUB &DEVICEID,TOS THEN
-sendln 'COLON '; COLON
-;sendln '$1B EMIT $63 EMIT'; $1B EMIT $63 EMIT \ send 'ESC c' (clear screen)
-sendln 'CR ABORT" Device'39's ID mismatch!" ' ; CR ABORT" Device's ID mismatch!"
-sendln 'PWR_STATE ;' ; PWR_STATE ;
+sendln 'CODE ?ID' ; CODE ?ID
+sendln 'CMP #0,R14 0<> IF SUB &$1A04,R14 THEN' ; CMP #0,TOS 0<> IF SUB &DEVICEID,TOS THEN
+sendln 'COLON ' ; COLON
+sendln '$1B EMIT $63 EMIT' ; $1B EMIT $63 EMIT \ send 'ESC c' (clear screen)
+;sendln '13 EMIT $10 EMIT' ; CR
+sendln ' ABORT" Device'39's ID mismatch!" ' ; ABORT" Device's ID mismatch!"
+sendln 'RST_RET ;' ; RST_RET ;
;sendln param4 ' ?ID NOECHO' ; send: %deviceID% ?ID
sendln param4 ' ?ID ECHO' ; send: %deviceID% ?ID
+sendln 'NOBOOT' ;
sendln 'TERM2SD" ' inputstr '"' ; send to FastForth the command TERM2SD" \file.4TH" ...with optionnal path added in inputbox
uptime timestart ; starts chrono...
--- /dev/null
+::@echo off
+
+@call %~d1\config\Select.bat SelectDevice %1
+@echo %device% programmation
+C:\ti\uniflash_5.3.1\dslite.bat -c C:\ti\uniflash_5.3.1\deskdb\content\TICloudAgent\win\ccs_base\common\targetdb\devices\%device%.xml --flash --verify %~d1\binaries\%~n1.txt
+@exit
+
+:: your git copy must be the root of a virtual drive
+
+:: %n1 = file filename (= target) to flash
+:: -s : force update
+:: -m : select SBW2 mode
+:: -n %device% : device set from %n1
+:: -v : verify device
+:: -w %~dpn1.txt : file to be flashed
+:: -z [] : end of flasher behaviour
# $(2) = extension, example : _8MHz
if PLAT_WIN
- command.name.0.*.asm=Assemble 1:[target]
- command.0.*.asm=*\config\build.bat $(FileNameExt) $(1)$(2)
+ command.name.0.*.asm=Assemble 1:[target]
+ command.0.*.asm=*.\config\build.bat $(FileNameExt) $(1)$(2)
- command.name.1.*.asm=FET Prog 1:[target]
- command.1.*.asm=*\config\FET_prog.bat $(1)$(2)
+ command.name.1.*.asm=FET Prog 1:[target]
+ command.1.*.asm=*\config\FET_prog.bat $(1)$(2)
# $(3) = "COMx"
- command.name.2.*.asm=BSL Prog 1:[target] with 3:[COMx]
- command.2.*.asm=*\config\BSL_prog.bat $(1)$(2) $(3)
+ command.name.2.*.asm=BSL Prog 1:[target] with 3:[COMx]
+ command.2.*.asm=*\config\BSL_prog.bat $(1)$(2) $(3)
- command.name.3.*.asm=Assemble target CurrentSelection
- command.3.*.asm=\config\build.bat $(FileNameExt) $(CurrentSelection)
+ command.name.3.*.asm=Assemble target CurrentSelection
+ command.3.*.asm=\config\build.bat $(FileNameExt) $(CurrentSelection)
- command.name.4.*.asm=FET Prog target CurrentSelection
- command.4.*.asm=\config\FET_prog.bat $(CurrentSelection)
+ command.name.4.*.asm=FET Prog target CurrentSelection
+ command.4.*.asm=\config\FET_prog.bat $(CurrentSelection)
- command.name.5.*.asm=BSL Prog target CurrentSelection with 3:[COMx]
- command.5.*.asm=*\config\BSL_prog.bat $(CurrentSelection) $(3)
+ command.name.5.*.asm=BSL Prog target CurrentSelection with 3:[COMx]
+ command.5.*.asm=*\config\BSL_prog.bat $(CurrentSelection) $(3)
if PLAT_GTK
# variable $FF = /home/thoorens/CloudStation/projets/msp430 is defined in my ~.profile
# open first scite in a terminal to import $FF
- command.name.0.*.asm=Assemble for 1:[target]
- command.0.*.asm=*$FF/config/build $(FileNameExt) $(1)$(2)
+ command.name.0.*.asm=Assemble for 1:[target]
+ command.0.*.asm=*./config/build $(FileNameExt) $(1)
- command.name.1.*.asm=FET Prog 1:[target]
- command.1.*.asm=*$FF/config/prog $(1)$(2)
+ command.name.1.*.asm=FET Prog 1:[target]
+ command.1.*.asm=*./config/prog $(1)$(2)
- command.name.2.*.asm=Assemble for target CurrentSelection
- command.2.*.asm=$FF/config/build $(FileNameExt) $(CurrentSelection)
+ command.name.2.*.asm=Assemble for target CurrentSelection
+ command.2.*.asm=./config/build $(FileNameExt) $(CurrentSelection)
- command.name.3.*.asm=FET Prog target CurrentSelection
- command.3.*.asm=$FF/config/prog $(CurrentSelection)
+ command.name.3.*.asm=FET Prog target CurrentSelection
+ command.3.*.asm=./config/prog $(CurrentSelection)
-#asl -i $FF/inc -L $(FilePath)$1 -o $FF/binaries/$2.p
-asl -i $FF/inc -L $1 -o $FF/binaries/$2.p
-#p2hex -F Intel $FF/binaries/$2.p
-p2hex $FF/binaries/$2.p
-#srec_cat $FF/binaries/$2.hex -output $FF/binaries/$2.txt -Texas_Instruments_TeXT
-#srec_cat -contradictory-bytes=warning $FF/binaries/$2.hex -intel -output $FF/binaries/$2.txt -Texas_Instruments_TeXT
-# rm $FF/binaries/$2.hex
-rm $FF/binaries/$2.p
-
+asl -i ./inc -L $1 -o ./binaries/$2.p
+p2hex ./binaries/$2.p ./binaries/$2.hex
+#srec_cat -contradictory-bytes=warning ./binaries/$2.hex -Intel -output ./binaries/$2asm -HEX_Dump
+srec_cat -contradictory-bytes=warning ./binaries/$2.hex -Intel -output ./binaries/$2.txt -Texas_Instruments_TeXT
+rm ./binaries/$2.p
+rm ./binaries/$2.hex
-@ECHO OFF
-%~d1\prog\asw -q -L -i %~d1\inc %1 -o %~d1\binaries\%2.p
-%~d1\prog\p2hex %~d1\binaries\%2.p -r 0x0000-0xffff
-%~d1\prog\srec_cat -contradictory-bytes=warning %~d1\binaries\%2.hex -intel -output %~d1\binaries\%2.txt -ti-txt
-del %~d1\binaries\%2.p
-del %~d1\binaries\%2.hex
+::@ECHO OFF
+%~d1\prog\asw -x -q -L -i %~dp1inc %1 -o %~dp1binaries\%2.p
+%~d1\prog\p2hex %~dp1binaries\%2.p -r 0x0000-0xffff
+%~d1\prog\srec_cat -contradictory-bytes=warning %~dp1binaries\%2.hex -intel -output %~dp1binaries\%2.txt -ti-txt
+del %~dp1binaries\%2.p
+::del %~dp1binaries\%2.hex
exit
rem your git copy must be the root of a virtual drive
rem %1 is the input file.asm
-rem %2 is the target name, plus optional infos
+rem %2 is the target name
comment.box.start.forth=
comment.box.middle.forth=
comment.box.end.forth=
-block.start.forth=\
-block.end.forth=\
+block.start.forth=
+block.end.forth=
# Forth styles
# control keywords Forth
keywords2.$(file.patterns.forth)=\
dup ?dup drop rot swap over @ ! 2@ 2! 2dup 2drop 2swap 2over nip r@ >r r> 2r@ 2>r 2r> \
sp@ sp! @ ! c@ c! s>d um/mod um* m* * fm/mod sm/rem rshift lshift invert 1+ 1- negate \
- (cr) (EMIT) (accept) (warm) is lit warm depth /mod mod \
- space spaces bl word char fill key? key abort */ 2* 2/ /mod cell+ cells char+ \
+ is lit depth /mod mod \
+ space spaces bl word char fill key? key abort */ 2* 2/ /mod cell+ cells char+ \
chars move abs hex decimal hold <# # #s #> sign or \
count type . u. dump (.") >number ' exit recurse here allot , \
c, branch 0branch ?branch align aligned create does> \
- variable constant defer definitions forth forget only also previous literal \
+ variable constant defer definitions forth only also previous literal \
source evaluate word interpret quit >body execute find state base \
words accept emit cr type echo noecho min max true false \
- char [char] postpone ['] rst_here rst_state wipe pwr_here pwr_state \
- assembler close pad caps_on caps_off
+ char [char] postpone ['] rst_set rst_ret sys \
+ assembler close pad
# defwords
keywords3.$(file.patterns.forth)=\
-code hdncode endcode : ; immediate ;noname codennm \
+code hdncode endcode : ; immediate :noname codennm \
lo2hi hi2lo colon \
-[if] [else] [then] [undefined] [defined]
# MSP430 assembly words & MSP430_instructions
keywords4.$(file.patterns.forth)=\
# variable $FF = /media/jeanmi/DATA/CloudStation is defined in my ~.profile
# open first scite in a terminal to import $FF
command.name.0.*.f=preprocess file.f with 1:[target].pat then download file.4th without ECHO
- command.0.*.f=*$FF/config/SendSource $(FileDir)/$(FileName) $(1) NOECHO
+ command.0.*.f=*../config/SendSource $(FileDir)/$(FileName) $(1) NOECHO
command.name.1.*.f=preprocess file.f with 1:[target].pat then download file.4th with ECHO
- command.1.*.f=*$FF/config/SendSource $(FileDir)/$(FileName) $(1) ECHO
+ command.1.*.f=*../config/SendSource $(FileDir)/$(FileName) $(1) ECHO
command.name.2.*.f=preprocess file.f with 1:[target].pat then download file.4th HALFDUPLEX
- command.2.*.f=*$FF/config/SendSource $(FileDir)/$(FileName) $(1) HALF
+ command.2.*.f=*../config/SendSource $(FileDir)/$(FileName) $(1) HALF
command.name.3.*.f=preprocess file.f with 1:[target].pat then download file.4th to target SD_CARD
- command.3.*.f=*$FF/config/CopyTo_SD_Card $(FileDir)/$(FileName) $(1)
+ command.3.*.f=*../config/CopyTo_SD_Card $(FileDir)/$(FileName) $(1)
command.name.4.*.f=preprocess file.f with 1:[target].pat to LAST.4th (for debug)
- command.4.*.f=*$FF/config/Preprocess $(FileDir)/$(FileName) $(1)
+ command.4.*.f=*../config/Preprocess $(FileDir)/$(FileName) $(1)
command.name.5.*.f=preprocess file.f with for target CurrentSelection then download
- command.5.*.f=$FF/config/SendSource $(FileDir)/$(FileName) $(CurrentSelection)
+ command.5.*.f=../config/SendSource $(FileDir)/$(FileName) $(CurrentSelection)
command.name.6.*.f=preprocess file.f with for target CurrentSelection then download with ECHO
- command.6.*.f=$FF/config/SendSource $(FileDir)/$(FileName) $(CurrentSelection) ECHO
+ command.6.*.f=../config/SendSource $(FileDir)/$(FileName) $(CurrentSelection) ECHO
command.name.7.*.f=preprocess file.f with for target CurrentSelection then download file.4th to target SD_CARD
- command.7.*.f=$FF/config/CopyTo_SD_Card $(FileDir)/$(FileName).f $(CurrentSelection)
+ command.7.*.f=../config/CopyTo_SD_Card $(FileDir)/$(FileName).f $(CurrentSelection)
command.name.8.*.f=preprocess file.f with for target CurrentSelection to LAST.4th (for debug)
- command.8.*.f=$FF/config/Preprocess $(FileDir)/$(FileName) $(CurrentSelection)
+ command.8.*.f=../config/Preprocess $(FileDir)/$(FileName) $(CurrentSelection)
command.name.9.*.f=convert FORTH registers to TI's ones
- command.9.*.f=gema -line -t -f $FF/inc/FastForthREGtoTI.pat $(FileNameExt) $(FileNameExt)
+ command.9.*.f=gema -line -t -f ./inc/FastForthREGtoTI.pat $(FileNameExt) $(FileNameExt)
command.name.10.*.f=convert TI registers to FORTH's ones
- command.10.*.f=gema -line -t -f $FF/inc/tiREGtoFastForth.pat $(FileNameExt) $(FileNameExt)
+ command.10.*.f=gema -line -t -f ./inc/tiREGtoFastForth.pat $(FileNameExt) $(FileNameExt)
command.name.0.*.4th=send file.4th to target without ECHO
- command.0.*.4th=$FF/config/msp430/SendSource $(FileDir)/$(FileName).4th NOECHO
+ command.0.*.4th=./config/msp430/SendSource $(FileDir)/$(FileName).4th NOECHO
command.name.1.*.4th=send file.4th to target with ECHO
- command.1.*.4th=$FF/config/msp430/SendSource $(FileDir)/$(FileName).4th ECHO
+ command.1.*.4th=./config/msp430/SendSource $(FileDir)/$(FileName).4th ECHO
command.name.2.*.4th=send file.4th to target with HALFDUPLEX
- command.2.*.4th=$FF/config/msp430/SendSource $(FileDir)/$(FileName).4th HALF
+ command.2.*.4th=./config/msp430/SendSource $(FileDir)/$(FileName).4th HALF
command.name.3.*.4th=send file.4th to target SD_CARD
- command.3.*.4th=$FF/config/CopyTo_SD_Card $(FileDir)/$(FileName).4th
+ command.3.*.4th=./config/CopyTo_SD_Card $(FileDir)/$(FileName).4th
command.name.4.*.4th=convert TI registers to FORTH's ones
- command.4.*.4th=gema -line -t -f $FF/inc/TiREGtoFastForth.pat $(FileNameExt) $(FileNameExt)
+ command.4.*.4th=gema -line -t -f ./inc/TiREGtoFastForth.pat $(FileNameExt) $(FileNameExt)
command.name.5.*.4th=convert FORTH registers to TI's ones
- command.5.*.4th=gema -line -t -f $FF/inc/FastForthREGtoTI.pat $(FileNameExt) $(FileNameExt)
+ command.5.*.4th=gema -line -t -f ./inc/FastForthREGtoTI.pat $(FileNameExt) $(FileNameExt)
# Microsoft Error
style.errorlist.3=fore:#808000
# command or return status
-style.errorlist.4=fore:#0000FF
+# style.errorlist.4=fore:#0000FF
# Borland error and warning messages
style.errorlist.5=fore:#B06000
# perl error and warning messages
device=$1
if [ ${device:0:16} == "MSP_EXP430FR5739" ]; then
device=MSP430FR5739
-elif [ ${device:0:16} == "MSP_EXP430FR5969" ]; then
+#elif [ ${device:0:16} == "MSP_EXP430FR5969" ]; then
+elif [ $device == "MSP_EXP430FR5969" ]; then
device=MSP430FR5969
elif [ ${device:0:16} == "MSP_EXP430FR5994" ]; then
device=MSP430FR5994
elif [ ${device:0:16} == "MSP_EXP430FR2355" ]; then
device=MSP430FR2355
fi
-echo $device
-echo $1
-/usr/local/MSPFlasher/MSP430Flasher -s -n $device -v -w "$FF/binaries/$1.hex" -z [RESET,VCC]
+echo
+echo target: $1, device: $device
+echo
+$HOME/ti/MSPFlasher_1.3.20/MSP430Flasher -s -n $device -v -w "./binaries/$1.txt" -z [RESET,VCC]
--- /dev/null
+@4000 B0 12 44 41 12 D2 06 18 FB 3F 2F 83 8F 4E 00 00
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+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+q
-; -*- coding: utf-8 -*-
;
;-------------------------------------------------------------------------------
-; Vingt fois sur le métier remettez votre ouvrage,
+; Vingt fois sur le métier remettez votre ouvrage,
; Polissez-le sans cesse, et le repolissez,
-; Ajoutez quelquefois, et souvent effacez. Boileau, L'Art poétique
+; Ajoutez quelquefois, et souvent effacez. Boileau, L'Art poétique
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
.listing purecode ; reduce listing to true conditionnal parts
MACEXP_DFT noif ; reduce macros listing to true part
- .PAGE 0 ;
+ .PAGE 0 ; listing without pagination
;-------------------------------------------------------------------------------
-VER .equ "V308" ; FORTH version
+VER .equ "V309" ; FORTH version
;===============================================================================
; before assembling or programming you must set TARGET in scite param1 (SHIFT+F8)
; according to the selected (uncommented) TARGET below
;===============================================================================
-
-;===============================================================================
-; FAST FORTH has a minimalistic footprint to enable its use from 8k FRAM devices
-; kernel size below are for 8MHz, DTC=1, THREADS=1, 4WIRES (RTS) options
-;===============================================================================
-; TARGET ; ;INFO+VECTORS+ MAIN bytes
-;MSP_EXP430FR5739 ; compile for MSP-EXP430FR5739 launchpad ; 64 + 128 + 2768 bytes
-;MSP_EXP430FR5969 ; compile for MSP-EXP430FR5969 launchpad ; 64 + 128 + 2760 bytes
-;MSP_EXP430FR5994 ; compile for MSP-EXP430FR5994 launchpad ; 64 + 128 + 2780 bytes
-;MSP_EXP430FR6989 ; compile for MSP-EXP430FR6989 launchpad ; 64 + 128 + 2782 bytes
-;MSP_EXP430FR4133 ; compile for MSP-EXP430FR4133 launchpad ; 64 + 128 + 2822 bytes
-;MSP_EXP430FR2355 ; compile for MSP-EXP430FR2355 launchpad ; 64 + 128 + 2756 bytes
-;MSP_EXP430FR2433 ; compile for MSP-EXP430FR2433 launchpad ; 64 + 128 + 2746 bytes
-;LP_MSP430FR2476 ; compile for LP_MSP430FR2476 launchpad ; 64 + 128 + 2760 bytes
-CHIPSTICK_FR2433; ; compile for "CHIPSTICK" of M. Ken BOAK ; 64 + 128 + 2748 bytes
+; TARGET ;
+;MSP_EXP430FR5739 ; compile for MSP-EXP430FR5739 launchpad
+;MSP_EXP430FR5969 ; compile for MSP-EXP430FR5969 launchpad
+MSP_EXP430FR5994 ;; compile for MSP-EXP430FR5994 launchpad
+;MSP_EXP430FR6989 ; compile for MSP-EXP430FR6989 launchpad
+;MSP_EXP430FR4133 ; compile for MSP-EXP430FR4133 launchpad
+;MSP_EXP430FR2355 ; compile for MSP-EXP430FR2355 launchpad
+;MSP_EXP430FR2433 ; compile for MSP-EXP430FR2433 launchpad
+;LP_MSP430FR2476 ; compile for LP_MSP430FR2476 launchpad
+;CHIPSTICK_FR2433 ; compile for "CHIPSTICK" of M. Ken BOAK
; choose DTC model (Direct Threaded Code); if you don't know, choose 2, because DOCOL routine without using scratch register
DTC .equ 2 ; DTC model 1 : DOCOL = CALL rDOCOL 14 cycles 1 word shortest DTC model
; DTC model 2 : DOCOL = PUSH IP, CALL rEXIT 13 cycles 2 words best compromize to mix FORTH/ASM code
; DTC model 3 : inlined DOCOL 9 cycles 4 words fastest
-THREADS .equ 16 ; 1, 2 , 4 , 8 , 16, 32 search entries in dictionnary.
+THREADS .equ 16 ; 1, 2 , 4 , 8 , 16, 32 search entries in word-set.
; +0, +28, +48, +56, +90, +154 bytes, usefull to speed up compilation;
; the FORTH interpreter is speed up by about a square root factor of THREADS.
-FREQUENCY .equ 1 ; fully tested at 1,2,4,8,16,24 MHz (24 MHz for MSP430FR57xx,MSP430FR2355)
+FREQUENCY .equ 1 ; fully tested at 1,2,4,8,16 MHz, plus 24 MHz for MSP430FR57xx,MSP430FR2355
-;===============================================================================
-TERMINAL_I2C ; uncomment to select I2C_Master TERMINAL instead of UART TERMINAL
-;===============================================================================
+; ============================================================================
+;TERMINAL_I2C ; - 12 bytes; uncomment to select I2C_Master TERMINAL instead of UART TERMINAL
+; ============================================================================
.IFDEF TERMINAL_I2C
MYSLAVEADR .equ 18
-;===============================================================================
+; ============================================================================
.ELSE ; UART TERMINAL
-;===============================================================================
-TERMINALBAUDRATE .equ 115200 ; choose value considering the frequency and the UART2USB bridge, see explanations below.
-;-------------------------------------------------------------------------------
-TERMINAL3WIRES ; + 18 bytes enable 3 wires (GND,TX,RX) with XON/XOFF software flow control (PL2303TA/HXD, CP2102)
-TERMINAL4WIRES ; + 12 bytes enable 4 wires with hardware flow control on RX with RTS (PL2303TA/HXD, FT232RL)
-;TERMINAL5WIRES ; + 10 bytes enable 5 wires with hardware flow control on RX/TX with RTS/CTS (PL2303TA/HXD, FT232RL)...
-;-------------------------------------------------------------------------------
+; ============================================================================
+TERMINALBAUDRATE .equ 115200 ; choose value considering the frequency, see explanations below.
+; ----------------------------------------------------------------------------
+TERMINAL3WIRES ; ; + 18 bytes enable 3 wires XON/XOFF software flow control
+TERMINAL4WIRES ; ; + 12 bytes enable 4 wires RTS hardware flow control
+;TERMINAL5WIRES ; + 10 bytes enable 5 wires RTS/CTS hardware flow control
+; ----------------------------------------------------------------------------
;HALFDUPLEX ; switch to UART half duplex TERMINAL input
-;===============================================================================
+; ============================================================================
.ENDIF
+
;===============================================================================
-; MINIMAL ADDONS if you want a canonical FORTH: CORE_COMPLEMENT + CONDCOMP + PROMPT
+; KERNEL ADDONs that can't be added later
;===============================================================================
-; MINIMAL ADDONS for FAST FORTH: MSP430ASSEMBLER + CONDCOMP
+DOUBLE_INPUT ;; + 60 bytes : adds the interpretation engine for double numbers (numbers with dot)
+FIXPOINT_INPUT ;; + 68 bytes : adds the interpretation engine for Q15.16 numbers (numbers with comma)
+SD_CARD_LOADER ; + 1766 bytes : to load source files from SD_card
+BOOTLOADER ; + 132 bytes : includes in WARM process the bootloader SD_CARD\BOOT.4TH.
+SD_CARD_READ_WRITE ; + 1148 bytes : to read, create, write and del files + copy text files from PC to target SD_Card
+;EXTENDED_MEM ; + 506 bytes : allows assembler to execute code up to 1MB (LARGE_CODE).
+;EXTENDED_ASM ; + 1212 bytes : extended assembler to 20 bits datas (LARGE_DATA + LARGE_CODE).
+;VOCABULARY_SET ; + 162 bytes : adds words: WORDSET FORTH hidden PREVIOUS ONLY DEFINITIONS
+;PROMPT ; + 18 bytes : to display prompt "ok ", for FORTH addicts.
;===============================================================================
-
-;-------------------------------------------------------------------------------
-; KERNEL ADDONs that can't be added later
-;-------------------------------------------------------------------------------
-MSP430ASSEMBLER ; + 1812 bytes : adds embedded assembler with TI syntax; without, you can do all but bigger and slower...
-CONDCOMP ; + 306 bytes : adds conditionnal compilation [IF] [ELSE] [THEN] [DEFINED] [UNDEFINED]
-DOUBLE_INPUT ; + 56 bytes : adds the interpretation engine for double numbers (numbers with dot)
-FIXPOINT_INPUT ; + 74 bytes : adds the interpretation engine for Q15.16 numbers (numbers with comma)
-;DEFERRED ; + 124 bytes : adds DEFER IS :NONAME CODENNM (CODE_No_NaMe), useful for interrupts start and stop.
-;EXTENDED_MEM ; + 740 bytes : allows assembler to execute code up to 1MB (LARGE_CODE).
-;EXTENDED_ASM ; + 1260 bytes : extended assembler to 20 bits datas (LARGE_DATA + LARGE_CODE).
-;SD_CARD_LOADER ; + 1766 bytes : to load source files from SD_card
-;SD_CARD_READ_WRITE ; + 1148 bytes : to read, create, write and del files + copy text files from PC to target SD_Card
-;BOOTLOADER ; + 132 bytes : includes in WARM process the bootloader SD_CARD\BOOT.4TH.
-;VOCABULARY_SET ; + 174 bytes : adds words: VOCABULARY FORTH ASSEMBLER ALSO PREVIOUS ONLY DEFINITIONS (FORTH83)
-;PROMPT ; + 22 bytes : to display prompt "ok "
-;-------------------------------------------------------------------------------
-
-;-------------------------------------------------------------------------------
-; OPTIONS that can be added later by downloading their source file >-----------------------+
-; however, added here, they are protected against WIPE and Deep Reset. |
-;------------------------------------------------------------------------------- v
-;CORE_COMPLEMENT ; + 1974 bytes : MINIMAL OPTIONS if you want a conventional FORTH CORECOMP.f
-;FIXPOINT ; + 422/528 bytes add HOLDS F+ F- F/ F* F#S F. S>F FIXPOINT.f
-;UTILITY ; + 434/524 bytes (1/16threads) : add .S .RS WORDS U.R DUMP ? UTILITY.f
-;SD_TOOLS ; + 142 bytes for trivial DIR, FAT, CLUSTR. and SECTOR. view, (adds UTILITY) SD_TOOLS.f
.save
.listing off
;===============================================================================
; up to 460800 Bds (2MHz)
; up to 921600 Bds (4MHz)
; up to 1843200 Bds (8MHz)
-; up to 3 MBds (12MHz,PL2303HXD with shortened cable < 20cm)
-; up to 4 MBds (16MHz,PL2303HXD with shortened cable < 20cm)
-; up to 5 MBds (20MHz,PL2303HXD with shortened cable < 20cm)
+; up to 3 MBds (12MHz,PL2303HXD with shortened cable < 80cm)
+; up to 4 MBds (16MHz,PL2303HXD with shortened cable < 60cm)
+; up to 5 MBds (20MHz,PL2303HXD with shortened cable < 40cm)
; up to 6 MBds (24MHz,PL2303HXD with shortened cable < 20cm)
; UARTtoUSB module with Silabs CP2102 (supply current = 20 mA)
; TERATERM config terminal : NewLine receive : LF,
; NewLine transmit : CR+LF
-; Size : 128 chars x 49 lines (adjust lines to your display)
+; Size : 80 chars x 44 lines (adjust lines to your display)
; TERATERM config serial port : TERMINALBAUDRATE value,
; 8bits, no parity, 1Stopbit,
; don't forget : save new TERATERM configuration !
; in fact, compared to using a UART USB bridge, only the COMx port is to be updated.
-; ------------------------------------------------------------------------------
.restore
- .include "ThingsInFirst.inc" ; macros, target definitions, init FORTH variables...
-;-------------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx RAM memory map:
-;-------------------------------------------------------------------------------
-
-;---------------------------;---------
-; name words ; comment
-;---------------------------;---------
-;LSTACK = L0 = LEAVEPTR ; ----- RAM_ORG
- ; |
-LSTACK_LEN .equ 16 ; | grows up
- ; V
- ; ^
-PSTACK_LEN .equ 48 ; | grows down
- ; |
-;PSTACK=S0 ; ----- RAM_ORG + $80
- ; ^
-RSTACK_LEN .equ 48 ; | grows down
- ; |
-;RSTACK=R0 ; ----- RAM_ORG + $E0
-
-;---------------------------;---------
-; names bytes ; comments
-;---------------------------;---------
-; PAD_I2CADR ; ----- RAM_ORG + $E0
-; PAD_I2CCNT ;
-; PAD < ----- RAM_ORG + $E4
- ; |
-PAD_LEN .equ 84 ; | grows up (ans spec. : PAD >= 84 chars)
- ; v
-; TIB_I2CADR ; ----- RAM_ORG + $138
-; TIB_I2CCNT ;
-; TIB < ----- RAM_ORG + $13C
- ; |
-TIB_LEN .equ 84 ; | grows up (ans spec. : TIB >= 80 chars)
- ; v
-; HOLDS_ORG < ------RAM_ORG + $190
- ; ^
-HOLD_LEN .equ 34 ; | grows down (ans spec. : HOLD_LEN >= (2*n) + 2 char, with n = 16 bits/cell
- ; |
-; HOLD_BASE < ----- RAM_ORG + $1B2
- ;
- ; system variables
- ;
- ; ----- RAM_ORG + $1E0
- ;
- ; 28 bytes free
- ;
-; SD_BUF_I2CADR < ----- RAM_ORG + $1FC
-; SD_BUF_I2CCNT ;
-; SD_BUF < ----- RAM_ORG + $200
- ;
-SD_BUF_LEN .equ 200h ; 512 bytes buffer
- ;
-; SD_BUF_END < ----- RAM_ORG + $400
-
-LSTACK .equ RAM_ORG
-LEAVEPTR .equ LSTACK ; Leave-stack pointer
-PSTACK .equ LSTACK+(LSTACK_LEN*2)+(PSTACK_LEN*2)
-RSTACK .equ PSTACK+(RSTACK_LEN*2)
-PAD_I2CADR .equ PAD_ORG-4
-PAD_I2CCNT .equ PAD_ORG-2
-PAD_ORG .equ RSTACK+4
-TIB_I2CADR .equ TIB_ORG-4
-TIB_I2CCNT .equ TIB_ORG-2
-TIB_ORG .equ PAD_ORG+PAD_LEN+4
-HOLDS_ORG .equ TIB_ORG+TIB_LEN
-
-HOLD_BASE .equ HOLDS_ORG+HOLD_LEN
-
-; ----------------------------------------------------
-; RAM_ORG + $1B2 : RAM VARIABLES
-; ----------------------------------------------------
-HP .equ HOLD_BASE ; HOLD ptr
-CAPS .equ HOLD_BASE+2 ; CAPS ON = 32, CAPS OFF = 0
-LAST_NFA .equ HOLD_BASE+4 ; NFA, VOC_PFA, CFA, PSP of last created word
-LAST_THREAD .equ HOLD_BASE+6 ; used by QREVEAL
-LAST_CFA .equ HOLD_BASE+8
-LAST_PSP .equ HOLD_BASE+10
-STATE .equ HOLD_BASE+12 ; Interpreter state
-SOURCE .equ HOLD_BASE+14 ; len, org of input stream
-SOURCE_LEN .equ HOLD_BASE+14
-SOURCE_ORG .equ HOLD_BASE+16
-TOIN .equ HOLD_BASE+18 ; CurrentInputBuffer pointer
-DDP .equ HOLD_BASE+20 ; dictionnary pointer
-LASTVOC .equ HOLD_BASE+22 ; keep VOC-LINK
-CONTEXT .equ HOLD_BASE+24 ; CONTEXT dictionnary space (8 CELLS)
-CURRENT .equ HOLD_BASE+40 ; CURRENT dictionnary ptr
-BASE .equ HOLD_BASE+42
-LINE .equ HOLD_BASE+44 ; line in interpretation (see NOECHO, ECHO)
-
-; --------------------------;
-; RAM_ORG + $1E0 : free use ;
-; --------------------------;
- .IFDEF SD_CARD_LOADER
-; --------------------------------------------------
-; RAM_ORG + $1FC : RAM SD_CARD SD_BUF 4 + 512 bytes
-; --------------------------------------------------
-SD_BUF_I2CADR .equ SD_BUF-4
-SD_BUF_I2CCNT .equ SD_BUF-2
-SD_BUF .equ HOLD_BASE+78
-SD_BUF_END .equ SD_BUF + 200h ; 512bytes
- .ENDIF
-
- .org INFO_ORG
-;-------------------------------------------------------------------------------
-; INFO(DCBA) >= 256 bytes memory map (FRAM) :
+; ------------------------------------------------------------------------------
+ .include "ThingsInFirst.inc" ; macros, target definitions, RAM & INFO variables...
;-------------------------------------------------------------------------------
-; FRAM INFO: KERNEL INIT CONSTANTS and VARIABLES
-; ----------------------------------------------
-FREQ_KHZ .word FREQUENCY*1000 ; used to stabilize MCLK before start, see MSP430FRxxxx.asm
- .IFDEF TERMINAL_I2C
-I2CSLAVEADR .word MYSLAVEADR ; on MSP430FR2xxx devices with BSL I2C, Slave address is FFA0h
-I2CSLAVEADR1 .word 0
-LPM_MODE .word GIE+LPM4 ; LPM4 is the default mode for I2C TERMINAL
- .ELSE ; TERMINAL_UART
-TERMBRW_RST .word TERMBRW_INI ; set by TERMINALBAUDRATE.inc
-TERMMCTLW_RST .word TERMMCTLW_INI ; set by TERMINALBAUDRATE.inc
-LPM_MODE .word GIE+LPM0 ; LPM0 is the default mode for UART TERMINAL
- .ENDIF
-RSTIV_MEM .word -7 ; to do RESET = -3 when compiling new kernel
-RST_DP .word ROMDICT ; define RST_STATE
-RST_VOC .word lastvoclink ; define RST_STATE
-FORTHVERSION .word VAL(SUBSTR(VER,1,0)); used by WARM
-INI_THREAD .word THREADS ; used by FF_SPECS.f, UTILITY.f
-FORTHADDON .word FADDON ; used by FF_SPECS.f and to secure donwloading of any application.f files.
-; --------------------------------------;
-WIPE_INI ; MOV #WIPE_INI,X ; WIPE_INI constants are in FRAM INFO= DEEP_RESET init
-; --------------------------------------;
- .IFNDEF SD_CARD_LOADER
-WIPE_COLD .word COLD_TERM ; MOV @X+,&PFACOLD ; COLD_TERM --> PFACOLD
-WIPE_INI_FORTH .word RET_ADR ; MOV @X+,&PFA_INI_FORTH; RET_ADR --> PFA_INI_FORTH
-WIPE_SLEEP .word RXON ; MOV @X+,&PFASLEEP ; RXON --> PFASLEEP
-WIPE_WARM .word INIT_TERM ; MOV @X+,&PFAWARM ; INIT_TERM --> PFAWARM
- .ELSE
-WIPE_COLD .word COLD_TERM ; MOV @X+,&PFACOLD ; COLD_TERM --> PFACOLD
-WIPE_INI_FORTH .word INI_SOFT_SD ; MOV @X+,&PFA_INI_FORTH; INI_SOFT_SD --> PFA_INI_FORTH
-WIPE_SLEEP .word RXON ; MOV @X+,&PFASLEEP ; RXON --> PFASLEEP
-WIPE_WARM .word INI_HARD_SD ; MOV @X+,&PFAWARM ; INI_HARD_SD --> PFAWARM
- .ENDIF
-WIPE_TERM_INT .word TERMINAL_INT ; MOV @X+,&TERM_VEC ; TERMINAL_INT --> TERM_VEC
-WIPE_DP .word ROMDICT ; MOV @X+,&RST_DP ; ROMDICT --> RST_DP
-WIPE_VOC .word lastvoclink ; MOV @X+,&RST_VOC ; lastvoclink --> RST_VOC
-; --------------------------------------;
-INI_FORTH_INI ; MOV #INI_FORTH_INI,X, to reset all kernel variables
-; --------------------------------------;
-INI_FORTH_ACCEPT .word BODYACCEPT ; MOV @X+,&PFAACCEPT ; BODYACCEPT --> PFAACCEPT
-INI_FORTH_CR .word BODYCR ; MOV @X+,&PFACR ; BODYCR --> PFACR
-INI_FORTH_EMIT .word BODYEMIT ; MOV @X+,&PFAEMIT ; BODYEMIT --> PFAEMIT
-INI_FORTH_KEY .word BODYKEY ; MOV @X+,&PFAKEY ; BODYKEY --> PFAKEY
-INI_FORTH_CIB .word TIB_ORG ; MOV @X+,&CIB_ADR ; TIB_ORG --> CIB_ADR
-; --------------------------------------;
-HALF_FORTH_INI ; MOV #HALF_FORTH_INI,X to preserve defered words
-; --------------------------------------;
- .SWITCH DTC
- .CASE 1
-INI_FORTH_COL .word xDOCOL ; MOV @X+,rDOCOL ; init rDOCOL (R4)
- .CASE 2
-INI_FORTH_COL .word EXIT ; MOV @X+,rDOCOL ; init rDOCOL (R4)
- .CASE 3
- .word 0 ; MOV @X+,R4 ; rDOCOL doesn't exist
- .ENDCASE
-INI_FORTH_DOES .word xDODOES ; MOV @X+,rDODOES ; init rDODOES (R5)
-INI_FORTH_CON .word xDOCON ; MOV @X+,rDOCON ; init rDOCON (R6)
-INI_FORTH_VAR .word RFROM ; MOV @X+,rDOVAR ; init rDOVAR (R7)
-INI_FORTH_CAPS .word 32 ; MOV @X+,&CAPS ; 32 --> CAPS
-INI_FORTH_BASE .word 10 ; MOV @X+,&BASE ; 10 --> BASE
-; --------------------------------------;
-USER_END .word 0
- .word 0
- .word 0
- .word 0
-
-
- .IFDEF SD_CARD_LOADER
-; ---------------------------------------
-; VARIABLES that should be in RAM
-; ---------------------------------------
- .IF RAM_LEN < 2048 ; if RAM < 2K (FR57xx) the variables below are in INFO space (FRAM)
-SD_ORG .equ INFO_ORG+5Ah ;
- .ELSE ; if RAM >= 2k the variables below are in RAM
-SD_ORG .equ SD_BUF_END+2 ; 1 word guard
- .ENDIF
-
- .org SD_ORG
-; ---------------------------------------
-; FAT FileSystemInfos
-; ---------------------------------------
-FATtype .equ SD_ORG+0
-BS_FirstSectorL .equ SD_ORG+2 ; init by SD_Init, used by RW_Sector_CMD
-BS_FirstSectorH .equ SD_ORG+4 ; init by SD_Init, used by RW_Sector_CMD
-OrgFAT1 .equ SD_ORG+6 ; init by SD_Init,
-FATSize .equ SD_ORG+8 ; init by SD_Init,
-OrgFAT2 .equ SD_ORG+10 ; init by SD_Init,
-OrgRootDIR .equ SD_ORG+12 ; init by SD_Init, (FAT16 specific)
-OrgClusters .equ SD_ORG+14 ; init by SD_Init, Sector of Cluster 0
-SecPerClus .equ SD_ORG+16 ; init by SD_Init, byte size
-
-; ---------------------------------------
-; SD command
-; ---------------------------------------
-SD_LOW_LEVEL .equ SD_ORG+18
-SD_CMD_FRM .equ SD_LOW_LEVEL ; SD_CMDx inverted frame ${CRC7,ll,LL,hh,HH,CMD}
-SectorL .equ SD_LOW_LEVEL+6
-SectorH .equ SD_LOW_LEVEL+8
-; ---------------------------------------
-; SD_BUF management
-; ---------------------------------------
-BufferPtr .equ SD_LOW_LEVEL+10
-BufferLen .equ SD_LOW_LEVEL+12
-; ---------------------------------------
-; FAT entry
-; ---------------------------------------
-SD_FAT_LEVEL .equ SD_LOW_LEVEL+14
-ClusterL .equ SD_FAT_LEVEL ;
-ClusterH .equ SD_FAT_LEVEL+2 ;
-NewClusterL .equ SD_FAT_LEVEL+4 ;
-NewClusterH .equ SD_FAT_LEVEL+6 ;
-CurFATsector .equ SD_FAT_LEVEL+8 ; current FATSector of last free cluster
-; ---------------------------------------
-; DIR entry
-; ---------------------------------------
-DIRClusterL .equ SD_FAT_LEVEL+10 ; contains the Cluster of current directory ; = 1 as FAT16 root directory
-DIRClusterH .equ SD_FAT_LEVEL+12 ; contains the Cluster of current directory ; = 1 as FAT16 root directory
-EntryOfst .equ SD_FAT_LEVEL+14
-; ---------------------------------------
-; Handle Pointer
-; ---------------------------------------
-CurrentHdl .equ SD_FAT_LEVEL+16 ; contains the address of the last opened file structure, or 0
-; ---------------------------------------
-; Load file operation
-; ---------------------------------------
-pathname .equ SD_FAT_LEVEL+18 ; start address
-EndOfPath .equ SD_FAT_LEVEL+20 ; end address
-; ---------------------------------------
-; Handle structure
-; ---------------------------------------
-FirstHandle .equ SD_FAT_LEVEL+22
-; three handle tokens :
-; HDLB_Token= 0 : free handle
-; = 1 : file to read
-; = 2 : file updated (write)
-; =-1 : LOAD"ed file (source file)
-
-; offset values
-HDLW_PrevHDL .equ 0 ; previous handle
-HDLB_Token .equ 2 ; token
-HDLB_ClustOfst .equ 3 ; Current sector offset in current cluster (Byte)
-HDLL_DIRsect .equ 4 ; Dir SectorL
-HDLH_DIRsect .equ 6 ; Dir SectorH
-HDLW_DIRofst .equ 8 ; SD_BUF offset of Dir entry
-HDLL_FirstClus .equ 10 ; File First ClusterLo (identify the file)
-HDLH_FirstClus .equ 12 ; File First ClusterHi (identify the file)
-HDLL_CurClust .equ 14 ; Current ClusterLo
-HDLH_CurClust .equ 16 ; Current ClusterHi
-HDLL_CurSize .equ 18 ; written size / not yet read size (Long)
-HDLH_CurSize .equ 20 ; written size / not yet read size (Long)
-HDLW_BUFofst .equ 22 ; SD_BUF offset ; used by LOAD"
-HDLW_PrevLEN .equ 24 ; previous LEN
-HDLW_PrevORG .equ 26 ; previous ORG
-
- .IF RAM_LEN < 2048 ; due to the lack of RAM, only 4 handles and PAD replaces SDIB
-HandleMax .equ 4 ; and not 8 to respect INFO size (FRAM)
-HandleLenght .equ 28
-HandlesLen .equ handleMax*HandleLenght
-HandleEnd .equ FirstHandle+handleMax*HandleLenght
-SD_END .equ HandleEnd
-SDIB_I2CADR .equ PAD_ORG-4
-SDIB_I2CCNT .equ PAD_ORG-2
-SDIB_ORG .equ PAD_ORG
- .ELSE ; RAM_Size >= 2k all is in RAM
-HandleMax .equ 8
-HandleLenght .equ 28
-HandlesLen .equ handleMax*HandleLenght
-HandleEnd .equ FirstHandle+handleMax*HandleLenght
-SDIB_I2CADR .equ SDIB_ORG-4
-SDIB_I2CCNT .equ SDIB_ORG-2
-SDIB_ORG .equ HandleEnd+4
-SDIB_LEN .equ 84 ; = TIB_LEN = PAD_LEN
-SD_END .equ SDIB_ORG+SDIB_LEN
- .ENDIF ; RAM_Size
-SD_LEN .equ SD_END-SD_ORG
- .ENDIF ; SD_CARD_LOADER
-; --------------------------;
-; INFO_ORG + $40 : free use ;
-; --------------------------;
-
.org MAIN_ORG
;-------------------------------------------------------------------------------
; DTCforthMSP430FR5xxx program (FRAM) memory
; Users can access them via declarations made in \inc\MSP430FRxxxx.pat
;
;###############################################################################
-; ╦┌┐┌┌┬┐┌─┐┬─┐┬─┐┬ ┬┌─┐┌┬┐┌─┐ ┌─┐┌─┐┬ ┬ ┌┬┐┌─┐┬ ┬┌┐┌ ┬ ┬┌─┐┬─┐┌─┐
-; ║│││ │ ├┤ ├┬┘├┬┘│ │├─┘ │ └─┐ ├┤ ├─┤│ │ │││ │││││││ ├─┤├┤ ├┬┘├┤
-; ╩┘└┘ ┴ └─┘┴└─┴└─└─┘┴ ┴ └─┘ └ ┴ ┴┴─┘┴─┘ ─┴┘└─┘└┴┘┘└┘ ┴ ┴└─┘┴└─└─┘
-;###############################################################################
-SLEEP
; here, FAST FORTH sleeps, waiting any interrupt. With LPM4, supply current is below 1uA.
; IP,S,T,W,X,Y registers (R13 to R8) are free...
; ...and so TOS, PSP and RSP stacks within their rules of use.
;
+; ; remember: to force SLEEP execution, you must end any interrupt routine with :
+; ; BIC #%0_1111_000,0(RSP) ; 4~
+; ; RETI ; 5~ 4 words
+; ;
; remember: to force SLEEP execution, you must end any interrupt routine with :
; MOV @RSP+,SR ; 2~
-; BIC #%1111_1000,SR ; 2~
+; BIC #%0_1111_000,SR ; 2~
; RET ; 3~ 4 words
;
-; or faster (but return SR flags will be lost) with:
+; or faster (but SR flags will be lost):
; ADD #2 RSP ; 1~
; RET ; 3~ 2 words
;
- CALL @PC+ ;4 SLEEP first calls BACKGND_APP
-PFASLEEP .word RXON ; BACKGND_DEF = RXON as default BACKGND_APP; value set by WIPE.
+SLEEP CALL &SLEEP_APP ; BACKGND_DEF = UART_RXON/I2C_ACCEPT as default BACKGND_APP; value set by DEEP.
BIS &LPM_MODE,SR ;2 enter in LPMx mode with GIE=1
- JMP SLEEP ;2 instruction always executed before CPU asleeping.
-;
+ JMP SLEEP ;2 return off any interrupts else TERMINAL_INT
+;
;###############################################################################
; ------------------------------------------------------------------------------
; COMPILING OPERATORS
; ------------------------------------------------------------------------------
-; Primitive LIT; compiled by LITERAL
+; Primitive lit; compiled by LITERAL
; lit -- x fetch inline literal to stack
; This is the run-time code of LITERAL.
-; FORTHWORD "LIT"
-LIT SUB #2,PSP ; 2 push old TOS..
- MOV TOS,0(PSP) ; 3 ..onto stack
- MOV @IP+,TOS ; 2 fetch new TOS value
- MOV @IP+,PC ; 4 NEXT
-
+lit SUB #2,PSP ; 1 save old TOS..
+ MOV TOS,0(PSP) ; 3 ..onto stack
+ MOV @IP+,TOS ; 2 fetch new TOS value
+ MOV @IP+,PC ; 4 NEXT
+
+TWODUP_XSQUOTE ; used by [ELSE]
+ MOV TOS,-2(PSP) ; 3
+ MOV @PSP,-4(PSP) ; 4
+ SUB #4,PSP ; 1
; Primitive XSQUOTE; compiled by SQUOTE
; (S") -- addr u run-time code to get address and length of a compiled string.
-XSQUOTE SUB #4,PSP ; 1 -- x x TOS ; push old TOS on stack
- MOV TOS,2(PSP) ; 3 -- TOS x x ; and reserve one cell on stack
- MOV.B @IP+,TOS ; 2 -- x u ; u = lenght of string
- MOV IP,0(PSP) ; 3 -- addr u IP is odd...
- ADD TOS,IP ; 1 -- addr u IP=addr+u=addr(end_of_string)
- BIT #1,IP ; 1 -- addr u IP=addr+u Carry set/clear if odd/even
- ADDC #0,IP ; 1 -- addr u IP=addr+u aligned
- MOV @IP+,PC ; 4 16~
+XSQUOTE SUB #4,PSP ; 1 push old TOS on stack
+ MOV TOS,2(PSP) ; 3 and reserve one cell on stack
+ MOV.B @IP+,TOS ; 2 -- ? u u = lenght of string
+ MOV IP,0(PSP) ; 3 -- addr u IP is odd...
+ ADD TOS,IP ; 1 -- addr u IP=addr+u=addr(end_of_string)
+ BIT #1,IP ; 1 -- addr u IP=addr+u Carry set/clear if odd/even
+ ADDC #0,IP ; 1 -- addr u IP=addr+u aligned
+ MOV @IP+,PC ; 4 16~
; https://forth-standard.org/standard/core/HERE
-; HERE -- addr returns memory ptr
-HERE SUB #2,PSP
+; HERE -- addr returns memory program ptr
+HEREXEC SUB #2,PSP
MOV TOS,0(PSP)
- MOV &DDP,TOS
+ MOV &DP,TOS
MOV @IP+,PC
-;-------------------------------------------------------------------------------
-; BRANCH run-time
-;-------------------------------------------------------------------------------
-; Primitive QFBRAN; compiled by IF UNTIL
-;Z ?FalseBranch x -- ; branch if TOS is FALSE (TOS = 0)
-QFBRAN CMP #0,TOS ; 1 test TOS value
- MOV @PSP+,TOS ; 2 pop new TOS value (doesn't change flags)
- JNZ SKIPBRANCH ; 2 if TOS was <> 0, skip the branch; 10 cycles
-; Primitive BRAN
-;Z branch -- ;
-BRAN MOV @IP,IP ; 2 take the branch destination
- MOV @IP+,PC ; 4 ==> branch taken
-
-;-------------------------------------------------------------------------------
-; LOOP run-time
-;-------------------------------------------------------------------------------
-; Primitive XDO; compiled by DO
-;Z (do) n1|u1 n2|u2 -- R: -- sys1 sys2 run-time code for DO
-; n1|u1=limit, n2|u2=index
-XDO MOV #8000h,X ;2 compute 8000h-limit = "fudge factor"
- SUB @PSP+,X ;2
- MOV TOS,Y ;1 loop ctr = index+fudge
- MOV @PSP+,TOS ;2
- ADD X,Y ;1 Y = INDEX
- PUSHM #2,X ;4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
- MOV @IP+,PC ;4
-; Primitive XPLOOP; compiled by +LOOP
-;Z (+loop) n -- R: sys1 sys2 -- | sys1 sys2
-; run-time code for +LOOP
-; Add n to the loop index. If loop terminates, clean up the
-; return stack and skip the branch. Else take the inline branch.
-XPLOOP ADD TOS,0(RSP) ;4 increment INDEX by TOS value
- MOV @PSP+,TOS ;2 get new TOS, doesn't change flags
-XLOOPNEXT BIT #100h,SR ;2 is overflow bit set?
- JZ BRAN ;2 no overflow = loop
- ADD #4,RSP ;1 empty RSP
-SKIPBRANCH ADD #2,IP ;1 overflow = loop done, skip branch ofs
- MOV @IP+,PC ;4 16~ taken or not taken xloop/loop
-
-; Primitive XLOOP; compiled by LOOP
-;Z (loop) R: sys1 sys2 -- | sys1 sys2
-; run-time code for LOOP
-; Add 1 to the loop index. If loop terminates, clean up the
-; return stack and skip the branch. Else take the inline branch.
-; Note that LOOP terminates when index=8000h.
-XLOOP ADD #1,0(RSP) ;4 increment INDEX
- JMP XLOOPNEXT ;2
-
-; primitive MUSMOD; compiled by ?NUMBER UM/MOD
-; MUSMOD UDVDlo UDVDhi UDIVlo -- UREMlo UQUOTlo UQUOThi
+; primitive MU/MOD; used by ?NUMBER UM/MOD, and M*/ in DOUBLE word set
+; MU/MOD UDVDlo UDVDhi UDIVlo -- UREMlo UQUOTlo UQUOThi
;-------------------------------------------------------------------------------
-; unsigned 32-BIT DiViDend : 16-BIT DIVisor --> 32-BIT QUOTient, 16-BIT REMainder
+; unsigned 32-BIT DiViDend : 16-BIT DIVisor --> 32-BIT QUOTient 16-BIT REMainder
;-------------------------------------------------------------------------------
+; two times faster if 16 bits DiViDend (cases of U. and . among others)
-; 2 times faster if DVDhi = 0 (it's the general case)
-
-; reg division MU/MOD NUM
-; ---------------------------------------------
-; S = DVD(15-0) = ud1lo = ud1lo
-; TOS = DVD(31-16) = ud1hi = ud1hi
-; W = DVD(47-32)/REM = rem = digit --> char --> -[HP]
-; T = DIV(15-0) = BASE = BASE
-; X = QUOTlo = ud2lo = ud2lo
-; Y = QUOThi = ud2hi = ud2hi
+; reg division MU/MOD NUM M*/
+; ---------------------------------------------------------------------
+; S = DVD(15-0) = ud1lo = ud1lo ud1lo
+; TOS = DVD(31-16) = ud1hi = ud1hi ud1mi
+; W = DVD(47-32)/REM = rem = digit --> char --> -[HP] ud1hi
+; T = DIV(15-0) = BASE = BASE ud2
+; X = QUOTlo = ud2lo = ud2lo QUOTlo
+; Y = QUOThi = ud2hi = ud2hi QUOThi
; rDODOES = count
MUSMOD MOV TOS,T ;1 T = DIVlo
MOV #32,rDODOES ;2 init loop count
CMP #0,TOS ;1 DVDhi=0 ?
JNZ MDIV1 ;2 no
-; -----------------------------------------
+; ----------------------------------;
MDIV1DIV2 RRA rDODOES ;1 yes:loop count / 2
MOV S,TOS ;1 DVDhi <-- DVDlo
MOV #0,S ;1 DVDlo <-- 0
MOV #0,X ;1 QUOTlo <-- 0 (to do QUOThi = 0 at the end of division)
-; -----------------------------------------
+; ----------------------------------;
MDIV1 CMP T,W ;1 REMlo U>= DIVlo ?
JNC MDIV2 ;2 no : carry is reset
SUB T,W ;1 yes: REMlo - DIVlo ; carry is set
MOV W,2(PSP) ;3 REMlo in 2(PSP)
MOV X,0(PSP) ;3 QUOTlo in 0(PSP)
MOV Y,TOS ;1 QUOThi in TOS
-RET_ADR MOV @RSP+,PC ;4 35 words, about 473 cycles, not FORTH executable !
+RET_ADR MOV @RSP+,PC ;4 35 words, about 466/246 cycles, not FORTH executable !
-; : SETIB SOURCE 2! 0 >IN ! ;
+; : SETIB SOURCE 2! 0 >IN ! ;
; SETIB org len -- set Input Buffer, shared by INTERPRET and [ELSE]
SETIB MOV TOS,&SOURCE_LEN ; -- org len
MOV @PSP+,&SOURCE_ORG ; -- len
MOV #0,&TOIN ;
- MOV @PSP+,TOS ; --
+DROP MOV @PSP+,TOS ; --
MOV @IP+,PC ;
; REFILL accept one line to input buffer and leave org len' of the filled input buffer
; as it has no more host OS and as waiting command is done by ACCEPT, REFILL's flag is useless
-; : REFILL TIB DUP TIB_LEN ACCEPT ; -- org len' shared by QUIT and [ELSE]
-REFILL SUB #6,PSP ;2
- MOV TOS,4(PSP) ;3
- MOV #TIB_LEN,TOS ;2 -- x x len
+; : REFILL TIB DUP CIB_LEN ACCEPT ; -- org len' shared by QUIT and [ELSE]
+REFILL SUB #4,PSP ;1
+ MOV TOS,2(PSP) ;3 save TOS
+TWODROP_REFILL ; see [ELSE]
+ MOV #CIB_LEN,TOS ;2 -- x len Current Input Buffer LENght
.word 40BFh ; MOV #imm,index(PSP)
-CIB_ADR .word TIB_ORG ; imm=TIB_ORG
- .word 0 ;4 -- x org len index=0 ==> MOV #TIB_ORG,0(PSP)
- MOV @PSP,2(PSP) ;4 -- org org len
+CIB_ORG .word TIB_ORG ; imm=TIB_ORG
+ .word 0 ;4 -- org len index=0 ==> MOV #TIB_ORG,0(PSP)
+ MOV @PSP,-2(PSP) ;4 -- org len
+ SUB #2,PSP ;1 -- org org len
JMP ACCEPT ;2 org org len -- org len'
-XDODOES ; -- addr ; 4 for CALL rDODOES S-- BODY PFA R--
+; Primitive QFBRAN; compiled by IF UNTIL
+;Z ?FalseBranch x -- ; branch if TOS is FALSE (TOS = 0)
+QFBRAN CMP #0,TOS ; 1 test TOS value
+ MOV @PSP+,TOS ; 2 pop new TOS value (doesn't change flags)
+ZBRAN JNZ SKIPBRANCH ; 2 if TOS was <> 0, skip the branch; 10 cycles
+BRAN MOV @IP,IP ; 2 take the branch destination
+ MOV @IP+,PC ; 4 ==> branch taken, 11 cycles
+
+XDODOES ; 4 for CALL rDODOES
SUB #2,PSP ;+1
MOV TOS,0(PSP) ;+3 save TOS on parameters stack
MOV @RSP+,TOS ;+2 TOS = PFA address of master word, i.e. address of its first cell after DOES>
PUSH IP ;+3 save IP on return stack
MOV @TOS+,IP ;+2 IP = CFA of Master word, TOS = BODY address of created word
MOV @IP+,PC ;+4 = 19~ = ITC-2
-
-XDOCON ; 4 for CALL rDOCON S-- CTE PFA R--
- SUB #2,PSP ;+1
+
+XDOCON ; 4 for CALL rDOCON
+ SUB #2,PSP ;+1
MOV TOS,0(PSP) ;+3 save TOS on parameters stack
MOV @RSP+,TOS ;+2 TOS = PFA address of master word CONSTANT
MOV @TOS,TOS ;+2 TOS = CONSTANT value
MOV @IP+,PC ;+4 = 16~ = ITC+4
-; https://forth-standard.org/standard/core/Rfrom
-; R> -- x R: x -- pop from return stack
-RFROM
-XDOVAR ; 4 for CALL rDOVAR ADR -- VAR
- SUB #2,PSP ;+1
- MOV TOS,0(PSP) ;+3
- MOV @RSP+,TOS ;+2
- MOV @IP+,PC ;+4 = 14~ = ITC+4
-
-;-----------------------------------;
-; PUC 6.1: init Forth engine ; common part of QABORT|WARM
-;-----------------------------------;
-INI_FORTH ;
- CALL @PC+ ;
-PFA_INI_FORTH
- .IFNDEF SD_CARD_LOADER
- .word RET_ADR ; INI_SOFT_APP default value
- .ELSE
- .word INI_SOFT_SD ; init software SD_Card : close all handles
- .ENDIF
- MOV #INI_FORTH_INI,X ; in FRAM INFO
+;-----------------------------------;
+INIT_FORTH ; common part of QABORT|WARM|PUC
+;-----------------------------------;
+ CALL &SOFT_APP ; init SOFT_APP
+ MOV @RSP+,IP ; init IP with CALLER next address
+; ;
+ MOV #PUC_ABORT_ORG,X ; FRAM INFO FRAM MAIN
+; ; --------- ---------
MOV @X+,&PFAACCEPT ; BODYACCEPT --> PFAACCEPT
- MOV @X+,&PFACR ; BODYCR --> PFACR
MOV @X+,&PFAEMIT ; BODYEMIT --> PFAEMIT
MOV @X+,&PFAKEY ; BODYKEY --> PFAKEY
- MOV @X+,&CIB_ADR ; TIB_ORG --> CIB_ADR
- MOV @X+,rDOCOL ; --> rDOCOL
- MOV @X+,rDODOES ; xDODOES --> rDODOES
- MOV @X+,rDOCON ; xDOCON --> rDOCON
- MOV @X+,rDOVAR ; RFROM --> rDOVAR
- MOV @X+,&CAPS ; 32 --> CAPS init CAPS ON
- MOV @X+,&BASE ; 10 --> BASE init decimal base
- MOV @RSP+,IP ; init IP with RET_ADR = LIT|WARM from resp. QABORT|RESET
- MOV #SEL_P_R_D,PC ; goto PUC 6.2 to select PWR_STATE|RST_STATE|DEEP_RESET
+ MOV @X+,&CIB_ORG ; TIB_ORG --> CIB_ORG
+; ;
+; ; FRAM INFO REG|RAM
+; ; --------- -------
+ MOV @X+,RSP ; INIT_RSTACK --> R1=RSP
+ MOV @X+,rDOCOL ; INIT_DTC --> R4=rDOCOL
+ MOV @X+,rDODOES ; INIT_DODOES --> R5=rDODOES
+ MOV @X+,rDOCON ; INIT_DOCON --> R6=rDOCON
+ MOV @X+,rDOVAR ; INIT_RFROM --> R7=rDOVAR
+ MOV @X+,&CAPS ; INIT_CAPS --> RAM CAPS init CAPS ON
+ MOV @X+,&BASEADR ; INIT_BASE --> RAM BASE init decimal base
+ MOV @X+,&LEAVEPTR ; INIT_LEAVE --> RAM LEAVEPTR
+ MOV #0,&STATE ; 0 --> RAM STATE
+ MOV #SEL_RST_DEP,PC ; goto PUC 7 to select the user's choice from TOS value: RST_RET|DEEP_RESET
+;-----------------------------------;
.IFDEF TERMINAL_I2C
.include "forthMSP430FR_TERM_I2C.asm"
.include "forthMSP430FR_SD_ACCEPT.asm"
.ENDIF
- .IF DTC = 1 ; DOCOL = CALL rDOCOL, [rDOCOL] = xdocol
+ .IF DTC = 1 ; DOCOL = CALL rDOCOL, [rDOCOL] = XDOCOL
XDOCOL MOV @RSP+,W ; 2
PUSH IP ; 3 save old IP on return stack
MOV W,IP ; 1 set new IP to PFA
FORTHWORD "TYPE"
;https://forth-standard.org/standard/core/TYPE
-;C TYPE adr len -- type string to terminal
-TYPE CMP #0,TOS ;1
- JZ TWODROP ;2 abort fonction
- PUSH IP ;3
+;C TYPE adr u -- type string to terminal
+TYPE PUSH IP ;3
MOV #TYPE_NEXT,IP ;2
-TYPELOOP MOV @PSP,Y ;2 -- adr len Y = adr
- SUB #2,PSP ;1 -- adr x len
- MOV TOS,0(PSP) ;3 -- adr len len
- MOV.B @Y+,TOS ;2 -- adr len char
- MOV Y,2(PSP) ;3 -- adr+1 len char
- MOV &PFAEMIT,PC ;5+17 all scratch registers must be and are free
-TYPE_NEXT .word $+2 ; -- adr+1 len
+; PUSHM #2,X ;4 push X Y
+ MOV @PSP,X ;2 -- adr len X = adr
+TYPELOOP MOV TOS,0(PSP) ;3 -- len len
+ MOV.B @X+,TOS ;2 -- len char
+ JMP EMIT ;2 ~17, S T W regs are free
+TYPE_NEXT mNEXTADR ; -- len
SUB #2,IP ;1 [IP] = TYPE_NEXT
- SUB #1,TOS ;1 -- adr+1 len-1
- JNZ TYPELOOP ;2 37~ EMIT loop
- MOV @RSP+,IP ;3 -- adr+len 0
+ SUB #2,PSP ;1 -- x len
+ SUB.B #1,TOS ;1 -- x len-1 byte operation, according to the /COUNTED-STRING value
+ JNZ TYPELOOP ;2 29~ EMIT loop
+; POPM #2,X ;4 pop Y X
+ MOV @RSP+,IP ;2 -- x 0
TWODROP ADD #2,PSP ;1 -- 0
-DROP MOV @PSP+,TOS ;2 --
+ MOV @PSP+,TOS ;2 --
MOV @IP+,PC ;4
- FORTHWORD "CR"
-; https://forth-standard.org/standard/core/CR
-; CR -- send CR to the output device
-CR MOV @PC+,PC ;3 Code Field Address (CFA) of CR
-PFACR .word BODYCR ; Parameter Field Address (PFA) of CR, with its default value
-BODYCR mDOCOL ; send CR+LF to the default output device
- .word XSQUOTE
- .byte 2,13,10
- .word TYPE,EXIT
+BL CALL rDOCON
+ .word 20h
+
+; ------------------------------------------------------------------------------
+; forthMSP430FR : CONDITIONNAL COMPILATION, 114/109 words
+; ------------------------------------------------------------------------------
+; BRanch if BAD strings COMParaison, [COMPARE ZEROEQUAL QFBRAN] replacement
+BRBADCOMP ; -- addr1 u1 addr2 u2
+ MOV TOS,S ;1 S = u2
+ MOV @PSP+,Y ;2 Y = addr2
+ CMP @PSP+,S ;2 u1 = u2 ?
+ MOV @PSP+,X ;2 X = addr1
+ MOV @PSP+,TOS ;2 --
+ JNZ BRAN ;2 -- branch if u1<>u2, 11+6 cycles
+COMPLOOP CMP.B @Y+,0(X) ;4
+ JNZ BRAN ;2 -- if char1<>char2; branch on first char <> in 17+6 cycles
+ ADD #1,X ;1 addr1+1
+ SUB #1,S ;1 u2-1
+ JNZ COMPLOOP ;2 10 cycles char comp loop
+SKIPBRANCH ADD #2,IP ;1
+ MOV @IP+,PC ;4
+
+; [TWODROP ONEMINUS ?DUP ZEROEQUAL QFBRAN next_comp EXIT] replacement
+BRNEXTCMP ; -- cnt addr u
+ ADD #2,PSP ;1 -- cnt addr TWODROP
+ MOV @PSP+,TOS ;2 -- cnt
+ SUB #1,TOS ;3 -- cnt-1 ONEMINUS
+ JNZ BRAN ;2 -- cnt-1 branch to next comparaison if <> 0
+ JZ DROPEXIT ;19w else DROP EXIT
+
+ FORTHWORDIMM "[ELSE]"
+; https://forth-standard.org/standard/tools/BracketELSE
+; [ELSE] a small and fast definition
+;Compilation:
+;Perform the execution semantics given below.
+;Execution:
+;( "<spaces>name ..." -- )
+;Skipping leading spaces, parse and discard space-delimited words from the parse area,
+;including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
+;until the word [THEN] has been parsed and discarded.
+;If the parse area becomes exhausted, it is refilled as with REFILL.
+BRACKETELSE
+ mDOCOL
+ .word lit,0 ; -- 0
+BRACKETELSE0
+ .word ONEPLUS ; -- cnt+1
+BRACKETELSE1 ;
+ .word BL,WORDD,COUNT ; -- cnt addr u Z=1 if U=0
+ .word ZBRAN,BRACKETELSE5 ; u = 0 if end of line --> refill buffer then loop back
+ .word TWODUP_XSQUOTE ; oui je sais, c'est pas beau mais c'est efficace....
+ .byte 6,"[THEN]" ; -- cnt addr u addr u addr2 u2
+ .word BRBADCOMP,BRACKETELSE2 ; -- cnt addr u if bad string comparaison, jump for next comparaison
+ .word BRNEXTCMP,BRACKETELSE1 ; 2DROP, count-1, loop back if count <> 0, else DROP EXIT
+BRACKETELSE2 ;
+ .word TWODUP_XSQUOTE ;
+ .byte 6,"[ELSE]" ;
+ .word BRBADCOMP,BRACKETELSE3 ; if bad string comparaison, jump for next comparaison
+ .word BRNEXTCMP,BRACKETELSE0 ; 2DROP, count-1, loop back with count+1 if count <> 0, else DROP EXIT
+BRACKETELSE3 ;
+ .word XSQUOTE ;
+ .byte 4,"[IF]" ;
+ .word BRBADCOMP,BRACKETELSE1 ; if bad string comparaison, loop back
+ .word BRAN,BRACKETELSE0 ; else loop back with count+1
+BRACKETELSE5 ;
+;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+; OPTION ; +5 words option
+;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
+ .word XSQUOTE ;
+ .byte 5,13,"ko ",10 ;
+ .word TYPE ; CR ." ko " LF to show false branch of conditionnal compilation
+;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+ .word TWODROP_REFILL ; REFILL Input Buffer with next line
+ .word SETIB ; SET Input Buffer pointers SOURCE_LEN, SOURCE_ORG and clear >IN
+ .word BRAN,BRACKETELSE1 ; then loop back 45/40 words with/without option
+
+ FORTHWORDIMM "[THEN]" ; do nothing
+; https://forth-standard.org/standard/tools/BracketTHEN
+; [THEN]
+BRACKETTHEN MOV @IP+,PC
+
+ FORTHWORDIMM "[IF]" ; flag --
+; https://forth-standard.org/standard/tools/BracketIF
+; [IF]
+;Compilation:
+;Perform the execution semantics given below.
+;Execution: ;( flag | flag "<spaces>name ..." -- )
+;If flag is true, do nothing. Otherwise, skipping leading spaces,
+; parse and discard space-delimited words from the parse area,
+; including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
+; until either the word [ELSE] or the word [THEN] has been parsed and discarded.
+;If the parse area becomes exhausted, it is refilled as with REFILL. [IF] is an immediate word.
+;An ambiguous condition exists if [IF] is POSTPONEd,
+; or if the end of the input buffer is reached and cannot be refilled before the terminating [ELSE] or [THEN] is parsed.
+BRACKETIF CMP #0,TOS ; -- f
+ MOV @PSP+,TOS ; --
+ JZ BRACKETELSE ; if false flag output
+ MOV @IP+,PC ; if true flag output
+
+ FORTHWORDIMM "[DEFINED]"
+; https://forth-standard.org/standard/tools/BracketDEFINED
+; [DEFINED]
+;Compilation:
+;Perform the execution semantics given below.
+;Execution:
+;( "<spaces>name ..." -- flag )
+;Skip leading space delimiters. Parse name delimited by a space.
+;Return a true flag if name is the name of a word that can be found,
+;otherwise return a false flag. [DEFINED] is an immediate word.
+DEFINED mDOCOL
+ .word BL,WORDD,FIND
+ .word NIP,EXIT
+
+
+ FORTHWORDIMM "[UNDEFINED]"
+; https://forth-standard.org/standard/tools/BracketUNDEFINED
+; [UNDEFINED]
+;Compilation:
+;Perform the execution semantics given below.
+;Execution: ( "<spaces>name ..." -- flag )
+;Skip leading space delimiters. Parse name delimited by a space.
+;Return a false flag if name is the name of a word that can be found,
+;otherwise return a true flag.
+ mDOCOL
+ .word BL,WORDD,FIND
+ mNEXTADR
+ MOV @RSP+,IP
+ ADD #2,PSP ; NIP
+; https://forth-standard.org/standard/core/ZeroEqual
+; 0= n/u -- flag return true if TOS=0
+ZEROEQUAL SUB #1,TOS ;1 borrow (clear cy) if TOS was 0
+ SUBC TOS,TOS ;1 TOS=-1 if borrow was set
+ MOV @IP+,PC ;4
;-------------------------------------------------------------------------------
; STACK OPERATIONS
;-------------------------------------------------------------------------------
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "DUP"
- .ENDIF
-; https://forth-standard.org/standard/core/DUP
-; DUP x -- x x duplicate top of stack
-DUP SUB #2,PSP ; 2 push old TOS..
- MOV TOS,0(PSP) ; 3 ..onto stack
- MOV @IP+,PC ; 4
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "?DUP"
- .ENDIF
-; https://forth-standard.org/standard/core/qDUP
-; ?DUP x -- 0 | x x DUP if nonzero
-QDUP CMP #0,TOS ; 2 test for TOS nonzero
- JNZ DUP ; 2
- MOV @IP+,PC ; 4
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "2DUP"
- .ENDIF
-; https://forth-standard.org/standard/core/TwoDUP
-; 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
-TWODUP MOV TOS,-2(PSP) ; 3
- MOV @PSP,-4(PSP); 4
- SUB #4,PSP ; 1
- MOV @IP+,PC ; 4
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "SWAP"
- .ENDIF
; https://forth-standard.org/standard/core/SWAP
-; SWAP x1 x2 -- x2 x1 swap top two items
-SWAP MOV @PSP,W ; 2
- MOV TOS,0(PSP) ; 3
- MOV W,TOS ; 1
- MOV @IP+,PC ; 4
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "DROP"
-; https://forth-standard.org/standard/core/DROP
-; DROP x -- drop top of stack
- MOV @PSP+,TOS ; 2
- MOV @IP+,PC ; 4
-
- FORTHWORD "NIP"
-; https://forth-standard.org/standard/core/NIP
-; NIP x1 x2 -- x2 Drop the first item below the top of stack
- ADD #2,PSP ; 1
- MOV @IP+,PC ; 4
+SWAP PUSH @PSP+ ; 3
- .IFNDEF OVER
- FORTHWORD "OVER"
-;https://forth-standard.org/standard/core/OVER
-;C OVER x1 x2 -- x1 x2 x1
- MOV TOS,-2(PSP) ; 3 -- x1 (x2) x2
- MOV @PSP,TOS ; 2 -- x1 (x2) x1
- SUB #2,PSP ; 1 -- x1 x2 x1
+; https://forth-standard.org/standard/core/Rfrom
+; R> -- x R: x -- pop from return stack
+; VARIABLE run time called by CALL rDOVAR
+RFROM SUB #2,PSP ; 1
+ MOV TOS,0(PSP) ; 3
+ MOV @RSP+,TOS ; 2
MOV @IP+,PC ; 4
- .ENDIF
- FORTHWORD "ROT"
-;https://forth-standard.org/standard/core/ROT
-;C ROT x1 x2 x3 -- x2 x3 x1
- MOV @PSP,W ; 2 fetch x2
- MOV TOS,0(PSP) ; 3 store x3
- MOV 2(PSP),TOS ; 3 fetch x1
- MOV W,2(PSP) ; 3 store x2
+; https://forth-standard.org/standard/core/DUP
+; DUP x -- x x duplicate top of stack
+DUP MOV TOS,-2(PSP) ; 3
+POSTDECR SUB #2,PSP ; 1 post decrement stack...
MOV @IP+,PC ; 4
- FORTHWORD "DEPTH"
- .ENDIF
; https://forth-standard.org/standard/core/DEPTH
; DEPTH -- +n number of items on stack, must leave 0 if stack empty
DEPTH MOV TOS,-2(PSP)
MOV #PSTACK,TOS
SUB PSP,TOS ; PSP-S0--> TOS
RRA TOS ; TOS/2 --> TOS
- SUB #2,PSP ; post decrement stack...
- MOV @IP+,PC
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "R@"
-;https://forth-standard.org/standard/core/RFetch
-;C R@ -- x R: x -- x fetch from rtn stk
- SUB #2,PSP
- MOV TOS,0(PSP)
- MOV @RSP,TOS
- MOV @IP+,PC
+ JMP POSTDECR
- FORTHWORD ">R"
-; https://forth-standard.org/standard/core/toR
-; >R x -- R: -- x push to return stack
-TOR PUSH TOS
- MOV @PSP+,TOS
- MOV @IP+,PC
-
- FORTHWORD "R>"
-; https://forth-standard.org/standard/core/Rfrom
-; R> -- x R: x -- pop from return stack
- SUB #2,PSP ; 1
- MOV TOS,0(PSP) ; 3
- MOV @RSP+,TOS ; 2
- MOV @IP+,PC ; 4
-
- .ENDIF
;-------------------------------------------------------------------------------
; ARITHMETIC OPERATIONS
;-------------------------------------------------------------------------------
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "1+"
-; https://forth-standard.org/standard/core/OnePlus
-; 1+ n1/u1 -- n2/u2 add 1 to TOS
- ADD #1,TOS
- MOV @IP+,PC
-
- FORTHWORD "1-"
-; https://forth-standard.org/standard/core/OneMinus
-; 1- n1/u1 -- n2/u2 subtract 1 from TOS
- SUB #1,TOS
- MOV @IP+,PC
-
- FORTHWORD "+"
-;https://forth-standard.org/standard/core/Plus
-;C + n1/u1 n2/u2 -- n3/u3 add n1+n2
- ADD @PSP+,TOS
- MOV @IP+,PC
-
- FORTHWORD "-"
- .ENDIF
; https://forth-standard.org/standard/core/Minus
; - n1/u1 n2/u2 -- n3/u3 n3 = n1-n2
MINUS SUB @PSP+,TOS ;2 -- n2-n1
;-------------------------------------------------------------------------------
; COMPARAISON OPERATIONS
;-------------------------------------------------------------------------------
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "0="
- .ENDIF
-; https://forth-standard.org/standard/core/ZeroEqual
-; 0= n/u -- flag return true if TOS=0
-ZEROEQUAL SUB #1,TOS ;1 borrow (clear cy) if TOS was 0
- SUBC TOS,TOS ;1 TOS=-1 if borrow was set
- MOV @IP+,PC ;4
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "0<"
- .ENDIF
; https://forth-standard.org/standard/core/Zeroless
; 0< n -- flag true if TOS negative
ZEROLESS ADD TOS,TOS ;1 set carry if TOS negative
INVERT XOR #-1,TOS ;1 TOS=-1 if carry was set
MOV @IP+,PC ;
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "U<"
- .ENDIF
-; https://forth-standard.org/standard/core/Uless
-; U< u1 u2 -- flag test u1<u2, unsigned
-ULESS SUB @PSP+,TOS ;2
- JZ ULESSEND ;2 flag Z = 1
- MOV #-1,TOS ;1 flag Z = 0
- JC ULESSEND ;2 unsigned jump
- AND #0,TOS ;1 flag Z = 1
-ULESSEND MOV @IP+,PC ;4
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "="
-; https://forth-standard.org/standard/core/Equal
-; = x1 x2 -- flag test x1=x2
-EQUAL SUB @PSP+,TOS ;2
- JZ INVERT ;2 flag Z will be = 0
- AND #0,TOS ;1 flag Z = 1
- MOV @IP+,PC ;4
+; FORTHWORD "U>"
+; https://forth-standard.org/standard/core/Umore
+; U> n1 n2 -- flag
+UMORE SUB @PSP+,TOS ;2
+ JNC UMOREEND ; 2 flag = true, Z = 0
+ AND #0,TOS ; 1 flag = false,Z = 1
+UMOREEND MOV @IP+,PC ; 4
- FORTHWORD "<"
-;https://forth-standard.org/standard/core/less
-;C < n1 n2 -- flag test n1<n2, signed
- SUB @PSP+,TOS ;1 TOS=n2-n1
- JZ LESSEND ;2 flag Z = 1
- JL TOSFALSE ;2 signed jump
-TOSTRUE MOV #-1,TOS ;1 flag Z = 0
-LESSEND MOV @IP+,PC ;4
-
- FORTHWORD ">"
-;https://forth-standard.org/standard/core/more
-;C > n1 n2 -- flag test n1>n2, signed
- SUB @PSP+,TOS ;2 TOS=n2-n1
- JL TOSTRUE ;2 --> +5
-TOSFALSE AND #0,TOS ;1 flag Z = 1
- MOV @IP+,PC ;4
+; ------------------------------------------------------------------------------
+; STRINGS PROCESSING
+; ------------------------------------------------------------------------------
+ FORTHWORDIMM "S\34" ; immediate
+; https://forth-standard.org/standard/core/Sq
+; S" -- compile in-line string
+SQUOTE MOV #0,&CAPS ; CAPS OFF
+ mDOCOL
+ .word lit,XSQUOTE,COMMA
+ .word lit,'"',WORDD ; -- c-addr = HERE W=Count_of_chars
+ mNEXTADR ;
+ MOV #20h,&CAPS ; restore CAPS ON
+ ADD #1,W ;
+ BIT #1,W ;1 C = /Z
+ ADDC W,&DP ; DP is aligned
+DROPEXIT MOV @PSP+,TOS ; --
+ MOV @RSP+,IP
+ MOV @IP+,PC
-;-------------------------------------------------------------------------------
-; CORE ANS94 complement OPTION
-;-------------------------------------------------------------------------------
- .include "ADDON/CORE_ANS.asm"
- .ENDIF ; CORE_COMPLEMENT
+ FORTHWORDIMM ".\34" ; immediate
+; https://forth-standard.org/standard/core/Dotq
+; ." -- compile string to print
+DOTQUOTE mDOCOL
+ .word SQUOTE
+ .word lit,TYPE,COMMA
+ .word EXIT
;-------------------------------------------------------------------------------
; NUMERIC OUTPUT
FORTHWORD "#"
; https://forth-standard.org/standard/core/num
; # ud1lo ud1hi -- ud2lo ud2hi convert 1 digit of output
-NUM MOV &BASE,T ;3 T = Divisor
-NUM1 MOV @PSP,S ;2 -- DVDlo DVDhi S = DVDlo
- SUB #2,PSP ;1 -- x x DVDhi TOS = DVDhi
- CALL #MUSMOD1 ;4 -- REMlo QUOTlo QUOThi T is unchanged
- MOV @PSP+,0(PSP) ;4 -- QUOTlo QUOThi
-TODIGIT CMP.B #10,W ;2 W = REMlo
+NUM MOV &BASEADR,T ;3
+NUM1 MOV @PSP,S ;2 -- DVDlo DVDhi S = DVDlo
+ SUB #2,PSP ;1 -- x x DVDhi TOS = DVDhi
+ CALL #MUSMOD1 ;244/444 -- REMlo QUOTlo QUOThi T is unchanged W=REMlo X=QUOTlo Y=QUOThi
+ MOV @PSP+,0(PSP) ;4 -- QUOTlo QUOThi W = REMlo
+TODIGIT CMP.B #10,W ;2
JNC TODIGIT1 ;2 jump if U<
ADD.B #7,W ;2
TODIGIT1 ADD.B #30h,W ;2
-HOLDW SUB #1,&HP ;4 store W=char --> -[HP]
+HOLDW SUB #1,&HP ;3 store W=char --> -[HP]
MOV &HP,Y ;3
MOV.B W,0(Y) ;3
- MOV @IP+,PC ;4 23 words
+ MOV @IP+,PC ;4 22 words, about 276|476 cycles for u|ud one digit
FORTHWORD "#S"
; https://forth-standard.org/standard/core/numS
; #S udlo udhi -- 0 0 convert remaining digits
NUMS mDOCOL
.word NUM ; X=QUOTlo
-NUM_RETURN .word $+2 ; next adr
+ mNEXTADR ; next adr
SUB #2,IP ;1 restore NUM return
- CMP #0,X ;1 test ud2lo first (generally <>0)
- JNZ NUM1 ;2
- CMP #0,TOS ;1 then test ud2hi (generally =0)
+ BIS TOS,X ;1
+ CMP #0,X ;1 ud = 0 ?
JNZ NUM1 ;2
-EXIT MOV @RSP+,IP
- MOV @IP+,PC ;6 10 words, about 241/417 cycles/char
+EXIT MOV @RSP+,IP ;2 when DTC=2 rDOCOL is loaded with this EXIT address
+ MOV @IP+,PC ;4 10 words, about 294|494 cycles for u|ud one digit
FORTHWORD "#>"
; https://forth-standard.org/standard/core/num-end
-; #> udlo:udhi -- c-addr u end conversion, get string
-NUMGREATER MOV &HP,0(PSP)
- MOV #HOLD_BASE,TOS
- SUB @PSP,TOS
+; #> udlo:udhi -- addr u end conversion, get string
+NUMGREATER MOV &HP,0(PSP) ; -- addr 0
+ MOV #HOLD_BASE,TOS ;
+ SUB @PSP,TOS ; -- addr u
MOV @IP+,PC
FORTHWORD "HOLD"
; https://forth-standard.org/standard/core/Ud
; U. u -- display u (unsigned)
; note: DDOT = UDOT + 10
-UDOT MOV #0,Y ; 1
+; use enhanced MUSMOD with 16 bits dividend instead of 32.
+UDOT MOV #0,S ; 1 -- hi=0
DOTTODDOT SUB #2,PSP ; 1 convert n|u to d|ud with Y = -1|0
- MOV TOS,0(PSP) ; 3
- MOV Y,TOS ; 1
-DDOT PUSH IP ; paired with EXIT R-- IP
- PUSH TOS ; paired with RFROM R-- IP sign
+ MOV TOS,0(PSP) ; 3 -- lo lo
+ MOV S,TOS ; 1 -- lo hi
+DDOT PUSHM #2,IP ; 4 R-- IP sign
AND #-1,TOS ; clear V, set N
- JGE DDOTNEXT ; if positive (N=0)
+ JGE DDOTNEXT ; if hi positive (N=0)
XOR #-1,0(PSP) ;4
XOR #-1,TOS ;1
ADD #1,0(PSP) ;4
ADDC #0,TOS ;1
-DDOTNEXT ASMTOFORTH ;10
- .word LESSNUM,NUMS
- .word RFROM,SIGN,NUMGREATER,TYPE
- .word FBLANK,EMIT,EXIT
+DDOTNEXT mASM2FORTH ;10
+ .word LESSNUM
+ .word BL,HOLD ; add a trailing space
+ .word NUMS ; R-- IP sign
+ .word RFROM,SIGN ; R-- IP
+ .word NUMGREATER,TYPE
+ .word EXIT
FORTHWORD "."
; https://forth-standard.org/standard/core/d
; . n -- display n (signed)
DOT CMP #0,TOS
JGE UDOT
- MOV #-1,Y
+ MOV #-1,S
JMP DOTTODDOT
-; ------------------------------------------------------------------------------
-; STRINGS PROCESSING
-; ------------------------------------------------------------------------------
- FORTHWORDIMM "S\34" ; immediate
-; https://forth-standard.org/standard/core/Sq
-; S" -- compile in-line string
-SQUOTE MOV #0,&CAPS ; CAPS OFF
- mDOCOL
- .word lit,XSQUOTE,COMMA
-SQUOTE1 .word lit,'"' ; separator for WORD
- .word WORDD ; -- c-addr (= HERE)
- .word $+2
- MOV #32,&CAPS ; CAPS ON
- MOV.B @TOS,TOS ; -- u
- ADD #1,TOS ; -- u+1
- BIT #1,TOS ;1 C = ~Z
- ADDC TOS,&DDP
-DROPEXIT MOV @PSP+,TOS
- MOV @RSP+,IP
- MOV @IP+,PC
-
- FORTHWORDIMM ".\34" ; immediate
-; https://forth-standard.org/standard/core/Dotq
-; ." -- compile string to print
-DOTQUOTE mDOCOL
- .word SQUOTE
- .word lit,TYPE,COMMA,EXIT
-
;-------------------------------------------------------------------------------
; INTERPRETER
;-------------------------------------------------------------------------------
FORTHWORD "WORD"
; https://forth-standard.org/standard/core/WORD
; WORD char -- addr Z=1 if len=0
-; parse a word delimited by char separator; by default (CAPS=$20), this word is capitalized.
-; if first char is TICK, the entire word is not capitalized.
-WORDD MOV #SOURCE_LEN,S ;2 -- separator
- MOV @S+,X ;2 X = src_len
- MOV @S+,W ;2 W = src_org
- ADD W,X ;1 X = src_end
- ADD @S+,W ;2 W = src_org + >IN = src_ptr
- MOV @S,Y ;2 Y = HERE = dst_ptr
-SKIPCHARLOO CMP W,X ;1 src_ptr = src_end ?
- JZ SKIPCHAREND ;2 if yes : End Of Line !
- CMP.B @W+,TOS ;2 does char = separator ?
- JZ SKIPCHARLOO ;2 if yes; 7~ loop
- SUB #1,W ;1 move back one the (post incremented) pointer
-SCANWORD MOV #96,T ;2 T = 96 = ascii(a)-1 (test value set in a register before SCANWORD loop)
- MOV &CAPS,rDODOES ;3 CAPS OFF = 0, CAPS ON = $20.
-QSCANTICK CMP.B #27h,0(W) ;4 first char = TICK ?
- JNZ SCANWORDLOO ;2 no
- MOV #0,rDODOES ;1 yes, don't change to upper case
-SCANWORDLOO MOV.B S,0(Y) ;3 first time make room in dst for word length; next, put char @ dst.
- CMP W,X ;1 src_ptr = src_end ?
- JZ SCANWORDEND ;2 if yes
- MOV.B @W+,S ;2
- CMP.B S,TOS ;1 does char = separator ?
- JZ SCANWORDEND ;2 if yes
- ADD #1,Y ;1 increment dst just before test loop
- CMP.B S,T ;1 char U< 'a' ? ('a'-1 U>= char) this condition is tested at each loop
- JC SCANWORDLOO ;2 15~ upper case char loop
- CMP.B #123,S ;2 char U>= 'z'+1 ?
- JC SCANWORDLOO ;2 loopback if yes
- SUB.B rDODOES,S ;1 convert a...z to A...Z if CAPS ON (rDODOES=$20)
- JMP SCANWORDLOO ;2 22~ lower case char loop
-SCANWORDEND MOV #XDODOES,rDODOES ;2
-SKIPCHAREND SUB &SOURCE_ORG,W ;3 -- separator W=src_ptr - src_org = new >IN (first char separator next)
- MOV W,&TOIN ;3 update >IN
- MOV &DDP,TOS ;3 -- c-addr
- SUB TOS,Y ;1 Y=Word_Length
- MOV.B Y,0(TOS) ;3
- MOV @IP+,PC ;4 -- c-addr 48 words Z=1 <==> lenght=0 <==> EOL, Z is tested by INTERPRET
-
- FORTHWORD "FIND" ;
+; parse a word delimited by char separator
+; if CAPS is ON, this word is CAPITALIZED unless 'char' input.
+; notice that the average lenght of all CORE definitions is about 4.
+WORDD MOV #SOURCE_LEN,S ;2 -- sep
+ MOV @S+,X ;2 X = src_len
+ MOV @S+,Y ;2 Y = src_org
+ ADD Y,X ;1 X = src_len + src_org = src_end
+ ADD @S+,Y ;2 Y = >IN + src_org = src_ptr
+ MOV @S,W ;2 W = HERE = dst_ptr
+SKIPCHARLOO CMP Y,X ;1 src_ptr = src_end ?
+ JZ SKIPCHAREND ;2 if yes : End Of Line !
+ CMP.B @Y+,TOS ;2 does char = separator ?
+ JZ SKIPCHARLOO ;2 if yes; 7~ loop
+ SUB #1,Y ;1 decrement the post incremented src_ptr
+QSCANTICK MOV &CAPS,T ;3 CAPS OFF = 0, CAPS ON = $20.
+ CMP.B #"'",0(Y) ;4 first char = TICK ?
+ JNZ SCANWORDLOO ;2 no
+ CMP.B @Y,2(Y) ;3 third char = TICK ?
+ JNZ SCANWORDLOO ;2 no
+ MOV #0,T ;1 don't change to upper case for 'char' input
+SCANWORDLOO MOV.B S,0(W) ;3 first, S makes room in dst for word length; next, put char.
+ CMP Y,X ;1 src_ptr = src_end ?
+ JZ SCANWORDEND ;2 if yes
+ MOV.B @Y+,S ;2 S=char
+ CMP.B S,TOS ;1 -- sep does char = separator ?
+ JZ SCANWORDEND ;2 if yes
+ ADD #1,W ;1 increment dst just before test loop
+ CMP.B #'a',S ;2 char U< 'a' ? this condition is tested at each loop
+ JNC SCANWORDLOO ;2 16~ upper case char loop
+ CMP.B #'z'+1,S ;2 char U>= 'z'+1 ?
+ JC SCANWORDLOO ;2 U>= loopback if yes
+ SUB.B T,S ;1 convert a...z to A...Z if CAPS ON (T=$20)
+ JMP SCANWORDLOO ;2 23~ lower case char loop
+SCANWORDEND
+SKIPCHAREND SUB &SOURCE_ORG,Y ;3 -- sep Y=src_ptr - src_org = new >IN (first char separator next)
+ MOV Y,&TOIN ;3 update >IN
+ MOV &DP,TOS ;3 -- c-addr
+ SUB TOS,W ;1 W=Word_Length
+ MOV.B W,0(TOS) ;3
+ MOV @IP+,PC ;4 -- c-addr 48 words Z=1 <==> lenght=0 <==> EOL, Z is tested by INTERPRET
+
+ FORTHWORD "FIND" ;
; https://forth-standard.org/standard/core/FIND
-; FIND c-addr -- c-addr 0 if not found ; flag Z=1 c-addr at transient RAM area (HERE)
+; FIND c-addr -- c-addr 0 if not found ; flag Z=1 c-addr at transient RAM area (HERE)
; CFA -1 if found ; flag Z=0
; CFA 1 if immediate ; flag Z=0
; compare WORD at c-addr (HERE) with each of words in each of listed vocabularies in CONTEXT
-; FIND to WORDLOOP : 14/20 cycles,
-; mismatch word loop: 13 cycles on len, +7 cycles on first char,
+; FIND to WORDLOOP : 10/17 cycles,
+; mismatch word loop: 14 cycles on len, 21 cycles on first char,
; +10 cycles char loop,
-; VOCLOOP : 12/18 cycles,
-; WORDFOUND to end : 21 cycles.
+; WORDFOUND to end : 16 cycles.
; note: with 16 threads vocabularies, FIND takes only! 75% of CORETEST.4th processing time
-FIND SUB #2,PSP ;1 -- ???? c-addr reserve one cell, not at FINDEND because kill flag Z
- MOV TOS,S ;1 S=c-addr
- MOV.B @S,rDOCON ;2 rDOCON= string count
- MOV.B #80h,rDODOES ;2 rDODOES= immediate mask
- MOV #CONTEXT,T ;2
-VOCLOOP MOV @T+,TOS ;2 -- ???? VOC_PFA T=CTXT+2
- CMP #0,TOS ;1 no more vocabulary in CONTEXT ?
- JZ FINDEND ;2 -- ???? 0 yes ==> exit; Z=1
+FIND SUB #2,PSP ;1 -- ???? c-addr reserve one cell, not at FINDEND which would kill the Z flag
+ MOV TOS,S ;1 S=c-addr
+ MOV #CONTEXT,T ;2 T = first cell addr of CONTEXT stack
+VOCLOOP MOV @T+,TOS ;2 -- ???? VOC_PFA T=CTXT+2
+ CMP #0,TOS ;1 no more vocabulary in CONTEXT ?
+ JZ FINDEND ;2 -- ???? 0 yes ==> exit; Z=1
.SWITCH THREADS
- .CASE 1
- .ELSECASE ; search thread add 6cycles 5words
- MOV.B 1(S),Y ;3 -- ???? VOC_PFA0 S=c-addr Y=first char of c-addr string
- AND.B #(THREADS-1)*2,Y ;2 -- ???? VOC_PFA0 Y=thread offset
- ADD Y,TOS ;1 -- ???? VOC_PFAx TOS = words set entry
+ .CASE 1 ; nothing to do
+ .ELSECASE ; searching thread adds 7 cycles & 6 words
+ MOV.B 1(S),Y ;3 -- ???? VOC_PFA0 S=c-addr Y=first char of c-addr string
+ AND.B #(THREADS-1),Y;2 -- ???? VOC_PFA0 Y=thread_x
+ ADD Y,Y ;1 -- ???? VOC_PFA0 Y=thread_offset_x
+ ADD Y,TOS ;1 -- ???? VOC_PFAx TOS = words set entry
.ENDCASE
- ADD #2,TOS ;1 -- ???? VOC_PFA+2
-WORDLOOP MOV -2(TOS),TOS ;3 -- ???? NFA [VOC_PFA] first, then [LFA]
- CMP #0,TOS ;1 -- ???? NFA no more word in the thread ?
- JZ VOCLOOP ;2 -- ???? NFA yes ==> search next voc in context
- MOV TOS,X ;1
- MOV.B @X+,Y ;2 TOS=NFA,X=NFA+1,Y=NFA_char
- BIC.B rDODOES,Y ;1 hide Immediate bit
-LENCOMP CMP.B rDOCON,Y ;1 compare lenght
- JNZ WORDLOOP ;2 -- ???? NFA 13~ word loop on lenght mismatch
- MOV S,W ;1 W=c-addr
-CHARCOMP CMP.B @X+,1(W) ;4 compare chars
- JNZ WORDLOOP ;2 -- ???? NFA 20~ word loop on first char mismatch
- ADD #1,W ;1
- SUB.B #1,Y ;1 decr count
- JNZ CHARCOMP ;2 -- ???? NFA 10~ char loop
-
-WORDFOUND BIT #1,X ;1
- ADDC #0,X ;1
- MOV X,S ;1 S=aligned CFA
- CMP.B #0,0(TOS) ;3 -- ???? NFA 0(TOS)=NFA_first_char
- MOV #1,TOS ;1 -- ???? 1 preset immediate flag
- JN FINDEND ;2 -- ???? 1 jump if negative: NFA have immediate bit set
- SUB #2,TOS ;1 -- ???? -1
-FINDEND MOV S,0(PSP) ;3 not found: -- c-addr 0 flag Z=1
- MOV #xdocon,rDOCON ;2 found: -- xt -1|+1 (not immediate|immediate) flag Z=0
- MOV #xdodoes,rDODOES ;2
- MOV @IP+,PC ;4 42/47 words
+ ADD #2,TOS ;1 -- ???? VOC_PFAx+2
+WORDLOOP MOV -2(TOS),TOS ;3 -- ???? NFA -2(TOS) = [VOC_PFAx] first, then [LFA]
+ CMP #0,TOS ;1 -- ???? NFA no more word in the thread ?
+ JZ VOCLOOP ;2 -- ???? NFA yes ==> search next voc in context
+ MOV TOS,X ;1
+ MOV.B @X+,Y ;2 TOS = NFA, X= NFA+1, Y = NFA_first_byte = cnt<<2+i (i= immediate flag)
+ RRA.B Y ;1 remove immediate flag, the remainder is the count of the definition name.
+LENCOMP CMP.B @S,Y ;2 compare lenght
+ JNZ WORDLOOP ;2 -- ???? NFA 14~ word loop on lenght mismatch
+ MOV S,W ;1 S=W=c-addr
+CHARCOMP CMP.B @X+,1(W) ;4 compare chars
+ JNZ WORDLOOP ;2 -- ???? NFA 21~ word loop on first char mismatch
+ ADD #1,W ;1
+ SUB.B #1,Y ;1 decr count
+ JNZ CHARCOMP ;2 -- ???? NFA 10~ char loop
+WORDFOUND BIT #1,X ;1
+ ADDC #0,X ;1
+ MOV X,S ;1 S=aligned CFA
+ MOV.B @TOS,TOS ;2 -- ???? NFA_1st_byte
+ AND #1,TOS ;1 -- ???? 0|1 test immediate flag
+ JNZ FINDEND ;2 -- ???? 1 jump if bit 1 is set, as immediate bit
+ SUB #1,TOS ;1 -- ???? -1
+FINDEND MOV S,0(PSP) ;3 not found: -- c-addr 0 flag Z=1
+ MOV @IP+,PC ;4 34/40 words
.IFDEF MPY_32 ; if 32 bits hardware multiplier
; >NUMBER ud1lo ud1hi addr1 cnt1 -- ud2lo ud2hi addr2 cnt2
; https://forth-standard.org/standard/core/toNUMBER
; ud2 is the unsigned result of converting the characters within the string specified by c-addr1 u1 into digits,
-; using the number in BASE, and adding each into ud1 after multiplying ud1 by the number in BASE.
+; using the number in BASE, and adding each into ud1 after multiplying ud1 by the number in BASE.
; Conversion continues left-to-right until a character that is not convertible (including '.' ',' '_')
; is encountered or the string is entirely converted. c-addr2 is the location of the first unconverted character
; or the first character past the end of the string if the string was entirely converted.
-; u2 is the number of unconverted characters in the string.
+; cnt2 is the number of unconverted characters in the string.
; An ambiguous condition exists if ud2 overflows during the conversion.
-TONUMBER MOV @PSP+,S ;2 -- ud1lo ud1hi cnt1 S = addr1
- MOV @PSP+,Y ;2 -- ud1lo cnt1 Y = ud1hi
- MOV @PSP,X ;2 -- x cnt1 X = ud1lo
- SUB #4,PSP ;1 -- x x x cnt
- MOV &BASE,T ;3
-TONUMLOOP MOV.B @S,W ;2 -- x x x cnt S=adr, T=base, W=char, X=udlo, Y=udhi
-DDIGITQ SUB.B #30h,W ;2 skip all chars < '0'
- CMP.B #10,W ;2 char was U< 58 (U< ':') ?
- JNC DDIGITQNEXT ;2 no
- SUB.B #7,W ;2
- CMP.B #10,W ;2
- JNC TONUMEND ;2 -- x x x cnt if '9' < char < 'A', then return to QNUMBER with Z=0
-DDIGITQNEXT CMP T,W ;1 digit-base
- BIC #Z,SR ;1 reset Z before return to QNUMBER because
- JC TONUMEND ;2 with Z=1, QNUMBER conversion would be true :-(
-UDSTAR MOV X,&MPY32L ;3 Load 1st operand (ud1lo)
- MOV Y,&MPY32H ;3 Load 1st operand (ud1hi)
- MOV T,&OP2 ;3 Load 2nd operand with BASE
- MOV &RES0,X ;3 lo result in X (ud2lo)
- MOV &RES1,Y ;3 hi result in Y (ud2hi)
-MPLUS ADD W,X ;1 ud2lo + digit
- ADDC #0,Y ;1 ud2hi + carry
-TONUMPLUS ADD #1,S ;1 adr+1
- SUB #1,TOS ;1 -- x x x cnt cnt-1
- JNZ TONUMLOOP ;2 if count <>0
-TONUMEND MOV S,0(PSP) ;3 -- x x addr2 cnt2
- MOV Y,2(PSP) ;3 -- x ud2hi addr2 cnt2
- MOV X,4(PSP) ;3 -- ud2lo ud2hi addr2 cnt2
- MOV @IP+,PC ;4 42 words
+TONUMBER MOV &BASEADR,T ;3 T = base
+ MOV @PSP+,S ;2 -- ud1lo ud1hi cnt1 S = addr1
+ MOV @PSP+,Y ;2 -- ud1lo cnt1 Y = ud1hi
+ MOV @PSP,X ;2 -- x cnt1 X = ud1lo
+ SUB #4,PSP ;1 -- x x x cnt1
+TONUMLD_OP1 MOV T,&MPY ;3 base = MPY OP1 loaded out of TONUMLOOP
+TONUMLOOP MOV.B @S,W ;2 -- x x x cnt S=adr, T=base, W=char, X=udlo, Y=udhi
+DDIGITQ SUB.B #3Ah,W ;2 all Ctrl_Chars < '0' and all chars '0' to '9' become negative
+ JNC DDIGITQNEXT ;2 accept all chars U< ':' (accept $0 up to $39)
+ SUB.B #7,W ;2 W = char - ($3A + $07 = 'A')
+ JNC TONUMEND ;2 -- x x x cnt reject all Ctrl_Chars U< 'A', (with Z flag = 0)
+DDIGITQNEXT ADD.B #0Ah,W ;2 restore digit value: 0 to 15 (and beyond)
+ CMP T,W ;1 digit-base (U>= comparaison rejects all Ctrl_Chars)
+ BIC #Z,SR ;1 reset Z before return to QNUMBER because else
+ JC TONUMEND ;2 to avoid QNUMBER conversion true with digit=base :-(
+UDSTAR MOV X,&OP2L ;3 Load 2nd operand (ud1lo)
+ MOV Y,&OP2H ;3 Load 2nd operand (ud1hi)
+ MOV &RES0,X ;3 lo result in X (ud2lo)
+ MOV &RES1,Y ;3 hi result in Y (ud2hi)
+MPLUS ADD W,X ;1 ud2lo + digit
+ ADDC #0,Y ;1 ud2hi + carry
+TONUMPLUS ADD #1,S ;1 adr+1
+ SUB #1,TOS ;1 -- x x x cnt cnt-1
+ JNZ TONUMLOOP ;2 if count <>0 33~ loop
+TONUMEND MOV S,0(PSP) ;3 -- x x addr2 cnt2
+ MOV Y,2(PSP) ;3 -- x ud2hi addr2 cnt2
+ MOV X,4(PSP) ;3 -- ud2lo ud2hi addr2 cnt2
+ MOV @IP+,PC ;4 40 words
; ?NUMBER makes the interface between INTERPRET and >NUMBER; it's a subset of INTERPRET.
; convert a string to a signed number; FORTH 2012 prefixes $ % # are recognized,
; FORTH 2012 'char' numbers also, digits separator '_' also.
-; with DOUBLE_INPUT switched ON, 32 bits signed numbers (with decimal point) are recognized,
-; with FIXPOINT_INPUT switched ON, Q15.16 signed numbers (with comma) are recognized.
+; with DOUBLE_INPUT option, 32 bits signed numbers (with decimal point) are recognized,
+; with FIXPOINT_INPUT option, Q15.16 signed numbers (with comma) are recognized.
; prefixes ' # % $ - are processed before calling >NUMBER
; chars . , _ are processed as >NUMBER exits.
;Z ?NUMBER addr -- n|d -1 if convert ok ; flag Z=0, UF9=1 if double
;Z addr -- addr 0 if convert ko ; flag Z=1
-QNUMBER
- .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
- BIC #UF9,SR ;2 reset UF9 used as double number flag
- .ENDIF ;
- MOV &BASE,T ;3 T=BASE
- MOV #0,S ;1 S=sign of result
- PUSHM #3,IP ;5 R-- IP sign base PUSH IP,S,T
- MOV #TONUMEXIT,IP ;2 set TONUMEXIT as return from >NUMBER
- MOV #0,X ;1 X=ud1lo
- MOV #0,Y ;1 Y=ud1hi
- SUB #8,PSP ;1 -- x x x x addr make room for TOS and >NUMBER
- MOV TOS,6(PSP) ;3 -- addr x x x addr
- MOV TOS,S ;1 S=addr
- MOV.B @S+,TOS ;2 -- addr x x x cnt TOS=count
-QTICK CMP.B #027h,0(S) ;4 prefix = ' ?
- JNZ QNUMLDCHAR ;2 no
- MOV.B 1(S),S ;3
- MOV S,4(PSP) ;3 -- addr ud2lo x x cnt ud2lo = ASCII code of 'char'
- CMP.B #3,TOS ;2 string must be 3 chars long
- JMP QNUMNEXT ;2
-QNUMLDCHAR MOV.B @S,W ;2 W=char
-QMINUS SUB.B #'-',W ;2 sign minus ?
- JNC QBINARY ;2 jump if char < '-'
- JNZ TONUMLOOP ;2 -- addr x x x cnt jump if char > '-'
- MOV #-1,2(RSP) ;3 R-- IP sign base set sign flag
- JMP PREFIXED ;2
-QBINARY MOV #2,T ;1 preset base 2
- ADD.B #8,W ;1 binary '%' prefix ?
- JZ PREFIXED ;2 yes
-QDECIMAL ADD #8,T ;1 preset base 10
- ADD.B #2,W ;1 decimal '#' prefix ?
- JZ PREFIXED ;2 yes
-QHEXA MOV #16,T ;2 preset base 16
- ADD.B #-1,W ;1 hex '$' prefix ?
- JNZ QNUMNEXT ;2 -- addr x x x cnt abort if not recognized prefix
-PREFIXED ADD #1,S ;1
- SUB #1,TOS ;1 -- addr x x x cnt-1 S=adr+1 TOS=count-1
- JMP QNUMLDCHAR ;2
-; ----------------------------------;
-
-TONUMEXIT .word $+2 ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2
-; ----------------------------------;
- JZ QNUMNEXT ;2 TOS=cnt2, Z=1 if conversion is ok
-; ----------------------------------;
- SUB #2,IP ; redefines TONUMEXIT as >NUMBER return, if loopback applicable
- CMP.B #28h,W ; rejected char by >NUMBER is a underscore ? ('_'-30h-7 = 28h)
- JZ TONUMPLUS ; yes: loopback to >NUMBER to skip char
-; ----------------------------------;
- .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
- BIT #UF9,SR ; UF9 already set ? ( when you have typed .. )
- JNZ QNUMNEXT ; yes, goto QNUMKO
- BIS #UF9,SR ;2 set double number flag
+QNUMBER ; -- addr
+ .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
+ BIC #UF9,SR ;2 reset UserFlag_9 used as double number flag
+ .ENDIF ;
+ SUB #8,PSP ;1 -- x x x x addr make room for >NUMBER
+ MOV TOS,6(PSP) ;3 -- addr x x x addr save TOS
+ MOV #0,Y ;1 Y=ud1hi=0
+ MOV #0,X ;1 X=ud1lo=0
+ MOV &BASEADR,T ;3 T=BASE
+ MOV TOS,S ;1 S=addr
+ MOV #0,TOS ;1 TOS=sign of result
+ PUSHM #2,TOS ;4 R-- sign IP PUSH TOS,IP
+ MOV #TONUMEXIT,IP ;2 set TONUMEXIT as return from >NUMBER
+ MOV.B @S+,TOS ;2 -- addr x x x cnt TOS=count, S=addr+1
+QNUMLDCHAR MOV.B @S,W ;2 W=char
+ SUB.B #'-',W ;2
+ JZ QNUMMINUS ;2
+ JC TONUMLD_OP1 ;2 -- addr x x x cnt jump if char U> '-', case of numeric chars
+QBINARY MOV #2,T ;1 preset base 2
+ ADD.B #8,W ;1 binary '%' prefix ? '%' + 8 = '-'
+ JZ PREFIXNEXT ;2 yes
+QDECIMAL ADD #8,T ;1 preset base 10
+ ADD.B #2,W ;1 decimal '#' prefix ? '#' + 2 = '%'
+ JZ PREFIXNEXT ;2 yes
+QHEXA MOV #16,T ;2 preset base 16
+ CMP.B #1,W ;1 hex '$' prefix ? '#' + 1 = '$'
+ JZ PREFIXNEXT ;2 yes
+QTICK CMP.B #4,W ;1 prefix = ' ? '#' + 4 = "'"
+ JNZ QNUMNEXT ;2 -- addr x x x cnt no, abort because prefix not recognized
+ CMP #3,TOS ;2 count = 3 ?
+ JNZ QNUMNEXT ;2 no, abort
+ CMP.B @S+,1(S) ;4 -- addr x x x 3 3rd char = 1st char = "'" ?
+ MOV.B @S,S ;2 does byte to word conversion
+ MOV S,4(PSP) ;3 -- addr ud2lo x x x ud2lo = ASCII code of 'char'
+ JMP QNUMNEXT ;2 -- addr ud2lo x x x with happy end if 3rd char = 1st char
+QNUMMINUS MOV #-1,2(RSP) ;3 R-- sign IP set sign flag
+PREFIXNEXT SUB #1,TOS ;1 -- addr x x x cnt-1 TOS=count-1
+ CMP.B @S+,0(S) ;4 S=adr+1; same prefix ?
+ JNZ QNUMLDCHAR ;2 loopback if no
+ JZ TONUMLD_OP1 ;2 if yes, this 2nd prefix will be rejected by >NUMBER
+; ------------------------------;46
+TONUMEXIT mNEXTADR ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2
+ JZ QNUMNEXT ;2 TOS=0 and Z=1 if conversion is ok
+ SUB #2,IP ;1 redefines TONUMEXIT as >NUMBER return, if loopback applicable
+ MOV.B @S,W ;2 reload rejected char
+ CMP.B #'_',W ;2 rejected char by >NUMBER is a underscore ?
+ JZ TONUMPLUS ;2 yes: return to >NUMBER to skip char then resume conversion, 30~ loopback
+ .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
+ BIT #UF9,SR ;2 UF9 already set ? ( if you have typed .. )
+ JNZ QNUMNEXT ;2 yes, goto QNUMKO
+ BIS #UF9,SR ;2 set double number flag
.ENDIF
-; ----------------------------------;
- .IFDEF DOUBLE_INPUT ;
- CMP.B #0F7h,W ;2 rejected char by >NUMBER is a decimal point ? ('.'-37h = -9)
- JZ TONUMPLUS ;2 yes, loopback to >NUMBER to skip char
- .ENDIF ;
-; ----------------------------------;
- .IFDEF FIXPOINT_INPUT ;
- CMP.B #0F5h,W ;2 rejected char by >NUMBER is a comma ? (','-37h = -0Bh)
- JNZ QNUMNEXT ;2 no: with Z=0 ==> goto QNUMKO
-; ----------------------------------;
-S15Q16 MOV TOS,W ;1 -- addr ud2lo x x x W=cnt2
- MOV #0,X ;1 -- addr ud2lo x 0 x init X = ud2lo' = 0
-S15Q16LOOP MOV X,2(PSP) ;3 -- addr ud2lo ud2lo' ud2lo' x 0(PSP) = ud2lo'
- SUB.B #1,W ;1 decrement cnt2
- MOV W,X ;1 X = cnt2-1
- ADD S,X ;1 X = end_of_string-1,-2,-3...
- MOV.B @X,X ;2 X = last char of string first (reverse conversion)
- SUB.B #30h,X ;2 char --> digit conversion
- CMP.B #10,X ;2
- JNC QS15Q16DIGI ;2 if 0 <= digit < 10
- SUB.B #7,X ;2 char
- CMP.B #10,X ;2 to skip all chars between "9" and "A"
- JNC S15Q16EOC ;2
-QS15Q16DIGI CMP T,X ;1 R-- IP sign BASE is X a digit ?
- JC S15Q16EOC ;2 -- addr ud2lo ud2lo' x ud2lo' if X>=base
- MOV X,0(PSP) ;3 -- addr ud2lo ud2lo' digit x
- MOV T,TOS ;1 -- addr ud2lo ud2lo' digit base R-- IP sign base
- PUSHM #3,S ;5 PUSH S,T,W: R-- IP sign base addr2 base cnt2
- CALL #MUSMOD ;4 -- addr ud2lo ur uqlo uqhi CALL MU/MOD
- POPM #3,S ;5 restore W,T,S: R-- IP sign BASE
- JMP S15Q16LOOP ;2 W=cnt
-S15Q16EOC MOV 4(PSP),2(PSP) ;5 -- addr ud2lo ud2hi uqlo x ud2lo from >NUMBER becomes here ud2hi part of Q15.16
- MOV @PSP,4(PSP) ;4 -- addr ud2lo ud2hi x x uqlo becomes ud2lo part of Q15.16
- CMP.B #0,W ;1 count = 0 if end of conversion ok
- .ENDIF ; FIXPOINT_INPUT ;
-; ----------------------------------;
-QNUMNEXT POPM #3,IP ;5 -- addr ud2lo-hi x x POPM T,S,IP S = sign flag = {-1;0}
- MOV S,TOS ;1 -- addr ud2lo-hi x sign
- MOV T,&BASE ;3
- JZ QNUMOK ;2 -- addr ud2lo-hi x sign conversion OK if Z=1
-QNUMKO
- .IFDEF DOUBLE_NUMBERS ;
- BIC #UF9,SR ;2 reset flag UF9, before next use as double number flag
+ .IFDEF DOUBLE_INPUT ;
+ SUB.B #'.',W ;2 rejected char by >NUMBER is a decimal point ?
+ JZ TONUMPLUS ;2 yes, loopback to >NUMBER to skip char, 45~ loopback
+ .ENDIF ;
+ .IFDEF FIXPOINT_INPUT ;
+ .IFDEF DOUBLE_INPUT
+ ADD.B #2,W ;1 rejected char by >NUMBER is a comma ? (',' - '.' + 2 = 0)
+ .ELSE ;
+ CMP.B #',',W ;2 rejected char by >NUMBER is a comma ?
+ .ENDIF ;
+ JNZ QNUMNEXT ;2 no: with Z=0 ==> goto QNUMKO
+S15Q16 MOV TOS,W ;1 -- addr ud2lo x x x W=cnt2
+ MOV #0,X ;1 -- addr ud2lo x 0 x init X = ud2lo' = 0
+S15Q16LOOP MOV X,2(PSP) ;3 -- addr ud2lo ud2lo' 0 x 2(PSP) = ud2lo'
+ SUB.B #1,W ;1 decrement cnt2
+ MOV W,X ;1 X = cnt2-1
+ ADD S,X ;1 X = end_of_string-1,-2,-3...
+ MOV.B @X,X ;2 X = last char of string first (reverse conversion)
+ SUB.B #':',X ;2
+ JNC QS15Q16DIGI ;2 accept all chars U< ':'
+ SUB.B #7,X ;2
+ JNC S15Q16EOC ;2 reject all chars U< 'A'
+QS15Q16DIGI ADD.B #10,X ;2 restore digit value
+ CMP T,X ;1 T=Base, is X a digit ?
+ JC S15Q16EOC ;2 -- addr ud2lo ud2lo' ud2lo' x if not a digit
+ MOV X,0(PSP) ;3 -- addr ud2lo ud2lo' digit x
+ MOV T,TOS ;1 -- addr ud2lo ud2lo' digit base R-- IP sign
+ PUSHM #3,S ;5 PUSH S,T,W: R-- IP sign addr2 base cnt2
+ CALL #MUSMOD ;4 -- addr ud2lo ur uqlo uqhi CALL MU/MOD
+ POPM #3,S ;5 restore W,T,S: R-- IP sign
+ JMP S15Q16LOOP ;2 W=cnt
+S15Q16EOC MOV 4(PSP),2(PSP) ;5 -- addr ud2lo ud2hi uqlo x ud2lo from >NUMBER becomes here ud2hi part of Q15.16
+ MOV @PSP,4(PSP) ;4 -- addr ud2lo ud2hi x x uqlo becomes ud2lo part of Q15.16
+ CMP.B #0,W ;1 count = 0 if end of conversion ok
+ .ENDIF ; FIXPOINT_INPUT
+; ------------------------------;
+QNUMNEXT POPM #2,TOS ;4 -- addr ud2lo-hi x sign R: -- POPM IP,TOS TOS = sign flag = {-1;0}
+ JZ QNUMOK ;2 -- addr ud2lo-hi x sign conversion OK if Z=1
+QNUMKO
+ .IFDEF DOUBLE_NUMBERS ;
+ BIC #UF9,SR ;2 reset flag UF9, before next use as double number flag
.ENDIF
- ADD #6,PSP ;1 -- addr sign
- AND #0,TOS ;1 -- addr ff TOS=0 and Z=1 ==> conversion ko
- MOV @IP+,PC ;4
-; ----------------------------------;
- .IFDEF DOUBLE_NUMBERS ; -- addr ud2lo-hi x sign
-QNUMOK ADD #2,PSP ;1 -- addr ud2lo-hi sign
- MOV 2(PSP),4(PSP) ;5 -- udlo udlo udhi sign
- MOV @PSP+,0(PSP) ;4 -- udlo udhi sign note : PSP is incremented before write back.
- XOR #-1,TOS ;1 -- udlo udhi inv(sign)
- JNZ QDOUBLE ;2 if jump : TOS=-1 and Z=0 ==> conversion ok
- XOR #-1,TOS ;1 -- udlo udhi tf
-QDNEGATE XOR #-1,2(PSP) ;3
- XOR #-1,0(PSP) ;3 -- (dlo dhi)-1 tf
- ADD #1,2(PSP) ;3
- ADDC #0,0(PSP) ;3
-QDOUBLE BIT #UF9,SR ;2 -- dlo dhi tf decimal point or comma fixpoint ?
- JNZ QNUMEND ;2 leave double
- ADD #2,PSP ;1 -- n tf leave number
-QNUMEND MOV @IP+,PC ;4 TOS<>0 and Z=0 ==> conversion ok
+ ADD #6,PSP ;2 -- addr sign
+ AND #0,TOS ;1 -- addr ff TOS=0 and Z=1 ==> conversion ko
+ MOV @IP+,PC ;4
+; ------------------------------;
+ .IFDEF DOUBLE_NUMBERS ; -- addr ud2lo-hi x sign
+QNUMOK ADD #2,PSP ;1 -- addr ud2lo-hi sign
+ MOV 2(PSP),4(PSP) ;5 -- udlo udlo udhi sign
+ MOV @PSP+,0(PSP) ;4 -- udlo udhi sign note : PSP is incremented before write back.
+ XOR #-1,TOS ;1 -- udlo udhi inv(sign)
+ JNZ QDOUBLE ;2 -- udlo udhi tf if jump : TOS=-1 and Z=0 ==> conversion ok
+ XOR #-1,TOS ;1 -- udlo udhi tf
+QDNEGATE XOR #-1,2(PSP) ;3 -- udlo udhi -1
+ XOR #-1,0(PSP) ;3 -- (dlo dhi)-1 tf
+ ADD #1,2(PSP) ;3
+ ADDC #0,0(PSP) ;3
+QDOUBLE BIT #UF9,SR ;2 -- dlo dhi tf decimal point or comma fixpoint ?
+ JNZ QNUMEND ;2 leave double
+NIP ADD #2,PSP ;1 -- n tf leave number
+QNUMEND MOV @IP+,PC ;4 TOS<>0 and Z=0 ==> conversion ok
.ELSE
-QNUMOK ADD #4,PSP ;1 -- addr ud2lo sign
- MOV @PSP+,0(PSP) ;4 -- udlo sign note : PSP is incremented before write back !!!
- XOR #-1,TOS ;1 -- udlo inv(sign)
- JNZ QNUMEND ;2 if jump : TOS=-1 and Z=0 ==> conversion ok
- XOR #-1,TOS ;1 -- udlo tf TOS=-1 and Z=0
-QNEGATE XOR #-1,0(PSP) ;3
- ADD #1,0(PSP) ;3 -- n tf
-QNUMEND MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
- .ENDIF ; DOUBLE_NUMBERS ;
-
- .ELSE ; no hardware MPY
-
+QNUMOK ADD #4,PSP ;1 -- addr ud2lo sign
+ MOV @PSP,2(PSP) ;4 -- u u sign note : PSP is incremented before write back !!!
+ XOR #-1,TOS ;1 -- udlo udhi inv(sign)
+ JNZ QNUMEND ;2 -- udlo udhi tf if jump : TOS=-1 and Z=0 ==> conversion ok
+ XOR #-1,TOS ;1 -- udlo udhi sign
+QNEGATE XOR #-1,2(PSP) ;3
+ ADD #1,2(PSP) ;3 -- n u tf
+QNUMEND
+NIP ADD #2,PSP ;1 -- n tf
+ MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
+ .ENDIF ; DOUBLE_NUMBERS ;
+
+ .ELSE ; if no hardware MPY
FORTHWORD "UM*"
; T.I. UNSIGNED MULTIPLY SUBROUTINE: U1 x U2 -> Ud
; https://forth-standard.org/standard/core/UMTimes
; UM* u1 u2 -- ud unsigned 16x16->32 mult.
-UMSTAR MOV @PSP,S ;2 MDlo
-UMSTAR1 MOV #0,T ;1 MDhi=0
- MOV #0,X ;1 RES0=0
- MOV #0,Y ;1 RES1=0
- MOV #1,W ;1 BIT TEST REGISTER
-UMSTARLOOP BIT W,TOS ;1 TEST ACTUAL BIT MRlo
- JZ UMSTARNEXT ;2 IF 0: DO NOTHING
- ADD S,X ;1 IF 1: ADD MDlo TO RES0
- ADDC T,Y ;1 ADDC MDhi TO RES1
-UMSTARNEXT ADD S,S ;1 (RLA LSBs) MDlo x 2
- ADDC T,T ;1 (RLC MSBs) MDhi x 2
- ADD W,W ;1 (RLA) NEXT BIT TO TEST
- JNC UMSTARLOOP ;2 IF BIT IN CARRY: FINISHED 10~ loop
- MOV X,0(PSP) ;3 low result on stack
- MOV Y,TOS ;1 high result in TOS
- MOV @IP+,PC ;4 17 words
+UMSTAR MOV @PSP,S ;2 MDlo
+UMSTAR1 MOV #0,T ;1 MDhi=0
+ MOV #0,X ;1 RES0=0
+ MOV #0,Y ;1 RES1=0
+ MOV #1,W ;1 BIT TEST REGISTER
+UMSTARLOOP BIT W,TOS ;1 TEST ACTUAL BIT MRlo
+ JZ UMSTARNEXT ;2 IF 0: DO NOTHING
+ ADD S,X ;1 IF 1: ADD MDlo TO RES0
+ ADDC T,Y ;1 ADDC MDhi TO RES1
+UMSTARNEXT ADD S,S ;1 (RLA LSBs) MDlo x 2
+ ADDC T,T ;1 (RLC MSBs) MDhi x 2
+ ADD W,W ;1 (RLA) NEXT BIT TO TEST
+ JNC UMSTARLOOP ;2 IF BIT IN CARRY: FINISHED 10~ loop
+ MOV X,0(PSP) ;3 low result on stack
+ MOV Y,TOS ;1 high result in TOS
+ MOV @IP+,PC ;4 17 words
FORTHWORD ">NUMBER"
; https://forth-standard.org/standard/core/toNUMBER
; ud2 is the unsigned result of converting the characters within the string specified by c-addr1 u1 into digits,
-; using the number in BASE, and adding each into ud1 after multiplying ud1 by the number in BASE.
+; using the number in BASE, and adding each into ud1 after multiplying ud1 by the number in BASE.
; Conversion continues left-to-right until a character that is not convertible, including '.', ',' or '_',
; is encountered or the string is entirely converted. c-addr2 is the location of the first unconverted character
; or the first character past the end of the string if the string was entirely converted.
; u2 is the number of unconverted characters in the string.
; An ambiguous condition exists if ud2 overflows during the conversion.
; >NUMBER ud1lo|ud1hi addr1 count1 -- ud2lo|ud2hi addr2 count2
-TONUMBER MOV @PSP,S ;2 S=adr
- MOV TOS,T ;1 T=count
- MOV &BASE,W ;3
-TONUMLOOP MOV.B @S,Y ;2 -- ud1lo ud1hi x x S=adr, T=count, W=BASE, Y=char
-DDIGITQ SUB.B #30h,Y ;2 skip all chars < '0'
- CMP.B #10,Y ;2 char was > "9" ?
- JNC DDIGITQNEXT ;2 -- ud1lo ud1hi x x no: good end
- SUB.B #07,Y ;2 skip all chars between "9" and "A"
- CMP.B #10,Y ;2 char was < "A" ?
- JNC TONUMEND ;2 yes: for bad end
-DDIGITQNEXT CMP W,Y ;1 -- ud1lo ud1hi x x digit-base
- BIC #Z,SR ;1 reset Z before jmp TONUMEND because...
- JC TONUMEND ;2 ...QNUMBER conversion will be true if Z = 1 :-(
-UDSTAR PUSHM #6,IP ;8 -- ud1lo ud1hi x x save IP S T W X Y used by UM* r-- IP adr count base x digit
- MOV 2(PSP),S ;3 -- ud1lo ud1hi x x S=ud1hi
- MOV W,TOS ;1 -- ud1lo ud1hi x base
- MOV #UMSTARNEXT1,IP ;2
-UMSTARONE JMP UMSTAR1 ;2 ud1hi * base -- x ud3hi X=ud3lo
-UMSTARNEXT1 .word $+2 ; -- ud1lo ud1hi x ud3hi
- MOV X,2(RSP) ;3 r-- IP adr count base ud3lo digit
- MOV 4(PSP),S ;3 -- ud1lo ud1hi x ud3hi S=ud1lo
- MOV 4(RSP),TOS ;3 -- ud1lo ud1hi x base
- MOV #UMSTARNEXT2,IP ;2
-UMSTARTWO JMP UMSTAR1 ;2 -- ud1lo ud1hi x ud4hi X=ud4lo
-UMSTARNEXT2 .word $+2 ; -- ud1lo ud1hi x ud4hi
-MPLUS ADD @RSP+,X ;2 -- ud1lo ud1hi x ud4hi X=ud4lo+digit=ud2lo r-- IP adr count base ud3lo
- ADDC @RSP+,TOS ;2 -- ud1lo ud1hi x ud2hi TOS=ud4hi+ud3lo+carry=ud2hi r-- IP adr count base
- MOV X,4(PSP) ;3 -- ud2lo ud1hi x ud2hi
- MOV TOS,2(PSP) ;3 -- ud2lo ud2hi x x r-- IP adr count base
- POPM #4,IP ;6 -- ud2lo ud2hi x x W=base, T=count, S=adr, IP=prevIP r--
-TONUMPLUS ADD #1,S ;1
- SUB #1,T ;1
- JNZ TONUMLOOP ;2 -- ud2lo ud2hi x x S=adr+1, T=count-1, W=base 68 cycles char loop
-TONUMEND MOV S,0(PSP) ;3 -- ud2lo ud2hi adr2 count2
- MOV T,TOS ;1 -- ud2lo ud2hi adr2 count2
- MOV @IP+,PC ;4 50/82 words/cycles, W = BASE
+TONUMBER MOV &BASEADR,W ;3 W = base
+ MOV @PSP,S ;2 S=adr
+ MOV TOS,T ;1 T=count
+TONUMLOOP MOV.B @S,Y ;2 -- ud1lo ud1hi x x S=adr, T=count, W=BASE, Y=char
+DDIGITQ SUB.B #':',Y ;2
+ JNC DDIGITQNEXT ;2 accept all chars <= 9
+ SUB.B #07,Y ;2 reject all chars between "9" and "A"
+ JNC TONUMEND ;2 yes: for bad end
+DDIGITQNEXT ADD.B #10,Y ;2 restore number
+ CMP W,Y ;1 -- ud1lo ud1hi x x digit-base
+ BIC #Z,SR ;1 reset Z before jmp TONUMEND because...
+ JC TONUMEND ;2 ...QNUMBER conversion will be true if Z = 1 :-(
+UDSTAR PUSHM #6,IP ;8 -- ud1lo ud1hi x x save IP S T W X Y used by UM* r-- IP adr count base x digit
+ MOV 2(PSP),S ;3 -- ud1lo ud1hi x x S=ud1hi
+ MOV W,TOS ;1 -- ud1lo ud1hi x base
+ MOV #UMSTARNEXT1,IP ;2
+UMSTARONE JMP UMSTAR1 ;2 ud1hi * base -- x ud3hi X=ud3lo
+UMSTARNEXT1 mNEXTADR ; -- ud1lo ud1hi x ud3hi
+ MOV X,2(RSP) ;3 r-- IP adr count base ud3lo digit
+ MOV 4(PSP),S ;3 -- ud1lo ud1hi x ud3hi S=ud1lo
+ MOV 4(RSP),TOS ;3 -- ud1lo ud1hi x base
+ MOV #UMSTARNEXT2,IP ;2
+UMSTARTWO JMP UMSTAR1 ;2 -- ud1lo ud1hi x ud4hi X=ud4lo
+UMSTARNEXT2 mNEXTADR ; -- ud1lo ud1hi x ud4hi
+MPLUS ADD @RSP+,X ;2 -- ud1lo ud1hi x ud4hi X=ud4lo+digit=ud2lo r-- IP adr count base ud3lo
+ ADDC @RSP+,TOS ;2 -- ud1lo ud1hi x ud2hi TOS=ud4hi+ud3lo+carry=ud2hi r-- IP adr count base
+ MOV X,4(PSP) ;3 -- ud2lo ud1hi x ud2hi
+ MOV TOS,2(PSP) ;3 -- ud2lo ud2hi x x r-- IP adr count base
+ POPM #4,IP ;6 -- ud2lo ud2hi x x W=base, T=count, S=adr, IP=prevIP r--
+TONUMPLUS ADD #1,S ;1
+ SUB #1,T ;1
+ JNZ TONUMLOOP ;2 -- ud2lo ud2hi x x S=adr+1, T=count-1, W=base 68 cycles char loop
+TONUMEND MOV S,0(PSP) ;3 -- ud2lo ud2hi adr2 count2
+ MOV T,TOS ;1 -- ud2lo ud2hi adr2 count2
+ MOV @IP+,PC ;4 48/82 words/cycles, W = BASE
; ?NUMBER makes the interface between >NUMBER and INTERPRET; it's a subset of INTERPRET.
; convert a string to a signed number; FORTH 2012 prefixes ' $, %, # are recognized
;Z ?NUMBER addr -- n|d -1 if convert ok ; flag Z=0, UF9=1 if double
;Z addr -- addr 0 if convert ko ; flag Z=1
QNUMBER
- .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
- BIC #UF9,SR ;2 reset flag UF9, before use as double number flag
- .ENDIF ;
- MOV &BASE,T ;3 T=BASE
- MOV #0,S ;1
- PUSHM #3,IP ;5 R-- IP sign base (push IP,S,T)
- MOV #TONUMEXIT,IP ;2 define >NUMBER return
- MOV T,W ;1 W=BASE
- SUB #8,PSP ;1 -- x x x x addr
- MOV TOS,6(PSP) ;3 -- addr x x x addr
- MOV #0,4(PSP) ;3
- MOV #0,2(PSP) ;3 -- addr 0 0 x addr
- MOV TOS,S ;1 -- addr ud=0 x x
- MOV.B @S+,T ;2 S=addr, T=count
-QTICK CMP.B #27h,0(S) ;4 prefix = ' ?
- JNZ QNUMLDCHAR ;2 no
- MOV.B 1(S),4(PSP) ;5 -- addr ud2lo 0 x x ud2lo = ASCII code of 'char'
- CMP.B #3,TOS ;2 string must be 3 chars long
- JMP QNUMNEXT ;2
-QNUMLDCHAR MOV.B @S,Y ;2 Y=char
-QMINUS SUB.B #'-',Y ;2 -- addr ud=0 x x sign minus ?
- JNC QBINARY ;2 if char U< '-'
- JNZ TONUMLOOP ;2 if char U> '-'
- MOV #-1,2(RSP) ;3 R-- IP sign base
- JMP PREFIXED ;2
-QBINARY MOV #2,W ;1 preset base 2
- ADD.B #8,Y ;1 binary prefix ?
- JZ PREFIXED ;2 yes
-QDECIMAL ADD #8,W ;1 preset base 10
- ADD.B #2,Y ;1 decimal prefix ?
- JZ PREFIXED ;2 yes
-QHEXA MOV #16,W ;1 preset base 16
- ADD.B #-1,Y ;2 hex prefix ?
- JNZ QNUMNEXT ;2 -- addr x x x cnt abort if not recognized prefix
-PREFIXED ADD #1,S ;1
- SUB #1,T ;1 S=adr+1 T=count-1
- JMP QNUMLDCHAR ;2
-; ----------------------------------;42
-
-TONUMEXIT .word $+2 ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2,T=cnt2
-; ----------------------------------;
- JZ QNUMNEXT ;2 if conversion is ok
-; ----------------------------------;
+ .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
+ BIC #UF9,SR ;2 reset flag UF9, before use as double number flag
+ .ENDIF ;
+ SUB #8,PSP ;1 -- x x x x addr
+ MOV TOS,6(PSP) ;3 -- addr x x x addr save TOS
+ MOV #0,4(PSP) ;3 ud1hi=0
+ MOV #0,2(PSP) ;3 -- addr 0 0 x addr ud1lo=0
+ MOV &BASEADR,W ;3 W=BASE
+ MOV TOS,S ;1 -- addr ud=0 x x S=addr
+ MOV #0,TOS ;1
+ PUSHM #2,TOS ;4 R-- sign IP (push TOS,IP)
+ MOV #TONUMEXIT,IP ;2 define >NUMBER return
+ MOV.B @S+,T ;2 S=addr+1, T=count
+QNUMLDCHAR MOV.B @S,Y ;2 Y=char
+ SUB.B #'-',Y ;2 -- addr ud=0 x x sign minus ?
+ JZ QNUMMINUS ;2 yes
+ JC TONUMLOOP ;2 if char U> '-'
+QBINARY MOV #2,W ;1 preset base 2
+ ADD.B #8,Y ;1 binary prefix ? '%' = '-' + 8
+ JZ PREFIXNEXT ;2 yes
+QDECIMAL ADD #8,W ;1 preset base 10
+ ADD.B #2,Y ;1 decimal prefix ? '#' = '%' + 2
+ JZ PREFIXNEXT ;2 yes
+QHEXA MOV #16,W ;2 preset base 16
+ CMP.B #1,Y ;1 hex prefix ? '$' = '#' + 1
+ JZ PREFIXNEXT ;2 yes
+QTICK CMP.B #4,Y ;1 prefix = ' ? "'" = '#' + 4
+ JNZ QNUMNEXT ;2 -- addr x x x cnt abort if not recognized prefix
+ CMP #3,TOS ;
+ JNZ QNUMNEXT ;
+ CMP.B @S+,1(S) ;4 compare 3rd with first char '
+ MOV.B @S,S ;2 does char to word conversion
+ MOV S,4(PSP) ;5 -- addr ud2lo 0 x x ud2lo = ASCII code of 'char'
+ JMP QNUMNEXT ;2 with happy end if flag Z = 1
+QNUMMINUS MOV #-1,2(RSP) ;3 R-- sign IP set sign flag
+PREFIXNEXT SUB #1,T ;1 T=count-1
+ CMP.B @S+,0(S) ;4 S=adr+1; same prefix ?
+ JNZ QNUMLDCHAR ;2 no
+ JZ TONUMLOOP ;2 yes, that will abort conversion
+; ------------------------------;43
+TONUMEXIT mNEXTADR ; -- addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2,T=cnt2
+ JZ QNUMNEXT ;2 if conversion is ok
SUB #2,IP
- CMP.B #28h,Y ; rejected char by >NUMBER is a underscore ?
- JZ TONUMPLUS ; yes: loopback to >NUMBER to skip char
- .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
- BIT #UF9,SR ; UF9 already set ? (you have wrongly typed two points)
- JNZ QNUMNEXT ; yes, goto QNUMKO
- BIS #UF9,SR ;2 set double number flag
+ MOV.B @S,Y ; regenerate rejected char
+ CMP.B #'_',Y ;2 rejected char by >NUMBER is a underscore ?
+ JZ TONUMPLUS ; yes: loopback to >NUMBER to skip char
+ .IFDEF DOUBLE_NUMBERS ; DOUBLE_NUMBERS = DOUBLE_INPUT | FIXPOINT_INPUT
+ BIT #UF9,SR ; UF9 already set ? (you have wrongly typed two points)
+ JNZ QNUMNEXT ; yes, goto QNUMKO
+ BIS #UF9,SR ;2 set double number flag
.ENDIF
.IFDEF DOUBLE_INPUT
- CMP.B #0F7h,Y ;2 rejected char by >NUMBER is a decimal point ?
- JZ TONUMPLUS ;2 to terminate conversion
+ SUB.B #'.',Y ;1 rejected char by >NUMBER is a decimal point ?
+ JZ TONUMPLUS ;2 to terminate conversion
.ENDIF
- .IFDEF FIXPOINT_INPUT ;
- CMP.B #0F5h,Y ;2 rejected char by >NUMBER is a comma ?
- JNZ QNUMNEXT ;2 no, goto QNUMKO
-; ----------------------------------;
-S15Q16 MOV #0,X ;1 -- addr ud2lo x 0 x init ud2lo' = 0
-S15Q16LOOP MOV X,2(PSP) ;3 -- addr ud2lo ud2lo' ud2lo' x X = 0(PSP) = ud2lo'
- SUB.B #1,T ;1 decrement cnt2
- MOV T,X ;1 X = cnt2-1
- ADD S,X ;1 X = end_of_string-1, first...
- MOV.B @X,X ;2 X = last char of string, first...
- SUB.B #30h,X ;2 char --> digit conversion
- CMP.B #10,X ;2
- JNC QS15Q16DIGI ;2
- SUB.B #7,X ;2
- CMP.B #10,X ;2
- JNC S15Q16EOC ;2
-QS15Q16DIGI CMP W,X ;1 R-- IP sign BASE, W=BASE, is X a digit ?
- JC S15Q16EOC ;2 -- addr ud2lo ud2lo' x ud2lo' if no
- MOV X,0(PSP) ;3 -- addr ud2lo ud2lo' digit x
- MOV W,TOS ;1 -- addr ud2lo ud2lo' digit base R-- IP sign base
- PUSHM #3,S ;5 PUSH S,T,W: R-- IP sign base addr2 cnt2 base
- CALL #MUSMOD ;4 -- addr ud2lo ur uqlo uqhi
- POPM #3,S ;5 restore W,T,S: R-- IP sign BASE
- JMP S15Q16LOOP ;2 W=cnt
-S15Q16EOC MOV 4(PSP),2(PSP) ;5 -- addr ud2lo ud2lo uqlo x ud2lo from >NUMBER part1 becomes here ud2hi=S15 part2
- MOV @PSP,4(PSP) ;4 -- addr ud2lo ud2hi x x uqlo becomes ud2lo
- CMP.B #0,T ;1 cnt2 = 0 if end of conversion ok
- .ENDIF ; FIXPOINT_INPUT ;
-; ----------------------------------;97
-QNUMNEXT POPM #3,IP ;4 -- addr ud2lo-hi x cnt2 POPM T,S,IP S = sign flag = {-1;0}
- MOV S,TOS ;1 -- addr ud2lo-hi x sign
- MOV T,&BASE ;3
- JZ QNUMOK ;2 -- addr ud2lo-hi x sign flag Z=1: conversion OK
-QNUMKO ; flag Z=0
+ .IFDEF FIXPOINT_INPUT ;
+ .IFDEF DOUBLE_INPUT
+ ADD.B #2,Y ;1 rejected char by >NUMBER is a comma ?
+ .ELSE
+ SUB.B #',',Y ;1 rejected char by >NUMBER is a comma ?
+ .ENDIF
+ JNZ QNUMNEXT ;2 no, goto QNUMKO
+S15Q16 MOV #0,X ;1 -- addr ud2lo x 0 x init ud2lo' = 0
+S15Q16LOOP MOV X,2(PSP) ;3 -- addr ud2lo ud2lo' ud2lo' x X = 0(PSP) = ud2lo'
+ SUB.B #1,T ;1 decrement cnt2
+ MOV T,X ;1 X = cnt2-1
+ ADD S,X ;1 X = end_of_string-1, first...
+ MOV.B @X,X ;2 X = last char of string, first...
+ SUB.B #':',X ;2
+ JNC QS15Q16DIGI ;2 accept all chars U< ':'
+ SUB.B #7,X ;2
+ JNC S15Q16EOC ;2 reject all chars U< 'A'
+QS15Q16DIGI ADD.B #10,X ;2 restore number
+ CMP W,X ;1 W=BASE, is X a digit ?
+ JC S15Q16EOC ;2 -- addr ud2lo ud2lo' x ud2lo' if not a digit
+ MOV X,0(PSP) ;3 -- addr ud2lo ud2lo' digit x
+ MOV W,TOS ;1 -- addr ud2lo ud2lo' digit base R-- IP sign
+ PUSHM #3,S ;5 PUSH S,T,W: R-- IP sign addr2 cnt2 base
+ CALL #MUSMOD ;4 -- addr ud2lo ur uqlo uqhi
+ POPM #3,S ;5 restore W,T,S: R-- IP sign
+ JMP S15Q16LOOP ;2 W=cnt
+S15Q16EOC MOV 4(PSP),2(PSP) ;5 -- addr ud2lo ud2lo uqlo x ud2lo from >NUMBER part1 becomes here ud2hi=S15 part2
+ MOV @PSP,4(PSP) ;4 -- addr ud2lo ud2hi x x uqlo becomes ud2lo
+ CMP.B #0,T ;1 cnt2 = 0 if end of conversion ok
+ .ENDIF ; FIXPOINT_INPUT ;
+; ------------------------------;97
+QNUMNEXT POPM #2,TOS ;4 -- addr ud2lo-hi x sign R: -- POPM IP,TOS TOS = sign flag = {-1;0}
+ JZ QNUMOK ;2 -- addr ud2lo-hi x sign conversion OK if Z=1
+QNUMKO ; flag Z=0
.IFDEF DOUBLE_NUMBERS
BIC #UF9,SR
.ENDIF
- ADD #6,PSP ;1 -- addr sign
- AND #0,TOS ;1 -- addr ff TOS=0 and Z=1 ==> conversion ko
- MOV @IP+,PC ;4
-; ----------------------------------;
+ ADD #6,PSP ;1 -- addr sign
+ AND #0,TOS ;1 -- addr ff TOS=0 and Z=1 ==> conversion ko
+ MOV @IP+,PC ;4
+; ------------------------------;
.IFDEF DOUBLE_NUMBERS
-QNUMOK ADD #2,PSP ;1 -- addr ud2lo ud2hi sign
- MOV 2(PSP),4(PSP) ; -- udlo udlo udhi sign
- MOV @PSP+,0(PSP) ;4 -- udlo udhi sign note : PSP is incremented before write back !!!
- XOR #-1,TOS ;1 -- udlo udhi inv(sign)
- JNZ QDOUBLE ;2 if jump : TOS=-1 and Z=0 ==> conversion ok
- XOR #-1,TOS ;1 -- udlo udhi tf
-Q2NEGATE XOR #-1,2(PSP) ;3
- XOR #-1,0(PSP) ;3
- ADD #1,2(PSP) ;3
- ADDC #0,0(PSP) ;3 -- dlo dhi tf
-QDOUBLE BIT #UF9,SR ;2 -- dlo dhi tf decimal point added ?
- JNZ QNUMEND ;2 -- dlo dhi tf leave double
- ADD #2,PSP ;1 -- dlo tf leave number, Z=0
-QNUMEND MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
+QNUMOK ADD #2,PSP ;1 -- addr ud2lo ud2hi sign
+ MOV 2(PSP),4(PSP) ; -- udlo udlo udhi sign
+ MOV @PSP+,0(PSP) ;4 -- udlo udhi sign note : PSP is incremented before write back !!!
+ XOR #-1,TOS ;1 -- udlo udhi inv(sign)
+ JNZ QDOUBLE ;2 if jump : TOS=-1 and Z=0 ==> conversion ok
+ XOR #-1,TOS ;1 -- udlo udhi tf
+Q2NEGATE XOR #-1,2(PSP) ;3
+ XOR #-1,0(PSP) ;3
+ ADD #1,2(PSP) ;3
+ ADDC #0,0(PSP) ;3 -- dlo dhi tf
+QDOUBLE BIT #UF9,SR ;2 -- dlo dhi tf decimal point added ?
+ JNZ QNUMEND ;2 -- dlo dhi tf leave double
+NIP ADD #2,PSP ;1 -- dlo tf leave number, Z=0
+QNUMEND MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
.ELSE
-QNUMOK ADD #4,PSP ;1 -- addr ud2lo sign
- MOV @PSP+,0(PSP) ;4 -- udlo sign note : PSP is incremented before write back !!!
- XOR #-1,TOS ;1 -- udlo inv(sign)
- JNZ QNUMEND ;2 if jump : TOS=-1 and Z=0 ==> conversion ok
- XOR #-1,TOS ;1 -- udlo tf TOS=-1 and Z=0
-QNEGATE XOR #-1,0(PSP) ;3
- ADD #1,0(PSP) ;3 -- n tf
-QNUMEND MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
+QNUMOK ADD #4,PSP ;1 -- addr ud2lo sign
+ MOV @PSP,2(PSP) ;4 -- udlo udlo sign note : PSP is incremented before write back !!!
+ XOR #-1,TOS ;1 -- udlo udlo inv(sign)
+ JNZ QNUMEND ;2 if jump : TOS=-1 and Z=0 ==> conversion ok
+ XOR #-1,TOS ;1 -- udlo udlo tf TOS=-1 and Z=0
+QNEGATE XOR #-1,2(PSP) ;3
+ ADD #1,2(PSP) ;3 -- n udlo tf
+QNUMEND
+NIP ADD #2,PSP ;1
+ MOV @IP+,PC ;4 TOS=-1 and Z=0 ==> conversion ok
.ENDIF ; DOUBLE_NUMBERS
-
.ENDIF ; of Hardware/Software MPY
+ FORTHWORDIMM "\\" ; immediate
+; https://forth-standard.org/standard/block/bs
+; \ -- backslash
+; everything up to the end of the current line is a comment.
+BACKSLASH MOV &SOURCE_LEN,&TOIN ;
+ MOV @IP+,PC
+
+; INTERPRET i*x addr u -- j*x interpret given buffer
+; This is the common factor of EVALUATE and QUIT.
+; set addr u as input buffer then parse it word by word
+INTERPRET mDOCOL ; INTERPRET = BACKSLASH + 8
+ .word SETIB ; -- set input buffer pointers
+INTLOOP .word BL,WORDD ; -- c-addr fl flag Z = 1 <=> End Of Line
+ .word ZBRAN,FDROPEXIT; BRANch to DROPEXIT if Z = 1
+ .word FIND
+ mNEXTADR ; -- xt|c-addr|xt -1|0|+1 Z=1 --> not found
+ MOV TOS,W ; W = flag = (-1|0|+1) as (not_immediate|not_found|immediate)
+ MOV @PSP+,TOS ; -- xt|c-addr|xt
+ MOV #INTQNUMNEXT,IP ;2 INTQNUMNEXT is the continuation of QNUMBER
+ JZ QNUMBER ;2 if Z=1 --> not found, search a number
+ MOV #INTLOOP,IP ;2 INTLOOP is the continuation of EXECUTE|COMMA
+ XOR &STATE,W ;3
+ JZ COMMA ;2 -- xt if W xor STATE = 0 compile xt, then loop back to INTLOOP
+EXECUTE PUSH TOS ;3 -- xt
+ MOV @PSP+,TOS ;2 --
+ MOV @RSP+,PC ;4 xt --> PC, then loop back to INTLOOP
+; ------------------------------;
+INTQNUMNEXT mNEXTADR ; -- n|c-addr fl Z = 1 --> not a number, SR(UF9) double number request
+ MOV @PSP+,TOS ;2 -- n|c-addr
+ MOV #INTLOOP,IP ;2 INTLOOP is the continuation of LITERAL.
+ JNZ LITERAL ;2 n -- Z = 0 --> is a number, execute LITERAL then loop back to INTLOOP
+NotFoundexe ADD.B #1,0(TOS) ;3 c-addr -- Z = 1 --> Not a Number : incr string count to add '?'
+ MOV.B @TOS,Y ;2 Y=count+1
+ ADD TOS,Y ;1 Y=end of string addr
+ MOV.B #'?',0(Y) ;5 add '?' to end of string
+ MOV #FABORT_TERM,IP ;2 ABORT_TERM is the continuation of COUNT
+ JMP COUNT ;2 -- addr len 37 words
+
;-------------------------------------------------------------------------------
; DICTIONARY MANAGEMENT
;-------------------------------------------------------------------------------
FORTHWORD ","
; https://forth-standard.org/standard/core/Comma
; , x -- append cell to dict
-COMMA MOV &DDP,W ;3
- MOV TOS,0(W) ;3
- ADD #2,&DDP ;3
- MOV @PSP+,TOS ;2
- MOV @IP+,PC ;4 15~
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "EXECUTE"
-; https://forth-standard.org/standard/core/EXECUTE
-; EXECUTE i*x xt -- j*x execute Forth word at 'xt'
- JMP EXECUTE
- .ENDIF
+COMMA ADD #2,&DP ;3
+ MOV &DP,W ;3
+ MOV TOS,-2(W) ;3
+ MOV @PSP+,TOS ;2
+ MOV @IP+,PC ;4 15~ W = DP
FORTHWORDIMM "LITERAL" ; immediate
; https://forth-standard.org/standard/core/LITERAL
; LITERAL n -- append single numeric literal if compiling state
; d -- append two numeric literals if compiling state and UF9<>0 (not ANS)
- .IFDEF DOUBLE_NUMBERS ; are recognized
-LITERAL CMP #0,&STATE ;3
- JZ LITERAL2 ;2 if interpreting state, clear UF9 flag then NEXT
- MOV TOS,X ;1
-LITERAL1 MOV &DDP,W ;3 X = n|HId
- ADD #4,&DDP ;3
- MOV #LIT,0(W) ;4
- MOV X,2(W) ;3
- MOV @PSP+,TOS ;2
- BIT #UF9,SR ;2 double number ?
-LITERAL2 BIC #UF9,SR ;2 in all case, clear UF9
- JZ LITERALEND ;2 no
- MOV TOS,2(W) ;3
- JMP LITERAL1 ;2
-LITERALEND MOV @IP+,PC ;4
+ .IFDEF DOUBLE_NUMBERS ; are recognized
+LITERAL CMP #0,&STATE ;3
+ JZ LITERALNEXT ;2 if interpreting state, does nothing else clear UF9 flag
+ MOV TOS,X ;1 X = n|dhi
+LITERALLOOP MOV &DP,W ;3
+ ADD #4,&DP ;3
+ MOV #lit,0(W) ;4
+ MOV X,2(W) ;3 pass 1: compile n|dhi, if pass 2: compile dhi
+ MOV @PSP+,TOS ;2
+ BIT #UF9,SR ;2 double number ?
+LITERALNEXT BIC #UF9,SR ;2 in all case, clear UF9
+ JZ LITERALEND ;2 goto end if n|interpret_state
+ MOV TOS,2(W) ;3 compile dlo over dhi
+ JMP LITERALLOOP ;2
+LITERALEND MOV @IP+,PC ;4
.ELSE
-LITERAL CMP #0,&STATE ;3
- JZ LITERALEND ;2 if interpreting state, do nothing
-LITERAL1 MOV &DDP,W ;3
- ADD #4,&DDP ;3
- MOV #LIT,0(W) ;4
- MOV TOS,2(W) ;3
- MOV @PSP+,TOS ;2
-LITERALEND MOV @IP+,PC ;4
+LITERAL CMP #0,&STATE ;3
+ JZ LITERALEND ;2 if interpreting state, does nothing
+ MOV &DP,W ;3
+ ADD #4,&DP ;3
+ MOV #lit,0(W) ;4
+ MOV TOS,2(W) ;3
+ MOV @PSP+,TOS ;2
+LITERALEND MOV @IP+,PC ;4
.ENDIF
FORTHWORD "COUNT"
; https://forth-standard.org/standard/core/COUNT
; COUNT c-addr1 -- adr len counted->adr/len
-COUNT SUB #2,PSP ;1
- ADD #1,TOS ;1
- MOV TOS,0(PSP) ;3
- MOV.B -1(TOS),TOS ;3
- MOV @IP+,PC ;4 15~
-
- FORTHWORD "INTERPRET"
-; INTERPRET i*x addr u -- j*x interpret given buffer
-; This is the common factor of EVALUATE and QUIT.
-; set addr u as input buffer then parse it word by word
-INTERPRET mDOCOL ;
- .word SETIB ;
-INTLOOP .word FBLANK,WORDD ; -- c-addr Z = 1 --> End Of Line
- .word $+2 ;
- JZ DROPEXIT ;2 Z = 1 --> EOL reached
- MOV #INTFINDNEXT,IP ;2 define INTFINDNEXT as FIND return
- JMP FIND ;2
-INTFINDNEXT .word $+2 ; -- c-addr fl Z = 1 -->not found
- MOV TOS,W ; W = flag =(-1|0|+1) as (normal|not_found|immediate)
- MOV @PSP+,TOS ; -- c-addr
- MOV #INTQNUMNEXT,IP ;2 define QNUMBER return
- JZ QNUMBER ;2 Z = 1 --> not found, search a number
- MOV #INTLOOP,IP ;2 define (EXECUTE | COMMA) return
- XOR &STATE,W ;3
- JZ COMMA ;2 if W xor STATE = 0 compile xt then loop back to INTLOOP
-EXECUTE PUSH TOS ;3
- MOV @PSP+,TOS ;2 --
- MOV @RSP+,PC ;4 xt --> PC
-
-INTQNUMNEXT .word $+2 ; -- n|c-addr fl Z = 1 --> not a number, SR(UF9) double number request
- MOV @PSP+,TOS ;2
- MOV #INTLOOP,IP ;2 -- n|c-addr define LITERAL return
- JNZ LITERAL ;2 n -- Z = 0 --> is a number, execute LITERAL then loop back to INTLOOP
-
-NotFoundexe ADD.B #1,0(TOS) ;3 c-addr -- Z = 1 --> Not a Number : incr string count to add '?'
- MOV.B @TOS,Y ;2 Y=count+1
- ADD TOS,Y ;1 Y=end of string addr
- MOV.B #'?',0(Y) ;5 add '?' to end of string
- MOV #FABORT_TERM,IP ;2 define the return of COUNT
- JMP COUNT ;2 -- addr len 35 words
-NotFound .word NotFoundExe ;
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORD "EVALUATE"
-; https://forth-standard.org/standard/core/EVALUATE
-; EVALUATE \ i*x c-addr u -- j*x interpret string
-EVALUATE MOV #SOURCE_LEN,X ;2
- MOV @X+,S ;2 S = SOURCE_LEN
- MOV @X+,T ;2 T = SOURCE_ORG
- MOV @X+,W ;2 W = TOIN
- PUSHM #4,IP ;6 PUSHM IP,S,T,W
- ASMtoFORTH
- .word INTERPRET
- .word $+2
- MOV @RSP+,&TOIN ;4
- MOV @RSP+,&SOURCE_ORG ;4
- MOV @RSP+,&SOURCE_LEN ;4
- MOV @RSP+,IP
- MOV @IP+,PC
-
- FORTHWORD "BL"
-; https://forth-standard.org/standard/core/BL
-; BL -- char an ASCII space
- .ENDIF ; CORE_COMPLEMENT
-FBLANK CALL rDOCON
- .word 20h
+COUNT SUB #2,PSP ;1
+ MOV.B @TOS+,W ;2
+ MOV TOS,0(PSP) ;3
+ MOV W,TOS ;1
+ AND #-1,TOS ; Z is set if u=0
+ MOV @IP+,PC ;4 14~
FORTHWORD "ALLOT"
; https://forth-standard.org/standard/core/ALLOT
; ALLOT n -- allocate n bytes
-ALLOT ADD TOS,&DDP
+ALLOT ADD TOS,&DP
MOV @PSP+,TOS
MOV @IP+,PC
; FORTHWORD "ABORT"
; https://forth-standard.org/standard/core/ABORT
-; Empty the data stack and perform the function of QUIT,
+; Empty the data stack and perform the function of QUIT,
; which includes emptying the return stack, without displaying a message.
; ABORT is the common next of WARM and ABORT"
-ABORT MOV #PSTACK,PSP ;
- MOV #0,TOS ; to reset first PSP cell (TOS), used next by WARM
+ABORT MOV #PSTACK,PSP ; ABORT = ALLOT + 8
+ MOV #0,TOS ; and set TOS for SYS use.
; https://forth-standard.org/standard/core/QUIT
; QUIT -- interpret line by line the input stream
-QUIT MOV #RSTACK,RSP ;
- MOV #LSTACK,&LEAVEPTR ;
- MOV #0,&STATE ;
- ASMtoFORTH
+QUIT mASM2FORTH ; QUIT = ALLOT + 14
.IFDEF PROMPT
-QUIT1 .word XSQUOTE ; background interpret loop
- .byte 5,13,10,"ok " ; CR+LF + Forth prompt
-QUIT2 .word TYPE ; display it
+QUIT1 .word XSQUOTE ; lower interpret loop
+ .byte 5,13,10,"ok " ; CR + LF + Forth prompt
+QUIT2
.ELSE
-QUIT2 .word CR
+QUIT2 .word XSQUOTE
+ .byte 2,13,10 ; CR+LF
.ENDIF
-QUIT3 .word REFILL ; -- org len refill input buffer from ACCEPT (one line)
-QUIT4 .word INTERPRET ; interpret this line|string
- .word DEPTH,ZEROLESS ; stack empty test
+ .word TYPE ;
+ .word REFILL ; -- org len refill input buffer from ACCEPT (one line)
+QUIT4 .word INTERPRET ; interpret input buffer|string
+QUIT5 .word DEPTH,ZEROLESS ; stack empty test
.word XSQUOTE ; ABORT" stack empty! "
- .byte 12,"stack empty!" ;
+ .byte 11,"stack empty";
.word QABORT ; see QABORT in forthMSP430FR_TERM_xxx.asm
- .word lit,FRAM_FULL ;
- .word HERE,ULESS ; FRAM full test
+ .word HEREXEC ; )
+ .word lit,FRAM_FULL ; > FRAM full test
+ .word UMORE ; )
.word XSQUOTE ; ABORT" FRAM full! "
- .byte 10,"FRAM full!" ;
+ .byte 9,"FRAM full" ;
.word QABORT ; see QABORT in forthMSP430FR_TERM_xxx.asm
.IFDEF PROMPT
- .word LIT,STATE,FETCH ; STATE @
+ .word lit,STATE,FETCH ; STATE @
.word QFBRAN,QUIT1 ; 0= case of interpretion state
.word XSQUOTE ; 0<> case of compilation state
.byte 5,13,10," " ; CR+LF + 3 spaces
.ENDIF
.word BRAN,QUIT2
- FORTHWORDIMM "ABORT\34" ; immediate
+ FORTHWORDIMM "ABORT\34"
+; ; ABORT" is enabled in interpretation mode (+ 17 words) :
+; CMP #0,&STATE
+; JNZ CMPL_QABORT
+; MOV #0,&CAPS ; CAPS OFF
+; EXEC_QABORT mDOCOL
+; .word LIT,'"',WORDD,COUNT,QABORT
+; .word BL,LIT,CAPS,STORE
+; .word EXIT
+
; https://forth-standard.org/standard/core/ABORTq
+; ABORT" " (empty string) displays nothing
; ABORT" i*x flag -- i*x R: j*x -- j*x flag=0
; i*x flag -- R: j*x -- flag<>0
-; ABORT" " (empty string) displays nothing
-ABORTQUOTE mDOCOL
+CMPL_QABORT mDOCOL
.word SQUOTE
.word lit,QABORT,COMMA ; see QABORT in forthMSP430FR_TERM_xxx.asm
.word EXIT
; https://forth-standard.org/standard/core/Tick
; ' -- xt find word in dictionary and leave on stack its execution address
TICK mDOCOL
- .word FBLANK,WORDD,FIND
- .word QFBRAN,NotFound ; see INTERPRET
- .word EXIT
+ .word BL,WORDD,FIND
+ .word ZBRAN,NotFound ; BRANch to NotFound if Z = 1
+FDROPEXIT .word DROPEXIT
+NotFound .word NotFoundExe ; see INTERPRET
+
FORTHWORDIMM "[']" ; immediate word, i.e. word executed during compilation
; https://forth-standard.org/standard/core/BracketTick
; ['] <name> -- find word & compile it as literal
BRACTICK mDOCOL
.word TICK ; get xt of <name>
- .word lit,lit,COMMA ; append LIT action
+ .word lit,lit,COMMA ; append lit action
.word COMMA,EXIT ; append xt literal
FORTHWORDIMM "[" ; immediate
MOV #-1,&STATE
MOV @IP+,PC
- FORTHWORDIMM "\\" ; immediate
-; https://forth-standard.org/standard/block/bs
-; \ -- backslash
-; everything up to the end of the current line is a comment.
-BACKSLASH MOV &SOURCE_LEN,&TOIN ;
- MOV @IP+,PC
-
FORTHWORDIMM "POSTPONE"
; https://forth-standard.org/standard/core/POSTPONE
POSTPONE mDOCOL
- .word FBLANK,WORDD,FIND,QDUP
- .word QFBRAN,NotFound ; see INTERPRET
+ .word BL,WORDD,FIND
+ .word ZBRAN,NotFound ; BRANch to NotFound if Z = 1
.word ZEROLESS ; immediate word ?
.word QFBRAN,POST1 ; if immediate
.word lit,lit,COMMA ; else compile lit
.word COMMA ; compile xt
.word lit,COMMA ; CFA of COMMA
-POST1 .word COMMA,EXIT ; then compile: if immediate xt of word found else CFA of COMMA
+POST1 .word COMMA,EXIT ; then compile xt of word found if immediate else CFA of COMMA
FORTHWORD ":"
; https://forth-standard.org/standard/core/Colon
; : <name> -- begin a colon definition
-; HEADER is CALLed by all compiling words
-COLON PUSH #COLONNEXT ;3 define COLONNEXT as HEADER return
+COLON PUSH #COLONNEXT ;3 define COLONNEXT as HEADER return
;-----------------------------------;
-HEADER BIT #1,&DDP ;3 carry set if odd
- ADDC #2,&DDP ;4 (DP+2|DP+3) bytes, make room for LFA
+HEADER BIT #1,&DP ;3 carry set if odd
+ ADDC #2,&DP ;4 align and make room for LFA
mDOCOL ;
- .word FBLANK,WORDD ;
- .word $+2 ; -- HERE HERE is the NFA of this new word
+ .word BL,WORDD ; W=Count_of_chars
+ mNEXTADR ; -- HERE HERE is the NFA of this new word
MOV @RSP+,IP ;
- MOV TOS,Y ; -- NFA Y=NFA
- MOV.B @TOS+,W ; -- NFA+1 W=Count_of_chars
BIS.B #1,W ; W=count is always odd
ADD.B #1,W ; W=add one byte for length
- ADD Y,W ; W=Aligned_CFA
+ ADD TOS,W ; W=Aligned_CFA
MOV &CURRENT,X ; X=VOC_BODY of CURRENT
+ MOV TOS,Y ; Y=NFA
.SWITCH THREADS ;
.CASE 1 ; nothing to do
.ELSECASE ; multithreading add 5~ 4words
- MOV.B @TOS,TOS ; -- char TOS=first CHAR of new word
- AND #(THREADS-1)*2,TOS ; -- offset TOS= Thread offset
+ MOV.B 1(TOS),TOS ; -- char TOS=first CHAR of new word
+ AND #(THREADS-1),TOS ; -- offset TOS= thread_offset
+ ADD TOS,TOS ; TOS= thread_offset * 2
ADD TOS,X ; X=VOC_PFAx = thread x of VOC_PFA of CURRENT
.ENDCASE ;
MOV @PSP+,TOS ; --
-HEADEREND MOV Y,&LAST_NFA ; NFA --> LAST_NFA used by QREVEAL, IMMEDIATE, MARKER
+ ADD.B @Y,0(Y) ; shift left once NFA_1st_byte (make room for immediate flag)
+HEADEREND MOV Y,&LAST_NFA ; NFA --> LAST_NFA used by QREVEAL, IMMEDIATE
MOV X,&LAST_THREAD ; VOC_PFAx --> LAST_THREAD used by QREVEAL
MOV W,&LAST_CFA ; HERE=CFA --> LAST_CFA used by DOES>, RECURSE
MOV PSP,&LAST_PSP ; save PSP for check compiling, used by QREVEAL
ADD #4,W ; by default make room for two words...
- MOV W,&DDP ;
+ MOV W,&DP ;
MOV @RSP+,PC ; RET W is the new DP value )
; X is LAST_THREAD > used by compiling words: CREATE, DEFER, :...
COLONNEXT ; Y is NFA )
.SWITCH DTC ; Direct Threaded Code select
.CASE 1 ;
- MOV #1284h,-4(W) ; compile CALL R4 = rDOCOL ([rDOCOL] = XDOCOL)
- SUB #2,&DDP ;
+ MOV #DOCOL,-4(W) ; compile CALL R4 = rDOCOL ([rDOCOL] = XDOCOL)
+ SUB #2,&DP ;
.CASE 2 ;
MOV #120Dh,-4(W) ; compile PUSH IP 3~
- MOV #1284h,-2(W) ; compile CALL R4 = rDOCOL ([rDOCOL] = EXIT)
+ MOV #DOCOL,-2(W) ; compile CALL R4 = rDOCOL ([rDOCOL] = EXIT)
.CASE 3 ;
MOV #120Dh,-4(W) ; compile PUSH IP 3~
MOV #400Dh,-2(W) ; compile MOV PC,IP 1~
MOV #522Dh,0(W) ; compile ADD #4,IP 1~
MOV #4D30h,+2(W) ; compile MOV @IP+,PC 4~
- ADD #4,&DDP ;
+ ADD #4,&DP ;
.ENDCASE ;
MOV #-1,&STATE ; enter compiling state
MOV @IP+,PC ;
;;Z ?REVEAL -- if no stack mismatch, link this new word in the CURRENT vocabulary
QREVEAL CMP PSP,&LAST_PSP ; Check SP with its saved value by :, :NONAME, CODE...
- JNZ BAD_CSP ; if stack mismatch.
-GOOD_CSP MOV &LAST_NFA,Y ;
- MOV &LAST_THREAD,X ;
-REVEAL MOV @X,-2(Y) ; [LAST_THREAD] --> LFA (for NONAME: [LAST_THREAD] --> unused PA reg)
- MOV Y,0(X) ; LAST_NFA --> [LAST_THREAD] (for NONAME: LAST_NFA --> unused PA reg)
- MOV @IP+,PC
-
-BAD_CSP mDOCOL
+ JZ LINK_NFA ; see MARKER
+BAD_CSP mASM2FORTH ; if stack mismatch.
.word XSQUOTE
.byte 15,"stack mismatch!"
FABORT_TERM .word ABORT_TERM
FORTHWORD "IMMEDIATE"
; https://forth-standard.org/standard/core/IMMEDIATE
; IMMEDIATE -- make last definition immediate
-IMMEDIATE MOV &LAST_NFA,Y ; Y = NFA|unused_PA_reg as lure for :NONAME
- BIS.B #BIT7,0(Y) ;
- MOV @IP+,PC
+IMMEDIATE MOV &LAST_NFA,Y ; Y = NFA|unused_PA_reg (as lure for :NONAME)
+ BIS.B #1,0(Y) ;4 FIND process more easier with bit0 than bit7
+NEXTADR MOV @IP+,PC
FORTHWORD "CREATE"
; https://forth-standard.org/standard/core/CREATE
; CREATE <name> -- define a CONSTANT with its next address
; Execution: ( -- a-addr ) ; a-addr is the address of name's data field
; ; the execution semantics of name may be extended by using DOES>
-CREATE CALL #HEADER ; -- W = DDP
- MOV #1286h,-4(W) ;4 -4(W) = CFA = CALL R6 = rDOCON
+CREATE CALL #HEADER ; -- W = DP
+ MOV #DOCON,-4(W) ;4 -4(W) = CFA = CALL rDOCON
MOV W,-2(W) ;3 -2(W) = PFA = W = next address
JMP REVEAL ; to link the definition in vocabulary
- .IFDEF CORE_COMPLEMENT
FORTHWORD "DOES>"
; https://forth-standard.org/standard/core/DOES
; DOES> -- set action for the latest CREATEd definition
DOES MOV &LAST_CFA,W ; W = CFA of CREATEd word
- MOV #1285h,0(W) ; replace old CFA of CREATE by new CFA CALL R5 = rDODOES
+ MOV #DODOES,0(W) ; replace CALL rDOCON of CREATE by new CFA: CALL rDODOES
MOV IP,2(W) ; replace PFA by the address after DOES> as execution address
- MOV @RSP+,IP ;
- MOV @IP+,PC ; exit of the new created word
-
- FORTHWORD "CONSTANT"
-;https://forth-standard.org/standard/core/CONSTANT
-;C CONSTANT <name> n -- define a Forth CONSTANT
-CONSTANT CALL #HEADER ; W = DDP = CFA + 2 words
- MOV #1286h,-4(W) ; CFA = CALL R6 = rDOCON
- MOV TOS,-2(W) ; PFA = n
- MOV @PSP+,TOS ; --
- JMP REVEAL ; to link the definition in vocabulary
-
- FORTHWORD "VARIABLE"
-;https://forth-standard.org/standard/core/VARIABLE
-;C VARIABLE <name> -- define a Forth VARIABLE
-VARIABLE CALL #HEADER ; W = DDP = CFA + 2 words
- MOV #1287h,-4(W) ; CFA = CALL R7 = rDOVAR, PFA is undefined
- JMP REVEAL ; to link created VARIABLE in vocabulary
+ MOV @RSP+,IP ; which ends the..
+ MOV @IP+,PC ; ..of a CREATE definition.
- .ENDIF ; CORE_COMPLEMENT
-
- .IFDEF DEFERRED
FORTHWORD ":NONAME"
; https://forth-standard.org/standard/core/ColonNONAME
; :NONAME -- xt
; X is the LAST_THREAD lure value for REVEAL
; Y is the LAST_NFA lure value for REVEAL and IMMEDIATE
; ...because we don't want to modify the word set !
- PUSH #COLONNEXT ; define COLONNEXT as HEADERLESS RET
+ PUSH #COLONNEXT ; define COLONNEXT as HEADEREND RET
HEADERLESS SUB #2,PSP ; common part of :NONAME and CODENNM
MOV TOS,0(PSP) ;
- MOV &DDP,W ;
+ MOV &DP,W ;
BIT #1,W ;
ADDC #0,W ; W = aligned CFA
MOV W,TOS ; -- xt aligned CFA of :NONAME | CODENNM
- MOV #210h,X ; X = 210h = unused PA register address (lure for REVEAL)
- MOV X,Y ;1
- ADD #2,Y ;1 Y = 212h = unused PA register address (lure for REVEAL and IMMEDIATE)
+ MOV #212h,X ; MOV @X,-2(Y) writes to 210h = unused PA register address (lure for REVEAL and IMMEDIATE)
+ MOV X,Y ; MOV Y,0(X) writes to 212h = unused PA register address (lure for REVEAL)
JMP HEADEREND ;
-; https://forth-standard.org/standard/core/DEFER
-; Skip leading space delimiters. Parse name delimited by a space.
-; Create a definition for name with the execution semantics defined below.
-;
-; name Execution: --
-; Execute the xt that name is set to execute, i.e. NEXT (nothing),
-; until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
- FORTHWORD "DEFER"
- CALL #HEADER
- MOV #4030h,-4(W) ;4 first CELL = MOV @PC+,PC = BR...
- MOV #NEXT_ADR,-2(W) ;3 second CELL = ...mNEXT : do nothing by default
- JMP REVEAL ; to link created word in vocabulary
-
-; DEFER! ( xt CFA_DEFERed_WORD -- )
-; FORTHWORD "DEFER!"
-DEFERSTORE MOV @PSP+,2(TOS) ; -- CFA_DEFERed_WORD xt --> [PFA_DEFERed_WORD]
- MOV @PSP+,TOS ; --
- MOV @IP+,PC ;
+;; https://forth-standard.org/standard/core/DEFER
+;; Skip leading space delimiters. Parse name delimited by a space.
+;; Create a definition for name with the execution semantics defined below.
+;;
+;; name Execution: --
+;; Execute the xt that name is set to execute, i.e. NEXT (nothing),
+;; until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
+; FORTHWORD "DEFER"
+; CALL #HEADER
+; MOV #4030h,-4(W) ;4 first CELL = MOV @PC+,PC = BR #addr
+; MOV #NEXTADR,-2(W) ;3 second CELL = ...mNEXT : do nothing by default
+; JMP REVEAL ; to link created word in vocabulary
; IS <name> xt --
-; used like this:
-; DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+
+; used like this (high level defn.):
+; DEFER DISPLAY create a "do nothing" definition (2 CELLS)
+
+; or (low level defn.):
+; CODE DISPLAY create a "do nothing" definition (2 CELLS)
+; MOV #NEXT_ADR,PC NEXT_ADR is the address of NEXT code: MOV @IP+,PC
+; ENDCODE
+
; inline command : ' U. IS DISPLAY U. becomes the runtime of the word DISPLAY
-; or in a definition : ... ['] U. IS DISPLAY ...
-; KEY, EMIT, CR, ACCEPT and WARM are examples of DEFERred words
+; or in a definition : ... ['] U. IS DISPLAY ... ;
+; KEY, EMIT, ACCEPT are examples of DEFERred words
FORTHWORDIMM "IS" ; immediate
IS PUSH IP
- CMP #0,&STATE
- JZ IS_EXEC
-IS_COMPILE ASMtoFORTH
+ CMP #0,&STATE
+ JNZ IS_COMPILE
+IS_EXEC mASM2FORTH
+ .word TICK
+ mNEXTADR
+ MOV @RSP+,IP
+DEFERSTORE MOV @PSP+,2(TOS) ; -- CFA_DEFERed_WORD xt --> [PFA_DEFERed_WORD]
+ MOV @PSP+,TOS ; --
+ MOV @IP+,PC ;
+
+IS_COMPILE mASM2FORTH
.word BRACTICK ; find the word, compile its CFA as literal
.word lit,DEFERSTORE,COMMA ; compile DEFERSTORE
.word EXIT
-IS_EXEC ASMtoFORTH
- .word TICK,DEFERSTORE ; find the word, leave its CFA on the stack and execute DEFERSTORE
- .word EXIT
-
- .ENDIF ; DEFERRED
-
- .IFDEF MSP430ASSEMBLER
FORTHWORD "CODE" ; a CODE word must be finished with ENDCODE
ASMCODE CALL #HEADER ; (that sets CFA and PFA)
-ASMCODE1 SUB #4,&DDP ; remove default CFA and PFA
+ASMCODE1 SUB #4,&DP ; remove default CFA and PFA
ASMCODE2
- .IFDEF EXTENDED_ASM
+ .IFDEF EXTENDED_ASM
MOV #0,&RPT_WORD ; clear RPT instruction
- .ENDIF
- mDOCOL
- .word ALSO,ASSEMBLER,EXIT
+ .ENDIF
+ JMP ASSEMBLER ; add ASSEMBLER in CONTEXT stack
; HDNCODE (hidden CODE) is used to define a CODE word which must not to be executed by FORTH interpreter
; i.e. typically an assembler word called by CALL and ended by RET, or an interrupt routine ended by RETI.
-; ASM words are only usable in ASSEMBLER defined words
+; HDNCODE words are only usable in ASSEMBLER definitions.
FORTHWORD "HDNCODE"
MOV #BODYASSEMBLER,&CURRENT ; select ASSEMBLER word set to link this HDNCODE definition
JMP ASMCODE
asmword "ENDCODE" ; test PSP balancing then restore previous CONTEXT
-ENDCODE mDOCOL ; and set CURRENT = CONTEXT (to also end ASM definitions)
+ENDCODE mDOCOL ; and set CURRENT = CONTEXT (to also terminate HDNCODE definitions)
.word QREVEAL
-ENDCODE1 .word PREVIOUS,DEFINITIONS,EXIT
+ mNEXTADR
+ MOV @RSP+,IP
+ENDCODEND MOV &CONTEXT+2,&CURRENT ;5 to do DEFINITIONS (before previous)
+ JMP PREVIOUS ;
- .IFDEF DEFERRED
FORTHWORD "CODENNM" ; CODENoNaMe is the assembly counterpart of :NONAME
CODENNM PUSH #ASMCODE1 ; define HEADERLESS return
JMP HEADERLESS ; that makes room for CFA and PFA
- .ENDIF
; here are 3 words used to switch FORTH <--> ASSEMBLER
; COLON -- compile DOCOL, remove ASSEMBLER from CONTEXT and CURRENT, switch to compilation state
asmword "COLON"
- MOV &DDP,W
- .SWITCH DTC
- .CASE 1
- MOV #1284h,0(W) ; compile CALL R4 = rDOCOL ([rDOCOL] = XDOCOL)
- ADD #2,&DDP
- .CASE 2
+ MOV &DP,W
+ .SWITCH DTC
+ .CASE 1
+ MOV #DOCOL,0(W) ; compile CALL R4 = rDOCOL ([rDOCOL] = XDOCOL)
+ ADD #2,&DP
+ .CASE 2
MOV #120Dh,0(W) ; compile PUSH IP
-COLON1 MOV #1284h,2(W) ; compile CALL R4 = rDOCOL
- ADD #4,&DDP
- .CASE 3 ; inlined DOCOL
+COLON1 MOV #DOCOL,2(W) ; compile CALL R4 = rDOCOL
+ ADD #4,&DP
+ .CASE 3 ; inlined DOCOL
MOV #120Dh,0(W) ; compile PUSH IP
COLON1 MOV #400Dh,2(W) ; compile MOV PC,IP
MOV #522Dh,4(W) ; compile ADD #4,IP
MOV #4D30h,6(W) ; compile MOV @IP+,PC
- ADD #8,&DDP ;
- .ENDCASE ; DTC
-
-COLON2 MOV #-1,&STATE ; enter in compile state
- mDOCOL
- .word PREVIOUS,DEFINITIONS,EXIT ; restore previous CONTEXT and set CURRENT = CONTEXT
+ ADD #8,&DP ;
+ .ENDCASE ; DTC
+COLON2 MOV #-1,&STATE ;3 enter in compile state
+ JMP ENDCODEND ;2 to do PREVIOUS DEFINITIONS
; LO2HI -- same as COLON but without saving IP
asmword "LO2HI"
- .SWITCH DTC
- .CASE 1 ; compile 2 words
- MOV &DDP,W
+ .SWITCH DTC
+ .CASE 1 ; compile 2 words
+ MOV &DP,W
MOV #12B0h,0(W) ; compile CALL #EXIT, 2 words 4+6=10~
MOV #EXIT,2(W)
- ADD #4,&DDP
+ ADD #4,&DP
JMP COLON2
- .ELSECASE ; CASE 2 : compile 1 word, CASE 3 : compile 3 words
- SUB #2,&DDP ; to skip PUSH IP
- MOV &DDP,W
+ .ELSECASE ; CASE 2 : compile 1 word, CASE 3 : compile 3 words
+ SUB #2,&DP ; to skip PUSH IP
+ MOV &DP,W
JMP COLON1
- .ENDCASE
+ .ENDCASE
; HI2LO -- immediate, switch to low level, set interpretation state, add ASSEMBLER to CONTEXT
FORTHWORDIMM "HI2LO" ;
- mDOCOL
- .word HERE,CELLPLUS,COMMA ; compile HERE+2
- .word LEFTBRACKET ; switch to interpret state
- .word ASMCODE2 ; add ASSEMBLER in context
- .word EXIT
-
- .ENDIF ; MSP430ASSEMBLER
-
- .IFDEF CONDCOMP
-; ------------------------------------------------------------------------------
-; forthMSP430FR : CONDITIONNAL COMPILATION
-; ------------------------------------------------------------------------------
- .include "forthMSP430FR_CONDCOMP.asm"
- .ENDIF
-
- .IFDEF CORE_COMPLEMENT
-; ------------------------------------------------------------------------------
-; CONTROL STRUCTURES
-; ------------------------------------------------------------------------------
-; THEN and BEGIN compile nothing
-; DO compile one word
-; IF, ELSE, AGAIN, UNTIL, WHILE, REPEAT, LOOP & +LOOP compile two words
-; LEAVE compile three words
-
- FORTHWORDIMM "IF" ; immediate
-; https://forth-standard.org/standard/core/IF
-; IF -- IFadr initialize conditional forward branch
-IFF SUB #2,PSP ;
- MOV TOS,0(PSP) ;
- MOV &DDP,TOS ; -- HERE
- ADD #4,&DDP ; compile one word, reserve one word
- MOV #QFBRAN,0(TOS) ; -- HERE compile QFBRAN
- .ENDIF ; CORE_COMPLEMENT
-CELLPLUS ADD #2,TOS ; -- HERE+2=IFadr
- MOV @IP+,PC
-
- .IFDEF CORE_COMPLEMENT
- FORTHWORDIMM "ELSE" ; immediate
-; https://forth-standard.org/standard/core/ELSE
-; ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
-ELSS ADD #4,&DDP ; make room to compile two words
- MOV &DDP,W ; W=HERE+4
- MOV #BRAN,-4(W)
- MOV W,0(TOS) ; HERE+4 ==> [IFadr]
- SUB #2,W ; HERE+2
- MOV W,TOS ; -- ELSEadr
- MOV @IP+,PC
-
- FORTHWORDIMM "THEN" ; immediate
-; https://forth-standard.org/standard/core/THEN
-; THEN IFadr -- resolve forward branch
-THEN MOV &DDP,0(TOS) ; -- IFadr
- MOV @PSP+,TOS ; --
- MOV @IP+,PC
-
- FORTHWORDIMM "BEGIN" ; immediate
-; https://forth-standard.org/standard/core/BEGIN
-; BEGIN -- BEGINadr initialize backward branch
- MOV #HERE,PC ; -- HERE
-
- FORTHWORDIMM "UNTIL" ; immediate
-; https://forth-standard.org/standard/core/UNTIL
-; UNTIL BEGINadr -- resolve conditional backward branch
-UNTIL MOV #QFBRAN,X
-UNTIL1 ADD #4,&DDP ; compile two words
- MOV &DDP,W ; W = HERE
- MOV X,-4(W) ; compile Bran or QFBRAN at HERE
- MOV TOS,-2(W) ; compile bakcward adr at HERE+2
- MOV @PSP+,TOS
- MOV @IP+,PC
-
- FORTHWORDIMM "AGAIN" ; immediate
-; https://forth-standard.org/standard/core/AGAIN
-;X AGAIN BEGINadr -- resolve uncondionnal backward branch
-AGAIN MOV #BRAN,X
- JMP UNTIL1
-
- FORTHWORDIMM "WHILE" ; immediate
-; https://forth-standard.org/standard/core/WHILE
-; WHILE BEGINadr -- WHILEadr BEGINadr
-WHILE mDOCOL
- .word IFF,SWAP,EXIT
-
- FORTHWORDIMM "REPEAT" ; immediate
-; https://forth-standard.org/standard/core/REPEAT
-; REPEAT WHILEadr BEGINadr -- resolve WHILE loop
-REPEAT mDOCOL
- .word AGAIN,THEN,EXIT
-
- FORTHWORDIMM "DO" ; immediate
-; https://forth-standard.org/standard/core/DO
-; DO -- DOadr L: -- 0
-DO SUB #2,PSP ;
- MOV TOS,0(PSP) ;
- ADD #2,&DDP ; make room to compile xdo
- MOV &DDP,TOS ; -- HERE+2
- MOV #xdo,-2(TOS) ; compile xdo
- ADD #2,&LEAVEPTR ; -- HERE+2 LEAVEPTR+2
- MOV &LEAVEPTR,W ;
- MOV #0,0(W) ; -- HERE+2 L-- 0
- MOV @IP+,PC
-
- FORTHWORD "I"
-; https://forth-standard.org/standard/core/I
-; I -- n R: sys1 sys2 -- sys1 sys2
-; get the innermost loop index
-II SUB #2,PSP ;1 make room in TOS
- MOV TOS,0(PSP) ;3
- MOV @RSP,TOS ;2 index = loopctr - fudge
- SUB 2(RSP),TOS ;3
- MOV @IP+,PC ;4 13~
-
- FORTHWORDIMM "LOOP" ; immediate
-; https://forth-standard.org/standard/core/LOOP
-; LOOP DOadr -- L-- an an-1 .. a1 0
-LOO MOV #xloop,X
-LOOPNEXT ADD #4,&DDP ; make room to compile two words
- MOV &DDP,W
- MOV X,-4(W) ; xloop --> HERE
- MOV TOS,-2(W) ; DOadr --> HERE+2
-; resolve all "leave" adr
-LEAVELOOP MOV &LEAVEPTR,TOS ; -- Adr of top LeaveStack cell
- SUB #2,&LEAVEPTR ; --
- MOV @TOS,TOS ; -- first LeaveStack value
- CMP #0,TOS ; -- = value left by DO ?
- JZ LOOPEND
- MOV W,0(TOS) ; move adr after loop as UNLOOP adr
- JMP LEAVELOOP
-LOOPEND MOV @PSP+,TOS
- MOV @IP+,PC
-
- FORTHWORDIMM "+LOOP" ; immediate
-; https://forth-standard.org/standard/core/PlusLOOP
-; +LOOP adrs -- L-- an an-1 .. a1 0
-PLUSLOOP MOV #xploop,X
- JMP LOOPNEXT
- .ENDIF ; CORE_COMPLEMENT
+ ADD #2,&DP ; HERE+2
+ MOV &DP,W ; W = HERE+2
+ MOV W,-2(W) ; compile HERE+2 to HERE
+ MOV #0,&STATE ; LEFTBRACKET
+ JMP ASMCODE2 ; add ASSEMBLER in context
- .IFDEF VOCABULARY_SET
;-------------------------------------------------------------------------------
-; WORDS SET for VOCABULARY, not ANS compliant
+; WORDS SET for VOCABULARY, not ANS compliant,
;-------------------------------------------------------------------------------
- .IFNDEF DOES
- FORTHWORD "DOES>"
-; https://forth-standard.org/standard/core/DOES
-; DOES> -- set action for the latest CREATEd definition
-DOES MOV &LAST_CFA,W ; W = CFA of CREATEd word
- MOV #1285h,0(W) ; replace CFA (DOCON) by new CFA (DODOES)
- MOV IP,2(W) ; replace PFA by the address after DOES> as execution address
- MOV @RSP+,IP ;
- MOV @IP+,PC ; exit of the new created word
- .ENDIF
-
- FORTHWORD "VOCABULARY"
-;X VOCABULARY -- create a vocabulary, up to 7 vocabularies in CONTEXT
+ .IFDEF VOCABULARY_SET
+ FORTHWORD "WORDSET"
+;X VOCABULARY -- create a new word_set
VOCABULARY mDOCOL
.word CREATE
.SWITCH THREADS
.CASE 1
- .word lit,0,COMMA ; will keep the NFA of the last word of the future created vocabularies
+ .word lit,0,COMMA ; W = DP
+ mNEXTADR ;
.ELSECASE
- .word lit,THREADS,lit,0,xdo
-VOCABULOOP .word lit,0,COMMA
- .word xloop,VOCABULOOP
- .ENDCASE
- .word HERE ; link via LASTVOC the future created vocabulary
- .word LIT,LASTVOC,DUP
- .word FETCH,COMMA ; compile [LASTVOC] to HERE+
- .word STORE ; store (HERE - 2) to LASTVOC
- .word DOES ; compile CFA and PFA for the future defined vocabulary
+ mNEXTADR ; W = DP
+ MOV #THREADS,X ; count
+VOCABULOOP MOV #0,0(W) ; DP = BODY first
+ ADD #2,W
+ SUB #1,X
+ JNZ VOCABULOOP
+ .ENDCASE ; W = DP
+ MOV &LASTVOC,0(W)
+ MOV W,&LASTVOC
+ ADD #2,W
+ MOV W,&DP ; update DP
+ mASM2FORTH
+ .word DOES
.ENDIF ; VOCABULARY_SET
-VOCDOES .word LIT,CONTEXT,STORE
- .word EXIT
+VOCDOES mNEXTADR ; adds WORD-SET first in context stack
+ .IFDEF VOCABULARY_SET
+ALSO MOV #7,Y ;2 -- move up 7 words, first word in last
+ MOV #CONTEXT+12,X ;2 X=src
+ALSOLOOP MOV @X,2(X) ; X=src < Y=dst copy W bytes beginning with the end
+ SUB #2,X
+ SUB #1,Y
+ JNZ ALSOLOOP
+ .ELSE ; VOCABULARY_SET off ; VOCDOES is used only by the assembler to switch from HIlevel to LOlevel environments
+ MOV #BODYFORTH,&CONTEXT+2;4 copy BODYFORTH --> 2th cell of CONTEXT
+ .ENDIF ; VOCABULARY_SET
+ MOV TOS,&CONTEXT ;3 copy word-set BODY --> first cell of CONTEXT
+ MOV #DROPEXIT,PC
.IFDEF VOCABULARY_SET
FORTHWORD "FORTH"
- .ENDIF ; VOCABULARY_SET
-;X FORTH -- ; set FORTH the first context vocabulary; FORTH must be the first vocabulary
+ .ENDIF
+;X FORTH -- ; add FORTH as first context word-set
FORTH ; leave BODYFORTH on the stack and run VOCDOES
CALL rDODOES ; Code Field Address (CFA) of FORTH
PFAFORTH .word VOCDOES ; Parameter Field Address (PFA) of FORTH
-BODYFORTH ; BODY of FORTH
- .word lastforthword
+BODYFORTH .word lastforthword ; BODY of FORTH
.SWITCH THREADS
.CASE 2
.word lastforthword1
.word voclink
voclink .set $-2
- .IFDEF MSP430ASSEMBLER
.IFDEF VOCABULARY_SET
- FORTHWORD "ASSEMBLER"
- .ENDIF ; VOCABULARY_SET
-;X ASSEMBLER -- ; set ASSEMBLER the first context vocabulary
+; FORTHWORD "ASSEMBLER"
+ FORTHWORD "hidden" ; cannot be found by FORTH interpreter because the string is not capitalized
+ .ENDIF
+;X ASSEMBLER -- ; add ASSEMBLER as first context word-set
ASSEMBLER CALL rDODOES ; leave BODYASSEMBLER on the stack and run VOCDOES
- .word VOCDOES
-BODYASSEMBLER
- .word lastasmword
+ .word VOCDOES
+BODYASSEMBLER .word lastasmword
.SWITCH THREADS
.CASE 2
.word lastasmword1
.ENDCASE
.word voclink
voclink .set $-2
- .ENDIF ; MSP430ASSEMBLER
-
- .IFDEF VOCABULARY_SET
- FORTHWORD "ALSO"
- .ENDIF ; VOCABULARY_SET
-;X ALSO -- make room to put a vocabulary as first in context
-ALSO MOV #12,W ; -- move up 6 words, 8th word of CONTEXT area must remain to 0
- MOV #CONTEXT+12,X ; X=src
- MOV X,Y
- ADD #2,Y ; Y=dst
-MOVEUP SUB #1,X
- SUB #1,Y
- MOV.B @X,0(Y) ; if X=src < Y=dst copy W bytes beginning with the end
- SUB #1,W
- JNZ MOVEUP
- MOV @IP+,PC
.IFDEF VOCABULARY_SET
FORTHWORD "PREVIOUS"
+;X PREVIOUS -- pop first word-set out of context stack
+PREVIOUS MOV #8,Y ;1 move down 8 words, first with CONTEXT+2 addr, end when NULL_WORD is moved
+ MOV #CONTEXT+2,X ;2 X = CONTEXT+2 = org, X-2 = CONTEXT = dst
+PREVIOUSLOO CMP #0,0(X) ;3 [org] = 0 ?
+ JZ PREVIOUSEND ;2 to avoid scratch of the first CONTEXT cell by human mistake, then to skip useless loops
+ MOV @X+,-4(X) ;4
+ SUB #1,Y ;1
+ JNZ PREVIOUSLOO ;2 7~ loop * 8 = 56 ~
+PREVIOUSEND MOV @IP+,PC ;4
+ .ELSE ;
+PREVIOUS MOV #BODYFORTH,&CONTEXT
+ONLY MOV #0,&CONTEXT+2 ; then execute ONLY
+ MOV @IP+,PC
.ENDIF ; VOCABULARY_SET
-;X PREVIOUS -- pop last vocabulary out of context
-PREVIOUS MOV #14,W ; move down 7 words, first with the 8th word equal to 0
- MOV #CONTEXT,Y ; Y=dst
- MOV Y,X
- ADD #2,X ; X=src
-MOVEDOWN MOV.B @X+,0(Y) ; if X=src > Y=dst copy W bytes
- ADD #1,Y
- SUB #1,W
- JNZ MOVEDOWN
-MOVEND MOV @IP+,PC
.IFDEF VOCABULARY_SET
FORTHWORD "ONLY"
- .ENDIF ; VOCABULARY_SET
-;X ONLY -- cut context list to access only first vocabulary, ex.: FORTH ONLY
+;X ONLY -- cut the context stack to access only the first word-set, ex.: FORTH ONLY
ONLY MOV #0,&CONTEXT+2
MOV @IP+,PC
- .IFDEF VOCABULARY_SET
FORTHWORD "DEFINITIONS"
- .ENDIF ; VOCABULARY_SET
;X DEFINITIONS -- set last context vocabulary as entry for further defining words
DEFINITIONS MOV &CONTEXT,&CURRENT
MOV @IP+,PC
-
- .IFDEF USE_MOVE ; if UTILITY.asm|ANS_COMP.asm
- FORTHWORD "MOVE"
-; https://forth-standard.org/standard/core/MOVE
-; MOVE addr1 addr2 u -- smart move
-; VERSION FOR 1 ADDRESS UNIT = 1 CHAR
-MOVE MOV TOS,W ; W = cnt
- MOV @PSP+,Y ; Y = addr2 = dst
- MOV @PSP+,X ; X = addr1 = src
- MOV @PSP+,TOS ; pop new TOS
- CMP #0,W ; count = 0 ?
- JZ MOVEND ; already done !
- CMP X,Y ; Y=dst = X=src ?
- JZ MOVEND ; already done !
- JNC MOVEDOWN ; if Y=dst < X=src ; see PREVIOUS
- ADD W,Y ; move beginning with the end
- ADD W,X ;
- JMP MOVEUP ; if Y=dst > X=src ; see ALSO
- .ENDIF
+ .ENDIF ; VOCABULARY_SET
;-------------------------------------------------------------------------------
-; MEMORY MANAGEMENT
+; FASTFORTH environment management: DP, LASTVOC, CURRENT, CONTEXT and THREADS
;-------------------------------------------------------------------------------
-STATE_DOES ; execution part of PWR_STATE ; sorry, doesn't restore search order pointers
- .word FORTH,ONLY,DEFINITIONS
- .word $+2 ; -- BODY IP is free
- .IFDEF VOCABULARY_SET
- MOV @TOS+,W ; -- BODY+2 W = old VOCLINK = VLK
+ENV_COPY
+ .IFDEF VOCABULARY_SET
+ MOV #24,T ; bytes count of extended RST environment: DP,LASTVOC,CURRENT,CONTEXT(8),null_word
.ELSE
- MOV &WIPE_VOC,W ; W = VOCLINK = VLK
- .ENDIF
- MOV W,&LASTVOC ; restore (or init) LASTVOC in RAM
- MOV @TOS,TOS ; -- OLD_DP
- MOV TOS,&DDP ; -- DP restore (or init) DP in RAM
- ; then restore words link(s) with their value < old DP
- .SWITCH THREADS
- .CASE 1 ; mono thread vocabularies
-MARKALLVOC MOV W,Y ; -- DP W=VLK Y=VLK
-MRKWORDLOOP MOV -2(Y),Y ; -- DP W=VLK Y=NFA
- CMP Y,TOS ; -- DP CMP = TOS-Y : OLD_DP-NFA
- JNC MRKWORDLOOP ; loop back if TOS<Y : OLD_DP<NFA
- MOV Y,-2(W) ; W=VLK X=THD Y=NFA refresh thread with good NFA
- MOV @W,W ; -- DP W=[VLK] = next voclink
- CMP #0,W ; -- DP W=[VLK] = next voclink end of vocs ?
- JNZ MARKALLVOC ; -- DP W=VLK no : loopback
- .ELSECASE ; multi threads vocabularies
-MARKALLVOC MOV #THREADS,IP ; -- DP W=VLK
- MOV W,X ; -- DP W=VLK X=VLK
-MRKTHRDLOOP MOV X,Y ; -- DP W=VLK X=VLK Y=VLK
- SUB #2,X ; -- DP W=VLK X=THD (thread ((case-2)to0))
-MRKWORDLOOP MOV -2(Y),Y ; -- DP W=VLK Y=NFA
- CMP Y,TOS ; -- DP CMP = TOS-Y : DP-NFA
- JNC MRKWORDLOOP ; loop back if TOS<Y : DP<NFA
-MARKTHREAD MOV Y,0(X) ; W=VLK X=THD Y=NFA refresh thread with good NFA
- SUB #1,IP ; -- DP W=VLK X=THD Y=NFA IP=CFT-1
- JNZ MRKTHRDLOOP ; loopback to compare NFA in next thread (thread-1)
- MOV @W,W ; -- DP W=[VLK] = next voclink
- CMP #0,W ; -- DP W=[VLK] = next voclink end of vocs ?
- JNZ MARKALLVOC ; -- DP W=VLK no : loopback
- .ENDCASE ; of THREADS ; -- DP
- MOV @PSP+,TOS ;
- MOV @RSP+,IP ;
-NEXT_ADR MOV @IP+,PC ;
-
-;-------------------------------------------------------------------------------
-; FASTFORTH START: set DP, VOCLINK, CURRENT and CONTEXT
-;-------------------------------------------------------------------------------
- FORTHWORD "PWR_STATE" ; executed by POWER_ON and ABORT_TERM; does PWR_HERE word set
-PWR_STATE CALL rDODOES ; DOES part of MARKER : resets pointers DP, voclink
- .word STATE_DOES ; execution vector of PWR_STATE
- .IFDEF VOCABULARY_SET
-MARKVOC .word lastvoclink ; initialised by forthMSP430FR.asm as voclink value
- .ENDIF
-MARKDP .word ROMDICT ; initialised by forthMSP430FR.asm as DP value
-
- FORTHWORD "RST_STATE" ; executed by <reset>, COLD, SYSRSTIV error; does RST_HERE word set
-RST_STATE MOV &RST_DP,&MARKDP ; INIT value above (FRAM value)
- .IFDEF VOCABULARY_SET
- MOV &RST_VOC,&MARKVOC ; INIT value above (FRAM value)
- .ENDIF
- JMP PWR_STATE
-
- FORTHWORD "PWR_HERE" ; define word set bound for POWER_ON, ABORT_TERM.
-PWR_HERE MOV &DDP,&MARKDP
- .IFDEF VOCABULARY_SET
- MOV &LASTVOC,&MARKVOC
+ MOV #10,T ; bytes count of RST environment: DP,LASTVOC,CURRENT,CONTEXT(2)
.ENDIF
+ENV_LOOP MOV @X+,0(W)
+ ADD #2,W
+ SUB #2,T ; words-1
+ JNZ ENV_LOOP
+ MOV @RSP+,PC
+
+ FORTHWORD "RST_SET" ; define actual environment as new RESET environment
+RST_SET MOV #DP,X ; org = RAM value (DP first)
+ MOV #RST_DP,W ; dst = FRAM value (RST_DP first), see \inc\ThingsInFirst.inc
+ CALL #ENV_COPY ; copy environment RAM --> FRAM RST, use T,W,X
MOV @IP+,PC
- FORTHWORD "RST_HERE" ; define word set bound for <reset>, COLD, SYSRSTIV error.
-RST_HERE MOV &DDP,&RST_DP
- .IFDEF VOCABULARY_SET
- MOV &LASTVOC,&RST_VOC
- .ENDIF
- JMP PWR_HERE ; and obviously the same for POWER_ON...
+ FORTHWORD "RST_RET" ; init / return_to_previous RESET or MARKER environment
+RST_RET MOV #RST_DP,X ; org = FRAM value (first RST_DP), see \inc\ThingsInFirst.inc
+ MOV @X,S ; S = restored DP, used below for comparaison with NFAs
+ MOV #DP,W ; dst = RAM value (first DP)
+ CALL #ENV_COPY ; copy environment FRAM RST --> RAM, use T,W,X
+;-----------------------------------;
+ MOV &LASTVOC,W ; W = init/restored LASTVOC
+ .SWITCH THREADS ; init/restore THREAD(s) with NFAs value < init/restored DP, for all word set
+ .CASE 1 ; mono thread word-set
+MARKALLVOC MOV W,Y ; W=VLK Y = VLK
+MRKWORDLOOP MOV -2(Y),Y ; W=VLK Y = [THD_n] then [LFA] = NFA
+ CMP Y,S ; Y=NFA S=DP CMP = S-Y : OLD_DP-NFA
+ JNC MRKWORDLOOP ; loop back if S<Y : OLD_DP<NFA
+ MOV Y,-2(W) ; W=VLK X=THD Y=NFA refresh thread with good NFA
+ .ELSECASE ; multi threads word-set
+MARKALLVOC MOV #THREADS,T ; S=DP T=ThdCnt (Threads Count), VLK = THD_n+1
+ MOV W,X ; W = VLK X = VLK then THD_n (VOCLINK first, then THREADn)
+MRKTHRDLOOP MOV X,Y ;
+ SUB #2,X ;
+MRKWORDLOOP MOV -2(Y),Y ; Y = NFA = [THD_n] then [LFA]
+ CMP Y,S ; Y = NFA S=DP CMP = S-Y : DP-NFA
+ JNC MRKWORDLOOP ; loop back if S<Y : DP<NFA (if not_carry = if borrow)
+MARKTHREAD MOV Y,0(X) ; Y=NFA X=THD_n refresh thread with good NFA
+ SUB #1,T ; T=ThdCnt-1
+ JNZ MRKTHRDLOOP ; loopback to process NFA of next thread (thread-1)
+ .ENDCASE ; of THREADS ;
+ MOV @W,W ; W=[VLK] = VLK-1
+ CMP #0,W ; end of vocs ?
+ JNZ MARKALLVOC ; W=VLK-1 no : loopback
+ MOV @IP+,PC ;
;-------------------------------------------------------------------------------
-; PUC 6.2: SELECT PWR_STATE|RST_STATE|DEEP_RESET <== INI_FORTH
+; PUC 7 : SELECT RST_RET|DEEP_RESET <== INIT_FORTH <== (PUC,SYS,QABORT)
;-------------------------------------------------------------------------------
-SEL_P_R_D CMP #0Eh,TOS ;
- JZ PWR_STATE ; if RSTIV_MEM = 14 (SYSSVSH event)
- CMP #4,TOS ;
- JGE RST_STATE ; if RSTIV_MEM >= 4 (RESET,COLD,SYS_FAILURES)
- CMP #0,TOS ;
- JGE PWR_STATE ; if RSTIV_MEM >= 0 (POWER_ON,WARM,ABORT")
+SEL_RST_DEP CMP #0,TOS ;
+ JGE RST_RET ; if TOS >= 0
;-----------------------------------;
-; DEEP RESET ; if RSTIV_MEM < 0
+; DEEP RESET ; if TOS < 0
;-----------------------------------;
-; INIT SIGNATURES AREA ;
+; DEEP INIT SIGNATURES AREA ;
;-----------------------------------;
MOV #16,X ; max known SIGNATURES length = 12 bytes
SIGNATLOOP SUB #2,X ;
- MOV #-1,SIGNATURES(X) ; reset signature; WARNING ! DON'T CHANGE IMMEDIATE VALUE !
+ MOV #-1,SIGNATURES(X) ; reset signatures; WARNING ! DON'T CHANGE IMMEDIATE VALUE !
JNZ SIGNATLOOP ;
-;-----------------------------------; X = 0 ;-)
-; INIT VECTORS INT ;
-;-----------------------------------;
+;-----------------------------------;
+; DEEP INIT VECTORS INT ; X = 0 ;-)
+;-----------------------------------;
MOV #RESET,-2(X) ; write RESET at addr X-2 = FFFEh
INIVECLOOP SUB #2,X ;
MOV #COLD,-2(X) ; -2(X) = FFFCh first
- CMP #0FFAEh,X ; init 41 vectors, FFFCh down to 0FFACh
+ CMP #0FFACh+2,X ; init 41 vectors, FFFCh down to 0FFACh
JNZ INIVECLOOP ; all vectors are initialised to execute COLD routine
-;-----------------------------------;
-; INIT all "CALL #xxx_APP" ;
-;-----------------------------------;
- MOV #WIPE_INI,X ; WIPE_INI constants are in FRAM INFO
- MOV @X+,&PFACOLD ; COLD_TERM as default COLD_APP --> PFACOLD
- MOV @X+,&PFA_INI_FORTH ; RET_ADR|INI_FORTH_SD as default INI_SOFT_APP --> PFA_INI_FORTH
- MOV @X+,&PFASLEEP ; RXON as default BACKGND_APP --> PFASLEEP
- MOV @X+,&PFAWARM ; INIT_TERM|INIT_SD as default INI_HARD_APP --> PFAWARM
- MOV @X+,&TERM_VEC ; TERMINAL_INT as default vector --> TERM_VEC
-;-----------------------------------;
-; INIT DP VOC_link ;
-;-----------------------------------;
- MOV @X+,&RST_DP ; ROMDICT --> RST_DP
- .IFDEF VOCABULARY_SET
- MOV @X+,&RST_VOC ; lastvoclink --> RST_VOC
+;-----------------------------------;
+; DEEP INIT Terminal Int vector ;
+;-----------------------------------;
+ MOV #DEEP_ORG,X ; DEEP_ORG values are in FRAM INFO, see \inc\ThingsInFirst.inc
+ MOV @X+,&TERM_VEC ; TERMINAL_INT as default vector --> FRAM TERM_VEC
+;-----------------------------------;
+; DEEP INIT FRAM RST values ; 8 word values
+;-----------------------------------;
+ MOV #RST_LEN,T ; bytes count
+ MOV #RST_ORG,W ; W = dst, X = org
+ CALL #ENV_LOOP ;
+ MOV #0,&RST_CONTEXT+2 ; to do FORTH ONLY
+;-----------------------------------;
+; WARM INIT threads of all word set ;
+;-----------------------------------;
+ JMP RST_RET ; then go to DUP|PUCNEXT, resp. in QABORT|RESET
+;-----------------------------------;
+
+; https://forth-standard.org/standard/core/MARKER
+; MARKER
+;name Execution: ( -- )
+;Restore all dictionary allocation and search order pointers to the state they had just prior to the
+;definition of name. Remove the definition of name and all subsequent definitions. Restoration
+;of any structures still existing that could refer to deleted definitions or deallocated data space is
+;not necessarily provided. No other contextual information such as numeric base is affected.
+
+; FastForth provides all that is necessary for a real time application with MARKER definition,
+; by adding a call to a custom subroutine to restore all user environment.
+; the FORTH environment is it automaticaly restored.
+MARKER_DOES ; restores RST environment saved by MARKER defn.,
+ ; executes user defined subroutine (RET_ADR by default),
+ ; then executes RST_RET.
+ mNEXTADR ; -- BODY
+ .IFDEF VOCABULARY_SET
+ MOV TOS,X ; X = org (first : BODY=MARKER_DP)
+ MOV #RST_DP,W ; W = dst (first : RST_DP), see \inc\ThingsInFirst.inc
+ CALL #ENV_COPY ; copy FORTH environment FRAM MARKER --> FRAM RST
+ MOV X,TOS ; -- RET_ADR by default
+ .ELSE
+ MOV @TOS+,&RST_DP ;
.ENDIF
-;-----------------------------------;
- JMP RST_STATE ; then return to LIT|WARM from resp. QABORT|RESET
-;-----------------------------------;
-
-;===============================================================================
-; ┌┐ ┌─┐┬─┐ ┌─┐┌─┐┬─┐ ┌─┐┬ ┬┌─┐ ┌─┐┌─┐┬┬ ┬ ┬┬─┐┌─┐┌─┐ ┌─┐┌─┐┬ ┬ ┬ ┬┌─┐┬─┐┌─┐
-; ├┴┐│ │├┬┘ ├─┘│ │├┬┘ ├─┘│ ││ ├┤ ├─┤││ │ │├┬┘├┤ └─┐ ├┤ ├─┤│ │ ├─┤├┤ ├┬┘├┤
-; └─┘└─┘┴└─ ┴ └─┘┴└─ ┴ └─┘└─┘ └ ┴ ┴┴┴─┘└─┘┴└─└─┘└─┘ └ ┴ ┴┴─┘┴─┘ ┴ ┴└─┘┴└─└─┘
-;===============================================================================
-RESET
-;===============================================================================
-; PUC 1: replace pin RESET by pin NMI, stops WDT_RESET
-;-------------------------------------------------------------------------------
- BIS #3,&SFRRPCR ; pin RST becomes pin NMI with falling edge, so SYSRSTIV = 4
- BIS #10h,&SFRIE1 ; enable NMI interrupt ==> hardware RESET is redirected to COLD.
- MOV #5A80h,&WDTCTL ; disable WDT RESET
-;-------------------------------------------------------------------------------
-; PUC 2: INIT STACKS
-;-------------------------------------------------------------------------------
- MOV #RSTACK,RSP ; init return stack
- MOV #PSTACK,PSP ; init parameter stack
-;-------------------------------------------------------------------------------
-; PUC 3: init RAM to 0
-;-------------------------------------------------------------------------------
- MOV #RAM_LEN,X
-INITRAMLOOP SUB #2,X ; 1
- MOV #0,RAM_ORG(X) ; 3
- JNZ INITRAMLOOP ; 2 6 cycles loop !
-;-------------------------------------------------------------------------------
-; PUC 4: I/O, RAM, RTC, CS, SYS initialisation limited to FastForth usage.
-; All unused I/O are set as input with pullup resistor.
-;-------------------------------------------------------------------------------
- .include "TargetInit.asm" ; include target specific init code
-;-------------------------------------------------------------------------------
-; PUC 5: GET SYSRSTIV
-;-------------------------------------------------------------------------------
- MOV &RSTIV_MEM,TOS ; get RSTIV_MEM = Soft_SYSRSTIV
- MOV #0,&RSTIV_MEM ; clear RSTIV_MEM
- BIS &SYSRSTIV,TOS ; hard_SYSRSTIV|soft_SYSRSTIV --> TOS; SYSRSTIV = 0
+ CALL @TOS+ ; -- USER_BODY executes user defined asm subroutine (RET_ADR by default), IP and TOS are free
+ MOV @PSP+,TOS ; --
+ MOV @RSP+,IP ;
+ JMP RST_RET ; then performs RST_RET
+
+ FORTHWORD "MARKER" ; definition part
+;( "<spaces>name" -- )
+;Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
+;with the execution semantics defined above.
;-------------------------------------------------------------------------------
-; PUC 6: START FORTH engine
+;before that, it execute DOES part of previous definition if already exists.
+ PUSH &TOIN
+ mDOCOL
+ .word BL,WORDD,FIND
+ .word QFBRAN,MARKER_NEXT
+ .word DUP,EXECUTE
+MARKER_NEXT mNEXTADR
+ MOV @PSP+,TOS ;
+ MOV @RSP+,IP
+ MOV @RSP+,&TOIN
;-------------------------------------------------------------------------------
- CALL #INI_FORTH ; common ?ABORT|PUC "hybrid" subroutine with return to FORTH interpreter
- .word WARM ; goto WARM, without return. See forthMSP430FR_TERM_xxx.asm
-;-----------------------------------;
+ CALL #HEADER ;4 W = DP, Y = NFA,
+ MOV #1285h,-4(W) ;4 CFA = CALL rDODOES
+ MOV #MARKER_DOES,-2(W) ;4 PFA = MARKER_DOES
+ SUB #2,Y ;1 Y = NFA-2 = LFA = DP to be restored, W = FRAM MARKER_DDP
+ .IFDEF VOCABULARY_SET
+ MOV Y,&DP ; Y = previous DP (just before MARKER definition)
+ MOV #DP,X ; X = org = RAM DP, W = dst = MARKER_BODY
+ CALL #ENV_COPY ; copy environment RAM --> FRAM MARKER
+ MOV #RET_ADR,0(W) ;4 user defined subroutine by default = RET_ADR
+ ADD #2,W ;1
+ MOV W,&DP ;4 set new RAM DP (after the end of MARKER definition)
+ .ELSE
+ MOV Y,0(W) ; DP to be restored
+ MOV #RET_ADR,2(W) ; MARKER subroutine
+ ADD #4,&DP ;
+ .ENDIF
+LINK_NFA MOV &LAST_NFA,Y ; if no error, link this definition in its thread
+ MOV &LAST_THREAD,X ;
+REVEAL MOV @X,-2(Y) ; [LAST_THREAD] --> LFA (for NONAME: LFA --> 210h unused PA reg)
+ MOV Y,0(X) ; LAST_NFA --> [LAST_THREAD] (for NONAME: [LAST_THREAD] --> 212h unused PA reg)
+REVEAL_END MOV @IP+,PC
- .IFDEF MSP430ASSEMBLER
;===============================================================================
; ASSEMBLER OPTION
;===============================================================================
- .IFDEF EXTENDED_ASM
- .include "forthMSP430FR_EXTD_ASM.asm"
- .ELSE
- .include "forthMSP430FR_ASM.asm"
- .ENDIF
- .ENDIF
- .IFDEF UTILITY
-;-------------------------------------------------------------------------------
-; UTILITY WORDS OPTION
-;-------------------------------------------------------------------------------
- .include "ADDON/UTILITY.asm"
- .ENDIF
- .IFDEF FIXPOINT
-;-------------------------------------------------------------------------------
-; FIXED POINT OPERATORS OPTION
-;-------------------------------------------------------------------------------
- .include "ADDON/FIXPOINT.asm"
+ .IFDEF EXTENDED_ASM
+ .include "forthMSP430FR_EXTD_ASM.asm"
+ .ELSE
+ .include "forthMSP430FR_ASM.asm"
.ENDIF
+
.IFDEF SD_CARD_LOADER
;-------------------------------------------------------------------------------
; SD CARD OPTIONS
.include "forthMSP430FR_SD_LowLvl.asm" ; SD primitives
.include "forthMSP430FR_SD_INIT.asm" ; return to INIT_TERM; without use of IP,TOS
.include "forthMSP430FR_SD_LOAD.asm" ; SD LOAD driver
+; .include "forthMSP430FR_SD_LOAD_next.asm" ; SD LOAD driver
.IFDEF SD_CARD_READ_WRITE
.include "forthMSP430FR_SD_RW.asm" ; SD Read/Write driver
- .ENDIF
- .IFDEF SD_TOOLS
- .include "ADDON/SD_TOOLS.asm"
+; .include "forthMSP430FR_SD_RW_next.asm" ; SD Read/Write driver
.ENDIF
.ENDIF
;-------------------------------------------------------------------------------
-; ADD HERE YOUR CODE TO BE INTEGRATED IN KERNEL (protected against WIPE)
+; ADD HERE YOUR CODE TO BE INTEGRATED IN KERNEL (protected against Deep_RST)
;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
;
-; .include "MY_CODE.asm"
+; .include "\ADDON\CORE_ANS.asm"
+; .include "\ADDON\UTILITY.asm"
+; .include "\ADDON\FIXPOINT.asm"
+; .include "YOUR_CODE.asm"
;
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-; ADD HERE YOUR CODE TO BE INTEGRATED IN KERNEL (protected against WIPE)
+; ADD HERE YOUR CODE TO BE INTEGRATED IN KERNEL (protected against Deep_RST)
;-------------------------------------------------------------------------------
;-------------------------------------------------------------------------------
; -*- coding: utf-8 -*-
; ----------------------------------------------------------------------
-;forthMSP430FR_asm.asm
+;forthMSP430FR_asm.asm 1584 bytes
; ----------------------------------------------------------------------
; ----------------------------------------------------------------------
-; MOV(.B) #0, dst is coded as follow : MOV(.B) R3, dst ; 1 cycle, one word As=00 register mode
-; MOV(.B) #1, dst is coded as follow : MOV(.B) 0(R3), dst ; 2 cycles, one word AS=01 x(reg) mode
-; MOV(.B) #2, dst is coded as follow : MOV(.B) @R3, dst ; 2 cycles, one word AS=10 @reg mode
-; MOV(.B) #4, dst is coded as follow : MOV(.B) @R2, dst ; 2 cycles, one word AS=10 @reg mode
-; MOV(.B) #8, dst is coded as follow : MOV(.B) @R2+, dst ; 2 cycles, one word AS=11 @reg+ mode
-; MOV(.B) #-1,dst is coded as follow : MOV(.B) @R3+, dst ; 2 cycles, one word AS=11
-; MOV(.B) #xxxx,dst is coded a follow : MOV(.B) @PC+, dst ; 2 cycles, two words AS=11 @reg+ mode
-; MOV(.B) &EDE,&TON is coded as follow: MOV(.B) EDE(R2),TON(R2) ; (R2=0), three words AS=01, AD=1 x(reg) mode
+; MOV(.B) SR,dst is coded as follow : MOV(.B) R2,dst ; 1 cycle, one word AS=00 (register mode)
+; MOV(.B) #0,dst is coded as follow : MOV(.B) R3,dst ; 1 cycle, one word AS=00 (register mode)
+; MOV(.B) &EDE,dst is coded as follow : MOV(.B) EDE(R2),dst ; 3 cycles, two words AS=01 ( x(reg) mode)
+; MOV(.B) #1,dst is coded as follow : MOV(.B) (R3),dst ; 1 cycle, one word AS=01 ( x(reg) mode)
+; MOV(.B) #4,dst is coded as follow : MOV(.B) @R2,dst ; 1 cycle, one word AS=10 ( @reg mode)
+; MOV(.B) #2,dst is coded as follow : MOV(.B) @R3,dst ; 1 cycle, one word AS=10 ( @reg mode)
+; MOV(.B) #8,dst is coded as follow : MOV(.B) @R2+,dst ; 1 cycle, one word AS=11 ( @reg+ mode)
+; MOV(.B) #-1,dst is coded as follow : MOV(.B) @R3+,dst ; 1 cycle, one word AS=11 ( @reg+ mode)
+; ----------------------------------------------------------------------
+; MOV(.B) #xxxx,dst is coded as follow: MOV(.B) @PC+,dst ; 2 cycles, two words AS=11 ( @reg+ mode)
; ----------------------------------------------------------------------
; PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
; example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
-
-;;Z SKIP char -- addr ; skip all occurring character 'char'
-; FORTHWORD "SKIP" ; used by assembler to parse input stream
-SKIP MOV #SOURCE_LEN,Y ;2
- MOV TOS,W ; -- char W=char
- MOV @Y+,X ;2 -- char W=char X=buf_length
- MOV @Y,TOS ;2 -- Start_buf_adr W=char X=buf_length
- ADD TOS,X ; -- Start_buf_adr W=char X=Start_buf_adr+buf_length=End_buf_addr
- ADD &TOIN,TOS ; -- Parse_Adr W=char X=End_buf_addr
-SKIPLOOP CMP TOS,X ; -- Parse_Adr W=char X=End_buf_addr
- JZ SKIPEND ; -- Parse_Adr if end of buffer
- CMP.B @TOS+,W ; -- Parse_Adr does character match?
- JZ SKIPLOOP ; -- Parse_Adr+1
-SKIPNEXT SUB #1,TOS ; -- addr
-SKIPEND MOV TOS,W ;
- SUB @Y,W ; -- addr W=Parse_Addr-Start_buf_adr=Toin
- MOV W,&TOIN ;
- MOV @IP+,PC ; 4
-
; ----------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER : search argument "xxxx", IP is free
+; DTCforthMSP430FR5xxx ASSEMBLER : search argument "xxxx"
; ----------------------------------------------------------------------
-SearchARG ; separator -- n|d or abort" not found"
-; Search ARG of "#xxxx," ; <== PARAM10
-; Search ARG of "&xxxx," ; <== PARAM111
-; Search ARG of "xxxx(REG)," ; <== ComputeARGpREG <== PARAM130
-; Search ARG of ",&xxxx" ; <== PARAM111 <== PARAM20
-; Search ARG of ",xxxx(REG)" ; <== ComputeARGpREG <== PARAM210
- PUSHM #2,S ; PUSHM S,T as OPCODE,OPCODEADR
- PUSH TOS ; push sep, for SrchARGPO
- PUSH &TOIN ; push TOIN, for SrchARGPO
-;-----------------------------------;
- ASMtoFORTH ; -- sep sep = ','|'('|' '
- .word WORDD,FIND ; -- addr search word first
- .word ZEROEQUAL
- .word QFBRAN,ARGWORD ; -- addr if Word found
- .word QNUMBER ;
- .word QFBRAN,SrchARGPO; -- addr search ARG Plus Offset if not found
- .word SrchNext ; -- value goto SrchNext if number found
-ARGWORD .word $+2 ; -- CFA
- MOV @TOS+,S ; -- PFA S=DOxxx
-QDOVAR SUB #1287h,S ; DOxxx = 1287h = CALL R7 = rDOVAR
-ISDOVAR JZ SrchNext ; -- addr PFA = adr of VARIABLE
-QDOCON ADD #1,S ; DOxxx = 1286h = DOCON
- JNZ ISOTHER ;
-ISDOCON MOV @TOS,TOS ;
- JMP SrchNext ; -- cte
-ISOTHER SUB #2,TOS ; -- CFA
-SrchNext ADD #4,RSP ; remove TOIN,sep
-SearchEnd POPM #2,S ; POPM T,S
- MOV @RSP+,PC ; RET
-;-----------------------------------;
-; search for ARGUMENT16+OFFSET ; up to $FFFF only (FORTH area)
-;-----------------------------------;
-SrchARGPO .word $+2
- MOV @RSP+,&TOIN ; TOIN back
- MOV @RSP+,TOS ; -- sep
- ASMtoFORTH ;
- .word LIT,'+' ; -- sep '+' search argument
- .word WORDD,FIND ; -- sep CFA
- .word ZEROEQUAL ;
- .word QFBRAN,SrchOffst;
- .word QNUMBER ; -- sep number
- .word QFBRAN,NotFound ; see INTERPRET
-SrchOffst .word SWAP ; -- CFA|number sep
- .word WORDD,QNUMBER ; Search 'Offset,'|'Offset('|'Offset'
- .word QFBRAN,NotFound ; see INTERPRET
- .word $+2 ; -- CFA|number offset
- ADD @PSP+,TOS ; -- (CFA|number + offset)
- JMP SearchEnd ;
+; common code for maxi 3 successive SearchARG: SearchARG, SearchARG+Offset, SearchARG-offset
+; leave PFA of VARIABLE, [PFA] of CONSTANT, User_Parameter_Field_Address of MARKER_DOES, CFA for all others.
+; if the ARGument is not found after those three SearchARg, the 'not found' error is issued by SrchOfst.
+SearchARGn PUSH &TOIN ; push TOIN, for next SearchARGn if any
+ mASM2FORTH ; -- sep sep = ','|'('|' '
+ .word WORDD,FIND ; -- addr search string name first
+ .word QFBRAN,SrchArgNum ; -- addr if string name not found
+COMPUTEARG mNEXTADR ; -- CFA of named definition
+ MOV @TOS+,S ; -- PFA S=DOxxx
+QDOVAR SUB #1287h,S ; CFA = DOxxx = 1287h = CALL R7 = rDOVAR
+ISDOVAR JZ ARGFOUND ; -- addr PFA = adr of VARIABLE
+QDOCON ADD #1,S ; CFA = DOxxx = 1286h = DOCON
+ JNZ QMARKER ;
+ISDOCON MOV @TOS,TOS ; -- cte
+ JMP ARGFOUND ; -- cte
+QMARKER CMP #MARKER_DOES,0(TOS) ; -- PFA search if PFA = [MARKER_DOES]
+ JNZ ISOTHER ; -- PFA
+ .IFDEF VOCABULARY_SET ; -- PFA
+ ADD #30,TOS ; -- UPFA+2 skip room for DP, CURRENT, CONTEXT(8), null_word, LASTVOC, RET_ADR 2+(2+2+16+2+2+2) +2 bytes
+ .ELSE ;
+ ADD #8,TOS ; -- UPFA+2 skip room for DP, RET_ADR 2+(2+2) +2 bytes
+ .ENDIF ;
+ISOTHER SUB #2,TOS ; -- CFA|UPFA UPFA = MARKER_DOES User_Parameter_Field_Address
+ARGFOUND ADD #2,RSP ; remove TOIN
+SEARCHRET MOV @RSP+,PC ;24 SR(Z)=0 if ARG found
+
+SrchArgNum .word QNUMBER ;
+ .word QFBRAN,ARGNOTFOUND; -- addr with SR(Z)=1
+ .word ARGFOUND ; -- value no return
+ARGNOTFOUND mNEXTADR ; -- x
+ MOV @RSP+,&TOIN ; restore TOIN
+ MOV @RSP+,PC ;32 SR(Z)=1 if ARG not found
+
+SearchIndex
+; Search index of "xxxx(REG)," ; <== ComputeIDXpREG <== PARAM13
+; Search index of ",xxxx(REG)" ; <== ComputeIDXpREG <== PARAM21
+ SUB #1,&TOIN ; move >IN back one (unskip 'R')
+ MOV #'(',TOS ; addr -- "(" as WORD separator to find xxxx of "xxxx(REG),"
+SearchARG ; sep -- n|d or abort" not found"
+; Search ARG of "#xxxx," ; <== PARAM101
+; Search ARG of "&xxxx," ; <== PARAM111
+; Search ARG of ",&xxxx" ; <== PARAM111 <== PARAM201
+ MOV TOS,W
+ PUSHM #4,IP ; -- sep PUSHM IP,S,T,W as IP_RET,OPCODE,OPCODEADR,sep
+ CALL #SearchARGn ; first search argument without offset
+ JNZ SrchEnd ; -- ARG if ARG found
+SearchArgPo MOV #'+',TOS ; -- '+'
+ CALL #SearchARGn ; 2th search argument with '+' as separator
+ JNZ ArgPlusOfst ; -- ARG if ARG of ARG+offset found
+SearchArgMo MOV #'-',TOS ; -- '-'
+ CALL #SearchARGn ; 3th search argument with '-' as separator
+ SUB #1,&TOIN ; to handle offset with its minus sign
+ArgPlusOfst PUSH TOS ; -- ARG save ARG on stack
+ MOV 2(RSP),TOS ; -- sep reload offset sep
+SrchOfst mASM2FORTH ;
+ .word WORDD,QNUMBER ; -- Ofst|c-addr flag
+ .word QFBRAN,NotFound ; -- c-addr no return, see INTERPRET
+ mNEXTADR ; -- Ofst
+ ADD @RSP+,TOS ; -- Arg+Ofst
+SrchEnd POPM #4,IP ; POPM W,T,S,IP common return for SearchARG and SearchRn
+ MOV @RSP+,PC ;66
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : search REG
; ----------------------------------------------------------------------
-
-; compute arg of "xxxx(REG)," ; <== PARAM130, sep=','
-; compute arg of ",xxxx(REG)" ; <== PARAM210, sep=' '
-ComputeARGpREG ; sep -- Rn
- MOV #'(',TOS ; -- "(" as WORD separator to find xxxx of "xxxx(REG),"
- CALL #SearchARG ; -- xxxx aborted if not found
- MOV &DDP,X
- ADD #2,&DDP
- MOV TOS,0(X) ; -- xxxx compile xxxx
+; compute index of "xxxx(REG)," ; <== PARAM13, sep=','
+; compute index of ",xxxx(REG)" ; <== PARAM210, sep=' '
+ComputeIDXpREG ; addr -- Rn|addr
+ CALL #SearchIndex ; -- xxxx aborted if not found
+ MOV &DP,X
+ MOV TOS,0(X) ; -- xxxx compile ARG xxxx
+ ADD #2,&DP
MOV #')',TOS ; -- ")" prepare separator to search REG of "xxxx(REG)"
-
- CMP &SOURCE_LEN,&TOIN ; bad case of ,xxxx (without prefix &)
- JNZ SearchREG ;
- MOV #BAD_CSP,PC ; génère une erreur bidon
-
-; search REG of "xxxx(REG)," separator = ')'
-; search REG of ",xxxx(REG)" separator = ')'
+; search REG of "xxxx(REG)," separator = ')'
+; search REG of ",xxxx(REG)" separator = ')'
; search REG of "@REG," separator = ',' <== PARAM120
; search REG of "@REG+," separator = '+' <== PARAM121
+SkipRSearchRn
+ ADD #1,&TOIN ; skip "R" in input buffer
; search REG of "REG," separator = ',' <== PARAM13
; search REG of ",REG" separator = BL <== PARAM21
-
-SearchREG PUSHM #2,S ; PUSHM S,T as OPCODE, OPCODEADR
- PUSH &TOIN ; -- sep save >IN
- ADD #1,&TOIN ; skip "R"
- ASMtoFORTH ; search xx of Rxx
+SearchRn MOV &TOIN,W ;
+ PUSHM #4,IP ; PUSHM IP,S,T,W as IP_RET,OPCODE,OPCODEADR,TOIN
+ mASM2FORTH ; search xx of Rxx
.word WORDD,QNUMBER ;
- .word QFBRAN,NOTaREG ; -- xxxx if Not a Number
- .word $+2 ; -- Rn number is found
- ADD #2,RSP ; remove >IN
- CMP #16,TOS ; -- Rn
- JNC SearchEnd ; -- Rn
+ .word QFBRAN,REGNOTFOUND; -- xxxx SR(Z)=1 if Not a Number
+ mNEXTADR ; -- Rn number is found
+ CMP #16,TOS ; -- Rn
+ JNC SrchEnd ; -- Rn SR(Z)=0, Rn found,
JC BOUNDERROR ; abort if Rn out of bounds
-NOTaREG .word $+2 ; -- addr Z=1
- MOV @RSP+,&TOIN ; -- addr restore >IN
- JMP SearchEnd ; -- addr Z=1 ==> not a register
+REGNOTFOUND mNEXTADR ; -- addr SR(Z)=1, (case of @REG not found),
+ MOV @RSP,&TOIN ; -- addr restore TOIN, ready for next SearchRn
+ JMP SrchEnd ; -- addr SR(Z)=1 ==> not a register
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : INTERPRET FIRST OPERAND
; ----------------------------------------------------------------------
-
-; PARAM1 separator -- ; parse input buffer until separator and compute first operand of opcode
- ; sep is comma for src and space for dst .
-PARAM1 mDOCOL ; -- sep OPCODES types I|V sep = ',' OPCODES types II|VI sep = ' '
- .word FBLANK,SKIP ; -- sep addr
- .word $+2 ; -- sep addr
- MOV #0,S ; -- sep addr reset OPCODE
- MOV &DDP,T ; -- sep addr HERE --> OPCODEADR (opcode is preset to its address !)
- ADD #2,&DDP ; -- sep addr cell allot for opcode
- MOV.B @TOS,W ; -- sep addr W=first char of instruction code
- MOV @PSP+,TOS ; -- sep W=c-addr
- CMP.B #'#',W ; -- sep W=first char
- JNE PARAM11
-; "#" found : case of "#xxxx,"
-PARAM10 ADD #1,&TOIN ; -- sep skip # prefix
- CALL #SearchARG ; -- xxxx abort if not found
+; PARAM1 separator -- ; parse input buffer until separator and compute first operand of opcode
+ ; sep is comma for src and space for dst .
+PARAM1 JNZ PARAM10 ; -- sep if prefix <> 'R'
+ CALL #SearchRn ; case of "REG,"
+ JMP PARAM123 ; -- 000R REG of "REG," found, S=OPCODE=0
+; ----------------------------------;
+PARAM10 CMP.B #'#',W ; -- sep W=first char
+ JNE PARAM11
+PARAM101 CALL #SearchARG ; -- xxxx abort if not found
MOV #0300h,S ; OPCODE = 0300h : MOV #0,dst is coded MOV R3,dst
CMP #0,TOS ; -- xxxx #0 ?
JZ PARAMENDOF
MOV #0220h,S ; OPCODE = 0220h : MOV #4,dst is coded MOV @R2,dst
CMP #4,TOS ; -- xxxx #4 ?
JZ PARAMENDOF
- MOV #0230h,S ; OPCODE = 0230h : MOV #8,dst is coded MOV @R2+,dst
+ MOV #0230h,S ; OPCODE = 0230h : MOV #8,dst is coded MOV @R2+,dst
CMP #8,TOS ; -- xxxx #8 ?
JZ PARAMENDOF
- MOV #0330h,S ; -- -1 OPCODE = 0330h : MOV #-1,dst is coded MOV @R3+,dst
+ MOV #0330h,S ; OPCODE = 0330h : MOV #-1,dst is coded MOV @R3+,dst
CMP #-1,TOS ; -- xxxx #-1 ?
JZ PARAMENDOF
MOV #0030h,S ; -- xxxx for all other cases : MOV @PC+,dst
-; case of "&xxxx," ; <== PARAM110
-; case of ",&xxxx" ; <== PARAM20
-StoreArg MOV &DDP,X ;
- ADD #2,&DDP ; cell allot for arg
-StoreTOS ; <== TYPE1DOES
+; endcase of "&xxxx," ; <== PARAM111
+; endcase of ",&xxxx" ; <== PARAM111 <== PARAM201
+StoreArg MOV &DP,X ;
+ ADD #2,&DP ; cell allot for arg
MOV TOS,0(X) ; compile arg
+; endcase of all "#xxxx," ;
; endcase of all "&xxxx" ;
-; endcase of all "#xxxx" ; <== PARAM101,102,104,108,10M1
-; endcase of all "REG"|"@REG"|"@REG+" <== PARAM124
+; endcase of all "xxxx(REG)"|"@REG"|"@REG+" <== PARAM124
PARAMENDOF MOV @PSP+,TOS ; --
- MOV @RSP+,IP ;
MOV @IP+,PC ; -- S=OPCODE,T=OPCODEADR
; ----------------------------------;
PARAM11 CMP.B #'&',W ; -- sep
JNE PARAM12
; case of "&xxxx," ; -- sep search for "&xxxx,"
-PARAM110 MOV #0210h,S ; -- sep set code type : xxxx(SR) with AS=0b01 ==> x210h (and SR=0 !)
-; case of "&xxxx,"
-; case of ",&xxxx" ; <== PARAM20
-PARAM111 ADD #1,&TOIN ; -- sep skip "&" prefix
- CALL #SearchARG ; -- arg abort if not found
+PARAM110 MOV #0210h,S ; -- sep set code type : xxxx(R2) with AS=0b01 ==> x210h
+; case of "&xxxx,"|",&xxxx" ; <== PARAM201
+PARAM111 CALL #SearchARG ; -- arg abort if not found
JMP StoreArg ; -- then ret
; ----------------------------------;
PARAM12 CMP.B #'@',W ; -- sep
JNE PARAM13
; case of "@REG,"|"@REG+,"
PARAM120 MOV #0020h,S ; -- sep init OPCODE with indirect code type : AS=0b10
- ADD #1,&TOIN ; -- sep skip "@" prefix
- CALL #SearchREG ; Z = not found
- JNZ PARAM123 ; -- value REG of "@REG," found
-; case of "@REG+," ; -- addr REG of "@REG" not found, search REG of "@REG+"
-PARAM121 ADD #0010h,S ; change OPCODE from @REG to @REG+ type
- MOV #'+',TOS ; -- "+" as WORD separator to find REG of "@REG+,"
- CALL #SearchREG ; -- value|addr X = flag
-; case of "@REG+," ;
-; case of "xxxx(REG)," ; <== PARAM130
- ; case of double separator: +, and ),
-PARAM122 CMP &SOURCE_LEN,&TOIN ; test OPCODE II parameter ending by REG+ or (REG) without comma,
+ CALL #SkipRSearchRn ; Z = not found
+ JNZ PARAM123 ; -- Rn REG of "@REG," found
+; case of "@REG+," ; -- addr search REG of "@REG+"
+PARAM121 BIS #0010h,S ; change OPCODE from @REG to @REG+ type
+ MOV #'+',TOS ; -- sep
+ CALL #SearchRn ; -- Rn
+; case of "@REG+,"|"xxxx(REG)," ; <== PARAM13
+PARAM122 ; case of double separator: +, and ),
+ CMP &SOURCE_LEN,&TOIN ; test OPCODE II parameter ending by REG+ or (REG) without comma,
JZ PARAM123 ; i.e. >IN = SOURCE_LEN : don't skip char CR !
ADD #1,&TOIN ; -- 000R skip "," ready for the second operand search
-; case of "@REG+,"
-; case of "xxxx(REG),"
+; case of "@REG+,"|"xxxx(REG)," ;
; case of "@REG," ; -- 000R <== PARAM120
-; case of "REG," ; -- 000R <== PARAM13
+; case of "REG," ; -- 000R <== PARAM1
PARAM123 SWPB TOS ; -- 0R00 swap bytes because it's not a dst REG typeI (not a 2 ops inst.)
-; case of "@REG+," ; -- 0R00 (src REG typeI)
-; case of "xxxx(REG)," ; -- 0R00 (src REG typeI or dst REG typeII)
-; case of "@REG," ; -- 0R00 (src REG typeI)
-; case of "REG," ; -- 0R00 (src REG typeI or dst REG typeII)
-; case of ",REG" ; -- 000R <== PARAM21 (dst REG typeI)
-; case of ",xxxx(REG)" ; -- 000R <== PARAM210 (dst REG typeI)
+; case of ",REG" ; -- 000R <== PARAM2 (dst REG typeI)
+; case of ",xxxx(REG)" ; -- 000R <== PARAM21 (dst REG typeI)
PARAM124 ADD TOS,S ; -- 0R00|000R
JMP PARAMENDOF
; ----------------------------------;
-; case of "REG,"|"xxxx(REG)," ; first, searg REG of "REG,"
-PARAM13 CALL #SearchREG ; -- sep save >IN for second parsing (case of "xxxx(REG),")
- JNZ PARAM123 ; -- 000R REG of "REG," found, S=OPCODE=0
-; case of "xxxx(REG)," ; -- c-addr "REG," not found
-PARAM130 ADD #0010h,S ; AS=0b01 for indexing address
- CALL #ComputeARGpREG ; compile xxxx and search REG of "(REG)"
- JMP PARAM122 ;
+; case of "xxxx(REG)," ; -- sep
+PARAM13 BIS #0010h,S ; AS=0b01 for indexing address
+ CALL #ComputeIDXpREG ; compile index xxxx and search REG of "(REG)"
+ JMP PARAM122 ; -- Rn
+; ----------------------------------;
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : INTERPRET 2th OPERAND
; ----------------------------------------------------------------------
-
-PARAM3 ; for OPCODES TYPE III
- MOV #0,S ; init OPCODE=0
- MOV &DDP,T ; T=OPCODEADR
- ADD #2,&DDP ; make room for opcode
+PARAM2 JNZ PARAM20 ; -- sep if prefix <> 'R'
+ CALL #SearchRn ; -- sep case of ",REG"
+ JMP PARAM124 ; -- 000R REG of ",REG" found
; ----------------------------------;
-PARAM2 mDOCOL ; parse input buffer until BL and compute this 2th operand
- .word FBLANK,SKIP ; skip space(s) between "arg1," and "arg2" if any; use not S,T.
- .word $+2 ; -- c-addr search for '&' of "&xxxx
- CMP.B #'&',0(TOS) ;
- MOV #20h,TOS ; -- ' ' as WORD separator to find xxxx of ",&xxxx"
- JNE PARAM21 ; '&' not found
+PARAM20 CMP.B #'&',W ;
+ JNZ PARAM21 ; '&' not found
; case of ",&xxxx" ;
-PARAM20 ADD #0082h,S ; change OPCODE : AD=1, dst = R2
+PARAM201 BIS #0082h,S ; change OPCODE : AD=1, dst = R2
JMP PARAM111 ; -- ' '
; ----------------------------------;
-; case of ",REG"|",xxxx(REG) ; -- ' ' first, search REG of ",REG"
-PARAM21 CALL #SearchREG ;
- JNZ PARAM124 ; -- 000R REG of ",REG" found
-; case of ",xxxx(REG) ; -- addr REG not found
-PARAM210 ADD #0080h,S ; set AD=1
- CALL #ComputeARGpREG ; compile argument xxxx and search REG of "(REG)"
- JMP PARAM124 ; -- 000R REG of "(REG) found
+; case of ",xxxx(REG) ; -- sep
+PARAM21 BIS #0080h,S ; set AD=1
+ CALL #ComputeIDXpREG ; compile index xxxx and search REG of ",xxxx(REG)"
+ JMP PARAM124 ; -- 000R REG of ",xxxx(REG) found
+
+; ----------------------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER: reset OPCODE in S reg, set OPCODE addr in T reg,
+; move Prefix in W reg, skip prefix in input buffer. Flag SR(Z)=1 if prefix = 'R'.
+; ----------------------------------------------------------------------------------------
+InitAndSkipPrfx
+ MOV #0,S ; reset OPCODE
+ MOV &DP,T ; HERE --> OPCODEADR
+ ADD #2,&DP ; cell allot for opcode
+; SkipPrfx ; -- skip all occurring char 'BL' plus one prefix
+SkipPrfx MOV #20h,W ; -- W=BL
+ MOV &TOIN,X ; --
+ ADD &SOURCE_ORG,X ;
+SKIPLOOP CMP.B @X+,W ; -- W=BL does character match?
+ JZ SKIPLOOP ; --
+ MOV.B -1(X),W ; W=prefix
+ SUB &SOURCE_ORG,X ; --
+ MOV X,&TOIN ; -- >IN points after prefix
+ CMP.B #'R',W ; preset SR(Z)=1 if prefix = 'R'
+ MOV @IP+,PC ; 4
; ----------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER: OPCODES TYPE 0 : zero operand :-)
+; DTCforthMSP430FR5xxx ASSEMBLER: OPCODE TYPE 0 : zero operand :-)
; ----------------------------------------------------------------------
asmword "RETI"
mDOCOL
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER: OPCODES TYPE I : double operand
; ----------------------------------------------------------------------
-; OPCODE(FEDC)
+; OPCODE(FEDC)
; OPCODE(code) = 0bxxxx opcode
; OPCODE(BA98)
; = 0bxxxx src_register,
; OPCODE(3210)
; OPCODE(dst) = 0bxxxx ,dst_register
; ----------------------------------------------------------------------
-TYPE1DOES .word lit,',',PARAM1 ; -- BODYDOES
- .word PARAM2 ; -- BODYDOES char separator (BL) included in PARAM2
- .word $+2 ;
-MAKEOPCODE MOV T,X ; -- opcode X= OPCODEADR to compile opcode
- MOV @TOS,TOS ; -- opcode part of instruction
- BIS S,TOS ; -- opcode opcode is complete
- JMP StoreTOS ; -- then EXIT
+
+; TYPE1DOES -- BODYDOES search and compute PARAM1 & PARAM2 as src and dst operands then compile instruction
+TYPE1DOES .word lit,','
+ .word InitAndSkipPrfx ; init S=0, T=DP, DP=DP+2 then skip prefix, SR(Z)=1 if prefix = 'R'
+ .word PARAM1 ; -- BODYDOES
+ .word BL,SkipPrfx ; SR(Z)=1 if prefix = 'R'
+ .word PARAM2 ; -- BODYDOES
+ mNEXTADR ;
+MAKEOPCODE MOV @RSP+,IP
+ BIS @TOS,S ; -- opcode generic opcode + customized S
+ MOV S,0(T) ; -- opcode store completed opcode
+ JMP PARAMENDOF ; -- then EXIT
asmword "MOV"
CALL rDODOES
; OPCODE(3210)
; OPCODE(dst) = 0bxxxx dst register
; ----------------------------------------------------------------------
-TYPE2DOES .word FBLANK,PARAM1 ; -- BODYDOES
- .word $+2 ;
+
+TYPE2DOES ; -- BODYDOES
+ .word BL ; -- BODYDOES ' '
+ .word InitAndSkipPrfx ;
+ .word PARAM1 ; -- BODYDOES
+ mNEXTADR ;
MOV S,W ;
AND #0070h,S ; keep B/W & AS infos in OPCODE
SWPB W ; (REG org --> REG dst)
BOUNDERRWM1 ADD #1,W ; <== RRAM|RRUM|RRCM|RLAM error
BOUNDERRORW MOV W,TOS ; <== PUSHM|POPM|ASM_branch error
BOUNDERROR ; <== REG number error
- mDOCOL ; -- n n = value out of bounds
+ mASM2FORTH ; -- n n = value out of bounds
.word DOT,XSQUOTE
.byte 13,"out of bounds"
.word ABORT_TERM
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, CONDITIONAL BRANCHS
; ----------------------------------------------------------------------
-; ASSEMBLER FORTH OPCODE(FEDC)
+; ASSEMBLER FORTH OPCODE(FEDC)
; OPCODE(code) for TYPE JNE,JNZ 0<>, <> = 0x20xx + (offset AND 3FF) ; branch if Z = 0
; OPCODE(code) for TYPE JEQ,JZ 0=, = = 0x24xx + (offset AND 3FF) ; branch if Z = 1
; OPCODE(code) for TYPE JNC,JLO U< = 0x28xx + (offset AND 3FF) ; branch if C = 0
;ASM IF OPCODE -- @OPCODE1
asmword "IF"
-ASM_IF MOV &DDP,W
+ASM_IF MOV &DP,W
MOV TOS,0(W) ; compile incomplete opcode
- ADD #2,&DDP
+ ADD #2,&DP
MOV W,TOS
MOV @IP+,PC
;ASM THEN @OPCODE -- resolve forward branch
asmword "THEN"
-ASM_THEN MOV &DDP,W ; -- @OPCODE W=dst
+ASM_THEN MOV &DP,W ; -- @OPCODE W=dst
MOV TOS,Y ; Y=@OPCODE
ASM_THEN1 MOV @PSP+,TOS ; --
MOV Y,X ;
; ELSE @OPCODE1 -- @OPCODE2 branch for IF..ELSE
asmword "ELSE"
-ASM_ELSE MOV &DDP,W ; -- W=HERE
+ASM_ELSE MOV &DP,W ; -- W=HERE
MOV #3C00h,0(W) ; compile unconditionnal branch
- ADD #2,&DDP ; -- DP+2
+ ADD #2,&DP ; -- DP+2
SUB #2,PSP
MOV W,0(PSP) ; -- @OPCODE2 @OPCODE1
JMP ASM_THEN ; -- @OPCODE2
; BEGIN -- BEGINadr initialize backward branch
asmword "BEGIN"
- MOV #HERE,PC
+ MOV #HEREXEC,PC
; UNTIL @BEGIN OPCODE -- resolve conditional backward branch
asmword "UNTIL"
ASM_UNTIL MOV @PSP+,W ; -- OPCODE W=@BEGIN
ASM_UNTIL1 MOV TOS,Y ; Y=OPCODE W=@BEGIN
ASM_UNTIL2 MOV @PSP+,TOS ; --
- MOV &DDP,X ; -- Y=OPCODE X=HERE W=dst
+ MOV &DP,X ; -- Y=OPCODE X=HERE W=dst
SUB #2,W ; -- Y=OPCODE X=HERE W=dst-2
SUB X,W ; -- Y=OPCODE X=src W=src-dst-2=displacement (bytes)
RRA W ; -- Y=OPCODE X=HERE W=displacement (words)
AND #3FFh,W ; -- Y=OPCODE X=HERE W=troncated negative displacement (words)
BIS W,Y ; -- Y=OPCODE (completed)
MOV Y,0(X)
- ADD #2,&DDP
+ ADD #2,&DP
MOV @IP+,PC
-; AGAIN @BEGIN -- uncond'l backward branch
+; AGAIN @BEGIN -- uncond'l backward branch
; unconditional backward branch
asmword "AGAIN"
ASM_AGAIN MOV TOS,W ; W=@BEGIN
;BACKWDOES FORTHtoASM
; MOV @RSP+,IP
; MOV @TOS,TOS
-; MOV TOS,Y ; Y = ASMBWx
-; MOV @PSP+,TOS ;
-; MOV @Y,W ; W = [ASMBWx]
+; MOV @TOS,Y ; Y = ASMBWx
+; MOV @PSP+,TOS ;
+; MOV @Y,W ; W = [BWx]
; CMP #8,&TOIN ; are we colon 8 or more ?
-;BACKWUSE JHS ASM_UNTIL1 ; yes, use this label
-;BACKWSET MOV &DDP,0(Y) ; no, set LABEL = DP
+;BACKWUSE JHS ASM_UNTIL1 ; yes, use this label
+;BACKWSET MOV &DP,0(Y) ; no, set LABEL = DP
; mNEXT
;; backward label 1
; .word BACKWDOES
; .word ASMBW1 ; in RAM
-BACKWDOES .word $+2
+BACKWDOES mNEXTADR
MOV @RSP+,IP ;
- MOV TOS,Y ; -- PFA Y = ASMBWx addr
+ MOV TOS,Y ; -- BODY Y = BWx addr
MOV @PSP+,TOS ; --
MOV @Y,W ; W = LABEL
CMP #8,&TOIN ; are we colon 8 or more ?
-BACKWUSE JC ASM_UNTIL1 ; yes, use this label
-BACKWSET MOV &DDP,0(Y) ; no, set LABEL = DP
+BACKWUSE JC ASM_UNTIL1 ; yes, use this label
+BACKWSET MOV &DP,0(Y) ; no, set LABEL = DP
MOV @IP+,PC
; backward label 1
asmword "BW1"
- CALL rDODOES
- .word BACKWDOES
- .word 0
+ CALL rDODOES ; CFA
+ .word BACKWDOES ; PFA
+ .word 0 ; BODY
; backward label 2
asmword "BW2"
CALL rDODOES
.word BACKWDOES
.word 0
-;FORWDOES .word $+2
+;FORWDOES mNEXTADR
; MOV @RSP+,IP
-; MOV &DDP,W ;
+; MOV &DP,W ;
; MOV @TOS,TOS
-; MOV @TOS,Y ; -- PFA Y= ASMFWx
+; MOV @TOS,Y ; -- BODY Y=@OPCODE of FWx
+; MOV #0,0(TOS) ; V3.9: clear @OPCODE of FWx to erratic 2th resolution
; CMP #8,&TOIN ; are we colon 8 or more ?
-;FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
+;FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DP, Y=@OPCODE
;FORWSET MOV @PSP+,0(W) ; yes compile incomplete opcode
-; ADD #2,&DDP ; increment DDP
+; ADD #2,&DP ; increment DP
; MOV W,0(TOS) ; store @OPCODE into ASMFWx
; MOV @PSP+,TOS ; --
; MOV @IP+,PC
;; forward label 1
; asmword "FW1"
; CALL rDODOES ; CFA
-; .word FORWDOES ;
-; .word ASMFW1 ; in RAM
+; .word FORWDOES ;
+; .word ASMFW1 ; in RAM
-FORWDOES .word $+2
+FORWDOES mNEXTADR
MOV @RSP+,IP
- MOV &DDP,W ;
- MOV @TOS,Y ; -- PFA Y=[BODY]=ASMFWx
+ MOV &DP,W ;
+ MOV @TOS,Y ; -- BODY Y=@OPCODE of FWx
+ MOV #0,0(TOS) ; V3.9: clear @OPCODE of FWx to avoid jmp resolution without label
CMP #8,&TOIN ; are we colon 8 or more ?
-FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
-FORWSET MOV @PSP+,0(W) ; yes compile incomplete opcode
- ADD #2,&DDP ; increment DDP
- MOV W,0(TOS) ; store @OPCODE into ASMFWx
- MOV @PSP+,TOS ; --
+FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DP, Y=@OPCODE
+FORWSET MOV @PSP+,0(W) ; yes compile opcode (without displacement)
+ ADD #2,&DP ; increment DP
+ MOV W,0(TOS) ; store @OPCODE into BODY of FWx
+ MOV @PSP+,TOS ; --
MOV @IP+,PC
; forward label 1
asmword "FW1"
CALL rDODOES ; CFA
- .word FORWDOES ;
- .word 0 ; BODY
+ .word FORWDOES ; PFA
+ .word 0 ; BODY
; forward label 2
asmword "FW2"
CALL rDODOES
; --------------------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES TYPE III : PUSHM|POPM|RLAM|RRAM|RRUM|RRCM
; --------------------------------------------------------------------------------
-; PUSHM, syntax: PUSHM #n,REG with 0 < n < 17
-; POPM syntax: POPM #n,REG with 0 < n < 17
+; PUSHM, syntax: PUSHM #n,REG with 0 < n < 17
+; POPM syntax: POPM #n,REG with 0 < n < 17
; PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
; example : POPM #6,IP pulls Y,X,W,T,S,IP registers from return stack
-; RxxM syntax: RxxM #n,REG with 0 < n < 5
+; RxxM syntax: RxxM #n,REG with 0 < n < 5
-TYPE3DOES .word FBLANK,SKIP ; skip spaces if any
- .word $+2 ; -- BODYDOES c-addr
- ADD #1,&TOIN ; skip "#"
- MOV #',',TOS ; -- BODYDOES ","
- ASMtoFORTH
- .word WORDD,QNUMBER
+TYPE3DOES ; -- BODYDOES
+ .word SkipPrfx ;
+ .word LIT,',' ; -- BODYDOES ','
+ .word WORDD,QNUMBER ;
.word QFBRAN,NotFound ; see INTERPRET
- .word PARAM3 ; -- BODYDOES 0x000N S=OPCODE = 0x000R
- .word $+2
+ .word BL ; -- BODYDOES n ' '
+ .word InitAndSkipPrfx ; -- BODYDOES n ' '
+ .word PARAM2 ; -- BODYDOES n S=OPCODE = 0x000R
+ mNEXTADR
MOV TOS,W ; -- BODYDOES n W = n
MOV @PSP+,TOS ; -- BODYDOES
SUB #1,W ; W = n floored to 0
RLAM #4,X ; OPCODE bit 1000h --> C
JNC RxxMINSTRU ; if bit 1000h = 0
PxxxINSTRU MOV S,Y ; S=REG, Y=REG to test
- RLAM #3,X ; OPCODE bit 0200h --> C
+ RLAM #3,X ; OPCODE bit 0200h --> C
JNC PUSHMINSTRU ; W=n-1 Y=REG
POPMINSTRU SUB W,S ; to make POPM opcode, compute first REG to POP; TI is complicated....
PUSHMINSTRU SUB W,Y ; Y=REG-(n-1)
CMP #16,Y
JC BOUNDERRWM1 ; JC=JHS (U>=)
- RLAM #4,W ; W = n << 4
- JMP BIS_ASMTYPE ; BODYDOES --
+ RLAM #4,W ; W = n << 4
+ JMP BIS_ASMTYPE ; BODYDOES --
RxxMINSTRU CMP #4,W ;
JC BOUNDERRWM1 ; JC=JHS (U>=)
- SWPB W ; -- BODYDOES W = n << 8
+ SWPB W ; W = n << 8
RLAM #2,W ; W = N << 10
JMP BIS_ASMTYPE ; BODYDOES --
CALL rDODOES
.word TYPE3DOES,1700h
+
.IFDEF EXTENDED_MEM
asmword "RRCM.A"
CALL rDODOES
; DTCforthMSP430FR5xxx ASSEMBLER: OPCODE TYPE III bis: CALLA (without extended word)
; --------------------------------------------------------------------------------
; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers with dot)
-; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers with dot)
-; --------------------------------------------------------------------------------
-; may be usefull to access ROM libraries beyond $FFFF
+; indexed instructions must be written as $xxxx(REG)
; --------------------------------------------------------------------------------
asmword "CALLA"
mDOCOL
- .word FBLANK,SKIP ; -- addr
- .word $+2
- MOV &DDP,T ; T = DDP
- ADD #2,&DDP ; make room for opcode
- MOV.B @TOS,TOS ; -- char First char of opcode
+ .word BL ; -- sep
+ .word InitAndSkipPrfx ; -- sep SR(Z)=1 if prefix = 'R'
+ mNEXTADR
+ MOV @RSP+,IP
CALLA0 MOV #134h,S ; 134h<<4 = 1340h = opcode for CALLA Rn
- CMP.B #'R',TOS
- JNZ CALLA1
-CALLA01 MOV.B #' ',TOS ;
-CALLA02 CALL #SearchREG ; -- Rn
-CALLA03 RLAM #4,S ; (opcode>>4)<<4 = opcode
- BIS TOS,S ; update opcode
+ JNZ CALLA1 ; -- sep if prefix <> 'R'
+CALLA01 CALL #SearchRn ; -- Rn
+CALLA02 RLAM #4,S ; (opcode>>4)<<4 = opcode
+ BIS TOS,S ; update opcode with Rn|$x
MOV S,0(T) ; store opcode
- MOV @PSP+,TOS
- MOV @RSP+,IP
- MOV @IP+,PC
+ MOV @PSP+,TOS ; --
+ MOV @IP+,PC ;
;-----------------------------------;
-CALLA1 ADD #2,S ; 136h<<4 = opcode for CALLA @REG
- CMP.B #'@',TOS ; -- char Search @REG
+CALLA1 ADD #2,S ; -- sep 136h<<4 = opcode for CALLA @REG
+ CMP.B #'@',W ; Search @REG
JNZ CALLA2 ;
- ADD #1,&TOIN ; skip '@'
- MOV.B #' ',TOS ; -- ' '
- CALL #SearchREG ;
- JNZ CALLA03 ; if REG found, update opcode
+CALLA11 CALL #SkipRSearchRn ;
+ JNZ CALLA02 ; if REG found, update opcode
;-----------------------------------;
ADD #1,S ; 137h<<4 = opcode for CALLA @REG+
- MOV #'+',TOS ; -- '+'
- JMP CALLA02 ;
+ MOV #'+',TOS ; -- sep
+ JMP CALLA01 ;
;-----------------------------------;
-CALLA2 ADD #2,&DDP ; make room for xxxx of #$x.xxxx|&$x.xxxx|$0.xxxx(REG)
- CMP.B #'#',TOS ;
+CALLA2 ADD #2,&DP ; -- sep make room for xxxx of #$x.xxxx|&$x.xxxx|$xxxx(REG)
+ CMP.B #'#',W ;
JNZ CALLA3
MOV #13Bh,S ; 13Bh<<4 = opcode for CALLA #$x.xxxx
-CALLA21 ADD #1,&TOIN ; skip '#'|'&'
-CALLA22 CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store #$xxxx|&$xxxx
- JMP CALLA03 ; update opcode with $x. and store opcode
+CALLA21 CALL #SearchARG ; -- Lo Hi
+ MOV @PSP+,2(T) ; -- Hi store $xxxx of #$x.xxxx|&$x.xxxx
+ JMP CALLA02 ; update opcode with $x. and store opcode
;-----------------------------------;
-CALLA3 CMP.B #'&',TOS
+CALLA3 CMP.B #'&',W ; -- sep
JNZ CALLA4 ;
ADD #2,S ; 138h<<4 = opcode for CALLA &$x.xxxx
JMP CALLA21
;-----------------------------------;
-CALLA4 MOV.B #'(',TOS ; -- "("
- SUB #1,S ; 135h<<4 = opcode for CALLA $0.xxxx(REG)
-CALLA41 CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store $xxxx
- MOV #')',TOS ; -- ')'
- JMP CALLA02 ; search Rn and update opcode
-
+CALLA4 SUB #1,S ; 135h<<4 = opcode for CALLA $xxxx(REG)
+CALLA41 CALL #SearchIndex ; -- n
+ MOV TOS,2(T) ; -- n store $xxxx of $xxxx(REG)
+ MOV #')',TOS ; -- sep
+ JMP CALLA11 ; search Rn and update opcode
+
; ===============================================================
; to allow data access beyond $FFFF
; ===============================================================
-; MOVA (#$x.xxxx|&$x.xxxx|$.xxxx(Rs)|Rs|@Rs|@Rs+ , &|Rd|$.xxxx(Rd))
-; ADDA (#$x.xxxx|Rs , Rd)
-; CMPA (#$x.xxxx|Rs , Rd)
-; SUBA (#$x.xxxx|Rs , Rd)
+; MOVA #$x.xxxx|&$x.xxxx|$xxxx(Rs)|Rs|@Rs|@Rs+ , &$x.xxxx|$xxxx(Rd)|Rd
+; ADDA (#$x.xxxx|Rs , Rd)
+; CMPA (#$x.xxxx|Rs , Rd)
+; SUBA (#$x.xxxx|Rs , Rd)
; first argument process ACMS1
;-----------------------------------;
-ACMS1 mDOCOL ; -- BODYDOES ','
- .word FBLANK,SKIP ; -- BODYDOES ',' addr
- .word $+2 ;
- MOV.B @TOS,X ; X=first char of opcode string
- MOV @PSP+,TOS ; -- BODYDOES ','
- MOV @PSP+,S ; -- ',' S=BODYDOES
- MOV @S,S ; S=opcode
- MOV &DDP,T ; T=DDP
- ADD #2,&DDP ; make room for opcode
+ACMS1 MOV @PSP+,S ; -- sep S=BODYDOES
+ MOV @S,S ; S=opcode
;-----------------------------------;
-ACMS10 CMP.B #'R',X ; -- ','
- JNZ ACMS11 ;
-ACMS101 CALL #SearchREG ; -- Rn src
+ACMS10 JNZ ACMS11 ; -- sep if prefix <> 'R'
+ACMS101 CALL #SearchRn ; -- Rn
ACMS102 RLAM #4,TOS ; 8<<src
RLAM #4,TOS ;
ACMS103 BIS S,TOS ; update opcode with src|dst
MOV TOS,0(T) ; save opcode
MOV T,TOS ; -- OPCODE_addr
- MOV @RSP+,IP ;
MOV @IP+,PC ;
;-----------------------------------;
-ACMS11 CMP.B #'#',X ; -- ',' X=addr
+ACMS11 CMP.B #'#',W ; -- sep X=addr
JNE MOVA12 ;
BIC #40h,S ; set #opcode
-ACMS111 ADD #1,&TOIN ; skip '#'|'&'
- ADD #2,&DDP ; make room for low #$xxxx|&$xxxx|$xxxx(REG)
+ACMS111 ADD #2,&DP ; make room for low #$xxxx|&$xxxx|$xxxx(REG)
CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store $xxxx of #$x.xxxx|&$x.xxxx|$x.xxxx(REG)
+ MOV @PSP+,2(T) ; -- Hi store $xxxx of #$x.xxxx|&$x.xxxx|$xxxx(REG)
AND #0Fh,TOS ; -- Hi sel Hi src
JMP ACMS102 ;
;-----------------------------------;
-MOVA12 CMP.B #'&',X ; -- ',' case of MOVA &$x.xxxx
+MOVA12 CMP.B #'&',W ; -- sep case of MOVA &$x.xxxx
JNZ MOVA13 ;
- XOR #00E0h,S ; set MOVA &$x.xxxx, opcode
+ XOR #00E0h,S ; set MOVA &$x.xxxx, opcode
JMP ACMS111 ;
;-----------------------------------;
MOVA13 BIC #00F0h,S ; set MOVA @REG, opcode
- CMP.B #'@',X ; -- ','
+ CMP.B #'@',W ; -- sep
JNZ MOVA14 ;
- ADD #1,&TOIN ; skip '@'
- CALL #SearchREG ; -- Rn
+ CALL #SkipRSearchRn ; -- Rn
JNZ ACMS102 ; if @REG found
-;-----------------------------------;
BIS #0010h,S ; set @REG+ opcode
MOV #'+',TOS ; -- '+'
-MOVA131 CALL #SearchREG ; -- Rn case of MOVA @REG+,|MOVA $x.xxxx(REG),
- CMP &SOURCE_LEN,&TOIN ; test TYPE II first parameter ending by @REG+ (REG) without comma,
- JZ ACMS102 ; i.e. may be >IN = SOURCE_LEN: don't skip char CR !
- ADD #1,&TOIN ; skip "," ready for the second operand search
+MOVA131 CALL #SearchRn ; -- Rn case of MOVA @REG+,|MOVA $x.xxxx(REG),
+MOVA132 ADD #1,&TOIN ; skip "," ready for the second operand search
JMP ACMS102 ;
;-----------------------------------;
-MOVA14 BIS #0030h,S ; set xxxx(REG), opcode
- ADD #2,&DDP ; -- ',' make room for first $xxxx of $0.xxxx(REG),
- MOV #'(',TOS ; -- "(" as WORD separator to find xxxx of "xxxx(REG),"
- CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store $xxxx as 2th word
+MOVA14 BIS #0030h,S ; -- sep set xxxx(REG), opcode
+ ADD #2,&DP ; make room for first $xxxx of $xxxx(REG),
+ CALL #SearchIndex ; -- n
+ MOV TOS,2(T) ; -- n store $xxxx as 2th word
MOV #')',TOS ; -- ')'
- JMP MOVA131 ;
+ CALL #SkipRSearchRn ; -- Rn
+ JMP MOVA132 ;
; 2th argument process ACMS2
-;-----------------------------------;
-ACMS2 mDOCOL ; -- OPCODE_addr
- .word FBLANK,SKIP ; -- OPCODE_addr addr
- .word $+2 ;
- MOV @PSP+,T ; -- addr T=OPCODE_addr
+;-----------------------------------; -- OPCODE_addr sep
+ACMS2 MOV @PSP+,T ; -- sep T=OPCODE_addr
MOV @T,S ; S=opcode
- MOV.B @TOS,X ; -- addr X=first char of string instruction
- MOV.B #' ',TOS ; -- ' '
;-----------------------------------;
-ACMS21 CMP.B #'R',X ; -- ' '
- JNZ MOVA22 ;
-ACMS211 CALL #SearchREG ; -- Rn
+ACMS21 JNZ MOVA22 ; -- sep if prefix <> 'R'
+ACMS211 CALL #SearchRn ; -- Rn
JMP ACMS103 ;
;-----------------------------------;
-MOVA22 BIC #0F0h,S ;
- ADD #2,&DDP ; -- ' ' make room for $xxxx
- CMP.B #'&',X ;
+MOVA22 BIC #0F0h,S ; -- sep
+ ADD #2,&DP ; make room for $xxxx
+ CMP.B #'&',W ;
JNZ MOVA23 ;
BIS #060h,S ; set ,&$x.xxxx opcode
- ADD #1,&TOIN ; skip '&'
CALL #SearchARG ; -- Lo Hi
MOV @PSP+,2(T) ; -- Hi store $xxxx as 2th word
JMP ACMS103 ; update opcode with dst $x and write opcode
;-----------------------------------;
MOVA23 BIS #070h,S ; set ,xxxx(REG) opcode
- MOV #'(',TOS ; -- "(" as WORD separator to find xxxx of "xxxx(REG),"
- CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi write $xxxx of ,$0.xxxx(REG) as 2th word
+ CALL #SearchIndex ; -- n
+ MOV TOS,2(T) ; -- n write $xxxx of ,$xxxx(REG) as 2th word
MOV #')',TOS ; -- ")" as WORD separator to find REG of "xxxx(REG),"
- JMP ACMS211
+ CALL #SkipRSearchRn ; -- Rn
+ JMP ACMS103
; --------------------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV 2 operands: Adda|Cmpa|Mova|Suba (without extended word)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
; --------------------------------------------------------------------------------
TYPE4DOES .word lit,',' ; -- BODYDOES "," char separator for PARAM1
+ .word InitAndSkipPRFX ; SR(Z)=1 if prefix = 'R'
.word ACMS1 ; -- OPCODE_addr
+ .word BL,SkipPRFX ; SR(Z)=1 if prefix = 'R'
.word ACMS2 ; -- OPCODE_addr
- .word DROP,EXIT
+ .word DROPEXIT
asmword "MOVA"
CALL rDODOES
+++ /dev/null
-; -*- coding: utf-8 -*-
-;
- FORTHWORDIMM "[THEN]" ; do nothing
-; https://forth-standard.org/standard/tools/BracketTHEN
-; [THEN]
- MOV @IP+,PC
-
-; ; https://forth-standard.org/standard/string/COMPARE
-; ; COMPARE ( c-addr1 u1 c-addr2 u2 -- n )
-; ;Compare the string specified by c-addr1 u1 to the string specified by c-addr2 u2.
-; ;The strings are compared, beginning at the given addresses, character by character,
-; ;up to the length of the shorter string or until a difference is found.
-; ;If the two strings are identical, n is zero.
-; ;If the two strings are identical up to the length of the shorter string,
-; ; n is minus-one (-1) if u1 is less than u2 and one (1) otherwise.
-; ;If the two strings are not identical up to the length of the shorter string,
-; ; n is minus-one (-1) if the first non-matching character in the string specified by c-addr1 u1
-; ; has a lesser numeric value than the corresponding character in the string specified by c-addr2 u2 and one (1) otherwise.
-; FORTHWORD "COMPARE"
-; COMPARE
-; MOV TOS,S ;1 S = u2
-; MOV @PSP+,Y ;2 Y = addr2
-; MOV @PSP+,T ;2 T = u1
-; MOV @PSP+,X ;2 X = addr1
-; COMPLOOP MOV T,TOS ;1
-; ADD S,TOS ;1 TOS = u1+u2
-; JZ COMPEQUAL ;2 u1=u2=0, Z=1, end of all successfull comparisons
-; SUB #1,T ;1
-; JN COMPLESS ;2 u1<u2 if u1 < 0
-; SUB #1,S ;1
-; JN COMPGREATER ;2 u1>u2 if u2 < 0
-; ADD #1,X ;1
-; CMP.B @Y+,-1(X) ;4 char1-char2
-; JZ COMPLOOP ;2 char1=char2 17~ loop
-; JC COMPGREATER ;2 char1>char2
-; COMPLESS ; char1<char2
-; MOV #-1,TOS ;1 Z=0
-; MOV @IP+,PC ;4
-; COMPGREATER
-; MOV #1,TOS ;1 Z=0
-; COMPEQUAL
-; MOV @IP+,PC ;4 20 + 5 words def'n
-
-; ; https://forth-standard.org/standard/tools/BracketELSE
-; ; [ELSE] a few (smaller and faster) definition
-; ;Compilation:
-; ;Perform the execution semantics given below.
-; ;Execution:
-; ;( "<spaces>name ..." -- )
-; ;Skipping leading spaces, parse and discard space-delimited words from the parse area,
-; ;including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
-; ;until the word [THEN] has been parsed and discarded.
-; ;If the parse area becomes exhausted, it is refilled as with REFILL.
-; FORTHWORDIMM "[ELSE]" ; or [IF] if isnogood...
-; BRACKETELSE
-; mDOCOL
-; .word lit,0 ; -- cnt=0
-; BRACKETELSE0
-; .word ONEPLUS ; -- cnt+1
-; BRACKETELSE1 ;
-; .word FBLANK,WORDD,COUNT ; -- cnt addr u
-; .word DUP,QFBRAN,BRACKETELSE5 ; u = 0 if end of line --> refill buffer then loop back
-; .word TWODUP ;
-; .word XSQUOTE ;
-; .byte 6,"[THEN]" ;
-; .word COMPARE,ZEROEQUAL ;
-; .word QFBRAN,BRACKETELSE2 ; -- cnt addr u if bad comparaison, jump for next comparaison
-; .word TWODROP,ONEMINUS ; -- cnt-1 2DROP, decrement count
-; .word QDUP,ZEROEQUAL ;
-; .word QFBRAN,BRACKETELSE1 ; -- cnt-1 loop back if count <> 0
-; .word EXIT ; -- else exit
-; BRACKETELSE2 ;
-; .word TWODUP ; -- cnt addr u addr u
-; .word XSQUOTE ;
-; .byte 6,"[ELSE]" ;
-; .word COMPARE,ZEROEQUAL ; -- cnt addr u ff
-; .word QFBRAN,BRACKETELSE3 ; -- cnt addr u if bad comparaison, jump for next comparaison
-; .word TWODROP,ONEMINUS ; -- cnt-1 2DROP, decrement count
-; .word QDUP,ZEROEQUAL ;
-; .word QFBRAN,BRACKETELSE0 ; -- cnt-1 if count <> 0 restore old count with loop back increment
-; .word EXIT ; -- else exit
-; BRACKETELSE3 ;
-; .word XSQUOTE ;
-; .byte 4,"[IF]" ;
-; .word COMPARE,ZEROEQUAL ;
-; .word QFBRAN,BRACKETELSE1 ; -- cnt if bad comparaison, loop back
-; .word BRAN,BRACKETELSE0 ; -- cnt else increment loop back
-; BRACKETELSE5 ;
-; .word TWODROP ; -- cnt
-; ;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
-; ; OPTION ; plus 5 words option
-; ;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
-; .word XSQUOTE ;
-; .byte 5,13,10,"ko " ;
-; .word TYPE ; CR+LF ." ko" to show false branch of conditionnal compilation
-; ;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
-; .word REFILL ; REFILL Input Buffer with next line
-; .word SETIB ; SET Input Buffer pointers SOURCE_LEN, SOURCE_ORG and clear >IN
-; .word BRAN,BRACKETELSE1 ; -- cnt then loop back 54 words without options
-
-; BRanch if string BAD COMParaison, [COMPARE,ZEROEQUAL,QFBRAN] replacement
-BRBADCOMP ; -- cnt addr1 u1 addr1 u1 addr2 u2
- MOV TOS,S ;1 S = u2
- MOV @PSP+,Y ;2 Y = addr2
- MOV @PSP+,T ;2 T = u1
- MOV @PSP+,X ;2 X = addr1
-COMPLOOP MOV T,TOS ;1 -- cnt addr1 u1 u1
- ADD S,TOS ;1 -- cnt addr1 u1 u1+u2
- JZ COMPEQU ;2 u1=u2=0, Z=1, end of all successfull comparisons
- SUB #1,T ;1
- JN COMPDIF ;2 u1<u2 if u1 < 0
- SUB #1,S ;1
- JN COMPDIF ;2 u1>u2 if u2 < 0
- ADD #1,X ;1
- CMP.B @Y+,-1(X) ;4 char1-char2
- JZ COMPLOOP ;2 char1=char2 17~ loop
-COMPDIF MOV @IP,IP ;1 take branch
-CMPEND MOV @PSP+,TOS ;
- MOV @IP+,PC ;4
-
-; BRanch if string GOOD COMParaison, [TWODROP,ONEMINUS,?DUP,ZEROEQUAL,QFBRAN] replacement
-BRGOODCMP ; -- cnt addr u
- ADD #2,PSP ;1 -- cnt u
- SUB #1,0(PSP) ;3 -- cnt-1 u
- JNZ COMPDIF ;2 -- cnt-1 u take branch
- ADD #2,PSP ;1 -- u
-COMPEQU ADD #2,IP ; skip branch
- JMP CMPEND ; 25 words
-
- FORTHWORDIMM "[ELSE]" ; or [IF] if isnogood...
-; https://forth-standard.org/standard/tools/BracketELSE
-; [ELSE] a few (smaller and faster) definition
-;Compilation:
-;Perform the execution semantics given below.
-;Execution:
-;( "<spaces>name ..." -- )
-;Skipping leading spaces, parse and discard space-delimited words from the parse area,
-;including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
-;until the word [THEN] has been parsed and discarded.
-;If the parse area becomes exhausted, it is refilled as with REFILL.
-BRACKETELSE
- mDOCOL
- .word lit,0
-BRACKETELSE0
- .word ONEPLUS ;
-BRACKETELSE1 ;
- .word FBLANK,WORDD,COUNT ; -- addr u
- .word DUP,QFBRAN,BRACKETELSE5 ; u = 0 if end of line --> refill buffer then loop back
- .word TWODUP ;
- .word XSQUOTE ;
- .byte 6,"[THEN]" ;
- .word BRBADCOMP,BRACKETELSE2 ; if bad string comparaison, jump for next comparaison
- .word BRGOODCMP,BRACKETELSE1 ; 2DROP, count-1, loop back if count <> 0, else DROP
- .word EXIT ; then exit
-BRACKETELSE2 ;
- .word TWODUP ;
- .word XSQUOTE ;
- .byte 6,"[ELSE]" ;
- .word BRBADCOMP,BRACKETELSE3 ; if bad string comparaison, jump for next comparaison
- .word BRGOODCMP,BRACKETELSE0 ; 2DROP, count-1, loop back with count+1 if count <> 0, else DROP
- .word EXIT ; then exit
-BRACKETELSE3 ;
- .word XSQUOTE ;
- .byte 4,"[IF]" ;
- .word BRBADCOMP,BRACKETELSE1 ; if bad string comparaison, loop back
- .word BRAN,BRACKETELSE0 ; else loop back with count+1
-BRACKETELSE5 ;
- .word TWODROP ;
-;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
-; OPTION ; +5 words option
-;vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
- .word XSQUOTE ;
- .byte 5,13,10,"ko " ;
- .word TYPE ; CR+LF ." ko " to show false branch of conditionnal compilation
-;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
-BRKTELSEND .word REFILL ; REFILL Input Buffer with next line
- .word SETIB ; SET Input Buffer pointers SOURCE_LEN, SOURCE_ORG and clear >IN
- .word BRAN,BRACKETELSE1 ; then loop back 44 words without options
-
- FORTHWORDIMM "[IF]" ; flag --
-; https://forth-standard.org/standard/tools/BracketIF
-; [IF]
-;Compilation:
-;Perform the execution semantics given below.
-;Execution: ;( flag | flag "<spaces>name ..." -- )
-;If flag is true, do nothing. Otherwise, skipping leading spaces,
-; parse and discard space-delimited words from the parse area,
-; including nested occurrences of [IF] ... [THEN] and [IF] ... [ELSE] ... [THEN],
-; until either the word [ELSE] or the word [THEN] has been parsed and discarded.
-;If the parse area becomes exhausted, it is refilled as with REFILL. [IF] is an immediate word.
-;An ambiguous condition exists if [IF] is POSTPONEd,
-; or if the end of the input buffer is reached and cannot be refilled before the terminating [ELSE] or [THEN] is parsed.
-BRACKETIF CMP #0,TOS ; -- f
- MOV @PSP+,TOS ; --
- JZ BRACKETELSE ; false flag output
- MOV @IP+,PC ; true flag output
-
- .IFNDEF NIP
-; https://forth-standard.org/standard/core/NIP
-; NIP x1 x2 -- x2 Drop the first item below the top of stack
-NIP ADD #2,PSP ; 1
- MOV @IP+,PC ; 4
- .ENDIF
-
-
- FORTHWORDIMM "[DEFINED]"
-; https://forth-standard.org/standard/tools/BracketDEFINED
-; [DEFINED]
-;Compilation:
-;Perform the execution semantics given below.
-;Execution:
-;( "<spaces>name ..." -- flag )
-;Skip leading space delimiters. Parse name delimited by a space.
-;Return a true flag if name is the name of a word that can be found,
-;otherwise return a false flag. [DEFINED] is an immediate word.
-DEFINED mDOCOL
- .word FBLANK,WORDD,FIND,NIP,EXIT
-
- FORTHWORDIMM "[UNDEFINED]"
-; https://forth-standard.org/standard/tools/BracketUNDEFINED
-; [UNDEFINED]
-;Compilation:
-;Perform the execution semantics given below.
-;Execution: ( "<spaces>name ..." -- flag )
-;Skip leading space delimiters. Parse name delimited by a space.
-;Return a false flag if name is the name of a word that can be found,
-;otherwise return a true flag.
- mDOCOL
- .word DEFINED,ZEROEQUAL,EXIT
-
-
-; https://forth-standard.org/standard/core/MARKER
-; MARKER
-;name Execution: ( -- )
-;Restore all dictionary allocation and search order pointers to the state they had just prior to the
-;definition of name. Remove the definition of name and all subsequent definitions. Restoration
-;of any structures still existing that could refer to deleted definitions or deallocated data space is
-;not necessarily provided. No other contextual information such as numeric base is affected.
-
-
-; FastForth provides all that is necessary for a real time application next MARKER definition,
-; by adding a call to a custom subroutine, with the default parameters to be restored saved next MARKER definition.
-MARKER_DOES ; execution part of MARKER, same effect than RST_STATE, but to restore state before MARKER defn.
- .word $+2 ; -- BODY
- MOV @TOS+,&RST_DP ; -- BODY+2 thus RST_STATE will restore the word-set state before MARKER
- .IFDEF VOCABULARY_SET
- MOV @TOS+,&RST_VOC ; -- BODY+4 thus RST_STATE will restore the word-set state before MARKER
- .ELSE
- ADD #2,TOS ; -- BODY+4
- .ENDIF
- CALL @TOS+ ; -- BODY+6 @TOS = RET_ADR|STOP_APP_ADR (default|custom)
- MOV @PSP+,TOS ; --
- MOV @RSP+,IP ;
- JMP RST_STATE ; then next
-
- FORTHWORD "MARKER" ; definition part
-;( "<spaces>name" -- )
-;Skip leading space delimiters. Parse name delimited by a space. Create a definition for name
-;with the execution semantics defined below.
-
- CALL #HEADER ;4 W = DP+4, Y = NFA,
- MOV #1285h,-4(W) ;4 CFA = CALL R5 = rDODOES
- MOV #MARKER_DOES,-2(W) ;4 PFA = MARKER_DOES
- SUB #2,Y ;1 Y = NFA-2 = LFA
- MOV Y,0(W) ;3 BODY = DP value before this MARKER definition
- .IFDEF VOCABULARY_SET
- MOV &LASTVOC,2(W) ;5 BODY+2 = current VOCLINK
- .ENDIF
- MOV #RET_ADR,4(W) ; BODY+4 = RET addr, to do nothing by default
- ADD #6,&DDP ;4
- JMP GOOD_CSP ;
; ----------------------------------------------------------------------
; ----------------------------------------------------------------------
-; MOV(.B) #0, dst is coded as follow : MOV(.B) R3, dst ; 1 cycle, one word As=00 register mode
-; MOV(.B) #1, dst is coded as follow : MOV(.B) 0(R3), dst ; 2 cycles, one word AS=01 x(reg) mode
-; MOV(.B) #2, dst is coded as follow : MOV(.B) @R3, dst ; 2 cycles, one word AS=10 @reg mode
-; MOV(.B) #4, dst is coded as follow : MOV(.B) @R2, dst ; 2 cycles, one word AS=10 @reg mode
-; MOV(.B) #8, dst is coded as follow : MOV(.B) @R2+, dst ; 2 cycles, one word AS=11 @reg+ mode
-; MOV(.B) #-1,dst is coded as follow : MOV(.B) @R3+, dst ; 2 cycles, one word AS=11
-; MOV(.B) #xxxx,dst is coded a follow : MOV(.B) @PC+, dst ; 2 cycles, two words AS=11 @reg+ mode
-; MOV(.B) &EDE,&TON is coded as follow: MOV(.B) EDE(R2),TON(R2) ; (R2=0), three words AS=01, AD=1 x(reg) mode
+; MOV(.B) SR,dst is coded as follow : MOV(.B) R2,dst ; 1 cycle, one word AS=00 (register mode)
+; MOV(.B) #0,dst is coded as follow : MOV(.B) R3,dst ; 1 cycle, one word AS=00 (register mode)
+; MOV(.B) &EDE,dst is coded as follow : MOV(.B) EDE(R2),dst ; 3 cycles, two words AS=01 ( x(reg) mode)
+; MOV(.B) #1,dst is coded as follow : MOV(.B) 0(R3),dst ; 1 cycle, one word AS=01 ( x(reg) mode)
+; MOV(.B) #4,dst is coded as follow : MOV(.B) @R2,dst ; 1 cycle, one word AS=10 ( @reg mode)
+; MOV(.B) #2,dst is coded as follow : MOV(.B) @R3,dst ; 1 cycle, one word AS=10 ( @reg mode)
+; MOV(.B) #8,dst is coded as follow : MOV(.B) @R2+,dst ; 1 cycle, one word AS=11 ( @reg+ mode)
+; MOV(.B) #-1,dst is coded as follow : MOV(.B) @R3+,dst ; 1 cycle, one word AS=11 ( @reg+ mode)
+; ----------------------------------------------------------------------
+; MOV(.B) #xxxx,dst is coded as follow: MOV(.B) @PC+,dst ; 2 cycles, two words AS=11 ( @reg+ mode)
; ----------------------------------------------------------------------
; PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
; example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
-
-;;Z SKIP char -- addr ; skip all occurring character 'char'
-; FORTHWORD "SKIP" ; used by assembler to parse input stream
-SKIP MOV #SOURCE_LEN,Y ;2
- MOV TOS,W ; -- char W=char
- MOV @Y+,X ;2 -- char W=char X=buf_length
- MOV @Y,TOS ;2 -- Start_buf_adr W=char X=buf_length
- ADD TOS,X ; -- Start_buf_adr W=char X=Start_buf_adr+buf_length=End_buf_addr
- ADD &TOIN,TOS ; -- Parse_Adr W=char X=End_buf_addr
-SKIPLOOP CMP TOS,X ; -- Parse_Adr W=char X=End_buf_addr
- JZ SKIPEND ; -- Parse_Adr if end of buffer
- CMP.B @TOS+,W ; -- Parse_Adr does character match?
- JZ SKIPLOOP ; -- Parse_Adr+1
-SKIPNEXT SUB #1,TOS ; -- addr
-SKIPEND MOV TOS,W ;
- SUB @Y,W ; -- addr W=Parse_Addr-Start_buf_adr=Toin
- MOV W,&TOIN ;
- MOV @IP+,PC ; 4
-
; ----------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER : search argument "xxxx", IP is free
+; DTCforthMSP430FR5xxx ASSEMBLER : search argument "xxxx"
; ----------------------------------------------------------------------
-; SearchARG ; separator -- n|d or abort" not found"
-; ; Search ARG of "#xxxx," ; <== PARAM10
-; ; Search ARG of "&xxxx," ; <== PARAM111
-; ; Search ARG of "xxxx(REG)," ; <== PARAM130
-; ; Search ARG of ",&xxxx" ; <== PARAM111 <== PARAM20
-; ; Search ARG of ",xxxx(REG)" ; <== PARAM210
-; PUSHM #2,S ; PUSHM S,T as OPCODE, OPCODEADR
-; ASMtoFORTH ; -- separator search word first
-; .word WORDD,FIND ; -- addr
-; .word ZEROEQUAL
-; .word QFBRAN,ARGWORD ; -- addr if Word found
-; .word QNUMBER ;
-; .word QFBRAN,NotFound ; -- addr ABORT if not found
-; FSearchEnd .word SearchEnd ; -- value goto SearchEnd if number found
-; ARGWORD .word $+2 ; -- CFA
-; MOV @TOS+,S ; -- PFA S=DOxxx
-; QDOVAR SUB #DOVAR,S ; DOxxx = 1287h = DOVAR
-; ISDOVAR JZ SearchEnd ; -- addr PFA = adr of VARIABLE
-; QDOCON ADD #1,S ; DOxxx = 1286h = DOCON
-; JNZ ISOTHER ;
-; ISDOCON MOV @TOS,TOS ;
-; JMP SearchEnd ; -- cte
-; ISOTHER SUB #2,TOS ; -- CFA
-; SearchEnd POPM #2,S ; POPM T,S
-; MOV @RSP+,PC ; RET
-
-SearchARG ; separator -- n|d or abort" not found"
-; Search ARG of "#xxxx," ; <== PARAM10
-; Search ARG of "&xxxx," ; <== PARAM111
-; Search ARG of "xxxx(REG)," ; <== ComputeARGpREG <== PARAM130
-; Search ARG of ",&xxxx" ; <== PARAM111 <== PARAM20
-; Search ARG of ",xxxx(REG)" ; <== ComputeARGpREG <== PARAM210
- PUSHM #2,S ; PUSHM S,T as OPCODE,OPCODEADR
- PUSH TOS ; push sep, for SrchARGPO
- PUSH &TOIN ; push TOIN, for SrchARGPO
-;-----------------------------------;
- ASMtoFORTH ; -- sep sep = ','|'('|' '
- .word WORDD,FIND ; -- addr search word first
- .word ZEROEQUAL
- .word QFBRAN,ARGWORD ; -- addr if Word found
- .word QNUMBER ;
- .word QFBRAN,SrchARGPO; -- addr search ARG Plus Offset if not found
- .word SrchNext ; -- value goto SrchNext if number found
-ARGWORD .word $+2 ; -- CFA
+; common code for maxi three successive SearchARG: SearchARG, SearchARG+Offset, SearchARG-offset
+; leave PFA of VARIABLE, [PFA] of CONSTANT, User_Parameter_Field_Address of MARKER_DOES, CFA for all others.
+; if the ARGument is not found after those three SearchARg, the 'not found' error is issued by the last SrchOfst.
+SearchARGn PUSH &TOIN ; push TOIN, for next SearchARGn if any
+ mASM2FORTH ; -- sep sep = ','|'('|' '
+ .word WORDD,FIND ; -- addr search string name first
+ .word QFBRAN,SRCHARGNUM ; -- addr if string name not found
+ mNEXTADR ; -- CFA
MOV @TOS+,S ; -- PFA S=DOxxx
QDOVAR SUB #1287h,S ; DOxxx = 1287h = CALL R7 = rDOVAR
-ISDOVAR JZ SrchNext ; -- addr PFA = adr of VARIABLE
+ISDOVAR JZ ARGFOUND ; -- addr PFA = adr of VARIABLE
QDOCON ADD #1,S ; DOxxx = 1286h = DOCON
- JNZ ISOTHER ;
-ISDOCON MOV @TOS,TOS ;
- JMP SrchNext ; -- cte
-ISOTHER SUB #2,TOS ; -- CFA
-SrchNext ADD #4,RSP ; remove TOIN,sep
-SearchEnd POPM #2,S ; POPM T,S
- MOV @RSP+,PC ; RET
-
-;-----------------------------------;
-; search for ARGUMENT16+OFFSET ; up to $FFFF only (FORTH area)
-;-----------------------------------;
-SrchARGPO .word $+2
- MOV @RSP+,&TOIN ; TOIN back
- MOV @RSP+,TOS ; -- sep
- ASMtoFORTH ;
- .word LIT,'+' ; -- sep '+' search argument
- .word WORDD,FIND ; -- sep CFA
- .word ZEROEQUAL ;
- .word QFBRAN,SrchOffst;
- .word QNUMBER ; -- sep number
- .word QFBRAN,NotFound ; see INTERPRET
-SrchOffst .word SWAP ; -- CFA|number sep
- .word WORDD,QNUMBER ; Search 'Offset,'|'Offset('|'Offset'
- .word QFBRAN,NotFound ; see INTERPRET
- .word $+2 ; -- CFA|number offset
- ADD @PSP+,TOS ; -- (CFA|number + offset)
- JMP SearchEnd ;
+ JNZ QMARKER ; if not DOCON
+ISDOCON MOV @TOS,TOS ; --
+ JMP ARGFOUND ; -- cte
+QMARKER CMP #MARKER_DOES,0(TOS) ; -- PFA search if PFA = [MARKER_DOES]
+ JNZ ISOTHER ; -- PFA
+ .IFDEF VOCABULARY_SET ; -- PFA
+ ADD #30,TOS ; -- UPFA+2 skip room for DP, CURRENT, CONTEXT(8), null_word, LASTVOC, RET_ADR 2+(2+2+16+2+2+2) +2 bytes
+ .ELSE ;
+ ADD #8,TOS ; -- UPFA+2 skip room for DP, RET_ADR 2+(2+2) +2 bytes
+ .ENDIF ;
+ISOTHER SUB #2,TOS ; -- CFA|UPFA UPFA = MARKER_DOES User_Parameter_Field_Address
+ARGFOUND ADD #2,RSP ; remove TOIN
+SEARCHRET MOV @RSP+,PC ;24 SR(Z)=0 ARG found
+
+SRCHARGNUM .word QNUMBER ;
+ .word QFBRAN,ARGNOTFOUND; -- addr if ARG not found SR(Z)=1
+ .word ARGFOUND ; -- value
+ARGNOTFOUND mNEXTADR ; -- x
+ MOV @RSP+,&TOIN ; restore TOIN
+ MOV @RSP+,PC ;32 SR(Z)=1 ARG not found
+
+SearchIndex
+; Search index of "xxxx(REG)," ; <== ComputeIDXpREG <== PARAM13
+; Search index of ",xxxx(REG)" ; <== ComputeIDXpREG <== PARAM21
+ SUB #1,&TOIN ; move >IN back one
+ MOV #'(',TOS ; addr -- "(" as WORD separator to find xxxx of "xxxx(REG),"
+SearchARG ; sep -- n|d or abort" not found"
+; Search ARG of "#xxxx," ; <== PARAM101
+; Search ARG of "&xxxx," ; <== PARAM111
+; Search ARG of ",&xxxx" ; <== PARAM111 <== PARAM201
+ MOV TOS,W
+ PUSHM #4,IP ; -- sep PUSHM IP, S,T,W as IP_RET,OPCODE,OPCODEADR,sep
+ CALL #SearchARGn ; first search argument without offset
+ JNZ SrchEnd ; -- ARG if ARG found goto SrchPopEnd
+SearchArgPo MOV #'+',TOS ; -- '+'
+ CALL #SearchARGn ; 2th search argument with '+' as separator
+ JNZ ArgPlusOfst ; -- ARG if ARG of ARG+offset found
+SearchArgMo MOV #'-',TOS ; -- '-'
+ CALL #SearchARGn ; 3th search argument with '-' as separator
+ SUB #1,&TOIN ; to handle offset with its minus sign
+ArgPlusOfst PUSH TOS ; -- ARG save ARG on stack
+ MOV 2(RSP),TOS ; -- sep reload offset sep
+SrchOfst mASM2FORTH ;
+ .word WORDD,QNUMBER ; -- Ofst|c-addr flag
+ .word QFBRAN,NotFound ; -- c-addr no return, see INTERPRET
+ mNEXTADR ; -- Ofst
+ ADD @RSP+,TOS ; -- Arg+Ofst
+SrchEnd POPM #4,IP ; POPM W,T,S,IP common return for SearchARG and SearchRn
+ MOV @RSP+,PC ;66
; Arg_Double_to_single conversion needed only for OPCODE type V|VI, 2th pass.
ARGD2S BIT #UF9,SR ; -- Lo Hi
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : search REG
; ----------------------------------------------------------------------
-
; compute arg of "xxxx(REG)," ; <== PARAM130, sep=','
; compute arg of ",xxxx(REG)" ; <== PARAM210, sep=' '
-ComputeARGParenREG ; sep -- Rn
- MOV #'(',TOS ; -- "(" as WORD separator to find xxxx of "xxxx(REG),"
- CALL #SearchARG ; -- xxxx aborted if not found
+ComputeIDXpREG ; addr -- Rn|addr
+ CALL #SearchIndex ; -- xxxx aborted if not found
CALL #ARGD2S ; skip arg_hi if DOUBLE
- MOV &DDP,X
- ADD #2,&DDP
- MOV TOS,0(X) ; -- xxxx compile xxxx
+ MOV &DP,X
+ MOV TOS,0(X) ; -- xxxx compile ARG xxxx
+ ADD #2,&DP
MOV #')',TOS ; -- ")" prepare separator to search REG of "xxxx(REG)"
-
-; search REG of "xxxx(REG)," separator = ')'
-; search REG of ",xxxx(REG)" separator = ')'
+; search REG of "xxxx(REG)," separator = ')'
+; search REG of ",xxxx(REG)" separator = ')'
; search REG of "@REG," separator = ',' <== PARAM120
; search REG of "@REG+," separator = '+' <== PARAM121
+SkipRSearchRn
+ ADD #1,&TOIN ; skip "R" in input buffer
; search REG of "REG," separator = ',' <== PARAM13
; search REG of ",REG" separator = BL <== PARAM21
-
-SearchREG PUSHM #2,S ; PUSHM S,T as OPCODE, OPCODEADR
- CMP &SOURCE_LEN,&TOIN ; bad case of ,xxxx without prefix &
- JNZ SearchREG1 ;
- MOV #BAD_CSP,PC ; génère une erreur bidon
-SearchREG1 PUSH &TOIN ; -- sep save >IN
- ADD #1,&TOIN ; skip "R"
- ASMtoFORTH ; search xx of Rxx
+SearchRn MOV &TOIN,W ;
+ PUSHM #4,IP ; PUSHM IP, S,T,W as IP_RET,OPCODE,OPCODEADR,TOIN
+ mASM2FORTH ; search xx of Rxx
.word WORDD,QNUMBER ;
- .word QFBRAN,NOTaREG ; -- xxxx if Not a Number
- .word $+2 ; -- Rn number is found
- ADD #2,RSP ; remove >IN
- CMP #16,TOS ; -- Rn
+ .word QFBRAN,REGNOTFOUND; -- xxxx if Not a Number, SR(Z)=1
+ mNEXTADR ; -- Rn number is found
+ CMP #16,TOS ; -- Rn
+ JNC SrchEnd ; -- Rn Rn is valid, remove TOIN then SrchEnd
JC BOUNDERROR ; abort if Rn out of bounds
- JNC SearchEnd ; -- Rn Z=0 ==> found
-NOTaREG .word $+2 ; -- addr Z=1
- MOV @RSP+,&TOIN ; -- addr restore >IN
- JMP SearchEnd ; -- addr Z=1 ==> not a register
+REGNOTFOUND mNEXTADR ; -- addr SR(Z)=1, case of @REG not found,
+ MOV @RSP,&TOIN ; -- addr restore TOIN (to point after prefix 'R')
+ JMP SrchEnd ; -- addr SR(Z)=1 ==> not a register
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : INTERPRET FIRST OPERAND
; ----------------------------------------------------------------------
-
-; PARAM1 is used for OPCODES type I (double operand) and OPCODES type II (single operand) instructions
-; PARAM1 is used for OPCODES type V (double operand) and OPCODES type VI (single operand) extended instructions
-
; PARAM1 separator -- ; parse input buffer until separator and compute first operand of opcode
; sep is comma for src and space for dst .
-PARAM1 mDOCOL ; -- sep OPCODES types I|V sep = ',' OPCODES types II|VI sep = ' '
- .word FBLANK,SKIP ; -- sep addr
- .word $+2 ; -- sep addr
- MOV #0,S ; -- sep addr reset OPCODE
- MOV &DDP,T ; -- sep addr HERE --> OPCODEADR (opcode is preset to its address !)
- ADD #2,&DDP ; -- sep addr cell allot for opcode
- MOV.B @TOS,W ; -- sep addr W=first char of instruction code
- MOV @PSP+,TOS ; -- sep W=c-addr
- CMP.B #'#',W ; -- sep W=first char
- JNE PARAM11
-; "#" found : case of "#xxxx,"
-PARAM10 ADD #1,&TOIN ; -- sep skip # prefix
- CALL #SearchARG ; -- xxxx abort if not found
+PARAM1 JNZ PARAM10 ; -- sep if prefix <> 'R'
+ CALL #SearchRn ; case of "REG,"
+ JMP PARAM123 ; -- 000R REG of "REG," found, S=OPCODE=0
+; ----------------------------------;
+PARAM10 CMP.B #'#',W ; -- sep W=first char
+ JNE PARAM11
+PARAM101 CALL #SearchARG ; -- xxxx abort if not found
CALL #ARGD2S ; skip arg_hi of OPCODE type V
MOV #0300h,S ; OPCODE = 0300h : MOV #0,dst is coded MOV R3,dst
CMP #0,TOS ; -- xxxx #0 ?
MOV #0220h,S ; OPCODE = 0220h : MOV #4,dst is coded MOV @R2,dst
CMP #4,TOS ; -- xxxx #4 ?
JZ PARAMENDOF
- MOV #0230h,S ; OPCODE = 0230h : MOV #8,dst is coded MOV @R2+,dst
+ MOV #0230h,S ; OPCODE = 0230h : MOV #8,dst is coded MOV @R2+,dst
CMP #8,TOS ; -- xxxx #8 ?
JZ PARAMENDOF
- MOV #0330h,S ; -- -1 OPCODE = 0330h : MOV #-1,dst is coded MOV @R3+,dst
+ MOV #0330h,S ; OPCODE = 0330h : MOV #-1,dst is coded MOV @R3+,dst
CMP #-1,TOS ; -- xxxx #-1 ?
JZ PARAMENDOF
MOV #0030h,S ; -- xxxx for all other cases : MOV @PC+,dst
-; case of "&xxxx," ; <== PARAM110
-; case of ",&xxxx" ; <== PARAM20
-StoreArg MOV &DDP,X ;
- ADD #2,&DDP ; cell allot for arg
-StoreTOS ; <== TYPE1DOES
+StoreArg MOV &DP,X ;
+ ADD #2,&DP ; cell allot for arg
MOV TOS,0(X) ; compile arg
+; case of "&xxxx," ; <== PARAM111
+; case of ",&xxxx" ; <== PARAM110 <== PARAM201
; endcase of all "&xxxx" ;
; endcase of all "#xxxx" ; <== PARAM101,102,104,108,10M1
; endcase of all "REG"|"@REG"|"@REG+" <== PARAM124
PARAMENDOF MOV @PSP+,TOS ; --
- MOV @RSP+,IP ;
- MOV @IP+,PC ; -- S=OPCODE,T=OPCODEADR
+ MOV @IP+,PC ; -- S=OPCODE,T=OPCODEADR
; ----------------------------------;
PARAM11 CMP.B #'&',W ; -- sep
JNE PARAM12
; case of "&xxxx," ; -- sep search for "&xxxx,"
PARAM110 MOV #0210h,S ; -- sep set code type : xxxx(SR) with AS=0b01 ==> x210h (and SR=0 !)
-; case of "&xxxx,"
-; case of ",&xxxx" ; <== PARAM20
-PARAM111 ADD #1,&TOIN ; -- sep skip "&" prefix
- CALL #SearchARG ; -- arg abort if not found
- CALL #ARGD2S ; skip argD_hi of opcode type V
+; case of ",&xxxx" ; <== PARAM201
+PARAM111 CALL #SearchARG ; -- arg abort if not found
+ CALL #ARGD2S ; skip arg_hi of OPCODE type V
JMP StoreArg ; -- then ret
; ----------------------------------;
PARAM12 CMP.B #'@',W ; -- sep
JNE PARAM13
; case of "@REG,"|"@REG+,"
PARAM120 MOV #0020h,S ; -- sep init OPCODE with indirect code type : AS=0b10
- ADD #1,&TOIN ; -- sep skip "@" prefix
- CALL #SearchREG ; Z = not found
- JNZ PARAM123 ; -- value REG of "@REG," found
-; case of "@REG+," ; -- addr REG of "@REG" not found, search REG of "@REG+"
-PARAM121 ADD #0010h,S ; change OPCODE from @REG to @REG+ type
- MOV #'+',TOS ; -- "+" as WORD separator to find REG of "@REG+,"
- CALL #SearchREG ; -- value|addr X = flag
-; case of "@REG+," ;
-; case of "xxxx(REG)," ; <== PARAM130
- ; case of double separator: +, and ),
-PARAM122 CMP &SOURCE_LEN,&TOIN ; test OPCODE II parameter ending by REG+ or (REG) without comma,
+ CALL #SkipRSearchRn ; Z = not found
+ JNZ PARAM123 ; -- Rn REG of "@REG," found
+; case of "@REG+," ; -- addr search REG of "@REG+"
+PARAM121 BIS #0010h,S ; change OPCODE from @REG to @REG+ type
+ MOV #'+',TOS ; -- sep
+ CALL #SearchRn ; -- Rn
+; case of "xxxx(REG)," ; <== PARAM13
+PARAM122 ; case of double separator: +, and ),
+ CMP &SOURCE_LEN,&TOIN ; test OPCODE II parameter ending by REG+ or (REG) without comma,
JZ PARAM123 ; i.e. >IN = SOURCE_LEN : don't skip char CR !
ADD #1,&TOIN ; -- 000R skip "," ready for the second operand search
-; case of "@REG+,"
-; case of "xxxx(REG),"
; case of "@REG," ; -- 000R <== PARAM120
-; case of "REG," ; -- 000R <== PARAM13
+; case of "REG," ; -- 000R <== PARAM1
PARAM123 SWPB TOS ; -- 0R00 swap bytes because it's not a dst REG typeI (not a 2 ops inst.)
-; case of "@REG+," ; -- 0R00 (src REG typeI)
-; case of "xxxx(REG)," ; -- 0R00 (src REG typeI or dst REG typeII)
-; case of "@REG," ; -- 0R00 (src REG typeI)
-; case of "REG," ; -- 0R00 (src REG typeI or dst REG typeII)
-; case of ",REG" ; -- 000R <== PARAM21 (dst REG typeI)
-; case of ",xxxx(REG)" ; -- 000R <== PARAM210 (dst REG typeI)
+; case of ",REG" ; -- 000R <== PARAM2 (dst REG typeI)
+; case of ",xxxx(REG)" ; -- 000R <== PARAM21 (dst REG typeI)
PARAM124 ADD TOS,S ; -- 0R00|000R
JMP PARAMENDOF
; ----------------------------------;
-; case of "REG,"|"xxxx(REG)," ; first, searg REG of "REG,"
-PARAM13 CALL #SearchREG ; -- sep save >IN for second parsing (case of "xxxx(REG),")
- JNZ PARAM123 ; -- 000R REG of "REG," found, S=OPCODE=0
-; case of "xxxx(REG)," ; -- c-addr "REG," not found
-PARAM130 ADD #0010h,S ; AS=0b01 for indexing address
- CALL #ComputeARGparenREG; compile xxxx and search REG of "(REG)"
- JMP PARAM122 ;
+; case of "xxxx(REG)," ; -- sep
+PARAM13 BIS #0010h,S ; AS=0b01 for indexing address
+ CALL #ComputeIDXpREG ; compile index xxxx and search REG of "(REG)"
+ JMP PARAM122 ; -- Rn
+; ----------------------------------;
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER : INTERPRET 2th OPERAND
; ----------------------------------------------------------------------
-
-PARAM3 ; for OPCODES TYPE III
- MOV #0,S ; init OPCODE=0
- MOV &DDP,T ; T=OPCODEADR
- ADD #2,&DDP ; make room for opcode
+PARAM2 JNZ PARAM20 ; -- sep if prefix <> 'R'
+ CALL #SearchRn ; -- sep case of ",REG"
+ JMP PARAM124 ; -- 000R REG of ",REG" found
; ----------------------------------;
-PARAM2 mDOCOL ; parse input buffer until BL and compute this 2th operand
- .word FBLANK,SKIP ; skip space(s) between "arg1," and "arg2" if any; use not S,T.
- .word $+2 ; -- c-addr search for '&' of "&xxxx
- CMP.B #'&',0(TOS) ;
- MOV #20h,TOS ; -- ' ' as WORD separator to find xxxx of ",&xxxx"
+PARAM20 CMP.B #'&',W ;
JNE PARAM21 ; '&' not found
; case of ",&xxxx" ;
-PARAM20 ADD #0082h,S ; change OPCODE : AD=1, dst = R2
+PARAM201 BIS #0082h,S ; change OPCODE : AD=1, dst = R2
JMP PARAM111 ; -- ' '
; ----------------------------------;
-; case of ",REG"|",xxxx(REG) ; -- ' ' first, search REG of ",REG"
-PARAM21 CALL #SearchREG ;
- JNZ PARAM124 ; -- 000R REG of ",REG" found
-; case of ",xxxx(REG) ; -- addr REG not found
-PARAM210 ADD #0080h,S ; set AD=1
- CALL #ComputeARGparenREG; compile argument xxxx and search REG of "(REG)"
- JMP PARAM124 ; -- 000R REG of "(REG) found
+; case of ",xxxx(REG) ; -- sep
+PARAM21 BIS #0080h,S ; set AD=1
+ CALL #ComputeIDXpREG ; compile index xxxx and search REG of ",xxxx(REG)"
+ JMP PARAM124 ; -- 000R REG of ",xxxx(REG) found
+
+; ----------------------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER: reset OPCODE in S reg, set OPCODE addr in T reg,
+; move Prefix in W reg, skip prefix in input buffer. Flag SR(Z)=1 if prefix = 'R'.
+; ----------------------------------------------------------------------------------------
+InitAndSkipPrfx
+ MOV #0,S ; reset OPCODE
+ MOV &DP,T ; HERE --> OPCODEADR
+ ADD #2,&DP ; cell allot for opcode
+; SkipPrfx ; -- skip all occurring char 'BL' plus one prefix
+SkipPrfx MOV #20h,W ; -- W=BL
+ MOV &TOIN,X ; --
+ ADD &SOURCE_ORG,X ;
+SKIPLOOP CMP.B @X+,W ; -- W=BL does character match?
+ JZ SKIPLOOP ; --
+ MOV.B -1(X),W ; W=prefix
+ SUB &SOURCE_ORG,X ; --
+ MOV X,&TOIN ; -- >IN points after prefix
+ CMP.B #'R',W ; preset SR(Z)=1 if prefix = 'R'
+ MOV @IP+,PC ; 4
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER: OPCODE TYPE 0 : zero operand f:-)
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER: OPCODES TYPE I : double operand
; ----------------------------------------------------------------------
-; OPCODE(FEDC)
-; OPCODE(code) for TYPE I = 0bxxxx opcode I
-; OPCODE(BA98)
-; = 0bxxxx src register
-; OPCODE(7) AD (dst addr type)
-; = 0b0 register
-; = 0b1 x(Rn),&adr
-; OPCODE(6) size
-; OPCODE(B) for TYPE I or TYPE II = 0b0 word
-; = 0b1 byte
-; OPCODE(54) AS (src addr type)
-; OPCODE(AS) for TYPE I or OPCODE(AD) for TYPE II = 0b00 register
-; = 0b01 x(Rn),&adr
-; = 0b10 @Rn
-; = 0b11 @Rn+
-; OPCODE(3210)
-; OPCODE(dst) for TYPE I or TYPE II = 0bxxxx dst register
+; OPCODE(FEDC)
+; OPCODE(code) = 0bxxxx opcode
+; OPCODE(BA98)
+; = 0bxxxx src_register,
+; OPCODE(7) AD (dst addr type)
+; = 0b0 ,register
+; = 0b1 ,x(Rn),&adr
+; OPCODE(6) size
+; OPCODE(B) = 0b0 word
+; = 0b1 byte
+; OPCODE(54) AS (src addr type)
+; OPCODE(AS) = 0b00 register,
+; = 0b01 x(Rn),&adr,
+; = 0b10 @Rn,
+; = 0b11 @Rn+,
+; OPCODE(3210)
+; OPCODE(dst) = 0bxxxx ,dst_register
; ----------------------------------------------------------------------
; TYPE1DOES -- BODYDOES search and compute PARAM1 & PARAM2 as src and dst operands then compile instruction
-TYPE1DOES .word lit,',',PARAM1 ; -- BODYDOES
- .word PARAM2 ; -- BODYDOES char separator (BL) included in PARAM2
- .word $+2 ;
-MAKEOPCODE MOV T,X ; -- opcode X= OPCODEADR to compile opcode
- MOV @TOS,TOS ; -- opcode part of instruction
- BIS S,TOS ; -- opcode opcode is complete
- JMP StoreTOS ; -- then EXIT
+TYPE1DOES .word lit,','
+ .word InitAndSkipPrfx ; init S=0, T=DP, DP=DP+2 then skip prefix, SR(Z)=1 if prefix = 'R'
+ .word PARAM1 ; -- BODYDOES
+ .word BL,SkipPrfx ; SR(Z)=1 if prefix = 'R'
+ .word PARAM2 ; -- BODYDOES
+ mNEXTADR ;
+MAKEOPCODE MOV @RSP+,IP
+ BIS @TOS,S ; -- opcode generic opcode + customized S
+ MOV S,0(T) ; -- opcode store completed opcode
+ JMP PARAMENDOF ; -- then EXIT
asmword "MOV"
CALL rDODOES
; ----------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES TYPE II : single operand
; ----------------------------------------------------------------------
-; OPCODE(FEDCBA987) opcodeII
-; OPCODE(code) for TYPE II = 0bxxxxxxxxx
-; OPCODE(6) size
-; OPCODE(B) for TYPE I or TYPE II = 0b0 word
-; = 0b1 byte
-; OPCODE(54) (dst addr type)
-; OPCODE(AS) for TYPE I or OPCODE(AD) for TYPE II = 0b00 register
-; = 0b01 x(Rn),&adr
-; = 0b10 @Rn
-; = 0b11 @Rn+
-; OPCODE(3210)
-; OPCODE(dst) for TYPE I or TYPE II = 0bxxxx dst register
+; OPCODE(FEDCBA987)
+; OPCODE(code) = 0bxxxxxxxxx
+; OPCODE(6) size
+; OPCODE(B) = 0b0 word
+; = 0b1 byte
+; OPCODE(54) (dst addr type)
+; OPCODE(AS) = 0b00 register
+; = 0b01 x(Rn),&adr
+; = 0b10 @Rn
+; = 0b11 @Rn+
+; OPCODE(3210)
+; OPCODE(dst) = 0bxxxx dst register
; ----------------------------------------------------------------------
-TYPE2DOES .word FBLANK,PARAM1 ; -- BODYDOES
- .word $+2 ;
+TYPE2DOES ; -- BODYDOES
+ .word BL ; -- BODYDOES ' '
+ .word InitAndSkipPrfx ;
+ .word PARAM1 ; -- BODYDOES
+ mNEXTADR ;
MOV S,W ;
AND #0070h,S ; keep B/W & AS infos in OPCODE
SWPB W ; (REG org --> REG dst)
BOUNDERRWM1 ADD #1,W ; <== RRAM|RRUM|RRCM|RLAM error
BOUNDERRORW MOV W,TOS ; <== PUSHM|POPM|ASM_branch error
BOUNDERROR ; <== REG number error
- mDOCOL ; -- n n = value out of bounds
+ mASM2FORTH ; -- n n = value out of bounds
.word DOT,XSQUOTE
.byte 13,"out of bounds"
.word ABORT_TERM
CALL rDOCON
.word 3000h
- asmword "0<" ; jump if 0< ; use only with ?JMP ?GOTO !
+ asmword "0<" ; jump if 0< ; use only with ?GOTO !
CALL rDOCON
.word 3000h
;ASM IF OPCODE -- @OPCODE1
asmword "IF"
-ASM_IF MOV &DDP,W
+ASM_IF MOV &DP,W
MOV TOS,0(W) ; compile incomplete opcode
- ADD #2,&DDP
+ ADD #2,&DP
MOV W,TOS
- MOV @IP+,PC
+ MOV @IP+,PC
;ASM THEN @OPCODE -- resolve forward branch
asmword "THEN"
-ASM_THEN MOV &DDP,W ; -- @OPCODE W=dst
+ASM_THEN MOV &DP,W ; -- @OPCODE W=dst
MOV TOS,Y ; Y=@OPCODE
ASM_THEN1 MOV @PSP+,TOS ; --
MOV Y,X ;
CMP #512,W
JC BOUNDERRORW ; (JHS) unsigned branch if u> 511
BIS W,0(Y) ; -- [@OPCODE]=OPCODE completed
- MOV @IP+,PC
+ MOV @IP+,PC
;C ELSE @OPCODE1 -- @OPCODE2 branch for IF..ELSE
asmword "ELSE"
-ASM_ELSE MOV &DDP,W ; -- W=HERE
+ASM_ELSE MOV &DP,W ; -- W=HERE
MOV #3C00h,0(W) ; compile unconditionnal branch
- ADD #2,&DDP ; -- DP+2
+ ADD #2,&DP ; -- DP+2
SUB #2,PSP
MOV W,0(PSP) ; -- @OPCODE2 @OPCODE1
JMP ASM_THEN ; -- @OPCODE2
; BEGIN -- BEGINadr initialize backward branch
asmword "BEGIN"
- MOV #HERE,PC
+ MOV #HEREXEC,PC
-;C UNTIL @BEGIN OPCODE -- resolve conditional backward branch
+; UNTIL @BEGIN OPCODE -- resolve conditional backward branch
asmword "UNTIL"
ASM_UNTIL MOV @PSP+,W ; -- OPCODE W=@BEGIN
ASM_UNTIL1 MOV TOS,Y ; Y=OPCODE W=@BEGIN
ASM_UNTIL2 MOV @PSP+,TOS ; --
- MOV &DDP,X ; -- Y=OPCODE X=HERE W=dst
+ MOV &DP,X ; -- Y=OPCODE X=HERE W=dst
SUB #2,W ; -- Y=OPCODE X=HERE W=dst-2
SUB X,W ; -- Y=OPCODE X=src W=src-dst-2=displacement (bytes)
RRA W ; -- Y=OPCODE X=HERE W=displacement (words)
AND #3FFh,W ; -- Y=OPCODE X=HERE W=troncated negative displacement (words)
BIS W,Y ; -- Y=OPCODE (completed)
MOV Y,0(X)
- ADD #2,&DDP
- MOV @IP+,PC
+ ADD #2,&DP
+ MOV @IP+,PC
-;X AGAIN @BEGIN -- uncond'l backward branch
+; AGAIN @BEGIN -- uncond'l backward branch
; unconditional backward branch
asmword "AGAIN"
ASM_AGAIN MOV TOS,W ; W=@BEGIN
MOV #3C00h,Y ; Y = asmcode JMP
JMP ASM_UNTIL2 ;
-;C WHILE @BEGIN OPCODE -- @WHILE @BEGIN
+; WHILE @BEGIN OPCODE -- @WHILE @BEGIN
asmword "WHILE"
ASM_WHILE mDOCOL ; -- @BEGIN OPCODE
.word ASM_IF,SWAP,EXIT
-;C REPEAT @WHILE @BEGIN -- resolve WHILE loop
+; REPEAT @WHILE @BEGIN -- resolve WHILE loop
asmword "REPEAT"
ASM_REPEAT mDOCOL ; -- @WHILE @BEGIN
.word ASM_AGAIN,ASM_THEN,EXIT
; DTCforthMSP430FR5xxx ASSEMBLER : branch up to 3 backward labels and up to 3 forward labels
; ------------------------------------------------------------------------------------------
; used for non canonical branchs, as BASIC language: "goto line x"
-; labels BWx and FWx must be set at the beginning of line (>IN < 8).
+; labels BWx and FWx must be respectively set and used at the beginning of line (>IN < 8).
; FWx at the beginning of a line can resolve only one previous GOTO|?GOTO FWx.
; BWx at the beginning of a line can be resolved by any subsequent GOTO|?GOTO BWx.
-BACKWDOES .word $+2
+;BACKWDOES FORTHtoASM
+; MOV @RSP+,IP
+; MOV @TOS,TOS
+; MOV TOS,Y ; Y = ASMBWx
+; MOV @PSP+,TOS ;
+; MOV @Y,W ; W = [BWx]
+; CMP #8,&TOIN ; are we colon 8 or more ?
+;BACKWUSE JHS ASM_UNTIL1 ; yes, use this label
+;BACKWSET MOV &DP,0(Y) ; no, set LABEL = DP
+; mNEXT
+
+;; backward label 1
+; asmword "BW1"
+; mdodoes
+; .word BACKWDOES
+; .word ASMBW1 ; in RAM
+
+BACKWDOES mNEXTADR
MOV @RSP+,IP ;
- MOV TOS,Y ; -- PFA Y = ASMBWx addr
+ MOV TOS,Y ; -- BODY Y = ASMBWx addr
MOV @PSP+,TOS ; --
MOV @Y,W ; W = LABEL
CMP #8,&TOIN ; are we colon 8 or more ?
-BACKWUSE JC ASM_UNTIL1 ; yes, use this label
-BACKWSET MOV &DDP,0(Y) ; no, set LABEL = DP
+BACKWUSE JC ASM_UNTIL1 ; yes, use this label
+BACKWSET MOV &DP,0(Y) ; no, set LABEL = DP
MOV @IP+,PC
; backward label 1
.word BACKWDOES
.word 0
-FORWDOES .word $+2
+;FORWDOES mNEXTADR
+; MOV @RSP+,IP
+; MOV &DP,W ;
+; MOV @TOS,TOS
+; MOV @TOS,Y ; -- BODY Y=@OPCODE of FWx
+; MOV #0,0(TOS) ; clear @OPCODE of FWx to erratic 2th resolution
+; CMP #8,&TOIN ; are we colon 8 or more ?
+;FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DP, Y=@OPCODE
+;FORWSET MOV @PSP+,0(W) ; yes compile incomplete opcode
+; ADD #2,&DP ; increment DP
+; MOV W,0(TOS) ; store @OPCODE into ASMFWx
+; MOV @PSP+,TOS ; --
+; MOV @IP+,PC
+;
+;; forward label 1
+; asmword "FW1"
+; CALL rDODOES ; CFA
+; .word FORWDOES ;
+; .word ASMFW1 ; in RAM
+
+FORWDOES mNEXTADR
MOV @RSP+,IP
- MOV &DDP,W ;
- MOV @TOS,Y ; -- PFA Y=[ASMFWx]
+ MOV &DP,W ;
+ MOV @TOS,Y ; -- BODY Y=@OPCODE of FWx
+ MOV #0,0(TOS) ; clear @OPCODE of FWx to avoid erratic 2th resolution
CMP #8,&TOIN ; are we colon 8 or more ?
-FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DDP, Y=ASMFWx
-FORWSET MOV @PSP+,0(W) ; yes compile incomplete opcode
- ADD #2,&DDP ; increment DDP
- MOV W,0(TOS) ; store @OPCODE into ASMFWx
- MOV @PSP+,TOS ; --
+FORWUSE JNC ASM_THEN1 ; no: resolve FWx with W=DP, Y=@OPCODE
+FORWSET MOV @PSP+,0(W) ; yes compile opcode (without displacement)
+ ADD #2,&DP ; increment DP
+ MOV W,0(TOS) ; store @OPCODE into BODY of FWx
+ MOV @PSP+,TOS ; --
MOV @IP+,PC
; forward label 1
.word FORWDOES
.word 0
+;ASM GOTO <label> -- unconditionnal branch to label
+ asmword "GOTO"
+ SUB #2,PSP
+ MOV TOS,0(PSP)
+ MOV #3C00h,TOS ; -- JMP_OPCODE
+GOTONEXT mDOCOL
+ .word TICK ; -- OPCODE CFA<label>
+ .word EXECUTE,EXIT
+
;ASM <cond> ?GOTO <label> OPCODE -- conditionnal branch to label
asmword "?GOTO"
INVJMP CMP #3000h,TOS ; invert code jump process
BIT #1000h,TOS ; 3xxxh case ?
JZ GOTONEXT ; no
XOR #0800h,TOS ; complementary action for JL<-->JGE
-GOTONEXT mDOCOL
- .word TICK ; -- OPCODE CFA<label>
- .word EXECUTE,EXIT
-
-;ASM GOTO <label> -- unconditionnal branch to label
- asmword "GOTO"
- SUB #2,PSP
- MOV TOS,0(PSP)
- MOV #3C00h,TOS ; asmcode JMP
JMP GOTONEXT
; --------------------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES TYPE III : PUSHM|POPM|RLAM|RRAM|RRUM|RRCM
; --------------------------------------------------------------------------------
-; PUSHM, syntax: PUSHM #n,REG with 0 < n < 17
-; POPM syntax: POPM #n,REG with 0 < n < 17
+; PUSHM, syntax: PUSHM #n,REG with 0 < n < 17
+; POPM syntax: POPM #n,REG with 0 < n < 17
; PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
; example : POPM #6,IP pulls Y,X,W,T,S,IP registers from return stack
-; RxxM syntax: RxxM #n,REG with 0 < n < 5
-
-TYPE3DOES .word FBLANK,SKIP ; skip spaces if any
- .word $+2 ; -- BODYDOES c-addr
- ADD #1,&TOIN ; skip "#"
- MOV #',',TOS ; -- BODYDOES ","
- ASMtoFORTH
- .word WORDD,QNUMBER
- .word QFBRAN,NotFound ; ABORT
- .word PARAM3 ; -- BODYDOES 0x000N S=OPCODE = 0x000R
- .word $+2
+; RxxM syntax: RxxM #n,REG with 0 < n < 5
+
+TYPE3DOES ; -- BODYDOES
+ .word SkipPrfx ;
+ .word LIT,',' ; -- BODYDOES ','
+ .word WORDD,QNUMBER ;
+ .word QFBRAN,NotFound ; see INTERPRET
+ .word BL ; -- BODYDOES n ' '
+ .word InitAndSkipPrfx ; -- BODYDOES n ' '
+ .word PARAM2 ; -- BODYDOES n S=OPCODE = 0x000R
+ mNEXTADR
MOV TOS,W ; -- BODYDOES n W = n
MOV @PSP+,TOS ; -- BODYDOES
SUB #1,W ; W = n floored to 0
RLAM #4,X ; OPCODE bit 1000h --> C
JNC RxxMINSTRU ; if bit 1000h = 0
PxxxINSTRU MOV S,Y ; S=REG, Y=REG to test
- RLAM #3,X ; OPCODE bit 0200h --> C
+ RLAM #3,X ; OPCODE bit 0200h --> C
JNC PUSHMINSTRU ; W=n-1 Y=REG
POPMINSTRU SUB W,S ; to make POPM opcode, compute first REG to POP; TI is complicated....
PUSHMINSTRU SUB W,Y ; Y=REG-(n-1)
CMP #16,Y
JC BOUNDERRWM1 ; JC=JHS (U>=)
- RLAM #4,W ; W = n << 4
- JMP BIS_ASMTYPE ; BODYDOES --
+ RLAM #4,W ; W = n << 4
+ JMP BIS_ASMTYPE ; BODYDOES --
RxxMINSTRU CMP #4,W ;
JC BOUNDERRWM1 ; JC=JHS (U>=)
- SWPB W ; -- BODYDOES W = n << 8
+ SWPB W ; W = n << 8
RLAM #2,W ; W = N << 10
JMP BIS_ASMTYPE ; BODYDOES --
asmword "POPM"
CALL rDODOES
.word TYPE3DOES,1700h
-
asmword "RRCM.A"
CALL rDODOES
.word TYPE3DOES,0040h
; DTCforthMSP430FR5xxx ASSEMBLER: OPCODE TYPE III bis: CALLA (without extended word)
; --------------------------------------------------------------------------------
; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
-; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
+; indexed instructions must be written as $xxxx(REG)
; --------------------------------------------------------------------------------
-
asmword "CALLA"
mDOCOL
- .word FBLANK,SKIP ; -- addr
- .word $+2
- MOV &DDP,T ; T = DDP
- ADD #2,&DDP ; make room for opcode
- MOV.B @TOS,TOS ; -- char First char of opcode
+ .word BL ; -- sep
+ .word InitAndSkipPrfx ; -- sep SR(Z)=1 if prefix = 'R'
+ mNEXTADR
+ MOV @RSP+,IP
CALLA0 MOV #134h,S ; 134h<<4 = 1340h = opcode for CALLA Rn
- CMP.B #'R',TOS
- JNZ CALLA1
-CALLA01 MOV.B #' ',TOS ;
-CALLA02 CALL #SearchREG ; -- Rn
-CALLA03 RLAM #4,S ; (opcode>>4)<<4 = opcode
- BIS TOS,S ; update opcode
+ JNZ CALLA1 ; -- sep if prefix <> 'R'
+CALLA01 CALL #SearchRn ; -- Rn
+CALLA02 RLAM #4,S ; (opcode>>4)<<4 = opcode
+ BIS TOS,S ; update opcode with Rn|$x
MOV S,0(T) ; store opcode
- MOV @PSP+,TOS
- MOV @RSP+,IP
- MOV @IP+,PC
+ MOV @PSP+,TOS ; --
+ MOV @IP+,PC ;
;-----------------------------------;
-CALLA1 ADD #2,S ; 136h<<4 = opcode for CALLA @REG
- CMP.B #'@',TOS ; -- char Search @REG
+CALLA1 ADD #2,S ; -- sep 136h<<4 = opcode for CALLA @REG
+ CMP.B #'@',W ; Search @REG
JNZ CALLA2 ;
- ADD #1,&TOIN ; skip '@'
- MOV.B #' ',TOS ; -- ' '
- CALL #SearchREG ;
- JNZ CALLA03 ; if REG found, update opcode
+CALLA11 CALL #SkipRSearchRn ;
+ JNZ CALLA02 ; if REG found, update opcode
;-----------------------------------;
ADD #1,S ; 137h<<4 = opcode for CALLA @REG+
- MOV #'+',TOS ; -- '+'
- JMP CALLA02 ;
+ MOV #'+',TOS ; -- sep
+ JMP CALLA01 ;
;-----------------------------------;
-CALLA2 ADD #2,&DDP ; make room for xxxx of #$x.xxxx|&$x.xxxx|$0.xxxx(REG)
- CMP.B #'#',TOS ;
+CALLA2 ADD #2,&DP ; -- sep make room for xxxx of #$x.xxxx|&$x.xxxx|$xxxx(REG)
+ CMP.B #'#',W ;
JNZ CALLA3
MOV #13Bh,S ; 13Bh<<4 = opcode for CALLA #$x.xxxx
-CALLA21 ADD #1,&TOIN ; skip '#'|'&'
-CALLA22 CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store #$xxxx|&$xxxx
- JMP CALLA03 ; update opcode with $x. and store opcode
+CALLA21 CALL #SearchARG ; -- Lo Hi
+ MOV @PSP+,2(T) ; -- Hi store $xxxx of #$x.xxxx|&$x.xxxx
+ JMP CALLA02 ; update opcode with $x. and store opcode
;-----------------------------------;
-CALLA3 CMP.B #'&',TOS
+CALLA3 CMP.B #'&',W ; -- sep
JNZ CALLA4 ;
ADD #2,S ; 138h<<4 = opcode for CALLA &$x.xxxx
JMP CALLA21
;-----------------------------------;
-CALLA4 MOV.B #'(',TOS ; -- "("
- SUB #1,S ; 135h<<4 = opcode for CALLA $0.xxxx(REG)
-CALLA41 CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store $xxxx
- MOV #')',TOS ; -- ')'
- JMP CALLA02 ; search Rn and update opcode
-
+CALLA4 SUB #1,S ; 135h<<4 = opcode for CALLA $xxxx(REG)
+CALLA41 CALL #SearchIndex ; -- n
+ MOV TOS,2(T) ; -- n store $xxxx of $xxxx(REG)
+ MOV #')',TOS ; -- sep
+ JMP CALLA11 ; search Rn and update opcode
; ===============================================================
; to allow data access beyond $FFFF
; ===============================================================
-; MOVA (#$x.xxxx|&$x.xxxx|$.xxxx(Rs)|Rs|@Rs|@Rs+ , &|Rd|$.xxxx(Rd))
-; ADDA (#$x.xxxx|Rs , Rd)
-; CMPA (#$x.xxxx|Rs , Rd)
-; SUBA (#$x.xxxx|Rs , Rd)
+; MOVA (#$x.xxxx|&$x.xxxx|$xxxx(Rs)|Rs|@Rs|@Rs+ , &|Rd|$xxxx(Rd))
+; ADDA (#$x.xxxx|Rs , Rd)
+; CMPA (#$x.xxxx|Rs , Rd)
+; SUBA (#$x.xxxx|Rs , Rd)
; first argument process ACMS1
;-----------------------------------;
-ACMS1 mDOCOL ; -- BODYDOES ','
- .word FBLANK,SKIP ; -- BODYDOES ',' addr
- .word $+2 ;
- MOV.B @TOS,X ; X=first char of opcode string
- MOV @PSP+,TOS ; -- BODYDOES ','
- MOV @PSP+,S ; -- ',' S=BODYDOES
- MOV @S,S ; S=opcode
- MOV &DDP,T ; T=DDP
- ADD #2,&DDP ; make room for opcode
+ACMS1 MOV @PSP+,S ; -- sep S=BODYDOES
+ MOV @S,S ; S=opcode
;-----------------------------------;
-ACMS10 CMP.B #'R',X ; -- ','
- JNZ ACMS11 ;
-ACMS101 CALL #SearchREG ; -- Rn src
+ACMS10 JNZ ACMS11 ; -- sep if prefix <> 'R'
+ACMS101 CALL #SearchRn ; -- Rn
ACMS102 RLAM #4,TOS ; 8<<src
RLAM #4,TOS ;
ACMS103 BIS S,TOS ; update opcode with src|dst
MOV TOS,0(T) ; save opcode
MOV T,TOS ; -- OPCODE_addr
- MOV @RSP+,IP
MOV @IP+,PC ;
;-----------------------------------;
-ACMS11 CMP.B #'#',X ; -- ',' X=addr
+ACMS11 CMP.B #'#',W ; -- sep X=addr
JNE MOVA12 ;
BIC #40h,S ; set #opcode
-ACMS111 ADD #1,&TOIN ; skip '#'|'&'
- ADD #2,&DDP ; make room for low #$xxxx|&$xxxx|$xxxx(REG)
+ACMS111 ADD #2,&DP ; make room for low #$xxxx|&$xxxx|$xxxx(REG)
CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store $xxxx of #$x.xxxx|&$x.xxxx|$x.xxxx(REG)
+ MOV @PSP+,2(T) ; -- Hi store $xxxx of #$x.xxxx|&$x.xxxx|$xxxx(REG)
AND #0Fh,TOS ; -- Hi sel Hi src
JMP ACMS102 ;
;-----------------------------------;
-MOVA12 CMP.B #'&',X ; -- ',' case of MOVA &$x.xxxx
+MOVA12 CMP.B #'&',W ; -- sep case of MOVA &$x.xxxx
JNZ MOVA13 ;
- XOR #00E0h,S ; set MOVA &$x.xxxx, opcode
+ XOR #00E0h,S ; set MOVA &$x.xxxx, opcode
JMP ACMS111 ;
;-----------------------------------;
MOVA13 BIC #00F0h,S ; set MOVA @REG, opcode
- CMP.B #'@',X ; -- ','
+ CMP.B #'@',W ; -- sep
JNZ MOVA14 ;
- ADD #1,&TOIN ; skip '@'
- CALL #SearchREG ; -- Rn
+ CALL #SkipRSearchRn ; -- Rn
JNZ ACMS102 ; if @REG found
-;-----------------------------------;
BIS #0010h,S ; set @REG+ opcode
MOV #'+',TOS ; -- '+'
-MOVA131 CALL #SearchREG ; -- Rn case of MOVA @REG+,|MOVA $x.xxxx(REG),
- CMP &SOURCE_LEN,&TOIN ; test TYPE II first parameter ending by @REG+ (REG) without comma,
- JZ ACMS102 ; i.e. may be >IN = SOURCE_LEN: don't skip char CR !
- ADD #1,&TOIN ; skip "," ready for the second operand search
+MOVA131 CALL #SearchRn ; -- Rn case of MOVA @REG+,|MOVA $x.xxxx(REG),
+MOVA132 ADD #1,&TOIN ; skip "," ready for the second operand search
JMP ACMS102 ;
;-----------------------------------;
-MOVA14 BIS #0030h,S ; set xxxx(REG), opcode
- ADD #2,&DDP ; -- ',' make room for first $xxxx of $0.xxxx(REG),
- MOV #'(',TOS ; -- "(" as WORD separator to find xxxx of "xxxx(REG),"
- CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi store $xxxx as 2th word
+MOVA14 BIS #0030h,S ; -- sep set xxxx(REG), opcode
+ ADD #2,&DP ; make room for first $xxxx of $xxxx(REG),
+ CALL #SearchIndex ; -- n
+ MOV TOS,2(T) ; -- n store $xxxx as 2th word
MOV #')',TOS ; -- ')'
- JMP MOVA131 ;
+ CALL #SkipRSearchRn ; -- Rn
+ JMP MOVA132 ;
; 2th argument process ACMS2
-;-----------------------------------;
-ACMS2 mDOCOL ; -- OPCODE_addr
- .word FBLANK,SKIP ; -- OPCODE_addr addr
- .word $+2 ;
- MOV @PSP+,T ; -- addr T=OPCODE_addr
+;-----------------------------------; -- OPCODE_addr sep
+ACMS2 MOV @PSP+,T ; -- sep T=OPCODE_addr
MOV @T,S ; S=opcode
- MOV.B @TOS,X ; -- addr X=first char of string instruction
- MOV.B #' ',TOS ; -- ' '
;-----------------------------------;
-ACMS21 CMP.B #'R',X ; -- ' '
- JNZ MOVA22 ;
-ACMS211 CALL #SearchREG ; -- Rn
+ACMS21 JNZ MOVA22 ; -- sep if prefix <> 'R'
+ACMS211 CALL #SearchRn ; -- Rn
JMP ACMS103 ;
;-----------------------------------;
-MOVA22 BIC #0F0h,S ;
- ADD #2,&DDP ; -- ' ' make room for $xxxx
- CMP.B #'&',X ;
+MOVA22 BIC #0F0h,S ; -- sep
+ ADD #2,&DP ; make room for $xxxx
+ CMP.B #'&',W ;
JNZ MOVA23 ;
BIS #060h,S ; set ,&$x.xxxx opcode
- ADD #1,&TOIN ; skip '&'
CALL #SearchARG ; -- Lo Hi
MOV @PSP+,2(T) ; -- Hi store $xxxx as 2th word
JMP ACMS103 ; update opcode with dst $x and write opcode
;-----------------------------------;
MOVA23 BIS #070h,S ; set ,xxxx(REG) opcode
- MOV #'(',TOS ; -- "(" as WORD separator to find xxxx of "xxxx(REG),"
- CALL #SearchARG ; -- Lo Hi
- MOV @PSP+,2(T) ; -- Hi write $xxxx of ,$0.xxxx(REG) as 2th word
+ CALL #SearchIndex ; -- n
+ MOV TOS,2(T) ; -- n write $xxxx of ,$xxxx(REG) as 2th word
MOV #')',TOS ; -- ")" as WORD separator to find REG of "xxxx(REG),"
- JMP ACMS211
+ CALL #SkipRSearchRn ; -- Rn
+ JMP ACMS103
; --------------------------------------------------------------------------------
; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV 2 operands: Adda|Cmpa|Mova|Suba (without extended word)
; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
; --------------------------------------------------------------------------------
-
TYPE4DOES .word lit,',' ; -- BODYDOES "," char separator for PARAM1
+ .word InitAndSkipPRFX ; SR(Z)=1 if prefix = 'R'
.word ACMS1 ; -- OPCODE_addr
+ .word BL,SkipPRFX ; SR(Z)=1 if prefix = 'R'
.word ACMS2 ; -- OPCODE_addr
- .word DROP,EXIT
+ .word DROPEXIT
asmword "MOVA"
CALL rDODOES
; PRMX1 is used for OPCODES type V (double operand) and OPCODES type VI (single operand) extended instructions
-PRMX1 mDOCOL ; -- sep OPCODES type V|VI separator = ','|' '
- .word FBLANK,SKIP ; -- sep addr
- .word $+2 ;
- MOV.B @TOS,X ; -- sep addr X= first char of opcode string
- MOV @PSP+,TOS ; -- sep
- MOV #1800h,S ; init S=Extended word
+PRMX1 MOV #1800h,S ; init S=Extended word
;-----------------------------------;
-PRMX10 CMP.B #'R',X ; -- sep
- JNZ PRMX11 ;
-PRMX101 CALL #SearchREG ; -- Rn Rn of REG; call SearchREG only to update >IN
-PRMX102 MOV S,TOS ; -- EW update Extended word
-PRMX103 MOV @RSP+,IP
- MOV @IP+,PC ; -- Ext_Word
+PRMX10 JNZ PRMX11 ; -- sep if prefix <> 'R'
+PRMX101 CALL #SearchRn ; -- Rn Rn of REG; call SearchRn only to update >IN
+PRMX102 MOV S,TOS ; -- EW init|update Extended word
+PRMX103 MOV @IP+,PC ; -- Ext_Word
;-----------------------------------;
PRMX11 MOV #0,&RPT_WORD ; clear RPT
- CMP.B #'#',X ; -- sep
+ CMP.B #'#',W ; -- sep
JNZ PRMX12
-PRMX111 ADD #1,&TOIN ; -- sep skip '#'
-PRMX112 CALL #SearchARG ; -- Lo Hi search $x.xxxx of #x.xxxx,
+PRMX111 CALL #SearchARG ; -- Lo Hi search $x.xxxx of #x.xxxx,
ADD #2,PSP ; -- Hi pop unused low word
-PRMX113 AND #0Fh,TOS ;
+PRMX113 AND #0Fh,TOS ;
PRMX114 RLAM #3,TOS
RLAM #4,TOS ; -- 7<<Hi
PRMX115 BIS TOS,S ; update extended word with srcHi
JMP PRMX102
;-----------------------------------;
-PRMX12 CMP.B #'&',X ; -- sep
+PRMX12 CMP.B #'&',W ; -- sep
JZ PRMX111
;-----------------------------------;
-PRMX13 CMP.B #'@',X ; -- sep
+PRMX13 CMP.B #'@',W ; -- sep
JNZ PRMX14
-PRMX131 ADD #1,&TOIN ; -- sep skip '@'
-PRMX132 CALL #SearchREG ; -- Rn Rn of @REG,
+PRMX131 CALL #SkipRSearchRn ; -- Rn Rn of @REG,
JNZ PRMX102 ; if Rn found
;-----------------------------------;
MOV #'+',TOS ; -- '+'
-PRMX133 ADD #1,&TOIN ; skip '@'
- CALL #SearchREG ; -- Rn Rn of @REG+,
+PRMX133 CALL #SearchRn ; -- Rn Rn of @REG+,
PRMX134 CMP &SOURCE_LEN,&TOIN ; test case of TYPE VI first parameter without ','
JZ PRMX102 ; don't take the risk of skipping CR !
ADD #1,&TOIN ; skip ',' ready to search 2th operand
JMP PRMX102 ;
;-----------------------------------;
-PRMX14 MOV #'(',TOS ; -- '(' to find $x.xxxx of "x.xxxx(REG),"
- CALL #SearchARG ; -- Lo Hi
+PRMX14 CALL #SearchIndex ; -- n
MOV TOS,0(PSP) ; -- Hi Hi
PRMX141 MOV #')',TOS ; -- Hi ')'
- CALL #SearchREG ; -- Hi Rn
+ CALL #SkipRSearchRn ; -- Hi Rn
MOV @PSP+,TOS ; -- Hi
AND #0Fh,TOS
BIS TOS,S
;-----------------------------------;
; PRMX2 is used for OPCODES type V (double operand) extended instructions
-
+
;-----------------------------------;
-PRMX2 mDOCOL ; -- Extended_Word
- .word FBLANK,SKIP ; -- Extended_Word addr
- .word $+2 ;
- MOV @PSP+,S ; -- addr S=Extended_Word
- MOV.B @TOS,X ; -- addr X=first char of code instruction
- MOV #' ',TOS ; -- ' '
+PRMX2 MOV @PSP+,S ; -- addr S=Extended_Word
;-----------------------------------;
-PRMX20 CMP.B #'R',X ; -- ' '
- JZ PRMX102 ; extended word not to be updated
+PRMX20 JZ PRMX102 ; -- sep if prefix <> 'R'
;-----------------------------------;
PRMX21 MOV #0,&RPT_WORD ;
- CMP.B #'&',X ;
+ CMP.B #'&',W ;
JNZ PRMX22 ;
-PRMX211 ADD #1,&TOIN ; -- ' ' skip '&'
-PRMX212 CALL #SearchARG ; -- Lo Hi
+PRMX211 CALL #SearchARG ; -- Lo Hi
PRMX213 ADD #2,PSP ; -- hi pop low word
AND #0Fh,TOS ; -- Hi
JMP PRMX115 ; update Extended word with dst_Hi
;-----------------------------------;
-PRMX22 MOV #'(',TOS ; -- '(' as WORD separator to find xxxx of "xxxx(REG)"
- CALL #SearchARG ; -- Lo Hi search x.xxxx of x.xxxx(REG)
+PRMX22 CALL #SearchIndex ; -- n
JMP PRMX213
-
-;; UPDATE_eXtendedWord
-;;-----------------------------------;
-;UPDATE_XW ; BODYDOES Extended_Word -- BODYDOES+2 >IN R--
-; MOV &DDP,T ;
-; ADD #2,&DDP ; make room for extended word
-; MOV TOS,S ; S = Extended_Word
-; MOV @PSP+,TOS ; -- BODYDOES
-; BIS &RPT_WORD,S ; update Extended_word with RPT_WORD
-; MOV #0,&RPT_WORD ; clear RPT before next instruction
-; BIS @TOS+,S ; -- BODYDOES+2 update Extended_word with [BODYDOES] = A/L bit
-; MOV S,0(T) ; store extended word
-; MOV @RSP+,&TOIN ; >IN R-- restore >IN at the start of instruction string
-; MOV @IP+,PC ;
-;;-----------------------------------;
;-----------------------------------;
; UPDATE_eXtendedWord
;-----------------------------------;
UPDATE_XW ; BODYDOES >IN Extended_Word -- BODYDOES+2
MOV @PSP+,&TOIN ; -- BODYDOES EW restore >IN at the start of instruction string
- MOV &DDP,T ;
- ADD #2,&DDP ; make room for extended word
+ MOV &DP,T ;
+ ADD #2,&DP ; make room for extended word
MOV TOS,S ; S = Extended_Word
MOV @PSP+,TOS ;
BIS &RPT_WORD,S ; update Extended_word with RPT_WORD
; all numeric arguments must be written as DOUBLE numbers (including a point) : $x.xxxx
TYPE5DOES ; -- BODYDOES
-; .word LIT,TOIN,FETCH,TOR ; R-- >IN save >IN for 2th pass
-; .word lit,',' ; -- BODYDOES ',' char separator for PRMX1
-; .word PRMX1,PRMX2 ; -- BODYDOES Extended_Word
-; .word UPDATE_XW ; -- BODYDOES+2 >IN is restored ready for 2th pass
-; .word BRAN,TYPE1DOES ; -- BODYDOES+2 2th pass: completes instruction with opcode = [BODYDOES+2]
.word LIT,TOIN,FETCH ; -- BODYDOES >IN
- .word lit,',' ; -- BODYDOES >IN ',' char separator for PRMX1
- .word PRMX1,PRMX2 ; -- BODYDOES >IN Extended_Word
+ .word lit,','
+ .word SkipPrfx,PRMX1 ; -- BODYDOES >IN ',' char separator for PRMX1
+ .word BL,SkipPrfx,PRMX2 ; -- BODYDOES >IN Extended_Word
.word UPDATE_XW ; -- BODYDOES+2 >IN is restored ready for 2th pass
.word BRAN,TYPE1DOES ; -- BODYDOES+2 2th pass: completes instruction with opcode = [BODYDOES+2]
CALL rDODOES
.word TYPE5DOES,40h,4040h
asmword "ADDX"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,5000h
asmword "ADDX.A"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,0,5040h
asmword "ADDX.B"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,5040h
- asmword "ADDCX"
- CALL rDODOES
+ asmword "ADDCX"
+ CALL rDODOES
.word TYPE5DOES,40h,6000h
asmword "ADDCX.A"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,0,6040h
asmword "ADDCX.B"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,6040h
- asmword "SUBCX"
- CALL rDODOES
+ asmword "SUBCX"
+ CALL rDODOES
.word TYPE5DOES,40h,7000h
asmword "SUBCX.A"
CALL rDODOES
.word TYPE5DOES,0,7040h
asmword "SUBCX.B"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,7040h
- asmword "SUBX"
- CALL rDODOES
+ asmword "SUBX"
+ CALL rDODOES
.word TYPE5DOES,40h,8000h
- asmword "SUBX.A"
- CALL rDODOES
+ asmword "SUBX.A"
+ CALL rDODOES
.word TYPE5DOES,0,8040h
- asmword "SUBX.B"
- CALL rDODOES
+ asmword "SUBX.B"
+ CALL rDODOES
.word TYPE5DOES,40h,8040h
- asmword "CMPX"
- CALL rDODOES
+ asmword "CMPX"
+ CALL rDODOES
.word TYPE5DOES,40h,9000h
- asmword "CMPX.A"
- CALL rDODOES
+ asmword "CMPX.A"
+ CALL rDODOES
.word TYPE5DOES,0,9040h
- asmword "CMPX.B"
- CALL rDODOES
+ asmword "CMPX.B"
+ CALL rDODOES
.word TYPE5DOES,40h,9040h
asmword "DADDX"
CALL rDODOES
.word TYPE5DOES,40h,0A000h
asmword "DADDX.A"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,0,0A040h
asmword "DADDX.B"
- CALL rDODOES
+ CALL rDODOES
.word TYPE5DOES,40h,0A040h
- asmword "BITX"
- CALL rDODOES
+ asmword "BITX"
+ CALL rDODOES
.word TYPE5DOES,40h,0B000h
- asmword "BITX.A"
- CALL rDODOES
+ asmword "BITX.A"
+ CALL rDODOES
.word TYPE5DOES,0,0B040h
- asmword "BITX.B"
- CALL rDODOES
+ asmword "BITX.B"
+ CALL rDODOES
.word TYPE5DOES,40h,0B040h
- asmword "BICX"
- CALL rDODOES
+ asmword "BICX"
+ CALL rDODOES
.word TYPE5DOES,40h,0C000h
- asmword "BICX.A"
- CALL rDODOES
+ asmword "BICX.A"
+ CALL rDODOES
.word TYPE5DOES,0,0C040h
- asmword "BICX.B"
- CALL rDODOES
+ asmword "BICX.B"
+ CALL rDODOES
.word TYPE5DOES,40h,0C040h
asmword "BISX"
CALL rDODOES
.word TYPE5DOES,40h,0D000h
- asmword "BISX.A"
- CALL rDODOES
+ asmword "BISX.A"
+ CALL rDODOES
.word TYPE5DOES,0,0D040h
- asmword "BISX.B"
- CALL rDODOES
+ asmword "BISX.B"
+ CALL rDODOES
.word TYPE5DOES,40h,0D040h
- asmword "XORX"
- CALL rDODOES
+ asmword "XORX"
+ CALL rDODOES
.word TYPE5DOES,40h,0E000h
- asmword "XORX.A"
- CALL rDODOES
+ asmword "XORX.A"
+ CALL rDODOES
.word TYPE5DOES,0,0E040h
- asmword "XORX.B"
- CALL rDODOES
+ asmword "XORX.B"
+ CALL rDODOES
.word TYPE5DOES,40h,0E040h
- asmword "ANDX"
- CALL rDODOES
+ asmword "ANDX"
+ CALL rDODOES
.word TYPE5DOES,40h,0F000h
- asmword "ANDX.A"
- CALL rDODOES
+ asmword "ANDX.A"
+ CALL rDODOES
.word TYPE5DOES,0,0F040h
- asmword "ANDX.B"
- CALL rDODOES
+ asmword "ANDX.B"
+ CALL rDODOES
.word TYPE5DOES,40h,0F040h
; --------------------------------------------------------------------------------
; all numeric arguments must be written as DOUBLE numbers (including a point) : $x.xxxx
TYPE6DOES ; -- BODYDOES
-; .word LIT,TOIN,FETCH,TOR ; R-- >IN save >IN for 2th pass
-; .word FBLANK ; -- BODYDOES ' '
-; .word PRMX1 ; -- BODYDOES Extended_Word
-; .word UPDATE_XW ; -- BODYDOES+2
-; .word BRAN,TYPE2DOES ; -- BODYDOES+2 pass 2: completes instruction with opcode = [BODYDOES+2]
.word LIT,TOIN,FETCH ; -- BODYDOES >IN
- .word FBLANK ; -- BODYDOES >IN ' '
- .word PRMX1 ; -- BODYDOES >IN Extended_Word
+ .word BL,SkipPrfx,PRMX1 ; -- BODYDOES >IN Extended_Word
.word UPDATE_XW ; -- BODYDOES+2
.word BRAN,TYPE2DOES ; -- BODYDOES+2 pass 2: completes instruction with opcode = [BODYDOES+2]
asmword "RRCX" ; ZC=0; RRCX Rx,Rx may be repeated by prefix RPT #n|Rn
CALL rDODOES
.word TYPE6DOES,40h,1000h
- asmword "RRCX.A" ; ZC=0; RRCX.A Rx may be repeated by prefix RPT #n|Rn
- CALL rDODOES
+ asmword "RRCX.A" ; ZC=0; RRCX.A Rx may be repeated by prefix RPT #n|Rn
+ CALL rDODOES
.word TYPE6DOES,0,1040h
asmword "RRCX.B" ; ZC=0; RRCX.B Rx may be repeated by prefix RPT #n|Rn
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1040h
asmword "RRUX" ; ZC=1; RRUX Rx may be repeated by prefix RPT #n|Rn
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,140h,1000h
- asmword "RRUX.A" ; ZC=1; RRUX.A Rx may be repeated by prefix RPT #n|Rn
- CALL rDODOES
+ asmword "RRUX.A" ; ZC=1; RRUX.A Rx may be repeated by prefix RPT #n|Rn
+ CALL rDODOES
.word TYPE6DOES,100h,1040h
- asmword "RRUX.B" ; ZC=1; RRUX.B Rx may be repeated by prefix RPT #n|Rn
- CALL rDODOES
+ asmword "RRUX.B" ; ZC=1; RRUX.B Rx may be repeated by prefix RPT #n|Rn
+ CALL rDODOES
.word TYPE6DOES,140h,1040h
asmword "SWPBX"
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1080h
asmword "SWPBX.A"
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1080h
asmword "RRAX"
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1100h
asmword "RRAX.A"
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1140h
asmword "RRAX.B"
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1140h
asmword "SXTX"
CALL rDODOES
.word TYPE6DOES,40h,1180h
- asmword "SXTX.A"
- CALL rDODOES
+ asmword "SXTX.A"
+ CALL rDODOES
.word TYPE6DOES,0,1180h
- asmword "PUSHX"
- CALL rDODOES
+ asmword "PUSHX"
+ CALL rDODOES
.word TYPE6DOES,40h,1200h
asmword "PUSHX.A"
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,0,1240h
asmword "PUSHX.B"
- CALL rDODOES
+ CALL rDODOES
.word TYPE6DOES,40h,1240h
; ----------------------------------------------------------------------
RPT_WORD .word 0
- asmword "RPT" ; RPT #n | RPT Rn repeat n | [Rn]+1 times modulo 16
- mdocol
- .word FBLANK,SKIP
- .word $+2 ; -- addr
- MOV @TOS,X ; X=char
- MOV.B #' ',TOS ; -- ' ' as separator
- CMP.B #'R',X
- JNZ RPT1
- CALL #SearchREG ; -- Rn
- JZ RPT1 ; if not found
+ asmword "RPT" ; RPT #n | RPT Rn repeat n | [Rn] times modulo 16
+ mDOCOL
+ .word BL,SkipPrfx ; -- sep
+ mNEXTADR ;
+ JNZ RPT1 ; -- sep if prefix <> 'R'
+ CALL #SearchRn ; -- Rn
BIS #80h,TOS ; -- $008R R=Rn
JMP RPT2
RPT1 CALL #SearchARG ; -- $xxxx
AND #0Fh,TOS ; -- $000x
RPT2 MOV TOS,&RPT_WORD
MOV @PSP+,TOS
- MOV @RSP+,IP
+ MOV @RSP+,IP
MOV @IP+,PC
; defered word ACCEPT is redirected here by the word LOAD"
; "defered" word CIB is redirected to SDIB (PAD if RAM<2k) by the word LOAD"
; sequentially move an input line ended by CRLF from SD_BUF to PAD
-; if end of SD_BUF is reached before CRLF, asks Read_HandledFile to refill buffer with next sector
-; then load the end of the line to PAD ptr.
+; if end of SD_BUF is reached before CRLF, asks Read_File to refill buffer with next sector
+; then load the end of the line to SDIB_ptr.
+; when the last buffer is loaded, the handle is automaticaly closed
; when all LOAD"ed files are read, redirects defered word ACCEPT to default ACCEPT and restore interpret pointers.
-; see CloseHandleT.
+; see CloseHandle.
; used variables : BufferPtr, BufferLen
-
-; ----------------------------------;
-; FORTHWORD "SD_ACCEPT" ; CIB CIB CPL -- CIB len
-; ----------------------------------;
+; EMIT uses only IP TOS and Y registers
+; ==================================;
+; FORTHWORD "SD_ACCEPT" ; SDIB_org SDIB_org CPL -- SDIB len 94 bytes
+; ==================================;
SD_ACCEPT ; sequentially move from SD_BUF to SDIB (PAD if RAM=1k) a line of chars delimited by CRLF
; ----------------------------------; up to CPL = 80 chars
- PUSH IP ;
- MOV #SDA_YEMIT_RET,IP ; set YEMIT return
+ PUSH IP ;
+ MOV #SDA_YEMIT_RET,IP ; set YEMIT return
; ----------------------------------;
-StartNewLine ; -- CIB CIB CPL
+StartNewLine ; -- SDIB_org SDIB_org CPL
; ----------------------------------;
- MOV &CurrentHdl,T ; prepare a link for the next LOADed file, if any...
- MOV &BufferPtr,HDLW_BUFofst(T) ; ...see usage : GetFreeHandle(CheckCaseOfLoadFileToken)
+ MOV &CurrentHdl,T ; prepare a link for a next LOADed file, if any...
+ MOV &BufferPtr,HDLW_BUFofst(T) ; ...see usage : GetFreeHandle(CheckCaseOfLoadFileToken)
; ----------------------------------;
- MOV @PSP+,W ; -- CIB CPL W=dst_ptr
- MOV TOS,X ; X=dst_len
- MOV #0,TOS ; -- CIB cnt
+SDA_InitDstAddr ;
; ----------------------------------;
-SDA_InitSrcAddr ; <== SDA_GetFileNextSector
+ MOV @PSP+,W ; -- SDIB_org CPL W=SDIB_ptr
+ MOV TOS,X ; X=SDIB_len
+ MOV #0,TOS ; -- SDIB_org len of moved bytes from SD_buf to SDIB
; ----------------------------------;
- MOV &BufferPtr,S ; S=src_ptr
- MOV &BufferLen,T ; T=src_len
- JMP SDA_ComputeChar ;
+SDA_InitSrcAddr ; <== SDA_GetFileNextSect
+; ----------------------------------;
+ MOV &BufferPtr,S ; S=SD_buf_ptr
+ MOV &BufferLen,T ; T=SD_buf_len
+ JMP SDA_ComputeChar ;
; ----------------------------------;
SDA_YEMIT_RET ;
; ----------------------------------;
- .word $+2 ;
- SUB #2,IP ; 1 restore YEMIT return
+ mNEXTADR ;
+ SUB #2,IP ; 1 restore YEMIT return
; ----------------------------------;
-SDA_ComputeChar ; -- CIB cnt
+SDA_ComputeChar ; -- SDIB_org len
; ----------------------------------;
- CMP T,S ; 1 src_ptr >= src_len ?
- JC SDA_GetFileNextSector ; 2 yes
- MOV.B SD_BUF(S),Y ; 3 Y = char
- ADD #1,S ; 1 increment input BufferPtr
- CMP.B #32,Y ; 2 ascii printable char ?
- JC SDA_MoveChar ; 2 yes
- CMP.B #10,Y ; 2 control char = 'LF' ?
- JNZ SDA_ComputeChar ; 2 no
+ CMP T,S ; 1 SD_buf_ptr >= SD_buf_len ?
+ JC SDA_GetFileNextSect ; 2 if yes
+ MOV.B SD_BUF(S),Y ; 3 Y = char
+ ADD #1,S ; 1 increment SD_buf_ptr
+ CMP.B #32,Y ; 2 ascii printable char ?
+ JC SDA_MoveChar ; 2 yes
+ CMP.B #10,Y ; 2 control char = 'LF' ?
+ JNZ SDA_ComputeChar ; 2 no, loop back
; ----------------------------------;
-SDA_EndOfLine ; -- org cnt
+SDA_EndOfLine ; -- SDIB_org len
; ----------------------------------;
- MOV @RSP+,IP ;
- MOV S,&BufferPtr ; yes save BufferPtr for next line
- MOV #32,S ; S = BL
- JMP ACCEPT_EOL ; ==> output
+ MOV S,&BufferPtr ; yes save SD_buf_ptr for next line
+ MOV @RSP+,IP ;
+ MOV #32,S ; S = BL
+ JMP ACCEPT_EOL ; -- SDIB_org len ==> output
; ----------------------------------;
SDA_MoveChar ;
; ----------------------------------;
- CMP X,TOS ; 1 cnt = dst_len ?
- JZ YEMIT ; 2 yes, don't move char to dst
- MOV.B Y,0(W) ; 3 move char to dst
- ADD #1,W ; 1 increment dst addr
- ADD #1,TOS ; 1 increment count of moved chars
- JMP YEMIT ; 9/6~ send echo to terminal if ECHO, do nothing if NOECHO
-; ----------------------------------; 29/26~ char loop, add 14~ for readsectorW ==> 43/40~ ==> 186/200 kbytes/s @ 8MHz
-SDA_GetFileNextSector ; CIB cnt --
-; ----------------------------------;
- PUSHM #2,W ; save dst_ptr, dst_len
- CALL #Read_File ; that resets BufferPtr
- POPM #2,W ; restore dst_ptr, dst_len
- JMP SDA_InitSrcAddr ; loopback to end the line
+ CMP X,TOS ; 1 len = CPL ?
+ JZ YEMIT ; 2 yes, don't move char to dst
+ MOV.B Y,0(W) ; 3 move char to dst
+ ADD #1,W ; 1 increment SDIB_ptr
+ ADD #1,TOS ; 1 increment len of moved chars
+ JMP YEMIT ; 9/6~ send echo to terminal if ECHO, do nothing if NOECHO
+; ----------------------------------; 29/26~ char loop, add 14~ for readsectorW one char ==> 43/40~ ==> 186/200 kbytes/s @ 8MHz
+SDA_GetFileNextSect ; -- SDIB_org len
+; ----------------------------------;
+ PUSHM #2,W ; save SD_buf_ptr, SD_buf_len
+ CALL #Read_File ; that resets BufferPtr
+ POPM #2,W ; restore SD_buf_ptr, SD_buf_len
+ JMP SDA_InitSrcAddr ; loopback to end the line
; ----------------------------------;
\ No newline at end of file
; First sector of physical drive (sector 0) content :
; ---------------------------------------------------
; dec@| HEX@
-; 446 |0x1BE : partition table first record ==> logical drive 0
+; 446 |0x1BE : partition table first record ==> logical drive 0
; 462 |0x1CE : partition table 2th record ==> logical drive 1
; 478 |0x1DE : partition table 3th record ==> logical drive 2
; 494 |0x1EE : partition table 4th record ==> logical drive 3
; First sector of physical drive (sector 0) content :
; ---------------------------------------------------
; dec@| HEX@
-; 446 |0x1BE : partition table first record ==> logical drive 0
+; 446 |0x1BE : partition table first record ==> logical drive 0
; 462 |0x1CE : partition table 2th record ==> logical drive 1
; 478 |0x1DE : partition table 3th record ==> logical drive 2
; 494 |0x1EE : partition table 4th record ==> logical drive 3
; 450 |0x1C2 = 0x0C : type FAT32 using LBA addressing
; 454 |0x1C6 = 00 20 00 00 : FirstSector (of logical drive 0) = BS_FirstSector = 8192
-;
+;
; FirstSector of logical block (sector 0) content :
; -------------------------------------------------
; dec@| HEX@ = HEX decimal
; 32 | 0x20 = 00 C0 EC 00 : BPB_TotSec32 BPB_TotSec32 = 15515648
; 36 | 0x24 = 30 3B 00 00 : BPB_FATSz32 BPB_FATSz32 = 15152
-; 40 | 0x28 = 00 00 : BPB_ExtFlags BPB_ExtFlags
+; 40 | 0x28 = 00 00 : BPB_ExtFlags BPB_ExtFlags
; 44 | 0x2C = 02 00 00 00 : BPB_RootClus BPB_RootClus = 2
; 48 | 0x30 = 01 00 : BPB_FSInfo BPB_FSInfo = 1
; 50 | 0x33 = 06 00 : BPB_BkBootSec BPB_BkBootSec = 6
; 82 | 0x52 = "FAT32" : BS_FilSysType BS_FilSysType (not used)
-;
+;
; all values below are evaluated in logical sectors
; FAT1 = BPB_RsvdSecCnt = 32
; FAT2 = BPB_RsvdSecCnt + BPB_FATSz32 = 32 + 15152 = 15184
.restore
; ===========================================================
+; WARNING! SD_INIT DRAW BIG CURRENT; IF THE SUPPLY IS TOO WEAK
+; THE SD_CARD LOW VOLTAGE THRESHOLD MAY BE REACHED ==> SD_ERROR 8FF !
+; ===========================================================
+
+; ===========================================================
; Init hardware SD_Card, called by WARM
; ===========================================================
+
+; web search: "SDA simplified specifications"
+
;-----------------------------------;
-INI_HARD_SD CALL @PC+ ; link to previous INI_HARD_APP
-I_H_S_PFA .word INIT_TERM ; which activates all previous I/O settings and set TOS = RSTIV_MEM.
-;-----------------------------------;
- CMP #0,TOS ; RSTIV_MEM = WARM ?
- JZ INI_SD_END ; no init if RSTIV_MEM = WARM
+INIT_HARD_SD CALL @PC+ ; link to previous INI_HARD_APP
+ .word INIT_TERM ; which activates all previous I/O settings and set TOS = RSTIV_MEM.
;-----------------------------------;
BIT.B #CD_SD,&SD_CDIN ; SD_memory in SD_Card module ?
- JNZ INI_SD_END ; no
+ JNZ INIT_HSD_END ; no
;-----------------------------------;
MOV #0A981h,&SD_CTLW0 ; UCxxCTL1 = CKPH, MSB, MST, SPI_3, SMCLK + UCSWRST
- MOV #FREQUENCY*3,&SD_BRW; UCxxBRW init SPI CLK = 333 kHz ( < 400 kHz) for SD_Card initialisation
+ MOV #FREQUENCY*3,&SD_BRW; UCxxBRW init SPI CLK = 333 kHz ( <= 400 kHz) for SD_Card initialisation
BIS.B #CS_SD,&SD_CSDIR ; SD Chip Select as output high
BIS #BUS_SD,&SD_SEL ; Configure pins as SIMO, SOMI & SCK (PxDIR.y are controlled by eUSCI module)
BIC #1,&SD_CTLW0 ; release eUSCI from reset
;-----------------------------------;
- .IF RAM_LEN < 2048 ; case of MSP430FR57xx : SD datas are in FRAM not initialized by RESET.
- MOV #SD_LEN,X ; clear all SD datas
+ MOV #SD_LEN,X ; clear all SD datas
ClearSDdata SUB #2,X ; 1
- MOV #0,SD_ORG(X) ; 3
+ MOV #0,SD_ORG(X) ; 3
JNZ ClearSDdata ; 2
- .ENDIF ;
;-----------------------------------;
SD_POWER_ON
; ----------------------------------;
MOV #8,X ; send 8*8 = 64 clk on SPI
CALL #SPI_X_GET ;
- BIC.B #CS_SD,&SD_CSOUT ; preset Chip Select output low to switch in SPI one wire mode
+ BIC.B #CS_SD,&SD_CSOUT ; preset Chip Select output low to switch in SPI mode
; ----------------------------------;
-INIT_CMD0 ; after PUC, all SD variables area is 0 filled
+INIT_CMD0 ; SD_CMD_FRM+2 is already cleared...
; ----------------------------------;
MOV #4,S ; preset error 4R1 for CMD0
- MOV #95h,&SD_CMD_FRM ; $(95 00 00 00 00 00)
- MOV #4000h,&SD_CMD_FRM+4 ; $(95 00 00 00 00 40) = CMD0
+ MOV #0095h,&SD_CMD_FRM ; $(95 00 00 00 00 00)
+ MOV #4000h,&SD_CMD_FRM+4 ; $(95 00 00 00 00 40) = CMD0
; ----------------------------------;
SEND_CMD0 ; GO_IDLE_STATE, expected SPI_R1 response = 1 = idle state
; ----------------------------------;
- CALL #sendCommandIdleRet ;X send command, see forthMSP430FR_SD_lowLvl.asm
+ CALL #sendCommandIdleRet ;X send command (does little to big endian conversion), see forthMSP430FR_SD_lowLvl.asm
JZ INIT_CMD8 ; if idle state
SD_INIT_ERROR ;
MOV #SD_CARD_ERROR,PC ; ReturnError = $04R1, case of defectuous card (or insufficient SD_POWER_ON clk)
; ----------------------------------;
SEND_CMD8 ; SEND_IF_COND; expected R1 response (first byte of SPI R7) = 01h : idle state
; ----------------------------------;
- CALL #sendCommandIdleRet ;X time out occurs with SD_Card V1.x (and all MMC_card)
+ CALL #sendCommandIdleRet ;X time out occurs with SD_Card V1.x (and all MMC_card)
; ----------------------------------;
MOV #4,X ; skip end of SD_Card V2.x type R7 response (4 bytes), because useless
CALL #SPI_X_GET ;WX
; ----------------------------------;
MOV #1,&SD_CMD_FRM ; $(01 00 ... set stop bit
MOV #0,&SD_CMD_FRM+2 ; $(01 00 00 00 ...
-; MOV.B #16,Y ; init 16 * ACMD41 repeats (power on fails with SanDisk ultra 8GB "HC I" and Transcend 2GB)
+; MOV.B #16,Y ; init 16 * ACMD41 repeats (fails with SanDisk ultra 8GB "HC I" and Transcend 2GB)
; MOV.B #32,Y ; init 32 * ACMD41 repeats ==> ~400ms time out
MOV.B #-1,Y ; init 255 * ACMD41 repeats ==> ~3 s time out
MOV #8,S ; preset error 8R1 for ACMD41
ADD S,S ; preset error $10 for CMD16
SEND_CMD16 ; CMD16 = SET_BLOCKLEN
MOV #02h,&SD_CMD_FRM+2 ; $(01 00 02 00 ...)
- MOV #5000h,&SD_CMD_FRM+4 ; $(01 00 02 00 00 50)
+ MOV #5000h,&SD_CMD_FRM+4 ; $(01 00 02 00 00 50)
CALL #WaitIdleBeforeSendCMD ; wait until idle then send CMD16
JNZ SD_INIT_ERROR ; if W = R1 <> 0, ReturnError = $20R1 ; send command ko
; ----------------------------------; W = R1 = 0
MOV #0,&SD_BRW ; UCxxBRW = 0 ==> SPI_CLK = MCLK
BIC #1,&SD_CTLW0 ; release from reset
; ----------------------------------;
-Read_EBP_FirstSector ; W=0, BS_FirstSectorHL=0
+Read_EBP_FirstSector ; BS_FirstSectorHL=0
; ----------------------------------;
+ MOV #0,W ;
MOV #0,X ;
- CALL #readSectorWX ; read physical first sector
+ CALL #readSectorWX ; read physical first sector, W=0
MOV #SD_BUF,Y ;
- MOV 454(Y),&BS_FirstSectorL ; so, sectors become logical
- MOV 456(Y),&BS_FirstSectorH ;
- MOV.B 450(Y),W ; W = partition ID
+ MOV 454(Y),&BS_FirstSectorL ; so, from here, sectors become logical
+ MOV 456(Y),&BS_FirstSectorH ;
+ MOV.B 450(Y),S ; S = partition ID
; ----------------------------------;
TestPartitionID ;
; ----------------------------------;
- MOV #1,&FATtype ; preset FAT16
-FAT16_CHS_LBA_Test ;
- SUB.B #6,W ; ID=06h Partition FAT16 > 32MB using CHS & LBA ?
- JZ Read_MBR_FirstSector ; W = 0
-FAT16_LBA_Test ;
- SUB.B #8,W ; ID=0Eh Partition FAT16 using LBA ?
- JZ Read_MBR_FirstSector ; W = 0
+ SUB.B #0Ch,S ; ID=0Ch Partition FAT32 using LBA ?
+ JZ Read_MBR_FirstSector ;
+ ADD.B #1,S ; ID=0Bh Partition FAT32 using CHS & LBA ?
+ JZ Read_MBR_FirstSector ;
+ ADD.B #4,S ; ID=07h assigned to FAT 32 by MiniTools Partition Wizard....
+ JZ Read_MBR_FirstSector ;
+ ADD #02007h,S ; set ReturnError = $20 & restore ID value
+ MOV #SD_CARD_ID_ERROR,PC ; see: https://en.wikipedia.org/wiki/Partition_type
; ----------------------------------;
- MOV #2,&FATtype ; set FAT32
-FAT32_LBA_Test ;
- ADD.B #2,W ; ID=0Ch Partition FAT32 using LBA ?
- JZ Read_MBR_FirstSector ; W = 0
-FAT32_CHS_LBA_Test ;
- ADD.B #1,W ; ID=0Bh Partition FAT32 using CHS & LBA ?
- JZ Read_MBR_FirstSector ; W = 0
- ADD.B #4,W ; ID=07h assigned to FAT 32 by MiniTools Partition Wizard....
- JZ Read_MBR_FirstSector ; W = 0
- ADD #0200Bh,W ;
- MOV W,S ;
- MOV #SD_CARD_ID_ERROR,PC ; S = ReturnError = $20xx with xx = partition ID
-; ----------------------------------; see: https://en.wikipedia.org/wiki/Partition_type
Read_MBR_FirstSector ; read first logical sector
-; ----------------------------------; W = 0
- MOV #0,X ;
+; ----------------------------------;
+ MOV #0,X ; W = 0
CALL #readSectorWX ; ...with the good CMD17 bytes/sectors frame ! (good switch FAT16/FAT32)
; ----------------------------------;
FATxx_SetFileSystem ;
; ----------------------------------;
- MOV.B 13(Y),&SecPerClus ;
- MOV 14(Y),X ;3 X = BPB_RsvdSecCnt
+; MOV 44(Y),&DIRClusterL ; init DIRcluster as FAT32 RootDIR
+ MOV #2,&DIRClusterL ; init DIRcluster as FAT32 RootDIR
+; ----------------------------------;
+ MOV 14(Y),X ;3 X = BPB_RsvdSecCnt (05FEh=1534)
MOV X,&OrgFAT1 ;3 set OrgFAT1
- MOV 22(Y),W ; W = BPB_FATsize
- CMP #0,W ; BPB_FATsize <> 0 ?
- JNZ Set_FATsize ; yes
- MOV 36(Y),W ; W = BPB_FATSz32
-Set_FATsize ;
- MOV W,&FATSize ; limited to 16384 sectors....
+; ----------------------------------;
+ MOV 36(Y),W ; no set W = BPB_FATSz32 (1D01h=7425)
+ MOV W,&FATSize ; limited to 32767 sectors....
+; ----------------------------------;
ADD W,X ;
- MOV X,&OrgFAT2 ; X = OrgFAT1 + FATsize = OrgFAT2
- ADD W,X ; X = OrgFAT2 + FATsize = FAT16 OrgRootDir | FAT32 OrgDatas
- CMP #2,&FATtype ; FAT32?
- JZ FATxx_SetFileSystemNext ; yes
-FAT16_SetRootCluster ;
- MOV X,&OrgRootDIR ; only FAT16 use, is a sector used by ComputeClusFrstSect
- ADD #32,X ; OrgRootDir + RootDirSize = OrgDatas
+ MOV X,&OrgFAT2 ; X = OrgFAT1 + FATsize = OrgFAT2 (8959)
+; ----------------------------------;
+ ADD W,X ; X = OrgFAT2 + FATsize = FAT32 OrgDatas = OrgRootDIR sector = 16384
+; MOV X,&OrgRootDIR ;
FATxx_SetFileSystemNext ;
- SUB &SecPerClus,X ; OrgDatas - SecPerClus*2 = OrgClusters
- SUB &SecPerClus,X ; no borrow expected
+ MOV.B 13(Y),Y ; Logical sectors per cluster (8)
+ MOV Y,&SecPerClus ;
+ SUB Y,X ; OrgDatas - SecPerClus*2 = OrgClusters
+ SUB Y,X ; no borrow expected
MOV X,&OrgClusters ; X = virtual cluster 0 address (clusters 0 and 1 don't exist)
- MOV &FATtype,&DIRClusterL ; init DIRcluster as RootDIR
-INI_SD_END ;
- MOV @RSP+,PC ; RET
+INIT_HSD_END ;
+ MOV @RSP+,PC ; RET
;-----------------------------------;
; ===========================================================
-; Init SD_Card software, called by ?ABORT|RST
+; Init SD_Card software, called by INIT_FORTH
; ===========================================================
-;-----------------------------------;
-INI_SOFT_SD ; called by INI_FORTH common part of ?ABORT|RST
;-----------------------------------;
- CALL @PC+ ; link to previous INI_FORTH_APP
-RSAB_SD_PFA .word RET_ADR ; which does nothing
+INIT_SOFT_SD ; called by INI_FORTH common part of ?ABORT|RST
;-----------------------------------;
- MOV #HandlesLen,X ; clear all handles
-ClearHandle SUB #2,X ; 1
- MOV #0,FirstHandle(X) ; 3
- JNZ ClearHandle ; 2
+; CMP #0,TOS ; USERSYS = 0 ?
+; JZ INIT_HSD_END ; no hardware init if USERSYS = 0 SYS
+; MOV #HandlesLen,X ; clear all handles
+;ClearHandle SUB #2,X ; 1
+; MOV #0,FirstHandle(X) ; 3
+; JNZ ClearHandle ; 2
MOV #0,&CurrentHdl ;
- MOV @RSP+,PC ; RET
+ MOV #INIT_SOFT_TERM,PC ; link to previous INI_SOFT_APP then RET
;-----------------------------------;
; -*- coding: utf-8 -*-
; forthMSP430FR_SD_LOAD.asm
-;Z SD_ACCEPT addr addr len -- addr' len' get line to interpret from a SD Card file
-; no interrupt allowed
-; defered word ACCEPT is redirected here by the word LOAD"
-; "defered" word CIB is redirected to SDIB (PAD if RAM<2k) by the word LOAD"
-; sequentially move an input line ended by CRLF from SD_BUF to PAD
-; if end of SD_BUF is reached before CRLF, asks Read_HandledFile to refill buffer with next sector
-; then load the end of the line to PAD ptr.
-; when all LOAD"ed files are read, redirects defered word ACCEPT to default ACCEPT and restore interpret pointers.
-; see CloseHandleT.
+; Tested with MSP-EXP430FR5994 launchpad
+; Copyright (C) <2019> <J.M. THOORENS>
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program. If not, see <http://www.gnu.org/licenses/>.
+
; used variables : BufferPtr, BufferLen
; SD card OPEN, LOAD subroutines
;-----------------------------------------------------------------------
-; used variables : BufferPtr, BufferLen
-
; rules for registers use
; S = error
; T = CurrentHdl, pathname
; W = SectorL, (RTC) TIME
; X = SectorH, (RTC) DATE
-; Y = BufferPtr, (DIR) EntryOfst, FAToffset
+; Y = BufferPtr, (DIR) DIREntryOfst
-; ----------------------------------;
-HDLCurClusToFAT1sectWofstY ;WXY Input: T=currentHandle, Output: W=FATsector, Y=FAToffset, Cluster=HDL_CurCluster
-; ----------------------------------;
+; ==================================;
+HDLcurClus2FATsecWofstY ;WXY Input: T=Handle, HDL_CurClustHL Output: ClusterHL, FATsector, W = FATsector, Y = FAToffset
+; ==================================;
MOV HDLL_CurClust(T),&ClusterL ;
MOV HDLH_CurClust(T),&ClusterH ;
-; ----------------------------------;
-ClusterToFAT1sectWofstY ;WXY Input : Cluster ; Output: W = FATsector, Y = FAToffset
-; ----------------------------------;
+; ==================================;
+ClusterHLtoFAT1sectWofstY ;WXY Input : ClusterHL Output: ClusterHL, FATsector, W = FATsector, Y = FAToffset
+; ==================================;
MOV.B &ClusterL+1,W ;3 W = ClusterLoHI
- MOV.B &ClusterL,Y ;3 Y = ClusterLoLo
- CMP #1,&FATtype ;3 FAT16?
- JZ CTF1S_end ;2 yes
-
+ MOV.B &ClusterL,Y ;3 Y = ClusterLOlo
; input : Cluster n, max = 7FFFFF (SDcard up to 256 GB)
; ClusterLoLo*4 = displacement in 512 bytes sector ==> FAToffset
; ClusterHiLo&ClusterLoHi +C << 1 = relative FATsector + orgFAT1 ==> FATsector
; ----------------------------------;
- MOV.B &ClusterH,X ; X = 0:ClusterHiLo
- SWPB X ; X = ClusterHiLo:0
- ADD X,W ; W = ClusterHiLo:ClusterLoHi
+ MOV.B &ClusterH,X ; X = 0:ClusterHIlo
+ SWPB X ; X = ClusterHIlo:0
+ BIS X,W ; W = ClusterHIlo:ClusterLOhi
; ----------------------------------;
- SWPB Y ; Y = ClusterLoLo:0
- ADD Y,Y ;1 Y = ClusterLoLo:0 << 1 + carry for FATsector
- ADDC W,W ; W = ClusterHiLo:ClusterLoHi << 1 = ClusterHiLo:ClusterL / 128
- SWPB Y
-CTF1S_end
- ADD Y,Y ; Y = 0:ClusterLoLo << 1
+ SWPB Y ; Y = ClusterLOlo:0
+ ADD Y,Y ;1 Y = ClusterLOlo:0 << 1 (+ carry for FATsector)
+ ADDC W,W ; FATsector = W = ClusterHIlo:ClusterLOhi<<1 + Carry
+ SWPB Y ; Y = 0:ClusterLOlo
+ ADD Y,Y ; FAToffset = Y = 0:ClusterLOlo << 1 for FAT16 and 0:ClusterLOlo<<2 for FAT32
MOV @RSP+,PC ;4
; ----------------------------------;
+; ==================================;
+ReadFAT1SectorW ;SWX (< 65536)
+; ==================================;
+ ADD &OrgFAT1,W ;
+ MOV #0,X ; FAT1_SectorHI = 0
+ JMP ReadSectorWX ;SWX read FAT1SectorW
+; ----------------------------------;
; use no registers
-; ----------------------------------; Input : Cluster, output: Sector = Cluster_first_sector
-ComputeClusFrstSect ; If Cluster = 1 ==> RootDirectory ==> SectorL = OrgRootDir
-; ----------------------------------; Output: SectorL of Cluster
- MOV #0,&SectorH ;
- MOV &OrgRootDir,&SectorL ;
- CMP.B #0,&ClusterH ; clusterH <> 0 ?
- JNE CCFS_AllOthers ; yes
- CMP #1,&ClusterL ; clusterHL = 1 ? (FAT16 specificity)
- JZ CCFS_RET ; yes, sectorL for FAT16 OrgRootDIR is done
-CCFS_AllOthers ;
-; ----------------------------------;
+; ==================================;
+ClusterHLtoFrstSectorHL ; Input : ClusterHL, output: first SectorHL of ClusterHL
+; ==================================;
.IFDEF MPY ; general case
; ----------------------------------;
MOV &ClusterL,&MPY32L ;3
; ----------------------------------;
-; ----------------------------------;
-ComputeHDLcurrentSector ; input: currentHandle, output: Cluster, Sector
-; ----------------------------------;
- MOV HDLL_CurClust(T),&ClusterL ;
- MOV HDLH_CurClust(T),&ClusterH ;
- CALL #ComputeClusFrstSect ;
- MOV.B HDLB_ClustOfst(T),W ;
- ADD W,&SectorL ;
- ADDC #0,&SectorH ;
- MOV @RSP+,PC ;
-; ----------------------------------;
-
-; ----------------------------------; input : X = countdown_of_spaces, Y = name pointer in buffer
-ParseEntryNameSpaces ;XY
-; ----------------------------------; output: Z flag, Y is set after the last space char
- CMP #0,X ;
- JZ PENSL_END ;
-; ----------------------------------;
-ParseEntryNameSpacesLoop ;
-; ----------------------------------;
- CMP.B #32,SD_BUF(Y) ; SPACE ?
- JNZ PENSL_END ; no: RET
- ADD #1,Y ;
- SUB #1,X ;
- JNZ ParseEntryNameSpacesLoop;
-PENSL_END ;
- MOV @RSP+,PC ;
-; ----------------------------------;
-
-
-; sequentially load in SD_BUF bytsPerSec bytes of a file opened as read or as load
-; if new bufferLen have a size <= BufferPtr, closes the file then RET.
-; if previous bufferLen had a size < bytsPerSec, closes the file and reloads previous LOADed file if exist.
-; HDLL_CurSize leaves the not yet read size
-; All used registers must be initialized.
; ==================================;
-Read_File ; <== SD_ACCEPT, READ
+HDLCurClusPlsOfst2sectorHL ;SWX input: HDL (CurClust, ClustOfst) output: SectorHL
; ==================================;
- MOV &CurrentHdl,T ;
- MOV #0,&BufferPtr ; reset BufferPtr (the buffer is already read)
-; ----------------------------------;
- CMP #bytsPerSec,&BufferLen ;
- JNZ CloseHandleT ; because this last and incomplete sector is already read
- SUB #bytsPerSec,HDLL_CurSize(T) ; HDLL_CurSize is decremented of one sector lenght
- SUBC #0,HDLH_CurSize(T) ;
- ADD.B #1,HDLB_ClustOfst(T) ; current cluster offset is incremented
- CMP.B &SecPerClus,HDLB_ClustOfst(T) ; Cluster Bound reached ?
- JNC SetBufLenAndLoadCurSector ; no
-; ----------------------------------;
-;SearchNextCluster ; yes
-; ----------------------------------;
- MOV.B #0,HDLB_ClustOfst(T) ; reset Current_Cluster sectors offset
- CALL #HDLCurClusToFAT1sectWofstY;WXY Output: W=FATsector, Y=FAToffset, Cluster=HDL_CurCluster
- ADD &OrgFAT1,W ;
- MOV #0,X ;
- CALL #ReadSectorWX ;SWX (< 65536)
- MOV #0,HDLH_CurClust(T) ;
- MOV SD_BUF(Y),HDLL_CurClust(T) ;
- CMP #1,&FATtype ; FAT16?
- JZ SetBufLenAndLoadCurSector ;
- MOV SD_BUF+2(Y),HDLH_CurClust(T);
-; ==================================;
-SetBufLenAndLoadCurSector ;WXY <== previous handle reLOAD with BufferPtr<>0
-; ==================================;
- MOV #bytsPerSec,&BufferLen ; preset BufferLen
- CMP #0,HDLH_CurSize(T) ; CurSize > 65535 ?
- JNZ LoadHDLcurrentSector ; yes
- CMP HDLL_CurSize(T),&BufferPtr ; BufferPtr >= CurSize ? (BufferPtr = 0 or see RestorePreviousLoadedBuffer)
- JC CloseHandleT ; yes
- CMP #bytsPerSec,HDLL_CurSize(T) ; CurSize >= 512 ?
- JC LoadHDLcurrentSector ; yes
- MOV HDLL_CurSize(T),&BufferLen ; no: adjust BufferLen
-; ==================================;
-LoadHDLcurrentSector ; <=== OPEN_WRITE_APPEND
-; ==================================;
- CALL #ComputeHDLcurrentSector ; use no registers
+ MOV HDLL_CurClust(T),&ClusterL ;
+ MOV HDLH_CurClust(T),&ClusterH ;
; ==================================;
-ReadSector ;
+ClusterHL2sectorHL ;W input: ClusterHL, ClustOfst output: SectorHL
; ==================================;
- MOV &SectorL,W ; Low
- MOV &SectorH,X ; High
- JMP ReadSectorWX ; SWX then RET
+ CALL #ClusterHLtoFrstSectorHL ;
+ MOV.B HDLB_ClustOfst(T),W ; byte to word conversion
+ ADD W,&SectorL ;
+ ADDC #0,&SectorH ;
+ MOV @RSP+,PC ;
; ----------------------------------;
; if other open_load token, decrement token, save previous context
; OPEN subroutine
-; Input : EntryOfst, Cluster = EntryOfst(HDLL_FirstClus())
+; Input : DIREntryOfst, Cluster = DIREntryOfst(HDLL_FirstClus())
; init handle(HDLL_DIRsect,HDLW_DIRofst,HDLL_FirstClus,HDLL_CurClust,HDLL_CurSize)
; Output: Cluster = first Cluster of file, X = CurrentHdl
-; ----------------------------------; input : Cluster, EntryOfst
+; ==================================; input : Cluster, DIREntryOfst
GetFreeHandle ;STWXY init handle(HDLL_DIRsect,HDLW_DIRofst,HDLL_FirstClus = HDLL_CurClust,HDLL_CurSize)
-; ----------------------------------; output : T = new CurrentHdl
+; ==================================; output : T = new CurrentHdl
MOV #8,S ; prepare file already open error
MOV #FirstHandle,T ;
MOV #0,X ; X = init previous handle as 0
; ----------------------------------;
SearchHandleLoop ;
; ----------------------------------;
- CMP.B #0,HDLB_Token(T) ; free handle ?
- JZ FreeHandleFound ; yes
+ CMP.B #0,HDLB_Token(T) ; free handle ?
+ JZ FreeHandleFound ; yes
AlreadyOpenTest ; no
CMP &ClusterH,HDLH_FirstClus(T);
JNE SearchNextHandle ;
CMP &ClusterL,HDLL_FirstClus(T);
- JZ InitHandleRET ; error 8: Already Open abort ===>
+ JZ OPEN_Error ; error 8: Already Open abort ===>
SearchNextHandle ;
MOV T,X ; handle is occupied, keep it in X as previous handle
ADD #HandleLenght,T ;
CMP #HandleEnd,T ;
JNZ SearchHandleLoop ;
- ADD S,S ; 16 = no more handle error, abort ===>
-InitHandleRET ;
- MOV @RSP+,PC ;
+ ADD S,S ;
+ JMP OPEN_Error ; error 16 = no more handle error, abort ===>
; ----------------------------------;
FreeHandleFound ; T = new handle, X = previous handle
; ----------------------------------;
; ----------------------------------;
InitHandle ;
; ----------------------------------;
- MOV.B W,HDLB_Token(T) ; marks handle as open type: <0=LOAD, 1=READ, 2=WRITE, 4=DEL
+ MOV.B W,HDLB_Token(T) ; marks handle as open type: <0=LOAD, 1=READ, 2=DEL, 4=WRITE, 8=APPEND
MOV.B #0,HDLB_ClustOfst(T) ; clear ClustOfst
MOV &SectorL,HDLL_DIRsect(T); init handle DIRsectorL
- MOV &SectorH,HDLH_DIRsect(T);
- MOV &EntryOfst,Y ;
+ MOV &SectorH,HDLH_DIRsect(T);
+ MOV &DIREntryOfst,Y ;
MOV Y,HDLW_DIRofst(T) ; init handle SD_BUF offset of DIR entry
MOV SD_BUF+26(Y),HDLL_FirstClus(T); init handle firstcluster of file (to identify file)
- MOV SD_BUF+20(Y),HDLH_FirstClus(T)
- MOV SD_BUF+26(Y),HDLL_CurClust(T) ; init handle CurrentCluster
- MOV SD_BUF+20(Y),HDLH_CurClust(T)
+ MOV SD_BUF+20(Y),HDLH_FirstClus(T); = 0 if new DIRentry (create write file)
+ MOV SD_BUF+26(Y),HDLL_CurClust(T); init handle CurrentCluster
+ MOV SD_BUF+20(Y),HDLH_CurClust(T); = 0 if new DIRentry (create write file)
MOV SD_BUF+28(Y),HDLL_CurSize(T); init handle LOW currentSizeL
- MOV SD_BUF+30(Y),HDLH_CurSize(T);
+ MOV SD_BUF+30(Y),HDLH_CurSize(T); = 0 if new DIRentry (create write file)
MOV #0,&BufferPtr ; reset BufferPtr all type of files
- CMP.B #2,W ; is a WRITE file handle?
- JZ ComputeHDLcurrentSector ; = 2, is a WRITE file
- JGE InitHandleRET ; > 2, is a file to be deleted
- MOV #0,HDLW_BUFofst(T) ; < 2, is a READ or a LOAD file
+ CMP.B #2,W ; del file request (2) ?
+ JZ InitHandleRET ;
+ JGE HDLCurClusPlsOfst2sectorHL ; set ClusterHL and SectorHL for all WRITE requests
+; ----------------------------------;
+ MOV #0,HDLW_BUFofst(T) ; < 2, is a READ or a LOAD request
CMP.B #-1,W ;
JZ ReplaceInputBuffer ; case of first loaded file
JL SaveBufferContext ; case of other loaded file
- JMP SetBufLenAndLoadCurSector ; case of READ file
+ JMP SetBufLenLoadCurSector ; case of READ file
; ----------------------------------;
ReplaceInputBuffer ;
; ----------------------------------;
- MOV #SDIB_ORG,&CIB_ADR ; set SD Input Buffer as Current Input Buffer before return to QUIT
+ MOV #SDIB_ORG,&CIB_ORG ; set SD Input Buffer as Current Input Buffer before return to QUIT
MOV #SD_ACCEPT,&PFAACCEPT ; redirect ACCEPT to SD_ACCEPT before return to QUIT
; ----------------------------------;
-SaveBufferContext ; (see CloseHandleT)
+SaveBufferContext ; (see CloseHandle)
; ----------------------------------;
MOV &SOURCE_LEN,HDLW_PrevLEN(T) ; = CPL
SUB &TOIN,HDLW_PrevLEN(T) ; PREVLEN = CPL - >IN
MOV &SOURCE_ORG,HDLW_PrevORG(T) ; = CIB
ADD &TOIN,HDLW_PrevORG(T) ; PrevORG = CIB + >IN
- JMP SetBufLenAndLoadCurSector ; then RET
+ JMP SetBufLenLoadCurSector ; then RET
+; ----------------------------------;
+InitHandleRET ;
+; ----------------------------------;
+ MOV @RSP+,PC ;
; ----------------------------------;
+; sequentially load in SD_BUF bytsPerSec bytes of a file opened as read or as load
+; if new bufferLen have a size <= BufferPtr, closes the file then RET.
+; if previous bufferLen had a size < bytsPerSec, closes the file and reloads previous LOADed file if exist.
+; HDLL_CurSize leaves the not yet read size
+; All used registers must be initialized.
+; ==================================;
+Read_File ; <== SD_ACCEPT, READ
+; ==================================;
+ MOV &CurrentHdl,T ;
+ MOV #0,&BufferPtr ; reset BufferPtr (the buffer is already read)
; ----------------------------------;
-CloseHandleHere ;
+ CMP #bytsPerSec,&BufferLen ;
+ JNZ CloseHandle ; because this last and incomplete sector is already read
+ SUB #bytsPerSec,HDLL_CurSize(T) ; HDLL_CurSize is decremented of one sector lenght
+ SUBC #0,HDLH_CurSize(T) ;
+ ADD.B #1,HDLB_ClustOfst(T) ; current cluster offset is incremented
+ CMP.B &SecPerClus,HDLB_ClustOfst(T) ; Cluster Bound reached ?
+ JNC SetBufLenLoadCurSector ; no
+; ----------------------------------;
+;SearchNextClusterInFAT1 ;
+; ----------------------------------;
+ MOV.B #0,HDLB_ClustOfst(T) ; reset Current_Cluster sectors offset
+ CALL #HDLcurClus2FATsecWofstY;WXY Output: FATsector W=FATsector, Y=FAToffset
+ CALL #ReadFAT1SectorW ;SWX (< 65536)
+ MOV #0,HDLH_CurClust(T) ; preset HDLH_CurClust(T)=0 for FAT16
+ MOV SD_BUF(Y),HDLL_CurClust(T) ;
+ MOV SD_BUF+2(Y),HDLH_CurClust(T); set HDLH_CurClust(T)=0 for FAT32
+; ==================================;
+SetBufLenLoadCurSector ;WXY <== previous handle reLOAD with BufferPtr<>0
+; ==================================;
+ MOV #bytsPerSec,&BufferLen ; preset BufferLen
+ CMP #0,HDLH_CurSize(T) ; CurSize > 65535 ?
+ JNZ LoadCurSectorHL ; yes
+ CMP HDLL_CurSize(T),&BufferPtr ; BufferPtr >= CurSize ? (BufferPtr = 0 or see RestorePreviousLoadedBuffer)
+ JC CloseHandle ; yes
+ CMP #bytsPerSec,HDLL_CurSize(T) ; CurSize >= 512 ?
+ JC LoadCurSectorHL ; yes
+ MOV HDLL_CurSize(T),&BufferLen ; no: adjust BufferLen
+; ==================================;
+LoadCurSectorHL ;
+; ==================================;
+ CALL #HDLCurClusPlsOfst2sectorHL;SWX
+; ==================================;
+ReadSectorHL ;
+; ==================================;
+ MOV &SectorL,W ; Low
+ MOV &SectorH,X ; High
+ JMP ReadSectorWX ; SWX then RET
+; ----------------------------------;
+
+
+; ----------------------------------;
+CloseHandleT ;
; ----------------------------------;
MOV.B #0,HDLB_Token(T) ; release the handle
MOV @T,T ; T = previous handle
RestorePreviousLoadedBuffer ;
; ----------------------------------;
MOV HDLW_BUFofst(T),&BufferPtr ; restore previous BufferPtr
- CALL #SetBufLenAndLoadCurSector ; then reload previous buffer
- BIC #Z,SR ;
+ CALL #SetBufLenLoadCurSector ; then reload previous buffer
+ BIC #Z,SR ;
; ----------------------------------;
CloseHandleRet ;
MOV @RSP+,PC ; Z = 1 if no more handle
; ==================================;
-CloseHandleT ; <== CLOSE, Read_File, TERM2SD", OPEN_DEL
+CloseHandle ; <== CLOSE, Read_File, TERM2SD", OPEN_DEL
; ==================================;
MOV &CurrentHdl,T ;
CMP #0,T ; no handle?
JZ CloseHandleRet ; RET
; ----------------------------------;
.IFDEF SD_CARD_READ_WRITE
- CMP.B #2,HDLB_Token(T) ; opened as write (updated) file ?
- JNZ TestClosedToken ; no
- CALL #WriteBuffer ;SWXY
- CALL #OPWW_UpdateDirectory ;SWXY
+ CMP.B #4,HDLB_Token(T) ; WRITE file ?
+ JNZ TestClosedToken ; no, case of DEL READ LOAD file
+;; ----------------------------------; optionnal
+; MOV &BufferPtr,W ;
+;FullFillZero ;the remainder of sector
+; CMP #BytsPerSec,W ;2 buffer full ?
+; JZ CloseWriteHandle ;2 remainding of buffer is full filled with 0
+; MOV.B #0,SD_BUF(W) ;3
+; ADD #1,W ;1
+; JMP FullFillZero ;2
+;; ----------------------------------;
+WriteBeforeClose
+ CALL #WriteSD_Buf ;SWX
+CloseWriteHandle
+ CALL #LoadUpdateSaveDirEntry ;SWXY
.ENDIF ;
; ----------------------------------;
TestClosedToken ;
; ----------------------------------;
CaseOfAnyReadWriteDelFileIsClosed ; token >= 0
; ----------------------------------;
- JGE CloseHandleHere ; then RET
+ JGE CloseHandleT ; then RET
; ----------------------------------;
CaseOfAnyLoadedFileIsClosed ; -- org' len' R-- QUIT3 dst_ptr dst_len SD_ACCEPT
; ----------------------------------;
; ----------------------------------;
ReturnOfSD_ACCEPT ;
; ----------------------------------;
- ADD #6,RSP ; R-- QUIT4 empties return stack
+ ADD #6,RSP ; R-- QUIT3 empties return stack
MOV @RSP+,IP ; skip return to SD_ACCEPT
; ----------------------------------;
- CALL #CloseHandleHere ; Z = 1 if no more handle
+ CALL #CloseHandleT ; Z = 1 if no more handle
; ----------------------------------;
CheckFirstLoadedFileIsClosed ;
; ----------------------------------;
; ----------------------------------;
RestoreDefaultACCEPT ; if no more handle, first loaded file is closed...
; ----------------------------------;
- MOV #TIB_ORG,&CIB_ADR ; restore TIB as Current Input Buffer for next line (next QUIT)
+ MOV #TIB_ORG,&CIB_ORG ; restore TIB as Current Input Buffer for next line (next QUIT)
MOV #BODYACCEPT,&PFAACCEPT ; restore default ACCEPT for next line (next QUIT)
MOV #ECHO,PC ; -- org len if return to Terminal ACCEPT
; ----------------------------------;
+; ==================================; input : X = countdown_of_spaces, Y = DIRsector_buffer ptr
+ParseEntryNameSpaces ;XY
+; ==================================; output: Z flag, Y is set after the last space char
+ CMP #0,X ;
+ JZ PENSL_END ;
+; ----------------------------------;
+ParseEntryNameSpacesLoop ;
+; ----------------------------------;
+ CMP.B #32,SD_BUF(Y) ; SPACE ?
+ JNZ PENSL_END ; no: RET
+ ADD #1,Y ;
+ SUB #1,X ;
+ JNZ ParseEntryNameSpacesLoop;
+PENSL_END ;
+ MOV @RSP+,PC ;
+; ----------------------------------;
+
+
.IFDEF SD_CARD_READ_WRITE
;-----------------------------------------------------------------------
; if pathname is a directory, change current directory.
; if an error is encountered, no handle is set, error message is displayed.
-; READ" acts also as CD dos command :
+; READ" acts also as CD dos command :
; - READ" a:\misc\" set a:\misc as current directory
; - READ" a:\" reset current directory to root
; - READ" ..\" change to parent directory
; to close all files type : WARM (or COLD, RESET)
-; ----------------------------------;
+; ==================================;
FORTHWORDIMM "READ\34" ; immediate
-; ----------------------------------;
+; ==================================;
READDQ
- MOV.B #1,W ; W = OpenType
+ MOV.B #1,W ; W = READ request
JMP Open_File ;
; ----------------------------------;
-;Z WRITE" pathame" -- immediate
-; open or create the file designed by pathname.
-; an error occurs if the file is already opened.
-; the last sector of the file is loaded in buffer, and bufferPtr leave the address of the first free byte.
-; compile state : compile WRITE" pathname"
-; exec state : open or create entry selected by pathname
+;Z DEL" pathame" -- immediate
+; ==================================;
+ FORTHWORDIMM "DEL\34" ; immediate
+; ==================================;
+DELDQ
+ MOV.B #2,W ; W = DEL request
+ JMP Open_File ;
; ----------------------------------;
+
+;Z WRITE" pathame" -- immediate
+; if file exist, free all clusters then switch handle to WRITE
+; if "no such file", open a write handle
+; ==================================;
FORTHWORDIMM "WRITE\34" ; immediate
-; ----------------------------------;
+; ==================================;
WRITEDQ
- MOV.B #2,W ; W = OpenType
+ MOV.B #4,W ; W = WRITE request
JMP Open_File ;
; ----------------------------------;
-
-;Z DEL" pathame" -- immediate
-; compile state : compile DEL" pathname"
-; exec state : DELETE entry selected by pathname
-
-; ----------------------------------;
- FORTHWORDIMM "DEL\34" ; immediate
-; ----------------------------------;
-DELDQ
- MOV.B #4,W ; W = OpenType
+;Z APPEND" pathame" -- immediate
+; open the file designed by pathname.
+; the last sector of the file is loaded in buffer, and bufferPtr leave the address of the first free byte.
+; ==================================;
+ FORTHWORDIMM "APPEND\34" ; immediate
+; ==================================;
+APPENDQ
+ MOV.B #8,W ; W = APPEND request
JMP Open_File ;
; ----------------------------------;
-
-;Z CLOSE --
+;Z CLOSE --
; close current handle
-; ----------------------------------;
+; ==================================;
FORTHWORD "CLOSE" ;
-; ----------------------------------;
- CALL #CloseHandleT ;
- MOV @IP+,PC ;
+; ==================================;
+ CALL #CloseHandle ;
+ MOV @IP+,PC ;
; ----------------------------------;
.ENDIF ; SD_CARD_READ_WRITE
;Z LOAD" pathame" -- immediate
; compile state : compile LOAD" pathname"
; exec state : open a file from SD card via its pathname
-; see Open_File primitive for pathname conventions
+; see Open_File primitive for pathname conventions
; the opened file becomes the new input stream for INTERPRET
; this command is recursive, limited only by the count of free handles (up to 8)
-; LOAD" acts also as dos command "CD" :
+; LOAD" acts also as dos command "CD" :
; - LOAD" \misc\" set a:\misc as current directory
; - LOAD" \" reset current directory to root
; - LOAD" ..\" change to parent directory
-; ----------------------------------;
+; ==================================;
FORTHWORDIMM "LOAD\34" ; immediate
+; ==================================;
+ MOV.B #-1,W ; W = LOAD request
; ----------------------------------;
- MOV.B #-1,W ; W = OpenType
-; ----------------------------------;
-
; ======================================================================
; OPEN FILE primitive
; ...open the file as read and return the handle in CurrentHdl.
; if the pathname is a directory, change current directory, no handle is set.
; if an error is encountered, no handle is set, an error message is displayed.
-; ----------------------------------;
+; ==================================;
Open_File ; --
-; ----------------------------------;
+; ==================================;
SUB #2,PSP ;
MOV TOS,0(PSP) ;
- MOV W,TOS ; -- Open_type (0=LOAD", 1=READ", 2=WRITE", 4=DEL")
+ MOV W,TOS ; -- Open_type (-1=LOAD", 1=READ", 2=DEL", 4=WRITE", 8=APPEND")
CMP #0,&STATE ;
JZ OPEN_EXEC ;
; ----------------------------------;
; ----------------------------------;
OPEN_EXEC ;
mDOCOL ; if exec state
- .word lit,'"',WORDD,COUNT ; -- open_type addr u
+ .word lit,'"',WORDD,COUNT ; -- open_type addr cnt
.word $+2 ;
MOV @RSP+,IP ;
; ----------------------------------;
-ParenOpen ; -- open_type HERE HERE as pathname ptr
+ParenOpen ; -- open_type addr cnt
; ----------------------------------;
MOV @PSP+,rDOCON ; rDOCON = addr = pathname PTR
ADD rDOCON,TOS ; TOS = EOS (End Of String) = pathname end
.IFDEF SD_CARD_READ_WRITE ;
- MOV TOS,&EndOfPath ; for WRITE CREATE part
+ MOV TOS,&PathName_END ; for WRITE CREATE part
.ENDIF
; ----------------------------------;
-OPN_PathName ;
+;OPN_PathName ;
; ----------------------------------;
+ MOV #2,&ClusterL ; set root DIR cluster
+ MOV #0,&ClusterH ;
MOV #1,S ; error 1
- MOV &DIRClusterL,&ClusterL ;
- MOV &DIRclusterH,&ClusterH ;
CMP rDOCON,TOS ; PTR = EOS ? (end of pathname ?)
- JZ OPN_NoPathName ; yes: error 1 ===>
+ JZ OPEN_Error ; yes: error 1 ===>
; ----------------------------------;
CMP.B #':',1(rDOCON) ; A: B: C: ... in pathname ?
JNZ OPN_AntiSlashStartTest ; no
ADD #2,rDOCON ; yes : skip drive because not used, only one SD_card
; ----------------------------------;
OPN_AntiSlashStartTest ;
- CMP.B #'\\',0(rDOCON) ; "\" as first char ?
+ CMP.B #'\\',0(rDOCON) ; "\" as first char ?
JNZ OPN_SearchDirSector ; no
ADD #1,rDOCON ; yes : skip '\' char
- MOV &FATtype,&ClusterL ; FATtype = 1 as FAT16 RootDIR, FATtype = 2 = FAT32RootDIR
- MOV #0,&ClusterH ;
; ----------------------------------;
-OPN_EndOfStringTest ; <=== dir found in path
+OPN_EndOfStringTest ;
; ----------------------------------;
CMP rDOCON,TOS ; PTR = EOS ? (end of pathname ?)
- JZ OPN_SetCurrentDIR ; yes
+ JZ OPN_SetCurrentDIR ; if pathname ptr = end of string
; ----------------------------------;
-OPN_SearchDirSector ;
+OPN_SearchDirSector ; <=== dir found in path
; ----------------------------------;
- MOV rDOCON,&Pathname ; save Pathname ptr
- CALL #ComputeClusFrstSect ; output: SectorHL
- MOV #32,rDODOES ; preset countdown for FAT16 RootDIR sectors
- CMP #2,&FATtype ; FAT32?
- JZ OPN_SetDirSectors ; yes
- CMP &ClusterL,&FATtype ; FAT16 AND RootDIR ?
- JZ OPN_LoadDIRsector ; yes
-OPN_SetDirSectors ;
- MOV &SecPerClus,rDODOES ;
+ MOV rDOCON,&PathName_PTR ; save Pathname ptr
+ CALL #ClusterHLtoFrstSectorHL; output: SectorHL
+ MOV &SecPerClus,rDODOES ; DIR sectors = one cluster sectors
; ----------------------------------;
OPN_LoadDIRsector ; <=== Dir Sector loopback
; ----------------------------------;
- CALL #ReadSector ;SWX
+ CALL #ReadSectorHL ;SWX
; ----------------------------------;
MOV #2,S ; prepare no such file error
MOV #0,W ; init entries count
MOV W,Y ; 1
RLAM #4,Y ; --> * 16
ADD Y,Y ; 1 --> * 2
- MOV Y,&EntryOfst ; EntryOfst points to first free entry
+ MOV Y,&DIREntryOfst ; DIREntryOfst
CMP.B #0,SD_BUF(Y) ; free entry ? (end of entries in DIR)
JZ OPN_NoSuchFile ; error 2 NoSuchFile, used by create ===>
MOV #8,X ; count of chars in entry name
ADD #1,rDOCON ; 9th char of Pathname is always a dot
; ----------------------------------;
OPN_FirstCharMismatch ;
+; ----------------------------------;
CMP.B #'.',-1(rDOCON) ; FirstNotEqualChar of Pathname = dot ?
JZ OPN_DotFound ;
; ----------------------------------;
-OPN_DotNotFound ;
+OPN_DotNotFound ;
; ----------------------------------;
- ADD #3,X ; for next cases not equal chars of entry until 11 must be spaces
+ ADD #3,X ; for next cases not equal chars of DIRentry until 11 must be spaces
CALL #ParseEntryNameSpaces ; for X + 3 chars
- JNZ OPN_DIRentryMismatch ; if a char entry <> space
+ JNZ OPN_DIRentryMismatch ; if a char entry <> space
CMP.B #'\\',-1(rDOCON) ; FirstNotEqualChar of Pathname = "\" ?
JZ OPN_EntryFound ;
CMP rDOCON,TOS ; EOS exceeded ?
; ----------------------------------;
OPN_DIRentryMismatch ;
; ----------------------------------;
- MOV &pathname,rDOCON ; reload Pathname
+ MOV &PathName_PTR,rDOCON ; reload PathName_PTR as it was at last OPN_SearchDirSector
ADD #1,W ; inc entry
- CMP #16,W ; 16 entry in a sector
+ CMP #16,W ; 16 entries in a sector
JNZ OPN_SearchDIRentry ; ===> loopback for search next DIR entry
; ----------------------------------;
ADD #1,&SectorL ;
JNZ OPN_LoadDIRsector ; ===> loopback for search next DIR sector
; ----------------------------------;
MOV #4,S ;
- JMP OPN_EndOfDIR ; error 4 ===>
+ JMP OPEN_Error ; ENd of DIR error 4 ===>
; ----------------------------------;
; ----------------------------------;
OPN_DotFound ; not equal chars of entry name until 8 must be spaces
; ----------------------------------;
CMP.B #'.',-2(rDOCON) ; LastCharEqual = dot ?
- JZ OPN_DIRentryMismatch ; case of first DIR entry = "." and Pathname = "..\"
+ JZ OPN_DIRentryMismatch ; case of first DIR entry = "." and Pathname = "..\"
CALL #ParseEntryNameSpaces ; parse X spaces, X{0,...,7}
JNZ OPN_DIRentryMismatch ; if a char entry <> space
MOV #3,X ;
JMP OPN_EntryFound ;
OPN_ExtNotEqualChar ;
CMP rDOCON,TOS ; EOS exceeded ?
- JC OPN_DIRentryMismatch ; no, loop back
+ JC OPN_DIRentryMismatch ; no, loop back
CMP.B #'\\',-1(rDOCON) ; FirstNotEqualChar = "\" ?
JNZ OPN_DIRentryMismatch ;
CALL #ParseEntryNameSpaces ; parse X spaces, X{0,...,3}
; ----------------------------------;
OPN_EntryFound ; Y points on the file attribute (11th byte of entry)
; ----------------------------------;
- MOV &EntryOfst,Y ; reload DIRentry
+ MOV &DIREntryOfst,Y ; reload DIRentry
MOV SD_BUF+26(Y),&ClusterL ; first clusterL of file
- MOV SD_BUF+20(Y),&ClusterH ; first clusterT of file, always 0 if FAT16
+ MOV SD_BUF+20(Y),&ClusterH ; first clusterH of file
OPN_EntryFoundNext
BIT.B #10h,SD_BUF+11(Y) ; test if Directory or File
- JZ OPN_FileFound ;
+ JZ OPN_FileFound ; is a file
; ----------------------------------;
OPN_DIRfound ; entry is a DIRECTORY
; ----------------------------------;
JNZ OPN_DIRfoundNext ;
CMP #0,&ClusterL ; case of ".." entry, when parent directory is root
JNZ OPN_DIRfoundNext ;
- MOV &FATtype,&ClusterL ; set cluster as RootDIR cluster
+ MOV #2,&ClusterL ; set cluster as RootDIR cluster
OPN_DIRfoundNext ;
- CMP rDOCON,TOS ; EOS exceeded ?
- JC OPN_EndOfStringTest ; no: (we presume that FirstNotEqualChar = "\") ==> loop back
+ CMP rDOCON,TOS ; EOS reached ?
+ JNZ OPN_SearchDirSector ; no: (we presume that FirstNotEqualChar = "\") ==> loop back
; ----------------------------------;
-OPN_SetCurrentDIR ; -- open_type ptr
+OPN_SetCurrentDIR ; -- open_type ptr PathName_PTR is set on name of this DIR
; ----------------------------------;
MOV &ClusterL,&DIRClusterL ;
MOV &ClusterH,&DIRclusterH ;
- MOV #0,0(PSP) ; -- open_type ptr open_type = 0
+ MOV #0,0(PSP) ; -- open_type ptr open_type = 0
JMP OPN_Dir
; ----------------------------------;
-OPN_FileFound ; -- open_type ptr
+OPN_FileFound ; -- open_type ptr PathName_PTR is set on name of file
; ----------------------------------;
- MOV @PSP,W ;
+ MOV @PSP,W ;
CALL #GetFreeHandle ;STWXY init handle(HDLL_DIRsect,HDLW_DIRofst,HDLL_FirstClus = HDLL_CurClust,HDLL_CurSize)
; ----------------------------------; output : T = CurrentHdl*, S = ReturnError, Y = DIRentry offset
-OPN_NomoreHandle ; S = error 16
-OPN_alreadyOpen ; S = error 8
-OPN_EndOfDIR ; S = error 4
OPN_NoSuchFile ; S = error 2
-OPN_NoPathName ; S = error 1
-OPN_Dir
+OPN_Dir ;
MOV #xdodoes,rDODOES ; restore rDODOES
MOV #xdocon,rDOCON ; restore rDODOES
MOV @PSP+,W ; -- ptr W = open_type
; from open(GetFreeHandle): Y = DIRentry, T = CurrentHdl
; output: nothing else abort on error
; ======================================================================
-
+
; ----------------------------------;
OPEN_QDIR ;
; ----------------------------------;
; ----------------------------------;
.IFDEF SD_CARD_READ_WRITE ;
CMP.B #-1,W ; open_type = LOAD"
- JNZ OPEN_QREAD ; next step
+ JNZ OPEN_1W ; next step
.ENDIF ;
; ----------------------------------; here W is free
OPEN_LOAD ;
; ----------------------------------;
CMP #0,S ; open file happy end ?
JNZ OPEN_Error ; no
-OPEN_LOAD_END
- MOV @IP+,PC ;
+OPEN_LOAD_END ;
+ MOV #NOECHO,PC ;
+; MOV @IP+,PC ;
; ----------------------------------;
; ----------------------------------;
.word BRAN,ABORT_SD ; to insert S error as flag, no return
; ----------------------------------;
-
.IFDEF BOOTLOADER
+; to enable bootstrap: BOOT
+; to disable bootstrap: NOBOOT
+
+; XBOOT [SYSRSTIV|USERSTIV] --
+; here we are after INIT_FORTH
+; performs bootstrap from SD_CARD\BOOT.4th file, ready to test SYSRSTIV|USERSYS value
+XBOOT ; BIT #1,TOS ; USERSYS request ?
+ ; JNZ AbortBoot ;
+ ; CMP #0,TOS ; WARM request ?
+ ; JZ AbortBoot ; if yes
+ BIT.B #CD_SD,&SD_CDIN ; SD_memory in SD_Card socket ?
+ JZ BOOT_YES ; if yes
+AbortBoot MOV #WARM,PC ; goto WARM without return
+; ----------------------------------;
+BOOT_YES CALL &HARD_APP ; CALL HARD_APP (which includes INIT_HARD_SD)
+ MOV #PSTACK-2,PSP ; preserve SYSRSTIV|USERSYS in TOS for BOOT.4TH tests
+ MOV #0,0(PSP) ; set 0 for next SYS use
+ mDOCOL ;
+ .word XSQUOTE ; -- SYSRSTIV|USERSYS addr u
+ .byte 15,"LOAD\34 BOOT.4TH\34" ; LOAD" BOOT.4TH" issues error 2 if no such file...
+; .byte 22,"NOECHO LOAD\34 BOOT.4TH\34" ; LOAD" BOOT.4TH" issues error 2 if no such file...
+ .word BRAN,QUIT4 ; to interpret this string, then loop back to QUIT
+; ----------------------------------;
- FORTHWORD "[PFA]"
-; [PFA] CFA -- [PFA] ; add source indirection to DEFERSTORE
- ADD #2,TOS
- MOV @TOS,TOS
+; ==================================;
+ FORTHWORD "BOOT" ; to enable BOOT
+; ==================================;
+ MOV #XBOOT,&PUCNEXT ; inserts XBOOT in PUC chain.
MOV @IP+,PC
-; to enable bootstrap: ' BOOT IS WARM
-; to disable bootstrap: ' BOOT [PFA] IS WARM
-
- FORTHWORD "BOOT"
-; BOOT RSTIV_MEM --
-; performs bootstrap from SD_CARD\BOOT.4th file
-BOOT MOV @PC+,X
-PFA_BOOT .word INI_HARD_SD ; X = INI_HARD_SD addr, 2(X) = [PFA_X] = previous INI_HARD_APP (INIT_TERM) addr , see forthMSP430FR_SD_INIT.asm
- CMP #2,TOS ; RSTIV_MEM <> WARM ?
- JC QSD_MEM ; yes
- MOV @RSP+,PC ; if RSTIV_MEM U< 2, return to BODYWARM
-QSD_MEM BIT.B #CD_SD,&SD_CDIN ; SD_memory in SD_Card socket ?
- JZ BOOT_YES ;
-NO_BOOT MOV 2(X),PC ; if no, goto previous INIT: INIT TERMINAL then ret to PFAWARM
-;---------------------------------------------------------------------------------
-; RESET 7: if RSTIV_MEM <> WARM, init TERM, init SD
-;---------------------------------------------------------------------------------
-BOOT_YES CALL X ; init TERM UC first then init SD card, TOS = RSTIV_MEM
-;---------------------------------------------------------------------------------
-; END OF RESET
-;---------------------------------------------------------------------------------
- MOV #PSTACK-2,PSP ;
- MOV #0,0(PSP) ; PUSH 0 on Stack
- MOV #0,&STATE ; )
- MOV #LSTACK,&LEAVEPTR ; > same as QUIT
- MOV #RSTACK,RSP ; )
- ASMtoFORTH ;
- .word XSQUOTE ; -- RSTIV_MEM addr u
- .byte 15,"LOAD\34 BOOT.4TH\34" ; LOAD" BOOT.4TH" issues error 2 if no such file...
- .word BRAN,QUIT4 ; to interpret this string
- .ENDIF
+; ==================================;
+ FORTHWORD "NOBOOT" ; to disable BOOT
+; ==================================;
+ MOV #WARM,&PUCNEXT ; removes XBOOT from PUC chain.
+ MOV @IP+,PC ;
+ .ENDIF
;Compute CMD ;
; ----------------------------------;
MOV #1,&SD_CMD_FRM ;3 $(01 00 xx xx xx CMD) set stop bit in CMD frame
- CMP #2,&FATtype ;3 FAT32 ?
- JZ FAT32_CMD ;2 yes
-FAT16_CMD ; FAT16 : CMD17/24 byte address = Sector * BPB_BytsPerSec
- ADD W,W ;1 shift left one Sector
- ADDC.B X,X ;1
- MOV W,&SD_CMD_FRM+2 ;3 $(01 00 ll LL xx CMD)
- MOV.B X,&SD_CMD_FRM+4 ;3 $(01 00 ll LL hh CMD)
- JMP WaitIdleBeforeSendCMD ;
+; CMP #2,&FATtype ;3 FAT32 ?
+; JZ FAT32_CMD ;2 yes
+;FAT16_CMD ; FAT16 : CMD17/24 byte address = Sector * BPB_BytsPerSec
+; ADD W,W ;1 shift left one Sector
+; ADDC.B X,X ;1
+; MOV W,&SD_CMD_FRM+2 ;3 $(01 00 ll LL xx CMD)
+; MOV.B X,&SD_CMD_FRM+4 ;3 $(01 00 ll LL hh CMD)
+; JMP WaitIdleBeforeSendCMD ;
FAT32_CMD ; FAT32 : CMD17/24 sector address
MOV.B W,&SD_CMD_FRM+1 ;3 $(01 ll xx xx xx CMD)
SWPB W ;1
ADD.B #1,W ; expected value = FFh <==> MISO = 1 = SPI idle state
JNZ WaitIdleBeforeSendCMD ; loop back if <> FFh
; ==================================; W = 0 = expected R1 response = ready, for CMD41,CMD16, CMD17, CMD24
-sendCommand ;
+sendCommand ;
; ==================================;
- ; input : SD_CMD_FRM : {CRC,byte_l,byte_L,byte_h,byte_H,CMD}
+ ; input : SD_CMD_FRM : {CRC,byte_l,byte_L,byte_h,byte_H,CMD}
; W = expected return value
; output W is unchanged, flag Z is positionned
; reverts CMD bytes before send : $(CMD hh LL ll 00 CRC)
; ----------------------------------;
Send_CMD_PUT ; performs little endian --> big endian conversion
; ----------------------------------;
- MOV.B SD_CMD_FRM(X),&SD_TXBUF ;5
+ MOV.B SD_CMD_FRM(X),&SD_TXBUF ;5
CMP #0,&SD_BRW ;3 full speed ?
JZ FullSpeedSend ;2 yes
Send_CMD_Loop ; case of low speed during memCardInit
; host must provide height clock cycles to complete operation
; here X=255, so wait for CMD return expected value with PUT FFh 256 times
-; MOV #4,X ; to pass made in PRC SD_Card init
+; MOV #4,X ; to pass made in PRC SD_Card init
; MOV #16,X ; to pass Transcend SD_Card init
; MOV #32,X ; to pass Panasonic SD_Card init
; MOV #64,X ; to pass SanDisk SD_Card init
; ==================================;
SPI_PUT ; PUT(W) X times, output : W = last received byte, X = 0
; ==================================;
- SWPB W ;1
+ SWPB W ;1
MOV.B W,&SD_TXBUF ;3 put W high byte then W low byte and so forth, that performs little to big endian conversion
CMP #0,&SD_BRW ;3 full speed ?
- JZ FullSpeedPut ;2
+ JZ FullSpeedPut ;2
SPI_PUTWAIT BIT #RX_SD,&SD_IFG ;3
JZ SPI_PUTWAIT ;2
CMP.B #0,&SD_RXBUF ;3 reset RX flag
MOV @RSP+,PC ;4
; ----------------------------------;
- ASMWORD "READ_SWX"
+ ASMWORD "R_SECT_WX" ; Read SECTor W=lo, X=Hi
; ==================================;
ReadSectorWX ; SWX read a logical sector
; ==================================;
BIS #1,S ; preset sd_read error
MOV.B #51h,&SD_CMD_FRM+5 ; CMD17 = READ_SINGLE_BLOCK
CALL #RW_Sector_CMD ; which performs logical sector to physical sector then little endian to big endian conversion
- JNE SD_CARD_ERROR ; time out error if R1 <> 0
+ JNE SD_CARD_ERROR ; time out error if R1 <> 0
; ----------------------------------;
-WaitFEhResponse ; wait SD_Card response FEh
+WaitFEhResponse ; wait for SD_Card response = FEh
; ----------------------------------;
CALL #SPI_GET ;
- ADD.B #2,W ;1 FEh expected value
- JZ ReadSectorFirstByte ; 2
+ ADD.B #2,W ;1 W = 0 ?
+ JZ ReadSectorFirstByte ;2 yes
JNZ WaitFEhResponse ;2
; ----------------------------------;
ReadSectorLoop ; get 512+1 bytes, write 512 bytes in SD_BUF
; ----------------------------------;
MOV.B &SD_RXBUF,SD_BUF-1(X) ; 5
-ReadSectorFirstByte ;
+ReadSectorFirstByte ; W=0
MOV.B #-1,&SD_TXBUF ; 3 put FF
NOP ; 1 NOPx adjusted to avoid read SD_error
ADD #1,X ; 1
; ----------------------------------;
BIC #3,S ; reset read and write errors
BIS.B #CS_SD,&SD_CSOUT ; Chip Select high
- MOV @RSP+,PC ;
+ MOV @RSP+,PC ; W = 0
; ----------------------------------;
.IFDEF SD_CARD_READ_WRITE
- ASMWORD "WRITE_SWX"
+ ASMWORD "W_SECT_WX" ; Write SECTor W=lo, X=Hi
; ==================================;
WriteSectorWX ; write a logical sector
; ==================================;
CheckWriteState ;
; ----------------------------------;
BIC.B #0E1h,W ; apply mask for Data response
- CMP.B #4,W ; data accepted
+ SUB.B #4,W ; data accepted
JZ ReadWriteHappyEnd ;
; ----------------------------------;
; SD Error n°
; High byte
; 1 = CMD17 read error
-; 2 = CMD24 write error
+; 2 = CMD24 write error
; 4 = CMD0 time out (GO_IDLE_STATE)
; 8 = ACMD41 time out (APP_SEND_OP_COND)
; $10 = CMD16 time out (SET_BLOCKLEN)
; 7th bit = parameter error
; Data Response Token
-; Every data block written to the card will be acknowledged by a data response token.
+; Every data block written to the card will be acknowledged by a data response token.
; It is one byte long and has the following format:
; %xxxx_sss0 with bits(3-1) = Status
;The meaning of the status bits is defined as follows:
ADD &SD_RXBUF,S ; add SPI(GET) return value as low byte error
SD_CARD_ID_ERROR ; <=== SD_INIT error $20 from forthMSP430FR_SD_INIT.asm
BIS.B #CS_SD,&SD_CSOUT ; Chip Select high
- mDOCOL ;
+; mDOCOL ;
+ mASM2FORTH ;
.word ECHO
.word XSQUOTE ; don't use S register
.byte 11,"< SD Error!" ;
; ----------------------------------;
ABORT_SD ; <=== OPEN file errors from forthMSP430FR_SD_LOAD.asm
; ----------------------------------;
- .word $+2 ;
+ mNEXTADR ;
SUB #2,PSP ;
MOV TOS,0(PSP) ;
- MOV #10h,&BASE ; select hex
+ MOV #10h,&BASEADR ; select hex
MOV S,TOS ;
- ASMtoFORTH ;
+; MOV #TIB_ORG,&CIB_ADR ; restore TIB as Current Input Buffer
+; MOV #BODYACCEPT,&PFAACCEPT ; restore default ACCEPT
+ mASM2FORTH ;
.word UDOT,ABORT_TERM ; no return...
; ----------------------------------;
; -*- coding: utf-8 -*-
; DTCforthMSP430FR5xxxSD_RW.asm
+; and only for FR5xxx and FR6xxx with RTC_B or RTC_C hardware if you want write file with date and time.
+
+; Tested with MSP-EXP430FR5969 launchpad
+; Copyright (C) <2015> <J.M. THOORENS>
+;
+; This program is free software: you can redistribute it and/or modify
+; it under the terms of the GNU General Public License as published by
+; the Free Software Foundation, either version 3 of the License, or
+; (at your option) any later version.
+;
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+; GNU General Public License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+
+
; ======================================================================
; READ" primitive as part of OpenPathName
; input from open: S = OpenError, W = open_type, SectorHL = DIRsectorHL,
; ======================================================================
; ----------------------------------;
-OPEN_QREAD ;
+OPEN_1W ;
CMP #1,W ; open_type = READ" ?
- JNZ OPEN_QWRITE ; no : goto next step
+ JNZ OPEN_2W ; no : goto next step
; ----------------------------------;
OPEN_READ ;
; ----------------------------------;
CMP #0,S ; open file happy end ?
JNZ OPEN_Error ; no
- MOV @IP+,PC ;
+ MOV @IP+,PC ; no more to do
; ----------------------------------;
;Z READ -- f
; sectors are loaded in SD_BUF and BufferLen leave the count of loaded bytes.
; when the last sector of file is loaded in buffer, the handle is automatically closed and flag is true (<>0).
-; ----------------------------------;
+; ==================================;
FORTHWORD "READ" ; -- fl closed flag
-; ----------------------------------;
+; ==================================;
READ
SUB #2,PSP ;
MOV TOS,0(PSP) ;
MOV &CurrentHdl,TOS ;
CALL #Read_File ;SWX
-READ_END
- SUB &CurrentHdl,TOS ; -- fl if fl <>0 (if Z=0) handle is closed
- MOV @IP+,PC ;
+ SUB &CurrentHdl,TOS ; -- fl if fl<>0 (if Z=0) handle is closed
+ MOV @IP+,PC ;
; ----------------------------------;
-;-----------------------------------------------------------------------
-; WRITE" (CREATE part) subroutines
-;-----------------------------------------------------------------------
-
-; parse all FAT sectors until free cluster is found
-; this NewCluster is marked as the end's one (-1)
+; ==================================;
+SaveSectorWtoFATs ;SWXY W = FATsector loaded in SD_buf
+; ==================================;
+ MOV W,Y ; Y = W
+ ADD &OrgFAT1,W ; update FAT#1
+ CALL #WriteFATsectorW ;SWX
+ MOV Y,W ; W = FATsector
+ ADD &OrgFAT2,W ; update FAT#2
+WriteFATsectorW ;
+ MOV #0,X ;
+ MOV #WriteSectorWX,PC ;SWX then RET
+; ----------------------------------;
+; parse all FAT sectors until free cluster is found
+; this New Cluster is marked as the end's one (-1)
-; input : CurFATsector
+; input : W = FATSector, Y = FAToffset
; use SWX registers
-; output: W = new FATsector, SD_BUF = [new FATsector], NewCluster
-; SectorL is unchanged, FATS are not updated.
+; output: updated (ClusterHL, FATsector, W = FATsector), SD_BUF = [new FATsector]
+; SectorHL is unchanged, FATS are updated.
; S = 2 --> Disk FULL error
+; ==================================;
+SearchMarkNewClusterHL ;SWXY <== WRITE_FILE, OPEN_WRITE_CREATE, OPEN_OVERWRITE
+; ==================================;
+ MOV #8,S ; preset disk full return error
+ PUSH W ;3 R-- FATsector
; ----------------------------------;
-SearchNewCluster ; <== CREATE file, WRITE_File
-; ----------------------------------;
- MOV #2,S ; preset disk full return error
- PUSH &CurFATsector ; last known free cluster sector
- MOV &FATtype,Y ;
- ADD Y,Y ; Y = bytes size of Cluster number (2 or 4)
-; ----------------------------------;
-LoadFATsectorInBUF ; <== IncrementFATsector
+LoadFATsectorLoop ;
; ----------------------------------;
- MOV @RSP,W ; W = FATsector
- CMP W,&FATSize ;
- JZ OPW_Error ; FATsector = FATSize ===> abort disk full
- ADD &OrgFAT1,W ;
- MOV #0,X ;
- CALL #ReadSectorWX ;SWX (< 65536)
- MOV #0,X ; init FAToffset
+ MOV @RSP,W ;2
+ CMP W,&FATSize ;3
+ JZ OPWC_DiskFull ;2 FATsector = FATSize ===> abort disk full
+ CALL #ReadFAT1SectorW ;SWX load FAT_buf with (new) FATsector
; ----------------------------------;
-SearchFreeClustInBUF ; <== SearchNextCluster
+SearchFreeClusterLoop ;
; ----------------------------------;
- CMP #2,Y ; FAT16 Cluster size ?
- JZ ClusterLowWordTest ; yes
ClusterHighWordTest ;
- CMP #0,SD_BUF+2(X) ; cluster address hi word = 0 ?
- JNZ SearchNextNewCluster ;
+ CMP #0,SD_BUF+2(Y) ;3 cluster address hi word = 0 ?
+ JNZ SearchNextNewCluster ;2
ClusterLowWordTest ;
- CMP #0,SD_BUF(X) ; Cluster address lo word = 0 ?
- JZ GNC_FreeClusterFound ;
+ CMP #0,SD_BUF(Y) ;3 Cluster address lo word = 0 ?
+ JZ FreeClusterFound ;2
SearchNextNewCluster ;
- ADD Y,X ; increment SD_BUF offset by size of Cluster address
- CMP #BytsPerSec,X ;
- JNE SearchFreeClustInBUF ; loopback while X < BytsPerSec
-IncrementFATsector ;
- ADD #1,0(RSP) ; increment FATsector
- JMP LoadFATsectorInBUF ; loopback
+ ADD #4,Y ;1 increment SD_BUF offset by size of Cluster address
+ CMP #BytsPerSec,Y ;2
+ JNC SearchFreeClusterLoop ;2 18/15~ loopback while X U< BytsPerSec
+IncrementFATsector ;1
+ ADD #1,0(RSP) ;3 increment FATsector
+ MOV #0,Y ; clear FAToffset
+ JMP LoadFATsectorLoop ;5 34/23~ loopback
+; ----------------------------------;
+FreeClusterFound ; X = cluster number low word in SD_BUF = FAToffset
; ----------------------------------;
-GNC_FreeClusterFound ; Y = cluster number low word in SD_BUF = FATsector
+ MOV @RSP,&LastFATsector ;
+ MOV Y,&LastFAToffset ;
; ----------------------------------;
MOV #0,S ; clear error
+ MOV #-1,SD_BUF(Y) ; mark New Cluster low word as end cluster (0xFFFF) in SD_BUF
MOV.B @RSP,W ; W = 0:FATsectorLo
- MOV #-1,SD_BUF(X) ; mark NewCluster low word as end cluster (0xFFFF) in SD_BUF
- CMP #2,Y ; Y = FAT16 size of Cluster number ?
- JZ FAT16EntryToClusterNum ; yes
- MOV #0FFFh,SD_BUF+2(X) ; no: mark NewCluster high word as end cluster (0x0FFF) in SD_BUF
+ MOV #0FFFh,SD_BUF+2(Y) ; mark New Cluster high word as end cluster (0x0FFF) in SD_BUF
; ----------------------------------;
-FAT32EntryToClusterNum ; convert FAT32 cluster address to cluster number
+FAT32ClustAdrToClustNum ; convert FAT32 cluster address to cluster number (CluNum = CluAddr / 4)
; ----------------------------------;
- RRA X ; X = FATOffset>>1, FAToffset is byte size
+ RRA Y ; Y = FATOffset>>1, (bytes to words conversion)
SWPB W ; W = FATsectorLo:0
- ADD W,X ; X = FATsectorLo:FATOffset>>1
+ ADD W,Y ; Y = FATsectorLo:FATOffset>>1
MOV.B 1(RSP),W ; W = FATsectorHi
RRA W ; W = FATsectorHi>>1
- RRC X ; X = (FATsectorLo:FAToffset>>1)>>1 = FATsectorLo>>1:FAToffset>>2
- MOV W,&NewClusterH ; NewClusterH = FATsectorHi>>1
- MOV X,&NewClusterL ; NewClusterL = FATsectorLo>>1:FAToffset>>2
- JMP SearchNewClusterEnd ; max cluster = 7FFFFF ==> 1FFFFFFF sectors ==> 256 GB
+ RRC Y ; Y = (FATsectorLo:FAToffset>>1)>>1 = FATsectorLo>>1:FAToffset>>2
+ MOV W,&ClusterH ; ClusterH = FATsectorHi>>1
+ MOV Y,&ClusterL ; ClusterL = FATsectorLo>>1:FAToffset>>2
+; ----------------------------------;
+ MOV @RSP,W ; W = FATsector of new cluster
+ CALL #SaveSectorWtoFATs ;SWXY W = FATsector loaded in SD_buf
+ MOV @RSP+,W ; W = FATsector of New Cluster
+ MOV @RSP+,PC ; RET
+; ----------------------------------;
+
+
+; ==================================;
+FreeAllClusters ;SWXY input: HDLL_FirstClus(T), output:
+; ==================================;FATs are updated
+ MOV HDLL_FirstClus(T),ClusterL ;
+ MOV HDLH_FirstClus(T),ClusterH ;
+ CALL #ClusterHLtoFAT1sectWofstY ;WXY output: W = FATsector, Y=FAToffset
+ MOV W,&LastFATsector ;
+ MOV Y,&LastFAToffset ;
+ PUSH W ; R-- FATsector ptr
+; ----------------------------------;
+LoadFAT1sectorWloop ;
+; ----------------------------------;
+ CALL #ReadFAT1SectorW ;SWX
+; ----------------------------------;
+GetAndFreeCluster ;
+; ----------------------------------;
+ MOV SD_BUF(Y),W ; get [clusterLO]
+ MOV #0,SD_BUF(Y) ; free CLusterLO
+GetAndFreeClusterHi ;
+ MOV SD_BUF+2(Y),X ; get [clusterHI]
+ MOV #0,SD_BUF+2(Y) ; free CLusterHI
+ClusterHiTest
+ AND #00FFFh,X ; select 12 bits significant
+ CMP #00FFFh,X ; [ClusterHI] was = 0FFFh?
+ JNE SearchNextCluster2free ; no
+ClusterLoTest ;
+ CMP #-1,W ; [ClusterLO] was = FFFFh? last cluster used for this file
+ JZ EndOfFileCluster ; yes
; ----------------------------------;
-FAT16EntryToClusterNum ; convert FAT16 address of Cluster in cluster number
+SearchNextCluster2free ;
; ----------------------------------;
- RRA X ; X = Offset>>1, offset is word < 256
- MOV.B X,&NewClusterL ; X = NewCluster numberLO (byte)
- MOV.B W,&NewClusterL+1 ; W = NewCluster numberHI (byte)
- MOV #0,&NewClusterH ;
+ MOV W,&ClusterL ;
+ MOV X,&ClusterH ;
+ CALL #ClusterHLtoFAT1sectWofstY ;WXY W = new FATsector, new FAToffset
+ CMP @RSP,W ; new FATsector = FATsector ptr ?
+ JZ GetAndFreeCluster ; yes loop back
+ MOV W,X ; no: swap previous new FATsectors:
+ MOV @RSP,W ; W = previous FATsector
+ MOV X,0(RSP) ; R-- new FATsector
+ CALL #SaveSectorWtoFATs ;SWXY update FATs from SD_BUF to W = previous FATsector
+ MOV @RSP,W ; W = new FATsector
+ JMP LoadFAT1sectorWloop ; loop back with W = new FATsector, new FAToffset
+; ----------------------------------;
+EndOfFileCluster ;
; ----------------------------------;
-SearchNewClusterEnd ;
+ MOV @RSP+,W ;
+ MOV #SaveSectorWtoFATs,PC ; update FATs
; ----------------------------------;
- MOV @RSP+,W ; W = FATsector
- MOV W,&CurFATsector ; refresh CurrentFATsector
- MOV @RSP+,PC ;
+
+; this subroutine is called by Write_File (bufferPtr=512) and CloseHandle (0 =< BufferPtr =< 512)
+; ==================================;
+WriteSD_Buf ;SWX input: T = CurrentHDL
+; ==================================;
+ ADD &BufferPtr,HDLL_CurSize(T) ; update handle CurrentSizeL
+ ADDC #0,HDLH_CurSize(T) ;
+; ==================================;
+WriteSectorHL ;SWX
+; ==================================;
+ MOV &SectorL,W ; Low
+ MOV &SectorH,X ; High
+ MOV #WriteSectorWX,PC ; ...then RET
; ----------------------------------;
-; update FATs with SD_BUF content.
-; input : FATsector, FAToffset, SD_BUF = [FATsector]
-; use : SWX registers
-; ----------------------------------; else update FATsector of the old cluster
-UpdateFATsSectorW ;
+; ======================================================================
+; DEL" primitive as part of OpenPathName
+; All "DEL"eted clusters are freed
+; input from open: S = OpenError, W = open_type, SectorHL = DIRsectorHL,
+; Buffer = [DIRsector], ClusterHL = FirstClusterHL
+; from open(GetFreeHandle): Y = DIRentry, T = CurrentHdl
+; output: nothing (no message if open error)
+; ======================================================================
+OPEN_2W ;
+ CMP #2,W ; open_type = DEL ?
+ JNZ OPEN_4W ; no : goto next step
; ----------------------------------;
- PUSH W ;
- ADD &OrgFAT1,W ; update FAT#1
- MOV #0,X ;
- CALL #WriteSectorWX ; write a logical sector
- MOV @RSP+,W ;
- ADD &OrgFAT2,W ; update FAT#2
- MOV #0,X ;
- CALL #WriteSectorWX ; write a logical sector
+; 1- open file ; done
+; ----------------------------------;
+ CMP #0,S ; open file happy end ?
+ JNE DEL_END ; no: don't send message, don't abort
+; ----------------------------------;
+; 2- Delete DIR entry ;
+; ----------------------------------;
+ MOV.B #0E5h,SD_BUF(Y) ;
+ CALL #WriteSectorHL ;SWX write SectorHL=DIRsector
+; ----------------------------------;
+; 3- free all file clusters ;
+; ----------------------------------;
+ CALL #FreeAllClusters ;SWXY input: HDLL_FirstClus(T), output: FATS are updated
+; ----------------------------------;
+; 4- Close Handle ;
+; ----------------------------------;
+ CALL #CloseHandle ;
; ----------------------------------;
+DEL_END ;
+ MOV @IP+,PC ;4
+; ----------------------------------;
+
+;-----------------------------------------------------------------------
+; WRITE" (CREATE part) subroutines
+;-----------------------------------------------------------------------
; modified time : ofsset 16h = 0bhhhhhmmmmmmsssss, with : s=seconds*2, m=minutes, h=hours
; dates : offset 10, 12, 18 = 0byyyyyyymmmmddddd, with : y=year-1980, m=month, d=day
-; ----------------------------------; input:
-GetYMDHMSforDIR ;X=date, W=TIME
-; ----------------------------------;
+; ==================================;
+GetYMDHMSforDIR ; output: X=date, W=TIME
+; ==================================;
.IFDEF LF_XTAL ;
.IFNDEF RTC ; RTC_B or RTC_C select
; ----------------------------------;
MOV #512,&OP2 ;
ADD &RES0,X ;
.ELSEIF
- MOV #0,X ; X=DATE
+ MOV #0,X ; X=DATE
MOV #0,W ; W=TIME
.ENDIF
.ENDIF
SD_RW_RET ;
- MOV @RSP+,PC ;
+ MOV @RSP+,PC ;
; ----------------------------------;
ForbiddenChars ; 15 forbidden chars table + dot char
.byte '"','*','+',',','/',':',';','<','=','>','?','[','\\',']','|','.'
-; ----------------------------------;
+; ==================================;
OPWC_SkipDot ;
-; ----------------------------------;
+; ==================================;
CMP #4,X ;
- JL FillDIRentryName ; X < 4 : no need spaces to complete name entry
+ JNC FillDIRentryName ; X U< 4 : no need spaces to complete name entry
SUB #3,X ;
- CALL #OPWC_CompleteWithSpaces; complete name entry
- MOV #3,X ;
-; ----------------------------------;
-
-; ----------------------------------;
+ CALL #OPWC_CompleteWithSpaces; complete name entry
+ MOV #3,X ;
+; ==================================;
FillDIRentryName ;SWXY use
-; ----------------------------------;
+; ==================================;
MOV.B @T+,W ; W = char of pathname
MOV.B W,SD_BUF(Y) ; to DIRentry
; CMP #0,W ; end of stringZ ?
; JZ OPWC_CompleteWithSpaces ;
- CMP T,&EndOfPath ; EOS < PTR ?
+ CMP T,&PathName_END ; EOS < PTR ?
JNC OPWC_CompleteWithSpaces ; yes
; ----------------------------------;
SkipForbiddenChars ;
; ----------------------------------;
OPWC_CompleteWithSpaces ; 0 to n spaces !
; ----------------------------------;
- CMP #0,X ;
+ CMP #0,X ;
JZ OPWC_CWS_End ;
; ----------------------------------;
OPWC_CompleteWithSpaceloop ;
; ----------------------------------;
MOV.B #' ',SD_BUF(Y) ; remplace dot by char space
- ADD #1,Y ; increment DIRentry ptr in buffer
+ ADD #1,Y ; increment DIRentry ptr in buffer
SUB #1,X ; dec countdown of chars space
JNZ OPWC_CompleteWithSpaceloop ;
OPWC_CWS_End ;
- MOV @RSP+,PC ;
+ MOV @RSP+,PC ;
; ----------------------------------;
+; ==================================;
+LoadUpdateSaveDirEntry ;SWXY
+; ==================================;
+ MOV HDLL_DIRsect(T),W ;
+ MOV HDLH_DIRsect(T),X ;
+ CALL #readSectorWX ;SWX SD_buffer = DIRsector
+ MOV HDLW_DIRofst(T),Y ; Y = DirEntryOffset
+ CALL #GetYMDHMSforDIR ; X=DATE, W=TIME
+ MOV X,SD_BUF+18(Y) ; access date
+ MOV W,SD_BUF+22(Y) ; modified time
+ MOV X,SD_BUF+24(Y) ; modified date
+ MOV HDLL_CurSize(T),SD_BUF+28(Y); save new filesize
+ MOV HDLH_CurSize(T),SD_BUF+30(Y);
+ MOV HDLL_DIRsect(T),W ;
+ MOV HDLH_DIRsect(T),X ;
+ MOV #WriteSectorWX,PC ;SWX then RET
+; ----------------------------------;
+;-----------------------------------------------------------------------
+; WRITE" subroutines
+;-----------------------------------------------------------------------
+
+
+; write sequentially the buffer in the post incremented SectorHL.
+; The first time, SectorHL is initialized by WRITE".
+; All used registers must be initialized.
+; ==================================;
+Write_File ;STWXY <== WRITE, SD_EMIT, TERM2SD"
+; ==================================;
+ MOV #BytsPerSec,&BufferPtr ; write always all the buffer
+ MOV &CurrentHdl,T ;
+ CALL #WriteSD_Buf ;SWX write SD_BUF and update Handle informations only for DIRentry update
+ MOV #0,&BufferPtr ; reset buffer pointer
+; ----------------------------------;
+PostIncrementSector ;
+; ----------------------------------;
+ ADD.B #1,HDLB_ClustOfst(T) ; increment current Cluster offset
+ CMP.B &SecPerClus,HDLB_ClustOfst(T) ; out of bound ?
+ JNC Write_File_End ; no,
+; ----------------------------------;
+ CALL #HDLcurClus2FATsecWofstY;WXY Output: FATsector W=FATsector, Y=FAToffset
+ PUSH Y ; push previous FAToffset
+ PUSH W ; push previous FATsector
+; ----------------------------------;
+GetNewCluster ; input : T=CurrentHdl
+; ----------------------------------;
+ CALL #SearchMarkNewClusterHL ;SWXY input: W = FATsector Y = FAToffset, output: ClusterHL, W = FATsector of New cluster
+ CMP @RSP,W ; previous and new clusters are in same FATsector?
+ JZ LinkClusters ; yes
+; ----------------------------------;
+UpdateNewClusterFATs ;
+; ----------------------------------;
+; CALL #SaveSectorWtoFATs ;SWXY no: already done by SearchMarkNewClusterHL
+ MOV @RSP,W ; W = previous FATsector
+ CALL #ReadFAT1SectorW ;SWX reload previous FATsector in buffer to link clusters
+; ----------------------------------;
+LinkClusters ;
+; ----------------------------------;
+ MOV @RSP+,W ; W = previous FATsector
+ MOV @RSP+,Y ; Y = previous FAToffset
+ MOV &ClusterL,SD_BUF(Y) ; store new cluster to current cluster address in previous FATsector buffer
+ MOV &ClusterH,SD_BUF+2(Y) ;
+ CALL #SaveSectorWtoFATs ;SWXY update FATs from SD_BUF to W = previous FATsector
+; ==================================;
+HDLSetCurClustSetFrstSect ;
+; ==================================;
+ MOV #4,HDLB_Token(T) ; and clear ClustOfst
+; ==================================;
+HDLSetCurClustSetCurSect ;
+; ==================================;
+ MOV &ClusterL,HDLL_CurClust(T) ; update handle with new cluster
+ MOV &ClusterH,HDLH_CurClust(T) ;
+Write_File_End
+ MOV #ClusterHL2sectorHL,PC ;W set current SectorHL to be written then RET
+; ----------------------------------;
+
+;Z WRITE --
+; sequentially write the entire SD_BUF in a file opened by WRITE"
+; ==================================;
+ FORTHWORD "WRITE" ; in assembly : CALL #WRITE,X CALL 2(X)
+; ==================================;
+ CALL #Write_File ;STWXY
+ MOV @IP+,PC ;
+; ----------------------------------;
; ======================================================================
; WRITE" primitive as part of OpenPathName
; input from open: S = OpenError, W = open_type, SectorHL = DIRsectorHL,
; Buffer = [DIRsector], ClusterHL = FirstClusterHL
; from open(GetFreeHandle): Y = DIRentry, T = CurrentHdl
-; output: nothing else abort on error
-; error 1 : PathNameNotFound
-; error 2 : NoSuchFile
-; error 4 : DirectoryFull
-; error 8 : AlreadyOpen
-; error 16 : NomoreHandle
+; output: Current Sector is set else abort on WRITE error
+; error 4 : InvalidPathname
+; error 8 : DiskFull
; ======================================================================
-
-; ----------------------------------;
-OPEN_QWRITE ;
- CMP #2,W ; open_type = WRITE" ?
- JNZ OPEN_QDEL ; no : goto next step
+OPEN_4W ;
+ CMP #4,W ; open_type = WRITE" ?
+ JNZ OPEN_8W ; no : goto next step
; ----------------------------------;
; 1 try to open ; done
; ----------------------------------;
; 2 select error "no such file" ;
; ----------------------------------;
CMP #2,S ; "no such file" error ?
- JZ OPEN_WRITE_CREATE ; yes
- CMP #0,S ; no open file error ?
- JZ OPEN_WRITE_APPEND ; yes
+ JZ OPEN_WRITE_CREATE ; yes, Handle is to be created !
+ CMP #0,S ; well opened file ?
+ JZ OPEN_OVERWRITE ; yes
; ----------------------------------;
-; Write errors ;
+OPWC_Write_Errors ;
; ----------------------------------;
-OPWC_InvalidPathname ; S = 1
-OPWC_DiskFull ; S = 2
-OPWC_DirectoryFull ; S = 4
-OPWC_AlreadyOpen ; S = 8
-OPWC_NomoreHandle ; S = 16
+OPWC_InvalidPathname ; S = 4
+OPWC_DiskFull ; S = 8
; ----------------------------------;
OPW_Error ; set ECHO, type Pathname, type #error, type "< WriteError"; no return
mDOCOL ;
.word BRAN,ABORT_SD ; to insert S error as flag, no return
; ----------------------------------;
-
; ======================================================================
-; WRITE" (CREATE part) primitive as part of OpenPathName
-; input from open: S = NoSuchFile, W = open_type, SectorHL = DIRsectorHL,
-; Buffer = [DIRsector], ClusterHL = FirstClusterHL
-; output: nothing else abort on error:
-; error 1 : InvalidPathname
-; error 2 : DiskFull
-; error 4 : DirectoryFull
-; error 8 : AlreadyOpen
-; error 16 : NomoreHandle
+; WRITE" primitive as part of OpenPathName
+; All "DEL"eted clusters are freed
+; input from open: W = open_type, SectorHL = DIRsectorHL,
+; Buffer = [DIRsector], ClusterHL = FirstCluster
+; from open(GetFreeHandle): Y = DIRentry, T = CurrentHdl,
+; output: nothing (no message if open error)
; ======================================================================
+
+; ==================================;
+OPEN_WRITE_CREATE ; a new Handle is to be created
+; ==================================;
+; 1- open file ; done
; ----------------------------------;
-OPEN_WRITE_CREATE ;
-; ----------------------------------;
-; 3 get free cluster ;
-; ----------------------------------; input: FATsector
- CALL #SearchNewCluster ;SWXY output: W = new FATsector loaded in buffer,NewCluster
- MOV &NewClusterL,&ClusterL ;
- MOV &NewClusterH,&ClusterH ;
- CALL #UpdateFATsSectorW ;SWX update FATs with buffer
+; 2 get free cluster ;
; ----------------------------------;
- CALL #ReadSector ; reload DIRsector
- MOV &EntryOfst,Y ; reload entry offset (first free entry in DIR)
+ MOV #0,W ; init FATsector = 0, search new cluster
+ MOV #0,Y ; init FAToffset
+ CALL #SearchMarkNewClusterHL ;WXY output: updated (ClusterHL, FATsector, W = FATsector), SD_BUF = [new FATsector]
; ----------------------------------;
-; 4 init DIRentryAttributes ;
+; 3 init DIRentryAttributes ;
; ----------------------------------;
-OPWC_SetEntryAttribute ; (cluster=DIRcluster!)
+ CALL #ReadSectorHL ; reload DIRsector
+ MOV &DIREntryOfst,Y ; Y = entry offset (first free entry in DIR)
MOV.B #20h,SD_BUF+11(Y) ; file attribute = file
CALL #GetYMDHMSforDIR ;WX X=DATE, W=TIME
MOV #0,SD_BUF+12(Y) ; nt reserved = 0 and centiseconds are 0
MOV W,SD_BUF+14(Y) ; time of creation
MOV X,SD_BUF+16(Y) ; date of creation 20/08/2001
- MOV X,SD_BUF+18(Y) ; date of access 20/08/2001
- MOV &ClusterH,SD_BUF+20(Y) ; as first Cluster Hi
- MOV &ClusterL,SD_BUF+26(Y) ; as first cluster LO
- MOV #0,SD_BUF+28(Y) ; file lenghtLO = 0
- MOV #0,SD_BUF+30(Y) ; file lenghtHI = 0
-; ----------------------------------;
-; 5 create DIRentryName ;
-; ----------------------------------;
- MOV #1,S ; preset pathname error
- MOV &Pathname,T ; here, pathname is "xxxxxxxx.yyy" format
-; CMP.B #0,0(T) ; forbidden null string
- CMP T,&EndOfPath ;
- JZ OPWC_InvalidPathname ; write error 1
+; MOV X,SD_BUF+18(Y) ; date of access 20/08/2001
+ MOV &ClusterH,SD_BUF+20(Y) ; as first Cluster Hi
+ MOV &ClusterL,SD_BUF+26(Y) ; as first cluster LO
+ MOV #0,SD_BUF+28(Y) ; set file_sizeLO = 0
+ MOV #0,SD_BUF+30(Y) ; set file_sizeHI = 0
+; ----------------------------------;
+; 4 create DIRentryName ; file name format "xxxxxxxx.yyy"
+; ----------------------------------;
+ MOV #4,S ; preset pathname error
+ MOV &PathName_PTR,T ; here, PathName_PTR is set to file name
+ CMP T,&PathName_END ; end of string reached ?
+ JZ OPWC_InvalidPathname ; yes write error 1
CMP.B #'.',0(T) ; forbidden "." in first
JZ OPWC_InvalidPathname ; write error 1
MOV #11,X ; X=countdown of chars entry
CALL #FillDIRentryName ;STWXY
; ----------------------------------;
-; 6 save DIRsector ;
+; 5 update DIRsector ;
; ----------------------------------;
- CALL #WriteSector ;SWX update DIRsector
+ CALL #WriteSectorHL ;SWX update DIRsector
; ----------------------------------;
; 7 Get free handle ;
; ----------------------------------;
- MOV #2,W ;
- CALL #GetFreeHandle ; output : S = handle error, CurCluster and CurSector are set
-; ----------------------------------;
- CMP #0,S ; no error ?
- JNZ OPWC_NomoreHandle ; ==> abort with error 16
- MOV @IP+,PC ; --
-; ----------------------------------;
-
-;-----------------------------------------------------------------------
-; WRITE" subroutines
-;-----------------------------------------------------------------------
-
-; SectorL is unchanged
-; ----------------------------------;
-OPWW_UpdateDirectory ; <== CloseHandleT
-; ----------------------------------; Input : current Handle
- MOV HDLL_DIRsect(T),W ;
- MOV HDLH_DIRsect(T),X ;
- CALL #readSectorWX ;SWX buffer = DIRsector
- CALL #GetYMDHMSforDIR ; X=DATE, W=TIME
- MOV HDLW_DIRofst(T),Y ; Y = DirEntryOffset
- MOV X,SD_BUF+18(Y) ; access date
- MOV W,SD_BUF+22(Y) ; modified time
- MOV X,SD_BUF+24(Y) ; modified date
-OPWW_UpdateEntryFileSize ;
- MOV HDLL_CurSize(T),SD_BUF+28(Y); save new filesize
- MOV HDLH_CurSize(T),SD_BUF+30(Y);
- MOV HDLL_DIRsect(T),W ;
- MOV HDLH_DIRsect(T),X ;
- MOV #WriteSectorWX,PC ;SWX then RET
-; ----------------------------------;
-
-; this subroutine is called by Write_File (bufferPtr=512) and CloseHandleT (0 =< BufferPtr =< 512)
-; ==================================;
-WriteBuffer ;STWXY input: T = CurrentHDL
-; ==================================;
- ADD &BufferPtr,HDLL_CurSize(T) ; update handle CurrentSizeL
- ADDC #0,HDLH_CurSize(T) ;
-; ==================================;
-WriteSector ;SWX
-; ==================================;
- MOV &SectorL,W ; Low
- MOV &SectorH,X ; High
- MOV #WriteSectorWX,PC ; ...then RET
+ MOV #4,W ; get handle for write
+ CALL #GetFreeHandle ; output : CurCluster and CurSector are set
+ MOV @IP+,PC ; --
; ----------------------------------;
-
-
-; write sequentially the buffer in the post incremented SectorHL.
-; The first time, SectorHL is initialized by WRITE".
-; All used registers must be initialized.
; ==================================;
-Write_File ; <== WRITE, SD_EMIT, TERM2SD"
+OPEN_OVERWRITE ; handle exists
; ==================================;
- MOV #BytsPerSec,&BufferPtr ; write always all the buffer
- MOV &CurrentHdl,T ;
- CALL #WriteBuffer ; write SD_BUF and update Handle informations only for DIRentry update
- MOV #0,&BufferPtr ; reset buffer pointer
-; ----------------------------------;
-PostIncrementSector ;
-; ----------------------------------;
- ADD.B #1,HDLB_ClustOfst(T) ; increment current Cluster offset
- CMP.B &SecPerClus,HDLB_ClustOfst(T) ; out of bound ?
- JNZ Write_File_End ; no,
-; ----------------------------------;
-GetNewCluster ; input : T=CurrentHdl
-; ----------------------------------;
- MOV.B #0,HDLB_ClustOfst(T) ; reset handle ClusterOffset
- CALL #HDLCurClusToFAT1sectWofstY;WXY Output: W=FATsector, Y=FAToffset, Cluster=HDL_CurCluster
- PUSH Y ; push current FAToffset
- PUSH W ; push current FATsector
- CALL #SearchNewCluster ;SWXY output: W = new FATsector loaded in buffer, NewCluster
- CMP @RSP,W ; current and new clusters are in same FATsector?
- JZ LinkClusters ; yes
-UpdateNewClusterFATs ;
- CALL #UpdateFATsSectorW ;SWX no: UpdateFATsSectorW with buffer of new FATsector
- MOV @RSP,W ; W = current FATsector
- ADD &OrgFAT1,W ;
- MOV #0,X ;
- CALL #ReadSectorWX ;SWX (< 65536)
-LinkClusters ;
- MOV @RSP+,W ; W = current FATsector
- MOV @RSP+,Y ; pop current FAToffset
- MOV &NewClusterL,SD_BUF(Y) ; store new cluster to current cluster address in current FATsector buffer
- CMP #1,&FATtype ; FAT16?
- JZ UpdatePreviousClusterFATs ; yes
- MOV &NewClusterH,SD_BUF+2(Y);
-UpdatePreviousClusterFATs ;
- CALL #UpdateFATsSectorW ;SWX update FATS with current FATsector buffer
-UpdateHandleCurCluster ;
- MOV &NewClusterL,HDLL_CurClust(T) ; update handle with new cluster
- MOV &NewClusterH,HDLH_CurClust(T) ;
-; CALL #ComputeHDLcurrentSector ; set Cluster first Sector as next Sector to be written
-; MOV #OPWW_UpdateDirectory,PC ; update DIRentry to avoid cluster lost, then RET
-Write_File_End
- MOV #ComputeHDLcurrentSector,PC ; set current Cluster Sector as next Sector to be written then RET
-; ----------------------------------;
-
-;Z WRITE --
-; sequentially write the entire SD_BUF in a file opened by WRITE"
+; free all file clusters ;
; ----------------------------------;
- FORTHWORD "WRITE" ; in assembly : CALL &WRITE+2
-; ----------------------------------;
- CALL #Write_File ;
- MOV @IP+,PC ;
+ CALL #FreeAllClusters ;SWXY input: HDLL_FirstClus(T), output: FATS are updated
+ MOV #0,HDLL_CurSize(T) ; clear currentSize
+ MOV #0,HDLH_CurSize(T) ;
+ MOV HDLL_FirstClus(T),ClusterL ; Set ClusterHL
+ MOV HDLH_FirstClus(T),ClusterH ;
+ CALL #ClusterHLtoFAT1sectWofstY ;WXY output: W = FATsector, Y=FAToffset
+ CALL #SearchMarkNewClusterHL ;SWXY input: W = FATsector, Y = FAToffset output: ClusterHL, W = updated new FATsector loaded in SD_BUF
+ CALL #HDLSetCurClustSetFrstSect ;
+ MOV @IP+,PC ; --
; ----------------------------------;
; ======================================================================
-; WRITE" (APPEND part) primitive as part of OpenPathName
-; input from open: S = OpenError, W = open_type, SectorHL = DIRsectorHL,
+; APPEND" primitive as part of OpenPathName
+; input from open: SectorHL = DIRsectorHL,
; Buffer = [DIRsector], ClusterHL = FirstClusterHL
; from open(GetFreeHandle): Y = DIRentry, T = CurrentHdl
; output: nothing else abort on error
-; error 2 : DiskFull
+; error 2 : DiskFull
; ======================================================================
-
-; ----------------------------------;
-OPEN_WRITE_APPEND ;
-; ----------------------------------;
+OPEN_8W ;
+ CMP #2,S ; "no such file" error ?
+ JZ OPEN_WRITE_CREATE ; yes
+ CMP #0,S ; well opened file ?
+ JNZ OPWC_Write_Errors ; no
+; ==================================;
+OPEN_WRITE_APPEND ; yes
+; ==================================;
; 1- open file ; done
; ----------------------------------;
-; 2- compute missing Handle infos ;
+ MOV.B #4,HDLB_Token(T) ; update HDLB_Token(T)
; ----------------------------------;
; 2.1- Compute Sectors count ; Sectors = HDLL_CurSize/512
; ----------------------------------;
- MOV.B HDLL_CurSize+1(T),Y ;Y = 0:CurSizeLOHi
- MOV.B HDLH_CurSize(T),X ;X = 0:CurSizeHILo
- SWPB X ;X = CurSizeHIlo:0
+ MOV.B HDLL_CurSize+1(T),Y ;Y = 0:CurSizeLOHi (bytes)
+ MOV.B HDLH_CurSize(T),X ;X = 0:CurSizeHILo
+ SWPB X ;X = CurSizeHIlo:0
ADD Y,X ;X = CurSizeHIlo:CurSizeLOhi
- MOV.B HDLH_CurSize+1(T),Y ;Y:X = CurSize / 256
+ MOV.B HDLH_CurSize+1(T),Y ;Y:X = CurSize / 256 (bytes)
; ----------------------------------;
; 2.2 Compute Clusters Count ;
; ----------------------------------;
SUB #1,S ;1 CNT-1
JGE DIVSECPERSPC2 ;2 4~ loopback Wlo = OFFSET, X = CLU_LO, Y = CLU_HI
; ----------------------------------;
- MOV &CurrentHDL,T ;3 reload Handle ptr
-; ----------------------------------;
-; 2.3- Compute last Cluster ; X = Clusters numberLO, Y = Clusters numberHI
+; 2.3- Compute Current Cluster ; X = ClusterCountLO, Y = ClusterCountHI
; ----------------------------------;
+ MOV &CurrentHDL,T ;3 reload Handle ptr
ADD HDLL_FirstClus(T),X ;
ADDC HDLH_FirstClus(T),Y ;
MOV X,HDLL_CurClust(T) ; update handle
MOV Y,HDLH_CurClust(T) ;
; ----------------------------------;
-; 2.4- Compute Sectors offset ;
+; 2.4- load current sectorHL ;
; ----------------------------------;
- MOV.B W,HDLB_ClustOfst(T) ;3 update handle with W = REMlo = sectors offset in last cluster
+ MOV.B W,HDLB_ClustOfst(T) ;3 update handle with W = REM8 = sectors offset in last cluster
+ CALL #LoadCurSectorHL ;SWX in SD_buf
; ----------------------------------;
-; 3- load last sector in SD_BUF ;
+; 2.5- Compute SD_Buf ptr ;
; ----------------------------------;
- MOV HDLL_CurSize(T),W ; example : W = 1013
- BIC #01FFh,HDLL_CurSize(T) ; substract 13 from HDLL_CurSize, because loaded in buffer
- AND #01FFh,W ; W = 13
- MOV W,&BufferPtr ; init Buffer Pointer with 13
- CALL #LoadHDLcurrentSector ;SWX
- MOV @IP+,PC ; BufferPtr = first free byte offset
+ MOV HDLL_CurSize(T),W ; example : W = $A313 bytes
+ BIC #01FFh,HDLL_CurSize(T) ; HDLL_CurSize = $A200 bytes
+ AND #01FFh,W ; remainder W = $0113 bytes
+ MOV W,&BufferPtr ; init Buffer Pointer with $0113
; ----------------------------------;
-
-
-; ======================================================================
-; DEL" primitive as part of OpenPathName
-; All "DEL"eted clusters are freed
-; If next DIRentry in same sector is free, DIRentry is freed, else hidden.
-; input from open: S = OpenError, W = open_type, SectorHL = DIRsectorHL,
-; Buffer = [DIRsector], ClusterHL = FirstClusterHL
-; from open(GetFreeHandle): Y = DIRentry, T = CurrentHdl
-; output: nothing (no message if open error)
-; ======================================================================
-
-
-OPEN_QDEL ;
-; CMP #4,W ; open_type = DEL"
-; JNZ OPEN_8W ;
-; ----------------------------------;
-OPEN_DEL ;
-; ----------------------------------;
-; 1- open file ; done
-; ----------------------------------;
- CMP #0,S ; open file happy end ?
- JNE DEL_END ; no: don't send message
-; ----------------------------------;
-; 2- Delete DIR entry ; "delete" entry with 00h if next entry in same DIRsector is free, else "hide" entry with 05Eh
-; ----------------------------------;
-SelectFreeEntry ; nothing to do: S = 0 ready for free entry!
-; ----------------------------------;
- CMP #BytsPerSec-32,Y ; Entry >= last entry in DIRsector ?
- JC SelectHideEntry ; yes: next DIR entry is out of sector
- CMP.B #0,SD_BUF+32(Y) ; no: next DIR entry in DIRsector is free?
- JZ WriteDelEntry ; yes
-; ----------------------------------;
-SelectHideEntry ; no
-; ----------------------------------;
- MOV.B #0E5h,S ;
-; ----------------------------------;
-WriteDelEntry
-; ----------------------------------;
- MOV.B S,SD_BUF(Y) ;
- CALL #WriteSector ;SWX write SectorHL=DIRsector
-; ----------------------------------;
-; 3- free all file clusters ; Cluster = FirstCluster
-; ----------------------------------;
-ComputeClusterSectWofstY ;
- CALL #ClusterToFAT1sectWofstY;WXY W = FATsector, Y=FAToffset
- MOV W,&CurFATsector ; update CurrentFATsector
-; ----------------------------------;
-LoadFAT1sector
-; ----------------------------------;
- MOV W,T ; T = W = current FATsector memory
- ADD &OrgFAT1,W ;
- MOV #0,X ;
- CALL #ReadSectorWX ;SWX (< 65536)
-; ----------------------------------;
-GetAndFreeClusterLo ;
-; ----------------------------------;
- MOV SD_BUF(Y),W ; get [clusterLO]
- MOV #0,SD_BUF(Y) ; free CLusterLO
-ClusterTestSelect ;
- CMP #1,&FATtype ; FAT16 ?
- JZ ClusterLoTest ; yes
-GetAndFreeClusterHi ;
- MOV SD_BUF+2(Y),X ; get [clusterHI]
- MOV #0,SD_BUF+2(Y) ; free CLusterHI
-ClusterHiTest
- AND #00FFFh,X ; select 12 bits significant
- CMP #00FFFh,X ; [ClusterHI] was = 0FFFh?
- JNE SearchNextCluster2free ; no
-ClusterLoTest
- CMP #-1,W ; [ClusterLO] was = FFFFh?
- JZ EndOfFileClusters ; yes
-; ----------------------------------;
-SearchNextCluster2free
-; ----------------------------------;
- MOV W,&ClusterL ;
- MOV X,&ClusterH ;
- CALL #ClusterToFAT1sectWofstY;WXY
- CMP W,T ; new FATsector = current FATsector memory ?
- JZ GetAndFreeClusterLo ; yes loop back
- PUSH W ; no: save new FATsector...
- MOV T,W ; ...before update current FATsector
- CALL #UpdateFATsSectorW ;SWX
- MOV @RSP+,W ; restore new current FATsector
- JMP LoadFAT1sector ; loop back with Y = FAToffset
-; ----------------------------------;
-EndOfFileClusters ;
-; ----------------------------------;
- MOV T,W ; T = W = current FATsector
- CALL #UpdateFATsSectorW ;SWX
-; ----------------------------------;
-; 3- Close Handle ;
-; ----------------------------------;
- CALL #CloseHandleT ;
-; ----------------------------------;
-DEL_END ;
- MOV @IP+,PC ;4
+ MOV @IP+,PC ; BufferPtr = first free byte offset
; ----------------------------------;
-
.IFNDEF TERMINAL_I2C ; if UART_TERMINAL
; first TERATERM sends the command TERM2SD" file.ext" to FastForth which returns XOFF at the end of the line.
; then when XON is sent below, TERATERM sends "file.ext" up to XOFF sent by TERM2SD" (slices of 512 bytes),
; then TERATERM sends char EOT that closes the file on SD_CARD.
- FORTHWORD "TERM2SD\34"
- mDOCOL
- .word DELDQ ; DEL file if already exist
- .word lit,2 ; -- open_type
- .word HERE,COUNT ; -- open_type addr cnt
- .word PARENOPEN ; reopen same filepath but as write
- .word $+2 ;
- MOV @RSP+,IP ;
+; ==================================;
+ FORTHWORD "TERM2SD\34" ;
+; ==================================;
+ mDOCOL ;
+ .word WRITEDQ ; if already exist FreeAllClusters else create it as WRITE file
+ mNEXTADR ;
; ----------------------------------;
-T2S_GetSliceLoop ; tranfert by slices of 512 bytes terminal input to file on SD_CARD via SD_BUF
+T2S_GetSliceLoop ; tranfert by slices of 512 bytes from terminal input to file on SD_CARD via SD_BUF
; ----------------------------------;
MOV #0,W ;1 reset W = BufferPtr
CALL #RXON ; use no registers
; ----------------------------------;
-T2S_FillBufferLoop ;
+T2S_Get_a_Char_Loop ;
; ----------------------------------;
BIT #RX_TERM,&TERM_IFG ;3 new char in TERMRXBUF ?
- JZ T2S_FillBufferLoop ;2
+ JZ T2S_Get_a_Char_Loop ;2
MOV.B &TERM_RXBUF,X ;3
MOV.B X,&TERM_TXBUF
CMP.B #4,X ;1 EOT sent by TERATERM ?
MOV.B X,SD_BUF(W) ;3
ADD #1,W ;1
CMP #BytsPerSec-1,W ;2
- JNC T2S_FillBufferLoop ;2 W < BytsPerSec-1 21 cycles char loop
JZ T2S_XOFF ;2 W = BytsPerSec-1 send XOFF after RX 511th char
+ JNC T2S_Get_a_Char_Loop ;2 W < BytsPerSec-1 21 cycles char loop (476 kBds/MHz)
; ----------------------------------;
T2S_WriteFile ;2 W = BytsPerSec
; ----------------------------------;
- CALL #Write_File ;TSWXY write all the buffer
- JMP T2S_GetSliceLoop ;2
+ CALL #Write_File ;STWXY write all the buffer
+ JMP T2S_GetSliceLoop ;2
; ----------------------------------;
T2S_XOFF ; 27 cycles between XON and XOFF
; ----------------------------------;
CALL #RXOFF ;4 use no registers
- JMP T2S_FillBufferLoop ;2 loop back once to get last char
+ JMP T2S_Get_a_Char_Loop ;2 loop back once to get char sent by TERMINAL during XOFF time
; ----------------------------------;
-T2S_End_Of_File ;
+T2S_End_Of_File ; wait CR before sending XOFF
+; ----------------------------------;
+T2S_Wait_CR ; warning! EOT must be followed by CR+LF (TERM2SD" used with I2C_FastForth)
+; ----------------------------------;
+ CMP.B #0Dh,&TERM_RXBUF ; also clears RX_IFG !
+ JZ T2S_Wait_CR ; wait CR
; ----------------------------------;
CALL #RXOFF ;4 use no registers
+; ----------------------------------;
+T2S_Wait_LF ; warning! EOT must be followed by CR+LF (TERM2SD" used with I2C_FastForth)
+; ----------------------------------;
+ CMP.B #0Ah,&TERM_RXBUF ; also clears RX_IFG !
+ JZ T2S_Wait_LF ; wait LF
+; ----------------------------------;
MOV W,&BufferPtr ;3
- CALL #CloseHandleT ;4
- MOV @IP+,PC ;4
+ CALL #CloseHandle ;4
+; ----------------------------------;
+ MOV @RSP+,IP ;
+ MOV @IP+,PC ;4
; ----------------------------------;
.ELSE ; if I2C_TERMINAL
; then when RXON is sent below, I2C_Master sends "file.ext" line by line
; then TERATERM sends char EOT that closes the file on SD_CARD.
+; ==================================;
FORTHWORD "TERM2SD\34" ; here, I2C_Master is reSTARTed in RX mode
- mDOCOL
- .word DELDQ ; DEL file if already exist
- .word lit,2 ; -- open_type
- .word HERE,COUNT ; -- open_type addr cnt
- .word PARENOPEN ; reopen same filepath but as write
- .word $+2 ;
+; ==================================;
+ mDOCOL ;
+ .word WRITEDQ ; if already exist FreeAllClusters else create it as WRITE file
+ mNEXTADR ;
; ----------------------------------;
- CALL #RXON ; send I2C Ctrl_Char $00 to I2C_Master
+ MOV #0,W ; reset W = SD_Buf_Ptr
+ MOV.B #0Ah,IP ; IP = char 'LF'
; ----------------------------------;
-T2S_ClearBuffer ;
+T2S_GetLineLoop ; tranfert line by line from terminal input to SD_BUF
; ----------------------------------;
- MOV #0,W ;1 reset W = BufferPtr
+ CALL #RXON ; use Y reg; send I2C Ctrl_Char $00 to request I2C_Master to switch from RX to TX
+; ----------------------------------;
+T2S_Get_a_Char_Loop ;
; ----------------------------------;
-T2S_FillBufferLoop ; move by slices of 512 bytes from TERMINAL input to file on SD_CARD via SD_BUF
+T2S_Q_BufferFull ; test it before to take data in RX buffer and so to do SCL strech low during Write_File !!!!
+; ----------------------------------;
+ CMP #BytsPerSec,W ;2 buffer full ?
+ JNC T2S_Get_a_Char ;2 no
+; ----------------------------------;
+T2S_WriteFile ; tranfert all 512 bytes of SD_BUF to the opened file in SD_CARD
+; ----------------------------------; SCL is stretched low by Slave (it's my)
+ CALL #Write_File ;STWXY Write_File write always all the buffer
+ MOV #0,W ; reset SD_Buf_Ptr
+; ----------------------------------;
+T2S_Get_a_Char ;
; ----------------------------------;
BIT #RX_TERM,&TERM_IFG ;3 new char in TERMRXBUF ?
- JZ T2S_FillBufferLoop ;2 no
- MOV.B &TERM_RXBUF,X ;3
- CMP.B #4,X ;1 EOT sent by TERMINAL (teraterm.exe) ?
+ JZ T2S_Get_a_Char ;2 no
+ MOV.B &TERM_RXBUF,X ;3 SCL is released here
+; ----------------------------------;
+T2S_Q_EOF ;
+; ----------------------------------;
+ CMP.B #4,X ;1 EOF sent by TERMINAL (teraterm.exe) ?
JZ T2S_End_Of_File ;2 yes
MOV.B X,SD_BUF(W) ;3
ADD #1,W ;1
- CMP.B #0Ah,X ;2 Char LF ?
- JNZ T2S_Q_BufferFull ;2 no
; ----------------------------------;
-T2S_GetNewLine ; here I2C_Master automatically (re)START in RX mode, one char must be sent to
-; ----------------------------------; clear I2C_Slave UCSTTIFG, so we must send LF a minima
- ASMtoFORTH ;
- .word CR ; (CR+LF instead of LF is sent to beautify TERMINAL display, if ECHO is ON obviously)
- .word $+2 ;
- CALL #RXON ; send I2C Ctrl_Char $00 to I2C_Master
+T2S_Q_Char_LF ; when Master send the Ack on char 'LF', it reStarts automatically in RX mode
; ----------------------------------;
-T2S_Q_BufferFull ;
+ CMP.B IP,X ;1 Char LF received ?
+ JNZ T2S_Get_a_Char_Loop ;2 no, 22 cycles loop back (< 1us @ 24 MHz)
; ----------------------------------;
- CMP #BytsPerSec,W ;2 buffer full ?
- JNC T2S_FillBufferLoop ;2 no 21 cycles char loop
+T2S_Send_CR ; because I2C_Master doesn't echo it on TERMINAL
+; ----------------------------------;
+ BIT #TX_TERM,&TERM_IFG ;
+ JZ T2S_Send_CR ; wait TX buffer empty
+ MOV.B #0Dh,&TERM_TXBUF ; send CR to beautify TERMINAL display (if ECHO is ON, obviously)
+; ----------------------------------;
+T2S_Send_LF ; because I2C_Master doesn't echo it on TERMINAL
; ----------------------------------;
-T2S_WriteFile ;2 yes
+ BIT #TX_TERM,&TERM_IFG ;
+ JZ T2S_Send_LF ; wait TX buffer empty
+ MOV.B IP,&TERM_TXBUF ; send LF to beautify TERMINAL display (if ECHO is ON, obviously)
; ----------------------------------;
- CALL #Write_File ;4 TSWXY write all the buffer
- JMP T2S_ClearBuffer ;2
+ JMP T2S_GetLineLoop ;
; ----------------------------------;
T2S_End_Of_File ;
; ----------------------------------;
- BIT #RX_TERM,&TERM_IFG ;3 new char in TERMRXBUF ?
- JZ T2S_End_Of_File ;2 no
- CMP.B #0Ah,&TERM_RXBUF ;4 Char LF ?
- JNZ T2S_End_Of_File ;
+T2S_Wait_LF ; warning! EOT is followed by CR+LF, because I2C_Master uses LF to switch from TX to RX
; ----------------------------------;
- MOV W,&BufferPtr ;3
- CALL #CloseHandleT ;4
- MOV @RSP+,IP ; moved here because ASMtoFORTH use above
+ CMP.B IP,&TERM_RXBUF ; and also clears RX_IFG !
+ JNZ T2S_Wait_LF ;
+; ----------------------------------; here I2C_Master switches from TX to RX
+ MOV W,&BufferPtr ; to add it to HDLL_CurSize
+ CALL #CloseHandle ; tranfert SD_BUF to last sector of opened file in SD_CARD then close it
+; ----------------------------------;
+ MOV @RSP+,IP ;
MOV @IP+,PC ;
; ----------------------------------;
; -*- coding: utf-8 -*-
-
+;
; ---------------------------------------
-; TERMINAL driver for FastForth target
+; UART TERMINAL driver for FastForth target
; ---------------------------------------
-; +---------------------------+
-; ------ | +-----------------+ |
-; WIRING | | +--------+ | |
-; ------ | | | | | |
-; FastForth target TXD RXD RTS <--> CTS TXD RXD UARTtoUSB <--> COMx <--> TERMINAL
-; -----------------------------------------------------------------------------------------
-; MSP_EXP430FR5739 P2.0 P2.1 P2.2 PL2303TA TERATERM.EXE
-; MSP_EXP430FR5969 P2.0 P2.1 P4.1 PL2303HXD
-; MSP_EXP430FR5994 P2.0 P2.1 P4.2 CP2102
-; MSP_EXP430FR6989 P3.4 P3.5 P3.0
-; MSP_EXP430FR4133 P1.0 P1.1 P2.3
-; CHIPSTICK_FR2433 P1.4 P1.5 P3.2
-; MSP_EXP430FR2433 P1.4 P1.5 P1.0
+;
+; +---------------------------------------+
+; | +-----------------------------+ |
+; | | +------(option)-----+ | |
+; | | | | | |
+; FastForth target: TXD RXD RTS connected to : CTS TXD RXD of UARTtoUSB <--> COMx <--> TERMINAL
+; ---------------- --- --- --- --- --- --- -------------------------------------
+; MSP_EXP430FR5739 P2.0 P2.1 P2.2 PL2303TA TERATERM.EXE
+; MSP_EXP430FR5969 P2.0 P2.1 P4.1 PL2303HXD
+; MSP_EXP430FR5994 P2.0 P2.1 P4.2 CP2102
+; MSP_EXP430FR6989 P3.4 P3.5 P3.0
+; MSP_EXP430FR4133 P1.0 P1.1 P2.3
+; CHIPSTICK_FR2433 P1.4 P1.5 P3.2
+; MSP_EXP430FR2433 P1.4 P1.5 P1.0
; MSP_EXP430FR2355 P4.3 P4.2 P2.0
; LP_MSP430FR2476 P1.4 P1.5 P6.1
-
-
+;
;-------------------------------------------------------------------------------
-; UART TERMINAL: QABORT ABORT_TERM COLD_TERM INI_TERM RXON RXOFF
+; UART TERMINAL: QABORT COLD_TERM INIT_TERM RXON RXOFF
;-------------------------------------------------------------------------------
-; define run-time part of ABORT"
-;Z ?ABORT xi f c-addr u -- abort & print msg.
-; FORTHWORD "?ABORT"
+
+; define run-time part of ABORT" ; if f is true display msg. then abort current process
QABORT CMP #0,2(PSP) ; -- f c-addr u test flag f
- JNZ ABORT_TERM ;
+ JNZ ABORT_TERM ; see forthMSP430FR_TERM_xxxx.asm below
THREEDROP ADD #4,PSP ; -- u
- MOV @PSP+,TOS ; --
- MOV @IP+,PC ;
+ JMP DROP ;
; ----------------------------------;
-ABORT_TERM ; exit from downloading file then reinit some variables via INI_FORTH
+UART_ABORT_TERM ; exit from downloading then reinit some variables via INIT_FORTH
; ----------------------------------;
- CALL #RXON ; PFA resume downloading source file if any
+ABORT_TERM CALL #RXON ; resume downloading source file if any
A_UART_LOOP BIC #RX_TERM,&TERM_IFG ; clear RX_TERM
MOV &FREQ_KHZ,Y ; 1000, 2000, 4000, 8000, 16000, 240000
A_USB_LOOPJ MOV #65,X ; 2~ <-------+ linux with minicom seems very very slow...
JNZ A_USB_LOOPJ ; 2~ 200~ loop -----+
BIT #RX_TERM,&TERM_IFG ; 4 new char in TERMRXBUF after A_USB_LOOPJ delay ?
JNZ A_UART_LOOP ; 2 yes, the input stream is still active: loop back
- CALL #INI_FORTH ; common ?ABORT|RST subroutine
-; ----------------------------------;
- .word lit,LINE,FETCH ; -- f c-addr u line fetch line number before set ECHO !
- .word ECHO ;
+ CALL #INIT_FORTH ; common ?ABORT|PUC subroutine to init DEFERed definitions
+ ; cnt is a byte, always positive. If cnt = 0 no RST_RET.
+ .word DUP ;
+ .word QFBRAN,ABORT_END; display nothing, don't force ECHO if ABORT" empty string
+ .word ECHO ; force ECHO
.word XSQUOTE ;
- .byte 4,27,"[7m" ; type ESC[7m (set reverse video)
- .word TYPE ;
-; ----------------------------------;
- .word QDUP,QFBRAN ; do nothing if line = 0
- .word ABORT_TYPE ;
+ .byte 4,27,"[7m" ;
+ .word TYPE ; type ESC [7m (set reverse video)
; ----------------------------------;
-; Display error "line:xxx" ; -- f c-addr u line
+; Display QABORT|WARM message ; <== WARM jumps here
; ----------------------------------;
- .word XSQUOTE ; -- f c-addr u line c-addr1 u1 displays the line where error occured
- .byte 15,"LAST.4TH, line " ;
- .word TYPE ; -- f c-addr u line
- .word UDOT ; -- f c-addr u
-; ----------------------------------;
-; Display ABORT message ; <== WARM jumps here
-; ----------------------------------;
-ABORT_TYPE .word TYPE ; -- f type abort message
+ABORT_TYPE .word TYPE ; -- f type QABORT|WARM message
.word XSQUOTE ; -- f c-addr u
.byte 4,27,"[0m" ;
- .word TYPE ; -- f set normal video
- .word ABORT ; no return
-
-
-; ----------------------------------;
-COLD_TERM ; default STOP_APP: wait TERMINAL idle
-; ----------------------------------;
-UART_COLD_TERM
- BIT #1,&TERM_STATW ;3
- JNZ COLD_TERM ;2 loop back while TERM_UART is busy
- MOV @RSP+,PC ; return to software_BOR
+ .word TYPE ; -- f set normal video
+ABORT_END .word ABORT ; -- f no return
; ----------------------------------;
+;-------------------------------------------------------------------------------
+; INIT TERMinal then enable I/O ;
+;-------------------------------------------------------------------------------
+UART_INIT_TERM ; see MSP430FRxxxx.pat file
; ----------------------------------;
-INIT_TERM ; TOS = RSTIV_MEM
-; ----------------------------------;
-UART_INIT_TERM ;
- CMP #2,TOS ;
- JNC UART_INIT_TERM_END ; no INIT_TERM if RSTIV_MEM U< 2 (WARM)
-; ----------------------------------;
+INIT_TERM ; TOS = USERSYS, don't change it
+ CALL #COLD_TERM ; wait while TERM_UART is busy
MOV #0081h,&TERM_CTLW0 ; UC SWRST + UCLK = SMCLK
MOV &TERMBRW_RST,&TERM_BRW ; init value in FRAM
MOV &TERMMCTLW_RST,&TERM_MCTLW ; init value in FRAM
BIC #1,&TERM_CTLW0 ; release UC_TERM from reset...
BIS #WAKE_UP,&TERM_IE ; then enable interrupt for wake up on terminal input
BIC #LOCKLPM5,&PM5CTL0 ; activate all previous I/O settings.
-UART_INIT_TERM_END
MOV @RSP+,PC ; RET
; ----------------------------------;
-
-; ----------------------------------;
-RXON ; default BACKGND_APP
-; ----------------------------------;
-UART_RXON JMP RXON_EXE ; Software and/or hardware flow control, to start Terminal UART for one line
-; ----------------------------------;
-
; ----------------------------------;
-RXOFF ; Software and/or hardware flow control, to stop Terminal UART comunication
+UART_COLD_TERM ; default STOP_APP: wait TERMINAL idle
; ----------------------------------;
-UART_RXOFF ;
- .IFDEF TERMINAL3WIRES ; first software flow control
-RXOFF_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char
- JZ RXOFF_LOOP ;2
- MOV #19,&TERM_TXBUF ;4 move XOFF char into TX_buf
- .ENDIF ;
- .IFDEF TERMINAL4WIRES ; and hardware flow control after
- BIS.B #RTS,&HANDSHAKOUT ;3 set RTS high
- .ENDIF ;
- MOV @RSP+,PC ;4 to CR_NEXT, ...or user defined
+WAIT_UART_IDLE
+COLD_TERM BIT #1,&TERM_STATW ;3 uart busy ?
+ JNZ COLD_TERM ;2 loop back while TERM_UART is busy
; ----------------------------------;
-
+UART_INIT_SOFT ;
; ----------------------------------;
-RXON_EXE
+INIT_SOFT_TERM
+ MOV @RSP+,PC ; does nothing by default
; ----------------------------------;
- .IFDEF TERMINAL3WIRES ; first software flow control
-RXON_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char, useless at high baudrates
- JZ RXON_LOOP ;2
- MOV #17,&TERM_TXBUF ;4 move char XON into TX_buf
- .ENDIF ;
- .IFDEF TERMINAL4WIRES ; and hardware flow control after
- BIC.B #RTS,&HANDSHAKOUT ;3 set RTS low
- .ENDIF ;
- MOV @RSP+,PC ;4 to BACKGND (End of file download or quiet input) or AKEYREAD...
-; ----------------------------------; ... (get next line of file downloading), or user defined
-
-;===============================================================================
- FORTHWORD "WIPE" ; software DEEP_RESET
-;===============================================================================
-WIPE MOV #-1,&RSTIV_MEM ; negative value ==> DEEP_RESET
- JMP COLD
-
-;===============================================================================
- FORTHWORD "COLD"
-;===============================================================================
-;Z COLD -- performs a software RESET
-; as pin RST is replaced by pin NMI, RESET by pin activation is redirected here via USER NMI vector
-; that allows actions to be performed before executing software BOR.
-COLD CALL @PC+ ; COLD first calls STOP_APP, in this instance: CALL #COLD_TERM by default
-PFACOLD .word COLD_TERM ; INI_COLD_DEF: default value set by WIPE. see forthMSP430FR_TERM_xxxx.asm
- BIT.B #IO_WIPE,&WIPE_IN ; hardware Deep_RESET request (low) ?
- JNZ COLDEXE ; no
- MOV #-1,&RSTIV_MEM ; yes, set negative value to force DEEP_RESET
-COLDEXE MOV #0A504h,&PMMCTL0 ; performs software_BOR, see RESET in forthMSP430FR.asm
-; ----------------------------------;
-
-;-----------------------------------;
- FORTHWORD "WARM" ;
-;-----------------------------------;
-;Z WARM xi -- ; the end of RESET
-;-----------------------------------;
-WARM ;
;-------------------------------------------------------------------------------
-; RESET 7: if RSTIV_MEM <> WARM, init TERM and enable I/O
+; UART TERMINAL : WARM SYS COLD
;-------------------------------------------------------------------------------
- CALL @PC+ ; init TERM, only if TOS U>= 2 (RSTIV_MEM <> WARM)
- .IFNDEF SD_CARD_LOADER ;
-PFAWARM .word INIT_TERM ; INI_HARD_APP default value, init TERM UC, unlock I/O's, TOS = RSTIV_MEM
- .ELSE
-PFAWARM .word INI_HARD_SD ; init SD Card + init TERM, see forthMSP430FR_SD_INIT.asm
- .ENDIF ; TOS = RSTIV_MEM
-;-----------------------------------;
-WARM_DISPLAY ; TOS = RSTIV_MEM value
- ASMtoFORTH
+; ----------------------------------; thanks to INIT_FORTH, WARM implements the choice
+UART_WARM ; made by the user with SYS|hardwareRST|DEEP_reset
+;-----------------------------------; regarding the state of the software.
+WARM CALL &HARD_APP ;
+ mASM2FORTH ;
+ .word ECHO ;
.word XSQUOTE
.byte 7,13,10,27,"[7m#" ; CR + cmd "reverse video" + #
.word TYPE
- .word DOT ; display TOS = RSTIV_MEM value
+ .word DOT ; display TOS = USERSYS value
.word XSQUOTE
- .byte 25,"FastForth ©J.M.Thoorens "
+ .byte 25,"FastForth ",169,"J.M.Thoorens, "
.word TYPE
- .word LIT,FRAM_FULL,HERE,MINUS,UDOT
+ .word LIT,FRAM_FULL
+ .word HEREXEC,MINUS,UDOT
.word XSQUOTE
.byte 10,"bytes free"
- .word BRAN,ABORT_TYPE ; without return
+ .word BRAN,ABORT_TYPE ; without return!
+;-----------------------------------;
+
+;-----------------------------------;
+ FORTHWORD "SYS" ; n -- software RST, DEEP_RST, COLD, WARM
+;-----------------------------------;
+ CMP #0,TOS ;
+ JL SYSEND ; if -n SYS ==> COLD + DEEP_RESET
+ JZ NOPUC ; if [0] SYS
+ BIT #1,TOS ;
+ JNC SYSEND ; if +n SYS (+n even)
+NOPUC PUSH #WARM ;
+ PUSH RSP ; Push address of WARM address
+ JMP INIT_FORTH ; if +n SYS (+n odd) ==> INIT_FORTH --> WARM --> WARM display
+SYSEND MOV TOS,&USERSYS ; ==> COLD --> PUC --> INIT_FORTH --> WARM --> WARM display
+;===============================================================================
+COLD ; <--- USER_NMI vector <--- <RESET> and <RESET> + <SW1> (DEEP_RESET)
+;===============================================================================
+; as pin RST is replaced by pin NMI, RESET by pin activation is redirected here via USER NMI vector
+; that allows actions to be performed before executing software BOR.
+ CALL &COLD_APP ; to stop APPlication before reset
+ BIT.B #SW1,&SW1_IN ; <SW1> pressed ?
+ JNZ COLDEXE ; no
+ MOV #-1,&USERSYS ; yes, set negative value to force DEEP_RESET
+COLDEXE MOV #0A504h,&PMMCTL0 ; performs software_BOR ------------------------+
+;=============================================================================== |
+RESET ; <-- RST vect. <-- SYS_failures PUC POR BOR <--+
+;===============================================================================
+; PUC 1: replace pin RESET by pin NMI, stops WDT_RESET
+;-------------------------------------------------------------------------------
+ BIS #3,&SFRRPCR ; pin RST becomes pin NMI with falling edge, so SYSRSTIV = 4
+ BIS #10h,&SFRIE1 ; enable NMI interrupt ==> hardware RESET is redirected to COLD.
+ MOV #5A80h,&WDTCTL ; disable WDT RESET
+;-------------------------------------------------------------------------------
+; PUC 2: INIT STACK
+;-------------------------------------------------------------------------------
+ MOV #RSTACK,RSP ; init return stack
+ MOV #PSTACK,PSP ; init parameter stack
+;-------------------------------------------------------------------------------
+; PUC 3: I/O, RAM, RTC, CS, SYS initialisation limited to FastForth usage.
+; All unused I/O are set as input with pullup resistor.
+;-------------------------------------------------------------------------------
+ .include "TargetInit.asm" ; include target specific init code
+;-------------------------------------------------------------------------------
+; PUC 4: init RAM to 0
+;-------------------------------------------------------------------------------
+ MOV #RAM_LEN,X ; 2 RAM_LEN must be even and > 1, obviously.
+INITRAMLOOP SUB #2,X ; 1
+ MOV #0,RAM_ORG(X) ; 3
+ JNZ INITRAMLOOP ; 2 6 cycles loop !
+;-------------------------------------------------------------------------------
+; PUC 5: GET SYSRSTIV and SYS_USER ; X = 0
+;-------------------------------------------------------------------------------
+ MOV &SYSRSTIV,X ; X <-- SYSRSTIV <-- 0
+ MOV &USERSYS,TOS ; TOS = USERSYS
+ MOV #0,&USERSYS ; clear USERSYS
+ AND #-1,TOS ;
+ JNZ PUC6 ; if TOS <> 0, keep USERSYS value
+ MOV X,TOS ; TOS <-- SYSRSTIV
+;-------------------------------------------------------------------------------
+; PUC 6: START FORTH engine
+;-------------------------------------------------------------------------------
+PUC6 CALL #INIT_FORTH ; common part of QABORT|PUC
+PUCNEXT .WORD WARM ; no return. May be redirected by BOOT.
+;-----------------------------------;
;-------------------------------------------------------------------------------
-; INTERPRETER INPUT
+; INTERPRETER INPUT: ACCEPT KEY EMIT ECHO NOECHO
;-------------------------------------------------------------------------------
FORTHWORD "ACCEPT"
+;-----------------------------------;
;https://forth-standard.org/standard/core/ACCEPT
;C ACCEPT addr addr len -- addr len' get line at addr to interpret len' chars
ACCEPT MOV @PC+,PC ;3 Code Field Address (CFA) of ACCEPT
PFAACCEPT .word BODYACCEPT ; Parameter Field Address (PFA) of ACCEPT
-BODYACCEPT ; BODY of ACCEPT = default execution of ACCEPT
; ----------------------------------;
; ACCEPT part I prepare TERMINAL_INT;
; ----------------------------------;
- MOV TOS,X ;1 -- addr len
+BODYACCEPT MOV TOS,X ;1 -- addr len
MOV @PSP,TOS ;2 -- org ptr
ADD TOS,X ;1 -- org ptr X = buf_end
MOV #0Dh,W ;2 W = 'CR' to speed up char loop in part II
MOV #20h,T ;2 T = 'BL' to speed up char loop in part II
MOV IP,S ; S = ACCEPT_ret
- MOV #CR_NEXT,IP ;2 IP = XOFF_ret
+ MOV #CR_NEXT,IP ;2 IP = XOFF_ret
PUSHM #5,IP ;5 PUSHM IP,S,T,W,X r-- XOFF_ret ACCEPT_ret BL CR buf_end
- JMP SLEEP ;2 which calls RXON before falling down to LPMx mode
+ JMP SLEEP ;2
; ----------------------------------;
; **********************************;
; (ACCEPT) part II under interrupt ; Org Ptr -- len'
; ----------------------------------;
ADD #4,RSP ;1 remove SR and PC from stack, SR flags are lost (unused by FORTH interpreter)
- POPM #4,IP ;6 POPM W=buffer_bound, T=0Dh, S=20h, IP=ACCEPT_RET r-- XOFF_ret
-; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
-; starts the 2th stopwatch ;
-; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+ POPM #3,IP ;6 POPM W=buffer_bound, T=0Dh, S=20h, IP=ACCEPT_RET r-- XOFF_ret
+; ----------------------------------;
AKEYREAD MOV.B &TERM_RXBUF,Y ;3 read character into Y, RX_TERM is cleared
; ----------------------------------;
CMP.B T,Y ;1 CR ?
- JZ RXOFF ;2 then RET to CR_NEXT
-; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;+ 12 to send RXOFF
-; stops the first stopwatch ;= first bottleneck, best case result: 25~ + LPMx wake_up time..
-; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
- CMP.B S,Y ;1 printable char ?
+ JNZ AKEYRDNNEXT ;2 no
+; ----------------------------------;
+RXOFF ; Software|hardware flow control to stop RX UART r-- ACCEPT_ret CR_NEXT
+; ----------------------------------;
+ .IFDEF TERMINAL3WIRES ; first software flow control
+RXOFF_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char
+ JZ RXOFF_LOOP ;2
+ MOV #19,&TERM_TXBUF ;4 move XOFF char into TX_buf
+ .ENDIF ;
+ .IFDEF TERMINAL4WIRES ; and hardware flow control after
+ BIS.B #RTS,&HANDSHAKOUT ;3 set RTS high
+ .ENDIF ;
+ MOV @RSP+,PC ;4 to CR_NEXT
+; ----------------------------------;
+AKEYRDNNEXT CMP.B S,Y ;1 printable char ?
JC ASTORETEST ;2 yes
; ----------------------------------;
CMP.B #8,Y ;1 char = BS ?
; end of backspace ;
; ----------------------------------;
ASTORETEST CMP W,TOS ; 1 Bound is reached ?
- JZ YEMIT ; 2 yes: send echo then loopback
- MOV.B Y,0(TOS) ; 3 no: store char @ Ptr, send echo then loopback
+ JC YEMIT ; 2 yes: don't store char @ Ptr, don't increment TOS
+ MOV.B Y,0(TOS) ; 3 no: store char @ Ptr
ADD #1,TOS ; 1 increment Ptr
; ----------------------------------;
WAITaKEY BIT #RX_TERM,&TERM_IFG ; 3 new char in TERMRXBUF ?
JNZ AKEYREAD ; 2 yes
-; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
-; stops the 2th stopwatch ; best case result: 26~/22~ (with/without echo) ==> 385/455 kBds/MHz
-; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
JZ WAITaKEY ; 2 no
; ----------------------------------;
-
-; ----------------------------------;
; return of RXOFF
; ----------------------------------;
CR_NEXT SUB @PSP+,TOS ; -- len'
-; ----------------------------------;
- MOV #LPM0+GIE,&LPM_MODE ; reset LPM_MODE to default mode LPM0 for next line of input stream
-; ----------------------------------;
WAITLF BIT #RX_TERM,&TERM_IFG ; char 'LF' is received ?
JZ WAITLF ; no
MOV.B &TERM_RXBUF,Y ; yes, clear RX_int flag after LF received
; ----------------------------------;
-ACCEPT_EOL CMP #0,&LINE ; if LINE <> 0 increment LINE
- JZ ACCEPT_END ;
- ADD #1,&LINE ;
-ACCEPT_END
-; ----------------------------------;
- MOV S,Y ; output a BL on TERMINAL (for the case of error occuring)
- JMP YEMIT ; before interpret line
-; **********************************;
+ACCEPT_EOL MOV S,Y ; output a BL on TERMINAL (for the case of error occuring)
+ JMP YEMIT ; before return to ABORT to interpret line
+; **********************************; UF9 to UF11 are reset.
; ------------------------------------------------------------------------------
; TERMINAL I/O, input part
; KEY -- c wait character from input device ; primary DEFERred word
KEY MOV @PC+,PC ;4 Code Field Address (CFA) of KEY
PFAKEY .word BODYKEY ; Parameter Field Address (PFA) of KEY, with default value
-BODYKEY SUB #2,PSP ;1 push old TOS..
+BODYKEY PUSH #KEYNEXT ;
+; ----------------------------------;
+RXON ; default BACKGND_APP
+; ----------------------------------;
+ .IFDEF TERMINAL3WIRES ; first software flow control
+RXON_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char, useless at high baudrates
+ JZ RXON_LOOP ;2
+ MOV #17,&TERM_TXBUF ;4 move char XON into TX_buf
+ .ENDIF ;
+ .IFDEF TERMINAL4WIRES ; and hardware flow control after
+ BIC.B #RTS,&HANDSHAKOUT ;3 set RTS low
+ .ENDIF ;
+ MOV @RSP+,PC ;4 to BACKGND (End of file download or quiet input) or AKEYREAD...
+; ----------------------------------; ... (get next line of file downloading), or user defined
+KEYNEXT SUB #2,PSP ;1 push old TOS..
MOV TOS,0(PSP) ;3 ..onto stack
- CALL #RXON
KEYLOOP BIT #RX_TERM,&TERM_IFG ; loop if bit0 = 0 in interupt flag register
JZ KEYLOOP ;
MOV &TERM_RXBUF,TOS ;
YEMIT1 BIT.B #CTS,&HANDSHAKIN ;
JNZ YEMIT1
.ENDIF
-QYEMIT .word 48C2h ;3 48C2h = MOV.B Y,&<next_adr>
- .word TERM_TXBUF ; 3 MOV Y,&TERMTXBUF
+QYEMIT MOV.B Y,&TERM_TXBUF ; 3 may be replaced by MOV @IP+,PC with NOECHO
MOV @IP+,PC ;
FORTHWORD "ECHO"
;Z ECHO -- connect terminal output (default)
ECHO MOV #48C2h,&QYEMIT ; 48C2h = MOV.B Y,&<next_adr>
- MOV #0,&LINE ;
MOV @IP+,PC
FORTHWORD "NOECHO"
;Z NOECHO -- disconnect terminal output
NOECHO MOV #NEXT,&QYEMIT ; NEXT = 4030h = MOV @IP+,PC
- MOV #1,&LINE ;
MOV @IP+,PC
+
; -*- coding: utf-8 -*-
-
-
+;
; ---------------------------------------------------
; TERMINAL driver for I2CFastForth target (I2C Slave)
; ---------------------------------------------------
-
-; hardware Software
-; I2C Slave I2C Master
-;
-; I2CFastForth target SCL SDA connected to: SCL SDA of UART to I2C bridge
-; ------------------ ---- ---- ---- ---- ------------------
-; MSP_EXP430FR5739 P1.7 P1.6 P4.1 P4.0 MSP_EXP430FR5739
-; MSP_EXP430FR5969 P1.7 P1.6 P1.3 P1.2 MSP_EXP430FR5969
-; MSP_EXP430FR5994 P7.1 P7.0 P8.1 P8.2 MSP_EXP430FR5994
-; MSP_EXP430FR6989 P1.7 P1.6 P1.5 P1.3 MSP_EXP430FR6989
-; MSP_EXP430FR4133 P5.3 P5.2 P8.3 P8.2 MSP_EXP430FR4133
-; CHIPSTICK_FR2433 P1.3 P1.2 P2.2 P2.0 CHIPSTICK_FR2433
-; MSP_EXP430FR2433 P1.3 P1.2 P3.1 P3.2 MSP_EXP430FR2433
-; MSP_EXP430FR2355 P1.3 P1.2 P3.3 P3.2 MSP_EXP430FR2355
-; LP_MSP430FR2476 P4.3 P4.4 P3.3 P3.2 LP_MSP430FR2476
+; |
+; | GND------------------------------GND
+; | Vcc-------------o---o------------Vcc
+; | | |
+; | 3 3
+; | k k
+; v 3 3
+; I2C_FastForth | | UARTI2C +---------------------------------------+
+; hardware +--------------|---o-------------+ Software | +-----------------------------+ |
+; I2C Slave | +-------o----------+ | I2C Master | | +------(option)-----+ | |
+; | | | | | | | | | |
+; I2CFastForth target SCL SDA connected to: SDA SCL of UART to I2C bridge TXD RXD RTS connected to : CTS TXD RXD UARTtoUSB <--> COMx <--> TERMINAL
+; ------------------ ---- ---- ---- ---- ------------------ --- --- --- --- --- --- -------------------------------------
+; MSP_EXP430FR5739 P1.7 P1.6 P4.0 P4.1 MSP_EXP430FR5739 P2.0 P2.1 P2.2 PL2303TA TERATERM.EXE
+; MSP_EXP430FR5969 P1.7 P1.6 P1.2 P1.3 MSP_EXP430FR5969 P2.0 P2.1 P4.1 PL2303HXD
+; MSP_EXP430FR5994 P7.1 P7.0 P8.2 P8.1 MSP_EXP430FR5994 P2.0 P2.1 P4.2 CP2102
+; MSP_EXP430FR6989 P1.7 P1.6 P1.3 P1.5 MSP_EXP430FR6989 P3.4 P3.5 P3.0
+; MSP_EXP430FR4133 P5.3 P5.2 P8.2 P8.3 MSP_EXP430FR4133 P1.0 P1.1 P2.3
+; CHIPSTICK_FR2433 P1.3 P1.2 P2.0 P2.2 CHIPSTICK_FR2433 P1.4 P1.5 P3.2
+; MSP_EXP430FR2433 P1.3 P1.2 P3.2 P3.1 MSP_EXP430FR2433 P1.4 P1.5 P1.0
+; MSP_EXP430FR2355 P1.3 P1.2 P3.2 P3.3 MSP_EXP430FR2355 P4.3 P4.2 P2.0
+; LP_MSP430FR2476 P4.3 P4.4 P3.2 P3.3 LP_MSP430FR2476 P1.4 P1.5 P6.1
;
; don't forget to link 3V3 and GND on each side and to add 3k3 pullup resistors on SDA and SCL.
-
+;
;-------------------------------------------------------------------------------
-; I2C TERMINAL: QABORT ABORT_TERM INI_TERM COLD_TERM RXON I2C_CTRL_CH
+; I2C TERMINAL: QABORT ABORT_TERM INIT_TERM COLD_TERM RXON I2C_CTRL_CH
;-------------------------------------------------------------------------------
-; define run-time part of ABORT"
-;Z ?ABORT xi f c-addr u -- abort & print msg.
-; FORTHWORD "?ABORT"
-QABORT CMP #0,2(PSP) ; -- f c-addr u test flag f
- JNZ ABORT_TERM ;
-THREEDROP ADD #4,PSP ; -- u
- MOV @PSP+,TOS ; --
- MOV @IP+,PC ;
-; ----------------------------------;
-ABORT_TERM ; exit from downloading then reinit some variables via INI_FORTH
-; ----------------------------------;
- MOV.B #2,Y ; -- f c-addr u ABORT request Ctrl_Char = $02
- CALL #I2C_CTRL_CH ; send it to I2C_Master which will run QABORT_TERM on its side
-; ----------------------------------;
- PUSH TOS ;
- CALL #INI_FORTH ;
-; ----------------------------------;
-; display line of error if NOECHO ;
-; ----------------------------------;
- .word lit,LINE,FETCH ; -- f c-addr u line fetch line number before set ECHO !
- .word ECHO ;
- .word RFROM ; -- f c-addr u line u
- .word QFBRAN,ABORT_END; display nothing if ABORT" with empty string
- .word XSQUOTE ; -- f c-addr u line
+
+; ?ABORT defines run-time part of ABORT"
+QABORT CMP #0,2(PSP) ; -- f addr cnt if f is true abort current process then display ABORT" msg.
+ JNZ ABORT_TERM ; see forthMSP430FR_TERM_xxxx.asm below
+THREEDROP ADD #4,PSP ; -- cnt
+ JMP DROP ;
+; ----------------------------------;
+I2C_ABORT_TERM ; exit from downloading then reinit FORTH variables via INIT_FORTH
+; ----------------------------------;
+ABORT_TERM MOV #2,Y ; send $02 as Ctrl_Char ?ABORT
+ CALL #I2C_CTRL_CH ;
+ CALL #INIT_FORTH ; common ?ABORT|PUC subroutine to init DEFERed definitions + INIT_FORTH
+ .word DUP ; -- f addr cnt cnt
+ .word QFBRAN,ABORT_END; -- f addr 0 if cnt = 0 display nothing
+ .word ECHO ; force ECHO
+ .word XSQUOTE ;
.byte 5,27,"[7m",'@' ;
.word TYPE ; cmd "reverse video" + displays "@"
.word LIT,I2CSLAVEADR ;
- .word FETCH,DOT ; displays <I2C_Slave_Address>
- .word QDUP,QFBRAN ; don't display line if line = 0 (ECHO was ON)
- .word ABORT_TYPE ;
- .word XSQUOTE ; -- f c-addr u line c-addr1 u1 displays the line where error occured
- .byte 15,"LAST.4TH, line " ;
- .word TYPE ; -- f c-addr u line
- .word UDOT ; -- f c-addr u
-; ----------------------------------;
-; Display ABORT|WARM message ; <== WARM jumps here
-; ----------------------------------;
-ABORT_TYPE .word TYPE ; -- f display abort|warm message
- .word XSQUOTE ; -- f c-addr u
+ .word FETCH,DOT ; displays I2C_Slave_Address<<1
+; ----------------------------------;
+; Display ABORT|WARM message ; -- f addr cnt <== WARM jumps here
+; ----------------------------------;
+ABORT_TYPE .word TYPE ; -- f display QABORT|WARM message
+ .word XSQUOTE ;
.byte 4,27,"[0m" ;
- .word TYPE ; -- f set normal video
-ABORT_END .word ABORT ; -- f no return
+ .word TYPE ; set normal video
+ABORT_END .word ABORT ; -- f|f addr 0 no return
; ----------------------------------;
+RXON ; called by SLEEP before CPU sleeping down.
; ----------------------------------;
-INIT_TERM ; TOS = RSTIV_MEM
-; ----------------------------------;
-I2C_INIT_TERM
- CMP #2,TOS ;
- JNC I2C_INIT_TERM_END ; no INIT_TERM if RSTIV_MEM U< 2 (WARM)
+I2C_ACCEPT MOV.B #0,Y ; ACCEPT request Ctrl_Char = $00
; ----------------------------------;
- BIS #07C0h,&TERM_CTLW0 ; set I2C_Slave in RX mode to receive I2C_address
- MOV &I2CSLAVEADR,Y ; init value found in FRAM INFO
- RRA Y ; I2C Slave address without R/W bit
- BIS #400h,Y ; enable I2COA0 Slave address
- MOV Y,&TERM_I2COA0 ;
- BIS.B #BUS_TERM,&TERM_SEL ; Configure pins TERM_I2C
- BIC #1,&TERM_CTLW0 ; release UC_TERM from reset...
- BIS #WAKE_UP,&TERM_IE ; then enable interrupt for wake up on terminal input
- BIC #LOCKLPM5,&PM5CTL0 ; activate all previous I/O settings.
-I2C_INIT_TERM_END
+I2C_CTRL_CH BIT #TX_TERM,&TERM_IFG ; send it to I2C_Master_RX to restart it in TX mode
+ JZ I2C_CTRL_CH ; wait TX buffer empty
+ MOV.B Y,&TERM_TXBUF ; send Ctrl_Char
+WAITCHAREND BIT #4,&TERM_IFG ; I2C_Master (re)STARTed ?
+ JZ WAITCHAREND ; loop back if no
; ----------------------------------;
-COLD_TERM ; nothing to do
+I2C_COLD_TERM
; ----------------------------------;
- MOV @RSP+,PC ;
+COLD_TERM ; does nothing by default
; ----------------------------------;
-
-
+I2C_INIT_SOFT ;
; ----------------------------------;
-RXON ; send ctrl_char $00 as ACCEPT request
+INIT_SOFT_TERM
+ MOV @RSP+,PC ; does nothing by default
; ----------------------------------;
-I2C_RXON MOV.B #0,Y ; ACCEPT request Ctrl_Char = $00
+;-------------------------------------------------------------------------------
+; INIT TERMinal then enable I/O
+;-------------------------------------------------------------------------------
; ----------------------------------;
-I2C_CTRL_CH ; send it to I2C_Master_RX to restart it in TX mode
+I2C_INIT_TERM ;
; ----------------------------------;
- BIT #TX_TERM,&TERM_IFG ;3
- JZ I2C_CTRL_CH ;2 wait TX buffer empty
- MOV.B Y,&TERM_TXBUF ;3 send Ctrl_Char
-WAITCHAREND
- BIT #4,&TERM_IFG ; I2C_Master (re)STARTed ?
- JZ WAITCHAREND ; no
+INIT_TERM ; TOS = USERSYS, don't change
+ BIS #07C0h,&TERM_CTLW0 ; set I2C_Slave in RX mode to receive I2C_address
+ MOV &I2CSLAVEADR,Y ; init value found in FRAM INFO
+ RRA Y ; I2C Slave address without R/W bit
+ BIS #400h,Y ; enable I2COA0 Slave address
+ MOV Y,&TERM_I2COA0 ;
+ BIS.B #BUS_TERM,&TERM_SEL ; Configure pins TERM_I2C
+ BIC #1,&TERM_CTLW0 ; release UC_TERM from reset...
+ BIS #WAKE_UP,&TERM_IE ; then enable interrupt for wake up on START
+ BIC #LOCKLPM5,&PM5CTL0 ; activate all previous I/O settings.
MOV @RSP+,PC ;
; ----------------------------------;
-; I2C_CTRL_CHAR sends a CTRL_Char that asks I2C_Master RX to (re)START in TX mode.
-; As TI tells nothing about I2C_Slave UCSTTIFG ON --> OFF,
-; it is assumed that the Slave clears itself UCSTTIFG after the first character has been exchanged.
;-------------------------------------------------------------------------------
-; I2C TERMINAL : WIPE COLD WARM ACCEPT KEY EMIT ECHO NOECHO
+; I2C TERMINAL : WARM SYS COLD
;-------------------------------------------------------------------------------
;-----------------------------------;
- FORTHWORD "WIPE" ; software DEEP_RESET
-;-----------------------------------;
-WIPE MOV #-1,&RSTIV_MEM ; negative value forces DEEP_RESET
- JMP COLD
-
-; ----------------------------------;
- FORTHWORD "COLD" ; performs a software reset
-; ----------------------------------;
-; as pin RST is replaced by pin NMI, RESET by pin activation is redirected here via USER NMI vector
-; that allows specific actions before executing software BOR.
-COLD CALL @PC+ ; COLD first calls STOP_APP, in this instance: CALL #COLD_TERM by default
-PFACOLD .word COLD_TERM ; PFACOLD default value set by WIPE.
-BODYCOLD BIT.B #IO_WIPE,&WIPE_IN ; hardware Deep_RESET request (low) ?
- JNZ COLDEXE ; no
- MOV #-1,&RSTIV_MEM ; yes, set negative value to force DEEP_RESET
-COLDEXE MOV #0A504h,&PMMCTL0 ; performs software_BOR --> RST_vector --> RESET in forthMSP430FR.asm
-; ----------------------------------;
-
-;-----------------------------------;
- FORTHWORD "WARM" ;
+; FORTHWORD "WARM" ; (n) --
;-----------------------------------;
-;Z WARM xi -- ; the end of RESET
-;-----------------------------------;
-WARM ;
-;-------------------------------------------------------------------------------
-; RESET 7: if RSTIV_MEM <> WARM, init TERM and enable I/O
-;-------------------------------------------------------------------------------
- CALL @PC+ ; init TERM, only if TOS U>= 2 (RSTIV_MEM <> WARM)
- .IFNDEF SD_CARD_LOADER ;
-PFAWARM .word INIT_TERM ; INI_HARD_APP default value, init TERM UC, unlock I/O's, TOS = RSTIV_MEM
- .ELSE
-PFAWARM .word INI_HARD_SD ; init SD Card + init TERM, see forthMSP430FR_SD_INIT.asm
- .ENDIF ; TOS = RSTIV_MEM
+I2C_WARM ;
;-----------------------------------;
-WARM_DISPLAY ; TOS = RSTIV_MEM value
- MOV.B #3,Y ; WARM request Ctrl_Char = $03
- CALL #I2C_CTRL_CH ; send it to I2C_Master to reSTART in RX mode
- ASMtoFORTH
+WARM CALL &HARD_APP ; init HARD_APP, i.e. UART_TERMinal then unlock IO's
+ mASM2FORTH ; display a message then goto QUIT (without return):
+ .word ECHO ;
.word XSQUOTE
.byte 7,13,10,27,"[7m@" ; CR+LF + cmd "reverse video" + @
.word TYPE
- .word LIT,I2CSLAVEADR,FETCH,DOT
+ .word LIT,I2CSLAVEADR,FETCH
+ .word DOT ; display decimal I2C_address<<1
.word LIT,'#',EMIT
- .word DOT ; display signed RSTIV_MEM
+ .word DOT ; display signed USERSYS
.word XSQUOTE
- .byte 25,"FastForth ©J.M.Thoorens "
+ .byte 25,"FastForth ",169,"J.M.Thoorens, "
.word TYPE
- .word LIT,FRAM_FULL,HERE,MINUS,UDOT
+ .word LIT,FRAM_FULL
+ .word HEREXEC,MINUS,UDOT ; number of...
.word XSQUOTE
- .byte 10,"bytes free"
- .word BRAN,ABORT_TYPE ; without return!
+ .byte 10,"bytes free" ; bytes free
+ .word BRAN,ABORT_TYPE ; no return
+;-----------------------------------;
-; ----------------------------------;
- FORTHWORD "ACCEPT"
+;-----------------------------------;
+ FORTHWORD "SYS" ; n -- software RST, DEEP_RST, COLD, WARM
+;-----------------------------------;
+ CMP #0,TOS ;
+ JL SYSEND ; if -n SYS ==> COLD + DEEP_RESET
+ JZ NOPUC ; if [0] SYS
+ BIT #1,TOS ;
+ JNC SYSEND ; if +n SYS (+n even)
+NOPUC PUSH #WARM ; push WARM address
+ PUSH RSP ; Push address of WARM address
+ JMP INIT_FORTH ; if +n SYS (+n odd) ==> INIT_FORTH --> WARM --> WARM display
+SYSEND MOV TOS,&USERSYS ; ==> COLD --> PUC --> INIT_FORTH --> WARM --> WARM display
+;===============================================================================
+COLD ; <--- USER_NMI vector <--- <RESET> and <RESET> + <SW1> (DEEP_RESET)
+;===============================================================================
+; as pin RST is replaced by pin NMI by RESET below, hardware RESET is redirected here via USER NMI vector
+; that allows specific actions before executing software BOR:
+ CALL &COLD_APP ; to stop APPlication before reset
+ BIT.B #SW1,&SW1_IN ; <SW1> pressed ?
+ JNZ COLDEXE ; no
+ MOV #-1,&USERSYS ; yes, force USERSYS negative value to do DEEP_RESET
+COLDEXE MOV #0A504h,&PMMCTL0 ; performs software_BOR ------------------------+
+;=============================================================================== |
+RESET ; <-- RST vect. <-- SYS_failures PUC POR BOR <--+
+;===============================================================================
+; PUC 1: replace pin RESET by pin NMI, stops WDT_RESET
+;-------------------------------------------------------------------------------
+ BIS #3,&SFRRPCR ; pin RST becomes pin NMI with falling edge, so SYSRSTIV = 4
+ BIS #10h,&SFRIE1 ; enable NMI interrupt ==> hardware RESET is redirected to COLD.
+ MOV #5A80h,&WDTCTL ; disable WDT RESET
+;-------------------------------------------------------------------------------
+; PUC 2: INIT STACK
+;-------------------------------------------------------------------------------
+ MOV #RSTACK,RSP ; init return stack
+ MOV #PSTACK,PSP ; init parameter stack
+;-------------------------------------------------------------------------------
+; PUC 3: I/O, RAM, RTC, CS, SYS initialisation limited to FastForth usage.
+; All unused I/O are set as input with pullup resistor.
+;-------------------------------------------------------------------------------
+ .include "TargetInit.asm" ; include target specific init code
+;-------------------------------------------------------------------------------
+; PUC 4: init RAM to 0
+;-------------------------------------------------------------------------------
+ MOV #RAM_LEN,X ; 2 RAM_LEN must be even and > 1, obviously.
+INITRAMLOOP SUB #2,X ; 1
+ MOV #0,RAM_ORG(X) ; 3
+ JNZ INITRAMLOOP ; 2 6 cycles loop !
+;-------------------------------------------------------------------------------
+; PUC 5: GET SYSRSTIV and SYS_USER
+;-------------------------------------------------------------------------------
+ MOV &USERSYS,TOS ; TOS = USERSYS
+ MOV #0,&USERSYS ; clear USERSYS
+ AND #-1,TOS ;
+ JNZ PUC6 ; if TOS <> 0, keep USERSYS value
+ MOV &SYSRSTIV,TOS ; TOS <-- SYSRSTIV <-- 0
+;-------------------------------------------------------------------------------
+; PUC 6: START FORTH engine
+;-------------------------------------------------------------------------------
+PUC6 CALL #INIT_FORTH ; common part of QABORT|PUC
+PUCNEXT .WORD WARM ; no return. May be replaced by XBOOT.
+;-----------------------------------;
+
+;-------------------------------------------------------------------------------
+; INTERPRETER INPUT: ACCEPT KEY EMIT ECHO NOECHO
+;-------------------------------------------------------------------------------
+ FORTHWORD "ACCEPT" ;
; ----------------------------------;
;https://forth-standard.org/standard/core/ACCEPT
;C ACCEPT addr addr len -- addr len' get line at addr to interpret len' chars
MOV @PSP,TOS ;2 -- org ptr )
ADD TOS,W ;1 -- org ptr W=buf_end )
MOV #0Ah,T ;2 T = 'LF' to speed up char loop in part II > prepare stack and registers for TERMINAL_INT use
- MOV #20h,S ;2 S = 'BL' to speed up char loop in part II )
- PUSHM #4,IP ;6 PUSH IP,S,T,W r-- IP, 'BL', 'LF', buf_end )
-;vvvvvvvvvvvvv OPTION vvvvvvvvvvvvvv;
-; BIC.B #LED1,&LED1_DIR ; Red led OFF,
-; BIC.B #LED1,&LED1_OUT ; end of Slave TX
-;^^^^^^^^^^^^^ OPTION ^^^^^^^^^^^^^^;
- JMP SLEEP ; which calls RXON before goto sleep
+ MOV #20h,S ;2 S = 'BL' to speed up char loop in part II )
+ PUSHM #4,IP ;6 PUSH IP,S,T,W R-- IP, 'BL', 'LF', buf_end )
+ JMP SLEEP ;2
; ----------------------------------;
+; As TI says nothing about the reset of the UCSTTIFG flag by the I2C_Slave,
+; it is assumed that it clears it as soon as the first byte has been exchanged.
; **********************************;
-TERMINAL_INT ; <--- START interrupt vector, bus is stalled, waiting ACK first char by I2C_Slave RX
+TERMINAL_INT ; down to LPM4 <--- START interrupt vector, bus is stalled, waiting ACK first char by I2C_Slave RX
; **********************************;
; (ACCEPT) part II under interrupt ; Org Ptr --
; ----------------------------------;
ADD #4,RSP ;1 remove SR and PC from stack, SR flags are lost (unused by FORTH interpreter)
- BIC #WAKE_UP,&TERM_IFG ; clear UCSTTIFG before return to SLEEP (because not cleared by RX_TERM reading)
+ BIC #WAKE_UP,&TERM_IFG ; clear UCSTTIFG before return to SLEEP (instead of RXBUF access to clear it)
BIT #10h,&TERM_CTLW0 ;4 test UCTR
JNZ SLEEP ; if I2C_Master RX, loop back to SLEEP
POPM #4,IP ;6 POPM IP=ret_IP,W=src_end,T=0Ah,S=20h
-;vvvvvvvvvvvvv OPTION vvvvvvvvvvvvvv;
-; BIS.B #LED2,&LED2_OUT ; green led ON,
-; BIS.B #LED2,&LED2_DIR ; start of Slave RX
-;^^^^^^^^^^^^^ OPTION ^^^^^^^^^^^^^^;
QNEWCHAR BIT #RX_TERM,&TERM_IFG ;3 test RX BUF IFG
JZ QNEWCHAR ;2 wait RX BUF full
; ----------------------------------;
JC ASTORETEST ;2 jump if char U>= BL
; ----------------------------------;
CMP.B #8,Y ; char = BS ?
- JNZ QNEWCHAR ; case of all other control chars
+ JNZ QNEWCHAR ; case of all other control chars: skip it
; ----------------------------------;
-; start of backspace ; made only by an human
+; case of backspace ; made only by an human
; ----------------------------------;
CMP @PSP,TOS ; Ptr = Org ?
JZ QNEWCHAR ; yes: do nothing else
SUB #1,TOS ; no : dec Ptr
- JMP QNEWCHAR
+ JMP QNEWCHAR ;
; ----------------------------------;
ASTORETEST CMP W,TOS ; 1 end of buffer is reached ?
- JZ QNEWCHAR ; 2 yes: loopback
+ JC QNEWCHAR ; 2 yes: don't store char @ dst_Ptr, don't increment TOS
MOV.B Y,0(TOS) ; 3 no: store char @ dst_Ptr
ADD #1,TOS ; 1 increment dst_Ptr
- JMP QNEWCHAR
-; ----------------------------------;
-LF_NEXT ; -- Org Ptr
-; ----------------------------------;
- SUB @PSP+,TOS ; -- len'
-; ----------------------------------;
-; MOV #LPMx+GIE,&LPM_MODE ; no need to redefine LPM_MODE because I2C START works down to LPM4 mode
-; ----------------------------------; after the sent of 'LF', I2C_Master automaticaly reSTARTs in RX mode:
- CALL #WAITCHAREND ; wait I2C_Master (re)START RX
-;vvvvvvvvvvvvv OPTION vvvvvvvvvvvvvv;
-; BIC.B #LED2,&LED2_DIR ; green led OFF,
-; BIC.B #LED2,&LED2_OUT ; end of Slave RX
-; BIS.B #LED1,&LED1_DIR ; Red led ON,
-; BIS.B #LED1,&LED1_OUT ; start of Slave TX
-;^^^^^^^^^^^^^ OPTION ^^^^^^^^^^^^^^;
-ACCEPT_EOL CMP #0,&LINE ;
- JZ ACCEPT_END ;
- ADD #1,&LINE ; if LINE <> 0 increment LINE
-ACCEPT_END ;
-; ----------------------------------;
- MOV S,Y ; output a BL on TERMINAL (for the case of error occuring)
+ JMP QNEWCHAR ;
+; ----------------------------------;
+LF_NEXT SUB @PSP+,TOS ; -- len'
+ACCEPT_EOL MOV S,Y ; output a BL on TERMINAL (for the case of error occuring)
JMP YEMIT ; before line interpreting
; **********************************;
; ----------------------------------;
- FORTHWORD "KEY"
+ FORTHWORD "KEY" ;
; ----------------------------------;
; https://forth-standard.org/standard/core/KEY
; KEY -- c wait character from input device ; primary DEFERred word
KEY MOV @PC+,PC ; Code Field Address (CFA) of KEY
PFAKEY .word BODYKEY ; Param Field Address (PFA) of KEY, with its default value
-BODYKEY SUB #2,PSP ; push old TOS..
+BODYKEY MOV.B #1,Y ; KEY request Ctrl_Char = $01
+ CALL #I2C_CTRL_CH ; send it to I2C_Master to restart its UART in RX mode
+ SUB #2,PSP ; push old TOS..
MOV TOS,0(PSP) ; ..onto stack
- MOV.B #1,Y ; KEY request Ctrl_Char = $01
- CALL #I2C_CTRL_CH ; send it to I2C_Master to restart UART in RX mode
BKEYLOOP BIT #RX_TERM,&TERM_IFG ; received char ?
JZ BKEYLOOP ; wait char received
MOV &TERM_RXBUF,TOS ; -- char
+ CALL #RXON ; send Ctrl_Char $00 to I2C_Master to restart its UART in TX mode
BKEYEND MOV @IP+,PC ; -- char
+; ----------------------------------;
; ----------------------------------;
- FORTHWORD "EMIT"
+ FORTHWORD "EMIT" ;
; ----------------------------------;
; https://forth-standard.org/standard/core/EMIT
; EMIT c -- output character to an output device ; primary DEFERred word
EMIT MOV @PC+,PC ;3 Code Field Address (CFA) of EMIT
PFAEMIT .word BODYEMIT ; Parameter Field Address (PFA) of EMIT, with its default value
-BODYEMIT MOV TOS,Y ;1 sends character to the default output TERMINAL
+BODYEMIT
+ MOV TOS,Y ;1 sends character to the default output TERMINAL
MOV @PSP+,TOS ;2
YEMIT BIT #TX_TERM,&TERM_IFG ;3
JZ YEMIT ;2 wait TX buffer empty
-QYEMIT .word 48C2h ;3 48C2h = MOV.B Y,&<next_adr>
- .word TERM_TXBUF ;
+QYEMIT MOV.B Y,&TERM_TXBUF ;3 may be replaced by MOV @IP+,PC with NOECHO
YEMITEND MOV @IP+,PC ;4 11 words
+; ----------------------------------;
; ----------------------------------;
- FORTHWORD "ECHO"
+ FORTHWORD "ECHO" ; connect EMIT to TERMINAL (default)
; ----------------------------------;
-;Z ECHO -- connect EMIT to TERMINAL (default)
ECHO MOV #48C2h,&QYEMIT ; 48C2h = MOV.B Y,&<next_adr>
- MOV #0,&LINE ;
MOV #5,Y ; ECHO request Ctrl_Char = $05
-ECHOEND CALL #I2C_CTRL_CH ; send it to I2C_Master to do it echo char to TERMINAL
- MOV @IP+,PC
+ECHOEND CALL #I2C_CTRL_CH ;
+ MOV @IP+,PC ;
+; ----------------------------------;
; ----------------------------------;
- FORTHWORD "NOECHO"
+ FORTHWORD "NOECHO" ; disconnect EMIT to TERMINAL
; ----------------------------------;
-;Z NOECHO -- disconnect EMIT to TERMINAL
-NOECHO MOV #4D30h,&QYEMIT ; NEXT = 4D30h = MOV @IP+,PC
- MOV #1,&LINE ;
+NOECHO MOV #4D30h,&QYEMIT ; NEXT = 4D30h = MOV @IP+,PC
MOV #4,Y ; NOECHO request Ctrl_Char = $04
- JMP ECHOEND ; send it to I2C_Master, to not do it echo to TERMINAL
+ JMP ECHOEND ;
+; ----------------------------------;
; -*- coding: utf-8 -*-
;
-
; ---------------------------------------
-; TERMINAL driver for FastForth target
+; UART TERMINAL driver for FastForth target
; ---------------------------------------
-; +---------------------------+
-; ------ | +-----------------+ |
-; WIRING | | +--------+ | |
-; ------ | | | | | |
-; FastForth target TXD RXD RTS <--> CTS TXD RXD UARTtoUSB <--> COMx <--> TERMINAL
-; -----------------------------------------------------------------------------------------
-; MSP_EXP430FR5739 P2.0 P2.1 P2.2 PL2303TA TERATERM.EXE
-; MSP_EXP430FR5969 P2.0 P2.1 P4.1 PL2303HXD
-; MSP_EXP430FR5994 P2.0 P2.1 P4.2 CP2102
-; MSP_EXP430FR6989 P3.4 P3.5 P3.0
-; MSP_EXP430FR4133 P1.0 P1.1 P2.3
-; CHIPSTICK_FR2433 P1.4 P1.5 P3.2
-; MSP_EXP430FR2433 P1.4 P1.5 P1.0
+;
+; +---------------------------------------+
+; | +-----------------------------+ |
+; | | +------(option)-----+ | |
+; | | | | | |
+; FastForth target: TXD RXD RTS connected to : CTS TXD RXD of UARTtoUSB <--> COMx <--> TERMINAL
+; ---------------- --- --- --- --- --- --- -------------------------------------
+; MSP_EXP430FR5739 P2.0 P2.1 P2.2 PL2303TA TERATERM.EXE
+; MSP_EXP430FR5969 P2.0 P2.1 P4.1 PL2303HXD/GC
+; MSP_EXP430FR5994 P2.0 P2.1 P4.2 CP2102
+; MSP_EXP430FR6989 P3.4 P3.5 P3.0
+; MSP_EXP430FR4133 P1.0 P1.1 P2.3
+; CHIPSTICK_FR2433 P1.4 P1.5 P3.2
+; MSP_EXP430FR2433 P1.4 P1.5 P1.0
; MSP_EXP430FR2355 P4.3 P4.2 P2.0
; LP_MSP430FR2476 P1.4 P1.5 P6.1
;
;-------------------------------------------------------------------------------
-; UART TERMINAL: QABORT ABORT_TERM COLD_TERM INI_TERM RXON RXOFF
+; UART TERMINAL: QABORT INIT_TERM COLD_TERM
;-------------------------------------------------------------------------------
-; define run-time part of ABORT"
-;Z ?ABORT xi f c-addr u -- abort & print msg.
-; FORTHWORD "?ABORT"
-QABORT CMP #0,2(PSP) ; -- f c-addr u test flag f
- JNZ ABORT_TERM ;
-THREEDROP ADD #4,PSP ; -- u
- MOV @PSP+,TOS ; --
- MOV @IP+,PC ;
-; ----------------------------------;
-ABORT_TERM ; exit from downloading file then reinit some variables via INI_FORTH
-; ----------------------------------;
- CALL #RXON ; PFA resume downloading source file if any
+
+; this define run-time part of ABORT" if f is true display msg. then abort current process
+QABORT CMP #0,2(PSP) ; -- f addr cnt test flag f
+ JNZ ABORT_TERM ; see forthMSP430FR_TERM_xxxx.asm below
+THREEDROP ADD #4,PSP ; -- cnt
+ JMP DROP ;
+; ----------------------------------;
+UART_ABORT_TERM ; exit from downloading, execute INIT_FORTH then display message if any
+; ----------------------------------;
+ABORT_TERM CALL #RXON ; resume downloading source file if any
A_UART_LOOP BIC #RX_TERM,&TERM_IFG ; clear RX_TERM
- MOV &FREQ_KHZ,Y ; 1000, 2000, 4000, 8000, 16000, 240000
-A_USB_LOOPJ MOV #65,X ; 2~ <-------+ linux with minicom seems very very slow...
-A_USB_LOOPI SUB #1,X ; 1~ <---+ | ==> ((65*3)+5)*1000 = 200ms delay
- JNZ A_USB_LOOPI ; 2~ 3~ loop ---+ | to refill its USB buffer
+ MOV &FREQ_KHZ,Y ; 1000, 2000, 4000, 8000, 16000, 24000
+A_USB_LOOPJ MOV #65,X ; 2~ <----+ linux with minicom seems very very slow...
+A_USB_LOOPI SUB #1,X ; 1~ <--+ | to refill its USB buffer
+ JNZ A_USB_LOOPI ; 2~ 3~ loop ---+ |
SUB #1,Y ; 1~ |
- JNZ A_USB_LOOPJ ; 2~ 200~ loop -----+
- BIT #RX_TERM,&TERM_IFG ; 4 new char in TERMRXBUF after A_USB_LOOPJ delay ?
+ JNZ A_USB_LOOPJ ; 2~ 200~ loop -----+ ((65*3)+5)*1000 = 200ms delay
+ BIT #RX_TERM,&TERM_IFG ; 4 new char in TERMRXBUF after 200ms delay ?
JNZ A_UART_LOOP ; 2 yes, the input stream is still active: loop back
- CALL #INI_FORTH ; common ?ABORT|RST, "hybrid" subroutine with return to FORTH interpreter
+ CALL #INIT_FORTH ; common ?ABORT|PUC subroutine
+ ; TOS = cnt (byte), always positive. No RST_RET if cnt = 0.
+ .word DUP ; -- f addr cnt cnt
+ .word QFBRAN,ABORT_END; -- f addr 0 don't force ECHO if ABORT" is an empty string
+ .word ECHO ; -- f addr cnt force ECHO
+ .word XSQUOTE ;
+ .byte 4,27,"[7m" ;
+ .word TYPE ; ESC [7m = set reverse video
; ----------------------------------;
-; display line of error if NOECHO ;
+; Display QABORT|WARM message ; <== WARM jumps here
; ----------------------------------;
- .word lit,LINE,FETCH ; -- f c-addr u line fetch line number before set ECHO !
- .word ECHO ;
+ABORT_TYPE .word TYPE ; -- f type QABORT|WARM message
.word XSQUOTE ;
- .byte 4,27,"[7m" ; type ESC[7m (set reverse video)
- .word TYPE ;
- .word QDUP,QFBRAN ; don't display line if line = 0 (ECHO was ON)
- .word ABORT_TYPE ;
- .word XSQUOTE ; -- f c-addr u line c-addr1 u1 displays the line where error occured
- .byte 15,"LAST.4TH, line " ;
- .word TYPE ; -- f c-addr u line
- .word UDOT ; -- f c-addr u
-; ----------------------------------;
-; Display ABORT|WARM message ; <== WARM jumps here
-; ----------------------------------;
-ABORT_TYPE .word TYPE ; -- f type abort message
- .word XSQUOTE ; -- f c-addr u
.byte 4,27,"[0m" ;
- .word TYPE ; -- f set normal video
- .word ABORT ; without return
+ .word TYPE ; ESC [0m = set normal video
+ABORT_END .word ABORT ; -- f no return
; ----------------------------------;
-; ----------------------------------;
-COLD_TERM ; default STOP_APP: wait TERMINAL idle
-; ----------------------------------;
-UART_COLD_TERM ;
- BIT #1,&TERM_STATW ;3 uart busy ?
- JNZ COLD_TERM ;2 loop back while TERM_UART is busy
- MOV @RSP+,PC ; return to software_BOR
-; ----------------------------------;
+;-------------------------------------------------------------------------------
+; INIT TERMinal then enable I/O
+;-------------------------------------------------------------------------------
; ----------------------------------;
-INIT_TERM ; TOS = RSTIV_MEM
-; ----------------------------------;
UART_INIT_TERM ;
- CMP #2,TOS ;
- JNC UART_INIT_TERM_END ; no INIT_TERM if RSTIV_MEM U< 2 (WARM|ABORT)
; ----------------------------------;
- MOV #0081h,&TERM_CTLW0 ; UC SWRST + UCLK = SMCLK
+INIT_TERM
+ CALL #WAIT_UART_IDLE ; wait while TERM_UART is busy
+ MOV #0081h,&TERM_CTLW0 ; 8 bits, UC SWRST + UCLK = SMCLK, max 6MBds
+; MOV #1081h,&TERM_CTLW0 ; 7 bits, UC SWRST + UCLK = SMCLK, max 4MBds
MOV &TERMBRW_RST,&TERM_BRW ; init value in FRAM INFO
MOV &TERMMCTLW_RST,&TERM_MCTLW ; init value in FRAM INFO
BIS.B #BUS_TERM,&TERM_SEL ; Configure pins TERM_UART|TERM_I2C
BIC #1,&TERM_CTLW0 ; release UC_TERM from reset...
BIS #WAKE_UP,&TERM_IE ; then enable interrupt for wake up on terminal input
BIC #LOCKLPM5,&PM5CTL0 ; activate all previous I/O settings.
-UART_INIT_TERM_END
MOV @RSP+,PC ; RET
; ----------------------------------;
-
-; ----------------------------------;
-UART_RXON JMP RXON_EXE ; Software and/or hardware flow control, to start Terminal UART for one line
-; ----------------------------------;
-
; ----------------------------------;
-RXOFF ; Software and/or hardware flow control, to stop Terminal UART comunication
-; ----------------------------------;
-UART_RXOFF ;
- .IFDEF TERMINAL3WIRES ; first software flow control
-RXOFF_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char
- JZ RXOFF_LOOP ;2
- MOV #19,&TERM_TXBUF ;4 move XOFF char into TX_buf
- .ENDIF ;
- .IFDEF TERMINAL4WIRES ; and hardware flow control after
- BIS.B #RTS,&HANDSHAKOUT ;3 set RTS high
- .ENDIF ;
- MOV @RSP+,PC ;4 to CR_NEXT, ...or user defined
+UART_COLD_TERM ; default STOP_APP: wait TERMINAL idle
; ----------------------------------;
-
+WAIT_UART_IDLE
+COLD_TERM BIT #1,&TERM_STATW ;3 uart busy ?
+ JNZ COLD_TERM ;2 loop back while TERM_UART is busy
; ----------------------------------;
-RXON ; default BACKGND_APP
+UART_INIT_SOFT ;
; ----------------------------------;
-RXON_EXE
+INIT_SOFT_TERM
+ MOV @RSP+,PC ; does nothing
; ----------------------------------;
- .IFDEF TERMINAL3WIRES ; first software flow control
-RXON_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char, useless at high baudrates
- JZ RXON_LOOP ;2
- MOV #17,&TERM_TXBUF ;4 move char XON into TX_buf
- .ENDIF ;
- .IFDEF TERMINAL4WIRES ; and hardware flow control after
- BIC.B #RTS,&HANDSHAKOUT ;3 set RTS low
- .ENDIF ;
- MOV @RSP+,PC ;4 to BACKGND (End of file download or quiet input) or AKEYREAD...
-; ----------------------------------; ... (get next line of file downloading), or user defined
-
;-------------------------------------------------------------------------------
-; UART TERMINAL : WIPE COLD WARM ACCEPT KEY EMIT ECHO NOECHO
+; UART TERMINAL : WARM SYS COLD RESET
;-------------------------------------------------------------------------------
;-----------------------------------;
- FORTHWORD "WIPE" ; software DEEP_RESET
+; FORTHWORD "WARM" ; (n) --
+;-----------------------------------; thanks to INIT_FORTH, WARM implements the choice
+UART_WARM ; made by the user with SYS|hardwareRST|DEEP_reset
+;-----------------------------------; regarding the state of the software.
+WARM CALL &HARD_APP ;
+ mASM2FORTH ;
+ .word ECHO ;
+ .word XSQUOTE
+ .byte 7,13,10,27,"[7m#" ; CR + cmd "reverse video" + #
+ .word TYPE
+ .word DOT ; display TOS = USERSYS value
+ .word XSQUOTE
+ .byte 25,"FastForth ",169,"J.M.Thoorens, "
+ .word TYPE
+ .word LIT,FRAM_FULL
+ .word HEREXEC,MINUS,UDOT
+ .word XSQUOTE
+ .byte 10,"bytes free"
+ .word BRAN,ABORT_TYPE ; without return
;-----------------------------------;
-WIPE MOV #-1,&RSTIV_MEM ; negative value ==> DEEP_RESET
- JMP COLD
;-----------------------------------;
- FORTHWORD "COLD"
+ FORTHWORD "SYS" ; n -- software RST, DEEP_RST, COLD, WARM
;-----------------------------------;
-;Z COLD -- performs a software RESET
+ CMP #0,TOS ;
+ JL SYSEND ; if -n SYS ==> COLD + DEEP_RESET
+ JZ NOPUC ; if [0] SYS ==> INIT_FORTH --> WARM --> WARM display
+ BIT #1,TOS ;
+ JNC SYSEND ; if +n SYS (+n even)
+NOPUC PUSH #WARM ;
+ PUSH RSP ; Push address of WARM address
+ JMP INIT_FORTH ; if +n SYS (+n odd) ==> INIT_FORTH --> WARM --> WARM display
+SYSEND MOV TOS,&USERSYS ; ==> COLD --> PUC --> INIT_FORTH --> WARM --> WARM display
+;===============================================================================
+COLD ; <--- USER_NMI vector <--- <RESET> and <RESET> + <SW1> (DEEP_RESET)
+;===============================================================================
; as pin RST is replaced by pin NMI, RESET by pin activation is redirected here via USER NMI vector
; that allows actions to be performed before executing software BOR.
-COLD CALL @PC+ ; COLD first calls STOP_APP, in this instance: CALL #COLD_TERM by default
-PFACOLD .word COLD_TERM ; INI_COLD_DEF: default value set by WIPE. see forthMSP430FR_TERM_xxxx.asm
- BIT.B #IO_WIPE,&WIPE_IN ; hardware Deep_RESET request (low) ?
+ CALL &COLD_APP ; to stop APPlication before reset
+ BIT.B #SW1,&SW1_IN ; <SW1> pressed ?
JNZ COLDEXE ; no
- MOV #-1,&RSTIV_MEM ; yes, set negative value to force DEEP_RESET
-COLDEXE MOV #0A504h,&PMMCTL0 ; performs software_BOR --> RST_vector --> RESET in forthMSP430FR.asm
-; ----------------------------------;
-
-;-----------------------------------;
- FORTHWORD "WARM" ;
-;-----------------------------------;
-;Z WARM xi -- ; common part of WARM|PUC
-;-----------------------------------;
-WARM ;
+ MOV #-1,&USERSYS ; yes, set negative value to force DEEP_RESET
+COLDEXE MOV #0A504h,&PMMCTL0 ; performs software_BOR ------------------------+
+;=============================================================================== |
+RESET ; <-- RST vect. <-- SYS_failures PUC POR BOR <--+
+;===============================================================================
+; PUC 1: replace pin RESET by pin NMI, stops WDT_RESET
;-------------------------------------------------------------------------------
-; PUC 7: if RSTIV_MEM <> WARM, init TERM and enable I/O
+ BIS #3,&SFRRPCR ; pin NMI with falling edge replaces pin RST, so SYSRSTIV = 4
+ BIS #10h,&SFRIE1 ; enable NMI pin interrupt ==> hardware RESET is redirected to COLD.
+ MOV #5A80h,&WDTCTL ; disable WDT RESET
;-------------------------------------------------------------------------------
- CALL @PC+ ; init TERM, only if TOS U>= 2 (RSTIV_MEM <> WARM)
- .IFNDEF SD_CARD_LOADER ;
-PFAWARM .word INIT_TERM ; INI_HARD_APP default value, init TERM UC, unlock I/O's, TOS = RSTIV_MEM
- .ELSE
-PFAWARM .word INI_HARD_SD ; init SD Card + init TERM, see forthMSP430FR_SD_INIT.asm
- .ENDIF ; TOS = RSTIV_MEM
+; PUC 2: INIT STACK
+;-------------------------------------------------------------------------------
+ MOV #PSTACK,PSP ; init parameter stack
+ MOV #RSTACK,RSP ; init return stack
+;-------------------------------------------------------------------------------
+; PUC 3: I/O, RAM, RTC, CS, SYS initialisation limited to FastForth usage.
+; All unused I/O are set as input with pullup resistor.
+;-------------------------------------------------------------------------------
+ .include "TargetInit.asm" ; include target specific init code
+;-------------------------------------------------------------------------------
+; PUC 4: init RAM to 0
+;-------------------------------------------------------------------------------
+ MOV #RAM_LEN,X ; 2 RAM_LEN must be even and > 1, obviously.
+INITRAMLOOP SUB #2,X ; 1
+ MOV #0,RAM_ORG(X) ; 3
+ JNZ INITRAMLOOP ; 2 6 cycles loop !
+;-------------------------------------------------------------------------------
+; PUC 5: GET SYSRSTIV and SYS_USER
+;-------------------------------------------------------------------------------
+ MOV &SYSRSTIV,X ; X <-- SYSRSTIV <-- 0
+ MOV &USERSYS,TOS ; TOS = USERSYS
+ MOV #0,&USERSYS ; clear USERSYS
+ AND #-1,TOS ;
+ JNZ PUC6 ; if TOS <> 0, keep USERSYS value
+ MOV X,TOS ; TOS <-- SYSRSTIV
+;-------------------------------------------------------------------------------
+; PUC 6: START FORTH engine
+;-------------------------------------------------------------------------------
+PUC6 CALL #INIT_FORTH ; common part of QABORT|PUC
+PUCNEXT .WORD WARM ; no return. May be redirected by BOOT.
;-----------------------------------;
-WARM_DISPLAY ; TOS = RSTIV_MEM value
- ASMtoFORTH ; display a message then goto QUIT, without return
- .word XSQUOTE
- .byte 7,13,10,27,"[7m#" ; CR + cmd "reverse video" + #
- .word TYPE
- .word DOT ; display TOS = RSTIV_MEM value
- .word XSQUOTE
- .byte 25,"FastForth ©J.M.Thoorens "
- .word TYPE
- .word LIT,FRAM_FULL,HERE,MINUS,UDOT
- .word XSQUOTE
- .byte 10,"bytes free"
- .word BRAN,ABORT_TYPE
-; ----------------------------------;
-;-----------------------------------;
- FORTHWORD "ACCEPT"
+;-------------------------------------------------------------------------------
+; INTERPRETER INPUT: ACCEPT KEY EMIT ECHO NOECHO
+;-------------------------------------------------------------------------------
+ FORTHWORD "ACCEPT" ;
;-----------------------------------;
;https://forth-standard.org/standard/core/ACCEPT
-;C ACCEPT addr addr len -- addr len' from REFILL, get line at addr to interpret len' chars
+;C ACCEPT addr addr len -- addr len' get line at addr to interpret len' chars
ACCEPT MOV @PC+,PC ;3 Code Field Address (CFA) of ACCEPT
PFAACCEPT .word BODYACCEPT ; Parameter Field Address (PFA) of ACCEPT
-BODYACCEPT ; BODY of ACCEPT = default execution of ACCEPT
; ----------------------------------;
-; ACCEPT part I prepare TERMINAL_INT; this version allows to RX one char (LF) after sending XOFF
+; ACCEPT part I prepare TERMINAL_INT; this version allows to RX one char (LF) after sending XOFF
; ----------------------------------;
- MOV TOS,Y ;1 -- addr len
+BODYACCEPT MOV TOS,Y ;1 -- org len Y = len
MOV @PSP,TOS ;2 -- org ptr
- ADD TOS,Y ;1 -- org ptr Y = buf_end )
- MOV #0Dh,X ;2 X = 'CR' to speed up char loop in part II )
- MOV #20h,W ;2 W = 'BL' to speed up char loop in part II >
- MOV #YEMIT_NEXT,T ;2 T = return for QYEMIT )
- MOV #CR_NEXT,S ;2 S = CR_NEXT )
+ ADD TOS,Y ;1 -- org ptr Y = buf_end
+ MOV #0Dh,X ;2 X = 'CR' to speed up char loop in part II
+ MOV #20h,W ;2 W = 'BL' to speed up char loop in part II
+ MOV #YEMIT_NEXT,T ;2 T = return for QYEMIT
+ MOV #CR_NEXT,S ;2 S = CR_NEXT
PUSHM #6,IP ;8 PUSHM IP,S,T,W,X,Y r-- ACCEPT_ret CR_NEXT YEMIT_NEXT BL CR buf_end
- JMP SLEEP ;2 which calls RXON before falling down to LPMx mode
+ JMP SLEEP ;2 send RXON then shut down to LPM0 sleeping mode
; ----------------------------------;
; **********************************;
-TERMINAL_INT ; <--- TEMR RX interrupt vector, delayed by the LPMx wake up time
+TERMINAL_INT ; <--- TERM RX buffer full interrupt vector, delayed by the LPM0 wake up time
; **********************************; if wake up time increases, max bauds rate decreases...
-; ACCEPT part II under interrupt ; Org Ptr -- len'
+; ACCEPT part II under interrupt ; Org Ptr -- len' all SR flags are cleared
; ----------------------------------;
- ADD #4,RSP ;1 remove SR and PC from stack, cleared flags: V SCG1 OSCOFF CPUOFF GIE N Z C
- POPM #4,IP ;6 POPM W=buffer_bound, T=0Dh, S=20h, IP=YEMIT_NEXT r-- ACCEPT_ret CR_NEXT
+ ADD #4,RSP ;1 remove SR and PC from stack
+ POPM #4,IP ;6 POPM W=buffer_bound, T=0Dh, S=20h, IP=YEMIT_NEXT r-- ACCEPT_ret CR_NEXT
; ----------------------------------;
AKEYREAD MOV.B &TERM_RXBUF,Y ;3 read character into Y, RX_TERM is cleared
; ----------------------------------;
CMP.B T,Y ;1 CR ?
- JZ RXOFF ;2 then RET to CR_NEXT
- CMP.B S,Y ;1 printable char ?
+ JNZ AKEYRDNNEXT ;2 no
+; ----------------------------------;
+RXOFF ; Software|hardware flow control to stop RX UART r-- ACCEPT_ret CR_NEXT
+; ----------------------------------;
+ .IFDEF TERMINAL3WIRES ; first software flow control
+RXOFF_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char
+ JZ RXOFF_LOOP ;2
+ MOV #19,&TERM_TXBUF ;4 move XOFF char into TX_buf
+ .ENDIF ;
+ .IFDEF TERMINAL4WIRES ; and hardware flow control after
+ BIS.B #RTS,&HANDSHAKOUT ;3 set RTS high
+ .ENDIF ;
+ MOV @RSP+,PC ;4 to CR_NEXT
+; ----------------------------------;
+AKEYRDNNEXT CMP.B S,Y ;1 printable char ?
JC ASTORETEST ;2 yes
; ----------------------------------;
CMP.B #8,Y ;1 char = BS ?
CMP @PSP,TOS ; Ptr = Org ?
JZ WAITaKEY ; yes: do nothing
SUB #1,TOS ; no : dec Ptr
- JMP YEMIT ; don't store BS
+ JMP YEMIT ; don't store BS, return to YEMIT_NEXT
; ----------------------------------;
ASTORETEST CMP W,TOS ; 1 Bound is reached ?
- JZ YEMIT ; 2 yes: don't store char @ Ptr
+ JC YEMIT ; 2 yes: don't store char @ Ptr, don't increment TOS
MOV.B Y,0(TOS) ; 3 no: store char @ Ptr
ADD #1,TOS ; 1 increment Ptr
; ----------------------------------;
YEMIT1 BIT.B #CTS,&HANDSHAKIN ; 3 CTS is pulled low if unwired.
JNZ YEMIT1 ; 2
.ENDIF ;
-QYEMIT .word 48C2h ; 48C2h = MOV.B Y,&<next_adr>
- .word TERM_TXBUF ; 3
+QYEMIT MOV.B Y,&TERM_TXBUF ; 3 may be replaced by MOV @IP+,PC with NOECHO
MOV @IP+,PC ; 4
; ----------------------------------;
YEMIT_NEXT .word $+2 ; 0 YEMII NEXT address
JNZ AKEYREAD ; 2 yes, loop = 34~/31~ by char (with/without echo) ==> 294/322 kBds/MHz
JMP WAITaKEY ; 2 no
; ----------------------------------;
-
-; ----------------------------------;
-; return of RXOFF ; --- Org Ptr r-- ACCEPT_NEXT
+; return of RXOFF ; --- Org Ptr R-- ACCEPT_NEXT
; ----------------------------------;
CR_NEXT SUB @PSP+,TOS ; -- len'
- MOV @RSP+,IP ;
-; ----------------------------------;
- MOV #LPM0+GIE,&LPM_MODE ; reset LPM_MODE to default mode LPM0 for next line of input stream
-; ----------------------------------;
+ MOV @RSP+,IP ; R--
WAITLF BIT #RX_TERM,&TERM_IFG ; char 'LF' is received ?
JZ WAITLF ; no
- MOV.B &TERM_RXBUF,Y ; yes, clear RX_int flag after LF received
-; ----------------------------------;
-ACCEPT_EOL CMP #0,&LINE ; if LINE <> 0 increment LINE
- JZ ACCEPT_END ;
- ADD #1,&LINE ;
-ACCEPT_END
+ MOV.B &TERM_RXBUF,Y ; yes, clear RX_IFG flag after LF received
; ----------------------------------;
- MOV S,Y ; output a BL on TERMINAL (for the case of error occuring)
- JMP YEMIT ; before return to ABORT to interpret line
-; **********************************; UF9 to UF11 are reset.
+ACCEPT_EOL MOV S,Y ; output a BL on TERMINAL (for the case of error occuring)
+ JMP YEMIT ; before return to QUIT to interpret line
+; **********************************; UF9 to UF11 will be resetted.
;-----------------------------------;
FORTHWORD "KEY"
; KEY -- c wait character from input device ; primary DEFERred word
KEY MOV @PC+,PC ;4 Code Field Address (CFA) of KEY
PFAKEY .word BODYKEY ; Parameter Field Address (PFA) of KEY, with default value
-BODYKEY SUB #2,PSP ;1 push old TOS..
+BODYKEY PUSH #KEYNEXT ;
+; ----------------------------------;
+RXON ; default BACKGND_APP
+; ----------------------------------;
+ .IFDEF TERMINAL3WIRES ; first software flow control
+RXON_LOOP BIT #TX_TERM,&TERM_IFG ;3 wait the sending of last char, useless at high baudrates
+ JZ RXON_LOOP ;2
+ MOV #17,&TERM_TXBUF ;4 move char XON into TX_buf
+ .ENDIF ;
+ .IFDEF TERMINAL4WIRES ; and hardware flow control after
+ BIC.B #RTS,&HANDSHAKOUT ;3 set RTS low
+ .ENDIF ;
+ MOV @RSP+,PC ;4 to BACKGND (End of file download or quiet input) or AKEYREAD...
+; ----------------------------------; ... (get next line of file downloading), or user defined
+KEYNEXT SUB #2,PSP ;1 push old TOS..
MOV TOS,0(PSP) ;3 ..onto stack
- CALL #RXON
KEYLOOP BIT #RX_TERM,&TERM_IFG ; loop if bit0 = 0 in interupt flag register
JZ KEYLOOP ;
- MOV &TERM_RXBUF,TOS ;
CALL #RXOFF ;
+ MOV &TERM_RXBUF,TOS ;
MOV @IP+,PC
;-----------------------------------;
;-----------------------------------;
;Z ECHO -- connect terminal output (default)
ECHO MOV #48C2h,&QYEMIT ; 48C2h = MOV.B Y,&<next_adr>
- MOV #0,&LINE ;
MOV @IP+,PC
;-----------------------------------;
;-----------------------------------;
;Z NOECHO -- disconnect terminal output
NOECHO MOV #4D30h,&QYEMIT ; NEXT = 4D30h = MOV @IP+,PC
- MOV #1,&LINE ;
MOV @IP+,PC
+
; PR2 - TEST
; PR3 - VCC
; PR4 - UART0 RX
-; PR5 - UART0 TX
+; PR5 - UART0 TX
; PR6 - /RST
; ChipStick Header PL1
; P2 - 20 - P3.2
; P3 - 4 - P1.5 UCA0 RX/SOMI
; P4 - 3 - P1.4 UCA0 TX/SIMO
-; P5 - 5 - P1.6 UCA0 CLK
-; P6 - 13 - P2.3
+; P5 - 5 - P1.6 UCA0 CLK
+; P6 - 13 - P2.3
; P7 - 12 - P3.0
; P8 - 7 - P1.0 UCB0 STE
; P9 - 8 - P1.1 UCB0 CLK
; P3.1 - LED1
; P2.1 - PL2.2 - SW1
-; P2.0 - PL2.3 - SW2
+; P2.0 - PL2.3 - SW2
-; +--4k7-< DeepRST <-- GND
+; +--4k7-< DeepRST <-- GND
; |
; P1.4 - UCA0 TXD PL1.4 - <-+-> RX UARTtoUSB bridge
; P1.5 - UCA0 RXD PL1.3 - <---- TX UARTtoUSB bridge
; P1.1 - UCB0 CLK PL1.9 - ----> CLK SPI_RAM
; P1.2 - UCB0 SIMO PL1.10 - ----> SI SPI_RAM
; P1.3 - UCB0 SOMI PL2.10 - <---- S0 SPI_RAM
-
-
+
+
; P1.1 - UCB0 CLK PL1.9 - ----> SD_CLK
; P1.2 - UCB0 SIMO PL1.10 - ----> SD_SDI
; P1.3 - UCB0 SOMI PL2.10 - <---- SD_SDO
; P2.3 - PL1.6 - <---- SD_CD (Card Detect)
; P2.2 - PL2.9 - ----> SD_CS (Card Select)
-
+
; P1.2 - UCB0 SDA PL1.10 - <---> SDA I2C Slave
; P1.3 - UCB0 SCL PL2.10 - ----> SCL I2C Slave
-
+
; P2.2 - PL2.9 - ----> SCL I2C SoftMaster
; P2.0 - PL2.3 - <---> SDA I2C SoftMaster
-
-; P1.0 - UCB0 STE PL1.8 - <---- TSSOP32236 (IR RC5)
+
+; P1.0 - UCB0 STE PL1.8 - <---- TSSOP32236 (IR RC5)
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : I/O
MOV #-1,&PAOUT ; OUT1 for all pins
BIS #-1,&PAREN ; all pins with pull resistors
-
+
; PORT1 usage
.IFDEF UCB0_TERM ;
TERM_IN .equ P1IN
TERM_SEL .equ P1SEL0
TERM_REN .equ P1REN
-TXD .equ 10h ; P1.4 = TXD + FORTH Deep_RST pin
+TXD .equ 10h ; P1.4
RXD .equ 20h ; P1.5
BUS_TERM .equ 30h
.ENDIF
-WIPE_IN .equ P1IN
-IO_WIPE .equ 10h ; P1.4 = FORTH Deep_RST pin
+SW1_IN .equ P1IN
+SW1 .equ 10h ; P1.4 = FORTH Deep_RST pin
.IFDEF UCA0_SD
BUS_SD .equ 0070h ; pins P1.4,P1.5,P1.6
CD_SD .equ 8 ; P2.3 as Card Detect
SD_CDIN .equ P2IN
-CS_SD .equ 4 ; P2.2 as Card Select
+CS_SD .equ 4 ; P2.2 as Card Select
SD_CSOUT .equ P2OUT
SD_CSDIR .equ P2DIR
CTS .equ 1 ; P3.0
RTS .equ 4 ; P3.2
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; CTS is not used by FORTH terminal
; configure RTS as output high to disable RX TERM during start FORTH
MOV.B #0FDh,&P3OUT ; all pins with pullup resistors and LED1 = output low
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P3DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P3OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
; POWER ON RESET SYS config
; ----------------------------------------------------------------------
-; SYS code
+; SYS code
; BIC #1,&SYSCFG0 ; enable write program in FRAM
MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
; CS code for EXP430FR2433
-; to measure REFO frequency, output ACLK on P2.2:
+; to measure REFO frequency, output ACLK on P2.2:
; BIS.B #4,&P2SEL1
; BIS.B #4,&P2DIR
; result : REFO = 32.69kHz
-; ===================================================================
-; need to adjust FLLN (and DCO) for each device of MSP430fr2xxx family ?
-; (no problem with MSP430FR5xxx families without FLL).
-; ===================================================================
-
- .IF FREQUENCY = 0.25
-
- MOV #0D6h,&CSCTL0 ; preset DCO = 0xD6 (measured value @ 0x180 ; to measure, type 0x180 @ U.)
-
- MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #200Dh,&CSCTL2 ; Set FLLD=2 (DCOCLKCDIV=DCO/4),set FLLN=0Dh
- ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
-; MOV #200Eh,&CSCTL2 ; Set FLLD=2 (DCOCLKCDIV=DCO/4),set FLLN=0Eh
- ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
- MOV #200Fh,&CSCTL2 ; Set FLLD=2 (DCOCLKCDIV=DCO/4),set FLLN=0Fh
- ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
-; =====================================
- MOV #4,X
-
- .ELSEIF FREQUENCY = 0.5
-
- MOV #0D6h,&CSCTL0 ; preset DCO = 0xD6 (measured value @ 0x180 ; to measure, type 0x180 @ U.)
-
- MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
- ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
-; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
- ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
- MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
- ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
-; =====================================
- MOV #8,X
-
- .ELSEIF FREQUENCY = 1
-
- MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
-
- MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
- ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
- MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
- ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
-; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
- ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
-; =====================================
- MOV #16,X
-
+ .IFDEF LF_XTAL
+; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
+ MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
+ BIS.B #03,&P2SEL0 ; P2.0 as XOUT, P2.1 as XIN
+ .ELSE
+ BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
+ MOV #0200h,&CSCTL4 ; ACLOCK select VLOCLK, MCLK & SMCLK select DCOCLKDIV (default value)
+ .ENDIF
+ BIC.B #-1,&CSCTL1 ; clear DCORSEL (Set 1MHZ DCORSEL), DCOFTRIM=0, ENable MODulation to reduce EMI
+ .IF FREQUENCY = 1 ; nothing else to do
.ELSEIF FREQUENCY = 2
-
- MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
-
- MOV #0003h,&CSCTL1 ; Set 2MHZ DCORSEL,disable DCOFTRIM,Modulation
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
- ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
-; MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
- ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
- MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
- ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
-; =====================================
- MOV #32,X
-
+ BIS.B #2,&CSCTL1 ; Set 2MHZ DCORSEL
.ELSEIF FREQUENCY = 4
-
- MOV #00D2h,&CSCTL0 ; preset DCO = 0xD2 (measured value @ 0x180)
-
- MOV #0005h,&CSCTL1 ; Set 4MHZ DCORSEL,disable DCOFTRIM,Modulation
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
- ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
-
- MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
- ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
-
-; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
- ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
-; =====================================
- MOV #64,X
-
+ BIS.B #4,&CSCTL1 ; Set 4MHZ DCORSEL
.ELSEIF FREQUENCY = 8
-
-
- MOV #00F3h,&CSCTL0 ; preset DCO = 0xF2 (measured value @ 0x180)
-
- MOV #0007h,&CSCTL1 ; Set 8MHZ DCORSEL,disable DCOFTRIM,Modulation
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
- ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
-; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
- ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
-; MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
- ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
-
-; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
- ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
-
-; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
-; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
-; ===================================================================
-; CHIPSTICK_FR2433 : TLV area corrupted when welding ?
-; ===================================================================
- MOV #00FCh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FCh
- ; fCOCLKDIV = 32768 x (252+1) = 8.290 MHz <============ why ?
-
-; =====================================
- MOV #128,X
-
+ BIS.B #6,&CSCTL1 ; Set 8MHZ DCORSEL
+ .ELSEIF FREQUENCY = 12
+ BIS.B #8,&CSCTL1 ; Set 12MHZ DCORSEL
.ELSEIF FREQUENCY = 16
-
- MOV #0129h,&CSCTL0 ; preset DCO = 0x129 (measured value @ 0x180)
-
- MOV #000Bh,&CSCTL1 ; Set 16MHZ DCORSEL,disable DCOFTRIM,Modulation
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
- ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
-; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
-; MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
- MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
-; =====================================
- MOV #256,X
-
+ BIS.B #10,&CSCTL1 ; Set 16MHZ DCORSEL
.ELSEIF
- .error "bad frequency setting, only 0.5,1,2,4,8,16 MHz"
- .ENDIF
-
-
- .IFDEF LF_XTAL
-; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
- MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
-
- BIS.B #03,&P2SEL0 ; P2.0 as XOUT, P2.1 as XIN
-
- .ELSE
- BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
-; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
+ .error "bad frequency setting, only 1,2,4,8,12,16 MHz"
.ENDIF
-
-ClockWaitX MOV #4375,Y ; wait 0.42s before starting after POR
- ; ...because FLL lock time = 280 ms
+; MOV #INT(FREQUENCY*1000000/32768)-1,&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight lower
+ MOV #INT(FREQUENCY*1000000/32768),&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight upper
+ MOV #128,X ; 128* 3 ms = 384 ms delay, because FLL lock time = 280 ms
+ClockWaitX MOV &FREQ_KHZ,Y ;
ClockWaitY SUB #1,Y ;1
- JNZ ClockWaitY ;2 4375x3 = 13125 cycles delay = 13.125ms @ 1MHz
- SUB #1,X ; x 32 @ 1 MHZ = 330ms
+ JNZ ClockWaitY ;2 FREQ_KHZ x 3 ==> 3ms
+ SUB #1,X ;
JNZ ClockWaitX ;
-
-;WAITFLL BIT #300h,&CSCTL7 ; wait FLL lock
-; JNZ WAITFLL
-
\.f=\.4th for ChipStick_FR2433! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
! P3.1 - LED1
!
! P2.1 - PL2.2 - SW1
-! P2.0 - PL2.3 - SW2
+! P2.0 - PL2.3 - SW2
!
-! +--4k7-< DeepRST <-- GND
+! +--4k7-< DeepRST <-- GND
! |
! P1.4 - UCA0 TXD PL1.4 - <-+-> RX UARTtoUSB bridge
! P1.5 - UCA0 RXD PL1.3 - <---- TX UARTtoUSB bridge
! P1.1 - UCB0 CLK PL1.9 - ----> CLK SPI_RAM
! P1.2 - UCB0 SIMO PL1.10 - ----> SI SPI_RAM
! P1.3 - UCB0 SOMI PL2.10 - <---- S0 SPI_RAM
-!
-!
+!
+!
! P1.1 - UCB0 CLK PL1.9 - ----> SD_CLK
! P1.2 - UCB0 SIMO PL1.10 - ----> SD_SDI
! P1.3 - UCB0 SOMI PL2.10 - <---- SD_SDO
! P2.3 - PL1.6 - <---- SD_CD (Card Detect)
! P2.2 - PL2.9 - ----> SD_CS (Card Select)
-!
+!
! P1.2 - UCB0 SDA PL1.10 - <---> SDA I2C Slave
! P1.3 - UCB0 SCL PL2.10 - ----> SCL I2C Slave
-!
+!
! P2.2 - PL2.9 - ----> SCL I2C SoftMaster
! P2.0 - PL2.3 - <---> SDA I2C SoftMaster
-!
-! P1.0 - UCB0 STE PL1.8 - <---- TSSOP32236 (IR RC5)
+!
+! P1.0 - UCB0 STE PL1.8 - <---- TSSOP32236 (IR RC5)
! ============================================
! FORTH I/O :
! ============================================
-!TERMINAL
+!TERMINAL
BUS_TERM=\$30! ; P1.4 = TX, P1.5 = RX
TERM_IN=\$200!
TERM_VEC=\$FFE4! \ UCA0
WAKE_UP=1! \ RX int
-TERM_CTLW0=\$500! \ eUSCI_A control word 0
-TERM_CTLW1=\$502! \ eUSCI_A control word 1
-TERM_BRW=\$506!
-TERM_BR0=\$506! \ eUSCI_A baud rate 0
-TERM_BR1=\$507! \ eUSCI_A baud rate 1
-TERM_MCTLW=\$508! \ eUSCI_A modulation control
-TERM_STATW=\$50A! \ eUSCI_A status
-TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
-TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
-TERM_ABCTL=\$510! \ eUSCI_A LIN control
-TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
-TERM_IE=\$51A! \ eUSCI_A interrupt enable
-TERM_IFG=\$51C! \ eUSCI_A interrupt flags
-TERM_IV=\$51E! \ eUSCI_A interrupt vector word
+TERM_CTLW0=\$500! \ eUSCI_A control word 0
+TERM_CTLW1=\$502! \ eUSCI_A control word 1
+TERM_BRW=\$506!
+TERM_BR0=\$506! \ eUSCI_A baud rate 0
+TERM_BR1=\$507! \ eUSCI_A baud rate 1
+TERM_MCTLW=\$508! \ eUSCI_A modulation control
+TERM_STATW=\$50A! \ eUSCI_A status
+TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
+TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
+TERM_ABCTL=\$510! \ eUSCI_A LIN control
+TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
+TERM_IE=\$51A! \ eUSCI_A interrupt enable
+TERM_IFG=\$51C! \ eUSCI_A interrupt flags
+TERM_IV=\$51E! \ eUSCI_A interrupt vector word
RTS=4! ; P3.2
CTS=1! ; P3.0
LED1=\$02! P3.1
SW1_IN=\$201!
-SW1=\$02! P2.1
+SW1=\$02! P2.1
WIPE_IN=\$201!
-IO_WIPE=\$02! P2.1
+IO_WIPE=\$02! P2.1
SW2_IN=\$201!
SW2=\$01! P2.0
-IR_IN=\$200!
-IR_OUT=\$202!
-IR_DIR=\$204!
-IR_REN=\$208!
+IR_IN=\$200!
+IR_OUT=\$202!
+IR_DIR=\$204!
+IR_REN=\$208!
IR_IES=\$218!
IR_IE=\$21A!
IR_IFG=\$21C!
I2CSM_REN=\$207!
SMSDA=\$01! P2.0
SMSCL=\$04! P2.2
-SM_BUS=\$05!
+SM_BUS=\$05!
I2CSMM_IN=\$201!
I2CSMM_OUT=\$203!
I2CSMM_REN=\$207!
SMMSDA=\$01! P2.0
SMMSCL=\$04! P2.2
-SMM_BUS=\$05!
+SMM_BUS=\$05!
I2CMM_IN=\$200!
I2CMM_OUT=\$202!
CD_SD=8! ; P2.3 as Card Detect
SD_CDIN=\$201!
-CS_SD=4! ; P2.2 as Card Select
+CS_SD=4! ; P2.2 as Card Select
SD_CSOUT=\$203!
SD_CSDIR=\$205!
PSP=R15!
! forth words filter
-D\.R=D\.R
-
-M\*=M\*
-M\+=M\+
-
+\"\s*\"=\"\s*\"! ." xxxx" filter
+S\"\s*\"=S\"\s*\"! S" xxxx" filter
+s\"\s*\"=S\"\s*\"! s" xxxx" filter
+\(\s*\)=\(\s*\)! ( xxxx) and .( xxxx) filter
+abort\"\s*\"=ABORT\"\s*\"! abort" xxxx" filter
+ABORT\"\s*\"=ABORT\"\s*\"! ABORT" xxxx" filter
+!
+D\.R=D\.R!
+!
+M\*=M\*!
+M\+=M\+!
+!
R\>=R\>!
R\@=R\@!
\>R=\>R!
-
+!
S\>=S\>!
\>S=\>S!
S\<=S\<!
S\>\==S\>\=!
\.S=\.S!
-S\"=S\"!
-S\_=S\_!
-
+\s\_=\S\_! s_ filter
+\S\_=\S\_! S_ filter
+!
\<\#=\<\#!
\#S=\#S!
\#\>=\#\>!
-
+!
T\{=T\{!
\}T=\}T!
-
+!
U\.R=U\.R!
-
+!
! ASCII numbers interpreter complement
-\'NUL\'=\$00!
-\'SOH\'=\$01!
-\'STX\'=\$02!
-\'ETX\'=\$03!
-\'EOT\'=\$04!
-\'ENQ\'=\$05!
-\'ACK\'=\$06!
-\'BEL\'=\$07!
-\'BS\'=\$08! Backspace
-\'HT\'=\$09! Horizontal Tabulation
-\'LF\'=\$0A!
-\'VT\'=\$0B!
-\'FF\'=\$0C!
-\'CR\'=\$0D!
-\'SO\'=\$0E!
-\'SI\'=\$0F!
-\'DLE\'=\$10!
-\'DC1\'=\$11! XON
-\'DC2\'=\$12!
-\'DC3\'=\$13! XOFF
-\'DC4\'=\$14!
-\'NAK\'=\$15!
-\'SYN\'=\$16!
-\'ETB\'=\$17!
-\'CAN\'=\$18!
-\'EM\'=\$19!
-\'SUB\'=\$1A!
-\'ESC\'=\$1B!
-\'FS\'=\$1C!
-\'GS\'=\$1D!
-\'RS\'=\$1E!
-\'US\'=\$1F!
-\'SP\'=\$20!
-\'\'\'=\$27!' QNUMBER can't interpret ''' !
-\'DEL\'=\$7F!
-
-\(RTS\)=\(RTS\)!
-\(CTS\)=\(CTS\)!
-
+'NUL'=\$00!
+'SOH'=\$01!
+'STX'=\$02!
+'ETX'=\$03!
+'EOT'=\$04!
+'ENQ'=\$05!
+'ACK'=\$06!
+'BEL'=\$07!
+'BS'=\$08! Backspace
+'HT'=\$09! Horizontal Tabulation
+'LF'=\$0A!
+'VT'=\$0B!
+'FF'=\$0C!
+'CR'=\$0D!
+'SO'=\$0E!
+'SI'=\$0F!
+'DLE'=\$10!
+'DC1'=\$11!
+'XON'=\$11!
+'DC2'=\$12!
+'DC3'=\$13!
+'XOFF'=\$13!
+'DC4'=\$14!
+'NAK'=\$15!
+'SYN'=\$16!
+'ETB'=\$17!
+'CAN'=\$18!
+'EM'=\$19!
+'SUB'=\$1A!
+'ESC'=\$1B! escape char
+'FS'=\$1C!
+'GS'=\$1D!
+'RS'=\$1E!
+'US'=\$1F!
+'SP'=\$20!
+'DEL'=\$7F!
+'R'='R'!
+'Q'='Q'!
+'P'='P'!
+'M'='M'!
+'Y'='Y'!
+'X'='X'!
+'W'='W'!
+'T'='T'!
+'S'='S'!
+(SW1)=(SW1)!
+(SW2)=(SW2)!
+(RST)=(RST)!
+\/RTS=\/RTS!
+\/CTS=\/CTS!
+XON\/XOFF=XON\/XOFF!
! ============================================
! SR bits :
\#C=\#1! = SR(0) Carry flag
\#Z=\#2! = SR(1) Zero flag
\#N=\#4! = SR(2) Negative flag
-\#GIE=\#8! = SR(3) Enable Int
-\#CPUOFF=\#\$10!= SR(4) CPUOFF
-\#OSCOFF=\#\$20!= SR(5) OSCOFF
-\#SCG0=\#\$40! = SR(6) SCG0
-\#SCG1=\#\$80! = SR(7) SCG1
\#V=\#\$100! = SR(8) oVerflow flag
-\#UF9=\#\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
-\#UF10=\#\$400! = SR(10) User Flag 2
-\#UF11=\#\$800! = SR(11) User Flag 3
+GIE=8! = SR(3) Enable Int
+CPUOFF=\$10! = SR(4) CPUOFF
+OSCOFF=\$20! = SR(5) OSCOFF
+SCG0=\$40! = SR(6) SCG0
+SCG1=\$80! = SR(7) SCG1
+UF9=\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
+UF10=\$400! = SR(10) User Flag 2
+UF11=\$800! = SR(11) User Flag 3
LPM4=\$F0! SR(LPM4)
LPM3=\$D0! SR(LPM3)
LPM1=\$50! SR(LPM1)
LPM0=\$10! SR(LPM0)
-LPM4\+GIE=\$F8! SR(LPM4+GIE)
-LPM3\+GIE=\$D8! SR(LPM3+GIE)
-LPM2\+GIE=\$98! SR(LPM2+GIE)
-LPM1\+GIE=\$58! SR(LPM1+GIE)
-LPM0\+GIE=\$18! SR(LPM0+GIE)
-
! ============================================
! PORTx, Reg bits :
! ============================================
NOP=MOV \#0,R3! \ one word one cycle
NOP2=\$3C00 ,! \ compile JMP 0 one word two cycles
NOP3=MOV R0,R0! \ MOV PC,PC one word three cycles
-NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
-
-ABORT=ALLOT\+8! Empty the data stack and perform the function of QUIT
-QUIT=ALLOT\+\$0E! interpret line by line the input stream
-ABORT\"=ABORT\"!
+NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
+\'\ \\=\'\ \\! \ to compile INTERPRET in CORE_ANS.f
+DODOES=\$1285!
+DOCON=\$1286!
+DOVAR=\$1287!
+! ============================================
+! ADD-ON flags :
+! ============================================
+FLOORED=\$8000!
+LF_XTAL=\$4000!
+HMPY=1!
\ No newline at end of file
; J101 Target J101 eZ-FET UARTtoUSB
;
-; DVSS 14 o--o 13 GND
+; DVSS 14 o--o 13 GND
; 5V0 12 o--o 11 5V0
; DVCC 10 o--o 9 3V3
; P1.5 UCA0_RX 8 o--o 7 <------------ TX UARTtoUSB
; P1.4 UCA0_TX 6 o--o 5 <---------+-> RX UARTtoUSB
-; SBWTDIO/RST 4 o--o 3 | _
+; SBWTDIO/RST 4 o--o 3 | _
; SBWTCK/TST 2 o--o 1 +--4k7---o o-- GND
; DeepRST
; SD_Card socket
; VCC - ----> VCC SD_CardAdapter
; GND - <---> GND SD_CardAdapter
-; P2.4 - UCA1 CLK J2 ----> CLK SD_CardAdapter (SCK)
+; P2.4 - UCA1 CLK J2 ----> CLK SD_CardAdapter (SCK)
; P2.6 - UCA1 TXD/SIMO J1 ----> SDI SD_CardAdapter (MOSI)
; P2.5 - UCA1 RXD/SOMI J1 <---- SDO SD_CardAdapter (MISO)
; P1.6 - J4 ----> CS SD_CardAdapter (Card Select)
; P1.7 - J4 <---- CD SD_CardAdapter (Card Detect)
-;
+;
; ======================================================================
; LP_MSP430FR2476 board
; ======================================================================
; J1 - left ext.
; 3v3
-; P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6
+; P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6
; P2.5/UCA1RXD/UCA1SOMI/CAP1.2
; P2.6/UCA1TXD/UCA1SIMO/CAP1.3
; P2.2/SYNC/ACLK/COMP0.1
-; P5.4/UCB1STE/TA3CLK/A11
+; P5.4/UCB1STE/TA3CLK/A11
; P3.5/UCB1CLK/TB0TRG/CAP3.1
-; P4.5/UCB0SOMI/UCB0SCL/TA3.2
+; P4.5/UCB0SOMI/UCB0SCL/TA3.2
; P1.3/UCB0SOMI/UCB0SCL/MCLK/A3
; P1.2/UCB0SIMO/UCB0SDA/TA0.2/A2/VEREF-
;
; P1.7/UCA0STE/SMCLK/TDO/A7
; P4.3/UCB1SOMI/UCB1SCL/TB0.5/A8
; P4.4/UCB1SIMO/UCB1SDA/TB0.6/A9
-; P5.3/UCB1CLK/TA3.0/A10
+; P5.3/UCB1CLK/TA3.0/A10
; P1.0/UCB0STE/TA0CLK/A0/VEREF+ -<J7>- LED1
; P1.1/UCB0CLK/TA0.1/COMP0.0/A1 --- TEMPERATURE SENSOR ---<J9>--- 3V3
-; P5.7/TA2.1/COMP0.2
+; P5.7/TA2.1/COMP0.2
; P3.7/TA3.2/CAP2.0
;
; J4 - right int.
-; P5.2/UCA0TXD/UCA0SIMO/TB0.4
+; P5.2/UCA0TXD/UCA0SIMO/TB0.4
; P5.1/UCA0RXD/UCA0SOMI/TB0.3 -<J8>- LED2Red
; P5.0/UCA0CLK/TB0.2 -<J8>- LED2Green
; P4.7/UCA0STE/TB0.1 -<J8>- LED2Blue
; P2.4/UCA1CLK/CAP1.1
;
; switch-keys:
-; P4.0/TA3.1/CAP2.1 - S1
-; P2.3/TA2.0/CAP0.2 - S2
+; P4.0/TA3.1/CAP2.1 - S1
+; P2.3/TA2.0/CAP0.2 - S2
; /RST - S3
;
; XTAL LF 32768 Hz
MOV #0FFFEh,&PAOUT ; all pins with pull up resistors else P1.0 (LED2)
.IFDEF UCA0_TERM
-; P1.4 UCA0-TXD --> USB2UART RXD
-; P1.5 UCA0-RXD <-- USB2UART TXD
+; P1.4 UCA0-TXD --> USB2UART RXD
+; P1.5 UCA0-RXD <-- USB2UART TXD
TERM_IN .equ P1IN
TERM_SEL .equ P1SEL0
TERM_REN .equ P1REN
CD_SD .equ 080h ; P1.7 as Card Detect
SD_CDIN .equ P1IN
-CS_SD .equ 040h ; P1.6 as Card Select
+CS_SD .equ 040h ; P1.6 as Card Select
SD_CSOUT .equ P1OUT
SD_CSDIR .equ P1DIR
SD_REN .equ PAREN ; to configure pullup resistors
.ENDIF
-; P2.3/TA2.0/CAP0.2 - S2
+; P2.3/TA2.0/CAP0.2 - S2
SW2_IN .equ P2IN
SW2 .equ 8
; S1 - P4.0
SW1_IN .equ P4IN
SW1 .equ 1 ; P4.0 = S1
-WIPE_IN .equ P4IN
-IO_WIPE .equ 1 ; P4.0 = S1 = FORTH Deep_RST pin
; LED2B - J8 - P4.7
MOV #0FFFCh,&PCOUT ; all pins with pull up resistors else P5.0 (LED2G) P5.1 (LED2R)
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P6DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P6OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
; ----------------------------------------------------------------------
; POWER ON RESET SYS config
; ----------------------------------------------------------------------
-; SYS code
+; SYS code
; BIC #1,&SYSCFG0 ; enable write program in FRAM
MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
; ----------------------------------------------------------------------
; CS code for MSP430FR2476
-; to measure REFO frequency, output ACLK on P2.2:
+; to measure REFO frequency, output ACLK on P2.2:
; BIS.B #4,&P2SEL1
; BIS.B #4,&P2DIR
; result : REFO = xx.xx kHz
-; =====================================
- .IF FREQUENCY = 0.5
-; MOV #058h,&CSCTL0 ; preset DCO = measured value @ 0x180 (88)
-; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
- MOV #1ED1h,&CSCTL0 ; preset MOD=31, DCO = measured value @ 0x180 (209)
- MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
- ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
-; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
- ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
- MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
- ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
-; =====================================
- .ELSEIF FREQUENCY = 1
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B1h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
- ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
- MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
- ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
-; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
- ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
-; =====================================
- .ELSEIF FREQUENCY = 2
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B3h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
- ; fCOCLKDIV = 32768 x (59+1) = 1.966 MHz ; measured : MHz
- MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
- ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
-; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
- ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
-; =====================================
- .ELSEIF FREQUENCY = 4
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B5h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
- ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
- MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
- ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
-; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
- ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
-; =====================================
- .ELSEIF FREQUENCY = 8
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B7h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
- ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
-; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
- ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
- MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
- ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
-; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
- ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
-; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
-; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
-
-; =====================================
- .ELSEIF FREQUENCY = 12
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B9h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #016Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
- ; fCOCLKDIV = 32768 x 364+1) = 12.960 MHz ; measured : 11.xxxMHz
-; MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
- MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
-; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
-; =====================================
- .ELSEIF FREQUENCY = 16
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00BBh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
- ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
-; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
- MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
-; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
-; =====================================
- .ELSEIF
- .error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
- .ENDIF
-
.IFDEF LF_XTAL
; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
BIS.B #03,&P2SEL0 ; P2.0 as XOUT, P2.1 as XIN
.ELSE
BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
- MOV #0200h,&CSCTL4 ; ACLOCK select VLOCLK, MCLK & SMCLK select DCOCLKDIV (default value)
+; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
.ENDIF
-
+ BIC.B #-1,&CSCTL1 ; clear DCORSEL (Set 1MHZ DCORSEL), DCOFTRIM=0, ENable MODulation to reduce EMI
+ .IF FREQUENCY = 1 ; nothing else to do
+ .ELSEIF FREQUENCY = 2
+ BIS.B #2,&CSCTL1 ; Set 2MHZ DCORSEL
+ .ELSEIF FREQUENCY = 4
+ BIS.B #4,&CSCTL1 ; Set 4MHZ DCORSEL
+ .ELSEIF FREQUENCY = 8
+ BIS.B #6,&CSCTL1 ; Set 8MHZ DCORSEL
+ .ELSEIF FREQUENCY = 12
+ BIS.B #8,&CSCTL1 ; Set 12MHZ DCORSEL
+ .ELSEIF FREQUENCY = 16
+ BIS.B #10,&CSCTL1 ; Set 16MHZ DCORSEL
+ .ELSEIF FREQUENCY = 20
+ BIS.B #12,&CSCTL1 ; Set 20MHZ DCORSEL
+ .ELSEIF FREQUENCY = 24
+ BIS.B #14,&CSCTL1 ; Set 24MHZ DCORSEL
+ .ELSEIF
+ .error "bad frequency setting, only 1,2,4,8,12,16,20,24 MHz"
+ .ENDIF
+; MOV #INT(FREQUENCY*1000000/32768)-1,&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight lower
+ MOV #INT(FREQUENCY*1000000/32768),&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight upper
MOV #92,X ; 96* 3 ms = 288 ms delay, because FLL lock time = 200 ms
ClockWaitX MOV &FREQ_KHZ,Y ;
ClockWaitY SUB #1,Y ;1
\.f=\.4th for LP_MSP430FR2476! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
! ===================================================================================
! in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
! ===================================================================================
-!
+!
! J101 Target J101 eZ-FET UARTtoUSB
!
-! DVSS 14 o--o 13 GND
+! DVSS 14 o--o 13 GND
! 5V0 12 o--o 11 5V0
! DVCC 10 o--o 9 3V3
! P1.5 UCA0_RX 8 o--o 7 <------------ TX UARTtoUSB
! P1.4 UCA0_TX 6 o--o 5 <---------+-> RX UARTtoUSB
-! SBWTDIO/RST 4 o--o 3 | _
+! SBWTDIO/RST 4 o--o 3 | _
! SBWTCK/TST 2 o--o 1 +--4k7---o o-- GND
! DeepRST
! J1 - left ext.
! 3v3
-! P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6
+! P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6
! P2.5/UCA1RXD/UCA1SOMI/CAP1.2
! P2.6/UCA1TXD/UCA1SIMO/CAP1.3
! P2.2/SYNC/ACLK/COMP0.1
-! P5.4/UCB1STE/TA3CLK/A11
+! P5.4/UCB1STE/TA3CLK/A11
! P3.5/UCB1CLK/TB0TRG/CAP3.1
-! P4.5/UCB0SOMI/UCB0SCL/TA3.2
+! P4.5/UCB0SOMI/UCB0SCL/TA3.2
! P1.3/UCB0SOMI/UCB0SCL/MCLK/A3
! P1.2/UCB0SIMO/UCB0SDA/TA0.2/A2/VEREF-
!
! P1.7/UCA0STE/SMCLK/TDO/A7
! P4.3/UCB1SOMI/UCB1SCL/TB0.5/A8
! P4.4/UCB1SIMO/UCB1SDA/TB0.6/A9
-! P5.3/UCB1CLK/TA3.0/A10
+! P5.3/UCB1CLK/TA3.0/A10
! P1.0/UCB0STE/TA0CLK/A0/VEREF+ - J7 - LED1
! P1.1/UCB0CLK/TA0.1/COMP0.0/A1 - TEMPERATURE SENSOR
-! P5.7/TA2.1/COMP0.2
+! P5.7/TA2.1/COMP0.2
! P3.7/TA3.2/CAP2.0
!
! J4 - right int.
-! P5.2/UCA0TXD/UCA0SIMO/TB0.4
-! P5.1/UCA0RXD/UCA0SOMI/TB0.3 - J8 - LED2R
+! P5.2/UCA0TXD/UCA0SIMO/TB0.4
+! P5.1/UCA0RXD/UCA0SOMI/TB0.3 - J8 - LED2R
! P5.0/UCA0CLK/TB0.2 - J8 - LED2G
! P4.7/UCA0STE/TB0.1 - J8 - LED2B
! P6.0/TA2.2/COMP0.3
! P2.4/UCA1CLK/CAP1.1
!
! switch-keys:
-! P4.0/TA3.1/CAP2.1 - S1
-! P2.3/TA2.0/CAP0.2 - S2
+! P4.0/TA3.1/CAP2.1 - S1
+! P2.3/TA2.0/CAP0.2 - S2
! /RST - S3
!
! XTAL LF 32768 Hz
!
! P4.0 - Switch S1 <--- LCD contrast + (finger :-)
! P2.3 - Switch S2 <--- LCD contrast - (finger ;-)
-!
+!
! GND - <-------+---0V0----------> 1 LCD_Vss
! VCC - >------ | --3V6-----+----> 2 LCD_Vdd
! | |
! P1.1 - J3 <---------red------------> 12 LCD_DB5
! P1.2 - J1 <---------orange---------> 13 LCD_DB5
! P1.3 - J1 <---------yellow---------> 14 LCD_DB7
-!
-! +--4k7-< DeepRST <-- GND
+!
+! +--4k7-< DeepRST <-- GND
! |
! P1.4 - UCA0 TXD J101.8 <-+->white--> RX UARTtoUSB bridge
! P1.5 - UCA0 RXD J101.10 <----green--- TX UARTtoUSB bridge
! GND - J101.20 <---> GND
! P6.1 - RTS J4 ----blue----> CTS UARTtoUSB bridge (optional hardware control flow)
! P6.2 - CTS J4 ---yellow---> RTS UARTtoUSB bridge (optional hardware control flow)
-!
+!
!
! VCC - ----> VCC SD_CardAdapter
! GND - <---> GND SD_CardAdapter
-! P2.4 - UCA1 CLK J2 ----> CLK SD_CardAdapter (SCK)
+! P2.4 - UCA1 CLK J2 ----> CLK SD_CardAdapter (SCK)
! P2.6 - UCA1 TXD/SIMO J1 ----> SDI SD_CardAdapter (MOSI)
! P2.5 - UCA1 RXD/SOMI J1 <---- SDO SD_CardAdapter (MISO)
! P1.6 - J4 ----> CS SD_CardAdapter (Card Select)
! P1.7 - J4 <---- CD SD_CardAdapter (Card Detect)
-!
+!
!
! P2.2 - J3.10 <---- OUT IR_Receiver (1 TSOP32236) ───┐
! └┌───┐
! ============================================
! FORTH I/O :
! ============================================
-!TERMINAL
+!TERMINAL
BUS_TERM=\$30! ; P1.4 = TX, P1.5 = RX
TERM_IN=\$200!
TERM_VEC=\$FFE4! \ UCA0
WAKE_UP=1! \ RX int
-TERM_CTLW0=\$500! \ eUSCI_A control word 0
-TERM_CTLW1=\$502! \ eUSCI_A control word 1
-TERM_BRW=\$506!
-TERM_BR0=\$506! \ eUSCI_A baud rate 0
-TERM_BR1=\$507! \ eUSCI_A baud rate 1
-TERM_MCTLW=\$508! \ eUSCI_A modulation control
-TERM_STATW=\$50A! \ eUSCI_A status
-TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
-TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
-TERM_ABCTL=\$510! \ eUSCI_A LIN control
-TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
-TERM_IE=\$51A! \ eUSCI_A interrupt enable
-TERM_IFG=\$51C! \ eUSCI_A interrupt flags
-TERM_IV=\$51E! \ eUSCI_A interrupt vector word
+TERM_CTLW0=\$500! \ eUSCI_A control word 0
+TERM_CTLW1=\$502! \ eUSCI_A control word 1
+TERM_BRW=\$506!
+TERM_BR0=\$506! \ eUSCI_A baud rate 0
+TERM_BR1=\$507! \ eUSCI_A baud rate 1
+TERM_MCTLW=\$508! \ eUSCI_A modulation control
+TERM_STATW=\$50A! \ eUSCI_A status
+TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
+TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
+TERM_ABCTL=\$510! \ eUSCI_A LIN control
+TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
+TERM_IE=\$51A! \ eUSCI_A interrupt enable
+TERM_IFG=\$51C! \ eUSCI_A interrupt flags
+TERM_IV=\$51E! \ eUSCI_A interrupt vector word
RTS=2! P6.1
CTS=4! P6.2
CD_SD=\$80! P1.7 as Card Detect
SD_CDIN=\$200!
-CS_SD=\$40! P1.6 as Card Select
+CS_SD=\$40! P1.6 as Card Select
SD_CSOUT=\$202!
SD_CSDIR=\$204!
LED1=2! P5.1 red led
SW1_IN=\$221!
-SW1=1! P4.0 = S1
+SW1=1! P4.0 = S1
WIPE_IN\$221!
IO_WIPE=1! P4.0 = S1 = FORTH Deep_RST pin
!IR_RC5
RC5_=RC5_!
-IR_IN=\$201!
-IR_OUT=\$203!
-IR_DIR=\$205!
-IR_REN=\$209!
+IR_IN=\$201!
+IR_OUT=\$203!
+IR_DIR=\$205!
+IR_REN=\$209!
IR_IES=\$219!
IR_IE=\$21B!
IR_IFG=\$21D!
I2CSM_REN=\$226!
SMSDA=4! P3.2
SMSCL=8! P3.3
-SM_BUS=\$0C!
+SM_BUS=\$0C!
!Software I2C_Multi_Master
I2CSMM_IN=\$220!
I2CSMM_REN=\$226!
SMMSDA=4! P3.2
SMMSCL=8! P3.3
-SMM_BUS=\$0C!
+SMM_BUS=\$0C!
!hardware I2C_Multi_Master
I2CMM_IN=\$221!
I2CM_CTLW0=\$580! USCI_B1 Control Word Register 0
I2CM_CTLW1=\$582! USCI_B1 Control Word Register 1
I2CM_BRW=\$586! USCI_B1 Baud Word Rate 0
-I2CM_STATW=\$588! USCI_B1 status word
-I2CM_TBCNT=\$58A! USCI_B1 byte counter threshold
+I2CM_STATW=\$588! USCI_B1 status word
+I2CM_TBCNT=\$58A! USCI_B1 byte counter threshold
I2CM_RXBUF=\$58C! USCI_B1 Receive Buffer 8
I2CM_TXBUF=\$58E! USCI_B1 Transmit Buffer 8
I2CM_I2COA0=\$594! USCI_B1 I2C Own Address 0
-I2CM_ADDRX=\$59C! USCI_B1 Received Address Register
+I2CM_ADDRX=\$59C! USCI_B1 Received Address Register
I2CM_I2CSA=\$5A0! USCI_B1 I2C Slave Address
I2CM_IE=\$5AA! USCI_B1 Interrupt Enable
I2CM_IFG=\$5AC! USCI_B1 Interrupt Flags Register
I2CS_CTLW0=\$580! USCI_B1 Control Word Register 0
I2CS_CTLW1=\$582! USCI_B1 Control Word Register 1
I2CS_BRW=\$586! USCI_B1 Baud Word Rate 0
-I2CS_STATW=\$588! USCI_B1 status word
-I2CS_TBCNT=\$58A! USCI_B1 byte counter threshold
+I2CS_STATW=\$588! USCI_B1 status word
+I2CS_TBCNT=\$58A! USCI_B1 byte counter threshold
I2CS_RXBUF=\$58C! USCI_B1 Receive Buffer 8
I2CS_TXBUF=\$58E! USCI_B1 Transmit Buffer 8
I2CS_I2COA0=\$594! USCI_B1 I2C Own Address 0
-I2CS_ADDRX=\$59C! USCI_B1 Received Address Register
+I2CS_ADDRX=\$59C! USCI_B1 Received Address Register
I2CS_I2CSA=\$5A0! USCI_B1 I2C Slave Address
I2CS_IE=\$5AA! USCI_B1 Interrupt Enable
I2CS_IFG=\$5AC! USCI_B1 Interrupt Flags Register
! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
! those addresses are usable with the symbolic assembler
! ----------------------------------------------
-! FastForth INFO
+! FastForth INFO addresses
! ----------------------------------------------
FREQ_KHZ=\$1800! FREQUENCY (in kHz)
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of default INI_SOFT_APP
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+!
+INIT_DOXXX=\$182C! MOV #INIT_DOXXX,X \ te restore DOxxx registers
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+!
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
-TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
+TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
TLV_LEN=\$0032!
DEVICEID=\$1A04!
-
+!
! ============================================
! RAM
! ============================================
RAM_ORG=\$2000!
RAM_LEN=\$1000!
-
+!
! ----------------------------------------------
! FORTH RAM areas :
! ----------------------------------------------
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
-
+!
! ----------------------------------------------
! FastForth RAM memory map (>= 1k):
! ----------------------------------------------
-LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
-LSATCK=\$2000! \ leave stack, grow up
-PSTACK=\$2080! \ parameter stack, grow down
-RSTACK=\$20E0! \ Return stack, grow down
-
-PAD_I2CADR=\$20E0! \ RX I2C address
-PAD_I2CCNT=\$20E2! \ count max
-PAD_ORG=\$20E4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$2138! \ TX I2C address
-TIB_I2CCNT=\$213A! \ count of bytes
-TIB_ORG=\$213C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$2190! \ a good address for HOLDS
-HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
+LEAVEPTR=\$2000! Leave-stack pointer, init by QUIT
+LSATCK=\$2000! leave stack, grow up
+PSTACK=\$2080! parameter stack, grow down
+RSTACK=\$20E0! Return stack, grow down
+!
+PAD_I2CADR=\$20E0! RX I2C address
+PAD_I2CCNT=\$20E2! count max
+PAD_ORG=\$20E4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$2138! TX I2C address
+TIB_I2CCNT=\$213A! count of bytes
+TIB_ORG=\$213C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$2190! base address for HOLDS
+HOLD_BASE=\$21B2! BASE HOLD area, grow down
+!
HP=\$21B2! HOLD ptr
-CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$21B6!
-LAST_THREAD=\$21B8!
-LAST_CFA=\$21BA!
-LAST_PSP=\$21BC!
-
-STATEADR=\$21BE! Interpreter state
-
-SOURCE_LEN=\$21C0! len of input stream
-SOURCE_ORG=\$21C2! adr of input stream
-TOIN=\$21C4! >IN
-DP=\$21C6! dictionary ptr
-
-LASTVOC=\$21C8! keep VOC-LINK
-CONTEXT=\$21CA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21DA! CURRENT dictionnary ptr
-
-BASEADR=\$21DC! numeric base, must be defined before first reset !
-LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$21B4!
+LAST_THREAD=\$21B6!
+LAST_CFA=\$21B8!
+LAST_PSP=\$21BA!
+!
+STATEADR=\$21BC! Interpreter state
+BASEADR=\$21BE!
+CAPS=\$21C0 !
+!
+SOURCE_LEN=\$21C2! len of input stream
+SOURCE_ORG=\$21C4! adr of input stream
+TOIN=\$21C6! >IN
+DP=\$21C8! dictionary ptr
+!
+LASTVOC=\$21CA! keep VOC-LINK
+CURRENT=\$21CC! CURRENT dictionnary ptr
+CONTEXT=\$21CE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
!21E0! 28 RAM bytes free
! ---------------------------------------
-
+!
! ---------------------------------------
! SD buffer
! ---------------------------------------
SD_BUF_I2CNT=\$21FE!
SD_BUF=\$2200! \ SD_Card buffer
SD_BUF_END=\$2400!
-
+!
! ---------------------------------------
! FAT16 FileSystemInfos
! ---------------------------------------
OrgRootDir=\$240E!
OrgClusters=\$2410! Sector of Cluster 0
SecPerClus=\$2412!
-
+!
! ---------------------------------------
! SD command
! ---------------------------------------
SD_CMD_FRM5=\$2419! CMD byte access
SectorL=\$241A! 2 words
SectorH=\$241C!
-
+!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
HDLH_CurClust=16! Current ClusterHi (T as 3Th byte)
HDLL_CurSize=18! written size / not yet read size (Long)
HDLH_CurSize=20! written size / not yet read size (Long)
-HDLW_BUFofst=22! BUFFER offset ; used by LOAD" and by WRITE"
-HDLW_PrevLEN=24! previous LEN
-HDLW_PrevORG=26! previous ORG
+HDLW_BUFofst=22! SD BUFFER offset ; used by LOAD" and by WRITE"
+HDLW_PrevLEN=24! CIB LEN of previous handle
+HDLW_PrevORG=26! CIB ORG of previous handle
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2438!
! FRAM MAIN
! ============================================
MAIN_ORG=\$8000! Code space start
-
+! ----------------------------------------------
SLEEP=\$8000! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$800A! CODE compiled by LITERAL
-XSQUOTE=\$8014! CODE compiled by S" and S_
-HEREXEC=\$8028! CODE HERE and BEGIN execute address
-QFBRAN=\$8034! CODE compiled by IF UNTIL
-BRAN=\$803A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$803C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$803E! CODE compiled by DO
-XPLOOP=\$804E! CODE compiled by +LOOP
-XLOOP=\$8060! CODE compiled by LOOP
-MUSMOD=\$8066! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$8078! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$8080! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$80AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$80AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$80BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$80CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$80D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$80E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$80EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$801E! CODE compiled by S" and S_
+HEREXEC=\$8032! CODE HERE and BEGIN execute address
+MUSMOD=\$803E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$8050! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$8058! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$8082! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$8084! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$8094! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$80A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$80AC! CODE compiled by IF UNTIL
+BRAN=\$80B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$80B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$80B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$80C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$80F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$812A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$8136! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$80D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$8108! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$8112! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+!-------------------------------------------------------------------------------
+! UART FASTFORTH
+!-------------------------------------------------------------------------------
+UART_INIT_TERM=\$8154! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$817E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$8184! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_WARM=\$8186! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$8194! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$819C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$81C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$81C8! ASM CODE, called by ACCEPT before RX char LF.
+! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$81B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$818E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$81BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$81BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+I2C_ACCEPT=\$8144! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$8146! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$8156! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$8156! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$8158! asm CODE, content of WARM+2 by default
+I2C_WARM=\$8180! WARM address
!-------------------------------------------------------------------------------
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR2355
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
-JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ! reset by wipe and by S1+<reset>
+JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ! reset by -1 SYS and by S1+<reset>
JTAG_SIG2=\$FF82! if JTAG_SIG <> |0xFFFFFFFF, 0x00000000|, SBW and JTAG are locked
BSL_SIG1=\$FF84!
BSL_SIG2=\$FF86!
BSL_PASSWORD=\$FFE0! 256 bits
VECT_ORG=\$FFCE! FFCE-FFFF : 24 vectors + reset
VECT_LEN=\$32!
-
+! ----------------------------------------------
P4_VEC=\$FFCE!
P3_VEC=\$FFD0!
P2_VEC=\$FFD2!
SAC1SAC3_VEC=\$FFD6!
SAC0SAC2_VEC=\$FFD8!
ECOMPX_VEC=\$FFDA!
-ADC10_VEC=\$FFDC!
+ADC12_VEC=\$FFDC!
EUSCI_B1_VEC=\$FFDE!
EUSCI_B0_VEC=\$FFE0!
EUSCI_A1_VEC=\$FFE2!
FRCTLCTL0=\$1A0! \ FRAM control 0
+FRCTLCTL0_H=\$1A1! \ FRAM control 0_H: FRAM password byte = $A5
GCCTL0=\$1A4! \ General control 0
GCCTL1=\$1A6! \ General control 1
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+ADC12CTL0=\$700! \ ADC12_B Control register 0
+ADC12CTL1=\$702! \ ADC12_B Control register 1
+ADC12CTL2=\$704! \ ADC12_B Control register 2
+ADC12LO=\$706! \ ADC12_B Window Comparator Low Threshold
+ADC12HI=\$708! \ ADC12_B Window Comparator High Threshold
+ADC12MCTL0=\$70A! \ ADC12_B Memory Control Register 0
+ADC12MEM0=\$712! \ ADC12_B Conversion Memory Register
+ADC12IE=\$71A! \ ADC12_B Interrupt Enable
+ADC12IFG=\$71C! \ ADC12_B Interrupt Flags
+ADC12IV=\$71E! \ ADC12_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
; ----------------------------------------------
PAGESIZE .equ 512 ; MPU unit
; ----------------------------------------------
-; BSL
+; BSL
; ----------------------------------------------
-BSL1 .equ 01000h
+BSL1 .equ 01000h
BSL2 .equ 0FFC00h
; ----------------------------------------------
; FRAM ; INFO B, TLV
BSL_SIG2 .equ 0FF86h ;
JTAG_PASSWORD .equ 0FF88h ; 256 bits
BSL_PASSWORD .equ 0FFE0h ; 256 bits
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
; .org INTVECT ; FFDA-FFFF 18 vectors + reset
;
-; .word reset ; FFDAh - P2
-; .word reset ; FFDCh - P1
-; .word reset ; FFDEh - ADC10
-; .word reset ; FFE0h - eUSCI_B0
-; .word reset ; FFE2h - eUSCI_A1
-; .word reset ; FFE4h - eUSCI_A0
-; .word reset ; FFE6h - WDT
-; .word reset ; FFE8h - RTC
-; .word reset ; FFEAh - TA3_x
-; .word reset ; FFECh - TA3_0
-; .word reset ; FFEEh - TA2_x
-; .word reset ; FFF0h - TA2_0
-; .word reset ; FFF2h - TA1_x
-; .word reset ; FFF4h - TA1_0
-; .word reset ; FFF6h - TA0_x
-; .word reset ; FFF8h - TA0_0
-; .word reset ; FFFAh - UserNMI
-; .word reset ; FFFCh - SysNMI
-; .word reset ; FFFEh - Reset
+; .word reset ; FFDAh - P2
+; .word reset ; FFDCh - P1
+; .word reset ; FFDEh - ADC10
+; .word reset ; FFE0h - eUSCI_B0
+; .word reset ; FFE2h - eUSCI_A1
+; .word reset ; FFE4h - eUSCI_A0
+; .word reset ; FFE6h - WDT
+; .word reset ; FFE8h - RTC
+; .word reset ; FFEAh - TA3_x
+; .word reset ; FFECh - TA3_0
+; .word reset ; FFEEh - TA2_x
+; .word reset ; FFF0h - TA2_0
+; .word reset ; FFF2h - TA1_x
+; .word reset ; FFF4h - TA1_0
+; .word reset ; FFF6h - TA0_x
+; .word reset ; FFF8h - TA0_0
+; .word reset ; FFFAh - UserNMI
+; .word reset ; FFFCh - SysNMI
+; .word reset ; FFFEh - Reset
; ----------------------------------------------------------------------
; MSP430FR2433 Peripheral File Map
; ----------------------------------------------------------------------
; ----------------------------------------------------------------------
; POWER ON RESET SYS config
; ----------------------------------------------------------------------
-SYSCTL .equ SYS_SFR + 00h ; System control
-SYSBSLC .equ SYS_SFR + 02h ; Bootstrap loader configuration area
-SYSJMBC .equ SYS_SFR + 06h ; JTAG mailbox control
-SYSJMBI0 .equ SYS_SFR + 08h ; JTAG mailbox input 0
-SYSJMBI1 .equ SYS_SFR + 0Ah ; JTAG mailbox input 1
-SYSJMBO0 .equ SYS_SFR + 0Ch ; JTAG mailbox output 0
-SYSJMBO1 .equ SYS_SFR + 0Eh ; JTAG mailbox output 1
-SYSBERRIV .equ SYS_SFR + 18h ; Bus Error vector generator
-SYSUNIV .equ SYS_SFR + 1Ah ; User NMI vector generator
-SYSSNIV .equ SYS_SFR + 1Ch ; System NMI vector generator
-SYSRSTIV .equ SYS_SFR + 1Eh ; Reset vector generator
-SYSCFG0 .equ SYS_SFR + 20h ; System configuration 0
-SYSCFG1 .equ SYS_SFR + 22h ; System configuration 1
-SYSCFG2 .equ SYS_SFR + 24h ; System configuration 2
-
+SYSCTL .equ SYS_SFR + 00h ; System control
+SYSBSLC .equ SYS_SFR + 02h ; Bootstrap loader configuration area
+SYSJMBC .equ SYS_SFR + 06h ; JTAG mailbox control
+SYSJMBI0 .equ SYS_SFR + 08h ; JTAG mailbox input 0
+SYSJMBI1 .equ SYS_SFR + 0Ah ; JTAG mailbox input 1
+SYSJMBO0 .equ SYS_SFR + 0Ch ; JTAG mailbox output 0
+SYSJMBO1 .equ SYS_SFR + 0Eh ; JTAG mailbox output 1
+SYSBERRIV .equ SYS_SFR + 18h ; Bus Error vector generator
+SYSUNIV .equ SYS_SFR + 1Ah ; User NMI vector generator
+SYSSNIV .equ SYS_SFR + 1Ch ; System NMI vector generator
+SYSRSTIV .equ SYS_SFR + 1Eh ; Reset vector generator
+SYSCFG0 .equ SYS_SFR + 20h ; System configuration 0
+SYSCFG1 .equ SYS_SFR + 22h ; System configuration 1
+SYSCFG2 .equ SYS_SFR + 24h ; System configuration 2
+
; SYS Control Bits
; ...
P1REN .equ PA_SFR + 06h ; Port 1 Resistor Enable
P1SEL0 .equ PA_SFR + 0Ah ; Port 1 Selection 0
P1SEL1 .equ PA_SFR + 0Ch ; Port 1 Selection 1
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P1IFG .equ PA_SFR + 1Ch ; Port 1 Interrupt Flag
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt Flag
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3
; ----------------------------------------------------------------------
RTC
; ----------------------------------------------------------------------
-RTCCTL .equ RTC_SFR + 00h ; Real-Time Clock Control
-RTCIV .equ RTC_SFR + 04h ; Real-Time Clock Interrupt Vector
-RTCMOD .equ RTC_SFR + 08h ; Real-Timer Clock Modulo
-RTCCNT .equ RTC_SFR + 0Ch ; Real-Time Clock Counter
+RTCCTL .equ RTC_SFR + 00h ; Real-Time Clock Control
+RTCIV .equ RTC_SFR + 04h ; Real-Time Clock Interrupt Vector
+RTCMOD .equ RTC_SFR + 08h ; Real-Timer Clock Modulo
+RTCCNT .equ RTC_SFR + 0Ch ; Real-Time Clock Counter
; ----------------------------------------------------------------------
MPY_32
TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
! those addresses are usable with the symbolic assembler
! ----------------------------------------------
-! FastForth INFO
+! FastForth INFO addresses
! ----------------------------------------------
FREQ_KHZ=\$1800! FREQUENCY (in kHz)
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
TLV_LEN=\$0080!
DEVICEID=\$1A04!
-
! ============================================
! RAM
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ---------------------------------------
! FastForth RAM memory map (>= 1k):
! ---------------------------------------
-LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
-LSATCK=\$2000! \ leave stack, grow up
-PSTACK=\$2080! \ parameter stack, grow down
-RSTACK=\$20E0! \ Return stack, grow down
-
-PAD_I2CADR=\$20E0! \ RX I2C address
-PAD_I2CCNT=\$20E2! \ count max
-PAD_ORG=\$20E4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$2138! \ TX I2C address
-TIB_I2CCNT=\$213A! \ count of bytes
-TIB_ORG=\$213C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$2190! \ a good address for HOLDS
-HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-
-! ---------------------------------------
-! NOT SAVED VARIABLES
-! ---------------------------------------
+LEAVEPTR=\$2000! Leave-stack pointer, init by QUIT
+LSATCK=\$2000! leave stack, grow up
+PSTACK=\$2080! parameter stack, grow down
+RSTACK=\$20E0! Return stack, grow down
+!
+PAD_I2CADR=\$20E0! RX I2C address
+PAD_I2CCNT=\$20E2! count max
+PAD_ORG=\$20E4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$2138! TX I2C address
+TIB_I2CCNT=\$213A! count of bytes
+TIB_ORG=\$213C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$2190! base address for HOLDS
+HOLD_BASE=\$21B2! BASE HOLD area, grow down
+!
HP=\$21B2! HOLD ptr
-CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$21B6!
-LAST_THREAD=\$21B8!
-LAST_CFA=\$21BA!
-LAST_PSP=\$21BC!
-
-STATEADR=\$21BE! Interpreter state
-
-SOURCE_LEN=\$21C0! len of input stream
-SOURCE_ORG=\$21C2! adr of input stream
-TOIN=\$21C4! >IN
-DP=\$21C6! dictionary ptr
-
-LASTVOC=\$21C8! keep VOC-LINK
-CONTEXT=\$21CA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21DA! CURRENT dictionnary ptr
-
-BASEADR=\$21DC! numeric base, must be defined before first reset !
-LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$21B4!
+LAST_THREAD=\$21B6!
+LAST_CFA=\$21B8!
+LAST_PSP=\$21BA!
+!
+STATEADR=\$21BC! Interpreter state
+BASEADR=\$21BE!
+CAPS=\$21C0 !
+!
+SOURCE_LEN=\$21C2! len of input stream
+SOURCE_ORG=\$21C4! adr of input stream
+TOIN=\$21C6! >IN
+DP=\$21C8! dictionary ptr
+!
+LASTVOC=\$21CA! keep VOC-LINK
+CURRENT=\$21CC! CURRENT dictionnary ptr
+CONTEXT=\$21CE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
-!21E0! 28 RAM bytes free
+!21E0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
BUFEND=\$2400!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2402!
BS_FirstSectorL=\$2404!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$241E!
+BufferPtr=\$241E!
BufferLen=\$2420!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
+NewClusterL=\$2426! 16 bits wide (FAT16)
+NewClusterH=\$2428! 16 bits wide (FAT16)
CurFATsector=\$242A!
! ---------------------------------------
! ---------------------------------------
DIRclusterL=\$242C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$242E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2430!
+EntryOfst=\$2430!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2438!
SLEEP=\$C400! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$C40A! CODE compiled by LITERAL
-XSQUOTE=\$C414! CODE compiled by S" and S_
-HEREXEC=\$C428! CODE HERE and BEGIN execute address
-QFBRAN=\$C434! CODE compiled by IF UNTIL
-BRAN=\$C43A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$C43C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$C43E! CODE compiled by DO
-XPLOOP=\$C44E! CODE compiled by +LOOP
-XLOOP=\$C460! CODE compiled by LOOP
-MUSMOD=\$C466! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$C478! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$C480! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$C4AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$C4AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$C4BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$C4CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$C4D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$C4E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$C4EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$C41E! CODE compiled by S" and S_
+HEREXEC=\$C432! CODE HERE and BEGIN execute address
+MUSMOD=\$C43E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$C450! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$C458! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$C482! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$C484! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$C494! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$C4A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$C4AC! CODE compiled by IF UNTIL
+BRAN=\$C4B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$C4B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$C4B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C4C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$C4F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$C52A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$C536! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$C4D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$C508! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$C512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$C594! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$C59C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$C5C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$C5C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$C5B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$C58E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$C5BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$C5BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$C584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$C586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$C544! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$C546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$C556! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$C556! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$C558! asm CODE, content of WARM+2 by default
+I2C_WARM=\$C580! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR2433
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ; reset by wipe and by S1+<reset>
JTAG_SIG2=\$FF82! if JTAG_SIG <> |\$FFFFFFFF, \$00000000|, SBW and JTAG are locked
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
I2CSLA0=\$FFA2! UCBxI2COA0 default value address
I2CSLA1=\$FFA4! UCBxI2COA1 default value address
I2CSLA2=\$FFA6! UCBxI2COA2 default value address
PMMCTL0=\$120! \ PMM Control 0
PMMCTL1=\$122! \ PMM Control 0
PMMCTL2=\$124! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-SYSCTL=\$140! \ System control
-SYSBSLC=\$142! \ Bootstrap loader configuration area
-SYSJMBC=\$146! \ JTAG mailbox control
-SYSJMBI0=\$148! \ JTAG mailbox input 0
-SYSJMBI1=\$14A! \ JTAG mailbox input 1
-SYSJMBO0=\$14C! \ JTAG mailbox output 0
-SYSJMBO1=\$14E! \ JTAG mailbox output 1
-SYSUNIV=\$15A! \ User NMI vector generator
-SYSSNIV=\$15C! \ System NMI vector generator
-SYSRSTIV=\$15E! \ Reset vector generator
-SYSCFG0=\$160! \ System configuration 0
-SYSCFG1=\$162! \ System configuration 1
-SYSCFG2=\$164! \ System configuration 2
-
-CSCTL0=\$180! \ CS control 0
-CSCTL1=\$182! \ CS control 1
-CSCTL2=\$184! \ CS control 2
-CSCTL3=\$186! \ CS control 3
-CSCTL4=\$188! \ CS control 4
-CSCTL5=\$18A! \ CS control 5
-CSCTL6=\$18C! \ CS control 6
-CSCTL7=\$18E! \ CS control 7
-CSCTL8=\$190! \ CS control 8
-
-FRCTLCTL0=\$1A0! \ FRAM control 0
-GCCTL0=\$1A4! \ General control 0
-GCCTL1=\$1A6! \ General control 1
-
-CRC16DI=\$1C0! \ CRC data input
-CRCDIRB=\$1C2! \ CRC data input reverse byte
-CRCINIRES=\$1C4! \ CRC initialization and result
-CRCRESR=\$1C6! \ CRC result reverse byte
+SYSCTL=\$140! \ System control
+SYSBSLC=\$142! \ Bootstrap loader configuration area
+SYSJMBC=\$146! \ JTAG mailbox control
+SYSJMBI0=\$148! \ JTAG mailbox input 0
+SYSJMBI1=\$14A! \ JTAG mailbox input 1
+SYSJMBO0=\$14C! \ JTAG mailbox output 0
+SYSJMBO1=\$14E! \ JTAG mailbox output 1
+SYSUNIV=\$15A! \ User NMI vector generator
+SYSSNIV=\$15C! \ System NMI vector generator
+SYSRSTIV=\$15E! \ Reset vector generator
+SYSCFG0=\$160! \ System configuration 0
+SYSCFG1=\$162! \ System configuration 1
+SYSCFG2=\$164! \ System configuration 2
+
+CSCTL0=\$180! \ CS control 0
+CSCTL1=\$182! \ CS control 1
+CSCTL2=\$184! \ CS control 2
+CSCTL3=\$186! \ CS control 3
+CSCTL4=\$188! \ CS control 4
+CSCTL5=\$18A! \ CS control 5
+CSCTL6=\$18C! \ CS control 6
+CSCTL7=\$18E! \ CS control 7
+CSCTL8=\$190! \ CS control 8
+
+FRCTLCTL0=\$1A0! \ FRAM control 0
+GCCTL0=\$1A4! \ General control 0
+GCCTL1=\$1A6! \ General control 1
+
+CRC16DI=\$1C0! \ CRC data input
+CRCDIRB=\$1C2! \ CRC data input reverse byte
+CRCINIRES=\$1C4! \ CRC initialization and result
+CRCRESR=\$1C6! \ CRC result reverse byte
WDTCTL=\$1CC! \ WDT control register
P3SEL0=\$22A!
P3SEL1=\$22C!
-RTCCTL=\$300! \ RTC control
-RTCIV=\$304! \ RTC interrupt vector word
-RTCMOD=\$308! \ RTC modulo
-RTCCNT=\$30C! \ RTC counter register
+RTCCTL=\$300! \ RTC control
+RTCIV=\$304! \ RTC interrupt vector word
+RTCMOD=\$308! \ RTC modulo
+RTCCNT=\$30C! \ RTC counter register
TACLR=4!
TAIFG=1!
CCIFG=1!
-TA0CTL=\$380! \ TA0 control
-TA0CCTL0=\$382! \ Capture/compare control 0
-TA0CCTL1=\$384! \ Capture/compare control 1
-TA0CCTL2=\$386! \ Capture/compare control 2
-TA0R=\$390! \ TA0 counter register
-TA0CCR0=\$392! \ Capture/compare register 0
-TA0CCR1=\$394! \ Capture/compare register 1
-TA0CCR2=\$396! \ Capture/compare register 2
-TA0EX0=\$3A0! \ TA0 expansion register 0
-TA0IV=\$3AE! \ TA0 interrupt vector
-
-TA1CTL=\$3C0! \ TA1 control
-TA1CCTL0=\$3C2! \ Capture/compare control 0
-TA1CCTL1=\$3C4! \ Capture/compare control 1
-TA1CCTL2=\$3C6! \ Capture/compare control 2
-TA1R=\$3D0! \ TA1 counter register
-TA1CCR0=\$3D2! \ Capture/compare register 0
-TA1CCR1=\$3D4! \ Capture/compare register 1
-TA1CCR2=\$3D6! \ Capture/compare register 2
-TA1EX0=\$3E0! \ TA1 expansion register 0
-TA1IV=\$3EE! \ TA1 interrupt vector
-
-TA2CTL=\$400! \ TA2 control
-TA2CCTL0=\$402! \ Capture/compare control 0
-TA2CCTL1=\$404! \ Capture/compare control 1
-TA2R=\$410! \ TA2 counter register
-TA2CCR0=\$412! \ Capture/compare register 0
-TA2CCR1=\$414! \ Capture/compare register 1
-TA2EX0=\$420! \ TA2 expansion register 0
-TA2IV=\$42E! \ TA2 interrupt vector
-
-TA3CTL=\$440! \ TA3 control
-TA3CCTL0=\$442! \ Capture/compare control 0
-TA3CCTL1=\$444! \ Capture/compare control 1
-TA3R=\$450! \ TA3 counter register
-TA3CCR0=\$452! \ Capture/compare register 0
-TA3CCR1=\$454! \ Capture/compare register 1
-TA3EX0=\$460! \ TA3 expansion register 0
-TA3IV=\$46E! \ TA3 interrupt vector
+TA0CTL=\$380! \ TA0 control
+TA0CCTL0=\$382! \ Capture/compare control 0
+TA0CCTL1=\$384! \ Capture/compare control 1
+TA0CCTL2=\$386! \ Capture/compare control 2
+TA0R=\$390! \ TA0 counter register
+TA0CCR0=\$392! \ Capture/compare register 0
+TA0CCR1=\$394! \ Capture/compare register 1
+TA0CCR2=\$396! \ Capture/compare register 2
+TA0EX0=\$3A0! \ TA0 expansion register 0
+TA0IV=\$3AE! \ TA0 interrupt vector
+
+TA1CTL=\$3C0! \ TA1 control
+TA1CCTL0=\$3C2! \ Capture/compare control 0
+TA1CCTL1=\$3C4! \ Capture/compare control 1
+TA1CCTL2=\$3C6! \ Capture/compare control 2
+TA1R=\$3D0! \ TA1 counter register
+TA1CCR0=\$3D2! \ Capture/compare register 0
+TA1CCR1=\$3D4! \ Capture/compare register 1
+TA1CCR2=\$3D6! \ Capture/compare register 2
+TA1EX0=\$3E0! \ TA1 expansion register 0
+TA1IV=\$3EE! \ TA1 interrupt vector
+
+TA2CTL=\$400! \ TA2 control
+TA2CCTL0=\$402! \ Capture/compare control 0
+TA2CCTL1=\$404! \ Capture/compare control 1
+TA2R=\$410! \ TA2 counter register
+TA2CCR0=\$412! \ Capture/compare register 0
+TA2CCR1=\$414! \ Capture/compare register 1
+TA2EX0=\$420! \ TA2 expansion register 0
+TA2IV=\$42E! \ TA2 interrupt vector
+
+TA3CTL=\$440! \ TA3 control
+TA3CCTL0=\$442! \ Capture/compare control 0
+TA3CCTL1=\$444! \ Capture/compare control 1
+TA3R=\$450! \ TA3 counter register
+TA3CCR0=\$452! \ Capture/compare register 0
+TA3CCR1=\$454! \ Capture/compare register 1
+TA3EX0=\$460! \ TA3 expansion register 0
+TA3IV=\$46E! \ TA3 interrupt vector
MPY=\$4C0! \ 16-bit operand 1 - multiply
MPYS=\$4C2! \ 16-bit operand 1 - signed multiply
MPY32CTL0=\$4EC! \ MPY32 control register 0
-UCA0CTLW0=\$500! \ eUSCI_A control word 0
-UCA0CTLW1=\$502! \ eUSCI_A control word 1
-UCA0BRW=\$506!
-UCA0BR0=\$506! \ eUSCI_A baud rate 0
-UCA0BR1=\$507! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$508! \ eUSCI_A modulation control
-UCA0STAT=\$50A! \ eUSCI_A status
-UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
-UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$510! \ eUSCI_A LIN control
-UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
-UCA0IE=\$51A! \ eUSCI_A interrupt enable
-UCA0IFG=\$51C! \ eUSCI_A interrupt flags
-UCA0IV=\$51E! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$520! \ eUSCI_A control word 0
-UCA1CTLW1=\$522! \ eUSCI_A control word 1
-UCA1BRW=\$526!
-UCA1BR0=\$526! \ eUSCI_A baud rate 0
-UCA1BR1=\$527! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$528! \ eUSCI_A modulation control
-UCA1STAT=\$52A! \ eUSCI_A status
-UCA1RXBUF=\$52C! \ eUSCI_A receive buffer
-UCA1TXBUF=\$52E! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$530! \ eUSCI_A LIN control
-UCA1IRTCTL=\$532! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$533! \ eUSCI_A IrDA receive control
-UCA1IE=\$53A! \ eUSCI_A interrupt enable
-UCA1IFG=\$53C! \ eUSCI_A interrupt flags
-UCA1IV=\$53E! \ eUSCI_A interrupt vector word
-
-UCB0CTLW0=\$540! \ eUSCI_B control word 0
-UCB0CTLW1=\$542! \ eUSCI_B control word 1
-UCB0BRW=\$546!
-UCB0BR0=\$546! \ eUSCI_B bit rate 0
-UCB0BR1=\$547! \ eUSCI_B bit rate 1
-UCB0STATW=\$548! \ eUSCI_B status word
-UCBCNT0=\$549! \ eUSCI_B hardware count
-UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$55C! \ eUSCI_B received address
-UCB0ADDMASK=\$55E! \ eUSCI_B address mask
-UCB0I2CSA=\$560! \ eUSCI I2C slave address
-UCB0IE=\$56A! \ eUSCI interrupt enable
-UCB0IFG=\$56C! \ eUSCI interrupt flags
-UCB0IV=\$56E! \ eUSCI interrupt vector word
+UCA0CTLW0=\$500! \ eUSCI_A control word 0
+UCA0CTLW1=\$502! \ eUSCI_A control word 1
+UCA0BRW=\$506!
+UCA0BR0=\$506! \ eUSCI_A baud rate 0
+UCA0BR1=\$507! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$508! \ eUSCI_A modulation control
+UCA0STAT=\$50A! \ eUSCI_A status
+UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
+UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$510! \ eUSCI_A LIN control
+UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
+UCA0IE=\$51A! \ eUSCI_A interrupt enable
+UCA0IFG=\$51C! \ eUSCI_A interrupt flags
+UCA0IV=\$51E! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$520! \ eUSCI_A control word 0
+UCA1CTLW1=\$522! \ eUSCI_A control word 1
+UCA1BRW=\$526!
+UCA1BR0=\$526! \ eUSCI_A baud rate 0
+UCA1BR1=\$527! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$528! \ eUSCI_A modulation control
+UCA1STAT=\$52A! \ eUSCI_A status
+UCA1RXBUF=\$52C! \ eUSCI_A receive buffer
+UCA1TXBUF=\$52E! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$530! \ eUSCI_A LIN control
+UCA1IRTCTL=\$532! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$533! \ eUSCI_A IrDA receive control
+UCA1IE=\$53A! \ eUSCI_A interrupt enable
+UCA1IFG=\$53C! \ eUSCI_A interrupt flags
+UCA1IV=\$53E! \ eUSCI_A interrupt vector word
+
+UCB0CTLW0=\$540! \ eUSCI_B control word 0
+UCB0CTLW1=\$542! \ eUSCI_B control word 1
+UCB0BRW=\$546!
+UCB0BR0=\$546! \ eUSCI_B bit rate 0
+UCB0BR1=\$547! \ eUSCI_B bit rate 1
+UCB0STATW=\$548! \ eUSCI_B status word
+UCBCNT0=\$549! \ eUSCI_B hardware count
+UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$55C! \ eUSCI_B received address
+UCB0ADDMASK=\$55E! \ eUSCI_B address mask
+UCB0I2CSA=\$560! \ eUSCI I2C slave address
+UCB0IE=\$56A! \ eUSCI interrupt enable
+UCB0IFG=\$56C! \ eUSCI interrupt flags
+UCB0IV=\$56E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-BAKMEM0=\$660! \ Backup Memory 0
-BAKMEM1=\$662! \ Backup Memory 1
-BAKMEM2=\$664! \ Backup Memory 2
-BAKMEM3=\$666! \ Backup Memory 3
-BAKMEM4=\$668! \ Backup Memory 4
-BAKMEM5=\$66A! \ Backup Memory 5
-BAKMEM6=\$66C! \ Backup Memory 6
-BAKMEM7=\$66E! \ Backup Memory 7
-BAKMEM8=\$670! \ Backup Memory 8
-BAKMEM9=\$672! \ Backup Memory 9
-BAKMEM10=\$674! \ Backup Memory 10
-BAKMEM11=\$676! \ Backup Memory 11
-BAKMEM12=\$678! \ Backup Memory 12
-BAKMEM13=\$67A! \ Backup Memory 13
-BAKMEM14=\$67C! \ Backup Memory 14
-BAKMEM15=\$67E! \ Backup Memory 15
-
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+BAKMEM0=\$660! \ Backup Memory 0
+BAKMEM1=\$662! \ Backup Memory 1
+BAKMEM2=\$664! \ Backup Memory 2
+BAKMEM3=\$666! \ Backup Memory 3
+BAKMEM4=\$668! \ Backup Memory 4
+BAKMEM5=\$66A! \ Backup Memory 5
+BAKMEM6=\$66C! \ Backup Memory 6
+BAKMEM7=\$66E! \ Backup Memory 7
+BAKMEM8=\$670! \ Backup Memory 8
+BAKMEM9=\$672! \ Backup Memory 9
+BAKMEM10=\$674! \ Backup Memory 10
+BAKMEM11=\$676! \ Backup Memory 11
+BAKMEM12=\$678! \ Backup Memory 12
+BAKMEM13=\$67A! \ Backup Memory 13
+BAKMEM14=\$67C! \ Backup Memory 14
+BAKMEM15=\$67E! \ Backup Memory 15
+
+ADC10CTL0=\$700! \ ADC10_B Control register 0
+ADC10CTL1=\$702! \ ADC10_B Control register 1
+ADC10CTL2=\$704! \ ADC10_B Control register 2
+ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
+ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
+ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
+ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
+ADC10IE=\$71A! \ ADC10_B Interrupt Enable
+ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
+ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
; ----------------------------------------------
PAGESIZE .equ 512 ; MPU unit
; ----------------------------------------------
-; BSL
+; BSL
; ----------------------------------------------
BSL1 .equ 01000h ; to 17FFh
CapTivateLib .equ 0C0000h ; to 0C3FFFh
; RAM
; ----------------------------------------------
RAM_ORG .equ 02000h ; to 3FFFh
-RAM_LEN .equ 02000h ;
+RAM_LEN .equ 02000h ;
; ----------------------------------------------
; FRAM
; ----------------------------------------------
JTAG_PASSWORD .equ 0FF88h ; 256 bits
BSL_PASSWORD .equ 0FFE0h ; 256 bits
BSL_I2C_ADRE .equ 0FFA0h ;
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
; .org INTVECT ; FFDA-FFFF 27 vectors + reset
;
-; .word reset ; 0FFC8h - CapTivate
-; .word reset ; 0FFCAh - eCOMP0
-; .word reset ; 0FFCCh - P6
-; .word reset ; 0FFCEh - P5
-; .word reset ; 0FFD0h - P4
-; .word reset ; 0FFD2h - P3
-; .word reset ; 0FFD4h - P2
-; .word reset ; 0FFD6h - P1
-; .word reset ; 0FFD8h - ADC10
-; .word reset ; 0FFDAh - eUSCI_B1
-; .word reset ; 0FFDCh - eUSCI_B0
-; .word reset ; 0FFDEh - eUSCI_A1
-; .word reset ; 0FFE0h - eUSCI_A0
-; .word reset ; 0FFE2h - WDT
-; .word reset ; 0FFE4h - RTC
-; .word reset ; 0FFE6h - TB0_x
-; .word reset ; 0FFE8h - TB0_0
-; .word reset ; 0FFEAh - TA3_x
-; .word reset ; 0FFECh - TA3_0
-; .word reset ; 0FFEEh - TA2_x
-; .word reset ; 0FFF0h - TA2_0
-; .word reset ; 0FFF2h - TA1_x
-; .word reset ; 0FFF4h - TA1_0
-; .word reset ; 0FFF6h - TA0_x
-; .word reset ; 0FFF8h - TA0_0
-; .word reset ; 0FFFAh - UserNMI
-; .word reset ; 0FFFCh - SysNMI
-; .word reset ; 0FFFEh - Reset
+; .word reset ; 0FFC8h - CapTivate
+; .word reset ; 0FFCAh - eCOMP0
+; .word reset ; 0FFCCh - P6
+; .word reset ; 0FFCEh - P5
+; .word reset ; 0FFD0h - P4
+; .word reset ; 0FFD2h - P3
+; .word reset ; 0FFD4h - P2
+; .word reset ; 0FFD6h - P1
+; .word reset ; 0FFD8h - ADC10
+; .word reset ; 0FFDAh - eUSCI_B1
+; .word reset ; 0FFDCh - eUSCI_B0
+; .word reset ; 0FFDEh - eUSCI_A1
+; .word reset ; 0FFE0h - eUSCI_A0
+; .word reset ; 0FFE2h - WDT
+; .word reset ; 0FFE4h - RTC
+; .word reset ; 0FFE6h - TB0_x
+; .word reset ; 0FFE8h - TB0_0
+; .word reset ; 0FFEAh - TA3_x
+; .word reset ; 0FFECh - TA3_0
+; .word reset ; 0FFEEh - TA2_x
+; .word reset ; 0FFF0h - TA2_0
+; .word reset ; 0FFF2h - TA1_x
+; .word reset ; 0FFF4h - TA1_0
+; .word reset ; 0FFF6h - TA0_x
+; .word reset ; 0FFF8h - TA0_0
+; .word reset ; 0FFFAh - UserNMI
+; .word reset ; 0FFFCh - SysNMI
+; .word reset ; 0FFFEh - Reset
; ----------------------------------------------------------------------
; MSP430FR2476 Peripheral File Map
eUSCI_B1_SFR .equ 0580h ; eUSCI_B1
BACK_MEM_SFR .equ 0660h
ADC10_B_SFR .equ 0700h
-eCOMP_SFR .equ 08F0h
+eCOMP_SFR .equ 08F0h
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : LOCK PMM_LOCKLPM5
; ----------------------------------------------------------------------
; POWER ON RESET SYS config
; ----------------------------------------------------------------------
-SYSCTL .equ SYS_SFR + 00h ; System control
-SYSBSLC .equ SYS_SFR + 02h ; Bootstrap loader configuration area
-SYSJMBC .equ SYS_SFR + 06h ; JTAG mailbox control
-SYSJMBI0 .equ SYS_SFR + 08h ; JTAG mailbox input 0
-SYSJMBI1 .equ SYS_SFR + 0Ah ; JTAG mailbox input 1
-SYSJMBO0 .equ SYS_SFR + 0Ch ; JTAG mailbox output 0
-SYSJMBO1 .equ SYS_SFR + 0Eh ; JTAG mailbox output 1
-SYSBERRIV .equ SYS_SFR + 18h ; Bus Error vector generator
-SYSUNIV .equ SYS_SFR + 1Ah ; User NMI vector generator
-SYSSNIV .equ SYS_SFR + 1Ch ; System NMI vector generator
-SYSRSTIV .equ SYS_SFR + 1Eh ; Reset vector generator
-SYSCFG0 .equ SYS_SFR + 20h ; System configuration 0
-SYSCFG1 .equ SYS_SFR + 22h ; System configuration 1
-SYSCFG2 .equ SYS_SFR + 24h ; System configuration 2
-
+SYSCTL .equ SYS_SFR + 00h ; System control
+SYSBSLC .equ SYS_SFR + 02h ; Bootstrap loader configuration area
+SYSJMBC .equ SYS_SFR + 06h ; JTAG mailbox control
+SYSJMBI0 .equ SYS_SFR + 08h ; JTAG mailbox input 0
+SYSJMBI1 .equ SYS_SFR + 0Ah ; JTAG mailbox input 1
+SYSJMBO0 .equ SYS_SFR + 0Ch ; JTAG mailbox output 0
+SYSJMBO1 .equ SYS_SFR + 0Eh ; JTAG mailbox output 1
+SYSBERRIV .equ SYS_SFR + 18h ; Bus Error vector generator
+SYSUNIV .equ SYS_SFR + 1Ah ; User NMI vector generator
+SYSSNIV .equ SYS_SFR + 1Ch ; System NMI vector generator
+SYSRSTIV .equ SYS_SFR + 1Eh ; Reset vector generator
+SYSCFG0 .equ SYS_SFR + 20h ; System configuration 0
+SYSCFG1 .equ SYS_SFR + 22h ; System configuration 1
+SYSCFG2 .equ SYS_SFR + 24h ; System configuration 2
+
; SYS Control Bits
; ...
P1REN .equ PA_SFR + 06h ; Port 1 Resistor Enable
P1SEL0 .equ PA_SFR + 0Ah ; Port 1 Selection 0
P1SEL1 .equ PA_SFR + 0Ch ; Port 1 Selection 1
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P1IFG .equ PA_SFR + 1Ch ; Port 1 Interrupt Flag
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt Flag
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3/4
P3IES .equ PB_SFR + 18h ; Port 3 Interrupt Edge Select
P3IE .equ PB_SFR + 1Ah ; Port 3 Interrupt Enable
P3IFG .equ PB_SFR + 1Ch ; Port 3 Interrupt Flag
-P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
+P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
P4IN .equ PB_SFR + 01h ; Port 4 Input */
P4OUT .equ PB_SFR + 03h ; Port 4 Output
P4IES .equ PB_SFR + 19h ; Port 4 Interrupt Edge Select
P4IE .equ PB_SFR + 1Bh ; Port 4 Interrupt Enable
P4IFG .equ PB_SFR + 1Dh ; Port 4 Interrupt Flag
-P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
+P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT5/6
P5REN .equ PC_SFR + 06h ; Port 5 Resistor Enable
P5SEL0 .equ PC_SFR + 0Ah ; Port 5 Selection 0
P5SEL1 .equ PC_SFR + 0Ch ; Port 5 Selection 1
-P5IV .equ PC_SFR + 0Eh ; Port 5 Interrupt Vector word
+P5IV .equ PC_SFR + 0Eh ; Port 5 Interrupt Vector word
P5SELC .set PC_SFR + 16h ; Port 5 Complement Selection
P5IES .equ PC_SFR + 18h ; Port 5 Interrupt Edge Select
P5IE .equ PC_SFR + 1Ah ; Port 5 Interrupt Enable
P6IES .equ PC_SFR + 19h ; Port 6 Interrupt Edge Select
P6IE .equ PC_SFR + 1Bh ; Port 6 Interrupt Enable
P6IFG .equ PC_SFR + 1Dh ; Port 6 Interrupt Flag
-P6IV .equ PC_SFR + 1Eh ; Port 6 Interrupt Vector word
+P6IV .equ PC_SFR + 1Eh ; Port 6 Interrupt Vector word
; ----------------------------------------------------------------------
RTC
; ----------------------------------------------------------------------
-RTCCTL .equ RTC_SFR + 00h ; Real-Time Clock Control
-RTCIV .equ RTC_SFR + 04h ; Real-Time Clock Interrupt Vector
-RTCMOD .equ RTC_SFR + 08h ; Real-Timer Clock Modulo
-RTCCNT .equ RTC_SFR + 0Ch ; Real-Time Clock Counter
+RTCCTL .equ RTC_SFR + 00h ; Real-Time Clock Control
+RTCIV .equ RTC_SFR + 04h ; Real-Time Clock Interrupt Vector
+RTCMOD .equ RTC_SFR + 08h ; Real-Timer Clock Modulo
+RTCCNT .equ RTC_SFR + 0Ch ; Real-Time Clock Counter
; ----------------------------------------------------------------------
MPY_32
TERM_RXBUF .equ eUSCI_B1_SFR + 0Ch ; USCI_B1 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B1_SFR + 0Eh ; USCI_B1 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B1_SFR + 14h ; USCI_B1 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B1_SFR + 1Ch ; USCI_B1 Received Address Register
+TERM_ADDRX .equ eUSCI_B1_SFR + 1Ch ; USCI_B1 Received Address Register
TERM_I2CSA .equ eUSCI_B1_SFR + 20h ; USCI_B1 I2C Slave Address
TERM_IE .equ eUSCI_B1_SFR + 2Ah ; USCI_B1 Interrupt Enable
TERM_IFG .equ eUSCI_B1_SFR + 2Ch ; USCI_B1 Interrupt Flags Register
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ----------------------------------------------
! FastForth RAM memory map (>= 1k):
! ----------------------------------------------
-LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
-LSATCK=\$2000! \ leave stack, grow up
-PSTACK=\$2080! \ parameter stack, grow down
-RSTACK=\$20E0! \ Return stack, grow down
-
-PAD_I2CADR=\$20E0! \ RX I2C address
-PAD_I2CCNT=\$20E2! \ count max
-PAD_ORG=\$20E4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$2138! \ TX I2C address
-TIB_I2CCNT=\$213A! \ count of bytes
-TIB_ORG=\$213C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$2190! \ a good address for HOLDS
-HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
+LEAVEPTR=\$2000! Leave-stack pointer, init by QUIT
+LSATCK=\$2000! leave stack, grow up
+PSTACK=\$2080! parameter stack, grow down
+RSTACK=\$20E0! Return stack, grow down
+!
+PAD_I2CADR=\$20E0! RX I2C address
+PAD_I2CCNT=\$20E2! count max
+PAD_ORG=\$20E4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$2138! TX I2C address
+TIB_I2CCNT=\$213A! count of bytes
+TIB_ORG=\$213C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$2190! base address for HOLDS
+HOLD_BASE=\$21B2! BASE HOLD area, grow down
+!
HP=\$21B2! HOLD ptr
-CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$21B6!
-LAST_THREAD=\$21B8!
-LAST_CFA=\$21BA!
-LAST_PSP=\$21BC!
-
-STATEADR=\$21BE! Interpreter state
-
-SOURCE_LEN=\$21C0! len of input stream
-SOURCE_ORG=\$21C2! adr of input stream
-TOIN=\$21C4! >IN
-DP=\$21C6! dictionary ptr
-
-LASTVOC=\$21C8! keep VOC-LINK
-CONTEXT=\$21CA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21DA! CURRENT dictionnary ptr
-
-BASEADR=\$21DC! numeric base, must be defined before first reset !
-LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$21B4!
+LAST_THREAD=\$21B6!
+LAST_CFA=\$21B8!
+LAST_PSP=\$21BA!
+!
+STATEADR=\$21BC! Interpreter state
+BASEADR=\$21BE!
+CAPS=\$21C0 !
+!
+SOURCE_LEN=\$21C2! len of input stream
+SOURCE_ORG=\$21C4! adr of input stream
+TOIN=\$21C6! >IN
+DP=\$21C8! dictionary ptr
+!
+LASTVOC=\$21CA! keep VOC-LINK
+CURRENT=\$21CC! CURRENT dictionnary ptr
+CONTEXT=\$21CE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
!21E0! 28 RAM bytes free
! ---------------------------------------
BUFEND=\$2400!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2402!
BS_FirstSectorL=\$2404!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$241E!
+BufferPtr=\$241E!
BufferLen=\$2420!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
+NewClusterL=\$2426! 16 bits wide (FAT16)
+NewClusterH=\$2428! 16 bits wide (FAT16)
CurFATsector=\$242A!
! ---------------------------------------
! ---------------------------------------
DIRclusterL=\$242C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$242E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2430!
+EntryOfst=\$2430!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2438!
SLEEP=\$8000! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$800A! CODE compiled by LITERAL
-XSQUOTE=\$8014! CODE compiled by S" and S_
-HEREXEC=\$8028! CODE HERE and BEGIN execute address
-QFBRAN=\$8034! CODE compiled by IF UNTIL
-BRAN=\$803A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$803C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$803E! CODE compiled by DO
-XPLOOP=\$804E! CODE compiled by +LOOP
-XLOOP=\$8060! CODE compiled by LOOP
-MUSMOD=\$8066! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$8078! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$8080! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$80AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$80AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$80BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$80CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$80D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$80E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$80EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$801E! CODE compiled by S" and S_
+HEREXEC=\$8032! CODE HERE and BEGIN execute address
+MUSMOD=\$803E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$8050! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$8058! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$8082! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$8084! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$8094! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$80A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$80AC! CODE compiled by IF UNTIL
+BRAN=\$80B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$80B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$80B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$80C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$80F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$812A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$8136! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$80D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$8108! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$8112! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$8194! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$819C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$81C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$81C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$81B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$818E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$81BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$81BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$8154! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$817E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$8184! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$8186! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$8144! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$8146! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$8156! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$8156! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$8158! asm CODE, content of WARM+2 by default
+I2C_WARM=\$8180! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR2476
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ; reset by wipe and by S1+<reset>
JTAG_SIG2=\$FF82! if JTAG_SIG <> |\$FFFFFFFF, \$00000000|, SBW and JTAG are locked
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
BSL_I2C_ADRE=\$FFA0!
I2CSLA0=\$FFA2! UCBxI2COA0 default value address
I2CSLA1=\$FFA4! UCBxI2COA1 default value address
VECT_ORG=\$FFDA! FFDA-FFFF
VECT_LEN=\$38!
! ----------------------------------------------
-
-
-; .org INTVECT ; FFDA-FFFF 26 vectors + reset
-;
-; .word reset ; FFCAh - eCOMP0
-; .word reset ; FFCCh - P6
-; .word reset ; FFCEh - P5
-; .word reset ; FFD0h - P4
-; .word reset ; FFD2h - P3
-; .word reset ; FFD4h - P2
-; .word reset ; FFD6h - P1
-; .word reset ; FFD8h - ADC10
-; .word reset ; FFDAh - eUSCI_B1
-; .word reset ; FFDCh - eUSCI_B0
-; .word reset ; FFDEh - eUSCI_A1
-; .word reset ; FFE0h - eUSCI_A0
-; .word reset ; FFE2h - WDT
-; .word reset ; FFE4h - RTC
-; .word reset ; FFE6h - TB0_x
-; .word reset ; FFE8h - TB0_0
-; .word reset ; FFEAh - TA3_x
-; .word reset ; FFECh - TA3_0
-; .word reset ; FFEEh - TA2_x
-; .word reset ; FFF0h - TA2_0
-; .word reset ; FFF2h - TA1_x
-; .word reset ; FFF4h - TA1_0
-; .word reset ; FFF6h - TA0_x
-; .word reset ; FFF8h - TA0_0
-; .word reset ; FFFAh - UserNMI
-; .word reset ; FFFCh - SysNMI
-
-
ECOMP0_VEC=\$FFCA!
P6_VEC=\$FFCC!
P5_VEC=\$FFCE!
S_NMI_VEC=\$FFFC!
RST_VEC=\$FFFE!
-
-
-
-
! ----------------------------------------------------------------------
! MSP430FR2433 Peripheral File Map
! ----------------------------------------------------------------------
!TA1_SFR .equ 03C0h
!TA2_SFR .equ 0400h
!TA3_SFR .equ 0440h
+!TB0_SFR .equ 0480h
!MPY_SFR .equ 04C0h
!eUSCI_A0_SFR .equ 0500h ; eUSCI_A0
!eUSCI_A1_SFR .equ 0520h ; eUSCI_A1
PMMCTL0=\$120! \ PMM Control 0
PMMCTL1=\$122! \ PMM Control 0
PMMCTL2=\$124! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-SYSCTL=\$140! \ System control
-SYSBSLC=\$142! \ Bootstrap loader configuration area
-SYSJMBC=\$146! \ JTAG mailbox control
-SYSJMBI0=\$148! \ JTAG mailbox input 0
-SYSJMBI1=\$14A! \ JTAG mailbox input 1
-SYSJMBO0=\$14C! \ JTAG mailbox output 0
-SYSJMBO1=\$14E! \ JTAG mailbox output 1
-SYSUNIV=\$15A! \ User NMI vector generator
-SYSSNIV=\$15C! \ System NMI vector generator
-SYSRSTIV=\$15E! \ Reset vector generator
-SYSCFG0=\$160! \ System configuration 0
-SYSCFG1=\$162! \ System configuration 1
-SYSCFG2=\$164! \ System configuration 2
-
-CSCTL0=\$180! \ CS control 0
-CSCTL1=\$182! \ CS control 1
-CSCTL2=\$184! \ CS control 2
-CSCTL3=\$186! \ CS control 3
-CSCTL4=\$188! \ CS control 4
-CSCTL5=\$18A! \ CS control 5
-CSCTL6=\$18C! \ CS control 6
-CSCTL7=\$18E! \ CS control 7
-CSCTL8=\$190! \ CS control 8
-
-FRCTLCTL0=\$1A0! \ FRAM control 0
-GCCTL0=\$1A4! \ General control 0
-GCCTL1=\$1A6! \ General control 1
-
-CRC16DI=\$1C0! \ CRC data input
-CRCDIRB=\$1C2! \ CRC data input reverse byte
-CRCINIRES=\$1C4! \ CRC initialization and result
-CRCRESR=\$1C6! \ CRC result reverse byte
+SYSCTL=\$140! \ System control
+SYSBSLC=\$142! \ Bootstrap loader configuration area
+SYSJMBC=\$146! \ JTAG mailbox control
+SYSJMBI0=\$148! \ JTAG mailbox input 0
+SYSJMBI1=\$14A! \ JTAG mailbox input 1
+SYSJMBO0=\$14C! \ JTAG mailbox output 0
+SYSJMBO1=\$14E! \ JTAG mailbox output 1
+SYSUNIV=\$15A! \ User NMI vector generator
+SYSSNIV=\$15C! \ System NMI vector generator
+SYSRSTIV=\$15E! \ Reset vector generator
+SYSCFG0=\$160! \ System configuration 0
+SYSCFG1=\$162! \ System configuration 1
+SYSCFG2=\$164! \ System configuration 2
+
+CSCTL0=\$180! \ CS control 0
+CSCTL1=\$182! \ CS control 1
+CSCTL2=\$184! \ CS control 2
+CSCTL3=\$186! \ CS control 3
+CSCTL4=\$188! \ CS control 4
+CSCTL5=\$18A! \ CS control 5
+CSCTL6=\$18C! \ CS control 6
+CSCTL7=\$18E! \ CS control 7
+CSCTL8=\$190! \ CS control 8
+
+FRCTLCTL0=\$1A0! \ FRAM control 0
+GCCTL0=\$1A4! \ General control 0
+GCCTL1=\$1A6! \ General control 1
+
+CRC16DI=\$1C0! \ CRC data input
+CRCDIRB=\$1C2! \ CRC data input reverse byte
+CRCINIRES=\$1C4! \ CRC initialization and result
+CRCRESR=\$1C6! \ CRC result reverse byte
WDTCTL=\$1CC! \ WDT control register
P6IFG=\$25D!
P6IV=\$25E!
-RTCCTL=\$300! \ RTC control
-RTCIV=\$304! \ RTC interrupt vector word
-RTCMOD=\$308! \ RTC modulo
-RTCCNT=\$30C! \ RTC counter register
+RTCCTL=\$300! \ RTC control
+RTCIV=\$304! \ RTC interrupt vector word
+RTCMOD=\$308! \ RTC modulo
+RTCCNT=\$30C! \ RTC counter register
TACLR=4!
TAIFG=1!
CCIFG=1!
-TA0CTL=\$380! \ TA0 control
-TA0CCTL0=\$382! \ Capture/compare control 0
-TA0CCTL1=\$384! \ Capture/compare control 1
-TA0CCTL2=\$386! \ Capture/compare control 2
-TA0R=\$390! \ TA0 counter register
-TA0CCR0=\$392! \ Capture/compare register 0
-TA0CCR1=\$394! \ Capture/compare register 1
-TA0CCR2=\$396! \ Capture/compare register 2
-TA0EX0=\$3A0! \ TA0 expansion register 0
-TA0IV=\$3AE! \ TA0 interrupt vector
-
-TA1CTL=\$3C0! \ TA1 control
-TA1CCTL0=\$3C2! \ Capture/compare control 0
-TA1CCTL1=\$3C4! \ Capture/compare control 1
-TA1CCTL2=\$3C6! \ Capture/compare control 2
-TA1R=\$3D0! \ TA1 counter register
-TA1CCR0=\$3D2! \ Capture/compare register 0
-TA1CCR1=\$3D4! \ Capture/compare register 1
-TA1CCR2=\$3D6! \ Capture/compare register 2
-TA1EX0=\$3E0! \ TA1 expansion register 0
-TA1IV=\$3EE! \ TA1 interrupt vector
-
-TA2CTL=\$400! \ TA2 control
-TA2CCTL0=\$402! \ Capture/compare control 0
-TA2CCTL1=\$404! \ Capture/compare control 1
-TA2CCTL2=\$406! \ Capture/compare control 2
-TA2R=\$410! \ TA2 counter register
-TA2CCR0=\$412! \ Capture/compare register 0
-TA2CCR1=\$414! \ Capture/compare register 1
-TA2CCR1=\$416! \ Capture/compare register 2
-TA2EX0=\$420! \ TA2 expansion register 0
-TA2IV=\$42E! \ TA2 interrupt vector
-
-TA3CTL=\$440! \ TA3 control
-TA3CCTL0=\$442! \ Capture/compare control 0
-TA3CCTL1=\$444! \ Capture/compare control 1
-TA3CCTL1=\$446! \ Capture/compare control 2
-TA3R=\$450! \ TA3 counter register
-TA3CCR0=\$452! \ Capture/compare register 0
-TA3CCR1=\$454! \ Capture/compare register 1
-TA3CCR1=\$456! \ Capture/compare register 2
-TA3EX0=\$460! \ TA3 expansion register 0
-TA3IV=\$46E! \ TA3 interrupt vector
-
-TB0CTL=\$480! \ TB0 control
-TB0CCTL0=\$482! \ Capture/compare control 0
-TB0CCTL1=\$484! \ Capture/compare control 1
-TB0CCTL2=\$486! \ Capture/compare control 2
-TB0CCTL3=\$488! \ Capture/compare control 3
-TB0CCTL4=\$48A! \ Capture/compare control 4
-TB0CCTL5=\$48C! \ Capture/compare control 5
-TB0CCTL6=\$48E! \ Capture/compare control 6
-TB0R=\$490! \ TB0 counter register
-TB0CCR0=\$492! \ Capture/compare register 0
-TB0CCR1=\$494! \ Capture/compare register 1
-TB0CCR2=\$496! \ Capture/compare register 2
-TB0CCR3=\$498! \ Capture/compare register 3
-TB0CCR5=\$49A! \ Capture/compare register 4
-TB0CCR5=\$49C! \ Capture/compare register 5
-TB0CCR6=\$49E! \ Capture/compare register 6
-TB0EX0=\$4A0! \ TB0 expansion register 0
-TB0IV=\$4AE! \ TB0 interrupt vector
+TA0CTL=\$380! \ TA0 control
+TA0CCTL0=\$382! \ Capture/compare control 0
+TA0CCTL1=\$384! \ Capture/compare control 1
+TA0CCTL2=\$386! \ Capture/compare control 2
+TA0R=\$390! \ TA0 counter register
+TA0CCR0=\$392! \ Capture/compare register 0
+TA0CCR1=\$394! \ Capture/compare register 1
+TA0CCR2=\$396! \ Capture/compare register 2
+TA0EX0=\$3A0! \ TA0 expansion register 0
+TA0IV=\$3AE! \ TA0 interrupt vector
+
+TA1CTL=\$3C0! \ TA1 control
+TA1CCTL0=\$3C2! \ Capture/compare control 0
+TA1CCTL1=\$3C4! \ Capture/compare control 1
+TA1CCTL2=\$3C6! \ Capture/compare control 2
+TA1R=\$3D0! \ TA1 counter register
+TA1CCR0=\$3D2! \ Capture/compare register 0
+TA1CCR1=\$3D4! \ Capture/compare register 1
+TA1CCR2=\$3D6! \ Capture/compare register 2
+TA1EX0=\$3E0! \ TA1 expansion register 0
+TA1IV=\$3EE! \ TA1 interrupt vector
+
+TA2CTL=\$400! \ TA2 control
+TA2CCTL0=\$402! \ Capture/compare control 0
+TA2CCTL1=\$404! \ Capture/compare control 1
+TA2CCTL2=\$406! \ Capture/compare control 2
+TA2R=\$410! \ TA2 counter register
+TA2CCR0=\$412! \ Capture/compare register 0
+TA2CCR1=\$414! \ Capture/compare register 1
+TA2CCR1=\$416! \ Capture/compare register 2
+TA2EX0=\$420! \ TA2 expansion register 0
+TA2IV=\$42E! \ TA2 interrupt vector
+
+TA3CTL=\$440! \ TA3 control
+TA3CCTL0=\$442! \ Capture/compare control 0
+TA3CCTL1=\$444! \ Capture/compare control 1
+TA3CCTL1=\$446! \ Capture/compare control 2
+TA3R=\$450! \ TA3 counter register
+TA3CCR0=\$452! \ Capture/compare register 0
+TA3CCR1=\$454! \ Capture/compare register 1
+TA3CCR1=\$456! \ Capture/compare register 2
+TA3EX0=\$460! \ TA3 expansion register 0
+TA3IV=\$46E! \ TA3 interrupt vector
+
+TB0CTL=\$480! \ TB0 control
+TB0CCTL0=\$482! \ Capture/compare control 0
+TB0CCTL1=\$484! \ Capture/compare control 1
+TB0CCTL2=\$486! \ Capture/compare control 2
+TB0CCTL3=\$488! \ Capture/compare control 3
+TB0CCTL4=\$48A! \ Capture/compare control 4
+TB0CCTL5=\$48C! \ Capture/compare control 5
+TB0CCTL6=\$48E! \ Capture/compare control 6
+TB0R=\$490! \ TB0 counter register
+TB0CCR0=\$492! \ Capture/compare register 0
+TB0CCR1=\$494! \ Capture/compare register 1
+TB0CCR2=\$496! \ Capture/compare register 2
+TB0CCR3=\$498! \ Capture/compare register 3
+TB0CCR5=\$49A! \ Capture/compare register 4
+TB0CCR5=\$49C! \ Capture/compare register 5
+TB0CCR6=\$49E! \ Capture/compare register 6
+TB0EX0=\$4A0! \ TB0 expansion register 0
+TB0IV=\$4AE! \ TB0 interrupt vector
MPY=\$4C0! \ 16-bit operand 1 - multiply
MPYS=\$4C2! \ 16-bit operand 1 - signed multiply
MPY32CTL0=\$4EC! \ MPY32 control register 0
-UCA0CTLW0=\$500! \ eUSCI_A control word 0
-UCA0CTLW1=\$502! \ eUSCI_A control word 1
-UCA0BRW=\$506!
-UCA0BR0=\$506! \ eUSCI_A baud rate 0
-UCA0BR1=\$507! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$508! \ eUSCI_A modulation control
-UCA0STAT=\$50A! \ eUSCI_A status
-UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
-UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$510! \ eUSCI_A LIN control
-UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
-UCA0IE=\$51A! \ eUSCI_A interrupt enable
-UCA0IFG=\$51C! \ eUSCI_A interrupt flags
-UCA0IV=\$51E! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$520! \ eUSCI_A control word 0
-UCA1CTLW1=\$522! \ eUSCI_A control word 1
-UCA1BRW=\$526!
-UCA1BR0=\$526! \ eUSCI_A baud rate 0
-UCA1BR1=\$527! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$528! \ eUSCI_A modulation control
-UCA1STAT=\$52A! \ eUSCI_A status
-UCA1RXBUF=\$52C! \ eUSCI_A receive buffer
-UCA1TXBUF=\$52E! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$530! \ eUSCI_A LIN control
-UCA1IRTCTL=\$532! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$533! \ eUSCI_A IrDA receive control
-UCA1IE=\$53A! \ eUSCI_A interrupt enable
-UCA1IFG=\$53C! \ eUSCI_A interrupt flags
-UCA1IV=\$53E! \ eUSCI_A interrupt vector word
-
-UCB0CTLW0=\$540! \ eUSCI_B control word 0
-UCB0CTLW1=\$542! \ eUSCI_B control word 1
-UCB0BRW=\$546!
-UCB0BR0=\$546! \ eUSCI_B bit rate 0
-UCB0BR1=\$547! \ eUSCI_B bit rate 1
-UCB0STATW=\$548! \ eUSCI_B status word
-UCBCNT0=\$549! \ eUSCI_B hardware count
-UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$55C! \ eUSCI_B received address
-UCB0ADDMASK=\$55E! \ eUSCI_B address mask
-UCB0I2CSA=\$560! \ eUSCI I2C slave address
-UCB0IE=\$56A! \ eUSCI interrupt enable
-UCB0IFG=\$56C! \ eUSCI interrupt flags
-UCB0IV=\$56E! \ eUSCI interrupt vector word
-
-UCB1CTLW0=\$580! \ eUSCI_B control word 0
-UCB1CTLW1=\$582! \ eUSCI_B control word 1
-UCB1BRW=\$586!
-UCB1BR0=\$586! \ eUSCI_B bit rate 0
-UCB1BR1=\$587! \ eUSCI_B bit rate 1
-UCB1STATW=\$588! \ eUSCI_B status word
-UCB1NT0=\$589! \ eUSCI_B hardware count
-UCB1TBCNT=\$58A! \ eUSCI_B byte counter threshold
-UCB1RXBUF=\$58C! \ eUSCI_B receive buffer
-UCB1TXBUF=\$58E! \ eUSCI_B transmit buffer
-UCB1I2COA0=\$594! \ eUSCI_B I2C own address 0
-UCB1I2COA1=\$596! \ eUSCI_B I2C own address 1
-UCB1I2COA2=\$598! \ eUSCI_B I2C own address 2
-UCB1I2COA3=\$59A! \ eUSCI_B I2C own address 3
-UCB1ADDRX=\$59C! \ eUSCI_B received address
-UCB1ADDMASK=\$59E! \ eUSCI_B address mask
-UCB1I2CSA=\$5A0! \ eUSCI I2C slave address
-UCB1IE=\$5AA! \ eUSCI interrupt enable
-UCB1IFG=\$5AC! \ eUSCI interrupt flags
-UCB1IV=\$5AE! \ eUSCI interrupt vector word
+UCA0CTLW0=\$500! \ eUSCI_A control word 0
+UCA0CTLW1=\$502! \ eUSCI_A control word 1
+UCA0BRW=\$506!
+UCA0BR0=\$506! \ eUSCI_A baud rate 0
+UCA0BR1=\$507! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$508! \ eUSCI_A modulation control
+UCA0STAT=\$50A! \ eUSCI_A status
+UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
+UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$510! \ eUSCI_A LIN control
+UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
+UCA0IE=\$51A! \ eUSCI_A interrupt enable
+UCA0IFG=\$51C! \ eUSCI_A interrupt flags
+UCA0IV=\$51E! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$520! \ eUSCI_A control word 0
+UCA1CTLW1=\$522! \ eUSCI_A control word 1
+UCA1BRW=\$526!
+UCA1BR0=\$526! \ eUSCI_A baud rate 0
+UCA1BR1=\$527! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$528! \ eUSCI_A modulation control
+UCA1STAT=\$52A! \ eUSCI_A status
+UCA1RXBUF=\$52C! \ eUSCI_A receive buffer
+UCA1TXBUF=\$52E! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$530! \ eUSCI_A LIN control
+UCA1IRTCTL=\$532! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$533! \ eUSCI_A IrDA receive control
+UCA1IE=\$53A! \ eUSCI_A interrupt enable
+UCA1IFG=\$53C! \ eUSCI_A interrupt flags
+UCA1IV=\$53E! \ eUSCI_A interrupt vector word
+
+UCB0CTLW0=\$540! \ eUSCI_B control word 0
+UCB0CTLW1=\$542! \ eUSCI_B control word 1
+UCB0BRW=\$546!
+UCB0BR0=\$546! \ eUSCI_B bit rate 0
+UCB0BR1=\$547! \ eUSCI_B bit rate 1
+UCB0STATW=\$548! \ eUSCI_B status word
+UCBCNT0=\$549! \ eUSCI_B hardware count
+UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$55C! \ eUSCI_B received address
+UCB0ADDMASK=\$55E! \ eUSCI_B address mask
+UCB0I2CSA=\$560! \ eUSCI I2C slave address
+UCB0IE=\$56A! \ eUSCI interrupt enable
+UCB0IFG=\$56C! \ eUSCI interrupt flags
+UCB0IV=\$56E! \ eUSCI interrupt vector word
+
+UCB1CTLW0=\$580! \ eUSCI_B control word 0
+UCB1CTLW1=\$582! \ eUSCI_B control word 1
+UCB1BRW=\$586!
+UCB1BR0=\$586! \ eUSCI_B bit rate 0
+UCB1BR1=\$587! \ eUSCI_B bit rate 1
+UCB1STATW=\$588! \ eUSCI_B status word
+UCB1NT0=\$589! \ eUSCI_B hardware count
+UCB1TBCNT=\$58A! \ eUSCI_B byte counter threshold
+UCB1RXBUF=\$58C! \ eUSCI_B receive buffer
+UCB1TXBUF=\$58E! \ eUSCI_B transmit buffer
+UCB1I2COA0=\$594! \ eUSCI_B I2C own address 0
+UCB1I2COA1=\$596! \ eUSCI_B I2C own address 1
+UCB1I2COA2=\$598! \ eUSCI_B I2C own address 2
+UCB1I2COA3=\$59A! \ eUSCI_B I2C own address 3
+UCB1ADDRX=\$59C! \ eUSCI_B received address
+UCB1ADDMASK=\$59E! \ eUSCI_B address mask
+UCB1I2CSA=\$5A0! \ eUSCI I2C slave address
+UCB1IE=\$5AA! \ eUSCI interrupt enable
+UCB1IFG=\$5AC! \ eUSCI interrupt flags
+UCB1IV=\$5AE! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-BAKMEM0=\$660! \ Backup Memory 0
-BAKMEM1=\$662! \ Backup Memory 1
-BAKMEM2=\$664! \ Backup Memory 2
-BAKMEM3=\$666! \ Backup Memory 3
-BAKMEM4=\$668! \ Backup Memory 4
-BAKMEM5=\$66A! \ Backup Memory 5
-BAKMEM6=\$66C! \ Backup Memory 6
-BAKMEM7=\$66E! \ Backup Memory 7
-BAKMEM8=\$670! \ Backup Memory 8
-BAKMEM9=\$672! \ Backup Memory 9
-BAKMEM10=\$674! \ Backup Memory 10
-BAKMEM11=\$676! \ Backup Memory 11
-BAKMEM12=\$678! \ Backup Memory 12
-BAKMEM13=\$67A! \ Backup Memory 13
-BAKMEM14=\$67C! \ Backup Memory 14
-BAKMEM15=\$67E! \ Backup Memory 15
-
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+BAKMEM0=\$660! \ Backup Memory 0
+BAKMEM1=\$662! \ Backup Memory 1
+BAKMEM2=\$664! \ Backup Memory 2
+BAKMEM3=\$666! \ Backup Memory 3
+BAKMEM4=\$668! \ Backup Memory 4
+BAKMEM5=\$66A! \ Backup Memory 5
+BAKMEM6=\$66C! \ Backup Memory 6
+BAKMEM7=\$66E! \ Backup Memory 7
+BAKMEM8=\$670! \ Backup Memory 8
+BAKMEM9=\$672! \ Backup Memory 9
+BAKMEM10=\$674! \ Backup Memory 10
+BAKMEM11=\$676! \ Backup Memory 11
+BAKMEM12=\$678! \ Backup Memory 12
+BAKMEM13=\$67A! \ Backup Memory 13
+BAKMEM14=\$67C! \ Backup Memory 14
+BAKMEM15=\$67E! \ Backup Memory 15
+
+ADC10CTL0=\$700! \ ADC10_B Control register 0
+ADC10CTL1=\$702! \ ADC10_B Control register 1
+ADC10CTL2=\$704! \ ADC10_B Control register 2
+ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
+ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
+ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
+ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
+ADC10IE=\$71A! \ ADC10_B Interrupt Enable
+ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
+ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
I2CSLAVEADR=\$1802! I2C_SLAVE address
I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ---------------------------------------
! FastForth RAM memory map (>= 1k):
! ---------------------------------------
-LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
-LSATCK=\$2000! \ leave stack, grow up
-PSTACK=\$2080! \ parameter stack, grow down
-RSTACK=\$20E0! \ Return stack, grow down
-
-PAD_I2CADR=\$20E0! \ RX I2C address
-PAD_I2CCNT=\$20E2! \ count max
-PAD_ORG=\$20E4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$2138! \ TX I2C address
-TIB_I2CCNT=\$213A! \ count of bytes
-TIB_ORG=\$213C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$2190! \ a good address for HOLDS
-HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-
-! ---------------------------------------
-! NOT SAVED VARIABLES
-! ---------------------------------------
+LEAVEPTR=\$2000! Leave-stack pointer, init by QUIT
+LSATCK=\$2000! leave stack, grow up
+PSTACK=\$2080! parameter stack, grow down
+RSTACK=\$20E0! Return stack, grow down
+!
+PAD_I2CADR=\$20E0! RX I2C address
+PAD_I2CCNT=\$20E2! count max
+PAD_ORG=\$20E4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$2138! TX I2C address
+TIB_I2CCNT=\$213A! count of bytes
+TIB_ORG=\$213C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$2190! base address for HOLDS
+HOLD_BASE=\$21B2! BASE HOLD area, grow down
+!
HP=\$21B2! HOLD ptr
-CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$21B6!
-LAST_THREAD=\$21B8!
-LAST_CFA=\$21BA!
-LAST_PSP=\$21BC!
-
-STATEADR=\$21BE! Interpreter state
-
-SOURCE_LEN=\$21C0! len of input stream
-SOURCE_ORG=\$21C2! adr of input stream
-TOIN=\$21C4! >IN
-DP=\$21C6! dictionary ptr
-
-LASTVOC=\$21C8! keep VOC-LINK
-CONTEXT=\$21CA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21DA! CURRENT dictionnary ptr
-
-BASEADR=\$21DC! numeric base, must be defined before first reset !
-LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$21B4!
+LAST_THREAD=\$21B6!
+LAST_CFA=\$21B8!
+LAST_PSP=\$21BA!
+!
+STATEADR=\$21BC! Interpreter state
+BASEADR=\$21BE!
+CAPS=\$21C0 !
+!
+SOURCE_LEN=\$21C2! len of input stream
+SOURCE_ORG=\$21C4! adr of input stream
+TOIN=\$21C6! >IN
+DP=\$21C8! dictionary ptr
+!
+LASTVOC=\$21CA! keep VOC-LINK
+CURRENT=\$21CC! CURRENT dictionnary ptr
+CONTEXT=\$21CE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
!21E0! 28 RAM bytes free
! ---------------------------------------
SLEEP=\$C400! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$C40A! CODE compiled by LITERAL
-XSQUOTE=\$C414! CODE compiled by S" and S_
-HEREXEC=\$C428! CODE HERE and BEGIN execute address
-QFBRAN=\$C434! CODE compiled by IF UNTIL
-BRAN=\$C43A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$C43C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$C43E! CODE compiled by DO
-XPLOOP=\$C44E! CODE compiled by +LOOP
-XLOOP=\$C460! CODE compiled by LOOP
-MUSMOD=\$C466! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$C478! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$C480! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$C4AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$C4AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$C4BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$C4CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$C4D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$C4E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$C4EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$C41E! CODE compiled by S" and S_
+HEREXEC=\$C432! CODE HERE and BEGIN execute address
+MUSMOD=\$C43E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$C450! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$C458! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$C482! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$C484! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$C494! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$C4A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$C4AC! CODE compiled by IF UNTIL
+BRAN=\$C4B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$C4B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$C4B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C4C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$C4F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$C52A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$C536! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$C4D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$C508! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$C512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$C594! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$C59C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$C5C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$C5C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$C5B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$C58E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$C5BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$C5BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$C584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$C586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$C544! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$C546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$C556! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$C556! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$C558! asm CODE, content of WARM+2 by default
+I2C_WARM=\$C580! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR2633
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
JTAG_SIG2 .equ 0FF82h ; if JTAG_SIG <> |0xFFFFFFFF, 0x00000000|, SBW and JTAG are locked
BSL_SIG1 .equ 0FF84h ;
BSL_SIG2 .equ 0FF86h ;
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
;
; .org INTVECT ; FFE2-FFFF 14 vectors + reset
;
-; .word reset ; 0FFE2h - LCD
-; .word reset ; 0FFE4h - P2
-; .word reset ; 0FFE6h - P1
-; .word reset ; 0FFE8h - ADC10
-; .word reset ; 0FFEAh - eUSCI_B0
-; .word reset ; 0FFECh - eUSCI_A0
-; .word reset ; 0FFEEh - WDT
-; .word reset ; 0FFF0h - RTC
-; .word reset ; 0FFF2h - TA1_x
-; .word reset ; 0FFF4h - TA1_0
-; .word reset ; 0FFF6h - TA0_x
-; .word reset ; 0FFF8h - TA0_0
-; .word reset ; 0FFFAh - UserNMI
-; .word reset ; 0FFFCh - SysNMI
-; .word reset ; 0FFFEh - Reset
+; .word reset ; 0FFE2h - LCD
+; .word reset ; 0FFE4h - P2
+; .word reset ; 0FFE6h - P1
+; .word reset ; 0FFE8h - ADC10
+; .word reset ; 0FFEAh - eUSCI_B0
+; .word reset ; 0FFECh - eUSCI_A0
+; .word reset ; 0FFEEh - WDT
+; .word reset ; 0FFF0h - RTC
+; .word reset ; 0FFF2h - TA1_x
+; .word reset ; 0FFF4h - TA1_0
+; .word reset ; 0FFF6h - TA0_x
+; .word reset ; 0FFF8h - TA0_0
+; .word reset ; 0FFFAh - UserNMI
+; .word reset ; 0FFFCh - SysNMI
+; .word reset ; 0FFFEh - Reset
; ----------------------------------------------------------------------
; ----------------------------------------------------------------------
; POWER ON RESET SYS config
; ----------------------------------------------------------------------
-SYSCTL .equ SYS_SFR + 00h ; System control
-SYSBSLC .equ SYS_SFR + 02h ; Bootstrap loader configuration area
-SYSJMBC .equ SYS_SFR + 06h ; JTAG mailbox control
-SYSJMBI0 .equ SYS_SFR + 08h ; JTAG mailbox input 0
-SYSJMBI1 .equ SYS_SFR + 0Ah ; JTAG mailbox input 1
-SYSJMBO0 .equ SYS_SFR + 0Ch ; JTAG mailbox output 0
-SYSJMBO1 .equ SYS_SFR + 0Eh ; JTAG mailbox output 1
-SYSBERRIV .equ SYS_SFR + 18h ; Bus Error vector generator
-SYSUNIV .equ SYS_SFR + 1Ah ; User NMI vector generator
-SYSSNIV .equ SYS_SFR + 1Ch ; System NMI vector generator
-SYSRSTIV .equ SYS_SFR + 1Eh ; Reset vector generator
-SYSCFG0 .equ SYS_SFR + 20h ; System configuration 0
-SYSCFG1 .equ SYS_SFR + 22h ; System configuration 1
-SYSCFG2 .equ SYS_SFR + 24h ; System configuration 2
-
+SYSCTL .equ SYS_SFR + 00h ; System control
+SYSBSLC .equ SYS_SFR + 02h ; Bootstrap loader configuration area
+SYSJMBC .equ SYS_SFR + 06h ; JTAG mailbox control
+SYSJMBI0 .equ SYS_SFR + 08h ; JTAG mailbox input 0
+SYSJMBI1 .equ SYS_SFR + 0Ah ; JTAG mailbox input 1
+SYSJMBO0 .equ SYS_SFR + 0Ch ; JTAG mailbox output 0
+SYSJMBO1 .equ SYS_SFR + 0Eh ; JTAG mailbox output 1
+SYSBERRIV .equ SYS_SFR + 18h ; Bus Error vector generator
+SYSUNIV .equ SYS_SFR + 1Ah ; User NMI vector generator
+SYSSNIV .equ SYS_SFR + 1Ch ; System NMI vector generator
+SYSRSTIV .equ SYS_SFR + 1Eh ; Reset vector generator
+SYSCFG0 .equ SYS_SFR + 20h ; System configuration 0
+SYSCFG1 .equ SYS_SFR + 22h ; System configuration 1
+SYSCFG2 .equ SYS_SFR + 24h ; System configuration 2
+
; SYS Control Bits
; ...
; ----------------------------------------------------------------------
P1REN .equ PA_SFR + 06h ; Port 1 Resistor Enable
P1SEL0 .equ PA_SFR + 0Ah ; Port 1 Selection 0
P1SEL1 .equ PA_SFR + 0Ch ; Port 1 Selection 1
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P1IFG .equ PA_SFR + 1Ch ; Port 1 Interrupt Flag
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt Flag
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3/4
; ----------------------------------------------------------------------
RTC
; ----------------------------------------------------------------------
-RTCCTL .equ RTC_SFR + 00h ; Real-Time Clock Control
-RTCIV .equ RTC_SFR + 04h ; Real-Time Clock Interrupt Vector
-RTCMOD .equ RTC_SFR + 08h ; Real-Timer Clock Modulo
-RTCCNT .equ RTC_SFR + 0Ch ; Real-Time Clock Counter
+RTCCTL .equ RTC_SFR + 00h ; Real-Time Clock Control
+RTCIV .equ RTC_SFR + 04h ; Real-Time Clock Interrupt Vector
+RTCMOD .equ RTC_SFR + 08h ; Real-Timer Clock Modulo
+RTCCNT .equ RTC_SFR + 0Ch ; Real-Time Clock Counter
.IFDEF UCA0_TERM
TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ---------------------------------------
! FastForth RAM memory map (>= 1k):
! ---------------------------------------
-LEAVEPTR=\$2000! \ Leave-stack pointer, init by QUIT
-LSATCK=\$2000! \ leave stack, grow up
-PSTACK=\$2080! \ parameter stack, grow down
-RSTACK=\$20E0! \ Return stack, grow down
-
-PAD_I2CADR=\$20E0! \ RX I2C address
-PAD_I2CCNT=\$20E2! \ count max
-PAD_ORG=\$20E4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$2138! \ TX I2C address
-TIB_I2CCNT=\$213A! \ count of bytes
-TIB_ORG=\$213C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$2190! \ a good address for HOLDS
-HOLD_BASE=\$21B2! \ BASE HOLD area, grow down
-
-! ---------------------------------------
-! NOT SAVED VARIABLES
-! ---------------------------------------
+LEAVEPTR=\$2000! Leave-stack pointer, init by QUIT
+LSATCK=\$2000! leave stack, grow up
+PSTACK=\$2080! parameter stack, grow down
+RSTACK=\$20E0! Return stack, grow down
+!
+PAD_I2CADR=\$20E0! RX I2C address
+PAD_I2CCNT=\$20E2! count max
+PAD_ORG=\$20E4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$2138! TX I2C address
+TIB_I2CCNT=\$213A! count of bytes
+TIB_ORG=\$213C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$2190! base address for HOLDS
+HOLD_BASE=\$21B2! BASE HOLD area, grow down
+!
HP=\$21B2! HOLD ptr
-CAPS=\$21B4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$21B6!
-LAST_THREAD=\$21B8!
-LAST_CFA=\$21BA!
-LAST_PSP=\$21BC!
-
-STATEADR=\$21BE! Interpreter state
-
-SOURCE_LEN=\$21C0! len of input stream
-SOURCE_ORG=\$21C2! adr of input stream
-TOIN=\$21C4! >IN
-DP=\$21C6! dictionary ptr
-
-LASTVOC=\$21C8! keep VOC-LINK
-CONTEXT=\$21CA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21DA! CURRENT dictionnary ptr
-
-BASEADR=\$21DC! numeric base, must be defined before first reset !
-LINE=\$21DE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$21B4!
+LAST_THREAD=\$21B6!
+LAST_CFA=\$21B8!
+LAST_PSP=\$21BA!
+!
+STATEADR=\$21BC! Interpreter state
+BASEADR=\$21BE!
+CAPS=\$21C0 !
+!
+SOURCE_LEN=\$21C2! len of input stream
+SOURCE_ORG=\$21C4! adr of input stream
+TOIN=\$21C6! >IN
+DP=\$21C8! dictionary ptr
+!
+LASTVOC=\$21CA! keep VOC-LINK
+CURRENT=\$21CC! CURRENT dictionnary ptr
+CONTEXT=\$21CE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
-!21E0! 28 RAM bytes free
+!21E0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
BUFEND=\$2400!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2402!
BS_FirstSectorL=\$2404!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$241E!
+BufferPtr=\$241E!
BufferLen=\$2420!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
+NewClusterL=\$2426! 16 bits wide (FAT16)
+NewClusterH=\$2428! 16 bits wide (FAT16)
CurFATsector=\$242A!
! ---------------------------------------
! ---------------------------------------
DIRclusterL=\$242C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$242E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2430!
+EntryOfst=\$2430!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2438!
SLEEP=\$C400! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$C40A! CODE compiled by LITERAL
-XSQUOTE=\$C414! CODE compiled by S" and S_
-HEREXEC=\$C428! CODE HERE and BEGIN execute address
-QFBRAN=\$C434! CODE compiled by IF UNTIL
-BRAN=\$C43A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$C43C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$C43E! CODE compiled by DO
-XPLOOP=\$C44E! CODE compiled by +LOOP
-XLOOP=\$C460! CODE compiled by LOOP
-MUSMOD=\$C466! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$C478! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$C480! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$C4AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$C4AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$C4BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$C4CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$C4D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$C4E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$C4EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$C41E! CODE compiled by S" and S_
+HEREXEC=\$C432! CODE HERE and BEGIN execute address
+MUSMOD=\$C43E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$C450! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$C458! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$C482! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$C484! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$C494! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$C4A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$C4AC! CODE compiled by IF UNTIL
+BRAN=\$C4B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$C4B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$C4B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C4C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$C4F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$C52A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$C536! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$C4D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$C508! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$C512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$C594! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$C59C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$C5C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$C5C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$C5B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$C58E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$C5BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$C5BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$C584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$C586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$C544! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$C546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$C556! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$C556! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$C558! asm CODE, content of WARM+2 by default
+I2C_WARM=\$C580! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR4133
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
I2CSLA0=\$FFA2! UCBxI2COA0 default value address
I2CSLA1=\$FFA4! UCBxI2COA1 default value address
I2CSLA2=\$FFA6! UCBxI2COA2 default value address
PMMCTL0=\$120! \ PMM Control 0
PMMCTL1=\$122! \ PMM Control 0
PMMCTL2=\$124! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-SYSCTL=\$140! \ System control
-SYSBSLC=\$142! \ Bootstrap loader configuration area
-SYSJMBC=\$146! \ JTAG mailbox control
-SYSJMBI0=\$148! \ JTAG mailbox input 0
-SYSJMBI1=\$14A! \ JTAG mailbox input 1
-SYSJMBO0=\$14C! \ JTAG mailbox output 0
-SYSJMBO1=\$14E! \ JTAG mailbox output 1
-SYSUNIV=\$15A! \ User NMI vector generator
-SYSSNIV=\$15C! \ System NMI vector generator
-SYSRSTIV=\$15E! \ Reset vector generator
-SYSCFG0=\$160! \ System configuration 0
-SYSCFG1=\$162! \ System configuration 1
-SYSCFG2=\$164! \ System configuration 2
-
-CSCTL0=\$180! \ CS control 0
-CSCTL1=\$182! \ CS control 1
-CSCTL2=\$184! \ CS control 2
-CSCTL3=\$186! \ CS control 3
-CSCTL4=\$188! \ CS control 4
-CSCTL5=\$18A! \ CS control 5
-CSCTL6=\$18C! \ CS control 6
-CSCTL7=\$18E! \ CS control 7
-CSCTL8=\$190! \ CS control 8
-
-
-FRCTLCTL0=\$1A0! \ FRAM control 0
-GCCTL0=\$1A4! \ General control 0
-GCCTL1=\$1A6! \ General control 1
-
-CRC16DI=\$1C0! \ CRC data input
-CRCDIRB=\$1C2! \ CRC data input reverse byte
-CRCINIRES=\$1C4! \ CRC initialization and result
-CRCRESR=\$1C6! \ CRC result reverse byte
+SYSCTL=\$140! \ System control
+SYSBSLC=\$142! \ Bootstrap loader configuration area
+SYSJMBC=\$146! \ JTAG mailbox control
+SYSJMBI0=\$148! \ JTAG mailbox input 0
+SYSJMBI1=\$14A! \ JTAG mailbox input 1
+SYSJMBO0=\$14C! \ JTAG mailbox output 0
+SYSJMBO1=\$14E! \ JTAG mailbox output 1
+SYSUNIV=\$15A! \ User NMI vector generator
+SYSSNIV=\$15C! \ System NMI vector generator
+SYSRSTIV=\$15E! \ Reset vector generator
+SYSCFG0=\$160! \ System configuration 0
+SYSCFG1=\$162! \ System configuration 1
+SYSCFG2=\$164! \ System configuration 2
+
+CSCTL0=\$180! \ CS control 0
+CSCTL1=\$182! \ CS control 1
+CSCTL2=\$184! \ CS control 2
+CSCTL3=\$186! \ CS control 3
+CSCTL4=\$188! \ CS control 4
+CSCTL5=\$18A! \ CS control 5
+CSCTL6=\$18C! \ CS control 6
+CSCTL7=\$18E! \ CS control 7
+CSCTL8=\$190! \ CS control 8
+
+
+FRCTLCTL0=\$1A0! \ FRAM control 0
+GCCTL0=\$1A4! \ General control 0
+GCCTL1=\$1A6! \ General control 1
+
+CRC16DI=\$1C0! \ CRC data input
+CRCDIRB=\$1C2! \ CRC data input reverse byte
+CRCINIRES=\$1C4! \ CRC initialization and result
+CRCRESR=\$1C6! \ CRC result reverse byte
WDTCTL=\$1CC! \ WDT control register
P8REN=\$267!
P8SEL0=\$26B!
-CAPTIO0CTL=\$2EE! \ Capacitive Touch IO 0 control
+CAPTIO0CTL=\$2EE! \ Capacitive Touch IO 0 control
TAIFG=1!
CCIFG=1!
-TA0CTL=\$300! \ TA0 control
-TA0CCTL0=\$302! \ Capture/compare control 0
-TA0CCTL1=\$304! \ Capture/compare control 1
-TA0CCTL2=\$306! \ Capture/compare control 2
-TA0R=\$310! \ TA0 counter register
-TA0CCR0=\$312! \ Capture/compare register 0
-TA0CCR1=\$314! \ Capture/compare register 1
-TA0CCR2=\$316! \ Capture/compare register 2
-TA0EX0=\$320! \ TA0 expansion register 0
-TA0IV=\$32E! \ TA0 interrupt vector
-
-TA1CTL=\$340! \ TA1 control
-TA1CCTL0=\$342! \ Capture/compare control 0
-TA1CCTL1=\$344! \ Capture/compare control 1
-TA1CCTL2=\$346! \ Capture/compare control 2
-TA1R=\$350! \ TA1 counter register
-TA1CCR0=\$352! \ Capture/compare register 0
-TA1CCR1=\$354! \ Capture/compare register 1
-TA1CCR2=\$356! \ Capture/compare register 2
-TA1EX0=\$360! \ TA1 expansion register 0
-TA1IV=\$36E! \ TA1 interrupt vector
-
-RTCCTL=\$3C0! \ RTC control
-RTCIV=\$3C4! \ RTC interrupt vector word
-RTCMOD=\$3C8! \ RTC modulo
-RTCCNT=\$3CC! \ RTC counter register
-
-
-UCA0CTLW0=\$500! \ eUSCI_A control word 0
-UCA0CTLW1=\$502! \ eUSCI_A control word 1
-UCA0BRW=\$506!
-UCA0BR0=\$506! \ eUSCI_A baud rate 0
-UCA0BR1=\$507! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$508! \ eUSCI_A modulation control
-UCA0STAT=\$50A! \ eUSCI_A status
-UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
-UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$510! \ eUSCI_A LIN control
-UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
-UCA0IE=\$51A! \ eUSCI_A interrupt enable
-UCA0IFG=\$51C! \ eUSCI_A interrupt flags
-UCA0IV=\$51E! \ eUSCI_A interrupt vector word
-
-
-UCB0CTLW0=\$540! \ eUSCI_B control word 0
-UCB0CTLW1=\$542! \ eUSCI_B control word 1
-UCB0BRW=\$546!
-UCB0BR0=\$546! \ eUSCI_B bit rate 0
-UCB0BR1=\$547! \ eUSCI_B bit rate 1
-UCB0STATW=\$548! \ eUSCI_B status word
-UCBCNT0=\$549! \ eUSCI_B hardware count
-UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$55C! \ eUSCI_B received address
-UCB0ADDMASK=\$55E! \ eUSCI_B address mask
-UCB0I2CSA=\$560! \ eUSCI I2C slave address
-UCB0IE=\$56A! \ eUSCI interrupt enable
-UCB0IFG=\$56C! \ eUSCI interrupt flags
-UCB0IV=\$56E! \ eUSCI interrupt vector word
+TA0CTL=\$300! \ TA0 control
+TA0CCTL0=\$302! \ Capture/compare control 0
+TA0CCTL1=\$304! \ Capture/compare control 1
+TA0CCTL2=\$306! \ Capture/compare control 2
+TA0R=\$310! \ TA0 counter register
+TA0CCR0=\$312! \ Capture/compare register 0
+TA0CCR1=\$314! \ Capture/compare register 1
+TA0CCR2=\$316! \ Capture/compare register 2
+TA0EX0=\$320! \ TA0 expansion register 0
+TA0IV=\$32E! \ TA0 interrupt vector
+
+TA1CTL=\$340! \ TA1 control
+TA1CCTL0=\$342! \ Capture/compare control 0
+TA1CCTL1=\$344! \ Capture/compare control 1
+TA1CCTL2=\$346! \ Capture/compare control 2
+TA1R=\$350! \ TA1 counter register
+TA1CCR0=\$352! \ Capture/compare register 0
+TA1CCR1=\$354! \ Capture/compare register 1
+TA1CCR2=\$356! \ Capture/compare register 2
+TA1EX0=\$360! \ TA1 expansion register 0
+TA1IV=\$36E! \ TA1 interrupt vector
+
+RTCCTL=\$3C0! \ RTC control
+RTCIV=\$3C4! \ RTC interrupt vector word
+RTCMOD=\$3C8! \ RTC modulo
+RTCCNT=\$3CC! \ RTC counter register
+
+
+UCA0CTLW0=\$500! \ eUSCI_A control word 0
+UCA0CTLW1=\$502! \ eUSCI_A control word 1
+UCA0BRW=\$506!
+UCA0BR0=\$506! \ eUSCI_A baud rate 0
+UCA0BR1=\$507! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$508! \ eUSCI_A modulation control
+UCA0STAT=\$50A! \ eUSCI_A status
+UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
+UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$510! \ eUSCI_A LIN control
+UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
+UCA0IE=\$51A! \ eUSCI_A interrupt enable
+UCA0IFG=\$51C! \ eUSCI_A interrupt flags
+UCA0IV=\$51E! \ eUSCI_A interrupt vector word
+
+
+UCB0CTLW0=\$540! \ eUSCI_B control word 0
+UCB0CTLW1=\$542! \ eUSCI_B control word 1
+UCB0BRW=\$546!
+UCB0BR0=\$546! \ eUSCI_B bit rate 0
+UCB0BR1=\$547! \ eUSCI_B bit rate 1
+UCB0STATW=\$548! \ eUSCI_B status word
+UCBCNT0=\$549! \ eUSCI_B hardware count
+UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$55C! \ eUSCI_B received address
+UCB0ADDMASK=\$55E! \ eUSCI_B address mask
+UCB0I2CSA=\$560! \ eUSCI I2C slave address
+UCB0IE=\$56A! \ eUSCI interrupt enable
+UCB0IFG=\$56C! \ eUSCI interrupt flags
+UCB0IV=\$56E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-LCDCTL0=\$600! \ LCD control register 0
-LCDCTL1=\$602! \ LCD control register 1
-LCDBLKCTL=\$604! \ LCD blink control register
-LCDMEMCTL=\$606! \ LCD memory control register
-LCDVCTL=\$608! \ LCD voltage control register
-LCDPCTL0=\$60A! \ LCD port control 0
-LCDPCTL1=\$60C! \ LCD port control 1
-LCDPCTL2=\$60E! \ LCD port control 2
-LCDCSS0=\$614! \ LCD COM/SEG select register
-LCDCSS1=\$616! \ LCD COM/SEG select register
-LCDCSS2=\$618! \ LCD COM/SEG select register
-LCDIV=\$61E! \ LCD interrupt vector
-LCDM0=\$620! \ LCD memory 0
-LCDM1=\$621! \ LCD memory 1
-LCDM2=\$622! \ LCD memory 2
-LCDM3=\$623! \ LCD memory 3
-LCDM4=\$624! \ LCD memory 4
-LCDM5=\$625! \ LCD memory 5
-LCDM6=\$626! \ LCD memory 6
-LCDM7=\$627! \ LCD memory 7
-LCDM8=\$628! \ LCD memory 8
-LCDM9=\$629! \ LCD memory 9
-LCDM10=\$62A! \ LCD memory 10
-LCDM11=\$62B! \ LCD memory 11
-LCDM12=\$62C! \ LCD memory 12
-LCDM13=\$62D! \ LCD memory 13
-LCDM14=\$62E! \ LCD memory 14
-LCDM15=\$62F! \ LCD memory 15
-LCDM16=\$630! \ LCD memory 16
-LCDM17=\$631! \ LCD memory 17
-LCDM18=\$632! \ LCD memory 18
-LCDM19=\$633! \ LCD memory 19
-LCDM20=\$634! \ LCD memory 20
-LCDM21=\$635! \ LCD memory 21
-LCDM22=\$636! \ LCD memory 22
-LCDM23=\$637! \ LCD memory 23
-LCDM24=\$638! \ LCD memory 24
-LCDM25=\$639! \ LCD memory 25
-LCDM26=\$63A! \ LCD memory 26
-LCDM27=\$63B! \ LCD memory 27
-LCDM28=\$63C! \ LCD memory 28
-LCDM29=\$63D! \ LCD memory 29
-LCDM30=\$63E! \ LCD memory 30
-LCDM31=\$63F! \ LCD memory 31
-LCDM32=\$640! \ LCD memory 32
-LCDM33=\$641! \ LCD memory 33
-LCDM34=\$642! \ LCD memory 34
-LCDM35=\$643! \ LCD memory 35
-LCDM36=\$644! \ LCD memory 36
-LCDM37=\$645! \ LCD memory 37
-LCDM38=\$646! \ LCD memory 38
-LCDM39=\$647! \ LCD memory 39
-LCDBM0=\$640! \ LCD blinking memory 0
-LCDBM1=\$641! \ LCD blinking memory 1
-LCDBM2=\$642! \ LCD blinking memory 2
-LCDBM3=\$643! \ LCD blinking memory 3
-LCDBM4=\$644! \ LCD blinking memory 4
-LCDBM5=\$645! \ LCD blinking memory 5
-LCDBM6=\$646! \ LCD blinking memory 6
-LCDBM7=\$647! \ LCD blinking memory 7
-LCDBM8=\$648! \ LCD blinking memory 8
-LCDBM9=\$649! \ LCD blinking memory 9
-LCDBM10=\$64A! \ LCD blinking memory 10
-LCDBM11=\$64B! \ LCD blinking memory 11
-LCDBM12=\$64C! \ LCD blinking memory 12
-LCDBM13=\$64D! \ LCD blinking memory 13
-LCDBM14=\$64E! \ LCD blinking memory 14
-LCDBM15=\$64F! \ LCD blinking memory 15
-LCDBM16=\$650! \ LCD blinking memory 16
-LCDBM17=\$651! \ LCD blinking memory 17
-LCDBM18=\$652! \ LCD blinking memory 18
-LCDBM19=\$653! \ LCD blinking memory 19
-
-
-BAKMEM0=\$660! \ Backup Memory 0
-BAKMEM1=\$662! \ Backup Memory 1
-BAKMEM2=\$664! \ Backup Memory 2
-BAKMEM3=\$666! \ Backup Memory 3
-BAKMEM4=\$668! \ Backup Memory 4
-BAKMEM5=\$66A! \ Backup Memory 5
-BAKMEM6=\$66C! \ Backup Memory 6
-BAKMEM7=\$66E! \ Backup Memory 7
-BAKMEM8=\$670! \ Backup Memory 8
-BAKMEM9=\$672! \ Backup Memory 9
-BAKMEM10=\$674! \ Backup Memory 10
-BAKMEM11=\$676! \ Backup Memory 11
-BAKMEM12=\$678! \ Backup Memory 12
-BAKMEM13=\$67A! \ Backup Memory 13
-BAKMEM14=\$67C! \ Backup Memory 14
-BAKMEM15=\$67E! \ Backup Memory 15
-
-
-
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+LCDCTL0=\$600! \ LCD control register 0
+LCDCTL1=\$602! \ LCD control register 1
+LCDBLKCTL=\$604! \ LCD blink control register
+LCDMEMCTL=\$606! \ LCD memory control register
+LCDVCTL=\$608! \ LCD voltage control register
+LCDPCTL0=\$60A! \ LCD port control 0
+LCDPCTL1=\$60C! \ LCD port control 1
+LCDPCTL2=\$60E! \ LCD port control 2
+LCDCSS0=\$614! \ LCD COM/SEG select register
+LCDCSS1=\$616! \ LCD COM/SEG select register
+LCDCSS2=\$618! \ LCD COM/SEG select register
+LCDIV=\$61E! \ LCD interrupt vector
+LCDM0=\$620! \ LCD memory 0
+LCDM1=\$621! \ LCD memory 1
+LCDM2=\$622! \ LCD memory 2
+LCDM3=\$623! \ LCD memory 3
+LCDM4=\$624! \ LCD memory 4
+LCDM5=\$625! \ LCD memory 5
+LCDM6=\$626! \ LCD memory 6
+LCDM7=\$627! \ LCD memory 7
+LCDM8=\$628! \ LCD memory 8
+LCDM9=\$629! \ LCD memory 9
+LCDM10=\$62A! \ LCD memory 10
+LCDM11=\$62B! \ LCD memory 11
+LCDM12=\$62C! \ LCD memory 12
+LCDM13=\$62D! \ LCD memory 13
+LCDM14=\$62E! \ LCD memory 14
+LCDM15=\$62F! \ LCD memory 15
+LCDM16=\$630! \ LCD memory 16
+LCDM17=\$631! \ LCD memory 17
+LCDM18=\$632! \ LCD memory 18
+LCDM19=\$633! \ LCD memory 19
+LCDM20=\$634! \ LCD memory 20
+LCDM21=\$635! \ LCD memory 21
+LCDM22=\$636! \ LCD memory 22
+LCDM23=\$637! \ LCD memory 23
+LCDM24=\$638! \ LCD memory 24
+LCDM25=\$639! \ LCD memory 25
+LCDM26=\$63A! \ LCD memory 26
+LCDM27=\$63B! \ LCD memory 27
+LCDM28=\$63C! \ LCD memory 28
+LCDM29=\$63D! \ LCD memory 29
+LCDM30=\$63E! \ LCD memory 30
+LCDM31=\$63F! \ LCD memory 31
+LCDM32=\$640! \ LCD memory 32
+LCDM33=\$641! \ LCD memory 33
+LCDM34=\$642! \ LCD memory 34
+LCDM35=\$643! \ LCD memory 35
+LCDM36=\$644! \ LCD memory 36
+LCDM37=\$645! \ LCD memory 37
+LCDM38=\$646! \ LCD memory 38
+LCDM39=\$647! \ LCD memory 39
+LCDBM0=\$640! \ LCD blinking memory 0
+LCDBM1=\$641! \ LCD blinking memory 1
+LCDBM2=\$642! \ LCD blinking memory 2
+LCDBM3=\$643! \ LCD blinking memory 3
+LCDBM4=\$644! \ LCD blinking memory 4
+LCDBM5=\$645! \ LCD blinking memory 5
+LCDBM6=\$646! \ LCD blinking memory 6
+LCDBM7=\$647! \ LCD blinking memory 7
+LCDBM8=\$648! \ LCD blinking memory 8
+LCDBM9=\$649! \ LCD blinking memory 9
+LCDBM10=\$64A! \ LCD blinking memory 10
+LCDBM11=\$64B! \ LCD blinking memory 11
+LCDBM12=\$64C! \ LCD blinking memory 12
+LCDBM13=\$64D! \ LCD blinking memory 13
+LCDBM14=\$64E! \ LCD blinking memory 14
+LCDBM15=\$64F! \ LCD blinking memory 15
+LCDBM16=\$650! \ LCD blinking memory 16
+LCDBM17=\$651! \ LCD blinking memory 17
+LCDBM18=\$652! \ LCD blinking memory 18
+LCDBM19=\$653! \ LCD blinking memory 19
+
+
+BAKMEM0=\$660! \ Backup Memory 0
+BAKMEM1=\$662! \ Backup Memory 1
+BAKMEM2=\$664! \ Backup Memory 2
+BAKMEM3=\$666! \ Backup Memory 3
+BAKMEM4=\$668! \ Backup Memory 4
+BAKMEM5=\$66A! \ Backup Memory 5
+BAKMEM6=\$66C! \ Backup Memory 6
+BAKMEM7=\$66E! \ Backup Memory 7
+BAKMEM8=\$670! \ Backup Memory 8
+BAKMEM9=\$672! \ Backup Memory 9
+BAKMEM10=\$674! \ Backup Memory 10
+BAKMEM11=\$676! \ Backup Memory 11
+BAKMEM12=\$678! \ Backup Memory 12
+BAKMEM13=\$67A! \ Backup Memory 13
+BAKMEM14=\$67C! \ Backup Memory 14
+BAKMEM15=\$67E! \ Backup Memory 15
+
+
+
+ADC10CTL0=\$700! \ ADC10_B Control register 0
+ADC10CTL1=\$702! \ ADC10_B Control register 1
+ADC10CTL2=\$704! \ ADC10_B Control register 2
+ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
+ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
+ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
+ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
+ADC10IE=\$71A! \ ADC10_B Interrupt Enable
+ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
+ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
JTAG_SIG2 .equ 0FF82h ; if JTAG_SIG1=0xAAAA, length of password string @ JTAG_PASSWORD
BSL_SIG1 .equ 0FF84h ;
BSL_SIG2 .equ 0FF86h ;
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
SFR_SFR .equ 0100h ; Special function
PMM_SFR .equ 0120h ; PMM
FRAM_SFR .equ 0140h ; FRAM control
-CRC16_SFR .equ 0150h
+CRC16_SFR .equ 0150h
WDT_A_SFR .equ 015Ch ; Watchdog
CS_SFR .equ 0160h
-SYS_SFR .equ 0180h ; SYS
+SYS_SFR .equ 0180h ; SYS
REF_SFR .equ 01B0h ; REF
PA_SFR .equ 0200h ; PORT1/2
PJ_SFR .equ 0320h ; PORTJ
P1REN .equ PA_SFR + 06h ; Port 1 Resistor ENable
P1SEL0 .equ PA_SFR + 0Ah ; Port 1 SELection 0
P1SEL1 .equ PA_SFR + 0Ch ; Port 1 SELection 1
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P1SELC .equ PA_SFR + 16h ; Port 1 SELection Complement
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt Flag
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
.IFDEF UCB0_SD
SD_SEL .equ PASEL1 ; word access, to configure UCB0
IO_WIPE .equ 1 ; P2.0 = TX + FORTH Deep_RST pin
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
HANDSHAKOUT .equ P2OUT
HANDSHAKIN .equ P2IN
RTS .equ 4 ; P2.2
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
CTS .equ 8 ; P2.3
.ENDIF
SD_CSOUT .equ P2OUT
SD_CSDIR .equ P2DIR
CD_SD .equ 8 ; P2.3 as SD Card Detect
-CS_SD .equ 10h ; P2.4 as SD Chip Select
+CS_SD .equ 10h ; P2.4 as SD Chip Select
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORTJ
RES3 .equ MPY_SFR + 2Ah ; 32x32-bit result 3 */
MPY32CTL0 .equ MPY_SFR + 2Ch ; MPY32 control register 0
-MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
-MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
-MPUSEG .equ MPU_SFR + 04h ; MPU Segmentation Register
-MPUSAM .equ MPU_SFR + 06h ; MPU access management
+MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
+MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
+MPUSEG .equ MPU_SFR + 04h ; MPU Segmentation Register
+MPUSAM .equ MPU_SFR + 06h ; MPU access management
.IFDEF UCA0_TERM
; ----------------------------------------------------------------------
TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ---------------------------------------
! FAT16 FileSystemInfos
! ---------------------------------------
HDLW_PrevLEN=24! previous LEN
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=4!
HandleLenght=28!
FirstHandle=\$1890!
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
!SD_card Input Buffer = PAD
! ---------------------------------------
! FastForth RAM memory map (= 1k)
! ---------------------------------------
-LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
-LSATCK=\$1C00! \ leave stack, grow up
-PSTACK=\$1C80! \ parameter stack, grow down
-RSTACK=\$1CE0! \ Return stack, grow down
-
-PAD_I2CADR=\$1CE0! \ RX I2C address
-PAD_I2CCNT=\$1CE2! \ count max
-PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$1D38! \ TX I2C address
-TIB_I2CCNT=\$1D3A! \ count of bytes
-TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$1D90! \ a good address for HOLDS
-HOLD_BASE=\$1DB2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
+LEAVEPTR=\$1C00! Leave-stack pointer, init by QUIT
+LSATCK=\$1C00! leave stack, grow up
+PSTACK=\$1C80! parameter stack, grow down
+RSTACK=\$1CE0! Return stack, grow down
+!
+PAD_I2CADR=\$1CE0! RX I2C address
+PAD_I2CCNT=\$1CE2! count max
+PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CCNT=\$1D3A! count of bytes
+TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$1D90! base address for HOLDS
+HOLD_BASE=\$1DB2! BASE HOLD area, grow down
+!
HP=\$1DB2! HOLD ptr
-CAPS=\$1DB4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$1DB6!
-LAST_THREAD=\$1DB8!
-LAST_CFA=\$1DBA!
-LAST_PSP=\$1DBC!
+LAST_NFA=\$1DB4!
+LAST_THREAD=\$1DB6!
+LAST_CFA=\$1DB8!
+LAST_PSP=\$1DBA!
+!
+STATEADR=\$1DBC! Interpreter state
+BASEADR=\$1DBE! base
+CAPS=\$1DC0! CAPS ON/OFF
+!
+SOURCE_LEN=\$1DC2! len of input stream
+SOURCE_ORG=\$1DC4! adr of input stream
+TOIN=\$1DC6! >IN
+DP=\$1DC8! dictionary ptr
+!
+LASTVOC=\$1DCA! keep VOC-LINK
+CURRENT=\$1DCC! CURRENT dictionnary ptr
+CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
-STATEADR=\$1DBE! Interpreter state
-
-SOURCE_LEN=\$1DC0! len of input stream
-SOURCE_ORG=\$1DC2! adr of input stream
-TOIN=\$1DC4! >IN
-DP=\$1DC6! dictionary ptr
-
-LASTVOC=\$1DC8! keep VOC-LINK
-CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DDA! CURRENT dictionnary ptr
-
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
-LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
! ---------------------------------------
!1DE0! 28 RAM bytes free
! ---------------------------------------
SLEEP=\$C200! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$C20A! CODE compiled by LITERAL
-XSQUOTE=\$C214! CODE compiled by S" and S_
-HEREXEC=\$C228! CODE HERE and BEGIN execute address
-QFBRAN=\$C234! CODE compiled by IF UNTIL
-BRAN=\$C23A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$C23C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$C23E! CODE compiled by DO
-XPLOOP=\$C24E! CODE compiled by +LOOP
-XLOOP=\$C260! CODE compiled by LOOP
-MUSMOD=\$C266! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$C278! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$C280! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$C2AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$C2AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$C2BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$C2CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$C2D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$C2E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$C2EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$C21E! CODE compiled by S" and S_
+HEREXEC=\$C232! CODE HERE and BEGIN execute address
+MUSMOD=\$C23E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$C250! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$C258! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$C282! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$C284! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$C294! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$C2A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$C2AC! CODE compiled by IF UNTIL
+BRAN=\$C2B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$C2B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$C2B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C2C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$C2F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$C32A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$C336! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$C2D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$C308! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$C312! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$C394! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$C39C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$C3C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$C3C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$C3B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$C38E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$C3BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$C3BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$C354! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$C37E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$C384! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$C386! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$C344! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$C346! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$C356! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$C356! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$C358! asm CODE, content of WARM+2 by default
+I2C_WARM=\$C380! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR5738
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
TB0IV=\$3EE! \ TB0 interrupt vector
-TB1CTL=\$400! \ TB1 control
-TB1CCTL0=\$402! \ Capture/compare control 0
-TB1CCTL1=\$404! \ Capture/compare control 1
-TB1CCTL2=\$406! \ Capture/compare control 2
-TB1R=\$410! \ TB1 counter register
-TB1CCR0=\$412! \ Capture/compare register 0
-TB1CCR1=\$414! \ Capture/compare register 1
-TB1CCR2=\$416! \ Capture/compare register 2
-TB1EX0=\$420! \ TB1 expansion register 0
-TB1IV=\$42E! \ TB1 interrupt vector
-
-TB2CTL=\$440! \ TB2 control
-TB2CCTL0=\$442! \ Capture/compare control 0
-TB2CCTL1=\$444! \ Capture/compare control 1
-TB2CCTL2=\$446! \ Capture/compare control 2
-TB2R=\$450! \ TB2 counter register
-TB2CCR0=\$452! \ Capture/compare register 0
-TB2CCR1=\$454! \ Capture/compare register 1
-TB2CCR2=\$456! \ Capture/compare register 2
-TB2EX0=\$460! \ TB2 expansion register 0
-TB2IV=\$46E! \ TB2 interrupt vector
+TB1CTL=\$400! \ TB1 control
+TB1CCTL0=\$402! \ Capture/compare control 0
+TB1CCTL1=\$404! \ Capture/compare control 1
+TB1CCTL2=\$406! \ Capture/compare control 2
+TB1R=\$410! \ TB1 counter register
+TB1CCR0=\$412! \ Capture/compare register 0
+TB1CCR1=\$414! \ Capture/compare register 1
+TB1CCR2=\$416! \ Capture/compare register 2
+TB1EX0=\$420! \ TB1 expansion register 0
+TB1IV=\$42E! \ TB1 interrupt vector
+
+TB2CTL=\$440! \ TB2 control
+TB2CCTL0=\$442! \ Capture/compare control 0
+TB2CCTL1=\$444! \ Capture/compare control 1
+TB2CCTL2=\$446! \ Capture/compare control 2
+TB2R=\$450! \ TB2 counter register
+TB2CCR0=\$452! \ Capture/compare register 0
+TB2CCR1=\$454! \ Capture/compare register 1
+TB2CCR2=\$456! \ Capture/compare register 2
+TB2EX0=\$460! \ TB2 expansion register 0
+TB2IV=\$46E! \ TB2 interrupt vector
! RTC_B
RTCCTL0=\$4A0! \ RTC control 0
JTAG_SIG2 .equ 0FF82h ; if JTAG_SIG1=0xAAAA, length of password string @ JTAG_PASSWORD
BSL_SIG1 .equ 0FF84h ;
BSL_SIG2 .equ 0FF86h ;
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
SFR_SFR .equ 0100h ; Special function
PMM_SFR .equ 0120h ; PMM
FRAM_SFR .equ 0140h ; FRAM control
-CRC16_SFR .equ 0150h
+CRC16_SFR .equ 0150h
WDT_A_SFR .equ 015Ch ; Watchdog
CS_SFR .equ 0160h
-SYS_SFR .equ 0180h ; SYS
+SYS_SFR .equ 0180h ; SYS
REF_SFR .equ 01B0h ; REF
PA_SFR .equ 0200h ; PORT1/2
PB_SFR .equ 0220h ; PORT3/4
P1REN .equ PA_SFR + 06h ; Port 1 Resistor ENable
P1SEL0 .equ PA_SFR + 0Ah ; Port 1 SELection 0
P1SEL1 .equ PA_SFR + 0Ch ; Port 1 SELection 1
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P1SELC .equ PA_SFR + 16h ; Port 1 SELection Complement
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt Flag
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3/4
MPY32CTL0 .equ MPY_SFR + 2Ch ; MPY32 control register 0
-MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
-MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
-MPUSEG .equ MPU_SFR + 04h ; MPU Segmentation Register
-MPUSAM .equ MPU_SFR + 06h ; MPU access management
+MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
+MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
+MPUSEG .equ MPU_SFR + 04h ; MPU Segmentation Register
+MPUSAM .equ MPU_SFR + 06h ; MPU access management
.IFDEF UCA0_TERM
TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ---------------------------------------
! FAT16 FileSystemInfos
! ---------------------------------------
HDLW_PrevLEN=24! previous LEN
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=4!
HandleLenght=28!
FirstHandle=\$1890!
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
!SD_card Input Buffer = PAD
! ----------------------------------------------
! FastForth RAM memory map (= 1k):
! ----------------------------------------------
-LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
-LSATCK=\$1C00! \ leave stack, grow up
-PSTACK=\$1C80! \ parameter stack, grow down
-RSTACK=\$1CE0! \ Return stack, grow down
-
-PAD_I2CADR=\$1CE0! \ RX I2C address
-PAD_I2CCNT=\$1CE2! \ count max
-PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$1D38! \ TX I2C address
-TIB_I2CCNT=\$1D3A! \ count of bytes
-TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$1D90! \ a good address for HOLDS
-HOLD_BASE=\$1DB2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
+LEAVEPTR=\$1C00! Leave-stack pointer, init by QUIT
+LSATCK=\$1C00! leave stack, grow up
+PSTACK=\$1C80! parameter stack, grow down
+RSTACK=\$1CE0! Return stack, grow down
+!
+PAD_I2CADR=\$1CE0! RX I2C address
+PAD_I2CCNT=\$1CE2! count max
+PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CCNT=\$1D3A! count of bytes
+TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$1D90! base address for HOLDS
+HOLD_BASE=\$1DB2! BASE HOLD area, grow down
+!
HP=\$1DB2! HOLD ptr
-CAPS=\$1DB4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$1DB6!
-LAST_THREAD=\$1DB8!
-LAST_CFA=\$1DBA!
-LAST_PSP=\$1DBC!
-
-STATEADR=\$1DBE! Interpreter state
-
-SOURCE_LEN=\$1DC0! len of input stream
-SOURCE_ORG=\$1DC2! adr of input stream
-TOIN=\$1DC4! >IN
-DP=\$1DC6! dictionary ptr
-
-LASTVOC=\$1DC8! keep VOC-LINK
-CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DDA! CURRENT dictionnary ptr
-
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
-LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$1DB4!
+LAST_THREAD=\$1DB6!
+LAST_CFA=\$1DB8!
+LAST_PSP=\$1DBA!
+!
+STATEADR=\$1DBC! Interpreter state
+BASEADR=\$1DBE! base
+CAPS=\$1DC0! CAPS ON/OFF
+!
+SOURCE_LEN=\$1DC2! len of input stream
+SOURCE_ORG=\$1DC4! adr of input stream
+TOIN=\$1DC6! >IN
+DP=\$1DC8! dictionary ptr
+!
+LASTVOC=\$1DCA! keep VOC-LINK
+CURRENT=\$1DCC! CURRENT dictionnary ptr
+CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
-!1DE0! 28 RAM bytes free
+!1DE0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
SLEEP=\$C200! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$C20A! CODE compiled by LITERAL
-XSQUOTE=\$C214! CODE compiled by S" and S_
-HEREXEC=\$C228! CODE HERE and BEGIN execute address
-QFBRAN=\$C234! CODE compiled by IF UNTIL
-BRAN=\$C23A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$C23C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$C23E! CODE compiled by DO
-XPLOOP=\$C24E! CODE compiled by +LOOP
-XLOOP=\$C260! CODE compiled by LOOP
-MUSMOD=\$C266! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$C278! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$C280! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$C2AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$C2AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$C2BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$C2CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$C2D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$C2E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$C2EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$C21E! CODE compiled by S" and S_
+HEREXEC=\$C232! CODE HERE and BEGIN execute address
+MUSMOD=\$C23E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$C250! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$C258! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$C282! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$C284! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$C294! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$C2A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$C2AC! CODE compiled by IF UNTIL
+BRAN=\$C2B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$C2B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$C2B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$C2C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$C2F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$C32A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$C336! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$C2D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$C308! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$C312! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$C394! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$C39C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$C3C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$C3C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$C3B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$C38E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$C3BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$C3BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$C354! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$C37E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$C384! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$C386! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$C344! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$C346! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$C356! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$C356! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$C358! asm CODE, content of WARM+2 by default
+I2C_WARM=\$C380! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR5739
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
SFRRPCR=\$104! \ SFR reset pin control
PMMCTL0=\$120! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-FRCTLCTL0=\$140! \ FRAM control 0
-GCCTL0=\$144! \ General control 0
-GCCTL1=\$146! \ General control 1
+FRCTLCTL0=\$140! \ FRAM control 0
+GCCTL0=\$144! \ General control 0
+GCCTL1=\$146! \ General control 1
-CRC16DI=\$150! \ CRC data input
-CRCDIRB=\$152! \ CRC data input reverse byte
-CRCINIRES=\$154! \ CRC initialization and result
-CRCRESR=\$156! \ CRC result reverse byte
+CRC16DI=\$150! \ CRC data input
+CRCDIRB=\$152! \ CRC data input reverse byte
+CRCINIRES=\$154! \ CRC initialization and result
+CRCRESR=\$156! \ CRC result reverse byte
WDTCTL=\$15C! \ WDT control register
CSCTL0=\$160! \ CS control 0
-CSCTL0_H=\$161! \
-CSCTL1=\$162! \ CS control 1
-CSCTL2=\$164! \ CS control 2
-CSCTL3=\$166! \ CS control 3
-CSCTL4=\$168! \ CS control 4
-CSCTL5=\$16A! \ CS control 5
-CSCTL6=\$16C! \ CS control 6
-
-SYSCTL=\$180! \ System control
-SYSJMBC=\$186! \ JTAG mailbox control
-SYSJMBI0=\$188! \ JTAG mailbox input 0
-SYSJMBI1=\$18A! \ JTAG mailbox input 1
-SYSJMBO0=\$18C! \ JTAG mailbox output 0
-SYSJMBO1=\$18E! \ JTAG mailbox output 1
-SYSBERRIV=\$198! \ Bus Error vector generator
-SYSUNIV=\$19A! \ User NMI vector generator
-SYSSNIV=\$19C! \ System NMI vector generator
-SYSRSTIV=\$19E! \ Reset vector generator
-
-REFCTL=\$1b0! \ Shared reference control
+CSCTL0_H=\$161! \
+CSCTL1=\$162! \ CS control 1
+CSCTL2=\$164! \ CS control 2
+CSCTL3=\$166! \ CS control 3
+CSCTL4=\$168! \ CS control 4
+CSCTL5=\$16A! \ CS control 5
+CSCTL6=\$16C! \ CS control 6
+
+SYSCTL=\$180! \ System control
+SYSJMBC=\$186! \ JTAG mailbox control
+SYSJMBI0=\$188! \ JTAG mailbox input 0
+SYSJMBI1=\$18A! \ JTAG mailbox input 1
+SYSJMBO0=\$18C! \ JTAG mailbox output 0
+SYSJMBO1=\$18E! \ JTAG mailbox output 1
+SYSBERRIV=\$198! \ Bus Error vector generator
+SYSUNIV=\$19A! \ User NMI vector generator
+SYSSNIV=\$19C! \ System NMI vector generator
+SYSRSTIV=\$19E! \ Reset vector generator
+
+REFCTL=\$1b0! \ Shared reference control
PAIN=\$200!
PAOUT=\$202!
TBIFG=1!
CCIFG=1!
-TA0CTL=\$340! \ TA0 control
-TA0CCTL0=\$342! \ Capture/compare control 0
-TA0CCTL1=\$344! \ Capture/compare control 1
-TA0CCTL2=\$346! \ Capture/compare control 2
-TA0R=\$350! \ TA0 counter register
-TA0CCR0=\$352! \ Capture/compare register 0
-TA0CCR1=\$354! \ Capture/compare register 1
-TA0CCR2=\$356! \ Capture/compare register 2
-TA0EX0=\$360! \ TA0 expansion register 0
-TA0IV=\$36E! \ TA0 interrupt vector
-
-TA1CTL=\$380! \ TA1 control
-TA1CCTL0=\$382! \ Capture/compare control 0
-TA1CCTL1=\$384! \ Capture/compare control 1
-TA1CCTL2=\$386! \ Capture/compare control 2
-TA1R=\$390! \ TA1 counter register
-TA1CCR0=\$392! \ Capture/compare register 0
-TA1CCR1=\$394! \ Capture/compare register 1
-TA1CCR2=\$396! \ Capture/compare register 2
-TA1EX0=\$3A0! \ TA1 expansion register 0
-TA1IV=\$3AE! \ TA1 interrupt vector
-
-TB0CTL=\$3C0! \ TB0 control
-TB0CCTL0=\$3C2! \ Capture/compare control 0
-TB0CCTL1=\$3C4! \ Capture/compare control 1
-TB0CCTL2=\$3C6! \ Capture/compare control 2
-TB0R=\$3D0! \ TB0 counter register
-TB0CCR0=\$3D2! \ Capture/compare register 0
-TB0CCR1=\$3D4! \ Capture/compare register 1
-TB0CCR2=\$3D6! \ Capture/compare register 2
-TB0EX0=\$3E0! \ TB0 expansion register 0
-TB0IV=\$3EE! \ TB0 interrupt vector
-
-TB1CTL=\$400! \ TB1 control
-TB1CCTL0=\$402! \ Capture/compare control 0
-TB1CCTL1=\$404! \ Capture/compare control 1
-TB1CCTL2=\$406! \ Capture/compare control 2
-TB1R=\$410! \ TB1 counter register
-TB1CCR0=\$412! \ Capture/compare register 0
-TB1CCR1=\$414! \ Capture/compare register 1
-TB1CCR2=\$416! \ Capture/compare register 2
-TB1EX0=\$420! \ TB1 expansion register 0
-TB1IV=\$42E! \ TB1 interrupt vector
-
-TB2CTL=\$440! \ TB2 control
-TB2CCTL0=\$442! \ Capture/compare control 0
-TB2CCTL1=\$444! \ Capture/compare control 1
-TB2CCTL2=\$446! \ Capture/compare control 2
-TB2R=\$450! \ TB2 counter register
-TB2CCR0=\$452! \ Capture/compare register 0
-TB2CCR1=\$454! \ Capture/compare register 1
-TB2CCR2=\$456! \ Capture/compare register 2
-TB2EX0=\$460! \ TB2 expansion register 0
-TB2IV=\$46E! \ TB2 interrupt vector
+TA0CTL=\$340! \ TA0 control
+TA0CCTL0=\$342! \ Capture/compare control 0
+TA0CCTL1=\$344! \ Capture/compare control 1
+TA0CCTL2=\$346! \ Capture/compare control 2
+TA0R=\$350! \ TA0 counter register
+TA0CCR0=\$352! \ Capture/compare register 0
+TA0CCR1=\$354! \ Capture/compare register 1
+TA0CCR2=\$356! \ Capture/compare register 2
+TA0EX0=\$360! \ TA0 expansion register 0
+TA0IV=\$36E! \ TA0 interrupt vector
+
+TA1CTL=\$380! \ TA1 control
+TA1CCTL0=\$382! \ Capture/compare control 0
+TA1CCTL1=\$384! \ Capture/compare control 1
+TA1CCTL2=\$386! \ Capture/compare control 2
+TA1R=\$390! \ TA1 counter register
+TA1CCR0=\$392! \ Capture/compare register 0
+TA1CCR1=\$394! \ Capture/compare register 1
+TA1CCR2=\$396! \ Capture/compare register 2
+TA1EX0=\$3A0! \ TA1 expansion register 0
+TA1IV=\$3AE! \ TA1 interrupt vector
+
+TB0CTL=\$3C0! \ TB0 control
+TB0CCTL0=\$3C2! \ Capture/compare control 0
+TB0CCTL1=\$3C4! \ Capture/compare control 1
+TB0CCTL2=\$3C6! \ Capture/compare control 2
+TB0R=\$3D0! \ TB0 counter register
+TB0CCR0=\$3D2! \ Capture/compare register 0
+TB0CCR1=\$3D4! \ Capture/compare register 1
+TB0CCR2=\$3D6! \ Capture/compare register 2
+TB0EX0=\$3E0! \ TB0 expansion register 0
+TB0IV=\$3EE! \ TB0 interrupt vector
+
+TB1CTL=\$400! \ TB1 control
+TB1CCTL0=\$402! \ Capture/compare control 0
+TB1CCTL1=\$404! \ Capture/compare control 1
+TB1CCTL2=\$406! \ Capture/compare control 2
+TB1R=\$410! \ TB1 counter register
+TB1CCR0=\$412! \ Capture/compare register 0
+TB1CCR1=\$414! \ Capture/compare register 1
+TB1CCR2=\$416! \ Capture/compare register 2
+TB1EX0=\$420! \ TB1 expansion register 0
+TB1IV=\$42E! \ TB1 interrupt vector
+
+TB2CTL=\$440! \ TB2 control
+TB2CCTL0=\$442! \ Capture/compare control 0
+TB2CCTL1=\$444! \ Capture/compare control 1
+TB2CCTL2=\$446! \ Capture/compare control 2
+TB2R=\$450! \ TB2 counter register
+TB2CCR0=\$452! \ Capture/compare register 0
+TB2CCR1=\$454! \ Capture/compare register 1
+TB2CCR2=\$456! \ Capture/compare register 2
+TB2EX0=\$460! \ TB2 expansion register 0
+TB2IV=\$46E! \ TB2 interrupt vector
! RTC_B
-RTCCTL0=\$4A0! \ RTC control 0
-RTCCTL1=\$4A1! \ RTC control 1
-RTCCTL2=\$4A2! \ RTC control 2
-RTCCTL3=\$4A3! \ RTC control 3
-RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
-RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
-RTCPS0=\$4AC! \ RTC prescaler 0
-RTCPS1=\$4AD! \ RTC prescaler 1
-RTCIV=\$4AE! \ RTC interrupt vector word
-RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
-RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
-RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
-RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
-RTCDAY=\$4B4! \ RTC days
+RTCCTL0=\$4A0! \ RTC control 0
+RTCCTL1=\$4A1! \ RTC control 1
+RTCCTL2=\$4A2! \ RTC control 2
+RTCCTL3=\$4A3! \ RTC control 3
+RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
+RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
+RTCPS0=\$4AC! \ RTC prescaler 0
+RTCPS1=\$4AD! \ RTC prescaler 1
+RTCIV=\$4AE! \ RTC interrupt vector word
+RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
+RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
+RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
+RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
+RTCDAY=\$4B4! \ RTC days
RTCMON=\$4B5! \ RTC month
-RTCYEAR=\$4B6!
-RTCYEARL=\$4B6! \ RTC year low
-RTCYEARH=\$4B7! \ RTC year high
-RTCAMIN=\$4B8! \ RTC alarm minutes
-RTCAHOUR=\$4B9! \ RTC alarm hours
-RTCADOW=\$4BA! \ RTC alarm day of week
-RTCADAY=\$4BB! \ RTC alarm days
-BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
-BCD2BIN=\$4BE! \ BCD-to-binary conversion register
+RTCYEAR=\$4B6!
+RTCYEARL=\$4B6! \ RTC year low
+RTCYEARH=\$4B7! \ RTC year high
+RTCAMIN=\$4B8! \ RTC alarm minutes
+RTCAHOUR=\$4B9! \ RTC alarm hours
+RTCADOW=\$4BA! \ RTC alarm day of week
+RTCADAY=\$4BB! \ RTC alarm days
+BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
+BCD2BIN=\$4BE! \ BCD-to-binary conversion register
RTCHOLD=\$40!
RTCRDY=\$10!
DMAIFG=8!
-DMA0CTL=\$500! \ DMA channel 0 control
-DMA0SAL=\$502! \ DMA channel 0 source address low
-DMA0SAH=\$504! \ DMA channel 0 source address high
-DMA0DAL=\$506! \ DMA channel 0 destination address low
-DMA0DAH=\$508! \ DMA channel 0 destination address high
-DMA0SZ=\$50A! \ DMA channel 0 transfer size
-DMA1CTL=\$510! \ DMA channel 1 control
-DMA1SAL=\$512! \ DMA channel 1 source address low
-DMA1SAH=\$514! \ DMA channel 1 source address high
-DMA1DAL=\$516! \ DMA channel 1 destination address low
-DMA1DAH=\$518! \ DMA channel 1 destination address high
-DMA1SZ=\$51A! \ DMA channel 1 transfer size
-DMA2CTL=\$520! \ DMA channel 2 control
-DMA2SAL=\$522! \ DMA channel 2 source address low
-DMA2SAH=\$524! \ DMA channel 2 source address high
-DMA2DAL=\$526! \ DMA channel 2 destination address low
-DMA2DAH=\$528! \ DMA channel 2 destination address high
-DMA2SZ=\$52A! \ DMA channel 2 transfer size
-DMACTL0=\$530! \ DMA module control 0
-DMACTL1=\$532! \ DMA module control 1
-DMACTL2=\$534! \ DMA module control 2
-DMACTL3=\$536! \ DMA module control 3
-DMACTL4=\$538! \ DMA module control 4
-DMAIV=\$53A! \ DMA interrupt vector
-
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEG=\$5A4! \ MPU Segmentation Register
-MPUSAM=\$5A6! \ MPU access management
-
-UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
-UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
-UCA0BRW=\$5C6!
-UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
-UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
-UCA0STAT=\$5CA! \ eUSCI_A status
-UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
-UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
-UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
-UCA0IE=\$5DA! \ eUSCI_A interrupt enable
-UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
-UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
-UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
-UCA1BRW=\$5E6!
-UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
-UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
-UCA1STAT=\$5EA! \ eUSCI_A status
-UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
-UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
-UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
-UCA1IE=\$5FA! \ eUSCI_A interrupt enable
-UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
-UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
-
-UCB0CTLW0=\$640! \ eUSCI_B control word 0
-UCB0CTLW1=\$642! \ eUSCI_B control word 1
-UCB0BRW=\$646!
-UCB0BR0=\$646! \ eUSCI_B bit rate 0
-UCB0BR1=\$647! \ eUSCI_B bit rate 1
-UCB0STATW=\$648! \ eUSCI_B status word
-UCBCNT0=\$649! \ eUSCI_B hardware count
-UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$65C! \ eUSCI_B received address
-UCB0ADDMASK=\$65E! \ eUSCI_B address mask
-UCB0I2CSA=\$660! \ eUSCI I2C slave address
-UCB0IE=\$66A! \ eUSCI interrupt enable
-UCB0IFG=\$66C! \ eUSCI interrupt flags
-UCB0IV=\$66E! \ eUSCI interrupt vector word
+DMA0CTL=\$500! \ DMA channel 0 control
+DMA0SAL=\$502! \ DMA channel 0 source address low
+DMA0SAH=\$504! \ DMA channel 0 source address high
+DMA0DAL=\$506! \ DMA channel 0 destination address low
+DMA0DAH=\$508! \ DMA channel 0 destination address high
+DMA0SZ=\$50A! \ DMA channel 0 transfer size
+DMA1CTL=\$510! \ DMA channel 1 control
+DMA1SAL=\$512! \ DMA channel 1 source address low
+DMA1SAH=\$514! \ DMA channel 1 source address high
+DMA1DAL=\$516! \ DMA channel 1 destination address low
+DMA1DAH=\$518! \ DMA channel 1 destination address high
+DMA1SZ=\$51A! \ DMA channel 1 transfer size
+DMA2CTL=\$520! \ DMA channel 2 control
+DMA2SAL=\$522! \ DMA channel 2 source address low
+DMA2SAH=\$524! \ DMA channel 2 source address high
+DMA2DAL=\$526! \ DMA channel 2 destination address low
+DMA2DAH=\$528! \ DMA channel 2 destination address high
+DMA2SZ=\$52A! \ DMA channel 2 transfer size
+DMACTL0=\$530! \ DMA module control 0
+DMACTL1=\$532! \ DMA module control 1
+DMACTL2=\$534! \ DMA module control 2
+DMACTL3=\$536! \ DMA module control 3
+DMACTL4=\$538! \ DMA module control 4
+DMAIV=\$53A! \ DMA interrupt vector
+
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEG=\$5A4! \ MPU Segmentation Register
+MPUSAM=\$5A6! \ MPU access management
+
+UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
+UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
+UCA0BRW=\$5C6!
+UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
+UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
+UCA0STAT=\$5CA! \ eUSCI_A status
+UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
+UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
+UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
+UCA0IE=\$5DA! \ eUSCI_A interrupt enable
+UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
+UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
+UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
+UCA1BRW=\$5E6!
+UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
+UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
+UCA1STAT=\$5EA! \ eUSCI_A status
+UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
+UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
+UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
+UCA1IE=\$5FA! \ eUSCI_A interrupt enable
+UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
+UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
+
+UCB0CTLW0=\$640! \ eUSCI_B control word 0
+UCB0CTLW1=\$642! \ eUSCI_B control word 1
+UCB0BRW=\$646!
+UCB0BR0=\$646! \ eUSCI_B bit rate 0
+UCB0BR1=\$647! \ eUSCI_B bit rate 1
+UCB0STATW=\$648! \ eUSCI_B status word
+UCBCNT0=\$649! \ eUSCI_B hardware count
+UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$65C! \ eUSCI_B received address
+UCB0ADDMASK=\$65E! \ eUSCI_B address mask
+UCB0I2CSA=\$660! \ eUSCI I2C slave address
+UCB0IE=\$66A! \ eUSCI interrupt enable
+UCB0IFG=\$66C! \ eUSCI interrupt flags
+UCB0IV=\$66E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+ADC10CTL0=\$700! \ ADC10_B Control register 0
+ADC10CTL1=\$702! \ ADC10_B Control register 1
+ADC10CTL2=\$704! \ ADC10_B Control register 2
+ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
+ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
+ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
+ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
+ADC10IE=\$71A! \ ADC10_B Interrupt Enable
+ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
+ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
CDIFG=1!
CDIIFG=2!
-CDCTL0=\$8C0! \ Comparator_D control register 0
-CDCTL1=\$8C2! \ Comparator_D control register 1
-CDCTL2=\$8C4! \ Comparator_D control register 2
-CDCTL3=\$8C6! \ Comparator_D control register 3
-CDINT=\$8CC! \ Comparator_D interrupt register
-CDIV=\$8CE! \ Comparator_D interrupt vector word
+CDCTL0=\$8C0! \ Comparator_D control register 0
+CDCTL1=\$8C2! \ Comparator_D control register 1
+CDCTL2=\$8C4! \ Comparator_D control register 2
+CDCTL3=\$8C6! \ Comparator_D control register 3
+CDINT=\$8CC! \ Comparator_D interrupt register
+CDIV=\$8CE! \ Comparator_D interrupt vector word
; ----------------------------------------------
PAGESIZE .equ 512 ; MPU unit
; ----------------------------------------------
-; BSL
+; BSL
; ----------------------------------------------
BSL .equ 1000h
; ----------------------------------------------
JTAG_PASSWORD .equ 0FF88h ; 256 bits max
IPE_SIG_VALID .equ 0FF88h ; one word
IPE_STR_PTR_SRC .equ 0FF8Ah ; one word
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P1IFG .equ PA_SFR + 1Ch ; Port 1 Interrupt FlaG
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P2IN .equ PA_SFR + 01h ; Port 2 INput
P2OUT .equ PA_SFR + 03h ; Port 2 OUTput
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt FlaG
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
WIPE_IN .equ P2IN
IO_WIPE .equ 1 ; P2.0 = FORTH Deep_RST pin
.IFDEF UCA0_TERM
-; P2.0 UCA0-TXD --> USB2UART RXD
-; P2.1 UCA0-RXD <-- USB2UART TXD
+; P2.0 UCA0-TXD --> USB2UART RXD
+; P2.1 UCA0-RXD <-- USB2UART TXD
TXD .equ 1 ; P2.0 = TX + FORTH Deep_RST pin
RXD .equ 2 ; P2.1 = RX
BUS_TERM .equ 3
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
HANDSHAKOUT .equ P2OUT
HANDSHAKIN .equ P2IN
RTS .equ 4 ; P2.2
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
CTS .equ 8 ; P2.3
.ENDIF ; TERMINAL5WIRES
P3IES .equ PB_SFR + 18h ; Port 3 Interrupt Edge Select
P3IE .equ PB_SFR + 1Ah ; Port 3 Interrupt Enable
P3IFG .equ PB_SFR + 1Ch ; Port 3 Interrupt Flag
-P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
+P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
P4IN .equ PB_SFR + 01h ; Port 4 Input */
P4OUT .equ PB_SFR + 03h ; Port 4 Output
P4IES .equ PB_SFR + 19h ; Port 4 Interrupt Edge Select
P4IE .equ PB_SFR + 1Bh ; Port 4 Interrupt Enable
P4IFG .equ PB_SFR + 1Dh ; Port 4 Interrupt Flag
-P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
+P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORTJ
TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ---------------------------------------
! FastForth RAM memory map (>= 1k)
! ---------------------------------------
-LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
-LSATCK=\$1C00! \ leave stack, grow up
-PSTACK=\$1C80! \ parameter stack, grow down
-RSTACK=\$1CE0! \ Return stack, grow down
-
-PAD_I2CADR=\$1CE0! \ RX I2C address
-PAD_I2CCNT=\$1CE2! \ count max
-PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$1D38! \ TX I2C address
-TIB_I2CCNT=\$1D3A! \ count of bytes
-TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$1D90! \ base address for HOLDS
-HOLD_BASE=\$1DB2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
+LEAVEPTR=\$1C00! Leave-stack pointer, init by QUIT
+LSATCK=\$1C00! leave stack, grow up
+PSTACK=\$1C80! parameter stack, grow down
+RSTACK=\$1CE0! Return stack, grow down
+!
+PAD_I2CADR=\$1CE0! RX I2C address
+PAD_I2CCNT=\$1CE2! count max
+PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CCNT=\$1D3A! count of bytes
+TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$1D90! base address for HOLDS
+HOLD_BASE=\$1DB2! BASE HOLD area, grow down
+!
HP=\$1DB2! HOLD ptr
-CAPS=\$1DB4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$1DB6!
-LAST_THREAD=\$1DB8!
-LAST_CFA=\$1DBA!
-LAST_PSP=\$1DBC!
-
-STATEADR=\$1DBE! Interpreter state
-
-SOURCE_LEN=\$1DC0! len of input stream
-SOURCE_ADR=\$1DC2! adr of input stream
-TOIN=\$1DC4! >IN
-DP=\$1DC6! dictionary ptr
-
-LASTVOC=\$1DC8! keep VOC-LINK
-CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DDA! CURRENT dictionnary ptr
-
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
-LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
-
+LAST_NFA=\$1DB4!
+LAST_THREAD=\$1DB6!
+LAST_CFA=\$1DB8!
+LAST_PSP=\$1DBA!
+!
+STATEADR=\$1DBC! Interpreter state
+BASEADR=\$1DBE! base
+CAPS=\$1DC0! CAPS ON/OFF
+!
+SOURCE_LEN=\$1DC2! len of input stream
+SOURCE_ORG=\$1DC4! adr of input stream
+TOIN=\$1DC6! >IN
+DP=\$1DC8! dictionary ptr
+!
+LASTVOC=\$1DCA! keep VOC-LINK
+CURRENT=\$1DCC! CURRENT dictionnary ptr
+CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
-!1DE0! 28 RAM bytes free
+!1DE0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
BUFEND=\$2000!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2002!
BS_FirstSectorL=\$2004!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$201E!
+BufferPtr=\$201E!
BufferLen=\$2020!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+NewClusterL=\$2026! 16 bits wide (FAT16)
+NewClusterH=\$2028! 16 bits wide (FAT16)
+CurFATsector=\$202A!
! ---------------------------------------
! DIR entry
! ---------------------------------------
DIRclusterL=\$202C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$202E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2030!
+EntryOfst=\$2030!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2038!
SLEEP=\$4400! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$440A! CODE compiled by LITERAL
-XSQUOTE=\$4414! CODE compiled by S" and S_
-HEREXEC=\$4428! CODE HERE and BEGIN execute address
-QFBRAN=\$4434! CODE compiled by IF UNTIL
-BRAN=\$443A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$443C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$443E! CODE compiled by DO
-XPLOOP=\$444E! CODE compiled by +LOOP
-XLOOP=\$4460! CODE compiled by LOOP
-MUSMOD=\$4466! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$4478! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$4480! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$44AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$44AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$44BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$44CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$44D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$44E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$44EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$441E! CODE compiled by S" and S_
+HEREXEC=\$4432! CODE HERE and BEGIN execute address
+MUSMOD=\$443E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$4450! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$4458! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$4482! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$4484! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$4494! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$44A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$44AC! CODE compiled by IF UNTIL
+BRAN=\$44B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$44B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$44B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$44C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$44F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$452A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$4536! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$44D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$4508! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$4512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$4594! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$459C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$45C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$45C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$45B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$458E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$45BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$45BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
+I2C_WARM=\$4580! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR5948
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
I2CSLA0=\$FFA2! UCBxI2COA0 default value address
I2CSLA1=\$FFA4! UCBxI2COA1 default value address
I2CSLA2=\$FFA6! UCBxI2COA2 default value address
SFRRPCR=\$104! \ SFR reset pin control
PMMCTL0=\$120! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-FRCTLCTL0=\$140! \ FRAM control 0
-GCCTL0=\$144! \ General control 0
-GCCTL1=\$146! \ General control 1
+FRCTLCTL0=\$140! \ FRAM control 0
+GCCTL0=\$144! \ General control 0
+GCCTL1=\$146! \ General control 1
-CRC16DI=\$150! \ CRC data input
-CRCDIRB=\$152! \ CRC data input reverse byte
-CRCINIRES=\$154! \ CRC initialization and result
-CRCRESR=\$156! \ CRC result reverse byte
+CRC16DI=\$150! \ CRC data input
+CRCDIRB=\$152! \ CRC data input reverse byte
+CRCINIRES=\$154! \ CRC initialization and result
+CRCRESR=\$156! \ CRC result reverse byte
WDTCTL=\$15C! \ WDT control register
-CSCTL0=\$160! \ CS control 0
-CSCTL1=\$162! \ CS control 1
-CSCTL2=\$164! \ CS control 2
-CSCTL3=\$166! \ CS control 3
-CSCTL4=\$168! \ CS control 4
-CSCTL5=\$16A! \ CS control 5
-CSCTL6=\$16C! \ CS control 6
-
-SYSCTL=\$180! \ System control
-SYSJMBC=\$186! \ JTAG mailbox control
-SYSJMBI0=\$188! \ JTAG mailbox input 0
-SYSJMBI1=\$18A! \ JTAG mailbox input 1
-SYSJMBO0=\$18C! \ JTAG mailbox output 0
-SYSJMBO1=\$18E! \ JTAG mailbox output 1
-SYSUNIV=\$19A! \ User NMI vector generator
-SYSSNIV=\$19C! \ System NMI vector generator
-SYSRSTIV=\$19E! \ Reset vector generator
-
-REFCTL=\$1B0! \ Shared reference control
+CSCTL0=\$160! \ CS control 0
+CSCTL1=\$162! \ CS control 1
+CSCTL2=\$164! \ CS control 2
+CSCTL3=\$166! \ CS control 3
+CSCTL4=\$168! \ CS control 4
+CSCTL5=\$16A! \ CS control 5
+CSCTL6=\$16C! \ CS control 6
+
+SYSCTL=\$180! \ System control
+SYSJMBC=\$186! \ JTAG mailbox control
+SYSJMBI0=\$188! \ JTAG mailbox input 0
+SYSJMBI1=\$18A! \ JTAG mailbox input 1
+SYSJMBO0=\$18C! \ JTAG mailbox output 0
+SYSJMBO1=\$18E! \ JTAG mailbox output 1
+SYSUNIV=\$19A! \ User NMI vector generator
+SYSSNIV=\$19C! \ System NMI vector generator
+SYSRSTIV=\$19E! \ Reset vector generator
+
+REFCTL=\$1B0! \ Shared reference control
PAIN=\$200!
PAOUT=\$202!
TBIFG=1!
CCIFG=1!
-TA0CTL=\$340! \ TA0 control
-TA0CCTL0=\$342! \ Capture/compare control 0
-TA0CCTL1=\$344! \ Capture/compare control 1
-TA0CCTL2=\$346! \ Capture/compare control 2
-TA0R=\$350! \ TA0 counter register
-TA0CCR0=\$352! \ Capture/compare register 0
-TA0CCR1=\$354! \ Capture/compare register 1
-TA0CCR2=\$356! \ Capture/compare register 2
-TA0EX0=\$360! \ TA0 expansion register 0
-TA0IV=\$36E! \ TA0 interrupt vector
-
-TA1CTL=\$380! \ TA1 control
-TA1CCTL0=\$382! \ Capture/compare control 0
-TA1CCTL1=\$384! \ Capture/compare control 1
-TA1CCTL2=\$386! \ Capture/compare control 2
-TA1R=\$390! \ TA1 counter register
-TA1CCR0=\$392! \ Capture/compare register 0
-TA1CCR1=\$394! \ Capture/compare register 1
-TA1CCR2=\$396! \ Capture/compare register 2
-TA1EX0=\$3A0! \ TA1 expansion register 0
-TA1IV=\$3AE! \ TA1 interrupt vector
-
-TB0CTL=\$3C0! \ TB0 control
-TB0CCTL0=\$3C2! \ Capture/compare control 0
-TB0CCTL1=\$3C4! \ Capture/compare control 1
-TB0CCTL2=\$3C6! \ Capture/compare control 2
-TB0CCTL3=\$3C8! \ Capture/compare control 3
-TB0CCTL4=\$3CA! \ Capture/compare control 4
-TB0CCTL5=\$3CC! \ Capture/compare control 5
-TB0CCTL6=\$3CE! \ Capture/compare control 6
-TB0R=\$3D0! \ TB0 counter register
-TB0CCR0=\$3D2! \ Capture/compare register 0
-TB0CCR1=\$3D4! \ Capture/compare register 1
-TB0CCR2=\$3D6! \ Capture/compare register 2
-TB0CCR3=\$3D8! \ Capture/compare register 3
-TB0CCR5=\$3DA! \ Capture/compare register 4
-TB0CCR5=\$3DC! \ Capture/compare register 5
-TB0CCR6=\$3DE! \ Capture/compare register 6
-TB0EX0=\$3E0! \ TB0 expansion register 0
-TB0IV=\$3EE! \ TB0 interrupt vector
-
-TA2CTL=\$400! \ TA2 control
-TA2CCTL0=\$402! \ Capture/compare control 0
-TA2CCTL1=\$404! \ Capture/compare control 1
-TA2R=\$410! \ TA2 counter register
-TA2CCR0=\$412! \ Capture/compare register 0
-TA2CCR1=\$414! \ Capture/compare register 1
-TA2EX0=\$420! \ TA2 expansion register 0
-TA2IV=\$42E! \ TA2 interrupt vector
-
-TA3CTL=\$440! \ TA3 control
-TA3CCTL0=\$442! \ Capture/compare control 0
-TA3CCTL1=\$444! \ Capture/compare control 1
-TA3R=\$450! \ TA3 counter register
-TA3CCR0=\$452! \ Capture/compare register 0
-TA3CCR1=\$454! \ Capture/compare register 1
-TA3EX0=\$460! \ TA3 expansion register 0
-TA3IV=\$46E! \ TA3 interrupt vector
+TA0CTL=\$340! \ TA0 control
+TA0CCTL0=\$342! \ Capture/compare control 0
+TA0CCTL1=\$344! \ Capture/compare control 1
+TA0CCTL2=\$346! \ Capture/compare control 2
+TA0R=\$350! \ TA0 counter register
+TA0CCR0=\$352! \ Capture/compare register 0
+TA0CCR1=\$354! \ Capture/compare register 1
+TA0CCR2=\$356! \ Capture/compare register 2
+TA0EX0=\$360! \ TA0 expansion register 0
+TA0IV=\$36E! \ TA0 interrupt vector
+
+TA1CTL=\$380! \ TA1 control
+TA1CCTL0=\$382! \ Capture/compare control 0
+TA1CCTL1=\$384! \ Capture/compare control 1
+TA1CCTL2=\$386! \ Capture/compare control 2
+TA1R=\$390! \ TA1 counter register
+TA1CCR0=\$392! \ Capture/compare register 0
+TA1CCR1=\$394! \ Capture/compare register 1
+TA1CCR2=\$396! \ Capture/compare register 2
+TA1EX0=\$3A0! \ TA1 expansion register 0
+TA1IV=\$3AE! \ TA1 interrupt vector
+
+TB0CTL=\$3C0! \ TB0 control
+TB0CCTL0=\$3C2! \ Capture/compare control 0
+TB0CCTL1=\$3C4! \ Capture/compare control 1
+TB0CCTL2=\$3C6! \ Capture/compare control 2
+TB0CCTL3=\$3C8! \ Capture/compare control 3
+TB0CCTL4=\$3CA! \ Capture/compare control 4
+TB0CCTL5=\$3CC! \ Capture/compare control 5
+TB0CCTL6=\$3CE! \ Capture/compare control 6
+TB0R=\$3D0! \ TB0 counter register
+TB0CCR0=\$3D2! \ Capture/compare register 0
+TB0CCR1=\$3D4! \ Capture/compare register 1
+TB0CCR2=\$3D6! \ Capture/compare register 2
+TB0CCR3=\$3D8! \ Capture/compare register 3
+TB0CCR5=\$3DA! \ Capture/compare register 4
+TB0CCR5=\$3DC! \ Capture/compare register 5
+TB0CCR6=\$3DE! \ Capture/compare register 6
+TB0EX0=\$3E0! \ TB0 expansion register 0
+TB0IV=\$3EE! \ TB0 interrupt vector
+
+TA2CTL=\$400! \ TA2 control
+TA2CCTL0=\$402! \ Capture/compare control 0
+TA2CCTL1=\$404! \ Capture/compare control 1
+TA2R=\$410! \ TA2 counter register
+TA2CCR0=\$412! \ Capture/compare register 0
+TA2CCR1=\$414! \ Capture/compare register 1
+TA2EX0=\$420! \ TA2 expansion register 0
+TA2IV=\$42E! \ TA2 interrupt vector
+
+TA3CTL=\$440! \ TA3 control
+TA3CCTL0=\$442! \ Capture/compare control 0
+TA3CCTL1=\$444! \ Capture/compare control 1
+TA3R=\$450! \ TA3 counter register
+TA3CCR0=\$452! \ Capture/compare register 0
+TA3CCR1=\$454! \ Capture/compare register 1
+TA3EX0=\$460! \ TA3 expansion register 0
+TA3IV=\$46E! \ TA3 interrupt vector
! \ RTC_B
-RTCCTL0=\$4A0! \ RTC control 0
-RTCCTL1=\$4A1! \ RTC control 1
-RTCCTL2=\$4A2! \ RTC control 2
-RTCCTL3=\$4A3! \ RTC control 3
-RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
-RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
-RTCPS0=\$4AC! \ RTC prescaler 0
-RTCPS1=\$4AD! \ RTC prescaler 1
-RTCIV=\$4AE! \ RTC interrupt vector word
-RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
-RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
-RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
-RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
-RTCDAY=\$4B4! \ RTC days
-RTCMON=\$4B5! \ RTC month
-RTCYEAR=\$4B6!
-RTCYEARL=\$4B6! \ RTC year low
-RTCYEARH=\$4B7! \ RTC year high
-RTCAMIN=\$4B8! \ RTC alarm minutes
-RTCAHOUR=\$4B9! \ RTC alarm hours
-RTCADOW=\$4BA! \ RTC alarm day of week
-RTCADAY=\$4BB! \ RTC alarm days
-BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
-BCD2BIN=\$4BE! \ BCD-to-binary conversion register
+RTCCTL0=\$4A0! \ RTC control 0
+RTCCTL1=\$4A1! \ RTC control 1
+RTCCTL2=\$4A2! \ RTC control 2
+RTCCTL3=\$4A3! \ RTC control 3
+RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
+RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
+RTCPS0=\$4AC! \ RTC prescaler 0
+RTCPS1=\$4AD! \ RTC prescaler 1
+RTCIV=\$4AE! \ RTC interrupt vector word
+RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
+RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
+RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
+RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
+RTCDAY=\$4B4! \ RTC days
+RTCMON=\$4B5! \ RTC month
+RTCYEAR=\$4B6!
+RTCYEARL=\$4B6! \ RTC year low
+RTCYEARH=\$4B7! \ RTC year high
+RTCAMIN=\$4B8! \ RTC alarm minutes
+RTCAHOUR=\$4B9! \ RTC alarm hours
+RTCADOW=\$4BA! \ RTC alarm day of week
+RTCADAY=\$4BB! \ RTC alarm days
+BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
+BCD2BIN=\$4BE! \ BCD-to-binary conversion register
RTCHOLD=\$40!
RTCRDY=\$10!
DMAIFG=8!
-DMACTL0=\$500! \ DMA module control 0
-DMACTL1=\$502! \ DMA module control 1
-DMACTL2=\$504! \ DMA module control 2
-DMACTL3=\$506! \ DMA module control 3
-DMACTL4=\$508! \ DMA module control 4
-DMAIV=\$50A! \ DMA interrupt vector
-
-DMA0CTL=\$510! \ DMA channel 0 control
-DMA0SAL=\$512! \ DMA channel 0 source address low
-DMA0SAH=\$514! \ DMA channel 0 source address high
-DMA0DAL=\$516! \ DMA channel 0 destination address low
-DMA0DAH=\$518! \ DMA channel 0 destination address high
-DMA0SZ=\$51A! \ DMA channel 0 transfer size
-
-DMA1CTL=\$520! \ DMA channel 1 control
-DMA1SAL=\$522! \ DMA channel 1 source address low
-DMA1SAH=\$524! \ DMA channel 1 source address high
-DMA1DAL=\$526! \ DMA channel 1 destination address low
-DMA1DAH=\$528! \ DMA channel 1 destination address high
-DMA1SZ=\$52A! \ DMA channel 1 transfer size
-
-DMA2CTL=\$530! \ DMA channel 2 control
-DMA2SAL=\$532! \ DMA channel 2 source address low
-DMA2SAH=\$534! \ DMA channel 2 source address high
-DMA2DAL=\$536! \ DMA channel 2 destination address low
-DMA2DAH=\$538! \ DMA channel 2 destination address high
-DMA2SZ=\$53A! \ DMA channel 2 transfer size
-
-
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEGB2=\$5A4! \ MPU Segmentation Border2
-MPUSEGB1=\$5A6! \ MPU Segmentation Border1
-MPUSAM=\$5A8! \ MPU access management
-MPUIPC0=\$5AA! \ MPU IP control 0
-MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
-
-UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
-UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
-UCA0BRW=\$5C6!
-UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
-UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
-UCA0STAT=\$5CA! \ eUSCI_A status
-UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
-UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
-UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
-UCA0IE=\$5DA! \ eUSCI_A interrupt enable
-UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
-UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
-UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
-UCA1BRW=\$5E6!
-UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
-UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
-UCA1STAT=\$5EA! \ eUSCI_A status
-UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
-UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
-UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
-UCA1IE=\$5FA! \ eUSCI_A interrupt enable
-UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
-UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
-
-UCB0CTLW0=\$640! \ eUSCI_B control word 0
-UCB0CTLW1=\$642! \ eUSCI_B control word 1
-UCB0BRW=\$646!
-UCB0BR0=\$646! \ eUSCI_B bit rate 0
-UCB0BR1=\$647! \ eUSCI_B bit rate 1
-UCB0STATW=\$648! \ eUSCI_B status word
-UCBCNT0=\$649! \ eUSCI_B hardware count
-UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$65C! \ eUSCI_B received address
-UCB0ADDMASK=\$65E! \ eUSCI_B address mask
-UCB0I2CSA=\$660! \ eUSCI I2C slave address
-UCB0IE=\$66A! \ eUSCI interrupt enable
-UCB0IFG=\$66C! \ eUSCI interrupt flags
-UCB0IV=\$66E! \ eUSCI interrupt vector word
+DMACTL0=\$500! \ DMA module control 0
+DMACTL1=\$502! \ DMA module control 1
+DMACTL2=\$504! \ DMA module control 2
+DMACTL3=\$506! \ DMA module control 3
+DMACTL4=\$508! \ DMA module control 4
+DMAIV=\$50A! \ DMA interrupt vector
+
+DMA0CTL=\$510! \ DMA channel 0 control
+DMA0SAL=\$512! \ DMA channel 0 source address low
+DMA0SAH=\$514! \ DMA channel 0 source address high
+DMA0DAL=\$516! \ DMA channel 0 destination address low
+DMA0DAH=\$518! \ DMA channel 0 destination address high
+DMA0SZ=\$51A! \ DMA channel 0 transfer size
+
+DMA1CTL=\$520! \ DMA channel 1 control
+DMA1SAL=\$522! \ DMA channel 1 source address low
+DMA1SAH=\$524! \ DMA channel 1 source address high
+DMA1DAL=\$526! \ DMA channel 1 destination address low
+DMA1DAH=\$528! \ DMA channel 1 destination address high
+DMA1SZ=\$52A! \ DMA channel 1 transfer size
+
+DMA2CTL=\$530! \ DMA channel 2 control
+DMA2SAL=\$532! \ DMA channel 2 source address low
+DMA2SAH=\$534! \ DMA channel 2 source address high
+DMA2DAL=\$536! \ DMA channel 2 destination address low
+DMA2DAH=\$538! \ DMA channel 2 destination address high
+DMA2SZ=\$53A! \ DMA channel 2 transfer size
+
+
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEGB2=\$5A4! \ MPU Segmentation Border2
+MPUSEGB1=\$5A6! \ MPU Segmentation Border1
+MPUSAM=\$5A8! \ MPU access management
+MPUIPC0=\$5AA! \ MPU IP control 0
+MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
+
+UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
+UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
+UCA0BRW=\$5C6!
+UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
+UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
+UCA0STAT=\$5CA! \ eUSCI_A status
+UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
+UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
+UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
+UCA0IE=\$5DA! \ eUSCI_A interrupt enable
+UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
+UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
+UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
+UCA1BRW=\$5E6!
+UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
+UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
+UCA1STAT=\$5EA! \ eUSCI_A status
+UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
+UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
+UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
+UCA1IE=\$5FA! \ eUSCI_A interrupt enable
+UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
+UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
+
+UCB0CTLW0=\$640! \ eUSCI_B control word 0
+UCB0CTLW1=\$642! \ eUSCI_B control word 1
+UCB0BRW=\$646!
+UCB0BR0=\$646! \ eUSCI_B bit rate 0
+UCB0BR1=\$647! \ eUSCI_B bit rate 1
+UCB0STATW=\$648! \ eUSCI_B status word
+UCBCNT0=\$649! \ eUSCI_B hardware count
+UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$65C! \ eUSCI_B received address
+UCB0ADDMASK=\$65E! \ eUSCI_B address mask
+UCB0I2CSA=\$660! \ eUSCI I2C slave address
+UCB0IE=\$66A! \ eUSCI interrupt enable
+UCB0IFG=\$66C! \ eUSCI interrupt flags
+UCB0IV=\$66E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-ADC12CTL0=\$800! \ ADC12_B Control 0
-ADC12CTL1=\$802! \ ADC12_B Control 1
-ADC12CTL2=\$804! \ ADC12_B Control 2
-ADC12CTL3=\$806! \ ADC12_B Control 3
-ADC12LO=\$808! \ ADC12_B Window Comparator Low Threshold Register
-ADC12HI=\$80A! \ ADC12_B Window Comparator High Threshold Register
-ADC12IFGR0=\$80C! \ ADC12_B Interrupt Flag Register 0
-ADC12IFGR1=\$80E! \ ADC12_B Interrupt Flag Register 1
-ADC12IFGR2=\$810! \ ADC12_B Interrupt Flag Register 2
-ADC12IER0=\$812! \ ADC12_B Interrupt Enable Register 0
-ADC12IER1=\$814! \ ADC12_B Interrupt Enable Register 1
-ADC12IER2=\$816! \ ADC12_B Interrupt Enable Register 2
-ADC12IV=\$818! \ ADC12_B Interrupt Vector
-ADC12MCTL0=\$820! \ ADC12_B Memory Control 0
-ADC12MCTL1=\$822! \ ADC12_B Memory Control 1
-ADC12MCTL2=\$824! \ ADC12_B Memory Control 2
-ADC12MCTL3=\$826! \ ADC12_B Memory Control 3
-ADC12MCTL4=\$828! \ ADC12_B Memory Control 4
-ADC12MCTL5=\$82A! \ ADC12_B Memory Control 5
-ADC12MCTL6=\$82C! \ ADC12_B Memory Control 6
-ADC12MCTL7=\$82E! \ ADC12_B Memory Control 7
-ADC12MCTL8=\$830! \ ADC12_B Memory Control 8
-ADC12MCTL9=\$832! \ ADC12_B Memory Control 9
-ADC12MCTL10=\$834! \ ADC12_B Memory Control 10
-ADC12MCTL11=\$836! \ ADC12_B Memory Control 11
-ADC12MCTL12=\$838! \ ADC12_B Memory Control 12
-ADC12MCTL13=\$83A! \ ADC12_B Memory Control 13
-ADC12MCTL14=\$83C! \ ADC12_B Memory Control 14
-ADC12MCTL15=\$83E! \ ADC12_B Memory Control 15
-ADC12MCTL16=\$840! \ ADC12_B Memory Control 16
-ADC12MCTL17=\$842! \ ADC12_B Memory Control 17
-ADC12MCTL18=\$844! \ ADC12_B Memory Control 18
-ADC12MCTL19=\$846! \ ADC12_B Memory Control 19
-ADC12MCTL20=\$848! \ ADC12_B Memory Control 20
-ADC12MCTL21=\$84A! \ ADC12_B Memory Control 21
-ADC12MCTL22=\$84C! \ ADC12_B Memory Control 22
-ADC12MCTL23=\$84E! \ ADC12_B Memory Control 23
-ADC12MCTL24=\$850! \ ADC12_B Memory Control 24
-ADC12MCTL25=\$852! \ ADC12_B Memory Control 25
-ADC12MCTL26=\$854! \ ADC12_B Memory Control 26
-ADC12MCTL27=\$856! \ ADC12_B Memory Control 27
-ADC12MCTL28=\$858! \ ADC12_B Memory Control 28
-ADC12MCTL29=\$85A! \ ADC12_B Memory Control 29
-ADC12MCTL30=\$85C! \ ADC12_B Memory Control 30
-ADC12MCTL31=\$85E! \ ADC12_B Memory Control 31
-ADC12MEM0=\$860! \ ADC12_B Memory 0
-ADC12MEM1=\$862! \ ADC12_B Memory 1
-ADC12MEM2=\$864! \ ADC12_B Memory 2
-ADC12MEM3=\$866! \ ADC12_B Memory 3
-ADC12MEM4=\$868! \ ADC12_B Memory 4
-ADC12MEM5=\$86A! \ ADC12_B Memory 5
-ADC12MEM6=\$86C! \ ADC12_B Memory 6
-ADC12MEM7=\$86E! \ ADC12_B Memory 7
-ADC12MEM8=\$870! \ ADC12_B Memory 8
-ADC12MEM9=\$872! \ ADC12_B Memory 9
-ADC12MEM10=\$874! \ ADC12_B Memory 10
-ADC12MEM11=\$876! \ ADC12_B Memory 11
-ADC12MEM12=\$878! \ ADC12_B Memory 12
-ADC12MEM13=\$87A! \ ADC12_B Memory 13
-ADC12MEM14=\$87C! \ ADC12_B Memory 14
-ADC12MEM15=\$87E! \ ADC12_B Memory 15
-ADC12MEM16=\$880! \ ADC12_B Memory 16
-ADC12MEM17=\$882! \ ADC12_B Memory 17
-ADC12MEM18=\$884! \ ADC12_B Memory 18
-ADC12MEM19=\$886! \ ADC12_B Memory 19
-ADC12MEM20=\$888! \ ADC12_B Memory 20
-ADC12MEM21=\$88A! \ ADC12_B Memory 21
-ADC12MEM22=\$88C! \ ADC12_B Memory 22
-ADC12MEM23=\$88E! \ ADC12_B Memory 23
-ADC12MEM24=\$890! \ ADC12_B Memory 24
-ADC12MEM25=\$892! \ ADC12_B Memory 25
-ADC12MEM26=\$894! \ ADC12_B Memory 26
-ADC12MEM27=\$896! \ ADC12_B Memory 27
-ADC12MEM28=\$898! \ ADC12_B Memory 28
-ADC12MEM29=\$89A! \ ADC12_B Memory 29
-ADC12MEM30=\$89C! \ ADC12_B Memory 30
-ADC12MEM31=\$89E! \ ADC12_B Memory 31
+ADC12CTL0=\$800! \ ADC12_B Control 0
+ADC12CTL1=\$802! \ ADC12_B Control 1
+ADC12CTL2=\$804! \ ADC12_B Control 2
+ADC12CTL3=\$806! \ ADC12_B Control 3
+ADC12LO=\$808! \ ADC12_B Window Comparator Low Threshold Register
+ADC12HI=\$80A! \ ADC12_B Window Comparator High Threshold Register
+ADC12IFGR0=\$80C! \ ADC12_B Interrupt Flag Register 0
+ADC12IFGR1=\$80E! \ ADC12_B Interrupt Flag Register 1
+ADC12IFGR2=\$810! \ ADC12_B Interrupt Flag Register 2
+ADC12IER0=\$812! \ ADC12_B Interrupt Enable Register 0
+ADC12IER1=\$814! \ ADC12_B Interrupt Enable Register 1
+ADC12IER2=\$816! \ ADC12_B Interrupt Enable Register 2
+ADC12IV=\$818! \ ADC12_B Interrupt Vector
+ADC12MCTL0=\$820! \ ADC12_B Memory Control 0
+ADC12MCTL1=\$822! \ ADC12_B Memory Control 1
+ADC12MCTL2=\$824! \ ADC12_B Memory Control 2
+ADC12MCTL3=\$826! \ ADC12_B Memory Control 3
+ADC12MCTL4=\$828! \ ADC12_B Memory Control 4
+ADC12MCTL5=\$82A! \ ADC12_B Memory Control 5
+ADC12MCTL6=\$82C! \ ADC12_B Memory Control 6
+ADC12MCTL7=\$82E! \ ADC12_B Memory Control 7
+ADC12MCTL8=\$830! \ ADC12_B Memory Control 8
+ADC12MCTL9=\$832! \ ADC12_B Memory Control 9
+ADC12MCTL10=\$834! \ ADC12_B Memory Control 10
+ADC12MCTL11=\$836! \ ADC12_B Memory Control 11
+ADC12MCTL12=\$838! \ ADC12_B Memory Control 12
+ADC12MCTL13=\$83A! \ ADC12_B Memory Control 13
+ADC12MCTL14=\$83C! \ ADC12_B Memory Control 14
+ADC12MCTL15=\$83E! \ ADC12_B Memory Control 15
+ADC12MCTL16=\$840! \ ADC12_B Memory Control 16
+ADC12MCTL17=\$842! \ ADC12_B Memory Control 17
+ADC12MCTL18=\$844! \ ADC12_B Memory Control 18
+ADC12MCTL19=\$846! \ ADC12_B Memory Control 19
+ADC12MCTL20=\$848! \ ADC12_B Memory Control 20
+ADC12MCTL21=\$84A! \ ADC12_B Memory Control 21
+ADC12MCTL22=\$84C! \ ADC12_B Memory Control 22
+ADC12MCTL23=\$84E! \ ADC12_B Memory Control 23
+ADC12MCTL24=\$850! \ ADC12_B Memory Control 24
+ADC12MCTL25=\$852! \ ADC12_B Memory Control 25
+ADC12MCTL26=\$854! \ ADC12_B Memory Control 26
+ADC12MCTL27=\$856! \ ADC12_B Memory Control 27
+ADC12MCTL28=\$858! \ ADC12_B Memory Control 28
+ADC12MCTL29=\$85A! \ ADC12_B Memory Control 29
+ADC12MCTL30=\$85C! \ ADC12_B Memory Control 30
+ADC12MCTL31=\$85E! \ ADC12_B Memory Control 31
+ADC12MEM0=\$860! \ ADC12_B Memory 0
+ADC12MEM1=\$862! \ ADC12_B Memory 1
+ADC12MEM2=\$864! \ ADC12_B Memory 2
+ADC12MEM3=\$866! \ ADC12_B Memory 3
+ADC12MEM4=\$868! \ ADC12_B Memory 4
+ADC12MEM5=\$86A! \ ADC12_B Memory 5
+ADC12MEM6=\$86C! \ ADC12_B Memory 6
+ADC12MEM7=\$86E! \ ADC12_B Memory 7
+ADC12MEM8=\$870! \ ADC12_B Memory 8
+ADC12MEM9=\$872! \ ADC12_B Memory 9
+ADC12MEM10=\$874! \ ADC12_B Memory 10
+ADC12MEM11=\$876! \ ADC12_B Memory 11
+ADC12MEM12=\$878! \ ADC12_B Memory 12
+ADC12MEM13=\$87A! \ ADC12_B Memory 13
+ADC12MEM14=\$87C! \ ADC12_B Memory 14
+ADC12MEM15=\$87E! \ ADC12_B Memory 15
+ADC12MEM16=\$880! \ ADC12_B Memory 16
+ADC12MEM17=\$882! \ ADC12_B Memory 17
+ADC12MEM18=\$884! \ ADC12_B Memory 18
+ADC12MEM19=\$886! \ ADC12_B Memory 19
+ADC12MEM20=\$888! \ ADC12_B Memory 20
+ADC12MEM21=\$88A! \ ADC12_B Memory 21
+ADC12MEM22=\$88C! \ ADC12_B Memory 22
+ADC12MEM23=\$88E! \ ADC12_B Memory 23
+ADC12MEM24=\$890! \ ADC12_B Memory 24
+ADC12MEM25=\$892! \ ADC12_B Memory 25
+ADC12MEM26=\$894! \ ADC12_B Memory 26
+ADC12MEM27=\$896! \ ADC12_B Memory 27
+ADC12MEM28=\$898! \ ADC12_B Memory 28
+ADC12MEM29=\$89A! \ ADC12_B Memory 29
+ADC12MEM30=\$89C! \ ADC12_B Memory 30
+ADC12MEM31=\$89E! \ ADC12_B Memory 31
ADCON=\$10!
ADCSTART=\$03!
CDIFG=1!
CDIIFG=2!
-CDCTL0=\$8C0! \ Comparator_E control register 0
-CDCTL1=\$8C2! \ Comparator_E control register 1
-CDCTL2=\$8C4! \ Comparator_E control register 2
-CDCTL3=\$8C6! \ Comparator_E control register 3
-CDINT=\$8CC! \ Comparator_E interrupt register
-CDIV=\$8CE! \ Comparator_E interrupt vector word
-
-
-AESACTL0=\$9C0! \ AES accelerator control register 0
-AESASTAT=\$9C4! \ AES accelerator status register
-AESAKEY=\$9C6! \ AES accelerator key register
-AESADIN=\$9C8! \ AES accelerator data in register
-AESADOUT=\$9CA! \ AES accelerator data out register
-AESAXDIN=\$9CC! \ AES accelerator XORed data in register
-AESAXIN =\$9CE! \ AES accelerator XORed data in register (no trigger)
+CDCTL0=\$8C0! \ Comparator_E control register 0
+CDCTL1=\$8C2! \ Comparator_E control register 1
+CDCTL2=\$8C4! \ Comparator_E control register 2
+CDCTL3=\$8C6! \ Comparator_E control register 3
+CDINT=\$8CC! \ Comparator_E interrupt register
+CDIV=\$8CE! \ Comparator_E interrupt vector word
+
+
+AESACTL0=\$9C0! \ AES accelerator control register 0
+AESASTAT=\$9C4! \ AES accelerator status register
+AESAKEY=\$9C6! \ AES accelerator key register
+AESADIN=\$9C8! \ AES accelerator data in register
+AESADOUT=\$9CA! \ AES accelerator data out register
+AESAXDIN=\$9CC! \ AES accelerator XORed data in register
+AESAXIN =\$9CE! \ AES accelerator XORed data in register (no trigger)
; ----------------------------------------------
PAGESIZE .equ 512 ; MPU unit
; ----------------------------------------------
-; BSL
+; BSL
; ----------------------------------------------
BSL .equ 1000h
; ----------------------------------------------
JTAG_PASSWORD .equ 0FF88h ; 256 bits max
IPE_SIG_VALID .equ 0FF88h ; one word
IPE_STR_PTR_SRC .equ 0FF8Ah ; one word
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P1IFG .equ PA_SFR + 1Ch ; Port 1 Interrupt FlaG
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P2IN .equ PA_SFR + 01h ; Port 2 INput
P2OUT .equ PA_SFR + 03h ; Port 2 OUTput
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt FlaG
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3/4
P3IES .equ PB_SFR + 18h ; Port 3 Interrupt Edge Select
P3IE .equ PB_SFR + 1Ah ; Port 3 Interrupt Enable
P3IFG .equ PB_SFR + 1Ch ; Port 3 Interrupt Flag
-P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
+P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
P4IN .equ PB_SFR + 01h ; Port 4 Input */
P4OUT .equ PB_SFR + 03h ; Port 4 Output
P4IES .equ PB_SFR + 19h ; Port 4 Interrupt Edge Select
P4IE .equ PB_SFR + 1Bh ; Port 4 Interrupt Enable
P4IFG .equ PB_SFR + 1Dh ; Port 4 Interrupt Flag
-P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
+P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORTJ
MPY32CTL0 .equ MPY_SFR + 2Ch ; MPY32 control register 0
-MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
-MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
-MPUSEGB2 .equ MPU_SFR + 04h ; MPU Segmentation Border 2
-MPUSEGB1 .equ MPU_SFR + 06h ; MPU Segmentation Border 1
-MPUSAM .equ MPU_SFR + 08h ; MPU access management
-MPUIPC0 .equ MPU_SFR + 0Ah ; MPU IP control 0
-MPUIPSEGB2 .equ MPU_SFR + 0Ch ; MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1 .equ MPU_SFR + 0Eh ; MPU IP Encapsulation Segment Border 1
+MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
+MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
+MPUSEGB2 .equ MPU_SFR + 04h ; MPU Segmentation Border 2
+MPUSEGB1 .equ MPU_SFR + 06h ; MPU Segmentation Border 1
+MPUSAM .equ MPU_SFR + 08h ; MPU access management
+MPUIPC0 .equ MPU_SFR + 0Ah ; MPU IP control 0
+MPUIPSEGB2 .equ MPU_SFR + 0Ch ; MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1 .equ MPU_SFR + 0Eh ; MPU IP Encapsulation Segment Border 1
.IFDEF UCA0_TERM
TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ---------------------------------------
! FastForth RAM memory map (>= 1k)
! ---------------------------------------
-LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
-LSATCK=\$1C00! \ leave stack, grow up
-PSTACK=\$1C80! \ parameter stack, grow down
-RSTACK=\$1CE0! \ Return stack, grow down
-
-PAD_I2CADR=\$1CE0! \ RX I2C address
-PAD_I2CCNT=\$1CE2! \ count max
-PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$1D38! \ TX I2C address
-TIB_I2CCNT=\$1D3A! \ count of bytes
-TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$1D90! \ base address for HOLDS
-HOLD_BASE=\$1DB2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
+LEAVEPTR=\$1C00! Leave-stack pointer, init by QUIT
+LSATCK=\$1C00! leave stack, grow up
+PSTACK=\$1C80! parameter stack, grow down
+RSTACK=\$1CE0! Return stack, grow down
+!
+PAD_I2CADR=\$1CE0! RX I2C address
+PAD_I2CCNT=\$1CE2! count max
+PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CCNT=\$1D3A! count of bytes
+TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$1D90! base address for HOLDS
+HOLD_BASE=\$1DB2! BASE HOLD area, grow down
+!
HP=\$1DB2! HOLD ptr
-CAPS=\$1DB4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$1DB6!
-LAST_THREAD=\$1DB8!
-LAST_CFA=\$1DBA!
-LAST_PSP=\$1DBC!
-
-STATEADR=\$1DBE! Interpreter state
-
-SOURCE_LEN=\$1DC0! len of input stream
-SOURCE_ADR=\$1DC2! adr of input stream
-TOIN=\$1DC4! >IN
-DP=\$1DC6! dictionary ptr
-
-LASTVOC=\$1DC8! keep VOC-LINK
-CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DDA! CURRENT dictionnary ptr
-
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
-LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
-
+LAST_NFA=\$1DB4!
+LAST_THREAD=\$1DB6!
+LAST_CFA=\$1DB8!
+LAST_PSP=\$1DBA!
+!
+STATEADR=\$1DBC! Interpreter state
+BASEADR=\$1DBE! base
+CAPS=\$1DC0! CAPS ON/OFF
+!
+SOURCE_LEN=\$1DC2! len of input stream
+SOURCE_ORG=\$1DC4! adr of input stream
+TOIN=\$1DC6! >IN
+DP=\$1DC8! dictionary ptr
+!
+LASTVOC=\$1DCA! keep VOC-LINK
+CURRENT=\$1DCC! CURRENT dictionnary ptr
+CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
-!1DE0! 28 RAM bytes free
+!1DE0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
BUFEND=\$2000!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2002!
BS_FirstSectorL=\$2004!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$201E!
+BufferPtr=\$201E!
BufferLen=\$2020!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+NewClusterL=\$2026! 16 bits wide (FAT16)
+NewClusterH=\$2028! 16 bits wide (FAT16)
+CurFATsector=\$202A!
! ---------------------------------------
! DIR entry
! ---------------------------------------
DIRclusterL=\$202C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$202E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2030!
+EntryOfst=\$2030!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2038!
SLEEP=\$4400! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$440A! CODE compiled by LITERAL
-XSQUOTE=\$4414! CODE compiled by S" and S_
-HEREXEC=\$4428! CODE HERE and BEGIN execute address
-QFBRAN=\$4434! CODE compiled by IF UNTIL
-BRAN=\$443A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$443C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$443E! CODE compiled by DO
-XPLOOP=\$444E! CODE compiled by +LOOP
-XLOOP=\$4460! CODE compiled by LOOP
-MUSMOD=\$4466! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$4478! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$4480! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$44AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$44AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$44BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$44CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$44D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$44E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$44EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$441E! CODE compiled by S" and S_
+HEREXEC=\$4432! CODE HERE and BEGIN execute address
+MUSMOD=\$443E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$4450! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$4458! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$4482! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$4484! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$4494! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$44A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$44AC! CODE compiled by IF UNTIL
+BRAN=\$44B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$44B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$44B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$44C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$44F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$452A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$4536! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$44D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$4508! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$4512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$4594! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$459C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$45C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$45C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$45B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$458E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$45BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$45BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
+I2C_WARM=\$4580! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR5969
! ----------------------------------------------
MAIN_LEN=\$FC00! 63k FRAM
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
I2CSLA0=\$FFA2! UCBxI2COA0 default value address
I2CSLA1=\$FFA4! UCBxI2COA1 default value address
I2CSLA2=\$FFA6! UCBxI2COA2 default value address
SFRRPCR=\$104! \ SFR reset pin control
PMMCTL0=\$120! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-FRCTLCTL0=\$140! \ FRAM control 0
-GCCTL0=\$144! \ General control 0
-GCCTL1=\$146! \ General control 1
+FRCTLCTL0=\$140! \ FRAM control 0
+GCCTL0=\$144! \ General control 0
+GCCTL1=\$146! \ General control 1
-CRC16DI=\$150! \ CRC data input
-CRCDIRB=\$152! \ CRC data input reverse byte
-CRCINIRES=\$154! \ CRC initialization and result
-CRCRESR=\$156! \ CRC result reverse byte
+CRC16DI=\$150! \ CRC data input
+CRCDIRB=\$152! \ CRC data input reverse byte
+CRCINIRES=\$154! \ CRC initialization and result
+CRCRESR=\$156! \ CRC result reverse byte
WDTCTL=\$15C! \ WDT control register
-CSCTL0=\$160! \ CS control 0
-CSCTL1=\$162! \ CS control 1
-CSCTL2=\$164! \ CS control 2
-CSCTL3=\$166! \ CS control 3
-CSCTL4=\$168! \ CS control 4
-CSCTL5=\$16A! \ CS control 5
-CSCTL6=\$16C! \ CS control 6
-
-SYSCTL=\$180! \ System control
-SYSJMBC=\$186! \ JTAG mailbox control
-SYSJMBI0=\$188! \ JTAG mailbox input 0
-SYSJMBI1=\$18A! \ JTAG mailbox input 1
-SYSJMBO0=\$18C! \ JTAG mailbox output 0
-SYSJMBO1=\$18E! \ JTAG mailbox output 1
-SYSUNIV=\$19A! \ User NMI vector generator
-SYSSNIV=\$19C! \ System NMI vector generator
-SYSRSTIV=\$19E! \ Reset vector generator
-
-REFCTL=\$1B0! \ Shared reference control
+CSCTL0=\$160! \ CS control 0
+CSCTL1=\$162! \ CS control 1
+CSCTL2=\$164! \ CS control 2
+CSCTL3=\$166! \ CS control 3
+CSCTL4=\$168! \ CS control 4
+CSCTL5=\$16A! \ CS control 5
+CSCTL6=\$16C! \ CS control 6
+
+SYSCTL=\$180! \ System control
+SYSJMBC=\$186! \ JTAG mailbox control
+SYSJMBI0=\$188! \ JTAG mailbox input 0
+SYSJMBI1=\$18A! \ JTAG mailbox input 1
+SYSJMBO0=\$18C! \ JTAG mailbox output 0
+SYSJMBO1=\$18E! \ JTAG mailbox output 1
+SYSUNIV=\$19A! \ User NMI vector generator
+SYSSNIV=\$19C! \ System NMI vector generator
+SYSRSTIV=\$19E! \ Reset vector generator
+
+REFCTL=\$1B0! \ Shared reference control
PAIN=\$200!
PAOUT=\$202!
TBIFG=1!
CCIFG=1!
-TA0CTL=\$340! \ TA0 control
-TA0CCTL0=\$342! \ Capture/compare control 0
-TA0CCTL1=\$344! \ Capture/compare control 1
-TA0CCTL2=\$346! \ Capture/compare control 2
-TA0R=\$350! \ TA0 counter register
-TA0CCR0=\$352! \ Capture/compare register 0
-TA0CCR1=\$354! \ Capture/compare register 1
-TA0CCR2=\$356! \ Capture/compare register 2
-TA0EX0=\$360! \ TA0 expansion register 0
-TA0IV=\$36E! \ TA0 interrupt vector
-
-TA1CTL=\$380! \ TA1 control
-TA1CCTL0=\$382! \ Capture/compare control 0
-TA1CCTL1=\$384! \ Capture/compare control 1
-TA1CCTL2=\$386! \ Capture/compare control 2
-TA1R=\$390! \ TA1 counter register
-TA1CCR0=\$392! \ Capture/compare register 0
-TA1CCR1=\$394! \ Capture/compare register 1
-TA1CCR2=\$396! \ Capture/compare register 2
-TA1EX0=\$3A0! \ TA1 expansion register 0
-TA1IV=\$3AE! \ TA1 interrupt vector
-
-TB0CTL=\$3C0! \ TB0 control
-TB0CCTL0=\$3C2! \ Capture/compare control 0
-TB0CCTL1=\$3C4! \ Capture/compare control 1
-TB0CCTL2=\$3C6! \ Capture/compare control 2
-TB0CCTL3=\$3C8! \ Capture/compare control 3
-TB0CCTL4=\$3CA! \ Capture/compare control 4
-TB0CCTL5=\$3CC! \ Capture/compare control 5
-TB0CCTL6=\$3CE! \ Capture/compare control 6
-TB0R=\$3D0! \ TB0 counter register
-TB0CCR0=\$3D2! \ Capture/compare register 0
-TB0CCR1=\$3D4! \ Capture/compare register 1
-TB0CCR2=\$3D6! \ Capture/compare register 2
-TB0CCR3=\$3D8! \ Capture/compare register 3
-TB0CCR5=\$3DA! \ Capture/compare register 4
-TB0CCR5=\$3DC! \ Capture/compare register 5
-TB0CCR6=\$3DE! \ Capture/compare register 6
-TB0EX0=\$3E0! \ TB0 expansion register 0
-TB0IV=\$3EE! \ TB0 interrupt vector
-
-TA2CTL=\$400! \ TA2 control
-TA2CCTL0=\$402! \ Capture/compare control 0
-TA2CCTL1=\$404! \ Capture/compare control 1
-TA2R=\$410! \ TA2 counter register
-TA2CCR0=\$412! \ Capture/compare register 0
-TA2CCR1=\$414! \ Capture/compare register 1
-TA2EX0=\$420! \ TA2 expansion register 0
-TA2IV=\$42E! \ TA2 interrupt vector
-
-TA3CTL=\$440! \ TA3 control
-TA3CCTL0=\$442! \ Capture/compare control 0
-TA3CCTL1=\$444! \ Capture/compare control 1
-TA3R=\$450! \ TA3 counter register
-TA3CCR0=\$452! \ Capture/compare register 0
-TA3CCR1=\$454! \ Capture/compare register 1
-TA3EX0=\$460! \ TA3 expansion register 0
-TA3IV=\$46E! \ TA3 interrupt vector
+TA0CTL=\$340! \ TA0 control
+TA0CCTL0=\$342! \ Capture/compare control 0
+TA0CCTL1=\$344! \ Capture/compare control 1
+TA0CCTL2=\$346! \ Capture/compare control 2
+TA0R=\$350! \ TA0 counter register
+TA0CCR0=\$352! \ Capture/compare register 0
+TA0CCR1=\$354! \ Capture/compare register 1
+TA0CCR2=\$356! \ Capture/compare register 2
+TA0EX0=\$360! \ TA0 expansion register 0
+TA0IV=\$36E! \ TA0 interrupt vector
+
+TA1CTL=\$380! \ TA1 control
+TA1CCTL0=\$382! \ Capture/compare control 0
+TA1CCTL1=\$384! \ Capture/compare control 1
+TA1CCTL2=\$386! \ Capture/compare control 2
+TA1R=\$390! \ TA1 counter register
+TA1CCR0=\$392! \ Capture/compare register 0
+TA1CCR1=\$394! \ Capture/compare register 1
+TA1CCR2=\$396! \ Capture/compare register 2
+TA1EX0=\$3A0! \ TA1 expansion register 0
+TA1IV=\$3AE! \ TA1 interrupt vector
+
+TB0CTL=\$3C0! \ TB0 control
+TB0CCTL0=\$3C2! \ Capture/compare control 0
+TB0CCTL1=\$3C4! \ Capture/compare control 1
+TB0CCTL2=\$3C6! \ Capture/compare control 2
+TB0CCTL3=\$3C8! \ Capture/compare control 3
+TB0CCTL4=\$3CA! \ Capture/compare control 4
+TB0CCTL5=\$3CC! \ Capture/compare control 5
+TB0CCTL6=\$3CE! \ Capture/compare control 6
+TB0R=\$3D0! \ TB0 counter register
+TB0CCR0=\$3D2! \ Capture/compare register 0
+TB0CCR1=\$3D4! \ Capture/compare register 1
+TB0CCR2=\$3D6! \ Capture/compare register 2
+TB0CCR3=\$3D8! \ Capture/compare register 3
+TB0CCR5=\$3DA! \ Capture/compare register 4
+TB0CCR5=\$3DC! \ Capture/compare register 5
+TB0CCR6=\$3DE! \ Capture/compare register 6
+TB0EX0=\$3E0! \ TB0 expansion register 0
+TB0IV=\$3EE! \ TB0 interrupt vector
+
+TA2CTL=\$400! \ TA2 control
+TA2CCTL0=\$402! \ Capture/compare control 0
+TA2CCTL1=\$404! \ Capture/compare control 1
+TA2R=\$410! \ TA2 counter register
+TA2CCR0=\$412! \ Capture/compare register 0
+TA2CCR1=\$414! \ Capture/compare register 1
+TA2EX0=\$420! \ TA2 expansion register 0
+TA2IV=\$42E! \ TA2 interrupt vector
+
+TA3CTL=\$440! \ TA3 control
+TA3CCTL0=\$442! \ Capture/compare control 0
+TA3CCTL1=\$444! \ Capture/compare control 1
+TA3R=\$450! \ TA3 counter register
+TA3CCR0=\$452! \ Capture/compare register 0
+TA3CCR1=\$454! \ Capture/compare register 1
+TA3EX0=\$460! \ TA3 expansion register 0
+TA3IV=\$46E! \ TA3 interrupt vector
! \ RTC_B
-RTCCTL0=\$4A0! \ RTC control 0
-RTCCTL1=\$4A1! \ RTC control 1
-RTCCTL2=\$4A2! \ RTC control 2
-RTCCTL3=\$4A3! \ RTC control 3
-RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
-RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
-RTCPS0=\$4AC! \ RTC prescaler 0
-RTCPS1=\$4AD! \ RTC prescaler 1
-RTCIV=\$4AE! \ RTC interrupt vector word
-RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
-RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
-RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
-RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
-RTCDAY=\$4B4! \ RTC days
-RTCMON=\$4B5! \ RTC month
-RTCYEAR=\$4B6!
-RTCYEARL=\$4B6! \ RTC year low
-RTCYEARH=\$4B7! \ RTC year high
-RTCAMIN=\$4B8! \ RTC alarm minutes
-RTCAHOUR=\$4B9! \ RTC alarm hours
-RTCADOW=\$4BA! \ RTC alarm day of week
-RTCADAY=\$4BB! \ RTC alarm days
-BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
-BCD2BIN=\$4BE! \ BCD-to-binary conversion register
+RTCCTL0=\$4A0! \ RTC control 0
+RTCCTL1=\$4A1! \ RTC control 1
+RTCCTL2=\$4A2! \ RTC control 2
+RTCCTL3=\$4A3! \ RTC control 3
+RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
+RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
+RTCPS0=\$4AC! \ RTC prescaler 0
+RTCPS1=\$4AD! \ RTC prescaler 1
+RTCIV=\$4AE! \ RTC interrupt vector word
+RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
+RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
+RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
+RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
+RTCDAY=\$4B4! \ RTC days
+RTCMON=\$4B5! \ RTC month
+RTCYEAR=\$4B6!
+RTCYEARL=\$4B6! \ RTC year low
+RTCYEARH=\$4B7! \ RTC year high
+RTCAMIN=\$4B8! \ RTC alarm minutes
+RTCAHOUR=\$4B9! \ RTC alarm hours
+RTCADOW=\$4BA! \ RTC alarm day of week
+RTCADAY=\$4BB! \ RTC alarm days
+BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
+BCD2BIN=\$4BE! \ BCD-to-binary conversion register
RTCHOLD=\$40!
RTCRDY=\$10!
DMAIFG=8!
-DMACTL0=\$500! \ DMA module control 0
-DMACTL1=\$502! \ DMA module control 1
-DMACTL2=\$504! \ DMA module control 2
-DMACTL3=\$506! \ DMA module control 3
-DMACTL4=\$508! \ DMA module control 4
-DMAIV=\$50A! \ DMA interrupt vector
-
-DMA0CTL=\$510! \ DMA channel 0 control
-DMA0SAL=\$512! \ DMA channel 0 source address low
-DMA0SAH=\$514! \ DMA channel 0 source address high
-DMA0DAL=\$516! \ DMA channel 0 destination address low
-DMA0DAH=\$518! \ DMA channel 0 destination address high
-DMA0SZ=\$51A! \ DMA channel 0 transfer size
-
-DMA1CTL=\$520! \ DMA channel 1 control
-DMA1SAL=\$522! \ DMA channel 1 source address low
-DMA1SAH=\$524! \ DMA channel 1 source address high
-DMA1DAL=\$526! \ DMA channel 1 destination address low
-DMA1DAH=\$528! \ DMA channel 1 destination address high
-DMA1SZ=\$52A! \ DMA channel 1 transfer size
-
-DMA2CTL=\$530! \ DMA channel 2 control
-DMA2SAL=\$532! \ DMA channel 2 source address low
-DMA2SAH=\$534! \ DMA channel 2 source address high
-DMA2DAL=\$536! \ DMA channel 2 destination address low
-DMA2DAH=\$538! \ DMA channel 2 destination address high
-DMA2SZ=\$53A! \ DMA channel 2 transfer size
-
-
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEGB2=\$5A4! \ MPU Segmentation Border2
-MPUSEGB1=\$5A6! \ MPU Segmentation Border1
-MPUSAM=\$5A8! \ MPU access management
-MPUIPC0=\$5AA! \ MPU IP control 0
-MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
-
-UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
-UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
-UCA0BRW=\$5C6!
-UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
-UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
-UCA0STAT=\$5CA! \ eUSCI_A status
-UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
-UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
-UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
-UCA0IE=\$5DA! \ eUSCI_A interrupt enable
-UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
-UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
-UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
-UCA1BRW=\$5E6!
-UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
-UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
-UCA1STAT=\$5EA! \ eUSCI_A status
-UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
-UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
-UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
-UCA1IE=\$5FA! \ eUSCI_A interrupt enable
-UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
-UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
-
-UCB0CTLW0=\$640! \ eUSCI_B control word 0
-UCB0CTLW1=\$642! \ eUSCI_B control word 1
-UCB0BRW=\$646!
-UCB0BR0=\$646! \ eUSCI_B bit rate 0
-UCB0BR1=\$647! \ eUSCI_B bit rate 1
-UCB0STATW=\$648! \ eUSCI_B status word
-UCBCNT0=\$649! \ eUSCI_B hardware count
-UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$65C! \ eUSCI_B received address
-UCB0ADDMASK=\$65E! \ eUSCI_B address mask
-UCB0I2CSA=\$660! \ eUSCI I2C slave address
-UCB0IE=\$66A! \ eUSCI interrupt enable
-UCB0IFG=\$66C! \ eUSCI interrupt flags
-UCB0IV=\$66E! \ eUSCI interrupt vector word
+DMACTL0=\$500! \ DMA module control 0
+DMACTL1=\$502! \ DMA module control 1
+DMACTL2=\$504! \ DMA module control 2
+DMACTL3=\$506! \ DMA module control 3
+DMACTL4=\$508! \ DMA module control 4
+DMAIV=\$50A! \ DMA interrupt vector
+
+DMA0CTL=\$510! \ DMA channel 0 control
+DMA0SAL=\$512! \ DMA channel 0 source address low
+DMA0SAH=\$514! \ DMA channel 0 source address high
+DMA0DAL=\$516! \ DMA channel 0 destination address low
+DMA0DAH=\$518! \ DMA channel 0 destination address high
+DMA0SZ=\$51A! \ DMA channel 0 transfer size
+
+DMA1CTL=\$520! \ DMA channel 1 control
+DMA1SAL=\$522! \ DMA channel 1 source address low
+DMA1SAH=\$524! \ DMA channel 1 source address high
+DMA1DAL=\$526! \ DMA channel 1 destination address low
+DMA1DAH=\$528! \ DMA channel 1 destination address high
+DMA1SZ=\$52A! \ DMA channel 1 transfer size
+
+DMA2CTL=\$530! \ DMA channel 2 control
+DMA2SAL=\$532! \ DMA channel 2 source address low
+DMA2SAH=\$534! \ DMA channel 2 source address high
+DMA2DAL=\$536! \ DMA channel 2 destination address low
+DMA2DAH=\$538! \ DMA channel 2 destination address high
+DMA2SZ=\$53A! \ DMA channel 2 transfer size
+
+
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEGB2=\$5A4! \ MPU Segmentation Border2
+MPUSEGB1=\$5A6! \ MPU Segmentation Border1
+MPUSAM=\$5A8! \ MPU access management
+MPUIPC0=\$5AA! \ MPU IP control 0
+MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
+
+UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
+UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
+UCA0BRW=\$5C6!
+UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
+UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
+UCA0STAT=\$5CA! \ eUSCI_A status
+UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
+UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
+UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
+UCA0IE=\$5DA! \ eUSCI_A interrupt enable
+UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
+UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
+UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
+UCA1BRW=\$5E6!
+UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
+UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
+UCA1STAT=\$5EA! \ eUSCI_A status
+UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
+UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
+UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
+UCA1IE=\$5FA! \ eUSCI_A interrupt enable
+UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
+UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
+
+UCB0CTLW0=\$640! \ eUSCI_B control word 0
+UCB0CTLW1=\$642! \ eUSCI_B control word 1
+UCB0BRW=\$646!
+UCB0BR0=\$646! \ eUSCI_B bit rate 0
+UCB0BR1=\$647! \ eUSCI_B bit rate 1
+UCB0STATW=\$648! \ eUSCI_B status word
+UCBCNT0=\$649! \ eUSCI_B hardware count
+UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$65C! \ eUSCI_B received address
+UCB0ADDMASK=\$65E! \ eUSCI_B address mask
+UCB0I2CSA=\$660! \ eUSCI I2C slave address
+UCB0IE=\$66A! \ eUSCI interrupt enable
+UCB0IFG=\$66C! \ eUSCI interrupt flags
+UCB0IV=\$66E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-ADC12CTL0=\$800! \ ADC12_B Control 0
-ADC12CTL1=\$802! \ ADC12_B Control 1
-ADC12CTL2=\$804! \ ADC12_B Control 2
-ADC12CTL3=\$806! \ ADC12_B Control 3
-ADC12LO=\$808! \ ADC12_B Window Comparator Low Threshold Register
-ADC12HI=\$80A! \ ADC12_B Window Comparator High Threshold Register
-ADC12IFGR0=\$80C! \ ADC12_B Interrupt Flag Register 0
-ADC12IFGR1=\$80E! \ ADC12_B Interrupt Flag Register 1
-ADC12IFGR2=\$810! \ ADC12_B Interrupt Flag Register 2
-ADC12IER0=\$812! \ ADC12_B Interrupt Enable Register 0
-ADC12IER1=\$814! \ ADC12_B Interrupt Enable Register 1
-ADC12IER2=\$816! \ ADC12_B Interrupt Enable Register 2
-ADC12IV=\$818! \ ADC12_B Interrupt Vector
-ADC12MCTL0=\$820! \ ADC12_B Memory Control 0
-ADC12MCTL1=\$822! \ ADC12_B Memory Control 1
-ADC12MCTL2=\$824! \ ADC12_B Memory Control 2
-ADC12MCTL3=\$826! \ ADC12_B Memory Control 3
-ADC12MCTL4=\$828! \ ADC12_B Memory Control 4
-ADC12MCTL5=\$82A! \ ADC12_B Memory Control 5
-ADC12MCTL6=\$82C! \ ADC12_B Memory Control 6
-ADC12MCTL7=\$82E! \ ADC12_B Memory Control 7
-ADC12MCTL8=\$830! \ ADC12_B Memory Control 8
-ADC12MCTL9=\$832! \ ADC12_B Memory Control 9
-ADC12MCTL10=\$834! \ ADC12_B Memory Control 10
-ADC12MCTL11=\$836! \ ADC12_B Memory Control 11
-ADC12MCTL12=\$838! \ ADC12_B Memory Control 12
-ADC12MCTL13=\$83A! \ ADC12_B Memory Control 13
-ADC12MCTL14=\$83C! \ ADC12_B Memory Control 14
-ADC12MCTL15=\$83E! \ ADC12_B Memory Control 15
-ADC12MCTL16=\$840! \ ADC12_B Memory Control 16
-ADC12MCTL17=\$842! \ ADC12_B Memory Control 17
-ADC12MCTL18=\$844! \ ADC12_B Memory Control 18
-ADC12MCTL19=\$846! \ ADC12_B Memory Control 19
-ADC12MCTL20=\$848! \ ADC12_B Memory Control 20
-ADC12MCTL21=\$84A! \ ADC12_B Memory Control 21
-ADC12MCTL22=\$84C! \ ADC12_B Memory Control 22
-ADC12MCTL23=\$84E! \ ADC12_B Memory Control 23
-ADC12MCTL24=\$850! \ ADC12_B Memory Control 24
-ADC12MCTL25=\$852! \ ADC12_B Memory Control 25
-ADC12MCTL26=\$854! \ ADC12_B Memory Control 26
-ADC12MCTL27=\$856! \ ADC12_B Memory Control 27
-ADC12MCTL28=\$858! \ ADC12_B Memory Control 28
-ADC12MCTL29=\$85A! \ ADC12_B Memory Control 29
-ADC12MCTL30=\$85C! \ ADC12_B Memory Control 30
-ADC12MCTL31=\$85E! \ ADC12_B Memory Control 31
-ADC12MEM0=\$860! \ ADC12_B Memory 0
-ADC12MEM1=\$862! \ ADC12_B Memory 1
-ADC12MEM2=\$864! \ ADC12_B Memory 2
-ADC12MEM3=\$866! \ ADC12_B Memory 3
-ADC12MEM4=\$868! \ ADC12_B Memory 4
-ADC12MEM5=\$86A! \ ADC12_B Memory 5
-ADC12MEM6=\$86C! \ ADC12_B Memory 6
-ADC12MEM7=\$86E! \ ADC12_B Memory 7
-ADC12MEM8=\$870! \ ADC12_B Memory 8
-ADC12MEM9=\$872! \ ADC12_B Memory 9
-ADC12MEM10=\$874! \ ADC12_B Memory 10
-ADC12MEM11=\$876! \ ADC12_B Memory 11
-ADC12MEM12=\$878! \ ADC12_B Memory 12
-ADC12MEM13=\$87A! \ ADC12_B Memory 13
-ADC12MEM14=\$87C! \ ADC12_B Memory 14
-ADC12MEM15=\$87E! \ ADC12_B Memory 15
-ADC12MEM16=\$880! \ ADC12_B Memory 16
-ADC12MEM17=\$882! \ ADC12_B Memory 17
-ADC12MEM18=\$884! \ ADC12_B Memory 18
-ADC12MEM19=\$886! \ ADC12_B Memory 19
-ADC12MEM20=\$888! \ ADC12_B Memory 20
-ADC12MEM21=\$88A! \ ADC12_B Memory 21
-ADC12MEM22=\$88C! \ ADC12_B Memory 22
-ADC12MEM23=\$88E! \ ADC12_B Memory 23
-ADC12MEM24=\$890! \ ADC12_B Memory 24
-ADC12MEM25=\$892! \ ADC12_B Memory 25
-ADC12MEM26=\$894! \ ADC12_B Memory 26
-ADC12MEM27=\$896! \ ADC12_B Memory 27
-ADC12MEM28=\$898! \ ADC12_B Memory 28
-ADC12MEM29=\$89A! \ ADC12_B Memory 29
-ADC12MEM30=\$89C! \ ADC12_B Memory 30
-ADC12MEM31=\$89E! \ ADC12_B Memory 31
+ADC12CTL0=\$800! \ ADC12_B Control 0
+ADC12CTL1=\$802! \ ADC12_B Control 1
+ADC12CTL2=\$804! \ ADC12_B Control 2
+ADC12CTL3=\$806! \ ADC12_B Control 3
+ADC12LO=\$808! \ ADC12_B Window Comparator Low Threshold Register
+ADC12HI=\$80A! \ ADC12_B Window Comparator High Threshold Register
+ADC12IFGR0=\$80C! \ ADC12_B Interrupt Flag Register 0
+ADC12IFGR1=\$80E! \ ADC12_B Interrupt Flag Register 1
+ADC12IFGR2=\$810! \ ADC12_B Interrupt Flag Register 2
+ADC12IER0=\$812! \ ADC12_B Interrupt Enable Register 0
+ADC12IER1=\$814! \ ADC12_B Interrupt Enable Register 1
+ADC12IER2=\$816! \ ADC12_B Interrupt Enable Register 2
+ADC12IV=\$818! \ ADC12_B Interrupt Vector
+ADC12MCTL0=\$820! \ ADC12_B Memory Control 0
+ADC12MCTL1=\$822! \ ADC12_B Memory Control 1
+ADC12MCTL2=\$824! \ ADC12_B Memory Control 2
+ADC12MCTL3=\$826! \ ADC12_B Memory Control 3
+ADC12MCTL4=\$828! \ ADC12_B Memory Control 4
+ADC12MCTL5=\$82A! \ ADC12_B Memory Control 5
+ADC12MCTL6=\$82C! \ ADC12_B Memory Control 6
+ADC12MCTL7=\$82E! \ ADC12_B Memory Control 7
+ADC12MCTL8=\$830! \ ADC12_B Memory Control 8
+ADC12MCTL9=\$832! \ ADC12_B Memory Control 9
+ADC12MCTL10=\$834! \ ADC12_B Memory Control 10
+ADC12MCTL11=\$836! \ ADC12_B Memory Control 11
+ADC12MCTL12=\$838! \ ADC12_B Memory Control 12
+ADC12MCTL13=\$83A! \ ADC12_B Memory Control 13
+ADC12MCTL14=\$83C! \ ADC12_B Memory Control 14
+ADC12MCTL15=\$83E! \ ADC12_B Memory Control 15
+ADC12MCTL16=\$840! \ ADC12_B Memory Control 16
+ADC12MCTL17=\$842! \ ADC12_B Memory Control 17
+ADC12MCTL18=\$844! \ ADC12_B Memory Control 18
+ADC12MCTL19=\$846! \ ADC12_B Memory Control 19
+ADC12MCTL20=\$848! \ ADC12_B Memory Control 20
+ADC12MCTL21=\$84A! \ ADC12_B Memory Control 21
+ADC12MCTL22=\$84C! \ ADC12_B Memory Control 22
+ADC12MCTL23=\$84E! \ ADC12_B Memory Control 23
+ADC12MCTL24=\$850! \ ADC12_B Memory Control 24
+ADC12MCTL25=\$852! \ ADC12_B Memory Control 25
+ADC12MCTL26=\$854! \ ADC12_B Memory Control 26
+ADC12MCTL27=\$856! \ ADC12_B Memory Control 27
+ADC12MCTL28=\$858! \ ADC12_B Memory Control 28
+ADC12MCTL29=\$85A! \ ADC12_B Memory Control 29
+ADC12MCTL30=\$85C! \ ADC12_B Memory Control 30
+ADC12MCTL31=\$85E! \ ADC12_B Memory Control 31
+ADC12MEM0=\$860! \ ADC12_B Memory 0
+ADC12MEM1=\$862! \ ADC12_B Memory 1
+ADC12MEM2=\$864! \ ADC12_B Memory 2
+ADC12MEM3=\$866! \ ADC12_B Memory 3
+ADC12MEM4=\$868! \ ADC12_B Memory 4
+ADC12MEM5=\$86A! \ ADC12_B Memory 5
+ADC12MEM6=\$86C! \ ADC12_B Memory 6
+ADC12MEM7=\$86E! \ ADC12_B Memory 7
+ADC12MEM8=\$870! \ ADC12_B Memory 8
+ADC12MEM9=\$872! \ ADC12_B Memory 9
+ADC12MEM10=\$874! \ ADC12_B Memory 10
+ADC12MEM11=\$876! \ ADC12_B Memory 11
+ADC12MEM12=\$878! \ ADC12_B Memory 12
+ADC12MEM13=\$87A! \ ADC12_B Memory 13
+ADC12MEM14=\$87C! \ ADC12_B Memory 14
+ADC12MEM15=\$87E! \ ADC12_B Memory 15
+ADC12MEM16=\$880! \ ADC12_B Memory 16
+ADC12MEM17=\$882! \ ADC12_B Memory 17
+ADC12MEM18=\$884! \ ADC12_B Memory 18
+ADC12MEM19=\$886! \ ADC12_B Memory 19
+ADC12MEM20=\$888! \ ADC12_B Memory 20
+ADC12MEM21=\$88A! \ ADC12_B Memory 21
+ADC12MEM22=\$88C! \ ADC12_B Memory 22
+ADC12MEM23=\$88E! \ ADC12_B Memory 23
+ADC12MEM24=\$890! \ ADC12_B Memory 24
+ADC12MEM25=\$892! \ ADC12_B Memory 25
+ADC12MEM26=\$894! \ ADC12_B Memory 26
+ADC12MEM27=\$896! \ ADC12_B Memory 27
+ADC12MEM28=\$898! \ ADC12_B Memory 28
+ADC12MEM29=\$89A! \ ADC12_B Memory 29
+ADC12MEM30=\$89C! \ ADC12_B Memory 30
+ADC12MEM31=\$89E! \ ADC12_B Memory 31
ADCON=\$10!
ADCSTART=\$03!
CDIFG=1!
CDIIFG=2!
-CDCTL0=\$8C0! \ Comparator_E control register 0
-CDCTL1=\$8C2! \ Comparator_E control register 1
-CDCTL2=\$8C4! \ Comparator_E control register 2
-CDCTL3=\$8C6! \ Comparator_E control register 3
-CDINT=\$8CC! \ Comparator_E interrupt register
-CDIV=\$8CE! \ Comparator_E interrupt vector word
-
-
-AESACTL0=\$9C0! \ AES accelerator control register 0
-AESASTAT=\$9C4! \ AES accelerator status register
-AESAKEY=\$9C6! \ AES accelerator key register
-AESADIN=\$9C8! \ AES accelerator data in register
-AESADOUT=\$9CA! \ AES accelerator data out register
-AESAXDIN=\$9CC! \ AES accelerator XORed data in register
-AESAXIN =\$9CE! \ AES accelerator XORed data in register (no trigger)
+CDCTL0=\$8C0! \ Comparator_E control register 0
+CDCTL1=\$8C2! \ Comparator_E control register 1
+CDCTL2=\$8C4! \ Comparator_E control register 2
+CDCTL3=\$8C6! \ Comparator_E control register 3
+CDINT=\$8CC! \ Comparator_E interrupt register
+CDIV=\$8CE! \ Comparator_E interrupt vector word
+
+
+AESACTL0=\$9C0! \ AES accelerator control register 0
+AESASTAT=\$9C4! \ AES accelerator status register
+AESAKEY=\$9C6! \ AES accelerator key register
+AESADIN=\$9C8! \ AES accelerator data in register
+AESADOUT=\$9CA! \ AES accelerator data out register
+AESAXDIN=\$9CC! \ AES accelerator XORed data in register
+AESAXIN =\$9CE! \ AES accelerator XORed data in register (no trigger)
BSL_SIG1 .equ 0FF84h ;
BSL_SIG2 .equ 0FF86h ;
JTAG_PASSWORD .equ 0FF86h ; up to 0FFC5h : 256 bits
-I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
+I2CSLA0 .equ 0FFA2h ; UCBxI2COA0 default value address
I2CSLA1 .equ 0FFA4h ; UCBxI2COA1 default value address
I2CSLA2 .equ 0FFA6h ; UCBxI2COA2 default value address
I2CSLA3 .equ 0FFA8h ; UCBxI2COA3 default value address
P1IES .equ PA_SFR + 18h ; Port 1 Interrupt Edge Select
P1IE .equ PA_SFR + 1Ah ; Port 1 Interrupt Enable
P1IFG .equ PA_SFR + 1Ch ; Port 1 Interrupt FlaG
-P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
+P1IV .equ PA_SFR + 0Eh ; Port 1 Interrupt Vector word
P2IN .equ PA_SFR + 01h ; Port 2 INput
P2OUT .equ PA_SFR + 03h ; Port 2 OUTput
P2IES .equ PA_SFR + 19h ; Port 2 Interrupt Edge Select
P2IE .equ PA_SFR + 1Bh ; Port 2 Interrupt Enable
P2IFG .equ PA_SFR + 1Dh ; Port 2 Interrupt FlaG
-P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
+P2IV .equ PA_SFR + 1Eh ; Port 2 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT3/4
P3IES .equ PB_SFR + 18h ; Port 3 Interrupt Edge Select
P3IE .equ PB_SFR + 1Ah ; Port 3 Interrupt Enable
P3IFG .equ PB_SFR + 1Ch ; Port 3 Interrupt Flag
-P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
+P3IV .equ PB_SFR + 0Eh ; Port 3 Interrupt Vector word
P4IN .equ PB_SFR + 01h ; Port 4 Input */
P4OUT .equ PB_SFR + 03h ; Port 4 Output
P4IES .equ PB_SFR + 19h ; Port 4 Interrupt Edge Select
P4IE .equ PB_SFR + 1Bh ; Port 4 Interrupt Enable
P4IFG .equ PB_SFR + 1Dh ; Port 4 Interrupt Flag
-P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
+P4IV .equ PB_SFR + 1Eh ; Port 4 Interrupt Vector word
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : PORT5/6
RTCPS .set RTC_C_SFR + 0Ch ; = RT1PS:RT0PS
RTCIV .set RTC_C_SFR + 0Eh
RTCSEC .set RTC_C_SFR + 10h
-RTCCNT1 .set RTC_C_SFR + 10h
+RTCCNT1 .set RTC_C_SFR + 10h
RTCMIN .set RTC_C_SFR + 11h
RTCCNT2 .set RTC_C_SFR + 11h
RTCHOUR .set RTC_C_SFR + 12h
MPY32CTL0 .equ MPY_SFR + 2Ch ; MPY32 control register 0
-MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
-MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
-MPUSEGB2 .equ MPU_SFR + 04h ; MPU Segmentation Border 2
-MPUSEGB1 .equ MPU_SFR + 06h ; MPU Segmentation Border 1
-MPUSAM .equ MPU_SFR + 08h ; MPU access management
-MPUIPC0 .equ MPU_SFR + 0Ah ; MPU IP control 0
-MPUIPSEGB2 .equ MPU_SFR + 0Ch ; MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1 .equ MPU_SFR + 0Eh ; MPU IP Encapsulation Segment Border 1
+MPUCTL0 .equ MPU_SFR + 00h ; MPU control 0
+MPUCTL1 .equ MPU_SFR + 02h ; MPU control 1
+MPUSEGB2 .equ MPU_SFR + 04h ; MPU Segmentation Border 2
+MPUSEGB1 .equ MPU_SFR + 06h ; MPU Segmentation Border 1
+MPUSAM .equ MPU_SFR + 08h ; MPU access management
+MPUIPC0 .equ MPU_SFR + 0Ah ; MPU IP control 0
+MPUIPSEGB2 .equ MPU_SFR + 0Ch ; MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1 .equ MPU_SFR + 0Eh ; MPU IP Encapsulation Segment Border 1
; ----------------------------------------------------------------------
; eUSCI_A0
TERM_RXBUF .equ eUSCI_B0_SFR + 0Ch ; USCI_B0 Receive Buffer 8
TERM_TXBUF .equ eUSCI_B0_SFR + 0Eh ; USCI_B0 Transmit Buffer 8
TERM_I2COA0 .equ eUSCI_B0_SFR + 14h ; USCI_B0 I2C Own Address 0
-TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
+TERM_ADDRX .equ eUSCI_B0_SFR + 1Ch ; USCI_B0 Received Address Register
TERM_I2CSA .equ eUSCI_B0_SFR + 20h ; USCI_B0 I2C Slave Address
TERM_IE .equ eUSCI_B0_SFR + 2Ah ; USCI_B0 Interrupt Enable
TERM_IFG .equ eUSCI_B0_SFR + 2Ch ; USCI_B0 Interrupt Flags Register
I2CSLAVEADR=\$1802! I2C_SLAVE address
I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ----------------------------------------------
! FastForth RAM memory map (>= 1k):
! ----------------------------------------------
-LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
-LSATCK=\$1C00! \ leave stack, grow up
-PSTACK=\$1C80! \ parameter stack, grow down
-RSTACK=\$1CE0! \ Return stack, grow down
-
-PAD_I2CADR=\$1CE0! \ RX I2C address
-PAD_I2CCNT=\$1CE2! \ count max
-PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$1D38! \ TX I2C address
-TIB_I2CCNT=\$1D3A! \ count of bytes
-TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$1D90! \ base address for HOLDS
-HOLD_BASE=\$1DB2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
+LEAVEPTR=\$1C00! Leave-stack pointer, init by QUIT
+LSATCK=\$1C00! leave stack, grow up
+PSTACK=\$1C80! parameter stack, grow down
+RSTACK=\$1CE0! Return stack, grow down
+!
+PAD_I2CADR=\$1CE0! RX I2C address
+PAD_I2CCNT=\$1CE2! count max
+PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CCNT=\$1D3A! count of bytes
+TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$1D90! base address for HOLDS
+HOLD_BASE=\$1DB2! BASE HOLD area, grow down
+!
HP=\$1DB2! HOLD ptr
-CAPS=\$1DB4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$1DB6!
-LAST_THREAD=\$1DB8!
-LAST_CFA=\$1DBA!
-LAST_PSP=\$1DBC!
-
-STATEADR=\$1DBE! Interpreter state
-
-SOURCE_LEN=\$1DC0! len of input stream
-SOURCE_ORG=\$1DC2! adr of input stream
-TOIN=\$1DC4! >IN
-DP=\$1DC6! dictionary ptr
-
-LASTVOC=\$1DC8! keep VOC-LINK
-CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DDA! CURRENT dictionnary ptr
-
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
-LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$1DB4!
+LAST_THREAD=\$1DB6!
+LAST_CFA=\$1DB8!
+LAST_PSP=\$1DBA!
+!
+STATEADR=\$1DBC! Interpreter state
+BASEADR=\$1DBE! base
+CAPS=\$1DC0! CAPS ON/OFF
+!
+SOURCE_LEN=\$1DC2! len of input stream
+SOURCE_ORG=\$1DC4! adr of input stream
+TOIN=\$1DC6! >IN
+DP=\$1DC8! dictionary ptr
+!
+LASTVOC=\$1DCA! keep VOC-LINK
+CURRENT=\$1DCC! CURRENT dictionnary ptr
+CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
!1DE0! 28 RAM bytes free
! ---------------------------------------
SLEEP=\$4400! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$440A! CODE compiled by LITERAL
-XSQUOTE=\$4414! CODE compiled by S" and S_
-HEREXEC=\$4428! CODE HERE and BEGIN execute address
-QFBRAN=\$4434! CODE compiled by IF UNTIL
-BRAN=\$443A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$443C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$443E! CODE compiled by DO
-XPLOOP=\$444E! CODE compiled by +LOOP
-XLOOP=\$4460! CODE compiled by LOOP
-MUSMOD=\$4466! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$4478! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$4480! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$44AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$44AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$44BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$44CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$44D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$44E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$44EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$441E! CODE compiled by S" and S_
+HEREXEC=\$4432! CODE HERE and BEGIN execute address
+MUSMOD=\$443E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$4450! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$4458! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$4482! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$4484! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$4494! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$44A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$44AC! CODE compiled by IF UNTIL
+BRAN=\$44B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$44B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$44B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$44C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$44F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$452A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$4536! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$44D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$4508! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$4512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$4594! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$459C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$45C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$45C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$45B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$458E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$45BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$45BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
+I2C_WARM=\$4580! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR6989
! ----------------------------------------------
MAIN_LEN=\$1FC00! 127 k FRAM
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
! You can check the addresses below by comparing their values in DTCforthMSP430FRxxxx.lst
! those addresses are usable with the symbolic assembler
! ----------------------------------------------
-! FastForth INFO, system addresses (in EPROM)
+! FastForth INFO addresses
! ----------------------------------------------
FREQ_KHZ=\$1800! FREQUENCY (in kHz)
TERMBRW_RST=\$1802! TERMBRW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X see WIPE
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-!
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+!
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
-TLV_ORG=\$1A00! ; Device Descriptor Info (Tag-Lenght-Value)
-TLV_LEN=\$0100! ;
+TLV_ORG=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
+TLV_LEN=\$0100!
DEVICEID=\$1A04!
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ----------------------------------------------
! FastForth RAM memory map (>= 1k):
! ----------------------------------------------
-LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
-LSATCK=\$1C00! \ leave stack, grow up
-PSTACK=\$1C80! \ parameter stack, grow down
-RSTACK=\$1CE0! \ Return stack, grow down
-
-PAD_I2CADR=\$1CE0! \ RX I2C address
-PAD_I2CCNT=\$1CE2! \ count max
-PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$1D38! \ TX I2C address
-TIB_I2CCNT=\$1D3A! \ count of bytes
-TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$1D90! \ base address for HOLDS
-HOLD_BASE=\$1DB2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
-HP=\$1DB2! \ HOLD ptr
-CAPS=\$1DB4! \ CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$1DB6!
-LAST_THREAD=\$1DB8!
-LAST_CFA=\$1DBA!
-LAST_PSP=\$1DBC!
-
-STATEADR=\$1DBE! \ Interpreter state
-
-SOURCE_LEN=\$1DC0! \ len of input stream
-SOURCE_ORG=\$1DC2! \ adr of input stream
-TOIN=\$1DC4! \ >IN
-DP=\$1DC6! \ dictionary ptr
-
-LASTVOC=\$1DC8! \ keep VOC-LINK
-CONTEXT=\$1DCA! \ CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DDA! \ CURRENT dictionnary ptr
-
-BASEADR=\$1DDC! \ numeric base, must be defined before first reset !
-LINE=\$1DDE! \ line in interpretation, activated with NOECHO, desactivated with ECHO
+LEAVEPTR=\$1C00! Leave-stack pointer, init by QUIT
+LSATCK=\$1C00! leave stack, grow up
+PSTACK=\$1C80! parameter stack, grow down
+RSTACK=\$1CE0! Return stack, grow down
+!
+PAD_I2CADR=\$1CE0! RX I2C address
+PAD_I2CCNT=\$1CE2! count max
+PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CCNT=\$1D3A! count of bytes
+TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$1D90! base address for HOLDS
+HOLD_BASE=\$1DB2! BASE HOLD area, grow down
+!
+HP=\$1DB2! HOLD ptr
+LAST_NFA=\$1DB4!
+LAST_THREAD=\$1DB6!
+LAST_CFA=\$1DB8!
+LAST_PSP=\$1DBA!
+!
+STATEADR=\$1DBC! Interpreter state
+BASEADR=\$1DBE! base
+CAPS=\$1DC0! CAPS ON/OFF
+!
+SOURCE_LEN=\$1DC2! len of input stream
+SOURCE_ORG=\$1DC4! adr of input stream
+TOIN=\$1DC6! >IN
+DP=\$1DC8! dictionary ptr
+!
+LASTVOC=\$1DCA! keep VOC-LINK
+CURRENT=\$1DCC! CURRENT dictionnary ptr
+CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
!1DE0! 28 RAM bytes free
! ---------------------------------------
ClusterH=\$2024! 16 bits wide (FAT16)
NewClusterL=\$2026! 16 bits wide (FAT16)
NewClusterH=\$2028! 16 bits wide (FAT16)
+LastFATsector=\$2026! 16 bits wide (FAT16)
+LastFAToffset=\$2028! 16 bits wide (FAT16)
CurFATsector=\$202A!
! ---------------------------------------
MAIN_ORG=\$4000! Code space start
MAIN_LEN=\$40000! 240 kb FRAM
! ----------------------------------------------
-
SLEEP=\$4000! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$400A! CODE compiled by LITERAL
-XSQUOTE=\$4014! CODE compiled by S" and S_
-HEREXEC=\$4028! CODE HERE and BEGIN execute address
-QFBRAN=\$4034! CODE compiled by IF UNTIL
-BRAN=\$403A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$403C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$403E! CODE compiled by DO
-XPLOOP=\$404E! CODE compiled by +LOOP
-XLOOP=\$4060! CODE compiled by LOOP
-MUSMOD=\$4066! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$4078! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$4080! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$40AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$40AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$40BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$40CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$40D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$40E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$40EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$401E! CODE compiled by S" and S_
+HEREXEC=\$4032! CODE HERE and BEGIN execute address
+MUSMOD=\$403E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$4050! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$4058! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$4082! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$4084! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$4094! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$40A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$40AC! CODE compiled by IF UNTIL
+BRAN=\$40B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$40B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$40B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$40C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$40F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$412A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$4136! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$40D0! asm CODE common part of SYS and QABORT, starts FORTH engine
+QABORT=\$4108! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$4112! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+!-------------------------------------------------------------------------------
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$4194! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$419C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$41C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$41C8! ASM CODE, called by ACCEPT before RX char LF.
+UART_INIT_TERM=\$4154! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$417E! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$4184! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+UART_RXON=\$4186! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$41B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$418E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$41BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$41BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$4144! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
+I2C_CTRL_CH=\$4146! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$4156! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$4156! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$4158! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$4180! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR5994
! ----------------------------------------------
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line, and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0, enable JTAG/SBW
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
-RSTIV_MEM=\$1808! SYSRSTIV memory, set to -1 to do Deep RESET
-RST_DP=\$180A! RST value for DP
-RST_VOC=\$180C! RST value for VOClink
-VERSION=\$180E!
-THREADS=\$1810! THREADS
-KERNEL_ADDON=\$1812!
-
-WIPE_INI_=\$1814! MOV #WIPE_INI,X
-WIPE_COLD=\$1814! WIPE value for PFA_COLD
-WIPE_INI_FORTH=\$1816! WIPE value for PFA_INI_FORTH
-WIPE_SLEEP=\$1818! WIPE value for PFA_SLEEP
-WIPE_WARM=\$181A! WIPE value for PFA_WARM
-WIPE_TERM_INT=\$181C! WIPE value for TERMINAL vector
-WIPE_DP=\$182E! WIPE value for RST_DP
-WIPE_VOC=\$1820! WIPE value for RST_VOC
-
-INI_FORTH_INI=\$1822! MOV #INI_FORTH_INI,X \ >BODY instruction of INI_FORTH subroutine
-INIT_ACCEPT=\$1822! WIPE value for PFAACCEPT
-INIT_CR=\$1824! WIPE value for PFACR
-INIT_EMIT=\$1826! FORTH value for PFAEMIT
-INIT_KEY=\$1828! WIPE value for PFAKEY
-INIT_CIB=\$182A! WIPE value for CIB_ADR
-HALF_FORTH_INI=\$182C! to preserve the state of DEFERed words, used by user INI_SOFT_APP as:
-! ADD #4,0(RSP) \ skip INI_FORTH >BODY instruction "MOV #INI_FORTH_INI,X"
-! MOV #HALF_FORTH_INI,X \ replace it by "MOV #HALF_FORTH_INI,X"
-! MOV @RSP+,PC \ then RET
-INIT_DOCOL=\$182C! FORTH value for rDOCOL (R4)
-INIT_DODOES=\$182E! FORTH value for rDODOES (R5)
-INIT_DOCON=\$1830! FORTH value for rDOCON (R6)
-INIT_DOVAR=\$1832! FORTH value for rDOVAR (R7)
-INIT_CAPS=\$1834! FORTH value for CAPS
-INIT_BASE=\$1836! FORTH value for BASE
-! free EPROM
-
+USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
+VERSION=\$180A!
+THREADS=\$180C! THREADS
+KERNEL_ADDON=\$180E! BIT15=FLOORED DIVISION
+! BIT14=LF_XTAL
+! BIT13=UART CTS
+! BIT12=UART RTS
+! BIT11=UART XON/XOFF
+! BIT10=UART half duplex
+! BIT9=I2C_TERMINAL
+! BIT8=Q15.16 input
+! BIT7=DOUBLE input
+! BIT6=assembler 20 bits
+! BIT5=assembler 16 bits
+! BIT4=assembler 16 bits with 20 bits addr
+! BIT3=vocabulary set
+! BIT2=
+! BIT1=
+! BIT0=
+!
+DEEP_ORG=\$1810! MOV #DEEP_ORG,X
+DEEP_TERM_VEC=\$1810! to DEEP_INIT TERMINAL vector
+DEEP_COLD=\$1812! to DEEP_INIT COLD_APP
+DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
+DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
+DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+!
+PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
+INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
+INIT_EMIT=\$1824! to INIT PFA_EMIT
+INIT_KEY=\$1826! to INIT PFA_KEY
+INIT_CIB=\$1828! to INIT CIB_ORG
+FORTH_ORG=\$182A! MOV #FORTH_ORG,X \to preserve the state of DEFERed words
+INIT_RSP=\$182A! to INIT RSP
+INIT_DOCOL=\$182C! to INIT rDOCOL (R4) to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
+INIT_DODOES=\$182E! to INIT rDODOES (R5)
+INIT_DOCON=\$1830! to INIT rDOCON (R6)
+INIT_DOVAR=\$1832! to INIT rDOVAR (R7)
+INIT_CAPS=\$1834! to INIT CAPS
+INIT_BASE=\$1836! to INIT BASE
+INIT_LEAVE=\$1838! to INIT LEAVEPTR
+!
+RST_ORG=\$183A!
+RST_LEN=\$10!
+COLD_APP=\$183A! COLD_APP
+SOFT_APP=\$183C! SOFT_APP
+HARD_APP=\$183E! HARD_APP
+SLEEP_APP=\$1840! SLEEP_APP
+RST_DP=\$1842! RST_RET value for (RAM) DDP
+RST_LASTVOC=\$1844! RST_RET value for (RAM) LASTVOC
+RST_CURRENT=\$1846! RST_RET value for (RAM) CURRENT
+RST_CONTEXT=\$1848! RST_RET value for (RAM) CONTEXT (8 CELLS)
+!
+! $185A = free EPROM
+!
! ============================================
! FRAM TLV
! ============================================
PSTACK_SIZE=\#48! words
RSTACK_SIZE=\#48! words
PAD_LEN=\#84! bytes
-TIB_LEN=\#84! bytes
+CIB_LEN=\#84! bytes
HOLD_SIZE=\#34! bytes
! ----------------------------------------------
! FastForth RAM memory map (>= 1k):
! ----------------------------------------------
-LEAVEPTR=\$1C00! \ Leave-stack pointer, init by QUIT
-LSATCK=\$1C00! \ leave stack, grow up
-PSTACK=\$1C80! \ parameter stack, grow down
-RSTACK=\$1CE0! \ Return stack, grow down
-
-PAD_I2CADR=\$1CE0! \ RX I2C address
-PAD_I2CCNT=\$1CE2! \ count max
-PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-
-TIB_I2CADR=\$1D38! \ TX I2C address
-TIB_I2CCNT=\$1D3A! \ count of bytes
-TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
-
-HOLDS_ORG=\$1D90! \ base address for HOLDS
-HOLD_BASE=\$1DB2! \ BASE HOLD area, grow down
-
-! ----------------------
-! NOT SAVED VARIABLES
-! ----------------------
-
+LEAVEPTR=\$1C00! Leave-stack pointer, init by QUIT
+LSATCK=\$1C00! leave stack, grow up
+PSTACK=\$1C80! parameter stack, grow down
+RSTACK=\$1CE0! Return stack, grow down
+!
+PAD_I2CADR=\$1CE0! RX I2C address
+PAD_I2CCNT=\$1CE2! count max
+PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
+!
+TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CCNT=\$1D3A! count of bytes
+TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
+!
+HOLDS_ORG=\$1D90! base address for HOLDS
+HOLD_BASE=\$1DB2! BASE HOLD area, grow down
+!
HP=\$1DB2! HOLD ptr
-CAPS=\$1DB4! CAPS ON/OFF flag, must be set to -1 before first reset !
-LAST_NFA=\$1DB6!
-LAST_THREAD=\$1DB8!
-LAST_CFA=\$1DBA!
-LAST_PSP=\$1DBC!
-
-STATEADR=\$1DBE! Interpreter state
-
-SOURCE_LEN=\$1DC0! len of input stream
-SOURCE_ORG=\$1DC2! adr of input stream
-TOIN=\$1DC4! >IN
-DP=\$1DC6! dictionary ptr
-
-LASTVOC=\$1DC8! keep VOC-LINK
-CONTEXT=\$1DCA! CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DDA! CURRENT dictionnary ptr
-
-BASEADR=\$1DDC! numeric base, must be defined before first reset !
-LINE=\$1DDE! line in interpretation, activated with NOECHO, desactivated with ECHO
+LAST_NFA=\$1DB4!
+LAST_THREAD=\$1DB6!
+LAST_CFA=\$1DB8!
+LAST_PSP=\$1DBA!
+!
+STATEADR=\$1DBC! Interpreter state
+BASEADR=\$1DBE! base
+CAPS=\$1DC0! CAPS ON/OFF
+!
+SOURCE_LEN=\$1DC2! len of input stream
+SOURCE_ORG=\$1DC4! adr of input stream
+TOIN=\$1DC6! >IN
+DP=\$1DC8! dictionary ptr
+!
+LASTVOC=\$1DCA! keep VOC-LINK
+CURRENT=\$1DCC! CURRENT dictionnary ptr
+CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
+!
! ---------------------------------------
-!1DE0! 28 RAM bytes free
+!1DE0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2038!
SLEEP=\$4400! CODE_WITHOUT_RETURN, CPU shutdown
LIT=\$440A! CODE compiled by LITERAL
-XSQUOTE=\$4414! CODE compiled by S" and S_
-HEREXEC=\$4428! CODE HERE and BEGIN execute address
-QFBRAN=\$4434! CODE compiled by IF UNTIL
-BRAN=\$443A! CODE compiled by ELSE REPEAT AGAIN
-NEXT_ADR=\$443C! CODE NEXT instruction (MOV @IP+,PC)
-XDO=\$443E! CODE compiled by DO
-XPLOOP=\$444E! CODE compiled by +LOOP
-XLOOP=\$4460! CODE compiled by LOOP
-MUSMOD=\$4466! ASM CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
-MDIV1DIV2=\$4478! ASM CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
-MDIV1=\$4480! ASM CODE input for 48/16 unsigned division, see DOUBLE M*/
-RET_ADR=\$44AA! ASM CODE of INI_FORTH_PFA and MARKER+8 definitions,
-SETIB=\$44AC! CODE Set Input Buffer with org & len values, reset >IN pointer
-REFILL=\$44BC! CODE accept one line from input and leave org len of input buffer
-CIB_ADR=\$44CA! [CIB_ADR] = TIB_ORG by default; may be redirected to SDIB_ORG
-XDODOES=\$44D4! to restore rDODOES: MOV #XDODOES,rDODOES
-XDOCON=\$44E2! to restore rDOCON: MOV #XDOCON,rDOCON
-XDOVAR=\$44EE! to restore rDOVAR: MOV #XDOVAR,rDOVAR
+XSQUOTE=\$441E! CODE compiled by S" and S_
+HEREXEC=\$4432! CODE HERE and BEGIN execute address
+MUSMOD=\$443E! asm CODE 32/16 unsigned division, used by ?NUMBER, UM/MOD
+MDIV1DIV2=\$4450! asm CODE input for 48/16 unsigned division with DVDhi=0, see DOUBLE M*/
+MDIV1=\$4458! asm CODE input for 48/16 unsigned division, see DOUBLE M*/
+RET_ADR=\$4482! asm CODE of INIT_SOFT_PFA and MARKER+8 definitions,
+SETIB=\$4484! CODE Set Input Buffer with org & len values, reset >IN pointer
+REFILL=\$4494! CODE accept one line from input and leave org len of input buffer
+CIB_ORG=\$44A0! [CIB_ORG] = TIB_ORG by default; may be redirected to SDIB_ORG
+QFBRAN=\$44AC! CODE compiled by IF UNTIL
+BRAN=\$44B2! CODE compiled by ELSE REPEAT AGAIN
+NEXT_ADR=\$44B4! CODE NEXT instruction (MOV @IP+,PC)
+XDODOES=\$44B6! to restore rDODOES: MOV #XDODOES,rDODOES
+XDOCON=\$44C4! to restore rDOCON: MOV #XDOCON,rDOCON
+! to restore rDOVAR: MOV &INIT_DOVAR,rDOVAR
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
-INI_FORTH=\$44F8! asm CODE common part of RST and QABORT, starts FORTH engine
-QABORT=\$452A! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$4536! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+INIT_FORTH=\$44D0! asm CODE common part of RST and QABORT, starts FORTH engine
+QABORT=\$4508! CODE_WITHOUT_RETURN run-time part of ABORT"
+ABORT_TERM=\$4512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
-UART_COLD_TERM=\$4594! ASM CODE, content of COLD+2 by default
-UART_INIT_TERM=\$459C! ASM CODE, content of WARM+2 by default
-UART_RXON=\$45C6! ASM CODE, content of SLEEP+2 by default
-UART_RXOFF=\$45C8! ASM CODE, called by ACCEPT before RX char LF.
+! UART FASTFORTH
!-------------------------------------------------------------------------------
-I2C_COLD_TERM=\$45B8! ASM CODE, content of COLD_PFA by default
-I2C_INIT_TERM=\$458E! ASM CODE, content of WARM_PFA by default
-I2C_RXON=\$45BA! ASM CODE, content of SLEEP_PFA by default
-I2C_CTRL_CH=\$45BC! ASM CODE, used as is: MOV.B #CTRL_CHAR,Y
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
+UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
+!-------------------------------------------------------------------------------
+! I2C FASTFORTH
+!-------------------------------------------------------------------------------
+I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
+I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
+I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
+I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
+I2C_WARM=\$4580! WARM address
!-------------------------------------------------------------------------------
-
+NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
+COLD=SYS\+\$16! COLD address ' SYS 22 +
+ABORT=ALLOT\+\$8! CODE_WITHOUT_RETURN ' ALLOT 8 +
+QUIT=ALLOT\+\$0E! CODE_WITHOUT_RETURN ' ALLOT 14 +
! ----------------------------------------------
! Interrupt Vectors and signatures - MSP430FR6989
! ----------------------------------------------
MAIN_LEN=\$1FC00! 127 k FRAM
-FRAM_FULL=\$FF30! 80 bytes are sufficient considering what can be compiled in one line and WORD use.
+FRAM_FULL=\$FF40! 64 bytes are sufficient considering what can be compiled in one line and WORD use.
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
DMA2SZ=\$53A! \ DMA channel 2 transfer size
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEGB2=\$5A4! \ MPU Segmentation Border2
-MPUSEGB1=\$5A6! \ MPU Segmentation Border1
-MPUSAM=\$5A8! \ MPU access management
-MPUIPC0=\$5AA! \ MPU IP control 0
-MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEGB2=\$5A4! \ MPU Segmentation Border2
+MPUSEGB1=\$5A6! \ MPU Segmentation Border1
+MPUSAM=\$5A8! \ MPU access management
+MPUIPC0=\$5AA! \ MPU IP control 0
+MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
; MSP-EXP430FR2355 LAUNCHPAD <--> OUTPUT WORLD
; ======================================================================
-; +--4k7-< DeepRST switch <-- GND
+; +--4k7-< DeepRST switch <-- GND
; |
; P4.3 - UCA1 TXD J101.6 - <-+-> RX UARTtoUSB bridge
; P4.2 - UCA1 RXD J101.8 - <---- TX UARTtoUSB bridge
; P1.2 - UCB0 SDA J1.10 - <---> SDA I2C Master_Slave
; P1.3 - UCB0 SCL J1.9 - ----> SCL I2C Master_Slave
-
-; P2.2 - J2.18 - <---- TSSOP32236 (IR RC5)
+
+; P2.2 - J2.18 - <---- TSSOP32236 (IR RC5)
; P2.5 - J2.13 - <---- SD_CD (Card Detect)
; P4.4 - J2.12 - ----> SD_CS (Card Select)
; P4.5 - UCB1 CLK J1.7 - ----> SD_CLK
; P4.6 - UCB1 SIMO J2.15 - ----> SD_SDI
; P4.7 - UCB1 SOMI J2.14 - <---- SD_SDO
-
+
; P6.0 - J4.39 - ----> SCL I2C Soft_Master
; P6.1 - J4.38 - <---> SDA I2C Soft_Master
MOV #0FFFEh,&PAOUT ; all pins with pullup resistors else LED1
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high (false) to disable RX TERM during start FORTH
HANDSHAKOUT .equ P2OUT
HANDSHAKIN .equ P2IN
RTS .equ 1 ; P2.0
BIS.B #RTS,&P2DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
CTS .equ 2 ; P2.1
BIC.B #CTS,&P2OUT ; CTS input resistor is pulled down
SW2_IN .equ P2IN
-SW2 .equ 8 ; P2.3 = S2
+SW2 .equ 8 ; P2.3 = S2
SD_CDIN .equ P2IN
CD_SD .equ 20h ; P2.5
MOV #-1,&PBOUT ; pullup resistors for all pins
SW1_IN .equ P4IN
-SW1 .equ 2 ; P4.1 = S1
-
-WIPE_IN .equ P4IN
-IO_WIPE .equ 2 ; P4.1 = S1 = FORTH Deep_RST pin
+SW1 .equ 2 ; P4.1 = S1
.IFDEF UCA1_TERM
; UCA1 RXD P4.2 - J101.8 <---- TX UARTtoUSB bridge
; CS code for MSP430FR2355
-; to measure SMCLK frequency, wires SMCLK on P1.0:
+; to measure SMCLK frequency, wires SMCLK on P1.0:
; BIS.B #1,&P1SEL1
; BIS.B #1,&P1DIR
-; to measure REFO frequency, wires ACLK on P1.1:
+; to measure REFO frequency, wires ACLK on P1.1:
; BIS.B #2,&P1SEL1
; BIS.B #2,&P1DIR
-; =====================================
- .IF FREQUENCY = 1
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
- ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
- MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
- ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
-; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
- ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
-; =====================================
+ .IFDEF LF_XTAL
+; because LOCKLPM5 is ON, XT1 is replaced by REFO automaticaly until WARM clears LOCKLPM5
+; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
+ MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
+ BIS.B #0C0h,&P2SEL1 ; P2.6 as XOUT, P2.7 as XIN
+ .ELSE
+ BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
+; MOV #0100h,&CSCTL4 ; ACLOCK select REFOCLK, MCLK & SMCLK select DCOCLKDIV (default value)
+ .ENDIF
+ BIC.B #-1,&CSCTL1 ; clear DCORSEL (Set 1MHZ DCORSEL), DCOFTRIM=0, ENable MODulation to reduce EMI
+ .IF FREQUENCY = 1 ; nothing else to do
.ELSEIF FREQUENCY = 2
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
- ; fCOCLKDIV = 32768 x (59+1) = 1.966 MHz ; measured : MHz
- MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
- ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
-; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
- ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
-; =====================================
+ BIS.B #2,&CSCTL1 ; Set 2MHZ DCORSEL
.ELSEIF FREQUENCY = 4
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
- ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
- MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
- ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
-; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
- ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
-; =====================================
+ BIS.B #4,&CSCTL1 ; Set 4MHZ DCORSEL
.ELSEIF FREQUENCY = 8
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
- MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
- ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
-; MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
- ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
-; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
- ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
-; =====================================
+ BIS.B #6,&CSCTL1 ; Set 8MHZ DCORSEL
.ELSEIF FREQUENCY = 12
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
- MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
-; MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
-; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
-; =====================================
+ BIS.B #8,&CSCTL1 ; Set 12MHZ DCORSEL
.ELSEIF FREQUENCY = 16
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
- MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
-; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
-; =====================================
+ BIS.B #10,&CSCTL1 ; Set 16MHZ DCORSEL
.ELSEIF FREQUENCY = 20
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00BCh,&CSCTL1 ; Set 20MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #0261h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=261h
- ; fCOCLKDIV = 32768 x 609+1) = 19.988 MHz ; measured : 19.xxxMHz
- MOV #0262h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=262h
- ; fCOCLKDIV = 32768 x 610+1) = 20.021 MHz ; measured : 20.xxxMHz
-; MOV #0263h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=263h
- ; fCOCLKDIV = 32768 x 611+1) = 20.054 MHz ; measured : 20.xxxMHz
-; =====================================
+ BIS.B #12,&CSCTL1 ; Set 20MHZ DCORSEL
.ELSEIF FREQUENCY = 24
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00BEh,&CSCTL1 ; Set 24MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ------------------------------------- ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #02DBh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=2DBh
- ; fCOCLKDIV = 32768 x 731+1) = 23.986 MHz ; measured : 23.xxxMHz
- MOV #02DCh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=2DCh
- ; fCOCLKDIV = 32768 x 732+1) = 24.019 MHz ; measured : 23.xxxMHz
-; MOV #02DDh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=2DDh
- ; fCOCLKDIV = 32768 x 733+1) = 24.051 MHz ; measured : 24.xxxMHz
-; =====================================
+ BIS.B #14,&CSCTL1 ; Set 24MHZ DCORSEL
.ELSEIF
- .error "bad frequency setting, only 0.5,1,2,4,8,12,16,20,24 MHz"
+ .error "bad frequency setting, only 1,2,4,8,12,16,20,24 MHz"
.ENDIF
-
- .IFDEF LF_XTAL
-; because LOCKLPM5 is ON, XT1 is replaced by REFO automaticaly until WARM clears LOCKLPM5
-; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
- MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
- BIS.B #0C0h,&P2SEL1 ; P2.6 as XOUT, P2.7 as XIN
- .ELSE
- BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
-; MOV #0100h,&CSCTL4 ; ACLOCK select REFOCLK, MCLK & SMCLK select DCOCLKDIV (default value)
- .ENDIF
-
+; MOV #INT(FREQUENCY*1000000/32768)-1,&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight lower
+ MOV #INT(FREQUENCY*1000000/32768),&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight upper
MOV #92,X ; 96* 3 ms = 288 ms delay, because FLL lock time = 200 ms
ClockWaitX MOV &FREQ_KHZ,Y ;
ClockWaitY SUB #1,Y ;1
\.f=\.4th for MSP_EXP430FR2355! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
-\\*\n=
-\s\\*\n=\n
+\\*\n=! entire comment lines
+\s\\*\n=\n! comments at end of line
! ======================================================================
! MSP430FR2355 Config
! ======================================================================
! MSP_EXP430FR2355 LAUNCHPAD <--> OUTPUT WORLD
! ======================================================================
!
-! +--4k7-< DeepRST switch <-- GND
+! +--4k7-< DeepRST switch <-- GND
! |
! P4.3 - UCA1 TXD J101.6 - <-+-> RX UARTtoUSB bridge
! P4.2 - UCA1 RXD J101.8 - <---- TX UARTtoUSB bridge
!
! P1.2 - UCB0 SDA J1.10 - <---> SDA I2C Master_Slave
! P1.3 - UCB0 SCL J1.9 - ----> SCL I2C Master_Slave
-!
-! P2.2 - J2.18 - <---- TSSOP32236 (IR RC5)
+!
+! P2.2 - J2.18 - <---- TSSOP32236 (IR RC5)
!
! P2.5 - J2.12 - ----> SD_CS (Card Select)
! P4.4 - J2.13 - <---- SD_CD (Card Detect)
! P4.5 - UCB1 CLK J1.7 - ----> SD_CLK
! P4.7 - UCB1 SOMI J2.14 - <---- SD_SDO
! P4.6 - UCB1 SIMO J2.15 - ----> SD_SDI
-!
+!
! P3.2 - J4.38 - <---> SDA I2C Soft_Master
! P3.3 - J4.39 - ----> SCL I2C Soft_Master
! P6.0 <------------------------> 11 LCD_DB4
! P6.1 <------------------------> 12 LCD_DB5
! P6.2 <------------------------> 13 LCD_DB5
-! P6.3 <------------------------> 14 LCD_DB7
+! P6.3 <------------------------> 14 LCD_DB7
! P4.1 ---> S2 LCD contrast +
! P2.3 ---> S1 LCD contrast -
! ============================================
! FORTH TERMINAL I/O :
! ============================================
-!TERMINAL
+!TERMINAL
BUS_TERM=\$0C! P4.2 = RX, P4.3 = TX
TERM_IN=\$221! P4
LED2=\$40! P6.6 LED2 green
SW1_IN=\$221!
-SW1=2! P4.1 = S1
+SW1=2! P4.1 = S1
WIPE_IN=\$221!
-WIPE=2! P4.1 = S1 = FORTH Deep_RST pin
+WIPE=2! P4.1 = S1 = FORTH Deep_RST pin
SW2_IN=\$201!
SW2=8! P2.3
!IR_RC5
RC5_=RC5_!
-IR_IN=\$201!
-IR_OUT=\$203!
-IR_DIR=\$205!
-IR_REN=\$209!
+IR_IN=\$201!
+IR_OUT=\$203!
+IR_DIR=\$205!
+IR_REN=\$209!
IR_IES=\$219!
IR_IE=\$21B!
IR_IFG=\$21D!
I2CSM_OUT=\$222!
I2CSM_DIR=\$224!
I2CSM_REN=\$226!
+I2CSM_IES=\$238!
+I2CSM_IFG=\$23C!
SM_SDA=4! P3.2
SM_SCL=8! P3.3
-SM_BUS=\$0C!
+SM_BUS=\$0C!
!Software I2C_Multi_Master
I2CSMM_IN=\$220!
I2CSMM_OUT=\$222!
I2CSMM_DIR=\$224!
I2CSMM_REN=\$226!
+I2CSMM_IES=\$238!
+I2CSMM_IFG=\$23C!
SMM_SDA=4! P3.2
SMM_SCL=8! P3.3
-SMM_BUS=\$0C!
+SMM_BUS=\$0C!
!hardware I2C_Multi_Master
I2CMM_IN=\$200!
I2CM_CTLW0=\$540! USCI_B0 Control Word Register 0
I2CM_CTLW1=\$542! USCI_B0 Control Word Register 1
I2CM_BRW=\$546! USCI_B0 Baud Word Rate 0
-I2CM_STATW=\$548! USCI_B0 status word
-I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CM_STATW=\$548! USCI_B0 status word
+I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
I2CM_RXBUF=\$54C! USCI_B0 Receive Buffer 8
I2CM_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
I2CM_I2COA0=\$554! USCI_B0 I2C Own Address 0
-I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
I2CM_I2CSA=\$560! USCI_B0 I2C Slave Address
I2CM_IE=\$56A! USCI_B0 Interrupt Enable
I2CM_IFG=\$56C! USCI_B0 Interrupt Flags Register
I2CS_CTLW0=\$540! USCI_B0 Control Word Register 0
I2CS_CTLW1=\$542! USCI_B0 Control Word Register 1
I2CS_BRW=\$546! USCI_B0 Baud Word Rate 0
-I2CS_STATW=\$548! USCI_B0 status word
-I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CS_STATW=\$548! USCI_B0 status word
+I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
I2CS_RXBUF=\$54C! USCI_B0 Receive Buffer 8
I2CS_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
I2CS_I2COA0=\$554! USCI_B0 I2C Own Address 0
-I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
I2CS_I2CSA=\$560! USCI_B0 I2C Slave Address
I2CS_IE=\$56A! USCI_B0 Interrupt Enable
I2CS_IFG=\$56C! USCI_B0 Interrupt Flags Register
CD_SD=\$10! P4.4 as Card Detect
SD_CDIN=\$221!
-CS_SD=\$20! P2.5 as Card Select
+CS_SD=\$20! P2.5 as Card Select
SD_CSOUT=\$203!
SD_CSDIR=\$205!
; MSP-EXP430FR2433 LAUNCHPAD <--> OUTPUT WORLD
; ======================================================================
-; +--4k7-< DeepRST switch <-- GND
+; +--4k7-< DeepRST switch <-- GND
; |
; P1.4 - UCA0 TXD J101.6 - <-+-> RX UARTtoUSB bridge
; P1.5 - UCA0 RXD J101.8 - <---- TX UARTtoUSB bridge
; P1.2 - UCB0 SDA J1.10 - <---> SDA I2C Master_Slave
; P1.3 - UCB0 SCL J1.9 - ----> SCL I2C Master_Slave
-
-; P2.2 - ACLK J2.18 - <---- TSSOP32236 (IR RC5)
+
+; P2.2 - ACLK J2.18 - <---- TSSOP32236 (IR RC5)
; P2.0 - J2.11 - ----> SD_CS (Card Select)
; P2.1 - J2.12 - <---- SD_CD (Card Detect)
; P2.4 - UCA1 CLK J1.7 - ----> SD_CLK
; P2.5 - UCA1 SOMI J2.14 - <---- SD_SDO
; P2.6 - UCA1 SIMO J2.15 - ----> SD_SDI
-
+
; P3.1 - J2.13 - ----> SCL I2C Soft_Master
; P3.2 - J2.17 - <---> SDA I2C Soft_Master
-
+
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : I/O
; LED2 - P1.1
; P1.4 - TXD TERMINAL + DEEP_RST
; P1.5 - RXD TERMINAL
-; P1.0 - RTS TERMINAL
-; P1.1 - CTS TERMINAL
+; P1.0 - RTS TERMINAL
+; P1.1 - CTS TERMINAL
LED1_OUT .equ P1OUT
LED1_DIR .equ P1DIR
SW1_IN .equ P2IN
SW1 .equ 8 ; P2.3 = S1
-WIPE_IN .equ P2IN
-IO_WIPE .equ 8 ; P2.3 = S1 = FORTH Deep_RST pin
-
MOV #-1,&PAREN ; all inputs with pull up/down resistors
MOV #0FFFCh,&PAOUT ; all pins with pullup resistors else LED1/LED2
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P1DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P1OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
; POWER ON RESET SYS config
; ----------------------------------------------------------------------
-; SYS code
+; SYS code
; BIC #1,&SYSCFG0 ; enable write program in FRAM
MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
; CS code for EXP430FR2433
-; to measure REFO frequency, output ACLK on P2.2:
+; to measure REFO frequency, output ACLK on P2.2:
; BIS.B #4,&P2SEL1
; BIS.B #4,&P2DIR
; result : REFO = 32.69kHz
-; ===================================================================
-; need to adjust FLLN (and DCO) for each device of MSP430fr2xxx family ?
-; (no problem with MSP430FR5xxx families without FLL).
-; ===================================================================
- .IF FREQUENCY = 0.5
-; MOV #058h,&CSCTL0 ; preset DCO = measured value @ 0x180 (88)
-; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
- MOV #1ED1h,&CSCTL0 ; preset MOD=31, DCO = measured value @ 0x180 (209)
- MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
- ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
-; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
- ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
- MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
- ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
-; =====================================
- .ELSEIF FREQUENCY = 1
-
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B1h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
- ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
- MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
- ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
-; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
- ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
-; =====================================
+ .IFDEF LF_XTAL
+; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
+ MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
+ BIS.B #03,&P2SEL0 ; P2.0 as XOUT, P2.1 as XIN
+ .ELSE
+ BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
+; MOV #0200h,&CSCTL4 ; ACLOCK select VLOCLK, MCLK & SMCLK select DCOCLKDIV (default value)
+ .ENDIF
+ BIC.B #-1,&CSCTL1 ; clear DCORSEL (Set 1MHZ DCORSEL), DCOFTRIM=0, ENable MODulation to reduce EMI
+ .IF FREQUENCY = 1 ; nothing else to do
.ELSEIF FREQUENCY = 2
-
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B3h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
- ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
- MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
- ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
-; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
- ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
-; =====================================
+ BIS.B #2,&CSCTL1 ; Set 2MHZ DCORSEL
.ELSEIF FREQUENCY = 4
-
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B5h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
- ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
-
- MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
- ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
-
-; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
- ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
-; =====================================
+ BIS.B #4,&CSCTL1 ; Set 4MHZ DCORSEL
.ELSEIF FREQUENCY = 8
-
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B7h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
- ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
-; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
- ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
- MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
- ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
-
-; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
- ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
-
-; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
-; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
-
-; =====================================
+ BIS.B #6,&CSCTL1 ; Set 8MHZ DCORSEL
.ELSEIF FREQUENCY = 12
-
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B9h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #016Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
- ; fCOCLKDIV = 32768 x 364+1) = 12.960 MHz ; measured : 11.xxxMHz
-; MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
- MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
-; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
-; =====================================
+ BIS.B #8,&CSCTL1 ; Set 12MHZ DCORSEL
.ELSEIF FREQUENCY = 16
-
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00BBh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
- ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
-; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
- MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
-; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
-; =====================================
+ BIS.B #10,&CSCTL1 ; Set 16MHZ DCORSEL
.ELSEIF
- .error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
+ .error "bad frequency setting, only 1,2,4,8,12,16 MHz"
.ENDIF
-
- .IFDEF LF_XTAL
-; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
- MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
- BIS.B #03,&P2SEL0 ; P2.0 as XOUT, P2.1 as XIN
- .ELSE
- BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
- MOV #0200h,&CSCTL4 ; ACLOCK select VLOCLK, MCLK & SMCLK select DCOCLKDIV (default value)
- .ENDIF
-
+; MOV #INT(FREQUENCY*1000000/32768)-1,&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight lower
+ MOV #INT(FREQUENCY*1000000/32768),&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight upper
MOV #128,X ; 128* 3 ms = 384 ms delay, because FLL lock time = 280 ms
ClockWaitX MOV &FREQ_KHZ,Y ;
ClockWaitY SUB #1,Y ;1
\.f=\.4th for MSP_EXP430FR2433! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
! MSP-EXP430FR2433 LAUNCHPAD <--> OUTPUT WORLD
! ======================================================================
!
-! +--4k7-< DeepRST switch <-- GND
+! +--4k7-< DeepRST switch <-- GND
! |
! P1.4 - UCA0 TXD J101.6 - <-+-> RX UARTtoUSB bridge
! P1.5 - UCA0 RXD J101.8 - <---- TX UARTtoUSB bridge
! P2.5 - UCA1 SOMI J2.14 - <---- SD_SDO
! P2.1 - J2.12 - <---- SD_CD (Card Detect)
! P2.0 - J2.11 - ----> SD_CS (Card Select)
-!
+!
! P1.3 - UCB0 SCL J1.9 - ----> SCL I2C Slave
! P1.2 - UCB0 SDA J1.10 - <---> SDA I2C Slave
-!
+!
! P3.1 - J2.13 - ----> SCL I2C SoftMaster
! P3.2 - J2.17 - <---> SDA I2C SoftMaster
-!
-! P2.2 - ACLK J2.18 - <---- TSSOP32236 (IR RC5)
+!
+! P2.2 - ACLK J2.18 - <---- TSSOP32236 (IR RC5)
! ============================================
! FORTH I/O :
! ============================================
-!TERMINAL
+!TERMINAL
BUS_TERM=\$30! ; P1.4 = TX, P1.5 = RX
TERM_IN=\$200!
TERM_VEC=\$FFE4! \ UCA0
WAKE_UP=1! \ RX int
-TERM_CTLW0=\$500! \ eUSCI_A control word 0
-TERM_CTLW1=\$502! \ eUSCI_A control word 1
-TERM_BRW=\$506!
-TERM_BR0=\$506! \ eUSCI_A baud rate 0
-TERM_BR1=\$507! \ eUSCI_A baud rate 1
-TERM_MCTLW=\$508! \ eUSCI_A modulation control
-TERM_STATW=\$50A! \ eUSCI_A status
-TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
-TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
-TERM_ABCTL=\$510! \ eUSCI_A LIN control
-TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
-TERM_IE=\$51A! \ eUSCI_A interrupt enable
-TERM_IFG=\$51C! \ eUSCI_A interrupt flags
-TERM_IV=\$51E! \ eUSCI_A interrupt vector word
+TERM_CTLW0=\$500! \ eUSCI_A control word 0
+TERM_CTLW1=\$502! \ eUSCI_A control word 1
+TERM_BRW=\$506!
+TERM_BR0=\$506! \ eUSCI_A baud rate 0
+TERM_BR1=\$507! \ eUSCI_A baud rate 1
+TERM_MCTLW=\$508! \ eUSCI_A modulation control
+TERM_STATW=\$50A! \ eUSCI_A status
+TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
+TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
+TERM_ABCTL=\$510! \ eUSCI_A LIN control
+TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
+TERM_IE=\$51A! \ eUSCI_A interrupt enable
+TERM_IFG=\$51C! \ eUSCI_A interrupt flags
+TERM_IV=\$51E! \ eUSCI_A interrupt vector word
RTS=1! P1.0
CTS=2! P1.1
LED2=2! P1.1 LED2 green
SW1_IN=\$201!
-SW1=8! P2.3 = S1
+SW1=8! P2.3 = S1
WIPE_IN=\$201!
-IO_WIPE=8! P2.3 = S1 = FORTH Deep_RST pin
+IO_WIPE=8! P2.3 = S1 = FORTH Deep_RST pin
SW2_IN=\$201!
SW2=\$80! P2.7
!IR_RC5
-IR_IN=\$201!
-IR_OUT=\$203!
-IR_DIR=\$205!
-IR_REN=\$209!
+IR_IN=\$201!
+IR_OUT=\$203!
+IR_DIR=\$205!
+IR_REN=\$209!
IR_IES=\$219!
IR_IE=\$21B!
IR_IFG=\$21D!
I2CSM_REN=\$226!
SM_SDA=4! P3.2
SM_SCL=2! P3.1
-SM_BUS=\$06!
+SM_BUS=\$06!
!I2C_Soft_Multi_Master
I2CSMM_IN=\$220!
I2CSMM_REN=\$226!
SMM_SDA=4! P3.2
SMM_SCL=2! P3.1
-SMM_BUS=\$06!
+SMM_BUS=\$06!
!I2C_Multi_Master
I2CMM_IN=\$200!
I2CMM_OUT=\$202!
I2CMM_DIR=\$204!
I2CMM_REN=\$206!
-I2CMM_SEL=\$20A! SEL0
+I2CMM_SEL=\$20A! SEL0
I2CMM_VEC=\$FFE0! UCB0_VEC
MM_SDA=\$04! P1.2
MM_SCL=\$08! P1.3
I2CM_CTLW0=\$540! USCI_B0 Control Word Register 0
I2CM_CTLW1=\$542! USCI_B0 Control Word Register 1
I2CM_BRW=\$546! USCI_B0 Baud Word Rate 0
-I2CM_STATW=\$548! USCI_B0 status word
-I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CM_STATW=\$548! USCI_B0 status word
+I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
I2CM_RXBUF=\$54C! USCI_B0 Receive Buffer 8
I2CM_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
I2CM_I2COA0=\$554! USCI_B0 I2C Own Address 0
-I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
I2CM_I2CSA=\$560! USCI_B0 I2C Slave Address
I2CM_IE=\$56A! USCI_B0 Interrupt Enable
I2CM_IFG=\$56C! USCI_B0 Interrupt Flags Register
I2CS_CTLW0=\$540! USCI_B0 Control Word Register 0
I2CS_CTLW1=\$542! USCI_B0 Control Word Register 1
I2CS_BRW=\$546! USCI_B0 Baud Word Rate 0
-I2CS_STATW=\$548! USCI_B0 status word
-I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CS_STATW=\$548! USCI_B0 status word
+I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
I2CS_RXBUF=\$54C! USCI_B0 Receive Buffer 8
I2CS_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
I2CS_I2COA0=\$554! USCI_B0 I2C Own Address 0
-I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
I2CS_I2CSA=\$560! USCI_B0 I2C Slave Address
I2CS_IE=\$56A! USCI_B0 Interrupt Enable
I2CS_IFG=\$56C! USCI_B0 Interrupt Flags Register
CD_SD=2! ; P2.1 as Card Detect
SD_CDIN=\$201!
-CS_SD=1! ; P2.0 as Card Select
+CS_SD=1! ; P2.0 as Card Select
SD_CSOUT=\$203!
SD_CSDIR=\$205!
; P2 - P8.1 ACLK/A9
; P3 - P1.1 UCA0 RXD
; P4 - P1.0 UCA0 TXD
-; P5 - P2.7
+; P5 - P2.7
; P6 - P8.0 SMCLK/A8
; P7 - P5.1 UCB0 CLK
; P8 - P2.5
; ---------------------------------------------------
; MSP - MSP-EXP430FR4133 LAUNCHPAD <--> OUTPUT WORLD
; ---------------------------------------------------
-; P1.0 - LED1 red
+; P1.0 - LED1 red
; P4.0 - LED2 green
;
; P1.2 - S1
-; P2.6 - S2
-; +-4k7-< DeepRST <-- GND
+; P2.6 - S2
+; +-4k7-< DeepRST <-- GND
; |
; P1.0 - UCA0 TXD J101.8 --+-> RX UARTtoUSB bridge
; P1.1 - UCA0 RXD J101.10 <---- TX UARTtoUSB bridge
; P2.3 - RTS J101.14 ----> CTS UARTtoUSB bridge (if TERMINALCTSRTS option)
; VCC - J101.16 <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
; GND - J101.20 <---> GND (optional supply from UARTtoUSB bridge)
-;
+;
; P2.7 - J1.5 <---- OUT IR_Receiver (1 TSOP32236)
-;
-; P4.1 - LFXI 32768Hz quartz
-; P4.2 - LFXO 32768Hz quartz
+;
+; P4.1 - LFXI 32768Hz quartz
+; P4.2 - LFXO 32768Hz quartz
;
; P5.2 - UCB0 SDA/SIMO J2.6 <---> SDA I2C Slave
; P5.3 - UCB0 SCL/SOMI J2.7 <---- SCL I2C Slave
-;
+;
; P5.1 - UCB0 CLK J1.7 ----> orange SD_CLK
; P5.2 - UCB0 SDA/SIMO J2.6 ----> grey SD_SDI
; P5.3 - UCB0 SCL/SOMI J2.7 <---- purple SD_SDO
; P8.0 - J1.6 <---- violin SD_CD (Card Detect)
; P8.1 - J1.2 ----> brown SD_CS (Card Select)
-;
+;
; P8.2 - Soft I2C_Master J1.9 ----> SDA software I2C Master
; P8.3 - Soft I2C_Master J1.10 <---> SCL software I2C Master
CTS .set 10h ; P2.4 bit position
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P2DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
; P4 configuration :
; P4.0 - LED2 green
-; P4.1 - LFXI 32768Hz quartz
-; P4.2 - LFXO 32768Hz quartz
-
+; P4.1 - LFXI 32768Hz quartz
+; P4.2 - LFXO 32768Hz quartz
+
LED2_OUT .equ P4OUT
LED2_DIR .equ P4IN
LED2 .equ 1 ; P4.0 LED2 green
SD_CSOUT .equ P8OUT
SD_CSDIR .equ P8DIR
CD_SD .equ 1 ; P8.0
-CS_SD .equ 2 ; P8.1
+CS_SD .equ 2 ; P8.1
; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
; ----------------------------------------------------------------------
; POWER ON RESET SYS config
; ----------------------------------------------------------------------
-; SYS code
+; SYS code
; BIC #1,&SYSCFG0 ; enable write program in FRAM
MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
; BIS.B #2,&P8DIR
; result : REFO = ? kHz
-
-; ===================================================================
-; need to adjust FLLN (and DCO) for each device of MSP430fr2xxx family ?
-; (no problem with MSP430FR5xxx families without FLL).
-; ===================================================================
- .IF FREQUENCY = 0.5
-; MOV #058h,&CSCTL0 ; preset DCO = measured value @ 0x180 (88)
-; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
- MOV #1ED1h,&CSCTL0 ; preset MOD=31, DCO = measured value @ 0x180 (209)
- MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
- ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
-; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
- ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
- MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
- ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
-; =====================================
- .ELSEIF FREQUENCY = 1
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B1h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
- ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
- MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
- ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
-; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
- ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
-; =====================================
- .ELSEIF FREQUENCY = 2
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B3h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
- ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
- MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
- ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
-; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
- ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
-; =====================================
- .ELSEIF FREQUENCY = 4
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B5h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
- ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
-
- MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
- ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
-
-; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
- ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
-; =====================================
- .ELSEIF FREQUENCY = 8
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B7h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
- ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
-; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
- ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
- MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
- ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
-; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
- ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
-
-; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
-; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
-
-; =====================================
- .ELSEIF FREQUENCY = 12
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00B9h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #016Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
- ; fCOCLKDIV = 32768 x 364+1) = 12.960 MHz ; measured : 11.xxxMHz
-; MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
- MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
-; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
-; =====================================
- .ELSEIF FREQUENCY = 16
-; MOV #100h,&CSCTL0 ; preset DCO = 256
-; MOV #00BBh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
- MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
- MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
-; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
-; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
- ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
-; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
- ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
- MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
- ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
-; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
- ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
-; =====================================
- .ELSEIF
- .error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
- .ENDIF
-
.IFDEF LF_XTAL
; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
BIS.B #06,&P4SEL0 ; P4.2 as XOUT, P4.1 as XIN
.ELSE
BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
- MOV #0200h,&CSCTL4 ; ACLOCK select VLOCLK, MCLK & SMCLK select DCOCLKDIV (default value)
+; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
+ .ENDIF
+ BIC.B #-1,&CSCTL1 ; clear DCORSEL (Set 1MHZ DCORSEL), DCOFTRIM=0, ENable MODulation to reduce EMI
+ .IF FREQUENCY = 1 ; nothing else to do
+ .ELSEIF FREQUENCY = 2
+ BIS.B #2,&CSCTL1 ; Set 2MHZ DCORSEL
+ .ELSEIF FREQUENCY = 4
+ BIS.B #4,&CSCTL1 ; Set 4MHZ DCORSEL
+ .ELSEIF FREQUENCY = 8
+ BIS.B #6,&CSCTL1 ; Set 8MHZ DCORSEL
+ .ELSEIF FREQUENCY = 12
+ BIS.B #8,&CSCTL1 ; Set 12MHZ DCORSEL
+ .ELSEIF FREQUENCY = 16
+ BIS.B #10,&CSCTL1 ; Set 16MHZ DCORSEL
+ .ELSEIF
+ .error "bad frequency setting, only 1,2,4,8,12,16 MHz"
.ENDIF
+; MOV #INT(FREQUENCY*1000000/32768)-1,&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight lower
+ MOV #INT(FREQUENCY*1000000/32768),&CSCTL2; set FLLD=0 (DCOCLKCDIV=DCO),set FLLN for frequency slight upper
MOV #64,X ; 64* 3 ms = 192 ms delay, because FLL lock time = 120 ms
ClockWaitX MOV &FREQ_KHZ,Y ;
ClockWaitY SUB #1,Y ;1
\.f=\.4th for MSP_EXP430FR4133! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
! P2 - P8.1 ACLK/A9
! P3 - P1.1 UCA0 RXD
! P4 - P1.0 UCA0 TXD
-! P5 - P2.7
+! P5 - P2.7
! P6 - P8.0 SMCLK/A8
! P7 - P5.1 UCB0 CLK
! P8 - P2.5
! MSP - MSP-EXP430FR4133 LAUNCHPAD <--> OUTPUT WORLD
! ---------------------------------------------------
!
-! +-4k7-< DeepRST <-- GND
+! +-4k7-< DeepRST <-- GND
! |
! P1.0 - UCA0 TXD J101.8 --+-> RX UARTtoUSB bridge
! P1.1 - UCA0 RXD J101.10 <---- TX UARTtoUSB bridge
! VCC - J101.16 <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
! GND - J101.20 <---> GND (optional supply from UARTtoUSB bridge)
!
-! P1.0 - STRAP JP1 MUST BE REMOVED (LED red)
+! P1.0 - STRAP JP1 MUST BE REMOVED (LED red)
! =========================
!
! P4.0 - LED green
!
! P1.2 - Switch SW1 <--- LCD contrast + (finger :-)
-! P2.6 - Switch SW2 <--- LCD contrast - (finger ;-)
+! P2.6 - Switch SW2 <--- LCD contrast - (finger ;-)
+!
!
-!
! GND - J2.1 <-------+---0V0----------> 1 LCD_Vss
! VCC - J1.1 >------ | --3V6-----+----> 2 LCD_Vdd
! | |
! P5.1 - J1.7 <------------------------> 12 LCD_DB5
! P5.2 - J2.15 <------------------------> 13 LCD_DB5
! P5.3 - J2.14 <------------------------> 14 LCD_DB7
-!
-!
+!
+!
! P1.7 - J2.19 <---- OUT IR_Receiver (1 TSOP32236)
-!
-! P4.1 - LFXIN 32768Hz quartz
-! P4.2 - LFXOUT 32768Hz quartz
-!
+!
+! P4.1 - LFXIN 32768Hz quartz
+! P4.2 - LFXOUT 32768Hz quartz
+!
! VCC - J1.1 ----> VCC SD_CardAdapter
! GND - J2.1 <---> GND SD_CardAdapter
-! P5.1 - UCB0 CLK J1.7 ----> CLK SD_CardAdapter (SCK)
+! P5.1 - UCB0 CLK J1.7 ----> CLK SD_CardAdapter (SCK)
! P8.1 - J1.2 ----> CS SD_CardAdapter (Card Select)
! P5.2 - UCB0 TXD/SIMO J2.15 ----> SDI SD_CardAdapter (MOSI)
! P5.3 - UCB0 RXD/SOMI J2.14 <---- SDO SD_CardAdapter (MISO)
! P8.0 - J1.6 <---- CD SD_CardAdapter (Card Detect)
!
!
-!
+!
! P8.2 - Soft I2C_Master J1.9 ----> SDA software I2C Master
! P8.3 - Soft I2C_Master J1.10 <---> SCL software I2C Master
! ============================================
! FORTH I/O :
! ============================================
-!TERMINAL
+!TERMINAL
BUS_TERM=3! ; P1.0 = TX, P1.1 = RX
TERM_IN=\$200!
TERM_VEC=\$FFEC! \ UCA0
WAKE_UP=1! \ RX int
-TERM_CTLW0=\$500! \ eUSCI_A control word 0
-TERM_CTLW1=\$502! \ eUSCI_A control word 1
-TERM_BRW=\$506!
-TERM_BR0=\$506! \ eUSCI_A baud rate 0
-TERM_BR1=\$507! \ eUSCI_A baud rate 1
-TERM_MCTLW=\$508! \ eUSCI_A modulation control
-TERM_STATW=\$50A! \ eUSCI_A status
-TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
-TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
-TERM_ABCTL=\$510! \ eUSCI_A LIN control
-TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
-TERM_IE=\$51A! \ eUSCI_A interrupt enable
-TERM_IFG=\$51C! \ eUSCI_A interrupt flags
-TERM_IV=\$51E! \ eUSCI_A interrupt vector word
+TERM_CTLW0=\$500! \ eUSCI_A control word 0
+TERM_CTLW1=\$502! \ eUSCI_A control word 1
+TERM_BRW=\$506!
+TERM_BR0=\$506! \ eUSCI_A baud rate 0
+TERM_BR1=\$507! \ eUSCI_A baud rate 1
+TERM_MCTLW=\$508! \ eUSCI_A modulation control
+TERM_STATW=\$50A! \ eUSCI_A status
+TERM_RXBUF=\$50C! \ eUSCI_A receive buffer
+TERM_TXBUF=\$50E! \ eUSCI_A transmit buffer
+TERM_ABCTL=\$510! \ eUSCI_A LIN control
+TERM_IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+TERM_IRRCTL=\$513! \ eUSCI_A IrDA receive control
+TERM_IE=\$51A! \ eUSCI_A interrupt enable
+TERM_IFG=\$51C! \ eUSCI_A interrupt flags
+TERM_IV=\$51E! \ eUSCI_A interrupt vector word
RTS=8! ; P2.3
CTS=\$10! ; P2.4
!IR_RC5 input
!------------
-IR_IN=\$200!
-IR_OUT=\$202!
-IR_DIR=\$204!
-IR_REN=\$206!
+IR_IN=\$200!
+IR_OUT=\$202!
+IR_DIR=\$204!
+IR_REN=\$206!
IR_IES=\$218!
IR_IE=\$21A!
IR_IFG=\$21C!
I2CM_CTLW0=\$540! USCI_B0 Control Word Register 0
I2CM_CTLW1=\$542! USCI_B0 Control Word Register 1
I2CM_BRW=\$546! USCI_B0 Baud Word Rate 0
-I2CM_STATW=\$548! USCI_B0 status word
-I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CM_STATW=\$548! USCI_B0 status word
+I2CM_TBCNT=\$54A! USCI_B0 byte counter threshold
I2CM_RXBUF=\$54C! USCI_B0 Receive Buffer 8
I2CM_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
I2CM_I2COA0=\$554! USCI_B0 I2C Own Address 0
-I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CM_ADDRX=\$55C! USCI_B0 Received Address Register
I2CM_I2CSA=\$560! USCI_B0 I2C Slave Address
I2CM_IE=\$56A! USCI_B0 Interrupt Enable
I2CM_IFG=\$56C! USCI_B0 Interrupt Flags Register
I2CS_CTLW0=\$540! USCI_B0 Control Word Register 0
I2CS_CTLW1=\$542! USCI_B0 Control Word Register 1
I2CS_BRW=\$546! USCI_B0 Baud Word Rate 0
-I2CS_STATW=\$548! USCI_B0 status word
-I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
+I2CS_STATW=\$548! USCI_B0 status word
+I2CS_TBCNT=\$54A! USCI_B0 byte counter threshold
I2CS_RXBUF=\$54C! USCI_B0 Receive Buffer 8
I2CS_TXBUF=\$54E! USCI_B0 Transmit Buffer 8
I2CS_I2COA0=\$554! USCI_B0 I2C Own Address 0
-I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
+I2CS_ADDRX=\$55C! USCI_B0 Received Address Register
I2CS_I2CSA=\$560! USCI_B0 I2C Slave Address
I2CS_IE=\$56A! USCI_B0 Interrupt Enable
I2CS_IFG=\$56C! USCI_B0 Interrupt Flags Register
-CD_SD=2! ; P8.1 as Card Detect
+CD_SD=2! ; P8.1 as Card Detect
SD_CDIN=\$261!
CS_SD=1! ; P8.0 as Card Select
; -*- coding: utf-8 -*-
; ----------------------------------------------------------------------
-; MSP_EXP430FR739.asm
+; MSP_EXP430FR739.asm
; ----------------------------------------------------------------------
; ----------------------------------------------------------------------
; MSP430FR57xx BOOTSTRAP
; Buffer size for Core Commands : 260 bytes
; Notable Information
; 1. TX and RX pins are noted in the device data sheet
-; 2. A mass erase command or incorrect password triggers a BSL reset.
+; 2. A mass erase command or incorrect password triggers a BSL reset.
; This resets the BSL state to the default settings (9600 baud, password locked)
; Known Bugs
; 1. The baud rate of 115k cannot be ensured across all clock, voltage, and temperature variations
;
; P4.0 - Switch S1 <--- LCD contrast + (finger :-)
; P4.1 - Switch S2 <--- LCD contrast - (finger :-)
-;
+;
; GND <-------+---0V0----------> 1 LCD_Vss
; VCC >------ | --3V6-----+----> 2 LCD_Vdd
; | |
; P1.2 - SV1.3 <------------------------> 13 LCD_DB5
; P1.3 - SV1.8 <------------------------> 14 LCD_DB7
;
-; PJ.4 - LFXI 32768Hz quartz
-; PJ.5 - LFXO 32768Hz quartz
-; PJ.6 - HFXI
-; PJ.7 - HFXO
-; +--4k7-< DeepRST <-- GND
+; PJ.4 - LFXI 32768Hz quartz
+; PJ.5 - LFXO 32768Hz quartz
+; PJ.6 - HFXI
+; PJ.7 - HFXO
+; +--4k7-< DeepRST <-- GND
; |
; P2.0 - UCA0 TXD SV2.11 --+-> RX UARTtoUSB bridge
; P2.1 - UCA0 RXD SV2.8 <---- TX UARTtoUSB bridge
; VCC - <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
; GND - <---> GND (optional supply from UARTtoUSB bridge)
-;
+;
; ---------------------------------------------------------------------------
; SD_CardAdapter not compatible with HARDWARE flow control for FORTH TERMINAL
; ---------------------------------------------------------------------------
-; VCC - RF.2
-; VSS - RF.1
+; VCC - RF.2
+; VSS - RF.1
; P2.2 - RF.16 <---- CD SD_CardAdapter (Card Detect) / RTS
; P2.3 - RF.10 ----> CS SD_CardAdapter (Card Select) / CTS
-; P2.4 - UCA1 CLK RF.14 ----> CLK SD_CardAdapter (SCK)
+; P2.4 - UCA1 CLK RF.14 ----> CLK SD_CardAdapter (SCK)
; P2.5 - UCA1 TXD/SIMO RF.7 ----> SDI SD_CardAdapter (MOSI)
; P2.6 - UCA1 RXD/SOMI RF.5 <---- SDO SD_CardAdapter (MISO)
;
SD_CSOUT .equ P2OUT
SD_CSDIR .equ P2DIR
CD_SD .equ 4 ; P2.2
-CS_SD .equ 8 ; P2.3
+CS_SD .equ 8 ; P2.3
HANDSHAKOUT .equ P2OUT
HANDSHAKIN .equ P2IN
RTS .equ 4 ; P2.2
CTS .equ 8 ; P2.3
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
; P2.7 is used to power the accelerometer and NTC voltage divider ==> output low = power OFF
MOV #07FEFh,&PAOUT ; all input pins with pull up resistor else P2.7 and P1.4
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P2DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P2OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
SW1_IN .equ P4IN
SW1 .equ 1 ; P4.0 = S1
-WIPE_IN .equ P4IN
-IO_WIPE .equ 1 ; P4.0 = S1 = FORTH Deep_RST pin
-
SW2_IN .equ P4IN
SW2 .equ 2 ; P4.1 = S2
\.f=\.4th for MSP_EXP430FR5739! to change file type
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
!
! P4.0 - Switch S1 <--- LCD contrast + (finger :-)
! P4.1 - Switch S2 <--- LCD contrast - (finger :-)
-!
+!
! GND <-------+---0V0----------> 1 LCD_Vss
! VCC >------ | --3V6-----+----> 2 LCD_Vdd
! | |
! P1.2 - SV1.3 <------------------------> 13 LCD_DB5
! P1.3 - SV1.8 <------------------------> 14 LCD_DB7
!
-! PJ.4 - LFXI 32768Hz quartz
-! PJ.5 - LFXO 32768Hz quartz
-! PJ.6 - HFXI
-! PJ.7 - HFXO
-! +--4k7-< DeepRST <-- GND
+! PJ.4 - LFXI 32768Hz quartz
+! PJ.5 - LFXO 32768Hz quartz
+! PJ.6 - HFXI
+! PJ.7 - HFXO
+! +--4k7-< DeepRST <-- GND
! |
! P2.0 - UCA0 TXD SV2.11 --+-> RX UARTtoUSB bridge
! P2.1 - UCA0 RXD SV2.8 <---- TX UARTtoUSB bridge
! VCC - <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
! GND - <---> GND (optional supply from UARTtoUSB bridge)
-!
-! VCC - RF.2
-! VSS - RF.1
+!
+! VCC - RF.2
+! VSS - RF.1
! P2.2 - RF.16 <---- CD SD_CardAdapter (Card Detect)
! P2.3 - RF.10 ----> CS SD_CardAdapter (Card Select)
-! P2.4 - UCA1 CLK RF.14 ----> CLK SD_CardAdapter (SCK)
+! P2.4 - UCA1 CLK RF.14 ----> CLK SD_CardAdapter (SCK)
! P2.5 - UCA1 TXD/SIMO RF.7 ----> SDI SD_CardAdapter (MOSI)
! P2.6 - UCA1 RXD/SOMI RF.5 <---- SDO SD_CardAdapter (MISO)
!
! ============================================
! FORTH I/O :
! ============================================
-!TERMINAL
+!TERMINAL
BUS_TERM=3! \ P2.0 = TX, P2.1 = RX
TERM_IN=\$201!
WDT_TIM_EX0=\$360! TA0EX0
WDT_TIM_0_VEC=\$FFEA! TA0_0_VEC
-IR_IN=\$201!
-IR_OUT=\$203!
-IR_DIR=\$205!
-IR_REN=\$207!
+IR_IN=\$201!
+IR_OUT=\$203!
+IR_DIR=\$205!
+IR_REN=\$207!
IR_IES=\$219!
IR_IE=\$21B!
IR_IFG=\$21D!
I2CM_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CM_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CM_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CM_STATW=\$648! USCI_B0 status word
-I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CM_STATW=\$648! USCI_B0 status word
+I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CM_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CM_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CM_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
I2CM_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CM_IE=\$66A! USCI_B0 Interrupt Enable
I2CM_IFG=\$66C! USCI_B0 Interrupt Flags Register
I2CS_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CS_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CS_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CS_STATW=\$648! USCI_B0 status word
-I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CS_STATW=\$648! USCI_B0 status word
+I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CS_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CS_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CS_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
I2CS_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CS_IE=\$66A! USCI_B0 Interrupt Enable
I2CS_IFG=\$66C! USCI_B0 Interrupt Flags Register
CD_SD=4! P2.2 as Card Detect
SD_CDIN=\$201!
-CS_SD=8! P2.3 as Card Select
+CS_SD=8! P2.3 as Card Select
SD_CSOUT=\$203!
SD_CSDIR=\$205!
; P4.5 - Switch S1 <--- LCD contrast + (finger :-)
; P1.1 - Switch S2 <--- LCD contrast - (finger ;-)
-
+
; GND - J1.2 <-------+---0V0----------> 1 LCD_Vss
; VCC - J1.3 >------ | --3V6-----+----> 2 LCD_Vdd
; | |
; PJ.1 - J3.3 <---------red------------> 12 LCD_DB5
; PJ.2 - J3.5 <---------orange---------> 13 LCD_DB5
; PJ.3 - J3.7 <---------yellow---------> 14 LCD_DB7
-
-; +--4k7-< DeepRST <-- GND
+
+; +--4k7-< DeepRST <-- GND
; |
; P2.0 - UCA0 TXD J13.8 <-+->white--> RX UARTtoUSB bridge
; P2.1 - UCA0 RXD J13.10 <----green--- TX UARTtoUSB bridge
; P4.1 - RTS J13.14 -----blue---> CTS UARTtoUSB bridge (optional hardware control flow)
; VCC - J13.16 <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
; GND - J13.20 <---> GND (optional supply from UARTtoUSB bridge)
-
+
; VCC - J11.1 ----> VCC SD_CardAdapter
; GND - J12.3 <---> GND SD_CardAdapter
-; P2.4 - UCA1 CLK J4.6 ----> CLK SD_CardAdapter (SCK)
+; P2.4 - UCA1 CLK J4.6 ----> CLK SD_CardAdapter (SCK)
; P2.5 - UCA1 TXD/SIMO J4.4 ----> SDI SD_CardAdapter (MOSI)
; P2.6 - UCA1 RXD/SOMI J4.3 <---- SDO SD_CardAdapter (MISO)
; P4.3 - J4.5 ----> CS SD_CardAdapter (Card Select)
; P4.2 - J4.2 <---- CD SD_CardAdapter (Card Detect)
-;
+;
; P4.0 use is not compatible with core option "TERMINAL5WIRES"
; P4.0 - J3.10 <---- OUT IR_Receiver (1 TSOP32236) ───┐
; └┌───┐
; P1.6 - UCB0 SDA/SIMO J5.15 <---> SDA I2C MASTER/SLAVE
; P3.0 - J5.7 <---- free
-; PJ.4 - LFXI 32768Hz quartz
-; PJ.5 - LFXO 32768Hz quartz
-; PJ.6 - HFXI
-; PJ.7 - HFXO
-
+; PJ.4 - LFXI 32768Hz quartz
+; PJ.5 - LFXO 32768Hz quartz
+; PJ.6 - HFXI
+; PJ.7 - HFXO
+
; P2.3 - NC
; P2.7 - NC
; P3.1 - NC
.ENDIF
.IFDEF UCA0_TERM
-; P2.0 UCA0-TXD --> USB2UART RXD
-; P2.1 UCA0-RXD <-- USB2UART TXD
+; P2.0 UCA0-TXD --> USB2UART RXD
+; P2.1 UCA0-RXD <-- USB2UART TXD
TERM_IN .equ P2IN
TERM_SEL .equ P2SEL1
TERM_REN .equ P2REN
SD_CSOUT .equ P4OUT
SD_CSDIR .equ P4DIR
CD_SD .equ 4 ; P4.2 as Card Detect
-CS_SD .equ 8 ; P4.3 as Chip Select
+CS_SD .equ 8 ; P4.3 as Chip Select
SW1_IN .equ P4IN
SW1 .equ 20h ; P4.5 = S1
-WIPE_IN .equ P4IN
-IO_WIPE .equ 20h ; P4.5 = S1 = FORTH Deep_RST pin
-
LED1_OUT .equ P4OUT
LED1_DIR .equ P4DIR
LED1 .equ 40h ; P4.6 LED1 red
MOV #0BFFFh,&PBOUT ; all pins as input with pull up resistor else P4.6
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P4DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P4OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
\.f=\.4th for MSP_EXP430FR5969! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
! P2 - P4.2
! P3 - P2.6 UCA1 RX/SOMI
! P4 - P2.5 UCA1 TX/SIMO
-! P5 - P4.3
+! P5 - P4.3
! P6 - P2.4 UCA1 CLK
! P7 - P2.2 TB0.2 UCB0CLK
! P8 - P3.4
! P9 P10 RX0 P2.1 (no strap)
! P11 P12 CTS P4.0 (no strap)
! P13 P14 RTS P4.1 (no strap)
-! P15<->P16 V+ <-> VCC
+! P15<->P16 V+ <-> VCC
! P17 P18 5V (no strap)
! P19---P20 GND-----VSS
! J13 jumpers : device <-> eZ-FET
! -------------------------------
-! P2 P1 NC NC
+! P2 P1 NC NC
! P4<->P3 TEST <-> TEST
-! P6<->P5 RST <-> RST
+! P6<->P5 RST <-> RST
! P8 P7 P2.0 TX0 (no jumper)
! P10 P9 P2.1 RX0 (no jumper)
! P12 P11 P4.0 CTS (no jumper)
! P14 P13 P4.1 RTS (no jumper)
-! P16<->P15 VCC <-> V+
+! P16<->P15 VCC <-> V+
! P18 P17 5V 5V (no jumper)
-! P20---P19 VSS-----GND
+! P20---P19 VSS-----GND
! P4.6 - J6 - LED1 red
! P1.0 - LED2 green
!
! P4.5 - Switch S1 <--- LCD contrast + (finger :-)
! P1.1 - Switch S2 <--- LCD contrast - (finger ;-)
-!
+!
! GND - J1.2 <-------+---0V0----------> 1 LCD_Vss
! VCC - J1.3 >------ | --3V6-----+----> 2 LCD_Vdd
! | |
! PJ.1 - J3.3 <------------------------> 12 LCD_DB5
! PJ.2 - J3.5 <------------------------> 13 LCD_DB6
! PJ.3 - J3.7 <------------------------> 14 LCD_DB7
-!
-! +--4k7-< DeepRST <-- GND
+!
+! +--4k7-< DeepRST <-- GND
! |
! P2.0 - UCA0 TXD J13.8 <-+-> RX UARTtoUSB bridge
! P2.1 - UCA0 RXD J13.10 <---- TX UARTtoUSB bridge
! P4.1 - RTS J13.14 ----> CTS UARTtoUSB bridge (optional hardware control flow)
! VCC - J13.16 <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
! GND - J13.20 <---> GND (optional supply from UARTtoUSB bridge)
-!
+!
! VCC - J11.1 ----> VCC SD_CardAdapter
! GND - J12.3 <---> GND SD_CardAdapter
-! P2.4 - UCA1 CLK J4.6 ----> CLK SD_CardAdapter (SCK)
+! P2.4 - UCA1 CLK J4.6 ----> CLK SD_CardAdapter (SCK)
! P4.3 - J4.5 ----> CS SD_CardAdapter (Card Select)
! P2.5 - UCA1 TXD/SIMO J4.4 ----> SDI SD_CardAdapter (MOSI)
! P2.6 - UCA1 RXD/SOMI J4.3 <---- SDO SD_CardAdapter (MISO)
! P1.6 - UCB0 SDA/SIMO J5.15 <---> SDA I2C MASTER/SLAVE
! P3.0 - J5.7 <---- free
!
-! PJ.4 - LFXI 32768Hz quartz
-! PJ.5 - LFXO 32768Hz quartz
-! PJ.6 - HFXI
-! PJ.7 - HFXO
-!
+! PJ.4 - LFXI 32768Hz quartz
+! PJ.5 - LFXO 32768Hz quartz
+! PJ.6 - HFXI
+! PJ.7 - HFXO
+!
! P2.3 - NC
! P2.7 - NC
! P3.1 - NC
! ============================================
! FORTH I/O :
! ============================================
-!TERMINAL
+!TERMINAL
BUS_TERM=3! \ P2.0 = TX, P2.1 = RX
TERM_IN=\$201!
TERM_VEC=\$FFF0! \ UCA0
WAKE_UP=1! \ RX int
-TERM_CTLW0=\$5C0! \ eUSCI_A control word 0
-TERM_CTLW1=\$5C2! \ eUSCI_A control word 1
-TERM_BRW=\$5C6!
-TERM_BR0=\$5C6! \ eUSCI_A baud rate 0
-TERM_BR1=\$5C7! \ eUSCI_A baud rate 1
-TERM_MCTLW=\$5C8! \ eUSCI_A modulation control
-TERM_STAT=\$5CA! \ eUSCI_A status
-TERM_RXBUF=\$5CC! \ eUSCI_A receive buffer
-TERM_TXBUF=\$5CE! \ eUSCI_A transmit buffer
-TERM_ABCTL=\$5D0! \ eUSCI_A LIN control
-TERM_IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
-TERM_IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
-TERM_IE=\$5DA! \ eUSCI_A interrupt enable
-TERM_IFG=\$5DC! \ eUSCI_A interrupt flags
-TERM_IV=\$5DE! \ eUSCI_A interrupt vector word
+TERM_CTLW0=\$5C0! \ eUSCI_A control word 0
+TERM_CTLW1=\$5C2! \ eUSCI_A control word 1
+TERM_BRW=\$5C6!
+TERM_BR0=\$5C6! \ eUSCI_A baud rate 0
+TERM_BR1=\$5C7! \ eUSCI_A baud rate 1
+TERM_MCTLW=\$5C8! \ eUSCI_A modulation control
+TERM_STAT=\$5CA! \ eUSCI_A status
+TERM_RXBUF=\$5CC! \ eUSCI_A receive buffer
+TERM_TXBUF=\$5CE! \ eUSCI_A transmit buffer
+TERM_ABCTL=\$5D0! \ eUSCI_A LIN control
+TERM_IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
+TERM_IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
+TERM_IE=\$5DA! \ eUSCI_A interrupt enable
+TERM_IFG=\$5DC! \ eUSCI_A interrupt flags
+TERM_IV=\$5DE! \ eUSCI_A interrupt vector word
RTS=2! ; P4.1
CTS=1! ; P4.0
CD_SD=4! P4.2 as Card Detect
SD_CDIN=\$221!
-CS_SD=8! P4.3 as Card Select
+CS_SD=8! P4.3 as Card Select
SD_CSOUT=\$223!
SD_CSDIR=\$225!
! init state : input with pullup resistor
SW1_IN=\$221
-SW1=\$20! P4.5 = S1
+SW1=\$20! P4.5 = S1
WIPE_IN=\$221
-IO_WIPE=\$20! P4.5 = S1 = FORTH Deep_RST pin
+IO_WIPE=\$20! P4.5 = S1 = FORTH Deep_RST pin
! init state : input with pullup resistor
SW2_IN=\$200
I2CM_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CM_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CM_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CM_STATW=\$648! USCI_B0 status word
-I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CM_STATW=\$648! USCI_B0 status word
+I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CM_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CM_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CM_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
I2CM_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CM_IE=\$66A! USCI_B0 Interrupt Enable
I2CM_IFG=\$66C! USCI_B0 Interrupt Flags Register
I2CS_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CS_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CS_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CS_STATW=\$648! USCI_B0 status word
-I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CS_STATW=\$648! USCI_B0 status word
+I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CS_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CS_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CS_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
I2CS_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CS_IE=\$66A! USCI_B0 Interrupt Enable
I2CS_IFG=\$66C! USCI_B0 Interrupt Flags Register
; P2 - P9.2 ESICH2
; P3 - P4.3 UCA0 RXD
; P4 - P4.2 UCA0 TXD
-; P5 - P3.2 UCB1 SCL
+; P5 - P3.2 UCB1 SCL
; P6 - P9.3 ESICH3
; P7 - P1.4 UCB0 CLK
; P8 - P2.0 TB0.6
; P1.1 - Switch S1 <--- LCD contrast + (finger :-)
; P1.2 - Switch S2 <--- LCD contrast - (finger ;-)
-
+
; GND <-------+---0V0----------> 1 LCD_Vss
; VCC >------ | --3V3-----+----> 2 LCD_Vdd
; | |
; P9.5/A13/C13 -------------------------> 5 LCD_R/W
; P9.6/A14/C14 -------------------------> 6 LCD_EN
-; +--4k7-< DeepRST <-- GND
+; +--4k7-< DeepRST <-- GND
; |
; P3.4 - UCA1 TXD <-+-> RX UARTtoUSB bridge
; P3.5 - UCA1 RXD <---- TX UARTtoUSB bridge
; VCC - ----> VCC SD_CardAdapter
; GND - <---> GND SD_CardAdapter
-; P2.2 - UCA0 CLK ----> CLK SD_CardAdapter (SCK)
+; P2.2 - UCA0 CLK ----> CLK SD_CardAdapter (SCK)
; P2.6 - ----> CS SD_CardAdapter (Card Select)
; P2.0 - UCA0 TXD/SIMO ----> SDI SD_CardAdapter (MOSI)
; P2.1 - UCA0 RXD/SOMI <---- SDO SD_CardAdapter (MISO)
; P3.2 -UCB1 SCL/SOMI ----> free
; P3.3 - TA1.1 <---> free
-; PJ.4 - LFXI 32768Hz quartz
-; PJ.5 - LFXO 32768Hz quartz
-; PJ.6 - HFXI
-; PJ.7 - HFXO
-
+; PJ.4 - LFXI 32768Hz quartz
+; PJ.5 - LFXO 32768Hz quartz
+; PJ.6 - HFXI
+; PJ.7 - HFXO
+
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : I/O
SD_CDIN .equ P2IN
SD_CSOUT .equ P2OUT
SD_CSDIR .equ P2DIR
-CS_SD .equ 40h ; P2.6 Chip Select
+CS_SD .equ 40h ; P2.6 Chip Select
CD_SD .equ 80h ; P2.7 Card Detect
; PORTx default wanted state : pins as input with pullup resistor
MOV #-1,&PBOUT ; all pins as input with resistor
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P3DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P3OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
; PORT10 usage
-
+
; PORTx default wanted state : pins as input with pullup resistor
MOV.B #-1,&P9REN ; all pins with pull resistors else P9.7
\.f=\.4th for MSP_EXP430FR5972! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
!
! P1.1 - Switch S1 <--- LCD contrast + (finger :-)
! P1.2 - Switch S2 <--- LCD contrast - (finger ;-)
-!
+!
! GND <-------+---0V0----------> 1 LCD_Vss
! VCC >------ | --3V3-----+----> 2 LCD_Vdd
! | |
! P9.5/A13/C13 -------------------------> 5 LCD_R/W
! P9.6/A14/C14 -------------------------> 6 LCD_EN
!
-! +--4k7-< DeepRST <-- GND
+! +--4k7-< DeepRST <-- GND
! |
! P3.4 - UCA1 TXD <-+-> RX UARTtoUSB bridge
! P3.5 - UCA1 RXD <---- TX UARTtoUSB bridge
!
! VCC - ----> VCC SD_CardAdapter
! GND - <---> GND SD_CardAdapter
-! P2.2 - UCA0 CLK ----> CLK SD_CardAdapter (SCK)
+! P2.2 - UCA0 CLK ----> CLK SD_CardAdapter (SCK)
! P2.6 - ----> CS SD_CardAdapter (Card Select)
! P2.0 - UCA0 TXD/SIMO ----> SDI SD_CardAdapter (MOSI)
! P2.1 - UCA0 RXD/SOMI <---- SDO SD_CardAdapter (MISO)
! P3.2 -UCB1 SCL/SOMI ----> free
! P3.3 - TA1.1 <---> free
!
-! PJ.4 - LFXI 32768Hz quartz
-! PJ.5 - LFXO 32768Hz quartz
-! PJ.6 - HFXI
-! PJ.7 - HFXO
-
+! PJ.4 - LFXI 32768Hz quartz
+! PJ.5 - LFXO 32768Hz quartz
+! PJ.6 - HFXI
+! PJ.7 - HFXO
+
! ============================================
! FORTH I/O :
CD_SD=\$80! ; P2.7 as Card Detect
SD_CDIN=\$201!
-CS_SD=\$40! ; P2.6 as Card Select
+CS_SD=\$40! ; P2.6 as Card Select
SD_CSOUT=\$203!
SD_CSDIR=\$205!
WDT_TIM_EX0=\$360! TA0EX0
WDT_TIM_0_Vec=\$FFE8! TA0_0_Vec
-IR_IN=\$221!
-IR_OUT=\$223!
-IR_DIR=\$225!
-IR_REN=\$227!
+IR_IN=\$221!
+IR_OUT=\$223!
+IR_DIR=\$225!
+IR_REN=\$227!
IR_IES=\$239!
IR_IE=\$23B!
IR_IFG=\$23D!
I2CSM_REN=\$206!
SM_SDA=8! P1.3
SM_SCL=\$20! P1.5
-SM_BUS=\$28!
+SM_BUS=\$28!
I2CSMM_IN=\$200!
I2CSMM_OUT=\$202!
I2CSMM_REN=\$206!
SMM_SDA=8! P1.3
SMM_SCL=\$20! P1.5
-SMM_BUS=\$28!
+SMM_BUS=\$28!
RC5_TIM_CTL=\$380! TA1CTL
RC5_TIM_R=\$390! TA1R
RC5_TIM_EX0=\$3A0! TA1EX0
I2CMM_Vec=\$FFEC! UCBO_Vec
MM_SDA=\$40! P1.6
MM_SCL=\$80! P1.7
-MM_BUS=\$C0!
+MM_BUS=\$C0!
I2CM_IN=\$200!
I2CM_OUT=\$202!
I2CM_Vec=\$FFEC! UCBO_Vec
M_SDA=\$40! P1.6
M_SCL=\$80! P1.7
-M_BUS=\$C0!
+M_BUS=\$C0!
I2CS_IN=\$200!
I2CS_OUT=\$202!
I2CM_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CM_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CM_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CM_STATW=\$648! USCI_B0 status word
-I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CM_STATW=\$648! USCI_B0 status word
+I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CM_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CM_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CM_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
I2CM_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CM_IE=\$66A! USCI_B0 Interrupt Enable
I2CM_IFG=\$66C! USCI_B0 Interrupt Flags Register
I2CS_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CS_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CS_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CS_STATW=\$648! USCI_B0 status word
-I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CS_STATW=\$648! USCI_B0 status word
+I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CS_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CS_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CS_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
I2CS_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CS_IE=\$66A! USCI_B0 Interrupt Enable
I2CS_IFG=\$66C! USCI_B0 Interrupt Flags Register
; 3V3 10-9
; P2.1 UCA0_RX 8-7 <---- TX UARTtoUSB bridge
; +--4k7-< DeepRST <-- GND
-; |
+; |
; P2.0 UCA0_TX 6-5 <-+-> RX UARTtoUSB bridge
; /RST 4-3
; TEST 2-1
;
; P5.6 - sw1 <--- LCD contrast + (finger :-)
; P5.5 - sw2 <--- LCD contrast - (finger ;-)
-; RST - sw3
+; RST - sw3
;
; P1.0 - led1 red
; P1.1 - led2 green
;
; J1 - left ext.
; 3v3
-; P1.2/TA1.1/TA0CLK/COUT/A2/C2 <--- OUT IR_Receiver (1 TSOP32236)
+; P1.2/TA1.1/TA0CLK/COUT/A2/C2 <--- OUT IR_Receiver (1 TSOP32236)
; P6.1/UCA3RXD/UCA3SOMI -------------------------> 4 LCD_RS
; P6.0/UCA3TXD/UCA3SIMO -------------------------> 5 LCD_R/W
; P6.2/UCA3CLK -------------------------> 6 LCD_EN0
-; P1.3/TA1.2/UCB0STE/A3/C3
+; P1.3/TA1.2/UCB0STE/A3/C3
; P5.2/UCB1CLK/TA4CLK
; P6.3/UCA3STE
; P7.1/UCB2SOMI/UCB2SCL ---> SCL I2C MASTER/SLAVE
; J3 - left int.
; 5V
; GND
-; P3.0/A12/C12 <------------------------> 11 LCD_DB4
+; P3.0/A12/C12 <------------------------> 11 LCD_DB4
; P3.1/A13/C13 <------------------------> 12 LCD_DB5
; P3.2/A14/C14 <------------------------> 13 LCD_DB6
; P3.3/A15/C15 <------------------------> 14 LCD_DB7
; P1.4/TB0.1/UCA0STE/A4/C4
-; P1.5/TB0.2/UCA0CLK/A5/C5 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
+; P1.5/TB0.2/UCA0CLK/A5/C5 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
; P4.7
; P8.0
;
; J4 - right int.
-; P3.7/TB0.6
-; P3.6/TB0.5
-; P3.5/TB0.4/COUT
+; P3.7/TB0.6
+; P3.6/TB0.5
+; P3.5/TB0.4/COUT
; P3.4/TB0.3/SMCLK
; P7.3/UCB2STE/TA4.1
-; P2.6/TB0.1/UCA1RXD/UCA1SOMI
-; P2.5/TB0.0/UCA1TXD/UCA1SIMO
+; P2.6/TB0.1/UCA1RXD/UCA1SOMI
+; P2.5/TB0.0/UCA1TXD/UCA1SIMO
; P4.3/A11
; P4.2/A10 RTS ----> CTS UARTtoUSB bridge (optional hardware control flow)
; P4.1/A9 CTS <---- RTS UARTtoUSB bridge (optional hardware control flow)
; -----------------------------------------------
; LCD config
; -----------------------------------------------
-
+
; <-------+---0V0----------> 1 LCD_Vss
; >------ | --3V6-----+----> 2 LCD_Vdd
; | |
.ENDIF
.IFDEF UCA0_TERM ; see device.inc
-; P2.0 UCA0-TXD --> USB2UART RXD
-; P2.1 UCA0-RXD <-- USB2UART TXD
+; P2.0 UCA0-TXD --> USB2UART RXD
+; P2.1 UCA0-RXD <-- USB2UART TXD
TERM_IN .equ P2IN
TERM_SEL .equ P2SEL1
TERM_REN .equ P2REN
; PORT4 FastForth usage
SD_CSOUT .equ P4OUT
SD_CSDIR .equ P4DIR
-CS_SD .equ 1 ; P4.0 Chip Select
+CS_SD .equ 1 ; P4.0 SD_card Chip Select
HANDSHAKIN .equ P4IN
HANDSHAKOUT .equ P4OUT
BIS #-1,&PBOUT
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P4DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P4OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
; P5.5 Switch S2
SW1_IN .set P5IN ; port
SW1 .set 040h ; P5.6 bit position
+
SW2_IN .set P5IN ; port
SW2 .set 020h ; P5.5 bit position
-WIPE_IN .equ P5IN
-IO_WIPE .equ 40h ; P5.6 = S1 = FORTH Deep_RST pin
-
; PORT6 FastForth usage
BUS_TERM .equ 3
.ENDIF
-CD_SD .equ 4 ; P7.2 Card Detect
+CD_SD .equ 4 ; P7.2 SD_Card Card Detect
SD_CDIN .equ P7IN
; PORT8 FastForth usage
\.f=\.4th for MSP_EXP430FR5994! to change file type
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
! 3V3 10-9
! P2.1 UCA0_RX 8-7 <---- TX UARTtoUSB bridge
! +--4k7-< DeepRST <-- GND
-! |
+! |
! P2.0 UCA0_TX 6-5 <-+-> RX UARTtoUSB bridge
! /RST 4-3
! TEST 2-1
! P5.6 - sw1 <--- LCD contrast + (finger :-)
! P5.5 - sw2 <--- LCD contrast - (finger ;-)
-! RST - sw3
+! RST - sw3
! P1.0 - led1 red
! P1.1 - led2 green
! J1 - left ext.
! 3v3
-! P1.2/TA1.1/TA0CLK/COUT/A2/C2 <--- OUT IR_Receiver (1 TSOP32236)
+! P1.2/TA1.1/TA0CLK/COUT/A2/C2 <--- OUT IR_Receiver (1 TSOP32236)
! P6.1/UCA3RXD/UCA3SOMI -------------------------> 4 LCD_RS
! P6.0/UCA3TXD/UCA3SIMO -------------------------> 5 LCD_R/W
! P6.2/UCA3CLK -------------------------> 6 LCD_EN0
-! P1.3/TA1.2/UCB0STE/A3/C3
+! P1.3/TA1.2/UCB0STE/A3/C3
! P5.2/UCB1CLK/TA4CLK
! P6.3/UCA3STE
! P7.1/UCB2SOMI/UCB2SCL ---> SCL I2C MASTER/SLAVE
! J3 - left int.
! 5V
! GND
-! P3.0/A12/C12 <------------------------> 11 LCD_DB4
+! P3.0/A12/C12 <------------------------> 11 LCD_DB4
! P3.1/A13/C13 <------------------------> 12 LCD_DB5
! P3.2/A14/C14 <------------------------> 13 LCD_DB5
! P3.3/A15/C15 <------------------------> 14 LCD_DB7
! P1.4/TB0.1/UCA0STE/A4/C4
-! P1.5/TB0.2/UCA0CLK/A5/C5 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
+! P1.5/TB0.2/UCA0CLK/A5/C5 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
! P4.7
! P8.0
! J4 - right int.
-! P3.7/TB0.6
-! P3.6/TB0.5
-! P3.5/TB0.4/COUT
+! P3.7/TB0.6
+! P3.6/TB0.5
+! P3.5/TB0.4/COUT
! P3.4/TB0.3/SMCLK
! P7.3/UCB2STE/TA4.1
-! P2.6/TB0.1/UCA1RXD/UCA1SOMI
-! P2.5/TB0.0/UCA1TXD/UCA1SIMO
+! P2.6/TB0.1/UCA1RXD/UCA1SOMI
+! P2.5/TB0.0/UCA1TXD/UCA1SIMO
! P4.3/A11
! P4.2/A10 RTS ----> CTS UARTtoUSB bridge (optional hardware control flow)
! P4.1/A9 CTS <---- RTS UARTtoUSB bridge (optional hardware control flow)
TERM_REN=\$207!
TERM_SEL=\$20D! ; SEL1
-TERM_CTLW0=\$5C0! \ eUSCI_A0 control word 0
-TERM_CTLW1=\$5C2! \ eUSCI_A0 control word 1
-TERM_BRW=\$5C6!
-TERM_BR0=\$5C6! \ eUSCI_A0 baud rate 0
-TERM_BR1=\$5C7! \ eUSCI_A0 baud rate 1
-TERM_MCTLW=\$5C8! \ eUSCI_A0 modulation control
-TERM_STATW=\$5CA! \ eUSCI_A0 status
-TERM_RXBUF=\$5CC! \ eUSCI_A0 receive buffer
-TERM_TXBUF=\$5CE! \ eUSCI_A0 transmit buffer
-TERM_ABCTL=\$5D0! \ eUSCI_A0 LIN control
-TERM_IRTCTL=\$5D2! \ eUSCI_A0 IrDA transmit control
-TERM_IRRCTL=\$5D3! \ eUSCI_A0 IrDA receive control
-TERM_IE=\$5DA! \ eUSCI_A0 interrupt enable
-TERM_IFG=\$5DC! \ eUSCI_A0 interrupt flags
-TERM_IV=\$5DE! \ eUSCI_A0 interrupt vector word
+TERM_CTLW0=\$5C0! \ eUSCI_A0 control word 0
+TERM_CTLW1=\$5C2! \ eUSCI_A0 control word 1
+TERM_BRW=\$5C6!
+TERM_BR0=\$5C6! \ eUSCI_A0 baud rate 0
+TERM_BR1=\$5C7! \ eUSCI_A0 baud rate 1
+TERM_MCTLW=\$5C8! \ eUSCI_A0 modulation control
+TERM_STATW=\$5CA! \ eUSCI_A0 status
+TERM_RXBUF=\$5CC! \ eUSCI_A0 receive buffer
+TERM_TXBUF=\$5CE! \ eUSCI_A0 transmit buffer
+TERM_ABCTL=\$5D0! \ eUSCI_A0 LIN control
+TERM_IRTCTL=\$5D2! \ eUSCI_A0 IrDA transmit control
+TERM_IRRCTL=\$5D3! \ eUSCI_A0 IrDA receive control
+TERM_IE=\$5DA! \ eUSCI_A0 interrupt enable
+TERM_IFG=\$5DC! \ eUSCI_A0 interrupt flags
+TERM_IV=\$5DE! \ eUSCI_A0 interrupt vector word
RTS=4! ; P4.2
CTS=2! ; P4.1
CD_SD=4! ; P7.2 as Card Detect
SD_CDIN=\$260!
-CS_SD=1! ; P4.0 as Card Select
+CS_SD=1! ; P4.0 as Card Select
SD_CSOUT=\$223!
SD_CSDIR=\$225!
SD_REN=\$206! ; word access, to configure pullup resistors
BUS_SD=\$04C0! ; pins P2.2 as UCB0CLK, P1.6 as UCB0SIMO & P1.7 as UCB0SOMI
-SD_CTLW0=\$640! \ eUSCI_B0 control word 0
-SD_CTLW1=\$642! \ eUSCI_B0 control word 1
-SD_BRW=\$646!
-SD_BR0=\$646! \ eUSCI_B0 bit rate 0
-SD_BR1=\$647! \ eUSCI_B0 bit rate 1
-SD_STATW=\$648! \ eUSCI_B0 status word
-SD_NT0=\$649! \ eUSCI_B0 hardware count
-SD_TBCNT=\$64A! \ eUSCI_B0 byte counter threshold
-SD_RXBUF=\$64C! \ eUSCI_B0 receive buffer
-SD_TXBUF=\$64E! \ eUSCI_B0 transmit buffer
-SD_I2COA0=\$654! \ eUSCI_B0 I2C own address 0
-SD_I2COA1=\$656! \ eUSCI_B0 I2C own address 1
-SD_I2COA2=\$658! \ eUSCI_B0 I2C own address 2
-SD_I2COA3=\$65A! \ eUSCI_B0 I2C own address 3
-SD_ADDRX=\$65C! \ eUSCI_B0 received address
-SD_ADDMASK=\$65E! \ eUSCI_B0 address mask
-SD_I2CSA=\$660! \ eUSCI_B0 I2C slave address
-SD_IE=\$66A! \ eUSCI_B0 interrupt enable
-SD_IFG=\$66C! \ eUSCI_B0 interrupt flags
-SD_IV=\$66E! \ eUSCI_B0 interrupt vector word
+SD_CTLW0=\$640! \ eUSCI_B0 control word 0
+SD_CTLW1=\$642! \ eUSCI_B0 control word 1
+SD_BRW=\$646!
+SD_BR0=\$646! \ eUSCI_B0 bit rate 0
+SD_BR1=\$647! \ eUSCI_B0 bit rate 1
+SD_STATW=\$648! \ eUSCI_B0 status word
+SD_NT0=\$649! \ eUSCI_B0 hardware count
+SD_TBCNT=\$64A! \ eUSCI_B0 byte counter threshold
+SD_RXBUF=\$64C! \ eUSCI_B0 receive buffer
+SD_TXBUF=\$64E! \ eUSCI_B0 transmit buffer
+SD_I2COA0=\$654! \ eUSCI_B0 I2C own address 0
+SD_I2COA1=\$656! \ eUSCI_B0 I2C own address 1
+SD_I2COA2=\$658! \ eUSCI_B0 I2C own address 2
+SD_I2COA3=\$65A! \ eUSCI_B0 I2C own address 3
+SD_ADDRX=\$65C! \ eUSCI_B0 received address
+SD_ADDMASK=\$65E! \ eUSCI_B0 address mask
+SD_I2CSA=\$660! \ eUSCI_B0 I2C slave address
+SD_IE=\$66A! \ eUSCI_B0 interrupt enable
+SD_IFG=\$66C! \ eUSCI_B0 interrupt flags
+SD_IV=\$66E! \ eUSCI_B0 interrupt vector word
! ============================================
WDT_TIM_EX0=\$360! TA0EX0
WDT_TIM_0_VEC=\$FFEA! TA0_0_VEC
-IR_IN=\$200!
-IR_OUT=\$202!
-IR_DIR=\$204!
-IR_REN=\$206!
+IR_IN=\$200!
+IR_OUT=\$202!
+IR_DIR=\$204!
+IR_REN=\$206!
IR_IES=\$208!
IR_IE=\$20A!
IR_IFG=\$20C!
I2CM_CTLW0=\$6C0! USCI_B2 Control Word Register 0
I2CM_CTLW1=\$6C2! USCI_B2 Control Word Register 1
I2CM_BRW=\$6C6! USCI_B2 Baud Word Rate 0
-I2CM_STATW=\$6C8! USCI_B2 status word
-I2CM_TBCNT=\$6CA! USCI_B2 byte counter threshold
+I2CM_STATW=\$6C8! USCI_B2 status word
+I2CM_TBCNT=\$6CA! USCI_B2 byte counter threshold
I2CM_RXBUF=\$6CC! USCI_B2 Receive Buffer 8
I2CM_TXBUF=\$6CE! USCI_B2 Transmit Buffer 8
I2CM_I2COA0=\$6D4! USCI_B2 I2C Own Address 0
-I2CM_ADDRX=\$6DC! USCI_B2 Received Address Register
+I2CM_ADDRX=\$6DC! USCI_B2 Received Address Register
I2CM_I2CSA=\$6E0! USCI_B2 I2C Slave Address
I2CM_IE=\$6EA! USCI_B2 Interrupt Enable
I2CM_IFG=\$6EC! USCI_B2 Interrupt Flags Register
I2CS_CTLW0=\$6C0! USCI_B2 Control Word Register 0
I2CS_CTLW1=\$6C2! USCI_B2 Control Word Register 1
I2CS_BRW=\$6C6! USCI_B2 Baud Word Rate 0
-I2CS_STATW=\$6C8! USCI_B2 status word
-I2CS_TBCNT=\$6CA! USCI_B2 byte counter threshold
+I2CS_STATW=\$6C8! USCI_B2 status word
+I2CS_TBCNT=\$6CA! USCI_B2 byte counter threshold
I2CS_RXBUF=\$6CC! USCI_B2 Receive Buffer 8
I2CS_TXBUF=\$6CE! USCI_B2 Transmit Buffer 8
I2CS_I2COA0=\$6D4! USCI_B2 I2C Own Address 0
-I2CS_ADDRX=\$6DC! USCI_B2 Received Address Register
+I2CS_ADDRX=\$6DC! USCI_B2 Received Address Register
I2CS_I2CSA=\$6E0! USCI_B2 I2C Slave Address
I2CS_IE=\$6EA! USCI_B2 Interrupt Enable
I2CS_IFG=\$6EC! USCI_B2 Interrupt Flags Register
; P2 - P9.2 ESICH2
; P3 - P4.3 UCA0 RXD
; P4 - P4.2 UCA0 TXD
-; P5 - P3.2 UCB1 SCL
+; P5 - P3.2 UCB1 SCL
; P6 - P9.3 ESICH3
; P7 - P1.4 UCB0 CLK
; P8 - P2.0 TB0.6
; P1.1 - Switch S1 <--- LCD contrast + (finger :-)
; P1.2 - Switch S2 <--- LCD contrast - (finger ;-)
-
+
; note : ESI1.1 = lowest left pin
; note : ESI1.2 is not connected to 3.3V
; GND/ESIVSS - ESI1.3 <-------+---0V0----------> 1 LCD_Vss
; P9.5/ESICI1 - ESI1.9 -------------------------> 5 LCD_R/W
; P9.6/ESICI2 - ESI1.8 -------------------------> 6 LCD_EN
-; +--4k7-< DeepRST <-- GND
+; +--4k7-< DeepRST <-- GND
; |
; P3.4 - UCA1 TXD J101.8 <-+-> RX UARTtoUSB bridge
; P3.5 - UCA1 RXD J101.10 <---- TX UARTtoUSB bridge
; VCC - J1.1 ----> VCC SD_CardAdapter
; GND - J2.20 <---> GND SD_CardAdapter
-; P2.2 - UCA0 CLK J4.35 ----> CLK SD_CardAdapter (SCK)
+; P2.2 - UCA0 CLK J4.35 ----> CLK SD_CardAdapter (SCK)
; P2.6 - J4.39 ----> CS SD_CardAdapter (Card Select)
; P2.0 - UCA0 TXD/SIMO J1.8 ----> SDI SD_CardAdapter (MOSI)
; P2.1 - UCA0 RXD/SOMI J2.19 <---- SDO SD_CardAdapter (MISO)
; P3.2 -UCB1 SCL/SOMI J1.5 ----> free
; P3.3 - TA1.1 J1.5 <---> free
-; PJ.4 - LFXI 32768Hz quartz
-; PJ.5 - LFXO 32768Hz quartz
-; PJ.6 - HFXI
-; PJ.7 - HFXO
-
+; PJ.4 - LFXI 32768Hz quartz
+; PJ.5 - LFXO 32768Hz quartz
+; PJ.6 - HFXI
+; PJ.7 - HFXO
+
; ----------------------------------------------------------------------
; POWER ON RESET AND INITIALIZATION : I/O
SW1_IN .set P1IN ; port
SW1 .set 2 ; P1.1 = S1
-WIPE_IN .equ P1IN
-IO_WIPE .equ 2 ; P1.1 = S1 = FORTH Deep_RST pin
-
; P1.2 - Switch S2
SW2_IN .set P1IN ; port
SW2 .set 4 ; P1.2 = S2
SD_CDIN .equ P2IN
SD_CSOUT .equ P2OUT
SD_CSDIR .equ P2DIR
-CS_SD .equ 40h ; P2.6 Chip Select
+CS_SD .equ 40h ; P2.6 Chip Select
CD_SD .equ 80h ; P2.7 Card Detect
; PORTx default wanted state : pins as input with pullup resistor
MOV #-1,&PBOUT ; all pins as input with resistor
.IFDEF TERMINAL4WIRES
-; RTS output is wired to the CTS input of UART2USB bridge
+; RTS output is wired to the CTS input of UART2USB bridge
; configure RTS as output high to disable RX TERM during start FORTH
BIS.B #RTS,&P3DIR ; RTS as output high
.IFDEF TERMINAL5WIRES
-; CTS input must be wired to the RTS output of UART2USB bridge
+; CTS input must be wired to the RTS output of UART2USB bridge
; configure CTS as input low (true) to avoid lock when CTS is not wired
BIC.B #CTS,&P3OUT ; CTS input pulled down
.ENDIF ; TERMINAL5WIRES
; PORT10 usage
-
+
; PORTx default wanted state : pins as input with pullup resistor
MOV #-1,&PEREN ; all pins with pull resistors else P9.7
\.f=\.4th for MSP_EXP430FR6989! to change file type
!
!========================
-! remove comments
+! remove comments
!========================
\\*\n=
\s\\*\n=\n
!
! P1.1 - Switch S1 <--- LCD contrast + (finger :-)
! P1.2 - Switch S2 <--- LCD contrast - (finger ;-)
-!
+!
! note : ESI1.1 = lowest left pin
! note : ESI1.2 is not connected to 3.3V
! GND J6.2 <-------+---0V0----------> 1 LCD_Vss
! P4.2 -------------------------> 5 LCD_R/W green
! P4.3 -------------------------> 6 LCD_EN blue
!
-! +--4k7-< DeepRST <-- GND
+! +--4k7-< DeepRST <-- GND
! |
! P3.4 - UCA1 TXD J101.8 <-+-> RX UARTtoUSB bridge
! P3.5 - UCA1 RXD J101.10 <---- TX UARTtoUSB bridge
!
! VCC - J1.1 ----> VCC SD_CardAdapter
! GND - J2.20 <---> GND SD_CardAdapter
-! P2.2 - UCA0 CLK J4.35 ----> CLK SD_CardAdapter (SCK)
+! P2.2 - UCA0 CLK J4.35 ----> CLK SD_CardAdapter (SCK)
! P2.6 - J4.39 ----> CS SD_CardAdapter (Card Select)
! P2.0 - UCA0 TXD/SIMO J1.8 ----> SDI SD_CardAdapter (MOSI)
! P2.1 - UCA0 RXD/SOMI J2.19 <---- SDO SD_CardAdapter (MISO)
! P3.2 -UCB1 SCL/SOMI J1.5 ----> free
! P3.3 - TA1.1 J1.5 <---> free
!
-! PJ.4 - LFXI 32768Hz quartz
-! PJ.5 - LFXO 32768Hz quartz
-! PJ.6 - HFXI
-! PJ.7 - HFXO
+! PJ.4 - LFXI 32768Hz quartz
+! PJ.5 - LFXO 32768Hz quartz
+! PJ.6 - HFXI
+! PJ.7 - HFXO
! ============================================
CD_SD=\$80! ; P2.7 as Card Detect
SD_CDIN=\$201!
-CS_SD=\$40! ; P2.6 as Card Select
+CS_SD=\$40! ; P2.6 as Card Select
SD_CSOUT=\$203!
SD_CSDIR=\$205!
WDT_TIM_EX0=\$360! TA0EX0
WDT_TIM_0_Vec=\$FFE8! TA0_0_Vec
-IR_IN=\$221!
-IR_OUT=\$223!
-IR_DIR=\$225!
-IR_REN=\$227!
+IR_IN=\$221!
+IR_OUT=\$223!
+IR_DIR=\$225!
+IR_REN=\$227!
IR_IES=\$239!
IR_IE=\$23B!
IR_IFG=\$23D!
I2CSM_REN=\$206!
SM_SDA=8! P1.3
SM_SCL=\$20! P1.5
-SM_BUS=\$28!
+SM_BUS=\$28!
I2CSMM_IN=\$200!
I2CSMM_OUT=\$202!
I2CSMM_REN=\$206!
SMM_SDA=8! P1.3
SMM_SCL=\$20! P1.5
-SMM_BUS=\$28!
+SMM_BUS=\$28!
RC5_TIM_CTL=\$380! TA1CTL
RC5_TIM_R=\$390! TA1R
RC5_TIM_EX0=\$3A0! TA1EX0
I2CMM_Vec=\$FFEC! UCBO_Vec
MM_SDA=\$40! P1.6
MM_SCL=\$80! P1.7
-MM_BUS=\$C0!
+MM_BUS=\$C0!
I2CM_IN=\$200!
I2CM_OUT=\$202!
I2CM_Vec=\$FFEC! UCBO_Vec
M_SDA=\$40! P1.6
M_SCL=\$80! P1.7
-M_BUS=\$C0!
+M_BUS=\$C0!
I2CS_IN=\$200!
I2CS_OUT=\$202!
I2CM_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CM_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CM_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CM_STATW=\$648! USCI_B0 status word
-I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CM_STATW=\$648! USCI_B0 status word
+I2CM_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CM_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CM_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CM_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CM_ADDRX=\$65C! USCI_B0 Received Address Register
I2CM_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CM_IE=\$66A! USCI_B0 Interrupt Enable
I2CM_IFG=\$66C! USCI_B0 Interrupt Flags Register
I2CS_CTLW0=\$640! USCI_B0 Control Word Register 0
I2CS_CTLW1=\$642! USCI_B0 Control Word Register 1
I2CS_BRW=\$646! USCI_B0 Baud Word Rate 0
-I2CS_STATW=\$648! USCI_B0 status word
-I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
+I2CS_STATW=\$648! USCI_B0 status word
+I2CS_TBCNT=\$64A! USCI_B0 byte counter threshold
I2CS_RXBUF=\$64C! USCI_B0 Receive Buffer 8
I2CS_TXBUF=\$64E! USCI_B0 Transmit Buffer 8
I2CS_I2COA0=\$654! USCI_B0 I2C Own Address 0
-I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
+I2CS_ADDRX=\$65C! USCI_B0 Received Address Register
I2CS_I2CSA=\$660! USCI_B0 I2C Slave Address
I2CS_IE=\$66A! USCI_B0 Interrupt Enable
I2CS_IFG=\$66C! USCI_B0 Interrupt Flags Register
; ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
; TERMBRW_INI .equ 3
; TERMMCTLW_INI .equ 04400h
-;
+;
; .CASE 806400 ; PL2303TA baudrate
; ; Configure UART_TERM @ 806400 bauds / 2MHz
; ; Configure UART_TERM @ 403200 bauds / 1MHz
; Configure UART_TERM @ 1000000 bauds / 8MHz
; Configure UART_TERM @ 2000000 bauds / 16MHz
; N = 16000000/2000000 = 8 ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0 UCBRS0=fn(frac(N))=fn(0.00000)=0x00
-TERMBRW_INI .equ 8
+TERMBRW_INI .equ 8
TERMMCTLW_INI .equ 00000h
.CASE 1228800 ; PL2303TA baudrate
; ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
; TERMBRW_INI .equ 3
; TERMMCTLW_INI .equ 04400h
-;
+;
; .CASE 3000000 ; PL2303TA baudrate
; ; Configure UART_TERM @ 3000000 bauds / 8MHz
; ; Configure UART_TERM @ 6000000 bauds / 16MHz
.CASE 2000000
; Configure UART_TERM @ 2000000 bauds / 16MHz
; N = 16000000/2000000 = 8 ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0 UCBRS0=fn(frac(N))=fn(0.00000)=0x00
-TERMBRW_INI .equ 8
+TERMBRW_INI .equ 8
TERMMCTLW_INI .equ 00000h
.CASE 2457600 ; PL2303TA baudrate
; ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
; TERMBRW_INI .equ 3
; TERMMCTLW_INI .equ 02100h
-;
+;
; .CASE 6000000 ; PL2303TA baudrate
; ; Configure UART_TERM @ 6000000 bauds / 24MHz
; ; N = 16000000/6000000 = 2.6666.. ==> {UCOS16=0, UCBR0=int(N)=2, UCBRF0=dont_care=0 UCBRS0=fn(frac(N))=fn(0.6666)=0xB6
TERMBRW_INI .equ 4
TERMMCTLW_INI .equ 0
-; .CASE 7500000 ; PL2303TA baudrate
-; ; Configure UART_TERM @ 7500000 bauds / 24MHz
-; ; N = 24000000/7500000 = 3.2 ==> {UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0 UCBRS0=fn(frac(N))=fn(0.2)=0x11
-; TERMBRW_INI .equ 3
-; TERMMCTLW_INI .equ 01100h
-
.ELSECASE
.error "UART_TERM / 24 MHz : baudrate not implemented"
.ENDCASE ; UART_TERM / 24MHz baudrates
- .ELSEIF
+ .ELSEIF
.error "UART_TERM frequency not implemented"
.ENDIF ; frequency
\ No newline at end of file
-; Target.asm
+; -*- coding: utf-8 -*-
+; TargetInit.asm
; to Init I/O, Clock, FRAM, RTC, ... only for FastForth and SD_options use
.IFDEF MSP_EXP430FR5739
- .include "MSP_EXP430FR5739.asm"
+ .include "MSP_EXP430FR5739.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF MSP_EXP430FR5969
- .include "MSP_EXP430FR5969.asm"
+ .include "MSP_EXP430FR5969.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF MSP_EXP430FR5994
- .include "MSP_EXP430FR5994.asm"
+ .include "MSP_EXP430FR5994.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF MSP_EXP430FR6989
- .INCLUDE "MSP_EXP430FR6989.asm"
+ .INCLUDE "MSP_EXP430FR6989.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF MSP_EXP430FR4133
- .INCLUDE "MSP_EXP430FR4133.asm"
+ .INCLUDE "MSP_EXP430FR4133.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF MSP_EXP430FR2433
- .include "MSP_EXP430FR2433.asm"
+ .include "MSP_EXP430FR2433.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF MSP_EXP430FR2355
- .include "MSP_EXP430FR2355.asm"
+ .include "MSP_EXP430FR2355.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF LP_MSP430FR2476
- .include "LP_MSP430FR2476.asm"
+ .include "LP_MSP430FR2476.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.IFDEF CHIPSTICK_FR2433
- .include "CHIPSTICK_FR2433.asm"
+ .include "CHIPSTICK_FR2433.asm" ; choose always Px0 to Px3 as RTS pin!!!
.ENDIF
.save
.listing off
; add here your target.asm item:
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
.restore
+ .IFDEF MY_MSP430FR5734
+ .include "MY_MSP430FR5734.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF MY_MSP430FR5738
+ .include "MY_MSP430FR5738.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF MY_MSP430FR5738_1
+ .include "MY_MSP430FR5738.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF MY_MSP430FR5738_2
+ .include "MY_MSP430FR5738.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF MY_MSP430FR5948
+ .include "MY_MSP430FR5948.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF MY_MSP430FR5948_1
+ .include "MY_MSP430FR5948_1.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF JMJ_BOX_2021_03_02
+ .include "JMJ_BOX_2021_03_02.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF JMJ_BOX_2021_05_04
+ .include "JMJ_BOX_2021_05_04.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF JMJ_BOX
+ .include "MY_MSP430FR5738.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF JMJ_BOX_2018_10_29
+ .include "JMJ_BOX_2018_10_29.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF JMJ_BOX_2018_08
+ .include "MY_MSP430FR5738.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF JMJ_BOX_GUILLAUME
+ .include "MY_MSP430FR5738_2.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF JMJ_BOX_FAVRE
+ .include "MY_MSP430FR5738_2.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF PA8_PA_MSP430
+ .include "MY_MSP430FR5738_2.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF PA_PA_MSP430
+ .include "MY_MSP430FR5738_2.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
+ .IFDEF PA_Core_MSP430
+ .include "MY_MSP430FR5948_1.asm" ; choose always Px0 to Px3 as RTS pin!!!
+ .ENDIF
; ----------------------------------------------
; MACROS FOR assembly instructions
; ----------------------------------------------
-NOP .macro ; 1 word, 1 cycle
- .word 4303h ; mov #0, r3
+NOP .macro ; 1 word, 1 cycle
+ .word 4303h ; mov #0, r3
.endm
NOP2 .macro ; 1 Word, 2 cycles
V .equ 0100h
UF9 .equ 0200h ; = SR(9) User Flag 9
UF10 .equ 0400h ; = SR(10) User Flag 10
-UF11 .equ 0800h ; = SR(11) User Flag 11
+UF11 .equ 0800h ; = SR(11) User Flag 11
;----------------------------------------------------------------------------
LPM0 .equ CPUOFF
LPM1 .equ SCG0 + CPUOFF ; for devices with FLL: LPM1 = LPM0 + FLL disabled
; "ASMtoFORTH" or "mDOCOL" switches anywhere in a word, i.e. not only at its
; beginning as ITC competitors.
;-------------------------------------------------------------------------------
+DOCOL .equ 1284h ; 1284h = CALL rDOCOL instruction
+DODOES .equ 1285h ; 1285h = CALL rDODOES instruction
+DOCON .equ 1286h ; 1286h = CALL rDOCON instruction
+DOVAR .equ 1287h ; 1287h = CALL rDOVAR instruction
+
+
+
.SWITCH DTC
.CASE 1 ; DOCOL = CALL rDOCOL, [rDOCOL] = XDOCOL
-ASMtoFORTH .MACRO ; compiled by LO2HI
+mASM2FORTH .MACRO ; compiled by LO2HI
CALL #EXIT ; 10 cycles
.ENDM ; 2 words, 10 cycles
; LO2HI + HI2LO = 3 words, 10 cycles.
.ENDM ; 1 word, 14 cycles (CALL included) (ITC+4)
; COLON + SEMI = 2 words, 20 cycles (ITC+2)
.CASE 2 ; DOCOL = PUSH IP + CALL rDOCOL, [rDOCOL] = EXIT
-ASMtoFORTH .MACRO ; compiled by LO2HI
+mASM2FORTH .MACRO ; compiled by LO2HI
CALL rDOCOL ; 10 [rDOCOL] = EXIT
- .ENDM ; 1 word, 10 cycles.
+ .ENDM ; 1 word, 10 cycles.
; LO2HI + HI2LO = 2 words, 10 cycles.
mDOCOL .MACRO ; compiled by : and by COLON
.ENDM ; 2 words, 13 cycles (ITC+3)
; COLON + SEMI = 3 words, 19 cycles (ITC+1)
.CASE 3 ; inlined DOCOL
-ASMtoFORTH .MACRO ; compiled by LO2HI
+mASM2FORTH .MACRO ; compiled by LO2HI
MOV PC,IP ; 1
ADD #4,IP ; 1
MOV @IP+,PC ; 4 NEXT
; COLON + SEMI = 5 words, 15 cycles (ITC-3)
.ENDCASE ; DTC
+mNEXTADR .MACRO
+ .word $+2
+ .ENDM
+
.save
.listing off
; ----------------------------------------------
FORTHWORD .MACRO name
.word forthlink
forthlink .set $
- .byte STRLEN(name),name
+ .byte STRLEN(name)*2,name
; .align 2
.ENDM
FORTHWORDIMM .MACRO name
.word forthlink
forthlink .set $
- .byte STRLEN(name)+128,name
+ .byte STRLEN(name)*2+1,name ; bit 0 is the immediate flag
; .align 2
.ENDM
asmword .MACRO name
.word asmlink
asmlink .set $
- .byte STRLEN(name),name
+ .byte STRLEN(name)*2,name
; .align 2
.ENDM
; (THREADS-1)*2 = AND mask to define CURRENT offset in vocabulary
;-------------------------------------------
FORTHWORD .MACRO name
-CONTEXTofst .set charfromstr(name,0) & ((THREADS-1)*2)
+CONTEXTofst .set (charfromstr(name,0) & (THREADS-1))*2
.SWITCH CONTEXTofst
.case 0
.word forthlink
.word forthlink31
forthlink31 .set $
.endcase
- .byte STRLEN(name),name
+ .byte STRLEN(name)*2,name
.ENDM
;-------------------------------------------
; (THREADS-1)*2 = AND mask to define CURRENT offset in vocabulary
;-------------------------------------------
FORTHWORDIMM .MACRO name
-CONTEXTofst .set charfromstr(name,0) & ((THREADS-1)*2)
+CONTEXTofst .set (charfromstr(name,0) & (THREADS-1))*2
.SWITCH CONTEXTofst
.case 0
.word forthlink
.word forthlink31
forthlink31 .set $
.endcase
- .byte 80h+STRLEN(name),name
+ .byte STRLEN(name)*2+1,name ; bit 0 is the immediate flag
.ENDM
;-------------------------------------------
; (THREADS-1)*2 = AND mask to define CURRENT offset in vocabulary
;-------------------------------------------
asmword .MACRO name
-CONTEXTofst .set charfromstr(name,0) & ((THREADS-1)*2)
+CONTEXTofst .set (charfromstr(name,0) & (THREADS-1))*2
.SWITCH CONTEXTofst
.case 0
.word asmlink
.word asmlink31
asmlink31 .set $
.endcase ; asmlink
- .byte STRLEN(name),name
+ .byte STRLEN(name)*2,name
.ENDM
.endif ; thread case
USE_MOVE
.ENDIF
.ENDIF
- .IFDEF SD_CARD_LOADER
+ .IFDEF SD_CARD_LOADER
.IFNDEF DOUBLE_INPUT
DOUBLE_INPUT
.ENDIF
.IFNDEF CONDCOMP
CONDCOMP ; mandatory for Bootstrap
.ENDIF
- .IFNDEF DEFERRED
-DEFERRED ; mandatory for Bootstrap
- .ENDIF
.ENDIF
.ENDIF
.IFDEF EXTENDED_ASM
;-----------------------------------------------------------------------
; DEVICE I/O, MEMORY, SFR, vectors and minimum FORTH I/O declarations
;-----------------------------------------------------------------------
+FADDON .set 0
+
.IFDEF MSP_EXP430FR5739
+FADDON .SET FADDON | BIT0 ; hardware MPY
LF_XTAL
.IFDEF TERMINAL_I2C
UCB0_TERM
.include "MSP430FR5739.inc"
.ENDIF
.IFDEF MSP_EXP430FR5969
+FADDON .SET FADDON | BIT0 ; hardware MPY
;EXTENDED_MEM
LF_XTAL
.IFDEF TERMINAL_I2C
.include "MSP430FR5969.inc"
.ENDIF
.IFDEF MSP_EXP430FR5994
+FADDON .SET FADDON | BIT0 ; hardware MPY
;EXTENDED_MEM
LF_XTAL
.IFDEF TERMINAL_I2C
.include "MSP430FR5994.inc"
.ENDIF
.IFDEF MSP_EXP430FR6989
+FADDON .SET FADDON | BIT0 ; hardware MPY
;EXTENDED_MEM
LF_XTAL
.IFDEF TERMINAL_I2C
.INCLUDE "MSP430FR6989.inc"
.ENDIF
.IFDEF MSP_EXP430FR5972
+FADDON .SET FADDON | BIT0 ; hardware MPY
;EXTENDED_MEM
LF_XTAL
.IFDEF TERMINAL_I2C
.include "MSP430FR2433.inc"
.ENDIF
.IFDEF MSP_EXP430FR2355
+FADDON .SET FADDON | BIT0 ; hardware MPY
FLL
LF_XTAL
.IFDEF TERMINAL_I2C
.include "MSP430FR2355.inc"
.ENDIF
.IFDEF LP_MSP430FR2476
+FADDON .SET FADDON | BIT0 ; hardware MPY
FLL
;EXTENDED_MEM
; LF_XTAL ; connect resistors R2=0k, R3=0k before uncomment this line
; add here your device.inc item:
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
.ENDIF
-
.restore
; ---------------------------
; compute value of FORTHADDON
; ---------------------------
-FADDON .set 0
+ .IFDEF FLOORED_DIVISION
+FADDON .SET FADDON | BIT15 ; FLOORED_DIVISION
+ .ENDIF
.IFDEF LF_XTAL
-FADDON .SET FADDON | BIT15 ; LFXTAL = 32768 Hz
+FADDON .SET FADDON | BIT14 ; LFXTAL = 32768 Hz
.ENDIF
.IFNDEF TERMINAL_I2C ; if TERMINAL UART...
.IFDEF TERMINAL5WIRES
-FADDON .SET FADDON | BIT14 ; UART CTS
+FADDON .SET FADDON | BIT13 ; UART CTS
.ENDIF
.IFDEF TERMINAL4WIRES
-FADDON .SET FADDON | BIT13 ; UART RTS
+FADDON .SET FADDON | BIT12 ; UART RTS
.ENDIF
.IFDEF TERMINAL3WIRES
-FADDON .SET FADDON | BIT12 ; UART XON/XOFF
+FADDON .SET FADDON | BIT11 ; UART XON/XOFF
.ENDIF
.IFDEF HALFDUPLEX
-FADDON .SET FADDON | BIT11 ; UART Half Duplex
+FADDON .SET FADDON | BIT10 ; UART Half Duplex
.ENDIF
.ENDIF ; TERMINAL UART
+; ---------------------------
.IFDEF TERMINAL_I2C
-FADDON .SET FADDON | BIT10 ;I2C TERMINAL
+FADDON .SET FADDON | BIT9 ;I2C TERMINAL
.ENDIF
.IFDEF FIXPOINT_INPUT
-FADDON .SET FADDON | BIT9 ; Q15.16 INPUT
+FADDON .SET FADDON | BIT8 ; Q15.16 INPUT
.ENDIF
.IFDEF DOUBLE_INPUT
-FADDON .SET FADDON | BIT8 ; DOUBLE INPUT
+FADDON .SET FADDON | BIT7 ; DOUBLE INPUT
.ENDIF
+; ---------------------------
.IFDEF EXTENDED_ASM ; Assembler 20 bits
-FADDON .SET FADDON | BIT7
- .ENDIF
- .IFDEF MSP430ASSEMBLER
-FADDON .SET FADDON | BIT6 ; Assembler 16 bits
+FADDON .SET FADDON | BIT6
.ENDIF
+; .IFDEF MSP430ASSEMBLER
+FADDON .SET FADDON | BIT5 ; Assembler 16 bits
+; .ENDIF
.IFDEF EXTENDED_MEM
- .IFNDEF EXTENDED_ASM
-FADDON .SET FADDON | BIT5 ; Assembler 16 bits with Address access beyond $FFFF
+ .IFNDEF EXTENDED_ASM
+FADDON .SET FADDON | BIT4 ; Assembler 16 bits with Address access beyond $FFFF
+ .ENDIF
+ .ENDIF
+; ---------------------------
+; .IFDEF VOCABULARY_SET ;
+;FADDON .SET FADDON | BIT3 ; vocabulary set
+; .ENDIF ; BIT2 to BIT0 are free
+
+
+
+;-------------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx RAM memory map:
+;-------------------------------------------------------------------------------
+
+;---------------------------;---------
+; name words ; comment
+;---------------------------;---------
+;LSTACK = L0 = LEAVEPTR ; ----- RAM_ORG
+ ; |
+LSTACK_LEN .equ 16 ; | grows up
+ ; V
+ ; ^
+PSTACK_LEN .equ 48 ; | grows down
+ ; |
+;PSTACK=S0 ; ----- RAM_ORG + $80
+ ; ^
+RSTACK_LEN .equ 48 ; | grows down
+ ; |
+;RSTACK=R0 ; ----- RAM_ORG + $E0
+
+;---------------------------;---------
+; names bytes ; comments
+;---------------------------;---------
+; PAD_I2CADR ; ----- RAM_ORG + $E0
+; PAD_I2CCNT ;
+; PAD < ----- RAM_ORG + $E4
+ ; |
+PAD_LEN .equ 84 ; | grows up (ans spec. : PAD >= 84 chars)
+ ; v
+; TIB_I2CADR ; ----- RAM_ORG + $138
+; TIB_I2CCNT ;
+; TIB < ----- RAM_ORG + $13C
+ ; |
+CIB_LEN .equ 84 ; | grows up Current Input Buffer (ans spec. : TIB >= 80 chars)
+ ; v
+; HOLDS_ORG < ------RAM_ORG + $190
+ ; ^
+HOLD_LEN .equ 34 ; | grows down (ans spec. : HOLD_LEN >= (2*n) + 2 char, with n = 16 bits/cell
+ ; |
+; HOLD_BASE < ----- RAM_ORG + $1B2
+ ;
+ ; system variables
+ ;
+ ; ----- RAM_ORG + $1E0
+ ;
+ ; 28 bytes free
+ ;
+; SD_BUF_I2CADR < ----- RAM_ORG + $1FC
+; SD_BUF_I2CCNT ;
+; SD_BUF < ----- RAM_ORG + $200
+ ;
+SD_BUF_LEN .equ 200h ; 512 bytes buffer
+ ;
+; SD_BUF_END < ----- RAM_ORG + $400
+
+LSTACK .equ RAM_ORG
+LEAVEPTR .equ LSTACK ; Leave-stack pointer
+PSTACK .equ LSTACK+(LSTACK_LEN*2)+(PSTACK_LEN*2)
+RSTACK .equ PSTACK+(RSTACK_LEN*2)
+PAD_I2CADR .equ PAD_ORG-4
+PAD_I2CCNT .equ PAD_ORG-2
+PAD_ORG .equ RSTACK+4
+TIB_I2CADR .equ TIB_ORG-4
+TIB_I2CCNT .equ TIB_ORG-2
+TIB_ORG .equ PAD_ORG+PAD_LEN+4
+HOLDS_ORG .equ TIB_ORG+CIB_LEN
+
+HOLD_BASE .equ HOLDS_ORG+HOLD_LEN
+
+; ----------------------------------------------------
+; RAM_ORG + $1B2 : RAM VARIABLES
+; ----------------------------------------------------
+HP .equ HOLD_BASE ; HOLD ptr
+; ----------------------------------------------------
+; new definition pointers, generated by HEADER
+; ----------------------------------------------------
+LAST_NFA .equ HOLD_BASE+2 ; used by REVEAL, IMMEDIATE
+LAST_THREAD .equ HOLD_BASE+4 ; " REVEAL
+LAST_CFA .equ HOLD_BASE+6 ; " DOES>, RECURSE
+LAST_PSP .equ HOLD_BASE+8 ; " REVEAL
+; ----------------------------------------------------
+; FORTH interpreter variables
+; ----------------------------------------------------
+STATE .equ HOLD_BASE+10 ; Interpreter state
+BASEADR .equ HOLD_BASE+12 ; BASE
+CAPS .equ HOLD_BASE+14 ; CAPS
+; ----------------------------------------------------
+SOURCE .equ HOLD_BASE+16 ; len, org of input stream
+SOURCE_LEN .equ HOLD_BASE+16 ;
+SOURCE_ORG .equ HOLD_BASE+18 ;
+TOIN .equ HOLD_BASE+20 ; CurrentInputBuffer pointer
+; ----------------------------------------------------
+; FORTH environment
+; ----------------------------------------------------
+DP .equ HOLD_BASE+22 ; dictionnary pointer
+LASTVOC .equ HOLD_BASE+24 ;
+CURRENT .equ HOLD_BASE+26 ;
+CONTEXT .equ HOLD_BASE+28 ; 8 words of depth ending
+NULL_WORD .equ HOLD_BASE+44 ; with a null word in addition
+; ----------------------------------;
+
+ .IFDEF SD_CARD_LOADER
+; --------------------------------------------------
+; RAM_ORG + $1FC : RAM SD_CARD SD_BUF 4 + 512 bytes
+; --------------------------------------------------
+SD_BUF_I2CADR .equ SD_BUF-4
+SD_BUF_I2CCNT .equ SD_BUF-2
+SD_BUF .equ HOLD_BASE+78
+SD_BUF_END .equ SD_BUF+200h ; 512bytes
+; --------------------------------------------------
+; RAM_ORG + $400 : free RAM
+; --------------------------------------------------
.ENDIF
+
+ .IFDEF SD_CARD_LOADER
+; ---------------------------------------
+; VARIABLES that should be in RAM
+; ---------------------------------------
+ .IF RAM_LEN < 2048 ; if RAM < 2K (FR57xx) the variables below are in INFO space (FRAM)
+SD_ORG .equ INFO_ORG+5Ah ;
+ .ELSE ; if RAM >= 2k the variables below are in RAM
+SD_ORG .equ SD_BUF_END+2 ; 1 word guard
+ .ENDIF
+
+ .org SD_ORG
+; ---------------------------------------
+; FAT FileSystemInfos
+; ---------------------------------------
+;FATtype .equ SD_ORG+0
+BS_FirstSectorL .equ SD_ORG+2 ; init by SD_Init, used by RW_Sector_CMD
+BS_FirstSectorH .equ SD_ORG+4 ; init by SD_Init, used by RW_Sector_CMD
+OrgFAT1 .equ SD_ORG+6 ; init by SD_Init,
+FATSize .equ SD_ORG+8 ; init by SD_Init,
+OrgFAT2 .equ SD_ORG+10 ; init by SD_Init,
+;OrgRootDIR .equ SD_ORG+12 ; init by SD_Init,
+OrgClusters .equ SD_ORG+14 ; init by SD_Init, Sector of Cluster 0
+SecPerClus .equ SD_ORG+16 ; init by SD_Init, byte size
+; ---------------------------------------
+; SD command
+; ---------------------------------------
+SD_LOW_LEVEL .equ SD_ORG+18
+SD_CMD_FRM .equ SD_LOW_LEVEL ; SD_CMDx inverted frame ${CRC7,ll,LL,hh,HH,CMD}
+SectorL .equ SD_LOW_LEVEL+6
+SectorH .equ SD_LOW_LEVEL+8
+; ---------------------------------------
+; SD_BUF management
+; ---------------------------------------
+BufferPtr .equ SD_LOW_LEVEL+10
+BufferLen .equ SD_LOW_LEVEL+12
+; ---------------------------------------
+; FAT entry
+; ---------------------------------------
+SD_FAT_LEVEL .equ SD_LOW_LEVEL+14
+ClusterL .equ SD_FAT_LEVEL ;
+ClusterH .equ SD_FAT_LEVEL+2 ;
+LastFATsector .equ SD_FAT_LEVEL+4 ;
+LastFAToffset .equ SD_FAT_LEVEL+6 ;
+FATsector .equ SD_FAT_LEVEL+8 ; not used
+; ---------------------------------------
+; DIR entry
+; ---------------------------------------
+DIRClusterL .equ SD_FAT_LEVEL+10 ; contains the Cluster of current directory ; = 1 as FAT16 root directory
+DIRClusterH .equ SD_FAT_LEVEL+12 ; contains the Cluster of current directory ; = 1 as FAT16 root directory
+DIREntryOfst .equ SD_FAT_LEVEL+14
+; ---------------------------------------
+; Handle Pointer
+; ---------------------------------------
+CurrentHdl .equ SD_FAT_LEVEL+16 ; contains the address of the last opened file structure, or 0
+; ---------------------------------------
+; Load file operation
+; ---------------------------------------
+PathName_PTR .equ SD_FAT_LEVEL+18 ;
+PathName_END .equ SD_FAT_LEVEL+20 ;
+; ---------------------------------------
+; Handle structure
+; ---------------------------------------
+FirstHandle .equ SD_FAT_LEVEL+22
+; three handle tokens :
+; HDLB_Token= 0 : free handle
+; = 1 : file to read
+; = 2 : file updated (write)
+; =-1 : LOAD"ed file (source file)
+
+; offset values
+HDLW_PrevHDL .equ 0 ; previous handle
+HDLB_Token .equ 2 ; token
+HDLB_ClustOfst .equ 3 ; Current sector offset in current cluster (Byte)
+HDLL_DIRsect .equ 4 ; Dir SectorL
+HDLH_DIRsect .equ 6 ; Dir SectorH
+HDLW_DIRofst .equ 8 ; SD_BUF offset of Dir entry
+HDLL_FirstClus .equ 10 ; File First ClusterLo (identify the file)
+HDLH_FirstClus .equ 12 ; File First ClusterHi (identify the file)
+HDLL_CurClust .equ 14 ; Current ClusterLo
+HDLH_CurClust .equ 16 ; Current ClusterHi
+HDLL_CurSize .equ 18 ; written size / not yet read size (Long)
+HDLH_CurSize .equ 20 ; written size / not yet read size (Long)
+HDLW_BUFofst .equ 22 ; SD_BUF offset ; used by LOAD"
+HDLW_PrevLEN .equ 24 ; previous LEN
+HDLW_PrevORG .equ 26 ; previous ORG
+
+ .IF RAM_LEN < 2048 ; due to the lack of RAM, only 4 handles and PAD replaces SDIB
+HandleMax .equ 4 ; and not 8 to respect INFO size (FRAM)
+HandleLenght .equ 28
+HandlesLen .equ handleMax*HandleLenght
+HandleEnd .equ FirstHandle+handleMax*HandleLenght
+SD_END .equ HandleEnd
+SDIB_I2CADR .equ PAD_ORG-4
+SDIB_I2CCNT .equ PAD_ORG-2
+SDIB_ORG .equ PAD_ORG
+ .ELSE ; RAM_Size >= 2k all is in RAM
+HandleMax .equ 8
+HandleLenght .equ 28
+HandlesLen .equ handleMax*HandleLenght
+HandleEnd .equ FirstHandle+handleMax*HandleLenght
+SDIB_I2CADR .equ SDIB_ORG-4
+SDIB_I2CCNT .equ SDIB_ORG-2
+SDIB_ORG .equ HandleEnd+4
+SD_END .equ SDIB_ORG+CIB_LEN
+ .ENDIF ; RAM_Size
+SD_LEN .equ SD_END-SD_ORG
+ .ENDIF ; SD_CARD_LOADER
+
+ .org INFO_ORG
+;-------------------------------------------------------------------------------
+; INFO(DCBA) >= 256 bytes memory map (FRAM) :
+;-------------------------------------------------------------------------------
+; FRAM INFO: KERNEL INIT CONSTANTS and VARIABLES
+; ----------------------------------------------
+FREQ_KHZ .word FREQUENCY*1000 ; used to stabilize MCLK before start, see MSP430FRxxxx.asm
+ .IFDEF TERMINAL_I2C
+I2CSLAVEADR .word MYSLAVEADR ; on MSP430FR2xxx devices with BSL I2C, Slave address is FFA0h
+I2CSLAVEADR1 .word 0
+LPM_MODE .word GIE+LPM4 ; LPM4 is the default mode for I2C TERMINAL
+ .ELSE ; TERMINAL_UART
+TERMBRW_RST .word TERMBRW_INI ; set by TERMINALBAUDRATE.inc
+TERMMCTLW_RST .word TERMMCTLW_INI ; set by TERMINALBAUDRATE.inc
+LPM_MODE .word GIE+LPM0 ; LPM0 is the default mode for UART TERMINAL
.ENDIF
- .IFDEF CONDCOMP
-FADDON .SET FADDON | BIT0 ; Conditionnal Compilation
+USERSYS .word -3 ; RESET use, value = -3 when compiling new kernel
+FORTHVERSION .word VAL(SUBSTR(VER,1,0)); used by WARM
+INI_THREAD .word THREADS ; used by WORDS definition
+FORTHADDON .word FADDON ; used by FF_SPECS.f and to secure downloading of any source.f files.
+; --------------------------------------;
+DEEP_ORG ; MOV #DEEP_ORG,X see "PUC 7" in forthMSP430FR.ASM
+; --------------------------------------;
+DEEP_TERM_VEC .word TERMINAL_INT ; MOV @X+,&TERM_VEC ; TERMINAL_INT --> FRAM TERM_VEC
+ .IFNDEF SD_CARD_LOADER
+DEEP_COLD .word COLD_TERM ; MOV @X+,&COLD_APP ; COLD_TERM --> FRAM COLD_APP
+DEEP_SOFT .word INIT_SOFT_TERM ; MOV @X+,&SOFT_APP ; INIT_SOFT_TERM --> FRAM SOFT_APP
+DEEP_HARD .word INIT_TERM ; MOV @X+,&HARD_APP ; INIT_TERM --> FRAM HARD_APP
+DEEP_SLEEP .word RXON ; MOV @X+,&SLEEP_APP ; RXON --> FRAM SLEEP_APP
+ .ELSE
+DEEP_COLD .word COLD_TERM ; MOV @X+,&COLD_APP ; COLD_TERM --> FRAM COLD_APP
+DEEP_SOFT .word INIT_SOFT_SD ; MOV @X+,&SOFT_APP ; INIT_SOFT_SD --> FRAM SOFT_APP
+DEEP_HARD .word INIT_HARD_SD ; MOV @X+,&HARD_APP ; INIT_HARD_SD --> FRAM HARD_APP
+DEEP_SLEEP .word RXON ; MOV @X+,&SLEEP_APP ; RXON --> FRAM SLEEP_APP
.ENDIF
+DEEP_DP .word ROMDICT ; MOV @X+,&RST_DP ; DEEP_DP --> FRAM RST_DP
+DEEP_LASTVOC .word lastvoclink ; MOV @X+,&RST_LASTVOC ; DEEP_LASTVOC --> FRAM RST_LASTVOC
+DEEP_CURRENT .word BODYFORTH ; MOV @X+,&CURRENT ; DEEP_CONTEXT --> FRAM RST_CURRENT
+DEEP_CONTEXT .word BODYFORTH ; MOV @X+,&CONTEXT ; DEEP_CONTEXT --> FRAM RST_CONTEXT
+; --------------------------------------;
+PUC_ABORT_ORG ; MOV #PUC_ABORT_ORG,X
+; --------------------------------------;
+INIT_ACCEPT .word ACCEPT+4 ; MOV @X+,&ACCEPT+2 ; INIT_ACCEPT --> FRAM PFA_ACCEPT
+INIT_EMIT .word EMIT+4 ; MOV @X+,&EMIT+2 ; INIT_EMIT --> FRAM PFA_EMIT
+INIT_KEY .word KEY+4 ; MOV @X+,&KEY+2 ; INIT_KEY --> FRAM PFA_KEY
+INIT_CIB .word TIB_ORG ; MOV @X+,&CIB_ORG ; INIT_CIB --> FRAM CIB_ORG
+; --------------------------------------;
+FORTH_ORG ; MOV #FORTH_ORG,X
+; --------------------------------------;
+INIT_RSP .word RSTACK ; MOV @X+,RSP ; INIT_RSP --> RSP (R1)
+ .SWITCH DTC
+ .CASE 1
+INIT_DOCOL .word xDOCOL ; MOV @X+,rDOCOL ; INIT_DOCOL --> rDOCOL (R4)
+ .CASE 2
+INIT_DOCOL .word EXIT ; MOV @X+,rDOCOL ; INIT_DOCOL --> rDOCOL (R4)
+ .CASE 3
+INIT_DOCOL .word 0 ; MOV @X+,R4 ; useless rDOCOL
+ .ENDCASE
+INIT_DODOES .word xDODOES ; MOV @X+,rDODOES ; INIT_DODOES --> rDODOES (R5)
+INIT_DOCON .word xDOCON ; MOV @X+,rDOCON ; INIT_DOCON --> rDOCON (R6)
+INIT_DOVAR .word RFROM ; MOV @X+,rDOVAR ; INIT_DOVAR --> rDOVAR (R7)
+INIT_CAPS .word 32 ; MOV @X+,&CAPS ; INIT_CAPS --> RAM CAPS
+INIT_BASE .word 10 ; MOV @X+,&BASE ; INIT_BASE --> RAM BASE
+INIT_LEAVE .word LSTACK ; MOV @X+,&LEAVEPTR ; INIT_LEAVE --> RAM LEAVEPTR
+; --------------------------------------;
+; FRAM RST values initialised by -1 SYS ;
+; --------------------------------------;
+RST_ORG ; make room for RST values of:
+RST_LEN .equ 16 ; 16 bytes
+; --------------------------------------;
+ .IFNDEF SD_CARD_LOADER
+COLD_APP .word COLD_TERM ; COLD_APP
+SOFT_APP .word INIT_SOFT_TERM ; SOFT_APP
+HARD_APP .word INIT_TERM ; HARD_APP
+SLEEP_APP .word RXON ; SLEEP_APP
+ .ELSE
+COLD_APP .word COLD_TERM ; COLD_APP
+SOFT_APP .word INIT_SOFT_SD ; SOFT_APP
+HARD_APP .word INIT_HARD_SD ; HARD_APP
+SLEEP_APP .word RXON ; SLEEP_APP
+ .ENDIF
+; --------------------------------------;
+RST_DP .word ROMDICT ; program memory pointer
+; --------------------------------------;
+RST_LASTVOC .word lastvoclink ; last vocabulary link
+; --------------------------------------;
+RST_CURRENT .word BODYFORTH ; CURRENT word-set ptr
+; --------------------------------------;
+RST_CONTEXT .word BODYFORTH ; CONTEXT space (8 CELLS)
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+; --------------------------------------;
+ .word 0 ; NULL_WORD, always 0
+; --------------------------------------;
+
+; --------------------------;
+; INFO_ORG + $5A : free use ;
+; --------------------------;
\ No newline at end of file
; -*- coding: utf-8 -*-
-ROMDICT ; init DDP with this current address
+ROMDICT .equ $ ; init DDP with this current address
lastvoclink .equ voclink
lastforthword .equ forthlink
lastasmword .equ asmlink
; 0FF80h = SIGNATURES AREA, Deep_RST erases only 8 words from 0FF80h to 0FF90h
;----------------
.org 0FF80h ; JTAG signature (2 words)
- .word -1
+ .word -1
.word -1
; .org 0FF84h ; BSL signature (2 words)
- .word -1
.word -1
-; .org 0FF88h ; MSP430FR5xxx|MSP430FR6xxx JTAG_PASSWORD, up to 0FFFFh
-; .org 0FF88h ; MSP430FR5xxx|MSP430FR6xxx encapsulation signature (2 words)
+ .word -1
+; .org 0FF88h ; FR5xxx|FR6xxx JTAG_PASSWORD, up to 0FFFFh
+; .org 0FF88h ; FR5xxx|FR6xxx encapsulation signature (2 words)
+; .org 0FF88h ; FR215x|FR235x|FR247x|FR267x BLS config signature + BSL config (2 words)
+ .word -1
+ .word -1
+ .word -1
+ .word -1
+; .org 0FF90h ; free (not erased by DEEP RESET)
+ .word -1
+ .word -1
+ .word -1
+ .word -1
.word -1
.word -1
.word -1
.word -1
-; .org 0FF90h ; free for 8 x I2C addresses UCBx
- .word 0 ; I2C address mini = 10h, maxi = 0EEh (I2C-bus specification and user manual V6)
- .word 0 ; (112 x I2C addresses with R/W flag = 0)
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
- .word 0
;----------------
-; FFA0h = MSP430FR2355/2476 BSL I2C Address, a good idea for I2C_SLAVE_ADR(s) area, isn't it?
+; FFA0h = FR215x|FR235x|FR247x|FR267x BSL I2C Address, a good idea for I2C_SLAVE_ADR(s) area, isn't it?
;----------------
- .org 0FFA0h ;
- .word 077h ; --> MSP430FR2355/2476 BSL I2C 7 bits address (without R/W flag)
+ .word 077h ; --> FR215x|FR235x|FR247x|FR267x BSL I2C 7 bits address (without R/W flag)
.word 10h ; --> UCBxI2COA0 8 bits address (with R/W flag=0)
.word 12h ; --> UCBxI2COA1
.word 14h ; --> UCBxI2COA2
;----------------
; FFACh = VECTORS AREA (lowest known vector interrupt)
;----------------
- .org 0FFACh
.word COLD
.word COLD
.word COLD
--- /dev/null
+PLAT_WIN=1
+PLAT_GTK=0
+position.maximize=1
+
+properties.directory.enable=1
+check.if.already.open=1
+
+save.session=1
+save.recent=1
+save.session=1
+session.bookmarks=1
--- /dev/null
+[BG]
+; Use Eterm look-feel Background extension (on/off)
+BGEnable=on
+
+; Use AlphaBlend API (on/off)
+BGUseAlphaBlendAPI=on
+
+; Susie plugin path
+BGSPIPath=plugin
+
+; Fast window sizing/moving
+BGFastSizeMove=on
+
+; Flickerless window moving
+BGFlickerlessMove=on
+
+; If HideTitle=on and BGNoFrame=on, use window without frame
+; you can resize window with Alt + Shift + LeftDrag
+BGNoFrame=on
+
+; wildcard => random select
+BGThemeFile=theme\*.INI
+
+
+[Tera Term]
+; Tera Term version number
+Version=4.100
+
+; Language (English/Japanese/Russian/Korean/UTF-8)
+Language=English
+
+; User interface language file that includes message strings.
+; Tera Term uses built-in English message when the file or message is not found.
+UILanguageFile=lang\French.lng
+
+; Connecting timeout value(per seconds). No action if the value is zero.
+; Connecting socket could be canceled after the value timeout if the value is greater than zero.
+; The default value is zero(depends on Windows TCP/IP stack implementation).
+ConnectingTimeout=0
+
+; pasting string by clicking mouse right button disabled
+DisablePasteMouseRButton=off
+
+; pasting string by clicking mouse middle button disabled
+DisablePasteMouseMButton=on
+
+; confirm pasting string by clicking mouse right button
+ConfirmPasteMouseRButton=off
+
+; confirm changing clipboard string by clicking mouse right button
+ConfirmChangePaste=on
+ConfirmChangePasteCR=on
+PasteDialogSize=330,220
+ConfirmChangePasteStringFile=
+
+; Scroll out the current buffer when the clear screen does.
+ScrollWindowClearScreen=on
+
+; Reset scrollback on display activity
+AutoScrollOnlyInBottomLine=on
+
+; Starting the selection only by a left button.
+SelectOnlyByLButton=on
+
+; New connection by Alt-N Accelerator key
+AcceleratorNewConnection=on
+
+; Duplicate session by Alt-D Accelerator key disabled
+DisableAcceleratorDuplicateSession=off
+
+; Cygwin connection by Alt-G Accelerator key
+AcceleratorCygwinConnection=on
+
+; Send break by Alt-B Accelerator key disabled
+DisableAcceleratorSendBreak=off
+
+; New connection Menu disabled
+DisableMenuNewConnection=off
+
+; Duplicate session Menu disabled
+DisableMenuDuplicateSession=off
+
+; Send break Menu disabled
+DisableMenuSendBreak=off
+
+; ANSI color definition (in the case FullColor=on)
+; * UseTextColor should be off, or the background and foreground color of
+; VTColor are assigned to color-number 0 and 7 respectively, even if
+; they are specified in ANSIColor.
+; * ANSIColor is a set of 4 values that are color-number(0--15),
+; red-value(0--255), green-value(0--255) and blue-value(0--255).
+ANSIColor=0,0,0,0, 1,255,0,0, 2,0,255,0, 3,255,255,0, 4,128,128,255, 5,255,0,255, 6,0,255,255, 7,255,255,255, 8,64,64,64, 9,192,0,0, 10,0,192,0, 11,192,192,0, 12,64,64,192, 13,192,0,192, 14,0,192,192, 15,192,192,192
+; xterm
+; ANSIColor=0,0,0,0, 1,255,0,0, 2,0,255,0, 3,255,255,0, 4,92,92,255, 5,255,0,255, 6,0,255,255, 7,255,255,255, 8,127,127,127, 9,205,0,0, 10,0,205,0, 11,205,205,0, 12,0,0,238, 13,205,0,205, 14,0,205,205, 15,229,229,229
+; PuTTY
+;ANSIColor=0,0,0,0, 1,255,85,85, 2,85,255,85, 3,255,255,85, 4,85,85,255, 5,255,85,255, 6,85,255,255, 7,255,255,255, 8,85,85,85, 9,187,0,0, 10,0,187,0, 11,187,187,0, 12,0,0,187, 13,187,0,187, 14,0,187,187, 15,187,187,187
+; Tera Term Pro 2.3
+;ANSIColor=0,0,0,0, 1,255,0,0, 2,0,255,0, 3,255,255,0, 4,0,0,255, 5,255,0,255, 6,0,255,255, 7,255,255,255, 8,128,128,128, 9,128,0,0, 10,0,128,0, 11,128,128,0, 12,0,0,128, 13,128,0,128, 14,0,128,128, 15,192,192,192
+; Solarized (http://ethanschoonover.com/solarized)
+;ANSIColor=0,7,54,66, 1,203,75,22, 2,88,110,117, 3,101,123,131, 4,131,148,150, 5,108,113,196, 6,147,161,161, 7,253,246,227, 8,0,43,54, 9,220,50,47, 10,133,153,0, 11,181,137,0, 12,38,139,210, 13,211,54,130, 14,42,161,152, 15,238,232,213
+
+; Enable continued-line copy
+EnableContinuedLineCopy=on
+
+; Mouse cursor type (arrow/ibeam/cross/hand)
+MouseCursor=IBEAM
+
+; Translucent window (0 - 255: transparency value)
+AlphaBlend=255
+
+; Cygwin install path
+CygwinDirectory=C:\cygwin64
+
+; Viewlog Editor path
+ViewlogEditor=C:\Windows\notepad.exe
+
+; Locale for Unicode
+;Locale=chs
+Locale=english
+
+; CodePage for Unicode
+CodePage=1252
+
+; Background color of text uses background color of screen (on/off)
+UseNormalBGColor=on
+
+; Port type (serial/tcpip/namedpipe)
+Port=serial
+
+; Window positions
+VTPos=-2147483648,-2147483648
+TEKPos=-2147483648,-2147483648
+
+; Terminal size
+TerminalSize=128,42
+; Terminal size=window size (on/off)
+TermIsWin=on
+; Auto window resizing option (on/off)
+AutoWinResize=off
+
+; Convert a received new-line (CR) char to CR/CRLF/LF/AUTO
+CRReceive=AUTO
+; New-line code to be transmitted (CR/CRLF/LF)
+CRSend=CRLF
+
+; Terminal ID
+TerminalID=VT100
+
+; Local echo (on/off)
+LocalEcho=off
+
+; Answerback
+Answerback=
+
+; Auto window switching (VT<->TEK; on/off)
+AutoWinSwitch=off
+
+; Kanji code to be received (SJIS/EUC/JIS)
+KanjiReceive=UTF-8
+; JIS Katakana code to be received (7/8)
+KatakanaReceive=8
+
+; Kanji code to be transmitted (SJIS/EUC/JIS)
+KanjiSend=UTF-8
+; JIS Katakana to be transmitted (7/8)
+KatakanaSend=8
+; Kanji-in sequence to be transmitted (@/B)
+KanjiIn=B
+; Kanji-out sequence to be transmitted (J/B)
+KanjiOut=B
+
+; Russian code set used in host
+RussHost=Windows
+; Russian code set used in PC
+RussClient=Windows
+
+; Window title
+Title=Tera Term
+
+; Cursor shape (block/vertical/horizontal)
+CursorShape=block
+
+; Hide title & menu bars and enable popup menu (on/off)
+HideTitle=off
+; Hide menu bar and enable popup menu (on/off)
+PopupMenu=off
+
+; Color mode (on/off)
+EnableANSIColor=on
+PcBoldColor=on
+Aixterm16Color=on
+Xterm256Color=on
+
+; Enable scroll buffer (on/off)
+EnableScrollBuff=on
+; Scroll buffer size
+ScrollBuffSize=40000
+
+; Text and background colors
+; for Normal characters
+VTColor=0,255,0,0,0,0
+; Solarized Dark
+;VTColor=131,148,150,0,43,54
+; Solarized Light
+;VTColor=101,123,131,253,246,227
+;
+; for Bold characters
+EnableBoldAttrColor=on
+VTBoldColor=255,255,0,0,0,0
+; Solarized Dark
+;VTBoldColor=147,161,161,7,54,66
+; Solarized Light
+;VTBoldColor=88,110,117,238,232,213
+;
+; for Blink characters
+EnableBlinkAttrColor=on
+VTBlinkColor=255,0,0,0,0,0
+; Solarized Dark
+;VTBlinkColor=133,153,0,0,43,54
+; Solarized Light
+;VTBlinkColor=133,153,0,253,246,227
+;
+; for Reverse characters
+EnableReverseAttrColor=on
+VTReverseColor=0,0,0,255,255,255
+; Solarized Dark
+;VTReverseColor=0,43,54,131,148,150
+;VTReverseColor=101,123,131,253,246,227
+; Solarized Light
+;VTReverseColor=253,246,227,101,123,131
+;VTReverseColor=131,148,150,0,43,54
+;
+; for URL(hyper link) text color
+EnableURLColor=on
+URLUnderline=on
+URLColor=0,255,255,0,0,0
+; Solarized Dark
+;URLColor=181,137,0,0,43,54
+; Solarized Light
+;URLColor=181,137,0,253,246,227
+;
+
+; Enable clickable URL
+EnableClickableUrl=off
+
+; Launched Browser
+; Firefox example
+; ClickableUrlBrowser=firefox
+; ClickableUrlBrowserArg=-new-tab
+; Opera example
+; ClickableUrlBrowser=opera
+; ClickableUrlBrowserArg=-newpage
+; IE example
+; ClickableUrlBrowser=iexplore
+; ClickableUrlBrowserArg=
+; Chrome example
+; ClickableUrlBrowser=chrome
+; ClickableUrlBrowserArg=
+ClickableUrlBrowser=
+ClickableUrlBrowserArg=
+
+
+; for TEK window
+TEKColor=0,0,0,255,255,255
+
+; TEK color emulation (on/off)
+TEKColorEmulation=off
+
+; Font
+VTFont=Lucida Console,0,-13,0
+; Bold style font (on/off)
+EnableBold=on
+; Font for TEK window
+TEKFont=Terminal,0,-8,255
+; Font quality(default/non-antialiased/antialiased/cleartype)
+FontQuality=nonantialiased
+
+; Russian code set of the font
+RussFont=Windows
+
+; Backspace key (BS/DEL)
+BSKey=BS
+; transmit DEL by Delete key (on/off)
+DeleteKey=on
+
+; Russian code set used in the keyboard driver
+RussKeyb=Windows
+
+; Meta key (on/off/left/right)
+MetaKey=off
+
+; Meta key sets MSB (off/raw/text)
+Meta8Bit=off
+
+; Application keypad mode disabled.
+DisableAppKeypad=on
+
+; Application cursor mode disabled.
+DisableAppCursor=on
+
+; Serial port parameters
+; Port number
+ComPort=4
+; Baud rate
+BaudRate=4000000
+; Parity (even/odd/none/mark/space)
+Parity=none
+; Data (7/8)
+DataBit=8
+; Stop (1/1.5/2)
+StopBit=1
+; Flow control (x/hard/none)
+FlowCtrl=x
+; Transmit delay per character (in msec)
+DelayPerChar=0
+; Transmit delay per line (in msec)
+DelayPerLine=0
+
+; TCP/IP parameters
+; TCP port#
+TCPPort=10001
+; Telnet flag (on/off)
+Telnet=off
+; Telnet terminal type
+;TermType=vt100
+TermType=xterm
+
+; Auto window closing option (on/off)
+AutoWinClose=on
+; History list of hosts
+HistoryList=on
+
+; Binary flag for Send File (on/off)
+TransBin=off
+
+; without transfer dialog flag for Send File (on/off)
+FTHideDialog=off
+
+; Binary flag for Log (on/off)
+LogBinary=off
+; Log append (on/off)
+LogAppend=on
+; plain text flag for Log (on/off)
+LogTypePlainText=on
+; timestamp flag for Log (on/off)
+LogTimestamp=off
+; without transfer dialog flag for Log (on/off)
+LogHideDialog=off
+; Current all buffer included in first (on/off)
+LogIncludeScreenBuffer=off
+
+; Default Log file name. You can specify strftime format to here.
+LogDefaultName=teraterm.log
+; Default path to save the log file.
+LogDefaultPath=
+; Auto start logging with default log file name.
+LogAutoStart=off
+
+; === Log Rotate ===
+; Mode: 0(none), 1(size)
+LogRotate=0
+; Size
+LogRotateSize=0
+; Size type: 0(byte), 1(KB), 2(MB)
+LogRotateSizeType=0
+; Step: 0(none), >=1(count times)
+LogRotateStep=0
+
+; Deferred Log Write Mode (on/off)
+DeferredLogWriteMode=on
+
+
+; XMODEM option (checksum/crc/1k)
+XmodemOpt=checksum
+; Binary flag for XMODEM Receive and ZMODEM Send (on/off)
+XmodemBin=on
+
+; XMODEM receive command
+XmodemRcvCommand=
+
+; Default directory for file transfers
+FileDir=A:\projets\msp430\MSP430-FORTH
+
+; Filter for send file
+FileSendFilter=
+
+; SCP sending directory
+ScpSendDir=
+
+; Save Broadcast Command History
+BroadcastCommandHistory=on
+
+; Broadcast command enabling flag on the dialog window (on/off)
+AcceptBroadcast=on
+
+; Number of broadcast command history
+MaxBroadcatHistory=99
+
+;------ special options (see Tera Term help)
+
+; C1 (8-bit) control characters
+Accept8BitCtrl=on
+Send8BitCtrl=off
+
+; Accept remote-controlled window title changing (off/overwrite/ahead/last)
+AcceptTitleChangeRequest=overwrite
+
+; Wrong kanji-out ^[(H (Japanese only)
+AllowWrongSequence=off
+
+; Alternate screen buffer support
+AlternateScreenBuffer=on
+
+; Automatic serial reconnection when serial cable is inserted and extracted(Windows XP or later).
+AutoComPortReconnect=on
+
+; When serial port is specified with with /C= option and the port does not exist,
+; Tera Term will wait for port connection.
+WaitCom=off
+
+; Auto file renaming for downloading
+AutoFileRename=on
+
+; Auto text copying
+AutoTextCopy=on
+
+; Back wrap
+BackWrap=off
+
+; Beep by BEL (on/off/visual)
+Beep=on
+
+; Beep over-used
+BeepOverUsedTime=2
+BeepOverUsedCount=5
+BeepSuppressTime=5
+
+; Beep on connection & disconnection
+BeepOnConnect=off
+
+; B-Plus auto receive
+BPAuto=off
+
+; Escape all control characters in B-Plus
+BPEscCtl=off
+
+; B-Plus log
+BPLog=off
+
+; Clear serial port buffer when port opening
+ClearComBuffOnOpen=on
+
+; Clear screen when window is resized
+ClearOnResize=on
+
+; Clear screen after the connection is closed
+ClearScreenOnCloseConnection=off
+
+; Clipboard access from remote (on/off/read/write)
+ClipboardAccessFromRemote=off
+
+; "Disconnect?" warning
+ConfirmDisconnect=on
+
+; Control characters in kanji (Japanese only)
+CtrlInKanji=on
+
+; Confirm send a file when drag and drop
+ConfirmFileDragAndDrop=on
+
+; allow the sequences related to cursor control
+CursorCtrlSequence=off
+
+; Display all characters (debug mode)
+; Debug=off
+Debug=on
+; Debug mode type which can be selected by user.
+; on|all = All types
+; off|none = Disabled debug mode
+; normal = usual teraterm debug mode
+; hex = hex output
+; noout = disable output completely
+DebugModes=all
+
+; Delimters for word selection
+; (compatible with earlier versions of Tera Term)
+; DelimList=$20
+; DelimDBCS=off
+DelimList=$20!"#$24%&'()*+,:;<=>?@[\]^`{|}
+DelimDBCS=on
+
+; Disable mouse event tracking when Control-Key is pressed.
+DisableMouseTrackingByCtrl=on
+
+; Disable wheel to cursor translation when Control-Key is pressed.
+DisableWheelToCursorByCtrl=on
+
+; Line at a time mode
+EnableLineMode=on
+
+; Popup menu
+EnablePopupMenu=on
+
+; "Show menu bar" command
+EnableShowMenu=on
+
+; Enable the status line
+EnableStatusLine=on
+
+; High speed file transfer on serial connection.
+FileSendHighSpeedMode=on
+
+; Display "New Connection" dialog on startup
+HostDialogOnStartup=on
+
+; Enable IME / inline input (Japanese only)
+IME=on
+IMEInline=on
+
+IMERelatedCursor=off
+
+; Windows 7 jump list support
+JumpList=on
+
+; Join Split URL
+JoinSplitURL=off
+JoinSplitURLIgnoreEOLChar=\
+
+; Kermit log
+KmtLog=off
+; Kermit CAPAS: Ability to transmit and receive extended-length packets
+KmtLongPacket=off
+; Kermit CAPAS: Ability to accept "A" packets (file attributes)
+KmtFileAttr=off
+
+; Language selection
+LanguageSelection=on
+
+; Lock Terminal Unique ID
+LockTUID=on
+
+; Exclusive lock for log file
+LogLockExclusive=on
+
+; Max scroll buffer size
+MaxBuffSize=500000
+
+; Max serial port number
+MaxComPort=256
+
+; Max buffer size of OSC string
+MaxOSCBufferSize=4096
+
+; Mouse event tracking
+MouseEventTracking=on
+
+; Maximized window bug tweak
+MaximizedBugTweak=2
+
+; Nonblinking cursor
+NonblinkingCursor=off
+
+; Polygon cursor for KILLFOCUS
+KillFocusCursor=on
+
+; Delay for pass-thru printing (in secs)
+PassThruDelay=3
+
+; Direct pass-thru printing
+PassThruPort=
+
+; Delay for paste per each lines (in msec)
+PasteDelayPerLine=10
+
+; Allow the sequences related to printer control
+PrinterCtrlSequence=on
+
+; Printer font
+PrnFont=
+
+; Page margins for printing
+; (left, right, top and bottom in 1/100 inches)
+PrnMargin=50,50,50,50
+
+; Quick-VAN log
+QVLog=off
+
+; Quick-VAN window size
+QVWinSize=8
+
+; Russian code set of printer font
+RussPrint=Windows
+
+; Save VT Window position
+SaveVTWinPos=off
+
+; Max lines per one jump scroll
+ScrollThreshold=12
+
+; Scroll line count with mouse wheel button
+MouseWheelScrollLine=3
+
+; Text selection on window activation
+SelectOnActivate=on
+
+; Break signal length (in msec)
+SendBreakTime=1000
+
+; Startup macro
+StartupMacro=
+
+; Strict Key Mapping
+StrictKeyMapping=off
+
+; Tab Stop Modify Sequence (on/off/combination of HTS,HTS7,HTS8,TBC,TBC0,TBC3)
+TabStopModifySequence=on
+
+; TEK mouse code
+TEKGINMouseCode=32
+
+; Telnet Auto Detection
+TelAutoDetect=on
+
+; Telnet binary option
+TelBin=off
+
+; Telnet auto echo
+TelEcho=off
+
+; Telnet log
+TelLog=off
+
+; Standard telnet port
+TelPort=23
+
+; Keep-Alive packet sending interval on telnet connection (per second, 0=disabled)
+TelKeepAliveInterval=300
+
+; Auto setup for non-telnet
+TCPLocalEcho=off
+TCPCRSend=
+
+; Terminal Unique ID
+TerminalUID=FFFFFFFF
+
+; Title format
+; format ID: 5(000101) <title> - <host/port> VT/TEK
+; format ID: 13(001101) <host/port> - <title> VT/TEK
+; format ID: 29(011101) <host:tcpport/port> - <title> VT/TEK
+; format ID: 45(101101) <host/port:baud> - <title> VT/TEK
+; format ID: 61(111101) <host:tcpport/port:baud> - <title> VT/TEK
+TitleFormat=45
+
+; Allow the sequences related to title report (accept/ignore/empty)
+TitleReportSequence=empty
+
+; Translate mouse wheel to cursor key when application cursor mode
+TranslateWheelToCursor=on
+
+; Trim trailing new line character when pasting
+TrimTrailingNLonPaste=off
+
+; Unknown Unicode character handling
+UnknownUnicodeCharacterAsWide=off
+
+; Mapping of Unicode to DEC special character
+; The sum of following values:
+; 1 : Box drawings (U+2500-U+257F)
+; 2 : Bullet (U+2022)
+; Hyphenation point (U+2027)
+; Light shade (25%) (U+2591)
+; Medium shade (50%) (U+2592)
+; Dark shade (75%) (U+2593)
+; Black small square (U+25AA)
+; Black vertical rectangle (U+25AE)
+; Black verty small square (U+2B1D)
+; 4 : Middle dot (U+00B7)
+; One dot leader (U+2024)
+; Bullet operator (U+2219)
+UnicodeToDecSpMapping=3
+
+; White & black color conversion
+UseTextColor=off
+
+; VT Compatible Tab
+VTCompatTab=off
+
+; Space between characters (lines)
+VTFontSpace=0,0,0,0
+
+; Window Icon
+VTIcon=Default
+TEKIcon=Default
+
+; Scaling factors for printing (in pixels per inch)
+VTPPI=0,0
+TEKPPI=0,0
+
+; `wait4all' macro command
+Wait4allMacroCommand=off
+
+; allow the sequences related to window control
+WindowCtrlSequence=on
+
+; allow the sequences related to window report
+WindowReportSequence=on
+
+; [Window] menu
+WindowMenu=on
+
+; XMODEM log
+XmodemLog=off
+
+; XMODEM Timeout value(v1,v2,v3,v4,v5) by seconds
+; v1=NAK mode: Timeout value for first packet
+; v2=CRC mode: Timeout value for first packet
+; v3=Timeout short time
+; v4=Timeout long time
+; v5=Timeout very long time
+XmodemTimeouts=10,3,10,20,60
+
+; YMODEM log
+YmodemLog=off
+
+; YMODEM receive command
+YmodemRcvCommand=
+
+; YMODEM Timeout value(v1,v2,v3,v4,v5) by seconds
+; v1=NAK mode: Timeout value for first packet
+; v2=CRC mode: Timeout value for first packet
+; v3=Timeout short time
+; v4=Timeout long time
+; v5=Timeout very long time
+YmodemTimeouts=10,3,10,20,60
+
+; ZMODEM auto receive
+ZmodemAuto=off
+
+; ZMODEM parameters for sending
+ZmodemDataLen=1024
+ZmodemWinSize=32767
+
+; Escape all control characters in ZMODEM
+ZmodemEscCtl=off
+
+; ZMODEM log
+ZmodemLog=off
+
+; ZMODEM receive command
+ZmodemRcvCommand=rz
+
+; ZMODEM Timeout value(v1,v2,v3,v4) by seconds
+; v1=Timeout value for serial port
+; v2=Timeout value for TCP/IP port
+; v3=Timeout value for initial packet
+; v4=Timeout value for final packet
+ZmodemTimeouts=10,0,10,3
+NormalizeLineBreakOnPaste=off
+NotifyClipboardAccess=on
+LogTimestampFormat=%Y-%m-%d %H:%M:%S.%N
+LogTimestampUTC=off
+PrnConvFF=off
+ListHiddenFonts=on
+ISO2022ShiftFunction=on
+LogTimestampType=Local
+TerminalSpeed=38400
+
+;------ end of special options
+
+[TTSSH]
+; SSH enabled flag (1=enabled 0=disabled)
+Enabled=0
+
+; default login username (setup to authentication dialog)
+DefaultUserName=
+DefaultForwarding=
+
+; Cipher algorithm order
+; 2...DES(SSH1), 3...3DES(SSH1), 6...Blowfish(SSH1), 7...3DES-CBC,
+; 8...AES128-CBC, 9...AES192-CBC, :...AES256-CBC, ;...Blowfish-CBC,
+; <...AES128-CTR, =...AES192-CTR, >...AES256-CTR, ?...Arcfour,
+; @...Arcfour128, A...Arcfour256, B...CAST128-CBC, C...3DES-CTR,
+; D...Blowfish-CTR, E...CAST128-CTR, F...Camellia128-CBC,
+; G...Camellia192-CBC, H...Camellia256-CBC, I...Camellia128-CTR,
+; J...Camellia192-CTR, K...Camellia256-CTR
+; 0...Ciphers below this line are disabled.
+CipherOrder=K>H:J=G9I<F8C7D;EB3ML0A@?62
+
+; KEX algorithm order(SSH2)
+; 1...diffie-hellman-group1-sha1
+; 2...diffie-hellman-group14-sha1
+; 3...diffie-hellman-group-exchange-sha1
+; 4...diffie-hellman-group-exchange-sha256
+; 5...ecdh-sha2-nistp256
+; 6...ecdh-sha2-nistp384
+; 7...ecdh-sha2-nistp521
+; 8...diffie-hellman-group14-sha256
+; 9...diffie-hellman-group16-sha512
+; :...diffie-hellman-group18-sha512
+; 0...KEXs below this line are disabled.
+KexOrder=567:9843210
+
+; minimal size in bits of an acceptable group in SSH_MSG_KEY_DH_GEX_REQUEST packet
+GexMinimalGroupSize=0
+
+; Host Key algorithm order(SSH2)
+; 2...ssh-rsa
+; 3...ssh-dss
+; 4...ecdh-sha2-nistp256
+; 5...ecdh-sha2-nistp384
+; 6...ecdh-sha2-nistp521
+; 7...ssh-ed25519
+; 0...below this line are disabled.
+HostKeyOrder=4567230
+
+; MAC algorithm order(SSH2)
+; 1...hmac-sha1
+; 2...hmac-md5
+; 3...hmac-sha1-96
+; 4...hmac-md5-96
+; 5...hmac-ripemd160@openssh.com
+; 6...hmac-sha2-256
+; 8...hmac-sha2-512
+; 0...below this line are disabled.
+MacOrder=86152@?:>;034<=
+
+; Compression algorithm order(SSH2)
+; 1...none
+; 2...zlib
+; 3...zlib@openssh.com(Delayed Compression)
+; 0...below this line are disabled.
+CompOrder=3210
+; packet compression level (0=none)
+Compression=0
+
+
+KnownHostsFiles=ssh_known_hosts
+DefaultRhostsLocalUserName=
+DefaultRhostsHostPrivateKeyFile=
+DefaultRSAPrivateKeyFile=
+DefaultAuthMethod=3
+; Debug message logging level of `TTSSH.LOG'.
+; The default value is disabled(0).
+; LOG_LEVEL_FATAL 5
+; LOG_LEVEL_ERROR 10
+; LOG_LEVEL_URGENT 20
+; LOG_LEVEL_WARNING 30
+; LOG_LEVEL_NOTIFY 50
+; LOG_LEVEL_INFO 80
+; LOG_LEVEL_VERBOSE 100
+; LOG_LEVEL_SSHDUMP 200
+LogLevel=0
+WriteBufferSize=2097152
+
+; SSH protocol version (1 or 2)
+ProtocolVersion=2
+
+; SSH heartbeat(keepalive): per second (0=disabled)
+HeartBeat=60
+
+; Remember password in memory (1=enabled 0=disabled)
+RememberPassword=1
+
+; Check supported auth methods with "none" method (1=enabled 0=disabled)
+CheckAuthListFirst=0
+
+; Enable connection to the server that has RSA key length less than 768 bit (1=enabled 0=disabled)
+EnableRsaShortKeyServer=0
+
+; SSH agent forwarding (pageant) (1=enabled 0=disabled)
+ForwardAgent=0
+
+; Confirm SSH agent forwarding (1=enabled 0=disabled)
+ForwardAgentConfirm=1
+
+; Verify host key by DNS (1=enabled 0=disabled)
+VerifyHostKeyDNS=0
+
+; SSH Icon
+SSHIcon=Default
+
+; Disable error popup-message box
+; 0 ... Default(not disabling)
+; 1 ... Sending forwarded data to a local port
+DisablePopupMessage=0
+
+; X11 Forwarding
+X11Display=
+
+; Host key rotation support (derived from OpenSSH 6.8)
+; 0 ... Disabled
+; 1 ... Enabled
+; 2 ... Enabled with User's confirmation
+UpdateHostkeys=0
+ForwardAgentNotify=1
+AuthBanner=1
+
+
+[TTProxy]
+ConnectionTimeout="10"
+SocksResolve="auto"
+TelnetHostnamePrompt=">> Host name: "
+TelnetUsernamePrompt="Username:"
+TelnetPasswordPrompt="Password:"
+TelnetConnectedMessage="-- Connected to "
+TelnetErrorMessage="!!!!!!!!"
+
+[TTXKanjiMenu]
+UseOneSetting=on
+
+[TTXttyrec]
+RecordStartSize=on
+
+[TTXRecurringCommand]
+Enable=off
+Command=
+Interval=300
+AddNewLine=off
+
+[Resize Menu]
+; 80x62
+;ResizeMenu1= 80, 24
+;
+; 120x52
+;ResizeMenu2=120, 52
+;
+; Width: no-change, Height: 52
+;ResizeMenu3= 0, 52
+;
+; Width: 80, Height: no-change
+;ResizeMenu4= 80, 0
+
+;------ Telnet host list
+; Max number of hosts is 200.
+; You can edit this list in the [Setup] TCP/IP dialog box.
+;[Hosts]
+; Host name
+;Host1=myhost.example.com
+; IPv4 address
+;Host2=192.0.2.1
+; IPv6 address
+;Host3=[2001:db8:1:2:8401:02ff:fe03:0405]
+; IPv6 address with interface number
+;Host4=[fe80::8401:02ff:fe03:0405%3]
+; Host name with option
+;Host5=myhost.example.com /F=myhost.ini
+; Host name with user, port and option
+;Host6=user@myhost.example.com:10022 /ssh
+; URL
+;Host7=ssh://user@myhost.example.com
+; COM1 port
+;Host8=/C=1
+; Replay a file
+;Host9=/R=readme.txt
+
+[Hosts]
+Host1=192.168.0.11
+Host2=192.168.0.1
+Host3=192.168.4.2
+Host4=192.168.0.8
+Host5=192.168.1.8
+Host6=192.168.1.8/
+Host7=myhost.example.com
+Host8=192.0.2.1
+Host9=[2001:db8:1:2:8401:2ff:fe03:405]
+Host10=[fe80::8401:2ff:fe03:405%3]
+Host11=myhost.example.com /F=myhost.ini
+Host12=user@myhost.example.com:10022 /ssh
+Host13=ssh://user@myhost.example.com
+Host14=/C=1 ;serial port
+Host15=\\.\pipe\vmware-serial-port ;Named pipe
+Host16=/R=readme.txt ;replay a file
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