1 ; -*- coding: utf-8 -*-
3 ; ======================================================================
4 ; INIT MSP-EXP430FR6989 board
5 ; ======================================================================
8 ; http://www.ebay.fr/itm/CP2102-USB-UART-Board-mini-Data-Transfer-Convertor-Module-Development-Board-/251433941479
10 ; for sd card socket be carefull : pin CD must be present !
11 ; http://www.ebay.com/itm/2-PCS-SD-Card-Module-Slot-Socket-Reader-For-Arduino-MCU-/181211954262?pt=LH_DefaultDomain_0&hash=item2a3112fc56
14 ; J101 eZ-FET <-> target
15 ; -----------------------
17 ; P3 <-> P4 - TEST - TEST
18 ; P5 <-> P6 - RST - RST
19 ; P7 <-> P8 - TX1 - P3.4 UCA1 TXD ---> RX UARTtoUSB module
20 ; P9 <->P10 - RX1 - P3.5 UCA1 RXD <--- TX UARTtoUSB module
21 ; P11<->P12 - CTS - P3.1
22 ; P13<->P14 - RTS - P3.0
23 ; P15<->P16 - VCC - 3V3
25 ; P19<->P20 - GND - VSS
27 ; Launchpad Header Left J1
28 ; ------------------------
40 ; Launchpad Header Left J3
41 ; ------------------------
53 ; Launchpad Header Right J2
54 ; -------------------------
57 ; P18- P1.5 TA0.0 UCA0 CLK
64 ; P11- P4.7 TA1.2 UCB1 SOMI/SCL
66 ; Launchpad Header Right J4
67 ; -------------------------
76 ; P32- P3.1 UCB1 SIMO/SDA
139 ; ===================================================================================
140 ; in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
141 ; then wire VCC and GND of bridge onto J13 connector
142 ; ===================================================================================
144 ; ---------------------------------------------------
145 ; MSP - MSP-EXP430FR6989 LAUNCHPAD <--> OUTPUT WORLD
146 ; ---------------------------------------------------
150 ; P1.1 - Switch S1 <--- LCD contrast + (finger :-)
151 ; P1.2 - Switch S2 <--- LCD contrast - (finger ;-)
153 ; note : ESI1.1 = lowest left pin
154 ; note : ESI1.2 is not connected to 3.3V
155 ; GND/ESIVSS - ESI1.3 <-------+---0V0----------> 1 LCD_Vss
156 ; VCC/ESIVCC - ESI1.4 >------ | --3V3-----+----> 2 LCD_Vdd
163 ; P3.6 - UCA1 CLK TB0.2 J4.37 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
164 ; P9.0/ESICH0 - ESI1.14 <------------------------> 11 LCD_DB4
165 ; P9.1/ESICH1 - ESI1.13 <------------------------> 12 LCD_DB5
166 ; P9.2/ESICH2 - ESI1.12 <------------------------> 13 LCD_DB5
167 ; P9.3/ESICH3 - ESI1.11 <------------------------> 14 LCD_DB7
168 ; P9.4/ESICI0 - ESI1.10 -------------------------> 4 LCD_RS
169 ; P9.5/ESICI1 - ESI1.9 -------------------------> 5 LCD_R/W
170 ; P9.6/ESICI2 - ESI1.8 -------------------------> 6 LCD_EN
172 ; +--4k7-< DeepRST <-- GND
174 ; P3.4 - UCA1 TXD J101.8 <-+-> RX UARTtoUSB bridge
175 ; P3.5 - UCA1 RXD J101.10 <---- TX UARTtoUSB bridge
176 ; P3.0 - RTS J101.14 ----> CTS UARTtoUSB bridge (optional hardware control flow)
177 ; VCC - J101.16 <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
178 ; GND - J101.20 <---> GND (optional supply from UARTtoUSB bridge)
180 ; VCC - J1.1 ----> VCC SD_CardAdapter
181 ; GND - J2.20 <---> GND SD_CardAdapter
182 ; P2.2 - UCA0 CLK J4.35 ----> CLK SD_CardAdapter (SCK)
183 ; P2.6 - J4.39 ----> CS SD_CardAdapter (Card Select)
184 ; P2.0 - UCA0 TXD/SIMO J1.8 ----> SDI SD_CardAdapter (MOSI)
185 ; P2.1 - UCA0 RXD/SOMI J2.19 <---- SDO SD_CardAdapter (MISO)
186 ; P2.7 - J4.40 <---- CD SD_CardAdapter (Card Detect)
188 ; P4.0 - J1.10 <---- OUT IR_Receiver (1 TSOP32236)
189 ; VCC - J6.1 ----> VCC IR_Receiver (2 TSOP32236)
190 ; GND - J6.2 <---> GND IR_Receiver (3 TSOP32236)
192 ; P1.3 - J4.34 <---> SDA software I2C Master
193 ; P1.5 - J2.18 ----> SCL software I2C Master
195 ; P1.4 -UCB0 CLK TA1.0 J1.7 <---> free
197 ; P1.6 -UCB0 SDA/SIMO J2.15 <---> SDA hardware I2C Master or Slave
198 ; P1.7 -UCB0 SCL/SOMI J2.14 ----> SCL hardware I2C Master or Slave
200 ; P3.0 -UCB1 CLK J4.33 ----> free (if UARTtoUSB with software control flow)
201 ; P3.1 -UCB1 SDA/SIMO J4.32 <---> free
202 ; P3.2 -UCB1 SCL/SOMI J1.5 ----> free
203 ; P3.3 - TA1.1 J1.5 <---> free
205 ; PJ.4 - LFXI 32768Hz quartz
206 ; PJ.5 - LFXO 32768Hz quartz
211 ; ----------------------------------------------------------------------
212 ; POWER ON RESET AND INITIALIZATION : I/O
213 ; ----------------------------------------------------------------------
215 ; ----------------------------------------------------------------------
216 ; POWER ON RESET AND INITIALIZATION : PORT1/2
217 ; ----------------------------------------------------------------------
219 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
223 SD_SEL .equ PASEL0 ; to configure UCB0
224 SD_REN .equ PAREN ; to configure pullup resistors
225 BUS_SD .equ 0700h ; pins P2.2 as UCA0CLK, P2.0 as UCA0SIMO & P2.1 as UCA0SOMI
229 ; P1.0 - LED1 red output low
232 LED1 .equ 1 ; P1.0 LED1 red
235 SW1_IN .set P1IN ; port
236 SW1 .set 2 ; P1.1 = S1
239 IO_WIPE .equ 2 ; P1.1 = S1 = FORTH Deep_RST pin
242 SW2_IN .set P1IN ; port
243 SW2 .set 4 ; P1.2 = S2
245 ; P1.6 -UCB0 SDA/SIMO J2.15 <---> SDA hardware I2C Master or Slave
246 ; P1.7 -UCB0 SCL/SOMI J2.14 ----> SCL hardware I2C Master or Slave
251 SDA .equ 40h ; P1.6 = SDA
252 SCL .equ 80h ; P1.7 = SCL
263 CS_SD .equ 40h ; P2.6 Chip Select
264 CD_SD .equ 80h ; P2.7 Card Detect
266 ; PORTx default wanted state : pins as input with pullup resistor
268 BIS #-1,&PAREN ; all pins with pull up/down resistor
269 MOV #-2,&PAOUT ; all pins with pullup resistors else P1.0
271 ; ----------------------------------------------------------------------
272 ; POWER ON RESET AND INITIALIZATION : PORT3/4
273 ; ----------------------------------------------------------------------
275 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
276 ; PORTx default wanted state : pins as input with pullup resistor
284 HANDSHAKOUT .equ P3OUT
293 TXD .equ 10h ; P3.4 = TXD
294 RXD .equ 20h ; P3.5 = RXD
300 MOV #-1,&PBREN ; all pins as input with resistor
301 MOV #-1,&PBOUT ; all pins as input with resistor
303 .IFDEF TERMINAL4WIRES
304 ; RTS output is wired to the CTS input of UART2USB bridge
305 ; configure RTS as output high to disable RX TERM during start FORTH
306 BIS.B #RTS,&P3DIR ; RTS as output high
307 .IFDEF TERMINAL5WIRES
308 ; CTS input must be wired to the RTS output of UART2USB bridge
309 ; configure CTS as input low (true) to avoid lock when CTS is not wired
310 BIC.B #CTS,&P3OUT ; CTS input pulled down
311 .ENDIF ; TERMINAL5WIRES
312 .ENDIF ; TERMINAL4WIRES
314 ; ----------------------------------------------------------------------
315 ; POWER ON RESET AND INITIALIZATION : PORT5/6
316 ; ----------------------------------------------------------------------
318 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
324 ; PORTx default wanted state : pins as input with pullup resistor
326 MOV #-1,&PCREN ; all pins with pull resistors
327 MOV #-1,&PCOUT ; all pins 1
330 ; ----------------------------------------------------------------------
331 ; POWER ON RESET AND INITIALIZATION : PORT7/8
332 ; ----------------------------------------------------------------------
334 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
340 ; PORTx default wanted state : pins as input with pullup resistor
342 MOV #-1,&PDREN ; all pins with pull resistors
343 MOV #-1,&PDOUT ; all pins 1
347 ; ----------------------------------------------------------------------
348 ; POWER ON RESET AND INITIALIZATION : PORT9/10
349 ; ----------------------------------------------------------------------
351 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
354 ; P9.7 Green LED2 as output low
357 LED2 .equ 80h ; P9.7 LED2 green
362 ; PORTx default wanted state : pins as input with pullup resistor
364 MOV #-1,&PEREN ; all pins with pull resistors else P9.7
365 MOV #0FF7Fh,&PEOUT ; all pins high else P9.7
367 ; ----------------------------------------------------------------------
368 ; POWER ON RESET AND INITIALIZATION : PORTJ
369 ; ----------------------------------------------------------------------
371 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
375 ; PORTx default wanted state : pins as input with pullup resistor
377 MOV.B #-1,&PJREN ; enable pullup/pulldown resistors
378 MOV.B #-1,&PJOUT ; pullup resistors
380 ; ----------------------------------------------------------------------
382 ; ----------------------------------------------------------------------
385 MOV.B #0A5h, &FRCTL0_H ; enable FRCTL0 access
386 MOV.B #10h, &FRCTL0 ; 1 waitstate @ 16 MHz
387 MOV.B #01h, &FRCTL0_H ; disable FRCTL0 access
390 ; ----------------------------------------------------------------------
391 ; POWER ON RESET AND INITIALIZATION : CLOCK SYSTEM
392 ; ----------------------------------------------------------------------
394 ; DCOCLK: Internal digitally controlled oscillator (DCO).
396 MOV.B #CSKEY,&CSCTL0_H ; Unlock CS registers
398 ; MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 8MHZ DCO setting (default value)
399 MOV #DIVA_0 + DIVS_32 + DIVM_32,&CSCTL3
401 .ELSEIF FREQUENCY = 0.5
402 MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
403 MOV #DIVA_2 + DIVS_2 + DIVM_2,&CSCTL3 ; set all dividers as 2
405 .ELSEIF FREQUENCY = 1
406 MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
407 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
409 .ELSEIF FREQUENCY = 2
410 MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
411 MOV #DIVA_0 + DIVS_2 + DIVM_2,&CSCTL3
413 .ELSEIF FREQUENCY = 4
414 MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
415 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
417 .ELSEIF FREQUENCY = 8
418 ; MOV #DCOFSEL2+DCOFSEL1,&CSCTL1 ; Set 8MHZ DCO setting (default value)
419 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
421 .ELSEIF FREQUENCY = 12
422 MOV #DCORSEL+DCOFSEL2+DCOFSEL1,&CSCTL1 ; Set 24MHZ DCO setting
423 MOV #DIVA_0 + DIVS_2 + DIVM_2,&CSCTL3 ;
425 .ELSEIF FREQUENCY = 16
426 MOV #DCORSEL+DCOFSEL2,&CSCTL1 ; Set 16MHZ DCO setting
427 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
430 .error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
434 MOV #SELA_LFXCLK+SELS_DCOCLK+SELM_DCOCLK,&CSCTL2
436 MOV #SELA_VLOCLK+SELS_DCOCLK+SELM_DCOCLK,&CSCTL2
438 MOV.B #01h, &CSCTL0_H ; Lock CS Registers
440 MOV #64,X ; 64* 3 ms = 192 ms delay (by default of specification)
441 ClockWaitX MOV &FREQ_KHZ,Y ;
442 ClockWaitY SUB #1,Y ;1
443 JNZ ClockWaitY ;2 FREQ_KHZ x 3~ ==> 3ms
447 ; ----------------------------------------------------------------------
448 ; POWER ON RESET AND INITIALIZATION : REF
449 ; ----------------------------------------------------------------------
451 MOV #REFTCOFF, &REFCTL
453 ; ----------------------------------------------------------------------
454 ; POWER ON RESET AND INITIALIZATION : RTC_C REGISTERS
455 ; ----------------------------------------------------------------------
458 ; LFXIN : PJ.4, LFXOUT : PJ.5
459 BIS.B #010h,&PJSEL0 ; SEL0 for only LXIN
460 BIC.B #RTCHOLD,&RTCCTL1 ; Clear RTCHOLD = start RTC_B