2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
23 * Authors: Dave Airlie
27 #include "drm_crtc_helper.h"
28 #include "radeon_drm.h"
29 #include "radeon_drv.h"
31 extern int atom_debug;
33 void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
34 struct drm_display_mode *mode,
35 struct drm_display_mode *adjusted_mode)
37 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
38 if (mode->hdisplay < radeon_encoder->panel_xres ||
39 mode->vdisplay < radeon_encoder->panel_yres) {
40 radeon_encoder->flags |= RADEON_USE_RMX;
41 adjusted_mode->hdisplay = radeon_encoder->panel_xres;
42 adjusted_mode->vdisplay = radeon_encoder->panel_yres;
43 adjusted_mode->htotal = radeon_encoder->panel_xres + radeon_encoder->hblank;
44 adjusted_mode->hsync_start = radeon_encoder->panel_xres + radeon_encoder->hoverplus;
45 adjusted_mode->hsync_end = adjusted_mode->hsync_start + radeon_encoder->hsync_width;
46 adjusted_mode->vtotal = radeon_encoder->panel_yres + radeon_encoder->vblank;
47 adjusted_mode->vsync_start = radeon_encoder->panel_yres + radeon_encoder->voverplus;
48 adjusted_mode->vsync_end = adjusted_mode->vsync_start + radeon_encoder->vsync_width;
49 /* update crtc values */
50 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
51 /* adjust crtc values */
52 adjusted_mode->crtc_hdisplay = radeon_encoder->panel_xres;
53 adjusted_mode->crtc_vdisplay = radeon_encoder->panel_yres;
54 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + radeon_encoder->hblank;
55 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + radeon_encoder->hoverplus;
56 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + radeon_encoder->hsync_width;
57 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + radeon_encoder->vblank;
58 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + radeon_encoder->voverplus;
59 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + radeon_encoder->vsync_width;
61 adjusted_mode->htotal = radeon_encoder->panel_xres + radeon_encoder->hblank;
62 adjusted_mode->hsync_start = radeon_encoder->panel_xres + radeon_encoder->hoverplus;
63 adjusted_mode->hsync_end = adjusted_mode->hsync_start + radeon_encoder->hsync_width;
64 adjusted_mode->vtotal = radeon_encoder->panel_yres + radeon_encoder->vblank;
65 adjusted_mode->vsync_start = radeon_encoder->panel_yres + radeon_encoder->voverplus;
66 adjusted_mode->vsync_end = adjusted_mode->vsync_start + radeon_encoder->vsync_width;
67 /* update crtc values */
68 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
69 /* adjust crtc values */
70 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + radeon_encoder->hblank;
71 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + radeon_encoder->hoverplus;
72 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + radeon_encoder->hsync_width;
73 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + radeon_encoder->vblank;
74 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + radeon_encoder->voverplus;
75 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + radeon_encoder->vsync_width;
77 adjusted_mode->clock = radeon_encoder->dotclock;
78 adjusted_mode->flags = radeon_encoder->flags;
82 static int atom_dac_find_atom_type(struct radeon_encoder *radeon_encoder, struct drm_connector *connector)
84 struct drm_device *dev = radeon_encoder->base.dev;
85 struct drm_connector *connector_find;
89 list_for_each_entry(connector_find, &dev->mode_config.connector_list, head) {
90 if (connector_find->encoder == &radeon_encoder->base)
91 connector = connector_find;
95 /* look for the encoder in the connector list -
96 check if we the DAC is enabled on a VGA or STV/CTV or CV connector */
97 /* work out the ATOM_DEVICE bits */
98 switch (connector->connector_type) {
100 case CONNECTOR_DVI_I:
101 case CONNECTOR_DVI_A:
102 if (radeon_encoder->atom_device & ATOM_DEVICE_CRT1_SUPPORT)
103 atom_type = ATOM_DEVICE_CRT1_INDEX;
104 else if (radeon_encoder->atom_device & ATOM_DEVICE_CRT2_SUPPORT)
105 atom_type = ATOM_DEVICE_CRT2_INDEX;
109 if (radeon_encoder->atom_device & ATOM_DEVICE_TV1_SUPPORT)
110 atom_type = ATOM_DEVICE_TV1_INDEX;
113 if (radeon_encoder->atom_device & ATOM_DEVICE_TV1_SUPPORT)
114 atom_type = ATOM_DEVICE_TV1_INDEX;
115 if (radeon_encoder->atom_device & ATOM_DEVICE_CV_SUPPORT)
116 atom_type = ATOM_DEVICE_CV_INDEX;
124 /* LVTMA encoder for LVDS usage */
125 static void atombios_display_device_control(struct drm_encoder *encoder, int index, uint8_t state)
127 struct drm_device *dev = encoder->dev;
128 struct drm_radeon_private *dev_priv = dev->dev_private;
129 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args;
131 memset(&args, 0, sizeof(args));
132 args.ucAction = state;
134 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
138 static void atombios_scaler_setup(struct drm_encoder *encoder, struct drm_display_mode *mode)
140 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
141 struct drm_device *dev = encoder->dev;
142 struct drm_radeon_private *dev_priv = dev->dev_private;
143 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
144 ENABLE_SCALER_PS_ALLOCATION args;
145 int index = GetIndexIntoMasterTable(COMMAND, EnableScaler);
147 memset(&args, 0, sizeof(args));
148 args.ucScaler = radeon_crtc->crtc_id;
150 if (radeon_encoder->flags & RADEON_USE_RMX) {
151 if (radeon_encoder->rmx_type == RMX_FULL)
152 args.ucEnable = ATOM_SCALER_EXPANSION;
153 else if (radeon_encoder->rmx_type == RMX_CENTER)
154 args.ucEnable = ATOM_SCALER_CENTER;
156 args.ucEnable = ATOM_SCALER_DISABLE;
158 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
161 void atombios_set_crtc_source(struct drm_encoder *encoder, int source)
163 int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
164 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
165 struct drm_radeon_private *dev_priv = encoder->dev->dev_private;
167 SELECT_CRTC_SOURCE_PS_ALLOCATION crtc_src_param;
168 SELECT_CRTC_SOURCE_PARAMETERS_V2 crtc_src_param2;
169 uint32_t *param = NULL;
171 atom_parse_cmd_header(dev_priv->mode_info.atom_context, index, &frev, &crev);
178 memset(&crtc_src_param, 0, sizeof(crtc_src_param));
179 crtc_src_param.ucCRTC = radeon_crtc->crtc_id;
180 crtc_src_param.ucDevice = source;
181 param = (uint32_t *)&crtc_src_param;
184 memset(&crtc_src_param2, 0, sizeof(crtc_src_param2));
185 crtc_src_param2.ucCRTC = radeon_crtc->crtc_id;
186 crtc_src_param2.ucEncoderID = source;
188 case ATOM_DEVICE_CRT1_INDEX:
189 case ATOM_DEVICE_CRT2_INDEX:
190 crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_CRT;
192 case ATOM_DEVICE_DFP1_INDEX:
193 case ATOM_DEVICE_DFP2_INDEX:
194 case ATOM_DEVICE_DFP3_INDEX:
195 crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_DVI;
198 case ATOM_DEVICE_LCD1_INDEX:
199 crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_LVDS;
201 case ATOM_DEVICE_TV1_INDEX:
202 crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_TV;
204 case ATOM_DEVICE_CV_INDEX:
205 crtc_src_param2.ucEncodeMode = ATOM_ENCODER_MODE_CV;
208 param = (uint32_t *)&crtc_src_param2;
217 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)param);
221 static void radeon_dfp_disable_dither(struct drm_encoder *encoder, int device)
223 struct drm_device *dev = encoder->dev;
224 struct drm_radeon_private *dev_priv = dev->dev_private;
227 case ATOM_DEVICE_DFP1_INDEX:
228 RADEON_WRITE(AVIVO_TMDSA_BIT_DEPTH_CONTROL, 0); /* TMDSA */
230 case ATOM_DEVICE_DFP2_INDEX:
231 if ((dev_priv->chip_family == CHIP_RS600) ||
232 (dev_priv->chip_family == CHIP_RS690) ||
233 (dev_priv->chip_family == CHIP_RS740))
234 RADEON_WRITE(AVIVO_DDIA_BIT_DEPTH_CONTROL, 0); /* DDIA */
236 RADEON_WRITE(AVIVO_DVOA_BIT_DEPTH_CONTROL, 0); /* DVO */
238 /*case ATOM_DEVICE_LCD1_INDEX:*/ /* LVDS panels need dither enabled */
239 case ATOM_DEVICE_DFP3_INDEX:
240 RADEON_WRITE(AVIVO_LVTMA_BIT_DEPTH_CONTROL, 0); /* LVTMA */
248 static void radeon_lvtma_mode_set(struct drm_encoder *encoder,
249 struct drm_display_mode *mode,
250 struct drm_display_mode *adjusted_mode)
252 struct drm_device *dev = encoder->dev;
253 struct drm_radeon_private *dev_priv = dev->dev_private;
254 LVDS_ENCODER_CONTROL_PS_ALLOCATION args;
255 int index = GetIndexIntoMasterTable(COMMAND, LVDSEncoderControl);
257 memset(&args, 0, sizeof(args));
258 atombios_scaler_setup(encoder, mode);
259 atombios_set_crtc_source(encoder, ATOM_DEVICE_LCD1_INDEX);
262 if (adjusted_mode->clock > 165000)
266 args.usPixelClock = cpu_to_le16(adjusted_mode->clock / 10);
268 printk("executing set LVDS encoder\n");
269 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
273 static void radeon_lvtma_dpms(struct drm_encoder *encoder, int mode)
275 struct drm_device *dev = encoder->dev;
276 int index = GetIndexIntoMasterTable(COMMAND, LCD1OutputControl);
279 case DRM_MODE_DPMS_ON:
280 atombios_display_device_control(encoder, index, ATOM_ENABLE);
282 case DRM_MODE_DPMS_STANDBY:
283 case DRM_MODE_DPMS_SUSPEND:
284 case DRM_MODE_DPMS_OFF:
285 atombios_display_device_control(encoder, index, ATOM_DISABLE);
290 static bool radeon_lvtma_mode_fixup(struct drm_encoder *encoder,
291 struct drm_display_mode *mode,
292 struct drm_display_mode *adjusted_mode)
294 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
296 radeon_encoder->flags &= ~RADEON_USE_RMX;
298 if (radeon_encoder->rmx_type != RMX_OFF)
299 radeon_rmx_mode_fixup(encoder, mode, adjusted_mode);
304 static void radeon_lvtma_prepare(struct drm_encoder *encoder)
306 radeon_lvtma_dpms(encoder, DRM_MODE_DPMS_OFF);
309 static void radeon_lvtma_commit(struct drm_encoder *encoder)
311 radeon_lvtma_dpms(encoder, DRM_MODE_DPMS_ON);
314 static const struct drm_encoder_helper_funcs radeon_atom_lvtma_helper_funcs = {
315 .dpms = radeon_lvtma_dpms,
316 .mode_fixup = radeon_lvtma_mode_fixup,
317 .prepare = radeon_lvtma_prepare,
318 .mode_set = radeon_lvtma_mode_set,
319 .commit = radeon_lvtma_commit,
322 void radeon_enc_destroy(struct drm_encoder *encoder)
324 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
325 drm_encoder_cleanup(encoder);
326 kfree(radeon_encoder);
329 static const struct drm_encoder_funcs radeon_atom_lvtma_enc_funcs = {
330 .destroy = radeon_enc_destroy,
333 struct drm_encoder *radeon_encoder_lvtma_add(struct drm_device *dev, int bios_index)
335 struct drm_radeon_private *dev_priv = dev->dev_private;
336 struct radeon_mode_info *mode_info = &dev_priv->mode_info;
337 struct radeon_encoder *radeon_encoder;
338 struct drm_encoder *encoder;
339 radeon_encoder = kzalloc(sizeof(struct radeon_encoder), GFP_KERNEL);
340 if (!radeon_encoder) {
344 encoder = &radeon_encoder->base;
346 encoder->possible_crtcs = 0x3;
347 encoder->possible_clones = 0;
348 drm_encoder_init(dev, encoder, &radeon_atom_lvtma_enc_funcs,
349 DRM_MODE_ENCODER_LVDS);
351 drm_encoder_helper_add(encoder, &radeon_atom_lvtma_helper_funcs);
352 radeon_encoder->atom_device = mode_info->bios_connector[bios_index].devices;
354 /* TODO get the LVDS info from the BIOS for panel size etc. */
355 /* get the lvds info from the bios */
356 radeon_get_lvds_info(radeon_encoder);
358 /* LVDS gets default RMX full scaling */
359 radeon_encoder->rmx_type = RMX_FULL;
364 static void radeon_atom_dac_dpms(struct drm_encoder *encoder, int mode)
366 struct drm_device *dev = encoder->dev;
367 struct drm_radeon_private *dev_priv = dev->dev_private;
368 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
372 atom_type = atom_dac_find_atom_type(radeon_encoder, NULL);
377 case ATOM_DEVICE_CRT1_INDEX:
378 index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl);
380 case ATOM_DEVICE_CRT2_INDEX:
381 index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl);
383 case ATOM_DEVICE_TV1_INDEX:
384 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
386 case ATOM_DEVICE_CV_INDEX:
387 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
394 case DRM_MODE_DPMS_ON:
395 atombios_display_device_control(encoder, index, ATOM_ENABLE);
397 case DRM_MODE_DPMS_STANDBY:
398 case DRM_MODE_DPMS_SUSPEND:
399 case DRM_MODE_DPMS_OFF:
400 atombios_display_device_control(encoder, index, ATOM_DISABLE);
405 static bool radeon_atom_dac_mode_fixup(struct drm_encoder *encoder,
406 struct drm_display_mode *mode,
407 struct drm_display_mode *adjusted_mode)
412 static void radeon_atom_dac_prepare(struct drm_encoder *encoder)
414 radeon_atom_dac_dpms(encoder, DRM_MODE_DPMS_OFF);
417 static void radeon_atom_dac_commit(struct drm_encoder *encoder)
419 radeon_atom_dac_dpms(encoder, DRM_MODE_DPMS_ON);
422 static int atombios_dac_setup(struct drm_encoder *encoder,
423 struct drm_display_mode *mode,
426 struct drm_device *dev = encoder->dev;
427 struct drm_radeon_private *dev_priv = dev->dev_private;
428 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
429 DAC_ENCODER_CONTROL_PS_ALLOCATION args;
430 int id = (radeon_encoder->type.dac == DAC_TVDAC);
433 memset(&args, 0, sizeof(args));
435 index = GetIndexIntoMasterTable(COMMAND, DAC1EncoderControl);
437 index = GetIndexIntoMasterTable(COMMAND, DAC2EncoderControl);
440 args.usPixelClock = cpu_to_le16(mode->clock / 10);
441 if ((atom_type == ATOM_DEVICE_CRT1_INDEX) ||
442 (atom_type == ATOM_DEVICE_CRT2_INDEX))
443 args.ucDacStandard = id ? ATOM_DAC2_PS2 : ATOM_DAC1_PS2;
444 else if (atom_type == ATOM_DEVICE_CV_INDEX)
445 args.ucDacStandard = id ? ATOM_DAC2_CV : ATOM_DAC1_CV;
446 else if (atom_type == ATOM_DEVICE_TV1_INDEX)
447 args.ucDacStandard = id ? ATOM_DAC2_NTSC : ATOM_DAC1_NTSC;
449 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
454 static int atombios_tv1_setup(struct drm_encoder *encoder,
455 struct drm_display_mode *mode,
458 struct drm_device *dev = encoder->dev;
459 struct drm_radeon_private *dev_priv = dev->dev_private;
460 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
461 TV_ENCODER_CONTROL_PS_ALLOCATION args;
462 int index = GetIndexIntoMasterTable(COMMAND, TVEncoderControl);
464 memset(&args, 0, sizeof(args));
465 args.sTVEncoder.ucAction = 1;
466 if (atom_type == ATOM_DEVICE_CV_INDEX)
467 args.sTVEncoder.ucTvStandard = ATOM_TV_CV;
470 args.sTVEncoder.ucTvStandard = ATOM_TV_NTSC;
473 args.sTVEncoder.usPixelClock = cpu_to_le16(mode->clock / 10);
475 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
479 static void radeon_atom_dac_mode_set(struct drm_encoder *encoder,
480 struct drm_display_mode *mode,
481 struct drm_display_mode *adjusted_mode)
483 struct drm_device *dev = encoder->dev;
484 struct drm_radeon_private *dev_priv = dev->dev_private;
485 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
488 atom_type = atom_dac_find_atom_type(radeon_encoder, NULL);
492 atombios_scaler_setup(encoder, mode);
493 atombios_set_crtc_source(encoder, atom_type);
495 atombios_dac_setup(encoder, adjusted_mode, atom_type);
496 if ((atom_type == ATOM_DEVICE_TV1_INDEX) ||
497 (atom_type == ATOM_DEVICE_CV_INDEX))
498 atombios_tv1_setup(encoder, adjusted_mode, atom_type);
502 static bool atom_dac_load_detect(struct drm_encoder *encoder, int atom_devices)
504 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
505 struct drm_device *dev = encoder->dev;
506 struct drm_radeon_private *dev_priv = dev->dev_private;
507 DAC_LOAD_DETECTION_PS_ALLOCATION args;
508 int index = GetIndexIntoMasterTable(COMMAND, DAC_LoadDetection);
510 memset(&args, 0, sizeof(args));
511 args.sDacload.ucMisc = 0;
512 args.sDacload.ucDacType = (radeon_encoder->type.dac == DAC_PRIMARY) ? ATOM_DAC_A : ATOM_DAC_B;
514 if (atom_devices & ATOM_DEVICE_CRT1_SUPPORT)
515 args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_CRT1_SUPPORT);
516 else if (atom_devices & ATOM_DEVICE_CRT2_SUPPORT)
517 args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_CRT2_SUPPORT);
518 else if (atom_devices & ATOM_DEVICE_CV_SUPPORT) {
519 args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_CV_SUPPORT);
520 if (radeon_is_dce3(dev_priv))
521 args.sDacload.ucMisc = 1;
522 } else if (atom_devices & ATOM_DEVICE_TV1_SUPPORT) {
523 args.sDacload.usDeviceID = cpu_to_le16(ATOM_DEVICE_TV1_SUPPORT);
524 if (radeon_is_dce3(dev_priv))
525 args.sDacload.ucMisc = 1;
529 DRM_DEBUG("writing %x %x\n", args.sDacload.usDeviceID, args.sDacload.ucDacType);
530 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
534 static enum drm_connector_status radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
536 struct drm_device *dev = encoder->dev;
537 struct drm_radeon_private *dev_priv = dev->dev_private;
538 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
540 uint32_t bios_0_scratch;
542 atom_type = atom_dac_find_atom_type(radeon_encoder, connector);
543 if (atom_type == -1) {
544 DRM_DEBUG("exit after find \n");
545 return connector_status_unknown;
548 if(!atom_dac_load_detect(encoder, (1 << atom_type))) {
549 DRM_DEBUG("detect returned false \n");
550 return connector_status_unknown;
554 if (dev_priv->chip_family >= CHIP_R600)
555 bios_0_scratch = RADEON_READ(R600_BIOS_0_SCRATCH);
557 bios_0_scratch = RADEON_READ(RADEON_BIOS_0_SCRATCH);
559 DRM_DEBUG("Bios 0 scratch %x\n", bios_0_scratch);
560 if (radeon_encoder->atom_device & ATOM_DEVICE_CRT1_SUPPORT) {
561 if (bios_0_scratch & ATOM_S0_CRT1_MASK)
562 return connector_status_connected;
563 } else if (radeon_encoder->atom_device & ATOM_DEVICE_CRT2_SUPPORT) {
564 if (bios_0_scratch & ATOM_S0_CRT2_MASK)
565 return connector_status_connected;
566 } else if (radeon_encoder->atom_device & ATOM_DEVICE_CV_SUPPORT) {
567 if (bios_0_scratch & (ATOM_S0_CV_MASK|ATOM_S0_CV_MASK_A))
568 return connector_status_connected;
569 } else if (radeon_encoder->atom_device & ATOM_DEVICE_TV1_SUPPORT) {
570 if (bios_0_scratch & (ATOM_S0_TV1_COMPOSITE | ATOM_S0_TV1_COMPOSITE_A))
571 return connector_status_connected; // CTV
572 else if (bios_0_scratch & (ATOM_S0_TV1_SVIDEO | ATOM_S0_TV1_SVIDEO_A))
573 return connector_status_connected; // STV
575 return connector_status_disconnected;
578 static const struct drm_encoder_helper_funcs radeon_atom_dac_helper_funcs = {
579 .dpms = radeon_atom_dac_dpms,
580 .mode_fixup = radeon_atom_dac_mode_fixup,
581 .prepare = radeon_atom_dac_prepare,
582 .mode_set = radeon_atom_dac_mode_set,
583 .commit = radeon_atom_dac_commit,
584 .detect = radeon_atom_dac_detect,
587 static const struct drm_encoder_funcs radeon_atom_dac_enc_funcs = {
588 . destroy = radeon_enc_destroy,
592 static void atombios_tmds1_setup(struct drm_encoder *encoder,
593 struct drm_display_mode *mode)
595 struct drm_device *dev = encoder->dev;
596 struct drm_radeon_private *dev_priv = dev->dev_private;
597 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
598 TMDS1_ENCODER_CONTROL_PS_ALLOCATION args;
599 int index = GetIndexIntoMasterTable(COMMAND, TMDS1EncoderControl);
601 memset(&args, 0, sizeof(args));
603 if (mode->clock > 165000)
608 args.usPixelClock = cpu_to_le16(mode->clock / 10);
610 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
613 static void atombios_tmds2_setup(struct drm_encoder *encoder,
614 struct drm_display_mode *mode)
616 struct drm_device *dev = encoder->dev;
617 struct drm_radeon_private *dev_priv = dev->dev_private;
618 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
619 TMDS2_ENCODER_CONTROL_PS_ALLOCATION args;
620 int index = GetIndexIntoMasterTable(COMMAND, TMDS2EncoderControl);
622 memset(&args, 0, sizeof(args));
624 if (mode->clock > 165000)
629 args.usPixelClock = cpu_to_le16(mode->clock / 10);
631 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
635 static void atombios_ext_tmds_setup(struct drm_encoder *encoder,
636 struct drm_display_mode *mode)
638 struct drm_device *dev = encoder->dev;
639 struct drm_radeon_private *dev_priv = dev->dev_private;
640 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
641 ENABLE_EXTERNAL_TMDS_ENCODER_PS_ALLOCATION args;
642 int index = GetIndexIntoMasterTable(COMMAND, DVOEncoderControl);
644 memset(&args, 0, sizeof(args));
645 args.sXTmdsEncoder.ucEnable = 1;
647 if (mode->clock > 165000)
648 args.sXTmdsEncoder.ucMisc = 1;
650 args.sXTmdsEncoder.ucMisc = 0;
653 // args.usPixelClock = cpu_to_le16(mode->clock / 10);
655 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
658 static void atombios_dig1_setup(struct drm_encoder *encoder,
659 struct drm_display_mode *mode)
661 struct drm_device *dev = encoder->dev;
662 struct drm_radeon_private *dev_priv = dev->dev_private;
663 DIG_ENCODER_CONTROL_PS_ALLOCATION args;
664 int index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
667 args.usPixelClock = mode->clock / 10;
668 args.ucConfig = ATOM_ENCODER_CONFIG_TRANSMITTER1;
670 // TODO coherent mode
671 // if (encoder->coherent_mode)
672 // args.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
674 if (mode->clock > 165000) {
675 args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA_B;
678 args.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
683 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
686 static void atombios_ddia_setup(struct drm_encoder *encoder,
687 struct drm_display_mode *mode)
689 struct drm_device *dev = encoder->dev;
690 struct drm_radeon_private *dev_priv = dev->dev_private;
691 DVO_ENCODER_CONTROL_PS_ALLOCATION args;
692 int index = GetIndexIntoMasterTable(COMMAND, DVOEncoderControl);
694 args.sDVOEncoder.ucAction = ATOM_ENABLE;
695 args.sDVOEncoder.usPixelClock = mode->clock / 10;
697 if (mode->clock > 165000)
698 args.sDVOEncoder.usDevAttr.sDigAttrib.ucAttribute = PANEL_ENCODER_MISC_DUAL;
700 args.sDVOEncoder.usDevAttr.sDigAttrib.ucAttribute = 0;
702 atom_execute_table(dev_priv->mode_info.atom_context, index, (uint32_t *)&args);
705 struct drm_encoder *radeon_encoder_atom_dac_add(struct drm_device *dev, int bios_index, int dac_type, int with_tv)
707 struct drm_radeon_private *dev_priv = dev->dev_private;
708 struct radeon_mode_info *mode_info = &dev_priv->mode_info;
709 struct radeon_encoder *radeon_encoder = NULL;
710 struct drm_encoder *encoder;
711 int type = with_tv ? DRM_MODE_ENCODER_TVDAC : DRM_MODE_ENCODER_DAC;
713 int digital_enc_mask = ~(ATOM_DEVICE_DFP1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT | ATOM_DEVICE_DFP3_SUPPORT |
714 ATOM_DEVICE_LCD1_SUPPORT);
715 /* we may already have added this encoder */
716 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
717 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC ||
718 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
721 radeon_encoder = to_radeon_encoder(encoder);
722 if (radeon_encoder->type.dac == dac_type) {
729 /* upgrade to a TV controlling DAC */
730 if (type == DRM_MODE_ENCODER_TVDAC)
731 encoder->encoder_type = type;
732 radeon_encoder->atom_device |= mode_info->bios_connector[bios_index].devices;
733 radeon_encoder->atom_device &= digital_enc_mask;
737 radeon_encoder = kzalloc(sizeof(struct radeon_encoder), GFP_KERNEL);
738 if (!radeon_encoder) {
742 encoder = &radeon_encoder->base;
744 encoder->possible_crtcs = 0x3;
745 encoder->possible_clones = 0;
746 drm_encoder_init(dev, encoder, &radeon_atom_dac_enc_funcs,
749 drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs);
750 radeon_encoder->type.dac = dac_type;
751 radeon_encoder->atom_device = mode_info->bios_connector[bios_index].devices;
753 /* mask off any digital encoders */
754 radeon_encoder->atom_device &= digital_enc_mask;
758 static void radeon_atom_tmds_dpms(struct drm_encoder *encoder, int mode)
760 struct drm_device *dev = encoder->dev;
761 struct drm_radeon_private *dev_priv = dev->dev_private;
762 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
766 if (radeon_encoder->atom_device & ATOM_DEVICE_DFP1_SUPPORT)
767 atom_type = ATOM_DEVICE_DFP1_INDEX;
768 if (radeon_encoder->atom_device & ATOM_DEVICE_DFP2_SUPPORT)
769 atom_type = ATOM_DEVICE_DFP2_INDEX;
770 if (radeon_encoder->atom_device & ATOM_DEVICE_DFP3_SUPPORT)
771 atom_type = ATOM_DEVICE_DFP3_INDEX;
777 case ATOM_DEVICE_DFP1_INDEX:
778 index = GetIndexIntoMasterTable(COMMAND, TMDSAOutputControl);
780 case ATOM_DEVICE_DFP2_INDEX:
781 index = GetIndexIntoMasterTable(COMMAND, DVOOutputControl);
783 case ATOM_DEVICE_DFP3_INDEX:
784 index = GetIndexIntoMasterTable(COMMAND, LVTMAOutputControl);
792 case DRM_MODE_DPMS_ON:
793 atombios_display_device_control(encoder, index, ATOM_ENABLE);
795 case DRM_MODE_DPMS_STANDBY:
796 case DRM_MODE_DPMS_SUSPEND:
797 case DRM_MODE_DPMS_OFF:
798 atombios_display_device_control(encoder, index, ATOM_DISABLE);
803 static bool radeon_atom_tmds_mode_fixup(struct drm_encoder *encoder,
804 struct drm_display_mode *mode,
805 struct drm_display_mode *adjusted_mode)
810 static void radeon_atom_tmds_mode_set(struct drm_encoder *encoder,
811 struct drm_display_mode *mode,
812 struct drm_display_mode *adjusted_mode)
814 struct drm_device *dev = encoder->dev;
815 struct drm_radeon_private *dev_priv = dev->dev_private;
816 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
819 if (radeon_encoder->atom_device & ATOM_DEVICE_DFP1_SUPPORT)
820 atom_type = ATOM_DEVICE_DFP1_INDEX;
821 if (radeon_encoder->atom_device & ATOM_DEVICE_DFP2_SUPPORT)
822 atom_type = ATOM_DEVICE_DFP2_INDEX;
823 if (radeon_encoder->atom_device & ATOM_DEVICE_DFP3_SUPPORT)
824 atom_type = ATOM_DEVICE_DFP3_INDEX;
826 atombios_scaler_setup(encoder, mode);
827 atombios_set_crtc_source(encoder, atom_type);
829 if (atom_type == ATOM_DEVICE_DFP1_INDEX)
830 atombios_tmds1_setup(encoder, adjusted_mode);
831 if (atom_type == ATOM_DEVICE_DFP2_INDEX) {
832 if ((dev_priv->chip_family == CHIP_RS600) ||
833 (dev_priv->chip_family == CHIP_RS690) ||
834 (dev_priv->chip_family == CHIP_RS740))
835 atombios_ddia_setup(encoder, adjusted_mode);
837 atombios_ext_tmds_setup(encoder, adjusted_mode);
839 if (atom_type == ATOM_DEVICE_DFP3_INDEX)
840 atombios_tmds2_setup(encoder, adjusted_mode);
841 radeon_dfp_disable_dither(encoder, atom_type);
846 static void radeon_atom_tmds_prepare(struct drm_encoder *encoder)
848 radeon_atom_tmds_dpms(encoder, DRM_MODE_DPMS_OFF);
851 static void radeon_atom_tmds_commit(struct drm_encoder *encoder)
853 radeon_atom_tmds_dpms(encoder, DRM_MODE_DPMS_ON);
856 static const struct drm_encoder_helper_funcs radeon_atom_tmds_helper_funcs = {
857 .dpms = radeon_atom_tmds_dpms,
858 .mode_fixup = radeon_atom_tmds_mode_fixup,
859 .prepare = radeon_atom_tmds_prepare,
860 .mode_set = radeon_atom_tmds_mode_set,
861 .commit = radeon_atom_tmds_commit,
862 /* no detect for TMDS */
865 static const struct drm_encoder_funcs radeon_atom_tmds_enc_funcs = {
866 . destroy = radeon_enc_destroy,
869 struct drm_encoder *radeon_encoder_atom_tmds_add(struct drm_device *dev, int bios_index, int tmds_type)
871 struct drm_radeon_private *dev_priv = dev->dev_private;
872 struct radeon_mode_info *mode_info = &dev_priv->mode_info;
873 struct radeon_encoder *radeon_encoder = NULL;
874 struct drm_encoder *encoder;
875 int analog_enc_mask = ~(ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_CRT2_SUPPORT);
877 radeon_encoder = kzalloc(sizeof(struct radeon_encoder), GFP_KERNEL);
878 if (!radeon_encoder) {
882 encoder = &radeon_encoder->base;
884 encoder->possible_crtcs = 0x3;
885 encoder->possible_clones = 0;
886 drm_encoder_init(dev, encoder, &radeon_atom_tmds_enc_funcs,
887 DRM_MODE_ENCODER_TMDS);
889 drm_encoder_helper_add(encoder, &radeon_atom_tmds_helper_funcs);
891 radeon_encoder->atom_device = mode_info->bios_connector[bios_index].devices;
893 /* mask off any analog encoders */
894 radeon_encoder->atom_device &= analog_enc_mask;