- [ELSE] ; no hardware multiplier
-\ https://forth-standard.org/standard/double/MTimesDiv
- [UNDEFINED] M*/
- [IF]
- CODE M*/ \ d1lo d1hi n1 +n2 -- d2lo d2hi
- MOV #0,rDOCON \ rDOCON = sign
- CMP #0,2(PSP) \ d1 < 0 ?
- S< IF
- XOR #-1,4(PSP)
- XOR #-1,2(PSP)
- ADD #1,4(PSP)
- ADDC #0,2(PSP)
- MOV #-1,rDOCON
- THEN \ ud1
- CMP #0,0(PSP) \ n1 < 0 ?
- S< IF
- XOR #-1,0(PSP)
- ADD #1,0(PSP) \ u1
- XOR #-1,rDOCON
- THEN \ let's process UM* -- ud1lo ud1hi u1 +n2
- MOV 4(PSP),Y \ 3 uMDlo
- MOV 2(PSP),T \ 3 uMDhi
- MOV @PSP+,S \ 2 uMRlo -- ud1lo ud1hi +n2
- MOV #0,rDODOES \ 1 uMDlo=0
- MOV #0,2(PSP) \ 3 uRESlo=0
- MOV #0,0(PSP) \ 3 uRESmi=0 -- uRESlo uRESmi +n2
- MOV #0,W \ 1 uREShi=0
- MOV #1,X \ 1 BIT TEST REGlo
- BEGIN BIT X,S \ 1 test actual bit in uMRlo
- 0<> IF ADD Y,2(PSP) \ 3 IF 1: ADD uMDlo TO uRESlo
- ADDC T,0(PSP) \ 3 ADDC uMDmi TO uRESmi
- ADDC rDODOES,W \ 1 ADDC uMRlo TO uREShi
- THEN ADD Y,Y \ 1 (RLA LSBs) uMDlo *2
- ADDC T,T \ 1 (RLC MSBs) uMDhi *2
- ADDC rDODOES,rDODOES \ 1 (RLA LSBs) uMDlo *2
- ADD X,X \ 1 (RLA) NEXT BIT TO TEST
- U>= UNTIL \ 1 IF BIT IN CARRY: FINISHED W=uREShi
-\ TOS +n2
-\ W REShi
-\ 0(PSP) RESmi
-\ 2(PSP) RESlo
- MOV TOS,T
- MOV @PSP,TOS
- MOV 2(PSP),S
- [THEN]
+ [ELSE] ; no hardware multiplier
+
+ CODE M*/ \ d1lo d1hi n1 +n2 -- d2lo d2hi
+ MOV #0,rDOCON \ rDOCON = sign
+ CMP #0,2(PSP) \ d1 < 0 ?
+ S< IF
+ XOR #-1,4(PSP)
+ XOR #-1,2(PSP)
+ ADD #1,4(PSP)
+ ADDC #0,2(PSP)
+ MOV #-1,rDOCON
+ THEN \ ud1
+ CMP #0,0(PSP) \ n1 < 0 ?
+ S< IF
+ XOR #-1,0(PSP)
+ ADD #1,0(PSP) \ u1
+ XOR #-1,rDOCON
+ THEN \ let's process UM* -- ud1lo ud1hi u1 +n2
+ MOV 4(PSP),Y \ 3 uMDlo
+ MOV 2(PSP),T \ 3 uMDhi
+ MOV @PSP+,S \ 2 uMRlo -- ud1lo ud1hi +n2
+ MOV #0,rDODOES \ 1 uMDlo=0
+ MOV #0,2(PSP) \ 3 uRESlo=0
+ MOV #0,0(PSP) \ 3 uRESmi=0 -- uRESlo uRESmi +n2
+ MOV #0,W \ 1 uREShi=0
+ MOV #1,X \ 1 BIT TEST REGlo
+ BEGIN BIT X,S \ 1 test actual bit in uMRlo
+ 0<> IF ADD Y,2(PSP) \ 3 IF 1: ADD uMDlo TO uRESlo
+ ADDC T,0(PSP) \ 3 ADDC uMDmi TO uRESmi
+ ADDC rDODOES,W \ 1 ADDC uMRlo TO uREShi
+ THEN ADD Y,Y \ 1 (RLA LSBs) uMDlo *2
+ ADDC T,T \ 1 (RLC MSBs) uMDhi *2
+ ADDC rDODOES,rDODOES \ 1 (RLA LSBs) uMDlo *2
+ ADD X,X \ 1 (RLA) NEXT BIT TO TEST
+ U>= UNTIL \ 1 IF BIT IN CARRY: FINISHED W=uREShi
+\ TOS +n2
+\ W REShi
+\ 0(PSP) RESmi
+\ 2(PSP) RESlo
+ MOV TOS,T
+ MOV @PSP,TOS
+ MOV 2(PSP),S