-DMACTL0=\$500! \ DMA module control 0
-DMACTL1=\$502! \ DMA module control 1
-DMACTL2=\$504! \ DMA module control 2
-DMACTL3=\$506! \ DMA module control 3
-DMACTL4=\$508! \ DMA module control 4
-DMAIV=\$50A! \ DMA interrupt vector
-
-DMA0CTL=\$510! \ DMA channel 0 control
-DMA0SAL=\$512! \ DMA channel 0 source address low
-DMA0SAH=\$514! \ DMA channel 0 source address high
-DMA0DAL=\$516! \ DMA channel 0 destination address low
-DMA0DAH=\$518! \ DMA channel 0 destination address high
-DMA0SZ=\$51A! \ DMA channel 0 transfer size
-
-DMA1CTL=\$520! \ DMA channel 1 control
-DMA1SAL=\$522! \ DMA channel 1 source address low
-DMA1SAH=\$524! \ DMA channel 1 source address high
-DMA1DAL=\$526! \ DMA channel 1 destination address low
-DMA1DAH=\$528! \ DMA channel 1 destination address high
-DMA1SZ=\$52A! \ DMA channel 1 transfer size
-
-DMA2CTL=\$530! \ DMA channel 2 control
-DMA2SAL=\$532! \ DMA channel 2 source address low
-DMA2SAH=\$534! \ DMA channel 2 source address high
-DMA2DAL=\$536! \ DMA channel 2 destination address low
-DMA2DAH=\$538! \ DMA channel 2 destination address high
-DMA2SZ=\$53A! \ DMA channel 2 transfer size
-
-
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEGB2=\$5A4! \ MPU Segmentation Border2
-MPUSEGB1=\$5A6! \ MPU Segmentation Border1
-MPUSAM=\$5A8! \ MPU access management
-MPUIPC0=\$5AA! \ MPU IP control 0
-MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
-
-UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
-UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
-UCA0BRW=\$5C6!
-UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
-UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
-UCA0STAT=\$5CA! \ eUSCI_A status
-UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
-UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
-UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
-UCA0IE=\$5DA! \ eUSCI_A interrupt enable
-UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
-UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
-UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
-UCA1BRW=\$5E6!
-UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
-UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
-UCA1STAT=\$5EA! \ eUSCI_A status
-UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
-UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
-UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
-UCA1IE=\$5FA! \ eUSCI_A interrupt enable
-UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
-UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
-
-UCB0CTLW0=\$640! \ eUSCI_B control word 0
-UCB0CTLW1=\$642! \ eUSCI_B control word 1
-UCB0BRW=\$646!
-UCB0BR0=\$646! \ eUSCI_B bit rate 0
-UCB0BR1=\$647! \ eUSCI_B bit rate 1
-UCB0STATW=\$648! \ eUSCI_B status word
-UCBCNT0=\$649! \ eUSCI_B hardware count
-UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$65C! \ eUSCI_B received address
-UCB0ADDMASK=\$65E! \ eUSCI_B address mask
-UCB0I2CSA=\$660! \ eUSCI I2C slave address
-UCB0IE=\$66A! \ eUSCI interrupt enable
-UCB0IFG=\$66C! \ eUSCI interrupt flags
-UCB0IV=\$66E! \ eUSCI interrupt vector word
+DMACTL0=\$500! \ DMA module control 0
+DMACTL1=\$502! \ DMA module control 1
+DMACTL2=\$504! \ DMA module control 2
+DMACTL3=\$506! \ DMA module control 3
+DMACTL4=\$508! \ DMA module control 4
+DMAIV=\$50A! \ DMA interrupt vector
+
+DMA0CTL=\$510! \ DMA channel 0 control
+DMA0SAL=\$512! \ DMA channel 0 source address low
+DMA0SAH=\$514! \ DMA channel 0 source address high
+DMA0DAL=\$516! \ DMA channel 0 destination address low
+DMA0DAH=\$518! \ DMA channel 0 destination address high
+DMA0SZ=\$51A! \ DMA channel 0 transfer size
+
+DMA1CTL=\$520! \ DMA channel 1 control
+DMA1SAL=\$522! \ DMA channel 1 source address low
+DMA1SAH=\$524! \ DMA channel 1 source address high
+DMA1DAL=\$526! \ DMA channel 1 destination address low
+DMA1DAH=\$528! \ DMA channel 1 destination address high
+DMA1SZ=\$52A! \ DMA channel 1 transfer size
+
+DMA2CTL=\$530! \ DMA channel 2 control
+DMA2SAL=\$532! \ DMA channel 2 source address low
+DMA2SAH=\$534! \ DMA channel 2 source address high
+DMA2DAL=\$536! \ DMA channel 2 destination address low
+DMA2DAH=\$538! \ DMA channel 2 destination address high
+DMA2SZ=\$53A! \ DMA channel 2 transfer size
+
+
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEGB2=\$5A4! \ MPU Segmentation Border2
+MPUSEGB1=\$5A6! \ MPU Segmentation Border1
+MPUSAM=\$5A8! \ MPU access management
+MPUIPC0=\$5AA! \ MPU IP control 0
+MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
+
+UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
+UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
+UCA0BRW=\$5C6!
+UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
+UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
+UCA0STAT=\$5CA! \ eUSCI_A status
+UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
+UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
+UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
+UCA0IE=\$5DA! \ eUSCI_A interrupt enable
+UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
+UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
+UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
+UCA1BRW=\$5E6!
+UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
+UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
+UCA1STAT=\$5EA! \ eUSCI_A status
+UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
+UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
+UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
+UCA1IE=\$5FA! \ eUSCI_A interrupt enable
+UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
+UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
+
+UCB0CTLW0=\$640! \ eUSCI_B control word 0
+UCB0CTLW1=\$642! \ eUSCI_B control word 1
+UCB0BRW=\$646!
+UCB0BR0=\$646! \ eUSCI_B bit rate 0
+UCB0BR1=\$647! \ eUSCI_B bit rate 1
+UCB0STATW=\$648! \ eUSCI_B status word
+UCBCNT0=\$649! \ eUSCI_B hardware count
+UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$65C! \ eUSCI_B received address
+UCB0ADDMASK=\$65E! \ eUSCI_B address mask
+UCB0I2CSA=\$660! \ eUSCI I2C slave address
+UCB0IE=\$66A! \ eUSCI interrupt enable
+UCB0IFG=\$66C! \ eUSCI interrupt flags
+UCB0IV=\$66E! \ eUSCI interrupt vector word