;https://forth-standard.org/standard/core/AND
;C AND x1 x2 -- x3 logical AND
FORTHWORD "AND"
-ANDD AND @PSP+,TOS
+ANDD AND @PSP+,TOS
MOV @IP+,PC
.ENDIF
FORTHWORD "{SD_TOOLS}"
MOV @IP+,PC
-; read logical sector and dump it
+; read logical sector and dump it
; ----------------------------------;
FORTHWORD "SECTOR." ; sector. -- don't forget to add decimal point to your sector number (if < 65536)
; ----------------------------------;
.word NUMGREATER ; ud -- display the double number
.word TYPE,SPACE ;
.word lit,SD_BUF
- .word lit,200h,DUMP ;
+ .word lit,200h,DUMP ;
.word EXIT ;
; ----------------------------------;
CLUSTER1 RRA W ; shift one right multiplicator
JNC CLUSTERLOOP ; if not carry
ADD &OrgClusters,X ; add OrgClusters = sector of virtual cluster 0 (word size)
- MOV X,0(PSP)
+ MOV X,0(PSP)
ADDC #0,TOS ; don't forget carry
JMP SECTOR ; jump to a defined word
; ----------------------------------;
\
\ it's an example:
+\ https://forth-standard.org/standard/core/DUP
+\ DUP x -- x x duplicate top of stack
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,PSP \ 2 push old TOS..
+ MOV TOS,0(PSP) \ 3 ..onto stack
+ MOV @IP+,PC \ 4
+ ENDCODE
+
+\ https://forth-standard.org/standard/core/qDUP
+\ ?DUP x -- 0 | x x DUP if nonzero
+ CODE ?DUP
+ CMP #0,TOS \ 2 test for TOS nonzero
+ 0<> ?GOTO BW1 \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
+\ https://forth-standard.org/standard/core/DROP
+\ DROP x -- drop top of stack
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @PSP+,TOS \ 2
+ MOV @IP+,PC \ 4
+ ENDCODE
+ [THEN]
+
[UNDEFINED] =
[IF]
\ https://forth-standard.org/standard/core/Equal
\ because the risk of crushing thereafter.
\ Interpreting mode as below is required:
\ ------------------------------------------------------------------------------
- 4 = \ from SYS
+ DUP 4 = \ TOS = SYS value
[IF] \ if PUC event is <SW1+RESET> or -1 SYS
+ DROP
RST_RET \ remove definitions above
LOAD" SD_TEST.4TH" \ load a file to test the SD_Card driver
[ELSE] \ else
- ' SYS $0A + EXECUTE \ resumes WARM to remove definitions above
+ ' SYS $0A + EXECUTE \ return to n SYS to remove definitions above
[THEN] \ then
ECHO
-10000 89,0 POL2REC . . ; sin, cos -->
-10000 75,0 POL2REC . . ; sin, cos -->
-10000 60,0 POL2REC . . ; sin, cos -->
-10000 45,0 POL2REC . . ; sin, cos -->
-10000 30,0 POL2REC . . ; sin, cos -->
-10000 15,0 POL2REC . . ; sin, cos -->
-10000 1,0 POL2REC . . ; sin, cos -->
+10000 89,0 POL2REC . . ; sin, cos -->
+10000 75,0 POL2REC . . ; sin, cos -->
+10000 60,0 POL2REC . . ; sin, cos -->
+10000 45,0 POL2REC . . ; sin, cos -->
+10000 30,0 POL2REC . . ; sin, cos -->
+10000 15,0 POL2REC . . ; sin, cos -->
+10000 1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
-16384 30,0 POL2REC SWAP . . ; x, y -->
-16384 45,0 POL2REC SWAP . . ; x, y -->
-16384 60,0 POL2REC SWAP . . ; x, y -->
+16384 30,0 POL2REC SWAP . . ; x, y -->
+16384 45,0 POL2REC SWAP . . ; x, y -->
+16384 60,0 POL2REC SWAP . . ; x, y -->
\
-10000 -89,0 POL2REC . . ; sin, cos -->
-10000 -75,0 POL2REC . . ; sin, cos -->
-10000 -60,0 POL2REC . . ; sin, cos -->
-10000 -45,0 POL2REC . . ; sin, cos -->
-10000 -30,0 POL2REC . . ; sin, cos -->
-10000 -15,0 POL2REC . . ; sin, cos -->
-10000 -1,0 POL2REC . . ; sin, cos -->
+10000 -89,0 POL2REC . . ; sin, cos -->
+10000 -75,0 POL2REC . . ; sin, cos -->
+10000 -60,0 POL2REC . . ; sin, cos -->
+10000 -45,0 POL2REC . . ; sin, cos -->
+10000 -30,0 POL2REC . . ; sin, cos -->
+10000 -15,0 POL2REC . . ; sin, cos -->
+10000 -1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
-16384 -30,0 POL2REC SWAP . . ; x, y -->
-16384 -45,0 POL2REC SWAP . . ; x, y -->
-16384 -60,0 POL2REC SWAP . . ; x, y -->
+16384 -30,0 POL2REC SWAP . . ; x, y -->
+16384 -45,0 POL2REC SWAP . . ; x, y -->
+16384 -60,0 POL2REC SWAP . . ; x, y -->
\
--10000 89,0 POL2REC . . ; sin, cos -->
--10000 75,0 POL2REC . . ; sin, cos -->
--10000 60,0 POL2REC . . ; sin, cos -->
--10000 45,0 POL2REC . . ; sin, cos -->
--10000 30,0 POL2REC . . ; sin, cos -->
--10000 15,0 POL2REC . . ; sin, cos -->
--10000 1,0 POL2REC . . ; sin, cos -->
+-10000 89,0 POL2REC . . ; sin, cos -->
+-10000 75,0 POL2REC . . ; sin, cos -->
+-10000 60,0 POL2REC . . ; sin, cos -->
+-10000 45,0 POL2REC . . ; sin, cos -->
+-10000 30,0 POL2REC . . ; sin, cos -->
+-10000 15,0 POL2REC . . ; sin, cos -->
+-10000 1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
--16384 30,0 POL2REC SWAP . . ; x, y -->
--16384 45,0 POL2REC SWAP . . ; x, y -->
--16384 60,0 POL2REC SWAP . . ; x, y -->
+-16384 30,0 POL2REC SWAP . . ; x, y -->
+-16384 45,0 POL2REC SWAP . . ; x, y -->
+-16384 60,0 POL2REC SWAP . . ; x, y -->
\
--10000 -89,0 POL2REC . . ; sin, cos -->
--10000 -75,0 POL2REC . . ; sin, cos -->
--10000 -60,0 POL2REC . . ; sin, cos -->
--10000 -45,0 POL2REC . . ; sin, cos -->
--10000 -30,0 POL2REC . . ; sin, cos -->
--10000 -15,0 POL2REC . . ; sin, cos -->
--10000 -1,0 POL2REC . . ; sin, cos -->
+-10000 -89,0 POL2REC . . ; sin, cos -->
+-10000 -75,0 POL2REC . . ; sin, cos -->
+-10000 -60,0 POL2REC . . ; sin, cos -->
+-10000 -45,0 POL2REC . . ; sin, cos -->
+-10000 -30,0 POL2REC . . ; sin, cos -->
+-10000 -15,0 POL2REC . . ; sin, cos -->
+-10000 -1,0 POL2REC . . ; sin, cos -->
\ module phase -- X Y
--16384 -30,0 POL2REC SWAP . . ; x, y -->
--16384 -45,0 POL2REC SWAP . . ; x, y -->
--16384 -60,0 POL2REC SWAP . . ; x, y -->
+-16384 -30,0 POL2REC SWAP . . ; x, y -->
+-16384 -45,0 POL2REC SWAP . . ; x, y -->
+-16384 -60,0 POL2REC SWAP . . ; x, y -->
\
-2 1 REC2POL F. . ; phase module -->
-2 -1 REC2POL F. . ; phase module -->
-20 10 REC2POL F. . ; phase module -->
-20 -10 REC2POL F. . ; phase module -->
-200 100 REC2POL F. . ; phase module -->
-100 -100 REC2POL F. . ; phase module -->
-2000 1000 REC2POL F. . ; phase module -->
-1000 -1000 REC2POL F. . ; phase module -->
-16000 8000 REC2POL F. . ; phase module -->
-16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
+2 1 REC2POL F. . ; phase module -->
+2 -1 REC2POL F. . ; phase module -->
+20 10 REC2POL F. . ; phase module -->
+20 -10 REC2POL F. . ; phase module -->
+200 100 REC2POL F. . ; phase module -->
+100 -100 REC2POL F. . ; phase module -->
+2000 1000 REC2POL F. . ; phase module -->
+1000 -1000 REC2POL F. . ; phase module -->
+16000 8000 REC2POL F. . ; phase module -->
+16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
\ 16384 -8192 REC2POL F. . ; --> abort
\ 0 0 REC2POL F. . ; --> abort
--2 1 REC2POL F. . ; phase module -->
--2 -1 REC2POL F. . ; phase module -->
--20 10 REC2POL F. . ; phase module -->
--20 -10 REC2POL F. . ; phase module -->
--200 100 REC2POL F. . ; phase module -->
--100 -100 REC2POL F. . ; phase module -->
--2000 1000 REC2POL F. . ; phase module -->
--1000 -1000 REC2POL F. . ; phase module -->
--16000 8000 REC2POL F. . ; phase module -->
--16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
+-2 1 REC2POL F. . ; phase module -->
+-2 -1 REC2POL F. . ; phase module -->
+-20 10 REC2POL F. . ; phase module -->
+-20 -10 REC2POL F. . ; phase module -->
+-200 100 REC2POL F. . ; phase module -->
+-100 -100 REC2POL F. . ; phase module -->
+-2000 1000 REC2POL F. . ; phase module -->
+-1000 -1000 REC2POL F. . ; phase module -->
+-16000 8000 REC2POL F. . ; phase module -->
+-16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
\ 16384 -8192 REC2POL F. . ; --> abort
\ 0 0 REC2POL F. . ; --> abort
-10000 89,0 POL2REC REC2POL ROT . F.
-10000 75,0 POL2REC REC2POL ROT . F.
-10000 60,0 POL2REC REC2POL ROT . F.
-10000 45,0 POL2REC REC2POL ROT . F.
-10000 30,0 POL2REC REC2POL ROT . F.
-10000 26,565 POL2REC REC2POL ROT . F.
-10000 15,0 POL2REC REC2POL ROT . F.
-10000 14,036 POL2REC REC2POL ROT . F.
-10000 7,125 POL2REC REC2POL ROT . F.
-10000 1,0 POL2REC REC2POL ROT . F.
+10000 89,0 POL2REC REC2POL ROT . F.
+10000 75,0 POL2REC REC2POL ROT . F.
+10000 60,0 POL2REC REC2POL ROT . F.
+10000 45,0 POL2REC REC2POL ROT . F.
+10000 30,0 POL2REC REC2POL ROT . F.
+10000 26,565 POL2REC REC2POL ROT . F.
+10000 15,0 POL2REC REC2POL ROT . F.
+10000 14,036 POL2REC REC2POL ROT . F.
+10000 7,125 POL2REC REC2POL ROT . F.
+10000 1,0 POL2REC REC2POL ROT . F.
MARKER {RC5TOLCD} \ restore the state before MARKER definition
\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
8 ALLOT \ {UARTI2CS} make room to save previous INI_APP address
- \ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
- \ {RC5TOLCD}+4 make room to save previous IR_VEC
- \ {RC5TOLCD}+6 make room for 20 us count loop.
+\ {RC5TOLCD}+2 make room to save previous WDT_TIM_0_VEC
+\ {RC5TOLCD}+4 make room to save previous IR_VEC
+\ {RC5TOLCD}+6 make room for 20 us count loop.
[UNDEFINED] TSTBIT
[IF]
\ ----------------------------------\
RST_SET
-ECHO
-
MARKER {RC5TOLCD} \ restore the state before MARKER definition
\ \ {UARTI2CS}-2 = RET_ADR: by default MARKER_DOES does CALL #RET_ADR
; BOOT.4th for MSP_EXP430FR5994
; --------
- [UNDEFINED] =
+ [UNDEFINED] DUP
+ [IF]
+ CODE DUP
+BW1 SUB #2,R15
+ MOV R14,0(R15)
+ MOV @R13+,R0
+ ENDCODE
+
+ CODE ?DUP
+ CMP #0,R14
+ 0<> ?GOTO BW1
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] DROP
+ [IF]
+ CODE DROP
+ MOV @R15+,R14
+ MOV @R13+,R0
+ ENDCODE
+ [THEN]
+
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- $04 =
+ DUP 4 =
[IF]
+ DROP
RST_RET
- NOECHO LOAD" SD_TEST.4TH"
+ LOAD" SD_TEST.4TH"
[ELSE]
' SYS $0A + EXECUTE
[THEN]
[UNDEFINED] CR [IF]
DEFER CR
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
MOV @R13+,R0
ENDCODE
- CODE DO
+ CODE DO
SUB #2,R15
MOV R14,0(R15)
ADD #2,&$1DC8
[UNDEFINED] CASE [IF]
: CASE 0 ; IMMEDIATE
-
+
: OF
- 1+
- >R
+ 1+
+ >R
POSTPONE OVER POSTPONE =
- POSTPONE IF
- POSTPONE DROP
- R>
- ; IMMEDIATE
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
: ENDOF
- >R
- POSTPONE ELSE
- R>
- ; IMMEDIATE
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
: ENDCASE
POSTPONE DROP
- 0 DO
- POSTPONE THEN
- LOOP
- ; IMMEDIATE
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
[THEN]
[UNDEFINED] S_ [IF]
CMP #0,&$1DBC
0= IF MOV @R13+,R0
THEN
- COLON
+ COLON
$1B
POSTPONE LITERAL
POSTPONE EMIT
[THEN]
: BAD_MHz
- $20 DUP EMIT
+ $20 DUP EMIT
ABORT" only for 1,4,8,16,24 MHz MCLK!"
;
ESC [8;42;80t
41 0 DO CR LOOP
ESC [H
-
+
$1800 @ DUP >R
." target MCLK = " 1000 U/ . ." MHz" CR
." choose your baudrate:" CR
R> CASE
#24000 OF $4 $0
ENDOF
- 24000 <
+ 24000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
R> CASE
#24000 OF $4 $EE00 ENDOF
#20000 OF $4 $0 ENDOF
- 20000 <
+ 20000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
#24000 OF $6 $0 ENDOF
#20000 OF $5 $0 ENDOF
#16000 OF $4 $0 ENDOF
- 16000 <
+ 16000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
#20000 OF $6 $D600 ENDOF
#16000 OF $5 $4900 ENDOF
#12000 OF $4 $0 ENDOF
- 12000 <
+ 12000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
#16000 OF $8 $D600 ENDOF
#12000 OF $6 $AA00 ENDOF
#8000 OF $5 $9200 ENDOF
- 8000 <
+ 8000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
#12000 OF $0D $0200 ENDOF
#8000 OF $8 $D600 ENDOF
#4000 OF $4 $4900 ENDOF
- 4000 <
+ 4000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
#8000 OF $11 $4A00 ENDOF
#4000 OF $8 $D600 ENDOF
#2000 OF $4 $4900 ENDOF
- 2000 <
+ 2000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
#4000 OF $11 $4A00 ENDOF
#2000 OF $8 $D600 ENDOF
#1000 OF $4 $4900 ENDOF
- 1000 <
+ 1000 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
#2000 OF $11 $4A00 ENDOF
#1000 OF $8 $D600 ENDOF
#500 OF $4 $4900 ENDOF
- 500 <
+ 500 <
IF OVR_BAUDS
THEN BAD_MHz
ENDCASE
." Change baudrate in Teraterm, save its setup, then reset target."
;
- CHNGBAUD
+ CHNGBAUD
39797 ,
39797 ,
- [UNDEFINED] DABS
+ [UNDEFINED] DABS
[IF]
CODE DABS
AND #-1,R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
[THEN]
RST_SET
-
+
CODE TSTBIT
MOV @R15+,R9
AND @R9,R14
[IF] ; MSP430FRxxxx with hardware_MPY
- [UNDEFINED] HOLDS
+ [UNDEFINED] HOLDS
[IF]
CODE HOLDS
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] F#S
+ [UNDEFINED] F#S
[IF]
CODE F#S
MOV 2(R15),R9
[ELSE] ; no hardware multiplier
- [UNDEFINED] HOLDS
+ [UNDEFINED] HOLDS
[IF]
CODE HOLDS
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] F#S
+ [UNDEFINED] F#S
[IF]
CODE F#S
MOV @R15,R12
CMP #0,R14
0<> WHILE
CMP #14,R13
- 0= UNTIL
+ 0= UNTIL
THEN
CALL #XSCALE
MOV R9,0(R15)
THEN
MOV R9,R12
CMP #0,R12
- S< IF
+ S< IF
XOR #-1,R12
ADD #1,R12
THEN
0= IF
CMP #0,R8
0= IF
- LO2HI
+ LO2HI
ABORT" null inputs!"
HI2LO
THEN
THEN
CALL #XSCALE
POPM #2,R13
- GOTO FW1
+ GOTO FW1
BEGIN
RRA R9
FW1 RRA R12
ENDCODE
- [UNDEFINED] F.
+ [UNDEFINED] F.
[IF]
CODE F.
MOV R14,R12
RST_SET
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] ROT
+ [UNDEFINED] ROT
[IF]
CODE ROT
MOV @R15,R10
ECHO
-10000 89,0 POL2REC . . ; sin, cos -->
-10000 75,0 POL2REC . . ; sin, cos -->
-10000 60,0 POL2REC . . ; sin, cos -->
-10000 45,0 POL2REC . . ; sin, cos -->
-10000 30,0 POL2REC . . ; sin, cos -->
-10000 15,0 POL2REC . . ; sin, cos -->
-10000 1,0 POL2REC . . ; sin, cos -->
-16384 30,0 POL2REC SWAP . . ; x, y -->
-16384 45,0 POL2REC SWAP . . ; x, y -->
-16384 60,0 POL2REC SWAP . . ; x, y -->
-
-10000 -89,0 POL2REC . . ; sin, cos -->
-10000 -75,0 POL2REC . . ; sin, cos -->
-10000 -60,0 POL2REC . . ; sin, cos -->
-10000 -45,0 POL2REC . . ; sin, cos -->
-10000 -30,0 POL2REC . . ; sin, cos -->
-10000 -15,0 POL2REC . . ; sin, cos -->
-10000 -1,0 POL2REC . . ; sin, cos -->
-16384 -30,0 POL2REC SWAP . . ; x, y -->
-16384 -45,0 POL2REC SWAP . . ; x, y -->
-16384 -60,0 POL2REC SWAP . . ; x, y -->
-
--10000 89,0 POL2REC . . ; sin, cos -->
--10000 75,0 POL2REC . . ; sin, cos -->
--10000 60,0 POL2REC . . ; sin, cos -->
--10000 45,0 POL2REC . . ; sin, cos -->
--10000 30,0 POL2REC . . ; sin, cos -->
--10000 15,0 POL2REC . . ; sin, cos -->
--10000 1,0 POL2REC . . ; sin, cos -->
--16384 30,0 POL2REC SWAP . . ; x, y -->
--16384 45,0 POL2REC SWAP . . ; x, y -->
--16384 60,0 POL2REC SWAP . . ; x, y -->
-
--10000 -89,0 POL2REC . . ; sin, cos -->
--10000 -75,0 POL2REC . . ; sin, cos -->
--10000 -60,0 POL2REC . . ; sin, cos -->
--10000 -45,0 POL2REC . . ; sin, cos -->
--10000 -30,0 POL2REC . . ; sin, cos -->
--10000 -15,0 POL2REC . . ; sin, cos -->
--10000 -1,0 POL2REC . . ; sin, cos -->
--16384 -30,0 POL2REC SWAP . . ; x, y -->
--16384 -45,0 POL2REC SWAP . . ; x, y -->
--16384 -60,0 POL2REC SWAP . . ; x, y -->
-
-
-2 1 REC2POL F. . ; phase module -->
-2 -1 REC2POL F. . ; phase module -->
-20 10 REC2POL F. . ; phase module -->
-20 -10 REC2POL F. . ; phase module -->
-200 100 REC2POL F. . ; phase module -->
-100 -100 REC2POL F. . ; phase module -->
-2000 1000 REC2POL F. . ; phase module -->
-1000 -1000 REC2POL F. . ; phase module -->
-16000 8000 REC2POL F. . ; phase module -->
-16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
-
--2 1 REC2POL F. . ; phase module -->
--2 -1 REC2POL F. . ; phase module -->
--20 10 REC2POL F. . ; phase module -->
--20 -10 REC2POL F. . ; phase module -->
--200 100 REC2POL F. . ; phase module -->
--100 -100 REC2POL F. . ; phase module -->
--2000 1000 REC2POL F. . ; phase module -->
--1000 -1000 REC2POL F. . ; phase module -->
--16000 8000 REC2POL F. . ; phase module -->
--16000 -8000 REC2POL F. . ; phase module -->
-16000 0 REC2POL F. . ; phase module -->
-0 16000 REC2POL F. . ; phase module -->
-
-10000 89,0 POL2REC REC2POL ROT . F.
-10000 75,0 POL2REC REC2POL ROT . F.
-10000 60,0 POL2REC REC2POL ROT . F.
-10000 45,0 POL2REC REC2POL ROT . F.
-10000 30,0 POL2REC REC2POL ROT . F.
-10000 26,565 POL2REC REC2POL ROT . F.
-10000 15,0 POL2REC REC2POL ROT . F.
-10000 14,036 POL2REC REC2POL ROT . F.
-10000 7,125 POL2REC REC2POL ROT . F.
-10000 1,0 POL2REC REC2POL ROT . F.
+10000 89,0 POL2REC . . ; sin, cos -->
+10000 75,0 POL2REC . . ; sin, cos -->
+10000 60,0 POL2REC . . ; sin, cos -->
+10000 45,0 POL2REC . . ; sin, cos -->
+10000 30,0 POL2REC . . ; sin, cos -->
+10000 15,0 POL2REC . . ; sin, cos -->
+10000 1,0 POL2REC . . ; sin, cos -->
+16384 30,0 POL2REC SWAP . . ; x, y -->
+16384 45,0 POL2REC SWAP . . ; x, y -->
+16384 60,0 POL2REC SWAP . . ; x, y -->
+
+10000 -89,0 POL2REC . . ; sin, cos -->
+10000 -75,0 POL2REC . . ; sin, cos -->
+10000 -60,0 POL2REC . . ; sin, cos -->
+10000 -45,0 POL2REC . . ; sin, cos -->
+10000 -30,0 POL2REC . . ; sin, cos -->
+10000 -15,0 POL2REC . . ; sin, cos -->
+10000 -1,0 POL2REC . . ; sin, cos -->
+16384 -30,0 POL2REC SWAP . . ; x, y -->
+16384 -45,0 POL2REC SWAP . . ; x, y -->
+16384 -60,0 POL2REC SWAP . . ; x, y -->
+
+-10000 89,0 POL2REC . . ; sin, cos -->
+-10000 75,0 POL2REC . . ; sin, cos -->
+-10000 60,0 POL2REC . . ; sin, cos -->
+-10000 45,0 POL2REC . . ; sin, cos -->
+-10000 30,0 POL2REC . . ; sin, cos -->
+-10000 15,0 POL2REC . . ; sin, cos -->
+-10000 1,0 POL2REC . . ; sin, cos -->
+-16384 30,0 POL2REC SWAP . . ; x, y -->
+-16384 45,0 POL2REC SWAP . . ; x, y -->
+-16384 60,0 POL2REC SWAP . . ; x, y -->
+
+-10000 -89,0 POL2REC . . ; sin, cos -->
+-10000 -75,0 POL2REC . . ; sin, cos -->
+-10000 -60,0 POL2REC . . ; sin, cos -->
+-10000 -45,0 POL2REC . . ; sin, cos -->
+-10000 -30,0 POL2REC . . ; sin, cos -->
+-10000 -15,0 POL2REC . . ; sin, cos -->
+-10000 -1,0 POL2REC . . ; sin, cos -->
+-16384 -30,0 POL2REC SWAP . . ; x, y -->
+-16384 -45,0 POL2REC SWAP . . ; x, y -->
+-16384 -60,0 POL2REC SWAP . . ; x, y -->
+
+
+2 1 REC2POL F. . ; phase module -->
+2 -1 REC2POL F. . ; phase module -->
+20 10 REC2POL F. . ; phase module -->
+20 -10 REC2POL F. . ; phase module -->
+200 100 REC2POL F. . ; phase module -->
+100 -100 REC2POL F. . ; phase module -->
+2000 1000 REC2POL F. . ; phase module -->
+1000 -1000 REC2POL F. . ; phase module -->
+16000 8000 REC2POL F. . ; phase module -->
+16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
+
+-2 1 REC2POL F. . ; phase module -->
+-2 -1 REC2POL F. . ; phase module -->
+-20 10 REC2POL F. . ; phase module -->
+-20 -10 REC2POL F. . ; phase module -->
+-200 100 REC2POL F. . ; phase module -->
+-100 -100 REC2POL F. . ; phase module -->
+-2000 1000 REC2POL F. . ; phase module -->
+-1000 -1000 REC2POL F. . ; phase module -->
+-16000 8000 REC2POL F. . ; phase module -->
+-16000 -8000 REC2POL F. . ; phase module -->
+16000 0 REC2POL F. . ; phase module -->
+0 16000 REC2POL F. . ; phase module -->
+
+10000 89,0 POL2REC REC2POL ROT . F.
+10000 75,0 POL2REC REC2POL ROT . F.
+10000 60,0 POL2REC REC2POL ROT . F.
+10000 45,0 POL2REC REC2POL ROT . F.
+10000 30,0 POL2REC REC2POL ROT . F.
+10000 26,565 POL2REC REC2POL ROT . F.
+10000 15,0 POL2REC REC2POL ROT . F.
+10000 14,036 POL2REC REC2POL ROT . F.
+10000 7,125 POL2REC REC2POL ROT . F.
+10000 1,0 POL2REC REC2POL ROT . F.
: ABORT_TEST \ flag --
$0D EMIT \ return to column 1
-POSTPONE {CORETEST} \ remove all test words
+POSTPONE {CORETEST} \ remove all test words
ABORT" {CORE_ANS} word set not found !"
;
: CORETESTSUCCESS
$0D EMIT \ -- $0D return to column 1
$0A BASE ! \ set decimal
-{CORETEST} \ remove all test words
+{CORETEST} \ remove all test words
." CORETEST + COREPLUSTEST success!" \ true --
;
\ DO 0 LOOP
\ ELSE 0 DO DROP LOOP THEN
\ THEN ;
-\
+\
\ : ERROR \ ( C-ADDR U -- ) DISPLAY AN ERROR MESSAGE FOLLOWED BY
\ \ THE LINE THAT HAD THE ERROR.
\ TYPE SOURCE TYPE CR \ DISPLAY LINE CORRESPONDING TO ERROR
: ACCEPT-TEST
CR ." PLEASE TYPE UP TO 80 CHARACTERS: "
-ABUF 80 \ ACCEPT \ JMT
+ABUF 80 \ ACCEPT \ JMT
['] ACCEPT >BODY \ JMT: find default part of deferred ACCEPT
EXECUTE \ JMT: execute ACCEPT
CR ." RECEIVED: " [CHAR] " EMIT
\ but WITHOUT ANY WARRANTY; without even the implied warranty of
\ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-\ The tests are not claimed to be comprehensive or correct
+\ The tests are not claimed to be comprehensive or correct
\ -----------------------------------------------------------------------------
\ The tests are based on John Hayes test program for the core word set
\ n2 is the value of I in a DO ... +LOOP
\ n3 is a test value
\ If n2=n3 then return n1-n2 else return 1
-: SET-I ( n1 n2 n3 -- n1-n2 | 1 )
+: SET-I ( n1 n2 n3 -- n1-n2 | 1 )
OVER = IF - ELSE 2DROP 1 THEN
;
T{ : GC5 S" A string"2DROP ; GC5 -> }T
T{ ( A comment)1234 -> 1234 }T
T{ : PB1 CR ." You should see 2345: "." 2345"( A comment) CR ; PB1 -> }T
-
+
\ -----------------------------------------------------------------------------
TESTING number prefixes # $ % and 'c' character input
\ Adapted from the Forth 200X Draft 14.5 document
T{ HERE 5 ALLOT -5 ALLOT HERE = -> <TRUE> }T
T{ HERE 0 ALLOT HERE = -> <TRUE> }T
-
+
\ -----------------------------------------------------------------------------
CR .( End of additional Core tests) \ "
MARKER {DOUBLE}
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] 0<
+ [UNDEFINED] 0<
[IF]
CODE 0<
ADD R14,R14
ENDCODE
[THEN]
- [UNDEFINED] DROP
+ [UNDEFINED] DROP
[IF]
CODE DROP
MOV @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] DUP
+ [UNDEFINED] DUP
[IF]
CODE DUP
BW1 SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] NIP
+ [UNDEFINED] NIP
[IF]
CODE NIP
ADD #2,R15
ENDCODE
[THEN]
- [UNDEFINED] UM/MOD
+ [UNDEFINED] UM/MOD
[IF]
CODE UM/MOD
PUSH #DROP
$180E @ 0< ; test the switch: $8000 / SYMETRIC DIVISION
[IF] ; $8000 DIVISION
- [UNDEFINED] FM/MOD
+ [UNDEFINED] FM/MOD
[IF]
CODE FM/MOD
MOV R14,R12
XOR #-1,R14
ADD #1,R14
THEN
-
+
CMP #0,0(R15)
0<> IF
CMP #1,R14
[THEN]
[ELSE] ; SYMETRIC DIVISION
- [UNDEFINED] SM/REM
+ [UNDEFINED] SM/REM
[IF]
CODE SM/REM
MOV R14,R12
[THEN]
[THEN]
- [UNDEFINED] /
+ [UNDEFINED] /
[IF]
: /
>R DUP 0< R>
[ $180E @ 0< ] [IF]
FM/MOD
- [ELSE]
+ [ELSE]
SM/REM
[THEN]
NIP
;
[THEN]
- [UNDEFINED] @
+ [UNDEFINED] @
[IF]
CODE @
MOV @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] !
+ [UNDEFINED] !
[IF]
CODE !
MOV @R15+,0(R14)
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] ROT
+ [UNDEFINED] ROT
[IF]
CODE ROT
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] <
+ [UNDEFINED] <
[IF]
CODE <
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] TO
+ [UNDEFINED] TO
[IF]
CODE TO
BIS #$200,R2
ENDCODE
[THEN]
- [UNDEFINED] DOES>
+ [UNDEFINED] DOES>
[IF]
- CODE DOES>
+ CODE DOES>
MOV &$1DB8,R10
MOV #$1285,0(R10)
MOV R13,2(R10)
ENDCODE
[THEN]
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
CODE SPACES
CMP #0,R14
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] 2@
+ [UNDEFINED] 2@
[IF]
CODE 2@
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] 2!
+ [UNDEFINED] 2!
[IF]
CODE 2!
MOV @R15+,0(R14)
ENDCODE
[THEN]
- [UNDEFINED] 2DUP
+ [UNDEFINED] 2DUP
[IF]
CODE 2DUP
SUB #4,R15
ENDCODE
[THEN]
- [UNDEFINED] 2DROP
+ [UNDEFINED] 2DROP
[IF]
CODE 2DROP
ADD #2,R15
ENDCODE
[THEN]
- [UNDEFINED] 2SWAP
+ [UNDEFINED] 2SWAP
[IF]
CODE 2SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] 2OVER
+ [UNDEFINED] 2OVER
[IF]
CODE 2OVER
SUB #4,R15
ENDCODE
[THEN]
- [UNDEFINED] 2>R
+ [UNDEFINED] 2>R
[IF]
CODE 2>R
PUSH @R15+
ENDCODE
[THEN]
- [UNDEFINED] 2R@
+ [UNDEFINED] 2R@
[IF]
CODE 2R@
SUB #4,R15
ENDCODE
[THEN]
- [UNDEFINED] 2R>
+ [UNDEFINED] 2R>
[IF]
CODE 2R>
SUB #4,R15
[THEN]
- [UNDEFINED] D.
+ [UNDEFINED] D.
[IF]
CODE D.
MOV R14,R12
ENDCODE
[THEN]
- [UNDEFINED] 2ROT
+ [UNDEFINED] 2ROT
[IF]
CODE 2ROT
MOV 8(R15),R9
ENDCODE
[THEN]
- [UNDEFINED] D>S
+ [UNDEFINED] D>S
[IF]
CODE D>S
MOV @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] D0=
+ [UNDEFINED] D0=
[IF]
CODE D0=
CMP #0,R14
ENDCODE
[THEN]
- [UNDEFINED] D0<
+ [UNDEFINED] D0<
[IF]
CODE D0<
CMP #0,R14
ENDCODE
[THEN]
- [UNDEFINED] D=
+ [UNDEFINED] D=
[IF]
CODE D=
CMP R14,2(R15)
ENDCODE
[THEN]
- [UNDEFINED] D<
+ [UNDEFINED] D<
[IF]
CODE D<
CMP R14,2(R15)
ENDCODE
[THEN]
- [UNDEFINED] DU<
+ [UNDEFINED] DU<
[IF]
CODE DU<
CMP R14,2(R15)
ENDCODE
[THEN]
- [UNDEFINED] D+
+ [UNDEFINED] D+
[IF]
CODE D+
BW1 ADD @R15+,2(R15)
ENDCODE
[THEN]
- [UNDEFINED] D-
+ [UNDEFINED] D-
[IF]
CODE D-
SUB @R15+,2(R15)
ENDCODE
[THEN]
- [UNDEFINED] DNEGATE
+ [UNDEFINED] DNEGATE
[IF]
CODE DNEGATE
XOR #-1,0(R15)
ENDCODE
[THEN]
- [UNDEFINED] DABS
+ [UNDEFINED] DABS
[IF]
CODE DABS
CMP #0,R14
ENDCODE
[THEN]
- [UNDEFINED] D2/
+ [UNDEFINED] D2/
[IF]
CODE D2/
RRA R14
ENDCODE
[THEN]
- [UNDEFINED] D2*
+ [UNDEFINED] D2*
[IF]
CODE D2*
ADD @R15,0(R15)
ENDCODE
[THEN]
- [UNDEFINED] DMAX
+ [UNDEFINED] DMAX
[IF]
: DMAX
2OVER 2OVER
;
[THEN]
- [UNDEFINED] DMIN
+ [UNDEFINED] DMIN
[IF]
: DMIN
2OVER 2OVER
D< IF
2DROP
- ELSE
+ ELSE
2>R 2DROP 2R>
THEN
;
[THEN]
RST_SET
-
+
CODE TSTBIT
MOV @R15+,R9
AND @R9,R14
[IF] ; MSP430FRxxxx with hardware_MPY
- [UNDEFINED] M*/
+ [UNDEFINED] M*/
[IF]
CODE M*/
MOV 4(R15),&$4D4
THEN
[ELSE] ; no hardware multiplier
- [UNDEFINED] M*/
+ [UNDEFINED] M*/
[IF]
CODE M*/
MOV #0,R6
CMP #0,R10
0<> IF
SUB #1,0(R15)
- SUBC #0,R14
+ SUBC #0,R14
THEN
THEN
- THEN
- MOV #$40B6,R5
- MOV #$40C4,R6
+ THEN
+ MOV #$40B6,R5
+ MOV #$40C4,R6
MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] 2VARIABLE
+ [UNDEFINED] 2VARIABLE
[IF]
: 2VARIABLE
- CREATE
+ CREATE
HI2LO
ADD #4,&$1DC8
MOV @R1+,R13
ENDCODE
[THEN]
- [UNDEFINED] 2CONSTANT
+ [UNDEFINED] 2CONSTANT
[IF]
: 2CONSTANT
CREATE
;
[THEN]
- [UNDEFINED] 2VALUE
+ [UNDEFINED] 2VALUE
[IF]
: 2VALUE
CREATE , ,
BIT #$200,R2
0= IF
MOV #2@,R0
- THEN
+ THEN
BIC #$200,R2
MOV #2!,R0
ENDCODE
[THEN]
- [UNDEFINED] 2LITERAL
+ [UNDEFINED] 2LITERAL
[IF]
CODE 2LITERAL
BIS #$200,R2
MOV #LITERAL,R0
ENDCODE IMMEDIATE
[THEN]
-
- [UNDEFINED] D.R
+
+ [UNDEFINED] D.R
[IF]
: D.R
- >R SWAP OVER DABS <# #S ROT SIGN #>
- R> OVER - SPACES TYPE
+ >R SWAP OVER DABS <# #S ROT SIGN #>
+ R> OVER - SPACES TYPE
;
[THEN]
; Complement to pass DOUBLE TESTS
- [UNDEFINED] VARIABLE
+ [UNDEFINED] VARIABLE
[IF]
- : VARIABLE
+ : VARIABLE
CREATE
HI2LO
MOV #$1287,-4(R10)
ENDCODE
[THEN]
- [UNDEFINED] CONSTANT
+ [UNDEFINED] CONSTANT
[IF]
- : CONSTANT
+ : CONSTANT
CREATE
HI2LO
MOV R14,-2(R10)
ENDCODE
[THEN]
- [UNDEFINED] CELLS
+ [UNDEFINED] CELLS
[IF]
CODE CELLS
ADD R14,R14
ENDCODE
[THEN]
- [UNDEFINED] DEPTH
+ [UNDEFINED] DEPTH
[IF]
CODE DEPTH
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] DO
+ [UNDEFINED] DO
[IF]
HDNCODE XDO
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
HDNCODE XPLOO
ADD R14,0(R1)
MOV @R15+,R14
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] I
+ [UNDEFINED] I
[IF]
CODE I
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] 0=
+ [UNDEFINED] 0=
[IF]
CODE 0=
SUB #1,R14
ENDCODE
[THEN]
- [UNDEFINED] SOURCE
+ [UNDEFINED] SOURCE
[IF]
CODE SOURCE
SUB #4,R15
ENDCODE
[THEN]
- [UNDEFINED] >IN
+ [UNDEFINED] >IN
[IF]
$1DC6 CONSTANT >IN
[THEN]
- [UNDEFINED] 1+
+ [UNDEFINED] 1+
[IF]
CODE 1+
ADD #1,R14
ENDCODE
[THEN]
- [UNDEFINED] CHAR
+ [UNDEFINED] CHAR
[IF]
: CHAR
$20 WORD 1+ C@
;
[THEN]
- [UNDEFINED] [CHAR]
+ [UNDEFINED] [CHAR]
[IF]
: [CHAR]
CHAR POSTPONE LITERAL
; IMMEDIATE
[THEN]
- [UNDEFINED] 2/
+ [UNDEFINED] 2/
[IF]
CODE 2/
RRA R14
ENDCODE
[THEN]
- [UNDEFINED] INVERT
+ [UNDEFINED] INVERT
[IF]
CODE INVERT
XOR #-1,R14
ENDCODE
[THEN]
- [UNDEFINED] RSHIFT
+ [UNDEFINED] RSHIFT
[IF]
CODE RSHIFT
MOV @R15+,R10
ENDCODE
[THEN]
- [UNDEFINED] S>D
+ [UNDEFINED] S>D
[IF]
: S>D
DUP 0<
;
[THEN]
- [UNDEFINED] 1-
+ [UNDEFINED] 1-
[IF]
CODE 1-
SUB #1,R14
ENDCODE
[THEN]
- [UNDEFINED] NEGATE
+ [UNDEFINED] NEGATE
[IF]
CODE NEGATE
XOR #-1,R14
ENDCODE
[THEN]
- [UNDEFINED] HERE
+ [UNDEFINED] HERE
[IF]
CODE HERE
MOV #$4032,R0
ENDCODE
[THEN]
- [UNDEFINED] CHARS
+ [UNDEFINED] CHARS
[IF]
CODE CHARS
MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] MOVE
+ [UNDEFINED] MOVE
[IF]
CODE MOVE
MOV R14,R10
ENDCODE
[THEN]
- [UNDEFINED] DECIMAL
+ [UNDEFINED] DECIMAL
[IF]
CODE DECIMAL
MOV #$0A,&$1DBE
ENDCODE
[THEN]
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
$1DBE CONSTANT BASE
[THEN]
[UNDEFINED] ( ; )
[IF]
- : (
+ : (
')' WORD DROP
; IMMEDIATE
[THEN]
; IMMEDIATE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
DEFER CR
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
CODE BEGIN
MOV #$4032,R0
ENDCODE IMMEDIATE
-
+
CODE UNTIL
MOV #$40AC,R9
BW1 ADD #4,&$1DC8
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
CODE AGAIN
MOV #$40B2,R9
GOTO BW1
ENDCODE IMMEDIATE
[THEN]
-
+
[UNDEFINED] WHILE
[IF]
: WHILE
POSTPONE IF SWAP
; IMMEDIATE
[THEN]
-
+
[UNDEFINED] REPEAT
[IF]
: REPEAT
MOV @R13+,R0
ENDCODE
- CODE DO
+ CODE DO
SUB #2,R15
MOV R14,0(R15)
ADD #2,&$1DC8
ENDCODE
[THEN]
- [UNDEFINED] 2/
+ [UNDEFINED] 2/
[IF]
CODE 2/
RRA R14
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[UNDEFINED] CASE
[IF]
: CASE
- 0
+ 0
; IMMEDIATE
: OF
- 1+
- >R
- POSTPONE OVER
+ 1+
+ >R
+ POSTPONE OVER
POSTPONE =
- POSTPONE IF
- POSTPONE DROP
- R>
- ; IMMEDIATE
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
: ENDOF
- >R
- POSTPONE ELSE
- R>
- ; IMMEDIATE
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
: ENDCASE
POSTPONE DROP
- 0 DO
- POSTPONE THEN
- LOOP
- ; IMMEDIATE
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
[THEN]
[UNDEFINED] S_
MOV R9,0(R15)
MOV.B @R9+,R14
RRA R14
- MOV R14,R10
+ MOV R14,R10
BIT #1,R10
- 0= IF
+ 0= IF
ADD #1,R10
THEN
ADD R9,R10
ESC [7m
CR ." FastForth V"
- $180A @
+ $180A @
0 <# # $08 HOLD # '.' HOLD #S #> TYPE
." for MSP430FR"
HERE
ELSE ." DTC=3,"
THEN
THEN
- $20 EMIT
+ $20 EMIT
$180C @ U. $08 EMIT
." -Entry word set, "
$1800 @ 0 1000 UM/MOD U.
ESC [0m
CR
- ." /COUNTED-STRING = 255" CR
+ ." /COUNTED-STRING = 255" CR
." /HOLD = 34" CR
." /PAD = 84" CR
." ADDRESS-UNIT-BITS = 16" CR
2* DUP 0< IF 2* DUP 0< IF ." DOUBLE and "
THEN ." Q15.16 numbers handling" CR
ELSE 2* DUP 0< IF ." DOUBLE numbers handling" CR
- THEN
- THEN
- 2* DUP 0< IF ." MSP430_X assembler with TI's syntax"
+ THEN
+ THEN
+ 2* DUP 0< IF ." MSP430_X assembler with TI's syntax"
CR 2* 2*
ELSE
- 2* DUP
+ 2* DUP
0< IF ." MSP430 Assembler"
2* DUP
0< IF ." , 20bits extended addresses,"
THEN
." with TI's syntax" CR
THEN DROP
- [DEFINED] FORTH [IF] ." word-set management" CR
+ [DEFINED] FORTH [IF] ." word-set management" CR
[THEN]
[DEFINED] LOAD" [IF] ." SD_CARD Load" CR
[THEN]
- [DEFINED] BOOT [IF] ." SD_CARD Bootloader" CR
+ [DEFINED] BOOT [IF] ." SD_CARD Bootloader" CR
[THEN]
- [DEFINED] READ" [IF] ." SD_CARD Read/Write" CR
+ [DEFINED] READ" [IF] ." SD_CARD Read/Write" CR
[THEN]
$1DCA
@ ?DUP
WHILE
DUP $180C @ 2* -
- CR ESC [7m
+ CR ESC [7m
[DEFINED] FORTH
[IF] DUP BODY>SQNFA
[ELSE] OVER @
THEN
[THEN]
TYPE ." word-set"
- ESC [0m CR
+ ESC [0m CR
WORDS CR
REPEAT
[THEN]
[DEFINED] {DOUBLE} [IF] CR ." DOUBLE word set"
[THEN]
- [DEFINED] {UTILITY} [IF] CR ." UTILITY"
+ [DEFINED] {UTILITY} [IF] CR ." UTILITY"
[THEN]
- [DEFINED] {FIXPOINT} [IF] CR ." Q15.16 ADD SUB MUL DIV"
+ [DEFINED] {FIXPOINT} [IF] CR ." Q15.16 ADD SUB MUL DIV"
[THEN]
[DEFINED] {CORDIC} [IF] CR ." CORDIC engine"
[THEN]
- [DEFINED] {SD_TOOLS} [IF] CR ." SD_TOOLS"
+ [DEFINED] {SD_TOOLS} [IF] CR ." SD_TOOLS"
[THEN]
- [DEFINED] {RTC} [IF] CR ." RTC utility"
+ [DEFINED] {RTC} [IF] CR ." RTC utility"
[THEN]
- [DEFINED] {UARTI2CS} [IF] CR ." UART to I2C_FastForth bridge"
+ [DEFINED] {UARTI2CS} [IF] CR ." UART to I2C_FastForth bridge"
[THEN]
CR
0 SYS
COLON
$0D EMIT
ABORT" FastForth V3.9 please!"
- [UNDEFINED] WRITE
+ [UNDEFINED] WRITE
[IF]
1 ABORT" no SD_CARD_READ_WRITE addon!"
[THEN]
MARKER {SD_TEST}
- [UNDEFINED] EXIT
+ [UNDEFINED] EXIT
[IF]
CODE EXIT
MOV @R1+,R13
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
ENDCODE
[THEN]
- [UNDEFINED] 0=
+ [UNDEFINED] 0=
[IF]
CODE 0=
SUB #1,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] BEGIN
+ [UNDEFINED] BEGIN
[IF]
CODE BEGIN
MOV #$4032,R0
MOV @R13+,R0
ENDCODE
- CODE DO
+ CODE DO
SUB #2,R15
MOV R14,0(R15)
ADD #2,&$1DC8
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] I
+ [UNDEFINED] I
[IF]
CODE I
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] MAX
+ [UNDEFINED] MAX
[IF]
CODE MAX
CMP @R15,R14
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] SPACE
+ [UNDEFINED] SPACE
[IF]
: SPACE
$20 EMIT ;
[THEN]
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
CODE SPACES
CMP #0,R14
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] DUP
+ [UNDEFINED] DUP
[IF]
CODE DUP
BW1 SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] CONSTANT
+ [UNDEFINED] CONSTANT
[IF]
- : CONSTANT
+ : CONSTANT
CREATE
HI2LO
MOV R14,-2(R10)
ENDCODE
[THEN]
- [UNDEFINED] STATE
+ [UNDEFINED] STATE
[IF]
$1DBC CONSTANT STATE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
-
+
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] U.R
+ [UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
$1DBE CONSTANT BASE
[THEN]
- [UNDEFINED] DUMP
+ [UNDEFINED] DUMP
[IF]
CODE DUMP
PUSH R13
DO I C@ 3 U.R LOOP
SPACE
I $10 + I 8 +
- DO I C@ 3 U.R LOOP
+ DO I C@ 3 U.R LOOP
SPACE SPACE
I $10 + I
DO I C@ $7E MIN $20 MAX EMIT LOOP
;
[THEN]
- [UNDEFINED] HERE
+ [UNDEFINED] HERE
[IF]
CODE HERE
MOV #BEGIN,R0
[THEN]
- [UNDEFINED] DROP
+ [UNDEFINED] DROP
[IF]
CODE DROP
MOV @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] 1+
+ [UNDEFINED] 1+
[IF]
CODE 1+
ADD #1,R14
ENDCODE
[THEN]
- [UNDEFINED] = [IF]
+ [UNDEFINED] =
+ [IF]
CODE =
SUB @R15+,R14
0<> IF
ENDCODE
[THEN]
- [UNDEFINED] CASE
+ [UNDEFINED] CASE
[IF]
: CASE
- 0
+ 0
; IMMEDIATE
: OF
- 1+
- >R
- POSTPONE OVER
+ 1+
+ >R
+ POSTPONE OVER
POSTPONE =
- POSTPONE IF
- POSTPONE DROP
- R>
- ; IMMEDIATE
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
: ENDOF
- >R
- POSTPONE ELSE
- R>
- ; IMMEDIATE
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
: ENDCASE
POSTPONE DROP
- 0 DO
- POSTPONE THEN
- LOOP
- ; IMMEDIATE
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
[THEN]
CODE SD_EMIT
MOV @R13+,R0
ENDCODE
-: DOESWRITE
+ : DOESWRITE
['] SD_EMIT IS EMIT
$4000 HERE OVER - DUMP
['] EMIT >BODY IS EMIT
CLOSE
- ." , done"
-;
+ ;
: SD_TEST
ECHO
- $0D EMIT
+ $0D EMIT CR
+ ." ----------" CR
+ ." Bootloader" CR
+ ." ----------" CR
." ? Fast Forth Specifs" CR
." 0 Set date and time" CR
- ." 1 Load {UTILTY} words" CR
+ ." 1 Load {UTILITY} words" CR
." 2 Load {SD_TOOLS} words" CR
." 3 Load {CORE_COMP} words" CR
." 4 Load ANS core tests" CR
- ." 5 Load a 10k program " CR
- ." 6 Read only this source file" CR
+ ." 5 Load a source file to make 10k program" CR
+ ." 6 Read it only (47k)" CR
." 7 write FORTH dump in YOURFILE.TXT" CR
." 8 append FORTH dump to YOURFILE.TXT" CR
- ." 9 Load TST_WORDS" CR
- ." your choice : "
- KEY DUP EMIT CR
+ ." 9 delete YOURFILE.TXT" CR
+ ." your choice: "
+ KEY DUP EMIT
{SD_TEST}
CASE
'?' OF LOAD" FF_SPECS.4TH" ENDOF
'1' OF LOAD" UTILITY.4TH" ENDOF
'2' OF LOAD" SD_TOOLS.4TH" ENDOF
'3' OF LOAD" CORE_ANS.4TH" ENDOF
- '4' OF LOAD" CORETEST.4TH" ENDOF
+ '4' OF LOAD" CORETEST.4TH" ENDOF
'5' OF LOAD" PROG10K.4TH" ENDOF
'6' OF READ" PROG10K.4TH"
BEGIN READ
- UNTIL ." , done" ENDOF
- '7' OF ECHO
- WRITE" YOURFILE.TXT"
+ UNTIL ENDOF
+ '7' OF WRITE" YOURFILE.TXT"
DOESWRITE ENDOF
- '8' OF ECHO
- APPEND" YOURFILE.TXT"
+ '8' OF APPEND" YOURFILE.TXT"
DOESWRITE ENDOF
- '9' OF LOAD" TSTWORDS.4TH" ENDOF
+ '9' OF DEL" YOURFILE.TXT" ENDOF
ENDCASE
+ CR
;
- [THEN]
-
SD_TEST
[UNDEFINED] VARIABLE
[IF]
- : VARIABLE
+ : VARIABLE
CREATE
HI2LO
MOV #$1287,-4(R10)
[UNDEFINED] CONSTANT
[IF]
- : CONSTANT
+ : CONSTANT
CREATE
HI2LO
MOV R14,-2(R10)
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
[UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
ADD #2,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
CODE THEN
MOV &$1DC8,0(R14)
MOV @R15+,R14
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] BEGIN
+ [UNDEFINED] BEGIN
[IF]
CODE BEGIN
MOV #$4032,R0
ENDCODE IMMEDIATE
-
+
CODE UNTIL
MOV #$40AC,R9
BW1 ADD #4,&$1DC8
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
CODE AGAIN
MOV #$40B2,R9
GOTO BW1
ENDCODE IMMEDIATE
-
+
: WHILE
POSTPONE IF SWAP
; IMMEDIATE
-
+
: REPEAT
POSTPONE AGAIN POSTPONE THEN
; IMMEDIATE
[THEN]
- [UNDEFINED] DO
+ [UNDEFINED] DO
[IF]
HDNCODE XDO
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
HDNCODE XPLOO
ADD R14,0(R1)
MOV @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
$1DBE CONSTANT BASE
[THEN]
DO I C@ 3 U.R LOOP
SPACE
I $10 + I 8 +
- DO I C@ 3 U.R LOOP
+ DO I C@ 3 U.R LOOP
SPACE SPACE
I $10 + I
DO I C@ $7E MIN $20 MAX EMIT LOOP
CMP #%10,&BASE
0<> IF MOV #2,&BASE
ELSE MOV #$0A,&BASE
- THEN
+ THEN
COLON
BASE @ U.
;
[THEN]
: BYTES_TABLE_IDX
-CREATE
+CREATE
0 DO I C,
LOOP
DOES>
CODE IDX_TEST1
MOV.B BYTES_TABLE1(R14),R14
COLON
- U.
-;
+ U.
+;
0 IDX_TEST1 ; you should see 1 -->
TABLE 2 - CONSTANT PFA_TABLE
-CODE REDIRECT ; <table> -- redirects TABLE to argument <table>
+CODE REDIRECT ; <table> -- redirects TABLE to argument <table>
MOV R14,&PFA_TABLE
MOV @R15+,R14
MOV @R13+,R0
ENDCODE
-CODE REDIRECT0 ; -- redirects TABLE to TABLE0
+CODE REDIRECT0 ; -- redirects TABLE to TABLE0
MOV #TABLE0,&PFA_TABLE
MOV @R13+,R0
ENDCODE
-CODE REDIRECT10 ; -- redirects TABLE to TABLE10
+CODE REDIRECT10 ; -- redirects TABLE to TABLE10
MOV #TABLE10,&PFA_TABLE
MOV @R13+,R0
ENDCODE
-CODE REDIRECT20 ; -- redirects TABLE to TABLE20
+CODE REDIRECT20 ; -- redirects TABLE to TABLE20
MOV #TABLE20,&PFA_TABLE
MOV @R13+,R0
ENDCODE
SUB #2,R15
MOV R14,0(R15)
MOV @R13+,R0
-ENDCODE ; leaves its execution address (CFA) on stack
+ENDCODE ; leaves its execution address (CFA) on stack
DUP .
TRUC . ; display R14 value -->
-
+
' TRUC >BODY IS TRUC ; TRUC is reinitialized with its default action
-TRUC . ; display R14 value -->
+TRUC . ; display R14 value -->
+++ /dev/null
-
-
-MARKER {PID}
-
-[UNDEFINED] VARIABLE [IF]
-: VARIABLE
-CREATE
-HI2LO
-MOV @R1+,R13
-MOV #$1287,-4(R10)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] CONSTANT [IF]
-: CONSTANT
-CREATE
-HI2LO
-MOV R14,-2(R10)
-MOV @R15+,R14
-MOV @R1+,R13
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] STATE [IF]
-$1DBC CONSTANT STATE
-[THEN]
-
-[UNDEFINED] ROT [IF]
-CODE ROT
-MOV @R15,R10
-MOV R14,0(R15)
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SWAP [IF]
-CODE SWAP
-MOV @R15,R10
-MOV R14,0(R15)
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DUP [IF]
-CODE DUP
-BW1 SUB #2,R15
- MOV R14,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-CODE ?DUP
-CMP #0,R14
-0<> ?GOTO BW1
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] AND [IF]
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] SPACE [IF]
-: SPACE
-$20 EMIT ;
-[THEN]
-
-[UNDEFINED] R> [IF]
-CODE R>
-MOV R7,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] @ [IF]
-CODE @
-MOV @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] ! [IF]
-CODE !
-MOV @R15+,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] C@ [IF]
-CODE C@
-MOV.B @R14,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 1+ [IF]
-CODE 1+
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] + [IF]
-CODE +
-ADD @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] - [IF]
-CODE -
-SUB @R15+,R14
-XOR #-1,R14
-ADD #1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] MAX [IF]
-CODE MAX
- CMP @R15,R14
- S< ?GOTO FW1
-BW1 ADD #2,R15
- MOV @R13+,R0
-ENDCODE
-
-CODE MIN
- CMP @R15,R14
- S< ?GOTO BW1
-FW1 MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-[THEN]
-
-
-[UNDEFINED] 2NIP [IF]
-CODE 2NIP
-MOV @R15,R9
-ADD #4,R15
-MOV R9,0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DUP [IF]
-CODE 2DUP
-SUB #4,R15
-MOV R14,2(R15)
-MOV 4(R15),0(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2SWAP [IF]
-CODE 2SWAP
-MOV @R15,R10
-MOV 4(R15),0(R15)
-MOV R10,4(R15)
-MOV R14,R10
-MOV 2(R15),R14
-MOV R10,2(R15)
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2ROT [IF]
-CODE 2ROT
-MOV 8(R15),R9
-MOV 6(R15),R8
-MOV 4(R15),8(R15)
-MOV 2(R15),6(R15)
-MOV @R15,4(R15)
-MOV R14,2(R15)
-MOV R9,0(R15)
-MOV R8,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2DROP [IF]
-CODE 2DROP
-ADD #2,R15
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2OVER [IF]
-CODE 2OVER
-SUB #4,R15
-MOV R14,2(R15)
-MOV 8(R15),0(R15)
-MOV 6(R15),R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] DABS [IF]
-CODE DABS
-AND #-1,R14
-U< IF
- XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] 2@ [IF]
-
-
- CODE 2@
- SUB #2,R15
- MOV 2(R14),0(R15)
- MOV @R14,R14
- MOV @R13+,R0
- ENDCODE
-[THEN]
-
-[UNDEFINED] 2! [IF]
-
-
- CODE 2!
- MOV @R15+,0(R14)
- MOV @R15+,2(R14)
- MOV @R15+,R14
- MOV @R13+,R0
- ENDCODE
-[THEN]
-
-CODE 2>R
-PUSH @R15+
-PUSH R14
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-CODE 2R@
-SUB #4,R15
-MOV R14,2(R15)
-MOV @R1,R14
-MOV 2(R1),0(R15)
-MOV @R13+,R0
-ENDCODE
-
-CODE 2R>
-SUB #4,R15
-MOV R14,2(R15)
-MOV @R1+,R14
-MOV @R1+,0(R15)
-MOV @R13+,R0
-ENDCODE
-
-[UNDEFINED] 2VARIABLE [IF]
-: 2VARIABLE
-CREATE 4 ALLOT
-;
-[THEN]
-
-[UNDEFINED] 2CONSTANT [IF]
-
- : 2CONSTANT
- CREATE , ,
- DOES> 2@
- ;
-[THEN]
-
-[UNDEFINED] <> [IF]
-CODE <>
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] = [IF]
-CODE =
-SUB @R15+,R14
-0<> IF
- AND #0,R14
- MOV @R13+,R0
-THEN
-XOR #-1,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] U< [IF]
-CODE U<
-SUB @R15+,R14
-0<> IF
- MOV #-1,R14
- U< IF
- AND #0,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IF [IF]
-CODE IF
-SUB #2,R15
-MOV R14,0(R15)
-MOV &$1DC8,R14
-ADD #4,&$1DC8
-MOV #$40AC,0(R14)
-ADD #2,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] THEN [IF]
-CODE THEN
-MOV &$1DC8,0(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] ELSE [IF]
-CODE ELSE
-ADD #4,&$1DC8
-MOV &$1DC8,R10
-MOV #$40B2,-4(R10)
-MOV R10,0(R14)
-SUB #2,R10
-MOV R10,R14
-MOV @R13+,R0
-ENDCODE IMMEDIATE
-[THEN]
-
-[UNDEFINED] DEFER! [IF]
-CODE DEFER!
-MOV @R15+,2(R14)
-MOV @R15+,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] IS [IF]
-: IS
-STATE @
-IF POSTPONE ['] POSTPONE DEFER!
-ELSE ' DEFER!
-THEN
-; IMMEDIATE
-[THEN]
-
-[UNDEFINED] >BODY [IF]
-CODE >BODY
-ADD #4,R14
-MOV @R13+,R0
-ENDCODE
-[THEN]
-
-CODE F+
-BW1 ADD @R15+,2(R15)
- ADDC @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE F-
-BW1 SUB @R15+,2(R15)
- SUBC R14,0(R15)
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-CODE HOLDS
-BW3 MOV @R15+,R9
- ADD R14,R9
- MOV &$1DB2,R8
-BEGIN SUB #1,R9
- SUB #1,R14
-U>= WHILE SUB #1,R8
- MOV.B @R9,0(R8)
-REPEAT MOV R8,&$1DB2
- MOV @R15+,R14
- MOV @R13+,R0
-ENDCODE
-
-$1A00 4 + @ $81F3 U<
-$81EF $1A00 4 + @ U<
-= [IF] ; MSP430FR2xxx|MSP430FR4xxx subfamilies without hardware_MPY
-
-
-CODE F/
- PUSHM #4,R7
- MOV @R15+,R6
- MOV @R15+,R9
- MOV #0,R10
- MOV @R15,R8
- MOV #0,R11
- MOV R9,R12
- XOR R14,R12
- AND #-1,R9
-S< IF XOR #-1,R8
- XOR #-1,R9
- ADD #1,R8
- ADDC #0,R9
-THEN AND #-1,R14
-S< IF XOR #-1,R6
- XOR #-1,R14
- ADD #1,R6
- ADDC #0,R14
-THEN
- MOV #32,R5
-BW1 CMP R14,R10
- 0= IF CMP R6,R9
- THEN
- U>= IF SUB R6,R9
- SUBC R14,R10
- THEN
-BW2 ADDC R7,R7
- ADDC R4,R4
- SUB #1,R5
- 0< ?GOTO FW1
- ADD R11,R11
- ADDC R8,R8
- ADDC R9,R9
- ADDC R10,R10
- U< ?GOTO BW1
- SUB R6,R9
- SUBC R14,R10
- BIS #1,R2
- GOTO BW2
-FW1
- MOV R7,0(R15)
- MOV R4,R14
- POPM #4,R7
-BW1 AND #-1,R12
-S< IF XOR #-1,0(R15)
- XOR #-1,R14
- ADD #1,0(R15)
- ADDC #0,R14
-THEN MOV @R13+,R0
-ENDCODE
-
-CODE F#S
- MOV 2(R15),R9
- MOV @R15,2(R15)
- MOV R9,0(R15)
- PUSHM #2,R14
- MOV #0,R12
-BEGIN PUSH R12
- MOV &$1DBE,R14
- LO2HI
- UM*
- HI2LO
- SUB #2,R13
- CMP #10,R14
- U>= IF ADD #7,R14
- THEN ADD #$30,R14
- MOV @R1+,R12
- MOV.B R14,$1D90(R12)
- ADD #1,R12
- CMP 2(R1),R12
-U>= UNTIL
- POPM #2,R14
- MOV #0,0(R15)
- SUB #2,R15
- MOV #$1D90,0(R15)
- GOTO BW3
-ENDCODE
-
-CODE UDM*
- PUSH R13
- PUSHM #4,R7
- MOV 4(R15),R13
- MOV 2(R15),R11
- MOV @R15,R10
- MOV #0,R4
- MOV #0,R5
- MOV #0,4(R15)
- MOV #0,2(R15)
- MOV #0,R6
- MOV #0,R7
- MOV #1,R9
- MOV #0,R8
-BEGIN CMP #0,R9
- 0<> IF BIT R9,R10
- ELSE BIT R8,R14
- THEN
- 0<> IF ADD R13,4(R15)
- ADDC R11,2(R15)
- ADDC R4,R6
- ADDC R5,R7
- THEN ADD R13,R13
- ADDC R11,R11
- ADDC R4,R4
- ADDC R5,R5
- ADD R9,R9
- ADDC R8,R8
-U>= UNTIL MOV R6,0(R15)
- MOV R7,R14
- POPM #4,R7
- MOV @R1+,R13
- MOV @R13+,R0
-ENDCODE
-
-CODE F*
- MOV 2(R15),R12
- XOR R14,R12
- BIT #$8000,2(R15)
-0<> IF XOR #-1,2(R15)
- XOR #-1,4(R15)
- ADD #1,4(R15)
- ADDC #0,2(R15)
-THEN
- COLON
- DABS UDM*
- HI2LO
- MOV @R1+,R13
- MOV @R15+,R14
- MOV @R15+,0(R15)
- GOTO BW1
-ENDCODE
-
-[ELSE]
-
-CODE F/
- PUSHM #4,R7
- MOV @R15+,R6
- MOV @R15+,R9
- MOV #0,R10
- MOV @R15,R8
- MOV #0,R11
- MOV R9,R12
- XOR R14,R12
- AND #-1,R9
-S< IF XOR #-1,R8
- XOR #-1,R9
- ADD #1,R8
- ADDC #0,R9
-THEN AND #-1,R14
-S< IF XOR #-1,R6
- XOR #-1,R14
- ADD #1,R6
- ADDC #0,R14
-THEN MOV #32,R5
-BW1 CMP R14,R10
- 0= IF
- CMP R6,R9
- THEN
- U>= IF
- SUB R6,R9
- SUBC R14,R10
- THEN
-BW2 ADDC R7,R7
- ADDC R4,R4
- SUB #1,R5
- 0< ?GOTO FW1
- ADD R11,R11
- ADDC R8,R8
- ADDC R9,R9
- ADDC R10,R10
- U< ?GOTO BW1
- SUB R6,R9
- SUBC R14,R10
- BIS #1,R2
- GOTO BW2
-FW1 AND #-1,R12
-S< IF XOR #-1,R7
- XOR #-1,R4
- ADD #1,R7
- ADDC #0,R4
-THEN MOV R7,0(R15)
- MOV R4,R14
- POPM #4,R7
- MOV @R13+,R0
-ENDCODE
-
-CODE F#S
- MOV 2(R15),R9
- MOV @R15,2(R15)
- MOV R9,0(R15)
- MOV R14,R11
- MOV #0,R12
-BEGIN MOV @R15,&$4C0
- MOV &$1DBE,&$4C8
- MOV &$4E4,0(R15)
- MOV &$4E6,R14
- CMP #10,R14
- U>= IF ADD #7,R14
- THEN ADD #$30,R14
- MOV.B R14,$1D90(R12)
- ADD #1,R12
- CMP R11,R12
-0= UNTIL MOV #0,0(R15)
- MOV R11,R14
- SUB #2,R15
- MOV #$1D90,0(R15)
- GOTO BW3
-ENDCODE
-
-CODE F*
- MOV 4(R15),&$4D4
- MOV 2(R15),&$4D6
- MOV @R15,&$4E0
- MOV R14,&$4E2
- ADD #4,R15
- MOV &$4E6,0(R15)
- MOV &$4E8,R14
- MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-CODE F.N
-MOV R14,R11
-MOV @R15+,R14
-MOV R14,R12
-PUSHM #3,R13
-LO2HI
- <# DABS
- R> F#S
- $2C HOLD
- #S
- R> SIGN #>
- TYPE SPACE
-;
-
-
-CODE D<
- MOV @R15+,R12
- MOV @R15+,R11
- MOV @R15+,R10
-BW1 CMP R14,R11
- MOV #0,R14
-S< IF MOV #-1,R14
-THEN
-0= IF CMP R12,R10
- S< IF MOV #-1,R14
- THEN
-THEN
-MOV @R13+,R0
-ENDCODE
-
-CODE D>
-MOV R14,R11
-MOV @R15+,R10
-MOV @R15+,R14
-MOV @R15+,R12
-GOTO BW1
-ENDCODE
-
-CODE S2F
- SUB #2,R15
- MOV #0,0(R15)
- MOV @R13+,R0
-ENDCODE
-
-: F2S
- SWAP $8000 AND IF 1 + THEN ;
-
-: DMIN
- 2OVER 2OVER
- D< IF 2DROP ELSE 2NIP THEN
-;
-
-: DMAX
- 2OVER 2OVER
- D> IF 2DROP ELSE 2NIP THEN
-;
-
-: DRANGE
- 2ROT DMIN DMAX
-;
-
-: RANGE
- ROT MIN MAX
-;
-
-: F.000 3 F.N ;
-
-2VARIABLE KP
-2VARIABLE KI
-2VARIABLE KD
-VARIABLE SETPOINT
-
-VARIABLE SAMPLE_TIME
-VARIABLE OUT_MAX
-VARIABLE OUT_MIN
-VARIABLE OUT-OVERRIDE
-
-VARIABLE SET-VAL
-VARIABLE INPUT_PREV
-2VARIABLE I_SUM
-
-VARIABLE DEBUG
-0 DEBUG !
-
-: ?DEBUG DEBUG @ ;
-
-
-
-: CALC-R6
-KP 2@ F*
-?DEBUG IF ." Pval:" 2DUP F2S .
-THEN
-;
-
-
-: CALC-I
-KI 2@ F*
-I_SUM 2@ F+
-OUT_MIN @ S2F
-OUT_MAX @ S2F
-DRANGE
-2DUP I_SUM 2!
-?DEBUG IF ." Ival:" 2DUP F2S .
-THEN
-;
-
-: CALC-D
-
- INPUT_PREV @ -
- S2F KD 2@ F*
-?DEBUG IF ." Dval:" 2DUP F2S .
-THEN
-;
-
-: PID_COMPUTE
-DUP DUP SET-VAL @ SWAP - S2F
-2DUP CALC-R6
-2SWAP CALC-I F+
-ROT CALC-D F-
-
-F2S
-?DEBUG IF ." OUT:" DUP .
-THEN
-SWAP INPUT_PREV !
-OUT_MIN @ OUT_MAX @ RANGE
-?DEBUG IF ." PWM:" DUP .
-THEN
-;
-
-
-: SET
- SET-VAL ! ;
-
-: TUNING
-
-
- SAMPLE_TIME @ S2F 1000,0 F/ 2>R
-
- 2R@ F/ KD 2!
- 2R> F* KI 2!
- KP 2! ;
-
-: PID-INIT
- OUT_MAX !
- OUT_MIN !
- SAMPLE_TIME !
- TUNING
- 0 OUT-OVERRIDE !
- CR ." PID initialized - kp:" KP 2@ F.000 ." ki:" KI 2@ F.000 ." kd:" KD 2@ F.000
-;
-
-: PID
- OUT-OVERRIDE @ -1 = IF
- PID_COMPUTE
- ELSE
- CR ." SET:" SET-VAL @ . ." IS:" DUP .
- INPUT_PREV !
- OUT-OVERRIDE @
- ." PWM:" DUP .
- THEN ;
-
-: MANUAL
- OUT-OVERRIDE ! ;
-
-
-: AUTO
- OUT-OVERRIDE @ -1 <> IF
-
- OUT-OVERRIDE @
- OUT_MIN @ OUT_MAX @ RANGE
- S2F I_SUM 2!
- -1 OUT-OVERRIDE !
- THEN ;
-
-: AUTOHOLD
- INPUT_PREV @ SET-VAL !
- AUTO ;
-
-
-
-
-CODE STOP
- MOV @R13+,R0
-ENDCODE
-
-CODE APP_INIT
- MOV @R13+,R0
-ENDCODE
-
-CODE START
- MOV @R13+,R0
-ENDCODE
-
-
-ECHO
MARKER {RC5TOLCD}
8 ALLOT
-
-
-
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
ENDCODE
RST_SET
-ECHO
-
MARKER {RC5TOLCD}
8 ALLOT
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
MOV #$4082,-2(R10)
$180E $3C00 TSTBIT
[IF]
- MOV @R10+,&UART_WARM+2
+ MOV @R10+,&$4186+2
[ELSE]
MOV @R10+,&$4180+2
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MOV #STOP_R2L,&{RC5TOLCD}-2
$180E $3C00 TSTBIT
[IF]
- MOV &UART_WARM+2,&{RC5TOLCD}
- MOV #INIT_R2L,&UART_WARM+2
+ MOV &$4186+2,&{RC5TOLCD}
+ MOV #INIT_R2L,&$4186+2
[ELSE]
MOV &$4180+2,&{RC5TOLCD}
MOV #INIT_R2L,&$4180+2
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT
MOV @R15+,R9
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
BIS.B #$0F,&$224
COLON
TOP_LCD 2 20_US
- TOP_LCD 2 20_US
+ TOP_LCD 2 20_US
;
CODE LCD_WRF
[THEN]
MOV @R10+,&$FFEA
MOV @R10+,&$FFDE
- THEN
+ THEN
MOV @R1+,R0
ENDCODE
HDNCODE INIT_R2L
MOV #%10_1101_0100,&$3C0
- $1800 @ 16000 =
+ $1800 @ 16000 =
[IF]
MOV #1,&$3A0
MOV #1,&$3E0
[THEN]
- $1800 @ 24000 =
+ $1800 @ 24000 =
[IF]
MOV #2,&$3A0
MOV #2,&$3E0
MARKER {RTC}
- [UNDEFINED] OR
+ [UNDEFINED] OR
[IF]
CODE OR
BIS @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] C!
+ [UNDEFINED] C!
[IF]
CODE C!
MOV.B @R15+,0(R14)
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] DUP
+ [UNDEFINED] DUP
[IF]
CODE DUP
BW1 SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] DROP
+ [UNDEFINED] DROP
[IF]
CODE DROP
MOV @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] DEPTH
+ [UNDEFINED] DEPTH
[IF]
CODE DEPTH
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] 1+
+ [UNDEFINED] 1+
[IF]
CODE 1+
ADD #1,R14
ENDCODE
[THEN]
- [UNDEFINED] 1-
+ [UNDEFINED] 1-
[IF]
CODE 1-
SUB #1,R14
ENDCODE
[THEN]
- [UNDEFINED] U<
+ [UNDEFINED] U<
[IF]
CODE U<
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
MOV @R13+,R0
ENDCODE
- CODE DO
+ CODE DO
SUB #2,R15
MOV R14,0(R15)
ADD #2,&$1DC8
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] BEGIN
+ [UNDEFINED] BEGIN
[IF]
CODE BEGIN
MOV #$4032,R0
ENDCODE IMMEDIATE
-
+
CODE UNTIL
MOV #$40AC,R9
BW1 ADD #4,&$1DC8
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
CODE AGAIN
MOV #$40B2,R9
GOTO BW1
ENDCODE IMMEDIATE
-
+
: WHILE
POSTPONE IF SWAP
; IMMEDIATE
-
+
: REPEAT
POSTPONE AGAIN POSTPONE THEN
; IMMEDIATE
[THEN]
- [UNDEFINED] CASE
+ [UNDEFINED] CASE
[IF]
- : CASE
- 0
+ : CASE
+ 0
; IMMEDIATE
: OF
- 1+
- >R
+ 1+
+ >R
POSTPONE OVER POSTPONE =
- POSTPONE IF
- POSTPONE DROP
- R>
- ; IMMEDIATE
+ POSTPONE IF
+ POSTPONE DROP
+ R>
+ ; IMMEDIATE
: ENDOF
- >R
- POSTPONE ELSE
- R>
- ; IMMEDIATE
+ >R
+ POSTPONE ELSE
+ R>
+ ; IMMEDIATE
: ENDCASE
POSTPONE DROP
- 0 DO
- POSTPONE THEN
- LOOP
- ; IMMEDIATE
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
[THEN]
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] MAX
+ [UNDEFINED] MAX
[IF]
CODE MAX
CMP @R15,R14
[THEN]
- [UNDEFINED] 2*
+ [UNDEFINED] 2*
[IF]
CODE 2*
ADD R14,R14
ENDCODE
[THEN]
- [UNDEFINED] UM*
+ [UNDEFINED] UM*
[IF]
CODE UM*
MOV @R15,&$4C0
ENDCODE
[THEN]
- [UNDEFINED] UM/MOD
+ [UNDEFINED] UM/MOD
[IF]
CODE UM/MOD
PUSH #DROP
U/MOD SWAP DROP
;
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
: SPACES
BEGIN
;
[THEN]
- [UNDEFINED] U.R
+ [UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
COLON
$4B2 C@ 2 U.R ':' EMIT
$4B1 C@ 2 U.R ':' EMIT
- $4B0 C@ 2 U.R
+ $4B0 C@ 2 U.R
;
-
+
: TIME!
2 DEPTH
U< IF
$4B1 C!
$4B2 C!
THEN
- ." it is " TIME?
+ ." it is " TIME?
;
CODE DATE?
4 OF ." Wed" ENDOF
5 OF ." Thu" ENDOF
6 OF ." Fri" ENDOF
- ENDCASE
+ ENDCASE
$4B6 @
$4B5 C@
$4B4 C@
$4B5 C@
$4B6 @
OVER 3 U<
- IF 1 - SWAP 12 + SWAP
+ IF 1 - SWAP 12 + SWAP
THEN
100 U/MOD
DUP 4 U/ SWAP 2* -
SWAP 1+ 13 5 U*/ + +
7 UMOD
$4B3 C!
- ." we are on " DATE?
+ ." we are on " DATE?
;
RST_SET
- [UNDEFINED] S_
+ [UNDEFINED] S_
[IF]
CODE S_
MOV #0,&$1DC0
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ESC
+ [UNDEFINED] ESC
[IF]
CODE ESC
CMP #0,&$1DBC
0= IF MOV @R13+,R0
THEN
- COLON
+ COLON
$1B
POSTPONE LITERAL
POSTPONE EMIT
; IMMEDIATE
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
ENDCODE
[THEN]
- [UNDEFINED] EXECUTE
+ [UNDEFINED] EXECUTE
[IF]
CODE EXECUTE
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] EVALUATE
+ [UNDEFINED] EVALUATE
[IF]
CODE EVALUATE
MOV #$1DC2,R9
MOV @R1+,&$1DC6
MOV @R1+,&$1DC4
MOV @R1+,&$1DC2
- MOV @R1+,R13
+ MOV @R1+,R13
MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
CR TIME!
RST_RET
;
-
+
ECHO
SET_TIME
COLON
$0D EMIT
ABORT" FastForth V3.9 please!"
- [UNDEFINED] WRITE
+ [UNDEFINED] WRITE
[IF]
1 ABORT" no SD_CARD_READ_WRITE addon!"
[THEN]
MARKER {SD_TEST}
- [UNDEFINED] EXIT
+ [UNDEFINED] EXIT
[IF]
CODE EXIT
MOV @R1+,R13
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] >BODY
+ [UNDEFINED] >BODY
[IF]
CODE >BODY
ADD #4,R14
ENDCODE
[THEN]
- [UNDEFINED] 0=
+ [UNDEFINED] 0=
[IF]
CODE 0=
SUB #1,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] BEGIN
+ [UNDEFINED] BEGIN
[IF]
CODE BEGIN
MOV #$4032,R0
MOV @R13+,R0
ENDCODE
- CODE DO
+ CODE DO
SUB #2,R15
MOV R14,0(R15)
ADD #2,&$1DC8
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] I
+ [UNDEFINED] I
[IF]
CODE I
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] MAX
+ [UNDEFINED] MAX
[IF]
CODE MAX
CMP @R15,R14
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] SPACE
+ [UNDEFINED] SPACE
[IF]
: SPACE
$20 EMIT ;
[THEN]
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
CODE SPACES
CMP #0,R14
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] DUP
+ [UNDEFINED] DUP
[IF]
CODE DUP
BW1 SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] CONSTANT
+ [UNDEFINED] CONSTANT
[IF]
- : CONSTANT
+ : CONSTANT
CREATE
HI2LO
MOV R14,-2(R10)
ENDCODE
[THEN]
- [UNDEFINED] STATE
+ [UNDEFINED] STATE
[IF]
$1DBC CONSTANT STATE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
-
+
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] U.R
+ [UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
$1DBE CONSTANT BASE
[THEN]
- [UNDEFINED] DUMP
+ [UNDEFINED] DUMP
[IF]
CODE DUMP
PUSH R13
DO I C@ 3 U.R LOOP
SPACE
I $10 + I 8 +
- DO I C@ 3 U.R LOOP
+ DO I C@ 3 U.R LOOP
SPACE SPACE
I $10 + I
DO I C@ $7E MIN $20 MAX EMIT LOOP
;
[THEN]
- [UNDEFINED] HERE
+ [UNDEFINED] HERE
[IF]
CODE HERE
MOV #BEGIN,R0
[THEN]
- [UNDEFINED] DROP
+ [UNDEFINED] DROP
[IF]
CODE DROP
MOV @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] 1+
+ [UNDEFINED] 1+
[IF]
CODE 1+
ADD #1,R14
ENDCODE
[THEN]
- [UNDEFINED] =
+ [UNDEFINED] =
[IF]
CODE =
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] CASE
+ [UNDEFINED] CASE
[IF]
: CASE
- 0
+ 0
; IMMEDIATE
: OF
1+
>R
- POSTPONE OVER
+ POSTPONE OVER
POSTPONE =
POSTPONE IF
POSTPONE DROP
R>
- ; IMMEDIATE
+ ; IMMEDIATE
: ENDOF
>R
- POSTPONE ELSE
+ POSTPONE ELSE
R>
- ; IMMEDIATE
+ ; IMMEDIATE
: ENDCASE
POSTPONE DROP
- 0 DO
- POSTPONE THEN
- LOOP
- ; IMMEDIATE
+ 0 DO
+ POSTPONE THEN
+ LOOP
+ ; IMMEDIATE
[THEN]
CODE SD_EMIT
$0D EMIT
CR
." ----------" CR
- ." Bootloader" CR
+ ." SD_TESTS " CR
." ----------" CR
." ? Fast Forth Specifs" CR
." 0 Set date and time" CR
." 8 append FORTH dump to YOURFILE.TXT" CR
." 9 delete YOURFILE.TXT" CR
." your choice: "
- KEY DUP EMIT
+ KEY DUP EMIT CR
NOECHO
{SD_TEST}
CASE
'1' OF LOAD" UTILITY.4TH" ENDOF
'2' OF LOAD" SD_TOOLS.4TH" ENDOF
'3' OF LOAD" CORE_ANS.4TH" ENDOF
- '4' OF LOAD" CORETEST.4TH" ENDOF
+ '4' OF LOAD" CORETEST.4TH" ENDOF
'5' OF LOAD" PROG10K.4TH" ENDOF
'6' OF READ" PROG10K.4TH"
BEGIN READ
MARKER {SD_TOOLS}
- [UNDEFINED] HERE
+ [UNDEFINED] HERE
[IF]
CODE HERE
MOV #$4032,R0
ENDCODE
[THEN]
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] MAX
+ [UNDEFINED] MAX
[IF]
CODE MAX
CMP @R15,R14
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] SPACE
+ [UNDEFINED] SPACE
[IF]
: SPACE
$20 EMIT ;
[THEN]
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
CODE SPACES
CMP #0,R14
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] U.R
+ [UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
MOV @R13+,R0
ENDCODE
- CODE DO
+ CODE DO
SUB #2,R15
MOV R14,0(R15)
ADD #2,&$1DC8
[THEN]
- [UNDEFINED] I
+ [UNDEFINED] I
[IF]
CODE I
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
MOV #$40B4,R0
ENDCODE
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] DUMP
+ [UNDEFINED] DUMP
[IF]
CODE DUMP
PUSH R13
ADD @R15,R14
LO2HI
SWAP
- $FFF0 AND
DO CR
I 4 U.R SPACE
I 8 + I
DO I C@ 3 U.R LOOP
SPACE
I $10 + I 8 +
- DO I C@ 3 U.R LOOP
+ DO I C@ 3 U.R LOOP
SPACE SPACE
I $10 + I
DO I C@ $7E MIN $20 MAX EMIT LOOP
U< WHILE
ADD R9,R9
ADDC R14,R14
- REPEAT
+ REPEAT
ADD &$2010,R9
- MOV R9,0(R15)
+ MOV R9,0(R15)
ADDC #0,R14
GOTO BW1
ENDCODE
MARKER {TEST_ASMX}
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] MAX
+ [UNDEFINED] MAX
[IF]
CODE MAX
CMP @R15,R14
BW1 ADD #2,R15
MOV @R13+,R0
ENDCODE
-
+
CODE MIN
CMP @R15,R14
S< ?GOTO BW1
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] CONSTANT
+ [UNDEFINED] CONSTANT
[IF]
- : CONSTANT
+ : CONSTANT
CREATE
HI2LO
MOV R14,-2(R10)
ENDCODE
[THEN]
- [UNDEFINED] SPACE
+ [UNDEFINED] SPACE
[IF]
: SPACE
$20 EMIT ;
[THEN]
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
CODE SPACES
CMP #0,R14
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] U.R
+ [UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
- [UNDEFINED] DO
+ [UNDEFINED] DO
[IF]
HDNCODE XDO
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
HDNCODE XPLOO
ADD R14,0(R1)
MOV @R15+,R14
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] I
+ [UNDEFINED] I
[IF]
CODE I
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
DEFER CR
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
$1DBE CONSTANT BASE
[THEN]
- [UNDEFINED] DUMP
+ [UNDEFINED] DUMP
[IF]
CODE DUMP
PUSH R13
DO I C@ 3 U.R LOOP
SPACE
I $10 + I 8 +
- DO I C@ 3 U.R LOOP
+ DO I C@ 3 U.R LOOP
SPACE SPACE
I $10 + I
DO I C@ $7E MIN $20 MAX EMIT LOOP
;
[THEN]
- [UNDEFINED] HERE
+ [UNDEFINED] HERE
[IF]
CODE HERE
MOV #$4032,R0
RST_RET
; -----------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand
+; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand
; -----------------------------------------------------------------------------
; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
; you should see: 5B 12 44 33 40 18 5B 12 44 33
RST_RET
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
' # 2 + CONSTANT BASE
[THEN]
;
: %U.
-BASE @ %10 BASE ! SWAP 8 EMIT U. BASE !
+BASE @ %10 BASE ! SWAP 8 EMIT U. BASE !
RST_RET
;
MARKER {TSTWORDS}
- [UNDEFINED] 0=
+ [UNDEFINED] 0=
[IF]
CODE 0=
SUB #1,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
ADD #2,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
CODE THEN
MOV &$1DC8,0(R14)
MOV @R15+,R14
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] ELSE
+ [UNDEFINED] ELSE
[IF]
CODE ELSE
ADD #4,&$1DC8
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] BEGIN
+ [UNDEFINED] BEGIN
[IF]
CODE BEGIN
MOV #$4032,R0
ENDCODE IMMEDIATE
-
+
CODE UNTIL
MOV #$40AC,R9
BW1 ADD #4,&$1DC8
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
CODE AGAIN
MOV #$40B2,R9
GOTO BW1
ENDCODE IMMEDIATE
-
+
: WHILE
POSTPONE IF SWAP
; IMMEDIATE
-
+
: REPEAT
POSTPONE AGAIN POSTPONE THEN
; IMMEDIATE
[THEN]
- [UNDEFINED] DO
+ [UNDEFINED] DO
[IF]
HDNCODE XDO
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
HDNCODE XPLOO
ADD R14,0(R1)
MOV @R15+,R14
ECHO
-: LOOP_TEST 8 0 DO I . LOOP
+: LOOP_TEST 8 0 DO I . LOOP
;
LOOP_TEST
: LOOP_TEST1
BEGIN DUP U. 1 -
?DUP
- 0= UNTIL
+ 0= UNTIL
;
: FIND_TEST
$20 WORD
- 50000 0
+ 50000 0
DO
- DUP
+ DUP
FIND DROP DROP
LOOP
FIND
0= IF ABORT" <-- not found !"
ELSE ABORT" <-- found !"
- THEN
+ THEN
;
-\
\ No newline at end of file
+\
\ No newline at end of file
BIS.B R10,&$263
BIS.B R10,&$267
MOV #0,&$3C0
- MOV #0,&$3C6
BIC.B #$80,&$20C
BIC.B #$80,&$204
BIC.B #$40,&$21A
MOV @R10+,&$FFDE
THEN
MOV #1,R14
- MOV #UART_WARM+4,R0
+ MOV #$4186+4,R0
ENDCODE
HDNCODE I2CM_START
BIS.B #4,&$265
THEN
BIC.B #2,&$265
- MOV R0,R0
+ BEGIN
+ BIT.B #2,&$261
+ 0<> UNTIL
BIS.B #2,&$265
SUB #1,R10
0= UNTIL
BIT.B #2,&$261
0<> UNTIL
BIS.B #2,&$265
- BEGIN
- BIT #2,&$5DC
- 0<> UNTIL
- MOV.B R9,&$5CE
+ CMP.B #4,&{UARTI2CS}+9
+ 0<> IF
+ BEGIN
+ BIT #2,&$5DC
+ 0<> UNTIL
+ MOV.B R9,&$5CE
+ THEN
REPEAT
CMP.B #4,R9
U>= IF
ABORT_UTILITY
- MARKER {UTILITY}
+ MARKER {UTILITY}
- [UNDEFINED] EXIT
+ [UNDEFINED] EXIT
[IF]
CODE EXIT
MOV @R1+,R13
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] U<
+ [UNDEFINED] U<
[IF]
CODE U<
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] IF
+ [UNDEFINED] IF
[IF]
CODE IF
SUB #2,R15
CODE BEGIN
MOV #$4032,R0
ENDCODE IMMEDIATE
-
+
CODE UNTIL
MOV #$40AC,R9
BW1 ADD #4,&$1DC8
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
CODE AGAIN
MOV #$40B2,R9
GOTO BW1
ENDCODE IMMEDIATE
-
+
: WHILE
POSTPONE IF SWAP
; IMMEDIATE
-
+
: REPEAT
POSTPONE AGAIN POSTPONE THEN
; IMMEDIATE
[THEN]
- [UNDEFINED] DO
+ [UNDEFINED] DO
[IF]
HDNCODE XDO
MOV #$8000,R9
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
HDNCODE XPLOO
ADD R14,0(R1)
MOV @R15+,R14
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] I
+ [UNDEFINED] I
[IF]
CODE I
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] DUP
+ [UNDEFINED] DUP
[IF]
CODE DUP
BW1 SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] DROP
+ [UNDEFINED] DROP
[IF]
CODE DROP
MOV @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] SPACE
+ [UNDEFINED] SPACE
[IF]
: SPACE
$20 EMIT ;
[THEN]
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
CODE SPACES
CMP #0,R14
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] 2DUP
+ [UNDEFINED] 2DUP
[IF]
CODE 2DUP
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] 1+
+ [UNDEFINED] 1+
[IF]
CODE 1+
ADD #1,R14
ENDCODE
[THEN]
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] AND
+ [UNDEFINED] AND
[IF]
CODE AND
AND @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] ROT
+ [UNDEFINED] ROT
[IF]
CODE ROT
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] MAX
+ [UNDEFINED] MAX
[IF]
CODE MAX
CMP @R15,R14
BW1 ADD #2,R15
MOV @R13+,R0
ENDCODE
-
+
CODE MIN
CMP @R15,R14
S< ?GOTO BW1
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] CONSTANT
+ [UNDEFINED] CONSTANT
[IF]
- : CONSTANT
+ : CONSTANT
CREATE
HI2LO
MOV R14,-2(R10)
ENDCODE
[THEN]
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
$1DBE CONSTANT BASE
[THEN]
- [UNDEFINED] .S
+ [UNDEFINED] .S
[IF]
CODE .S
MOV R14,-2(R15)
$08 EMIT
$3E EMIT SPACE
2DUP 1+
- U< IF
+ U< IF
DROP DROP EXIT
THEN
BASE @ >R
$10 BASE !
- DO
+ DO
'$' EMIT
I @ U.
2 +LOOP
;
[THEN]
- [UNDEFINED] .RS
+ [UNDEFINED] .RS
[IF]
CODE .RS
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] ?
+ [UNDEFINED] ?
[IF]
- CODE ?
+ CODE ?
MOV @R14,R14
MOV #U.,R0
ENDCODE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
CODE CR
; IS CR
[THEN]
- [UNDEFINED] 2/
+ [UNDEFINED] 2/
[IF]
CODE 2/
RRA R14
ENDCODE
[THEN]
- [UNDEFINED] WORDS
+ [UNDEFINED] WORDS
[IF]
: WORDS
- CR
+ CR
$1DCE @ $1CE4
$180C @ DUP +
MOVE
DUP I $1CE4 + @
U< IF
DROP DROP
- I DUP
+ I DUP
$1CE4 + @
THEN
2 +LOOP
;
[THEN]
- [UNDEFINED] U.R
+ [UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
- [UNDEFINED] DUMP
+ [UNDEFINED] DUMP
[IF]
CODE DUMP
PUSH R13
DO I C@ 3 U.R LOOP
SPACE
I $10 + I 8 +
- DO I C@ 3 U.R LOOP
+ DO I C@ 3 U.R LOOP
SPACE SPACE
I $10 + I
DO I C@ $7E MIN $20 MAX EMIT LOOP
'CR' EMIT
CR
." ----------" CR
- ." Bootloader" CR
+ ." SD_TESTS " CR
." ----------" CR
." ? Fast Forth Specifs" CR
." 0 Set date and time" CR
." 8 append FORTH dump to YOURFILE.TXT" CR
." 9 delete YOURFILE.TXT" CR
." your choice: "
- KEY DUP EMIT
+ KEY DUP EMIT CR
NOECHO
{SD_TEST} \ remove {SD_TEST} application
CASE
ENDCODE
[THEN]
-\ https://forth-standard.org/standard/core/AND
-\ C AND x1 x2 -- x3 logical AND
- [UNDEFINED] AND
- [IF]
- CODE AND
- AND @PSP+,TOS
- MOV @IP+,PC
- ENDCODE
- [THEN]
-
\ https://forth-standard.org/standard/core/Plus
\ + n1/u1 n2/u2 -- n3/u3 add n1+n2
[UNDEFINED] +
ADD @PSP,TOS \ -- ORG END
LO2HI
SWAP \ -- END ORG
- $FFF0 AND \ -- END ORG_modulo_16
+\ $FFF0 AND \ -- END ORG_modulo_16
DO CR \ generate line
I 4 U.R SPACE \ generate address
I 8 + I
\ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack, with IP last poped
\
\ ASSEMBLER conditionnal usage before IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
-\ ASSEMBLER conditionnal usage before ?GOTO : S< S>= U< U>= 0= 0<> 0<
+\ ASSEMBLER conditionnal usage before ?GOTO : S< S>= U< U>= 0= 0<> 0<
\
\ ================================================================================
\ coupled to a PL2303HXD/TA cable, this driver enables a FastForth target to act as USB to I2C_Slave bridge,
\ In addition, it simulates a full duplex communication while the I2C bus is only half duplex.
\ Don't forget to wire 3k3 pull up resistors on wires SDA SCL!
\ ================================================================================
-\
+\
\ driver test : MCLK=24MHz, PL2303HXD with shortened cable (20cm), WIFI off, all windows apps closed else Scite and TERATERM.
\ ----------- .
\ . ┌────────────────────────────────┐
\ | | ║───────────────┐ ┌────────────────────────────────║ / ┌───────────────────────────────┐ |──┘
\ | | ║ | 3 wires | MSP430FR2355 @ 24MHz ║/ | MSP430FR5738 @ 24 MHz | |
\ | TERATERM -o--> USB --o--> USB2UART --o--> UART --o--> FAST FORTH ---> UARTI2CS --o--> I2C --o--> FAST FORTH with |──┘
-\ | terminal | ║ | 6 MBds | (I2C MASTER) ║ | I2C TERMINAL |
+\ | terminal | ║ | 6 MBds | (I2C MASTER) ║ | I2C TERMINAL |
\ | | ║───────────────┘ └────────────────────────────────║ └───────────────────────────────┘
-\ | | ║ |<- l=20cm->| ║
-\ └───────────────┘ ╚════════════════════════════════════════════════════════════╝
+\ | | ║ |<- l=20cm->| ║
+\ └───────────────┘ ╚════════════════════════════════════════════════════════════╝
\
\ test results :
\ ------------
\ downloading (+ interpret + compile + execute) CORETEST.4TH to I2C Master target = 1016ms.
\ downloading (+ interpret + compile + execute) CORETEST.4TH to I2C Slave target = 1422ms.
\ the difference (406 ms) is the time of the I2C Half duplex exchange.
-\ [(45906 chars * 9 bits) + (1533 * 31)] / 0,406 = 1,135 MHz (9 bits / char + (2*START + 2*STOP + 2*addr + CTRL_Char) / line)
+\ [(45906 chars * 9 bits) + (1533 * 31)] / 0,406 = 1,135 MHz (9 bits / char + (2*START + 2*STOP + 2*addr + CTRL_Char) / line)
\ ==> 113 % of I2C Fast-mode Plus (Fm+)!
-\
+\
\ also connected to and tested with another I2C_FastForth target with MCLK = 1MHz (I2C CLK = MCLK ! ).
\
\ The I2C_Slave address is defined as 'MYSLAVEADR' in forthMSP430FR.asm source file of I2C_Slave target.
-\ You can use any pin for SDA and SCL, preferably in the interval Px0...Px3.
+\ You can use any pin for SDA and SCL, preferably in the interval Px0...Px3.
\ don't forget to add 3.3k pullup resitors on wires SDA and SCL.
\
\
\ 1- the I2C bus is Master to Slave oriented, the Slave does not decide anything.
\ This order of things allows in any case to establish the connection.
\ The I2C Master device is therefore placed on the TERMINAL side and the FastForth target on the I2C Slave side.
-\ But once the link is established, we have to find a trick to reverse the roles,
+\ But once the link is established, we have to find a trick to reverse the roles,
\ so that the slave can take control of the data exchange.
\
-\ 2- The I2C bus operates on half duplex.
+\ 2- The I2C bus operates on half duplex.
\ Another trick will be to simulate an I2C_Master TERMINAL in Full Duplex mode.
\
\ 3- Without forgetting a visual effect to show the lack of I2C connection...
\ Finally, if the master receives a $FF as data, he considers the link broken,
\ it performs ABORT which forces a START RX into a 500 ms loop with an appropriate visual effect...
\
-\ Once the slave sends the CTRL_Char $00, he falls asleep,
+\ Once the slave sends the CTRL_Char $00, he falls asleep,
\ On its receipt, the master also falls asleep, awaiting a UART RX interruption.
\ As long as the TERMINAL is silent, the master and the slave remain in SLEEP mode,
\ (a part the Tx0_INT interrupt every 1/2 s).
\ |
\ GND------------------------------GND |
\ Vcc-------------o---o------------Vcc |
-\ | | |
-\ 3 3 |
-\ k k |
-\ 3 3 v
+\ | | |
+\ 3 3 |
+\ k k |
+\ 3 3 v
\ I2C_FastForth | | UARTI2CS +---------------------------------------+
\ hardware +--------------|---o-------------+ Software | +-----------------------------+ |
\ I2C Slave | +-------o----------+ | I2C Master | | +------(option)-----+ | |
\ MSP_EXP430FR5739 P1.7 P1.6 P4.0 P4.1 MSP_EXP430FR5739 P2.0 P2.1 P2.2 PL2303TA TERATERM.EXE
\ MSP_EXP430FR5969 P1.7 P1.6 P1.2 P1.3 MSP_EXP430FR5969 P2.0 P2.1 P4.1 PL2303HXD
\ MSP_EXP430FR5994 P7.1 P7.0 P8.2 P8.1 MSP_EXP430FR5994 P2.0 P2.1 P4.2 CP2102
-\ MSP_EXP430FR6989 P1.7 P1.6 P1.3 P1.5 MSP_EXP430FR6989 P3.4 P3.5 P3.0
-\ MSP_EXP430FR4133 P5.3 P5.2 P8.2 P8.3 MSP_EXP430FR4133 P1.0 P1.1 P2.3
-\ CHIPSTICK_FR2433 P1.3 P1.2 P2.0 P2.2 CHIPSTICK_FR2433 P1.4 P1.5 P3.2
-\ MSP_EXP430FR2433 P1.3 P1.2 P3.2 P3.1 MSP_EXP430FR2433 P1.4 P1.5 P1.0
-\ MSP_EXP430FR2355 P1.3 P1.2 P3.2 P3.3 MSP_EXP430FR2355 P4.3 P4.2 P2.0
-\ LP_MSP430FR2476 P4.3 P4.4 P3.2 P3.3 LP_MSP430FR2476 P1.4 P1.5 P6.1
+\ MSP_EXP430FR6989 P1.7 P1.6 P1.3 P1.5 MSP_EXP430FR6989 P3.4 P3.5 P3.0
+\ MSP_EXP430FR4133 P5.3 P5.2 P8.2 P8.3 MSP_EXP430FR4133 P1.0 P1.1 P2.3
+\ CHIPSTICK_FR2433 P1.3 P1.2 P2.0 P2.2 CHIPSTICK_FR2433 P1.4 P1.5 P3.2
+\ MSP_EXP430FR2433 P1.3 P1.2 P3.2 P3.1 MSP_EXP430FR2433 P1.4 P1.5 P1.0
+\ MSP_EXP430FR2355 P1.3 P1.2 P3.2 P3.3 MSP_EXP430FR2355 P4.3 P4.2 P2.0
+\ LP_MSP430FR2476 P4.3 P4.4 P3.2 P3.3 LP_MSP430FR2476 P1.4 P1.5 P6.1
\ first, we do some tests allowing the download
\ ------------------------\
\ USER_PARAM+8 addr = {UARTI2CS}+8 <-- I2C_Slave_Addr << 1
\ USER_PARAM+9 addr = {UARTI2CS}+9 <-- Half_Duplex flag : 4 --> NOECHO, <> 4 --> ECHO
- [UNDEFINED] TSTBIT
+ [UNDEFINED] TSTBIT
[IF]
CODE TSTBIT \ addr bit_mask -- true/flase flag
MOV @PSP+,X
\ ^^^^^^^^^^^^ OPTION ^^^^^^^^\
CALL #I2CM_STOP \ stop properly I2C_BUS
MOV #SM_BUS,W \
- BIC.B W,&I2CSM_DIR \ restore I2C_BUS I/O as input
+ BIC.B W,&I2CSM_DIR \ restore I2C_BUS I/O as input
BIS.B W,&I2CSM_OUT \ with pull up resistors
BIS.B W,&I2CSM_REN \
\ ----------------------------\
MOV @W+,&HARD_APP \ restore previous (default) HARD_APP value
MOV @W+,&SLEEP_APP \ restore previous (default) SLEEP_APP value
MOV @W+,&TERM_VEC \ restore previous (default) TERM_VEC value
- MOV @W+,&P1_VEC \ restore previous (default) P1_VEC value
+ MOV @W+,&P1_VEC \ restore previous (default) P1_VEC value
THEN
\ ----------------------------\
MOV #1,TOS \ TOS = USERSYS value we want for TERATERM(ALT+B)|USBtoI2C_bridge(SW2)|SYS_failures events
0<> UNTIL \ 2 h because Slave can strech SCL low (wake up from interrupt)
BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA state
BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
-\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^\
+\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^\
MOV @RSP+,0(RSP) \ remove RET to ReStart after a collision detection
-\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvv\
+\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvv\
MOV @RSP+,PC \ RET to Nack/Ack select
ENDCODE
\ ----------------------------------------\
\ ****************************************\
HDNCODE U2I_TERM_INT \ UART RX interrupt starts on first char of each line sent by TERMINAL
-\ ****************************************\
+\ ****************************************\
ADD #4,RSP \ 1 remove unused PC_RET and SR_RET
\ ----------------------------------------\
\ get one line from UART TERMINAL to PAD \ S = 'CR', T = 0
0<> UNTIL \ 2 )
MOV.B Y,&TERM_TXBUF \ 3 return all characters to UART_TERMINAL except CR+LF which will be later by I2C_SLAVE
THEN \
- BEGIN \
+ BEGIN \
BIT #1,&TERM_IFG \ 3 wait for next char received
- 0<> UNTIL \ 2
+ 0<> UNTIL \ 2
REPEAT \ 2 2 cycles loop ==> up to UART 2.58 Mbds @ 8MHz
CALL #UART_RXOFF \ stops UART RX still char CR is received, the LF char is being transmitted.
BEGIN \
MOV.B S,PAD_ORG(T) \ 3 store it into buffer
\ ========================================\ here I2C_Slave is sleeping in its ACCEPT routine
\ I2C MASTER TX \ now we transmit UART RX buffer (PAD) to I2C_Slave, S = LF|KEY = last char to transmit
-\ ========================================\
+\ ========================================\
\ ----------------------------------------\
\ I2C_Master_TX_Start \ S = last char UART RXed
\ ----------------------------------------\
-\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^\
+\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^\
PUSH PC \ PUSH next address as RET for START with collision detection
\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvv\
MOV #0,X \ to Start I2C_Master_TX
ENDCODE \ |
\ ****************************************\ v
-\ wakes up every 1/2s by P1.6 int to listen I2C Slave or
+\ wakes up every 1/2s by P1.6 int to listen I2C Slave or
\ break from TERMINAL/USB_to_I2C_bridge.
\ ********************************************\ |
HDNCODE 500MS_INT \ |
\ ********************************************\ |
ADD #4,RSP \ 1 remove PC_RET, SR_RET |
-\ --------------------------------------------\ |
+\ --------------------------------------------\ |
FW1 \ <────── does START <──────┘
FW2 \ <────── if Nack on Address Master TX
-\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^^^^^\
+\ ^^^^^^^^^^^ Multi-Master-Mode ^^^^^^^^^^^^^^\
PUSH PC \ PUSH next address as RET for START with collision detection
-\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvvvvvv\
+\ vvvvvvvvvvv Multi-Master-Mode vvvvvvvvvvvvvv\
\ ============================================\
\ I2C_MASTER RX \ le driver I2C_Master envoie START RX en boucle continue (X < 4) ou discontinue (X >= 4).
\ ============================================\ le test d'un break en provenance de l'UART est intégré dans cette boucle.
\ ----------------------------------------\ _
BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL to enable START RX
MOV #1,X \ to Start I2C_Master as RX
- CALL #I2CM_START \ Start MASTER RX
+ CALL #I2CM_START \ Start MASTER RX
0<> IF \ if Nack_On_Address
CALL #I2CM_STOP \ I2C_Master Send STOP
MOV #'.',&TERM_TXBUF \ to view the absence of I2C_target at the I2C_Addr provided.
MOV #SLEEP,PC \ which executes SLEEP_U2I then RXON before LPM0 shut down.
THEN \
\ ----------------------------------------\
-\ I2C_Master_RX_data \
+\ I2C_Master_RX_data \ End of RX_Data only on Ctrl_Char {$00|$01|$02|$FF}
\ ----------------------------------------\
\ vvvvvvvvvvvvv OPTION vvvvvvvvvvvvvvvvvvv\
BIS.B #LED2,&LED2_OUT \ green led ON = I2C RX
U>= WHILE \ 2 l ASCII char received, from char 'BS' up to char $7F.
\ --------------------------------\
\ I2C_Master_RX Send Ack \ on ASCII char >= $08
-\ --------------------------------\
+\ --------------------------------\
BIS.B #SM_SDA,&I2CSM_DIR \ 3 l _ set SDA as Ack
BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
BEGIN \ we must wait I2C_Slave software (data processing)
\ --------------------------------\
\ I2C_Master echoes to TERMINAL \
\ --------------------------------\
- BEGIN \
- BIT #2,&TERM_IFG \ 3 l UART TX buffer empty ?
- 0<> UNTIL \ 2 l loop if no
- MOV.B X,&TERM_TXBUF \ 3 h send RXed ASCII char to UART TERMINAL
+ CMP.B #4,&{UARTI2CS}+9 \ 3 W = HALF_DUPLEX = $04 if NOECHO, $05 if ECHO
+ 0<> IF
+ BEGIN \
+ BIT #2,&TERM_IFG \ 3 l UART TX buffer empty ?
+ 0<> UNTIL \ 2 l loop if no
+ MOV.B X,&TERM_TXBUF \ 3 h send RXed ASCII char to UART TERMINAL
+ THEN
REPEAT \ 2 l loop back to I2C_Master_RX_data for chars >= 8
\ ------------------------------------\
\ case of RX CTRL_Chars < $08 \ here Master holds SCL low, Slave can test it: CMP #8,&TERM_STATW
\ ------------------------------------\ see forthMSP430FR_TERM_I2C.asm
- CMP.B #4,X \ 1
+ CMP.B #4,X \ 1
U>= IF \ 2
MOV.B X,&{UARTI2CS}+9 \ set NOECHO = $04, ECHO = $05
BIS.B #SM_SDA,&I2CSM_DIR \ 3 l prepare Ack for Ctrl_Chars $04 $05
THEN \
\ ------------------------------------\
\ Master_RX send Ack/Nack on data \ Ack for $04, $05, Nack for $00, $01, $02
-\ ------------------------------------\ _
+\ ------------------------------------\ _
BIC.B #SM_SCL,&I2CSM_DIR \ 3 l _^ release SCL (high)
BEGIN \ we must wait I2C_Slave software (data processing)
BIT.B #SM_SCL,&I2CSM_IN \ 3 h by testing SCL released
0<> UNTIL \ 2 h (because Slave can strech SCL low)
BIT.B #SM_SDA,&I2CSM_IN \ 3 h _ get SDA as TX Ack/Nack state
BIS.B #SM_SCL,&I2CSM_DIR \ 3 h v_ SCL as output : force SCL low
-\ ------------------------------------\ l
+\ ------------------------------------\ l
0<> UNTIL \ if Ack, loop back to Master_RX data for CTRL_Char $04,$05
-\ ----------------------------------------\
+\ ----------------------------------------\
\ Nack is sent by Master \ l case of CTRL-Char {$00|$01|$02}
-\ ----------------------------------------\
+\ ----------------------------------------\
CMP.B #2,X \ $02 = ctrl_char for ABORT request
U>= WHILE \
-\ ----------------------------------------\
+\ ----------------------------------------\
\ CTRL_Char $02|$03 \ l if ABORT request, SDA is high, SCL is low
\ ----------------------------------------\
0= IF \ if ABORT request $02 :
MOV.B #0,&{UARTI2CS}+9 \ set echo ON I2C_Master side
CALL #UART_RXON \ resume UART downloading source file
- BEGIN \
+ BEGIN \
BIC #UCRXIFG,&TERM_IFG \ clear UCRXIFG
MOV &FREQ_KHZ,X \ 1000, 2000, 4000, 8000, 16000, 240000
\ BEGIN MOV #32,W \ 2~ <-------+ windows 10 seems very slow...
0= UNTIL \ 2~ 200~ loop -----+
BIT #UCRXIFG,&TERM_IFG \ 4 new char in TERMRXBUF during this delay ?
0= UNTIL \ 2 yes, the input stream may be still active: loop back
- THEN
+ THEN
REPEAT \ loop back to reSTART RX
\ --------------------------------------------\
\ I2C_Master_RX Send STOP \ remainder: CTRL_Chars $00,$01
-\ --------------------------------------------\
+\ --------------------------------------------\
CALL #I2CM_STOP \
\ vvvvvvvvvvvvvvv OPTION vvvvvvvvvvvvvvvvvvvvv\
BIC.B #LED2,&LED2_OUT \ green led OFF = endof I2C RX
\ ou en fin du temps TxIFG ==> 500MS_INT \
0= IF \ prepare U2I_TERM_INT environment
MOV #SLEEP,PC \ which executes SLEEP_U2I then RXON, enabling TERMINAL TX, before LPM0 shut down.
- THEN \
+ THEN \
\ --------------------------------------------\
\ I2C_Slave KEY ctl_char $01 \ I2C_Slave request for KEY input
\ --------------------------------------------\
CALL #UART_RXON \ enables TERMINAL to TX; use no registers
BEGIN \ wait for a char
BIT #UCRXIFG,&TERM_IFG \ received char ?
- 0<> UNTIL \
+ 0<> UNTIL \
CALL #UART_RXOFF \ stops UART RX; use no registers
MOV #0,T \ ready to store KEY char as last char to be received
GOTO BW2 \ goto end of UART RX line input
- ENDCODE \
+ ENDCODE \
\ ********************************************\
\ --------------------------------------------\
\ ----------------------------\
HDNCODE INIT_U2I \ adds the INIT_HARD_APP to HARD_APP called by PUC|WARM
-\ ----------------------------\
+\ ----------------------------\
\ init 500MS_INT \ used to scan I2C_Slave hard RESET and to slow down (re)START RX loop
-\ ----------------------------\
+\ ----------------------------\
\ MOV #%10_1101_0100,&TB0_CTL \ ACLK/4=8192Hz, up mode, clear timer
MOV #4096,&TB0CCR0 \ time 0.5s
\ ------------------------------\
MOV #4095,&TB0CCR2 \ 0.12 ms pulse
BIS.B #BIT7,&P1DIR \ P1.7 as output
BIS.B #BIT7,&P1SEL1 \ P1.7 as TB0.2 output
- BIS.B #BIT6,&P1IE
+ BIS.B #BIT6,&P1IE
\ ----------------------------\
\ init I2C_MASTER I/O \ see \inc\your_target.pat to find I2C MASTER SDA & SCL pins (as SM_BUS)
\ ----------------------------\
\ run previous INIT_HARD_APP \
\ ----------------------------\
CALL &{UARTI2CS} \ execute previous INIT_HARD_APP to init TERM_UC, activates I/O.
-\ ----------------------------\ TOS = SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
+\ ----------------------------\ TOS = SYSRSTIV = $00|$02|$04|$0E|$xx = POWER_ON|RST|SVSH_threshold|SYS_failures
\ define new SYSRSTIV select \
\ ----------------------------\
CMP #$0E,TOS \ SVSHIFG SVSH event ?
\ UARTI2CS starts the USB to I2C bridge, to quit: TERATERM(Alt-B) or USB_to_I2C_bridge(SW2)
\ --------------------------------\
- : UARTI2CS \ I2C_Addr&b0 --
+ : UARTI2CS \ I2C_Addr&b0 --
\ --------------------------------\ init UARTI2CS environment.
- 'CR' EMIT 'LF' EMIT \
+ 'CR' EMIT 'LF' EMIT \
HI2LO
MOV @RSP+,IP \
BEGIN
ENDCODE \
\ --------------------------------\
- RST_SET ECHO
+ RST_SET ECHO
$12 UARTI2CS ; TERATERM(Alt-B) or USB_to_I2C_bridge(SW2) to quit
@1800
80 3E 08 00 A1 F7 18 00 FD FF 35 01 10 00 A1 59
-EC 42 7E 41 1C 56 FC 54 5C 43 74 5E 60 4C 1A 4C
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00 00 00 00 00 00 00 00 00 00
@4000
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@FF80
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
-77 00 10 00 12 00 14 00 16 00 00 00 FA 41 FA 41
-FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 D0 42 FA 41
-FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 FA 41
-FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 FA 41
-FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 FA 41
-FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 FA 41 10 42
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+F4 41 F4 41 F4 41 F4 41 F4 41 F4 41 F4 41 F4 41
+F4 41 F4 41 F4 41 F4 41 F4 41 F4 41 F4 41 0A 42
q
--- /dev/null
+@FFE0
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
+FF FF FF FF FF FF FF FF FF FF FF FF FF FF 00 00
+q
\ No newline at end of file
; +0, +28, +48, +56, +90, +154 bytes, usefull to speed up compilation;
; the FORTH interpreter is speed up by about a square root factor of THREADS.
-FREQUENCY .equ 1 ; fully tested at 1,2,4,8,16 MHz, plus 24 MHz for MSP430FR57xx,MSP430FR2355
+FREQUENCY .equ 16 ; fully tested at 1,2,4,8,16 MHz, plus 24 MHz for MSP430FR57xx,MSP430FR2355
; ============================================================================
-;TERMINAL_I2C ; - 12 bytes; uncomment to select I2C_Master TERMINAL instead of UART TERMINAL
+TERMINAL_I2C ; - 12 bytes; uncomment to select I2C_Master TERMINAL instead of UART TERMINAL
; ============================================================================
.IFDEF TERMINAL_I2C
MYSLAVEADR .equ 18
; ============================================================================
.ELSE ; UART TERMINAL
; ============================================================================
-TERMINALBAUDRATE .equ 115200 ; choose value considering the frequency, see explanations below.
+TERMINALBAUDRATE .equ 4000000 ; choose value considering the frequency, see explanations below.
; ----------------------------------------------------------------------------
TERMINAL3WIRES ; ; + 18 bytes enable 3 wires XON/XOFF software flow control
TERMINAL4WIRES ; ; + 12 bytes enable 4 wires RTS hardware flow control
;===============================================================================
DOUBLE_INPUT ;; + 60 bytes : adds the interpretation engine for double numbers (numbers with dot)
FIXPOINT_INPUT ;; + 68 bytes : adds the interpretation engine for Q15.16 numbers (numbers with comma)
-SD_CARD_LOADER ; + 1766 bytes : to load source files from SD_card
-BOOTLOADER ; + 132 bytes : includes in WARM process the bootloader SD_CARD\BOOT.4TH.
-SD_CARD_READ_WRITE ; + 1148 bytes : to read, create, write and del files + copy text files from PC to target SD_Card
+SD_CARD_LOADER ;; + 1582 bytes : to load source files from SD_card
+BOOTLOADER ;; + 82 bytes : includes in WARM process the bootloader SD_CARD\BOOT.4TH.
+SD_CARD_READ_WRITE ;; + 1168 bytes : to read, create, write and del files + copy text files from PC to target SD_Card
;EXTENDED_MEM ; + 506 bytes : allows assembler to execute code up to 1MB (LARGE_CODE).
;EXTENDED_ASM ; + 1212 bytes : extended assembler to 20 bits datas (LARGE_DATA + LARGE_CODE).
;VOCABULARY_SET ; + 162 bytes : adds words: WORDSET FORTH hidden PREVIOUS ONLY DEFINITIONS
LITERALLOOP MOV &DP,W ;3
ADD #4,&DP ;3
MOV #lit,0(W) ;4
- MOV X,2(W) ;3 pass 1: compile n|dhi, if pass 2: compile dhi
+ MOV X,2(W) ;3 pass 1: compile n, if pass 2: compile dhi
MOV @PSP+,TOS ;2
BIT #UF9,SR ;2 double number ?
LITERALNEXT BIC #UF9,SR ;2 in all case, clear UF9
- JZ LITERALEND ;2 goto end if n|interpret_state
- MOV TOS,2(W) ;3 compile dlo over dhi
+ JZ LITERALEND ;2 no goto end if n|interpret_state
+ MOV TOS,2(W) ;3 yes compile dlo over dhi
JMP LITERALLOOP ;2
LITERALEND MOV @IP+,PC ;4
.ELSE
; which includes emptying the return stack, without displaying a message.
; ABORT is the common next of WARM and ABORT"
ABORT MOV #PSTACK,PSP ; ABORT = ALLOT + 8
- MOV #0,TOS ; and set TOS for SYS use.
+ MOV #0,TOS ; and clear TOS for SYS use.
; https://forth-standard.org/standard/core/QUIT
; QUIT -- interpret line by line the input stream
QUIT mASM2FORTH ; QUIT = ALLOT + 14
; IMMEDIATE -- make last definition immediate
IMMEDIATE MOV &LAST_NFA,Y ; Y = NFA|unused_PA_reg (as lure for :NONAME)
BIS.B #1,0(Y) ;4 FIND process more easier with bit0 than bit7
-NEXTADR MOV @IP+,PC
+ MOV @IP+,PC
FORTHWORD "CREATE"
; https://forth-standard.org/standard/core/CREATE
; FORTHWORD "DEFER"
; CALL #HEADER
; MOV #4030h,-4(W) ;4 first CELL = MOV @PC+,PC = BR #addr
-; MOV #NEXTADR,-2(W) ;3 second CELL = ...mNEXT : do nothing by default
+; MOV #NEXT_ADR,-2(W) ;3 second CELL = ...mNEXT : do nothing by default
; JMP REVEAL ; to link created word in vocabulary
; IS <name> xt --
; used like this (high level defn.):
; DEFER DISPLAY create a "do nothing" definition (2 CELLS)
-; or (low level defn.):
+; or (more elegant low level defn.):
; CODE DISPLAY create a "do nothing" definition (2 CELLS)
; MOV #NEXT_ADR,PC NEXT_ADR is the address of NEXT code: MOV @IP+,PC
; ENDCODE
.ENDIF ; VOCABULARY_SET
VOCDOES mNEXTADR ; adds WORD-SET first in context stack
.IFDEF VOCABULARY_SET
-ALSO MOV #7,Y ;2 -- move up 7 words, first word in last
- MOV #CONTEXT+12,X ;2 X=src
-ALSOLOOP MOV @X,2(X) ; X=src < Y=dst copy W bytes beginning with the end
- SUB #2,X
- SUB #1,Y
+ALSO MOV #14,X ;2 -- move up 7 words, first word in last
+ALSOLOOP SUB #2,X
+ MOV CONTEXT(X),CONTEXT+2(X) ; X=src < Y=dst copy W bytes beginning with the end
JNZ ALSOLOOP
.ELSE ; VOCABULARY_SET off ; VOCDOES is used only by the assembler to switch from HIlevel to LOlevel environments
MOV #BODYFORTH,&CONTEXT+2;4 copy BODYFORTH --> 2th cell of CONTEXT
; used variables : BufferPtr, BufferLen
; EMIT uses only IP TOS and Y registers
; ==================================;
-; FORTHWORD "SD_ACCEPT" ; SDIB_org SDIB_org CPL -- SDIB len 94 bytes
+; FORTHWORD "SD_ACCEPT" ; SDIB_org SDIB_org SDIB_len -- SDIB len 94 bytes
; ==================================;
SD_ACCEPT ; sequentially move from SD_BUF to SDIB (PAD if RAM=1k) a line of chars delimited by CRLF
; ----------------------------------; up to CPL = 80 chars
PUSH IP ;
MOV #SDA_YEMIT_RET,IP ; set YEMIT return
; ----------------------------------;
-StartNewLine ; -- SDIB_org SDIB_org CPL
-; ----------------------------------;
MOV &CurrentHdl,T ; prepare a link for a next LOADed file, if any...
MOV &BufferPtr,HDLW_BUFofst(T) ; ...see usage : GetFreeHandle(CheckCaseOfLoadFileToken)
; ----------------------------------;
-SDA_InitDstAddr ;
+; SDA_InitDstAddr ;
; ----------------------------------;
- MOV @PSP+,W ; -- SDIB_org CPL W=SDIB_ptr
- MOV TOS,X ; X=SDIB_len
+ MOV @PSP+,W ; -- SDIB_org SDIB_len W=SDIB_ptr
+ MOV TOS,X ; X=SDIB_len
MOV #0,TOS ; -- SDIB_org len of moved bytes from SD_buf to SDIB
; ----------------------------------;
SDA_InitSrcAddr ; <== SDA_GetFileNextSect
; ----------------------------------;
SDA_MoveChar ;
; ----------------------------------;
- CMP X,TOS ; 1 len = CPL ?
+ CMP TOS,X ; 1 len = SDIB_len ?
JZ YEMIT ; 2 yes, don't move char to dst
MOV.B Y,0(W) ; 3 move char to dst
ADD #1,W ; 1 increment SDIB_ptr
; ----------------------------------; 29/26~ char loop, add 14~ for readsectorW one char ==> 43/40~ ==> 186/200 kbytes/s @ 8MHz
SDA_GetFileNextSect ; -- SDIB_org len
; ----------------------------------;
- PUSHM #2,W ; save SD_buf_ptr, SD_buf_len
- CALL #Read_File ; that resets BufferPtr
- POPM #2,W ; restore SD_buf_ptr, SD_buf_len
+ PUSHM #2,W ; save SDIB_ptr, SDIB_len
+ CALL #Read_File ; which clears SD_buf_ptr and set SD_buf_len
+ POPM #2,W ; restore SDIB_ptr, SDIB_len
JMP SDA_InitSrcAddr ; loopback to end the line
; ----------------------------------;
\ No newline at end of file
; ===========================================================
; WARNING! SD_INIT DRAW BIG CURRENT; IF THE SUPPLY IS TOO WEAK
-; THE SD_CARD LOW VOLTAGE THRESHOLD MAY BE REACHED ==> SD_ERROR 8FF !
+; THE SD_CARD LOW VOLTAGE THRESHOLD MAY BE REACHED ==> SD_ERROR 4FF !
; ===========================================================
; ===========================================================
-; Init hardware SD_Card, called by WARM
+; Init SD_Card software, called by INIT_FORTH(INIT_SOFT_APP)
+; ===========================================================
+;-----------------------------------;
+INIT_SOFT_SD ; called by INI_FORTH common part of ?ABORT|RST
+;-----------------------------------;
+; CMP #0,TOS ; USERSYS = 0 ?
+; JZ INIT_HSD_END ; no hardware init if USERSYS = 0 SYS
+; MOV #HandlesLen,X ; clear all handles
+;ClearHandle SUB #2,X ; 1
+; MOV #0,FirstHandle(X) ; 3
+; JNZ ClearHandle ; 2
+ MOV #0,&CurrentHdl ;
+ MOV #INIT_SOFT_TERM,PC ; link to previous INI_SOFT_APP then RET
+;-----------------------------------;
+
+; ===========================================================
+; Init hardware SD_Card, called by WARM(INIT_HARD_APP)
; ===========================================================
; web search: "SDA simplified specifications"
ADD W,X ;
MOV X,&OrgFAT2 ; X = OrgFAT1 + FATsize = OrgFAT2 (8959)
; ----------------------------------;
- ADD W,X ; X = OrgFAT2 + FATsize = FAT32 OrgDatas = OrgRootDIR sector = 16384
-; MOV X,&OrgRootDIR ;
+ ADD W,X ; X = OrgFAT2 + FATsize = FAT32 OrgDatas (16384)
FATxx_SetFileSystemNext ;
MOV.B 13(Y),Y ; Logical sectors per cluster (8)
MOV Y,&SecPerClus ;
MOV @RSP+,PC ; RET
;-----------------------------------;
-; ===========================================================
-; Init SD_Card software, called by INIT_FORTH
-; ===========================================================
-;-----------------------------------;
-INIT_SOFT_SD ; called by INI_FORTH common part of ?ABORT|RST
-;-----------------------------------;
-; CMP #0,TOS ; USERSYS = 0 ?
-; JZ INIT_HSD_END ; no hardware init if USERSYS = 0 SYS
-; MOV #HandlesLen,X ; clear all handles
-;ClearHandle SUB #2,X ; 1
-; MOV #0,FirstHandle(X) ; 3
-; JNZ ClearHandle ; 2
- MOV #0,&CurrentHdl ;
- MOV #INIT_SOFT_TERM,PC ; link to previous INI_SOFT_APP then RET
-;-----------------------------------;
; SD card OPEN, LOAD subroutines
;-----------------------------------------------------------------------
+; ==================================;
+ReadFAT1SectorW ;SWX (< 65536)
+; ==================================;
+ ADD &OrgFAT1,W ;
+ MOV #0,X ; FAT1_SectorHI = 0
+ JMP ReadSectorWX ;SWX read FAT1SectorW
+; ----------------------------------;
+
+ .IFDEF SD_CARD_READ_WRITE
+
+; this subroutine is called by Write_File (bufferPtr=512) and CloseHandle (0 =< BufferPtr =< 512)
+; ==================================;
+WriteSD_Buf ;SWX input: T = CurrentHDL
+; ==================================;
+ ADD &BufferPtr,HDLL_CurSize(T) ; update handle CurrentSizeL
+ ADDC #0,HDLH_CurSize(T) ;
+; ==================================;
+WriteSectorHL ;SWX
+; ==================================;
+ MOV &SectorL,W ; Low
+ MOV &SectorH,X ; High
+ JMP WriteSectorWX ; ...then RET
+; ----------------------------------;
+
+ .ENDIF
+
; rules for registers use
; S = error
; T = CurrentHdl, pathname
MOV HDLH_CurClust(T),&ClusterH ;
; ==================================;
ClusterHLtoFAT1sectWofstY ;WXY Input : ClusterHL Output: ClusterHL, FATsector, W = FATsector, Y = FAToffset
-; ==================================;
+; ==================================;limited to $10000 sectors ==> $800000 clusters ==> 32GB for 4k clusters
MOV.B &ClusterL+1,W ;3 W = ClusterLoHI
MOV.B &ClusterL,Y ;3 Y = ClusterLOlo
-; input : Cluster n, max = 7FFFFF (SDcard up to 256 GB)
+; input : Cluster n, max = 7FFFFF, (SD_card up to 256 GB with 64k clusters)
; ClusterLoLo*4 = displacement in 512 bytes sector ==> FAToffset
; ClusterHiLo&ClusterLoHi +C << 1 = relative FATsector + orgFAT1 ==> FATsector
; ----------------------------------;
- MOV.B &ClusterH,X ; X = 0:ClusterHIlo
- SWPB X ; X = ClusterHIlo:0
- BIS X,W ; W = ClusterHIlo:ClusterLOhi
+ MOV.B &ClusterH,X ;3 X = 0:ClusterHIlo
+ SWPB X ;1 X = ClusterHIlo:0
+ BIS X,W ;1 W = ClusterHIlo:ClusterLOhi
; ----------------------------------;
- SWPB Y ; Y = ClusterLOlo:0
- ADD Y,Y ;1 Y = ClusterLOlo:0 << 1 (+ carry for FATsector)
- ADDC W,W ; FATsector = W = ClusterHIlo:ClusterLOhi<<1 + Carry
- SWPB Y ; Y = 0:ClusterLOlo
- ADD Y,Y ; FAToffset = Y = 0:ClusterLOlo << 1 for FAT16 and 0:ClusterLOlo<<2 for FAT32
+ SWPB Y ;1 Y = ClusterLOlo:0
+ ADD Y,Y ;1 Y = ClusterLOlo:0 << 1 (carry report for FATsector)
+ ADDC W,W ;1 FATsector = W = ClusterHIlo:ClusterLOhi<<1 + Carry
+ SWPB Y ;1 Y = 0:ClusterLOlo
+ ADD Y,Y ;1 FAToffset = Y = 0:ClusterLOlo<<2 for FAT32
MOV @RSP+,PC ;4
; ----------------------------------;
-; ==================================;
-ReadFAT1SectorW ;SWX (< 65536)
-; ==================================;
- ADD &OrgFAT1,W ;
- MOV #0,X ; FAT1_SectorHI = 0
- JMP ReadSectorWX ;SWX read FAT1SectorW
-; ----------------------------------;
-
; use no registers
; ==================================;
ClusterHLtoFrstSectorHL ; Input : ClusterHL, output: first SectorHL of ClusterHL
; ----------------------------------;
-
; ==================================;
HDLCurClusPlsOfst2sectorHL ;SWX input: HDL (CurClust, ClustOfst) output: SectorHL
; ==================================;
MOV @RSP+,PC ; Z = 1 if no more handle
; ----------------------------------;
-
; ==================================;
CloseHandle ; <== CLOSE, Read_File, TERM2SD", OPEN_DEL
; ==================================;
; ----------------------------------;
.IFDEF SD_CARD_READ_WRITE
CMP.B #4,HDLB_Token(T) ; WRITE file ?
- JNZ TestClosedToken ; no, case of DEL READ LOAD file
+ JL TestClosedToken ; no, case of DEL READ LOAD file
;; ----------------------------------; optionnal
; MOV &BufferPtr,W ;
-;FullFillZero ;the remainder of sector
+;RemFillZero ;the remainder of sector
; CMP #BytsPerSec,W ;2 buffer full ?
-; JZ CloseWriteHandle ;2 remainding of buffer is full filled with 0
+; JZ UpdateWriteSector ;2 remainding of buffer is full filled with 0
; MOV.B #0,SD_BUF(W) ;3
; ADD #1,W ;1
-; JMP FullFillZero ;2
+; JMP RemFillZero ;2
;; ----------------------------------;
-WriteBeforeClose
+UpdateWriteSector
CALL #WriteSD_Buf ;SWX
-CloseWriteHandle
- CALL #LoadUpdateSaveDirEntry ;SWXY
+; ----------------------------------;
+;Load Update Save DirEntry ;SWXY
+; ----------------------------------;
+ MOV HDLL_DIRsect(T),W ;
+ MOV HDLH_DIRsect(T),X ;
+ CALL #readSectorWX ;SWX SD_buffer = DIRsector
+ MOV HDLW_DIRofst(T),Y ; Y = DirEntryOffset
+ CALL #GetYMDHMSforDIR ; X=DATE, W=TIME
+ MOV X,SD_BUF+18(Y) ; access date
+ MOV W,SD_BUF+22(Y) ; modified time
+ MOV X,SD_BUF+24(Y) ; modified date
+ MOV HDLL_CurSize(T),SD_BUF+28(Y); save new filesize
+ MOV HDLH_CurSize(T),SD_BUF+30(Y);
+ MOV HDLL_DIRsect(T),W ;
+ MOV HDLH_DIRsect(T),X ;
+ CALL #WriteSectorWX ;SWX
+; ----------------------------------;
.ENDIF ;
; ----------------------------------;
TestClosedToken ;
MOV @RSP+,PC ;
; ----------------------------------;
-
.IFDEF SD_CARD_READ_WRITE
+; ==================================;
+HDLFrstClus2FATsecWofstY ;WXY Input: T=Handle, HDL_CurClustHL Output: ClusterHL, FATsector, W = FATsector, Y = FAToffset
+; ==================================;
+ MOV HDLL_FirstClus(T),&ClusterL ;
+ MOV HDLH_FirstClus(T),&ClusterH ;
+ JMP ClusterHLtoFAT1sectWofstY ;
+; ----------------------------------;
+
;-----------------------------------------------------------------------
; SD_READ_WRITE FORTH words
;-----------------------------------------------------------------------
; XBOOT [SYSRSTIV|USERSTIV] --
; here we are after INIT_FORTH
; performs bootstrap from SD_CARD\BOOT.4th file, ready to test SYSRSTIV|USERSYS value
-XBOOT ; BIT #1,TOS ; USERSYS request ?
- ; JNZ AbortBoot ;
- ; CMP #0,TOS ; WARM request ?
- ; JZ AbortBoot ; if yes
+XBOOT CALL &HARD_APP ; WARM first calls HARD_APP (which includes INIT_HARD_SD)
BIT.B #CD_SD,&SD_CDIN ; SD_memory in SD_Card socket ?
JZ BOOT_YES ; if yes
-AbortBoot MOV #WARM,PC ; goto WARM without return
+AbortBoot MOV #WARM+4,PC ; if no, resume with WARM+4, without return
; ----------------------------------;
-BOOT_YES CALL &HARD_APP ; CALL HARD_APP (which includes INIT_HARD_SD)
- MOV #PSTACK-2,PSP ; preserve SYSRSTIV|USERSYS in TOS for BOOT.4TH tests
+BOOT_YES MOV #PSTACK-2,PSP ; preserve SYSRSTIV|USERSYS in TOS for BOOT.4TH tests
MOV #0,0(PSP) ; set 0 for next SYS use
mDOCOL ;
.word XSQUOTE ; -- SYSRSTIV|USERSYS addr u
;Compute CMD ;
; ----------------------------------;
MOV #1,&SD_CMD_FRM ;3 $(01 00 xx xx xx CMD) set stop bit in CMD frame
-; CMP #2,&FATtype ;3 FAT32 ?
-; JZ FAT32_CMD ;2 yes
-;FAT16_CMD ; FAT16 : CMD17/24 byte address = Sector * BPB_BytsPerSec
-; ADD W,W ;1 shift left one Sector
-; ADDC.B X,X ;1
-; MOV W,&SD_CMD_FRM+2 ;3 $(01 00 ll LL xx CMD)
-; MOV.B X,&SD_CMD_FRM+4 ;3 $(01 00 ll LL hh CMD)
-; JMP WaitIdleBeforeSendCMD ;
FAT32_CMD ; FAT32 : CMD17/24 sector address
MOV.B W,&SD_CMD_FRM+1 ;3 $(01 ll xx xx xx CMD)
SWPB W ;1
; NOP ;0 NOPx adjusted to avoid SD error
SUB.B #1,X ;1
JC Send_CMD_PUT ;2 U>= : don't skip SD_CMD_FRM(0) !
-
; host must provide height clock cycles to complete operation
; here X=255, so wait for CMD return expected value with PUT FFh 256 times
-
; MOV #4,X ; to pass made in PRC SD_Card init
; MOV #16,X ; to pass Transcend SD_Card init
; MOV #32,X ; to pass Panasonic SD_Card init
; ----------------------------------;
CALL #SPI_GET ;
ADD.B #2,W ;1 W = 0 ?
- JZ ReadSectorFirstByte ;2 yes
+ JZ ReadSectorFirstByte ;2 yes, X = 0
JNZ WaitFEhResponse ;2
; ----------------------------------;
-ReadSectorLoop ; get 512+1 bytes, write 512 bytes in SD_BUF
+ReadSectorLoop ; get 512 bytes + CRC16 in SD_BUF
; ----------------------------------;
MOV.B &SD_RXBUF,SD_BUF-1(X) ; 5
ReadSectorFirstByte ; W=0
MOV.B #-1,&SD_TXBUF ; 3 put FF
NOP ; 1 NOPx adjusted to avoid read SD_error
ADD #1,X ; 1
- CMP #BytsPerSec+1,X ; 2
+ CMP #BytsPerSec+3,X ; 2
JNZ ReadSectorLoop ; 2 14 cycles loop read byte
; ----------------------------------;
- MOV.B #-1,&SD_TXBUF ; 3 put only one FF because first CRC byte is already received...
-; ----------------------------------;
ReadWriteHappyEnd ; <==== WriteSector
; ----------------------------------;
- BIC #3,S ; reset read and write errors
+ BIC #3,S ; Clear read and write errors
BIS.B #CS_SD,&SD_CSOUT ; Chip Select high
MOV @RSP+,PC ; W = 0
; ----------------------------------;
; ----------------------------------;
WriteSkipCRC16 ; CRC16 not used in SPI mode
; ----------------------------------;
- MOV #3,X ; PUT 2 bytes to skip CRC16
- CALL #SPI_X_GET ; + 1 byte to get data token in W
+ MOV #3,X ; PUT 3 times to skip CRC16
+ CALL #SPI_X_GET ; and to get data token in W
; ----------------------------------;
CheckWriteState ;
; ----------------------------------;
; 4 = CMD0 time out (GO_IDLE_STATE)
; 8 = ACMD41 time out (APP_SEND_OP_COND)
; $10 = CMD16 time out (SET_BLOCKLEN)
-; $20 = not FAT16/FAT32 media, low byte = partition ID
+; $20 = not FAT32 media, low byte = partition ID
; low byte, if CMD R1 response : %0xxx_xxxx
; 1th bit = In Idle state
ADD &SD_RXBUF,S ; add SPI(GET) return value as low byte error
SD_CARD_ID_ERROR ; <=== SD_INIT error $20 from forthMSP430FR_SD_INIT.asm
BIS.B #CS_SD,&SD_CSOUT ; Chip Select high
-; mDOCOL ;
mASM2FORTH ;
.word ECHO
.word XSQUOTE ; don't use S register
MOV TOS,0(PSP) ;
MOV #10h,&BASEADR ; select hex
MOV S,TOS ;
-; MOV #TIB_ORG,&CIB_ADR ; restore TIB as Current Input Buffer
-; MOV #BODYACCEPT,&PFAACCEPT ; restore default ACCEPT
mASM2FORTH ;
.word UDOT,ABORT_TERM ; no return...
; ----------------------------------;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
-
-
; ======================================================================
; READ" primitive as part of OpenPathName
; input from open: S = OpenError, W = open_type, SectorHL = DIRsectorHL,
; ==================================;
+FreeAllClusters ;SWXY input: HDLL_FirstClus(T), output:
+; ==================================;FATs are updated
+ CALL #HDLFrstClus2FATsecWofstY ;WXY output: W = FATsector, Y=FAToffset
+ PUSH W ; R-- FATsector ptr
+; ----------------------------------;
+LoadFAT1sectorWloop ;
+; ----------------------------------;
+ CALL #ReadFAT1SectorW ;SWX
+; ----------------------------------;
+GetAndFreeCluster ;
+; ----------------------------------;
+ MOV SD_BUF(Y),W ; get [clusterLO]
+ MOV #0,SD_BUF(Y) ; free CLusterLO
+GetAndFreeClusterHi ;
+ MOV SD_BUF+2(Y),X ; get [clusterHI]
+ MOV #0,SD_BUF+2(Y) ; free CLusterHI
+ClusterHiTest
+ AND #00FFFh,X ; select 12 bits significant
+ CMP #00FFFh,X ; [ClusterHI] was = 0FFFh?
+ JNE SearchNextCluster2free ; no
+ClusterLoTest ;
+ CMP #-1,W ; [ClusterLO] was = FFFFh? last cluster used for this file
+ JZ EndOfFileCluster ; yes
+; ----------------------------------;
+SearchNextCluster2free ;
+; ----------------------------------;
+ MOV W,&ClusterL ;
+ MOV X,&ClusterH ;
+ CALL #ClusterHLtoFAT1sectWofstY ;WXY W = new FATsector, new FAToffset
+ CMP @RSP,W ; new FATsector = FATsector ptr ?
+ JZ GetAndFreeCluster ; yes loop back
+ MOV W,X ; no: swap previous new FATsectors:
+ MOV @RSP,W ; W = previous FATsector
+ MOV X,0(RSP) ; R-- new FATsector
+ CALL #SaveSectorWtoFATs ;SWXY update FATs from SD_BUF to W = previous FATsector
+ MOV @RSP,W ; W = new FATsector
+ JMP LoadFAT1sectorWloop ; loop back with W = new FATsector, new FAToffset
+; ----------------------------------;
+EndOfFileCluster ;
+; ----------------------------------;
+ MOV @RSP+,W ; W = new FATsector
+; ==================================;
SaveSectorWtoFATs ;SWXY W = FATsector loaded in SD_buf
; ==================================;
MOV W,Y ; Y = W
MOV #WriteSectorWX,PC ;SWX then RET
; ----------------------------------;
+
; parse all FAT sectors until free cluster is found
; this New Cluster is marked as the end's one (-1)
; ----------------------------------;
FreeClusterFound ; X = cluster number low word in SD_BUF = FAToffset
; ----------------------------------;
- MOV @RSP,&LastFATsector ;
- MOV Y,&LastFAToffset ;
-; ----------------------------------;
MOV #0,S ; clear error
MOV #-1,SD_BUF(Y) ; mark New Cluster low word as end cluster (0xFFFF) in SD_BUF
MOV.B @RSP,W ; W = 0:FATsectorLo
; ----------------------------------;
-; ==================================;
-FreeAllClusters ;SWXY input: HDLL_FirstClus(T), output:
-; ==================================;FATs are updated
- MOV HDLL_FirstClus(T),ClusterL ;
- MOV HDLH_FirstClus(T),ClusterH ;
- CALL #ClusterHLtoFAT1sectWofstY ;WXY output: W = FATsector, Y=FAToffset
- MOV W,&LastFATsector ;
- MOV Y,&LastFAToffset ;
- PUSH W ; R-- FATsector ptr
-; ----------------------------------;
-LoadFAT1sectorWloop ;
-; ----------------------------------;
- CALL #ReadFAT1SectorW ;SWX
-; ----------------------------------;
-GetAndFreeCluster ;
-; ----------------------------------;
- MOV SD_BUF(Y),W ; get [clusterLO]
- MOV #0,SD_BUF(Y) ; free CLusterLO
-GetAndFreeClusterHi ;
- MOV SD_BUF+2(Y),X ; get [clusterHI]
- MOV #0,SD_BUF+2(Y) ; free CLusterHI
-ClusterHiTest
- AND #00FFFh,X ; select 12 bits significant
- CMP #00FFFh,X ; [ClusterHI] was = 0FFFh?
- JNE SearchNextCluster2free ; no
-ClusterLoTest ;
- CMP #-1,W ; [ClusterLO] was = FFFFh? last cluster used for this file
- JZ EndOfFileCluster ; yes
-; ----------------------------------;
-SearchNextCluster2free ;
-; ----------------------------------;
- MOV W,&ClusterL ;
- MOV X,&ClusterH ;
- CALL #ClusterHLtoFAT1sectWofstY ;WXY W = new FATsector, new FAToffset
- CMP @RSP,W ; new FATsector = FATsector ptr ?
- JZ GetAndFreeCluster ; yes loop back
- MOV W,X ; no: swap previous new FATsectors:
- MOV @RSP,W ; W = previous FATsector
- MOV X,0(RSP) ; R-- new FATsector
- CALL #SaveSectorWtoFATs ;SWXY update FATs from SD_BUF to W = previous FATsector
- MOV @RSP,W ; W = new FATsector
- JMP LoadFAT1sectorWloop ; loop back with W = new FATsector, new FAToffset
-; ----------------------------------;
-EndOfFileCluster ;
-; ----------------------------------;
- MOV @RSP+,W ;
- MOV #SaveSectorWtoFATs,PC ; update FATs
-; ----------------------------------;
-
-; this subroutine is called by Write_File (bufferPtr=512) and CloseHandle (0 =< BufferPtr =< 512)
-; ==================================;
-WriteSD_Buf ;SWX input: T = CurrentHDL
-; ==================================;
- ADD &BufferPtr,HDLL_CurSize(T) ; update handle CurrentSizeL
- ADDC #0,HDLH_CurSize(T) ;
-; ==================================;
-WriteSectorHL ;SWX
-; ==================================;
- MOV &SectorL,W ; Low
- MOV &SectorH,X ; High
- MOV #WriteSectorWX,PC ; ...then RET
; ----------------------------------;
; ==================================;
MOV.B @T+,W ; W = char of pathname
MOV.B W,SD_BUF(Y) ; to DIRentry
-; CMP #0,W ; end of stringZ ?
-; JZ OPWC_CompleteWithSpaces ;
CMP T,&PathName_END ; EOS < PTR ?
JNC OPWC_CompleteWithSpaces ; yes
; ----------------------------------;
MOV @RSP+,PC ;
; ----------------------------------;
-
-; ==================================;
-LoadUpdateSaveDirEntry ;SWXY
-; ==================================;
- MOV HDLL_DIRsect(T),W ;
- MOV HDLH_DIRsect(T),X ;
- CALL #readSectorWX ;SWX SD_buffer = DIRsector
- MOV HDLW_DIRofst(T),Y ; Y = DirEntryOffset
- CALL #GetYMDHMSforDIR ; X=DATE, W=TIME
- MOV X,SD_BUF+18(Y) ; access date
- MOV W,SD_BUF+22(Y) ; modified time
- MOV X,SD_BUF+24(Y) ; modified date
- MOV HDLL_CurSize(T),SD_BUF+28(Y); save new filesize
- MOV HDLH_CurSize(T),SD_BUF+30(Y);
- MOV HDLL_DIRsect(T),W ;
- MOV HDLH_DIRsect(T),X ;
- MOV #WriteSectorWX,PC ;SWX then RET
-; ----------------------------------;
-
;-----------------------------------------------------------------------
; WRITE" subroutines
;-----------------------------------------------------------------------
; ----------------------------------;
UpdateNewClusterFATs ;
; ----------------------------------;
-; CALL #SaveSectorWtoFATs ;SWXY no: already done by SearchMarkNewClusterHL
MOV @RSP,W ; W = previous FATsector
CALL #ReadFAT1SectorW ;SWX reload previous FATsector in buffer to link clusters
; ----------------------------------;
MOV &ClusterL,HDLL_CurClust(T) ; update handle with new cluster
MOV &ClusterH,HDLH_CurClust(T) ;
Write_File_End
- MOV #ClusterHL2sectorHL,PC ;W set current SectorHL to be written then RET
+ MOV #ClusterHL2sectorHL,PC ;W set current SectorHL to be written
; ----------------------------------;
;Z WRITE --
CMP #2,S ; "no such file" error ?
JZ OPEN_WRITE_CREATE ; yes, Handle is to be created !
CMP #0,S ; well opened file ?
- JZ OPEN_OVERWRITE ; yes
+ JZ OPEN_OVERWRITE ; yes, handle is created
; ----------------------------------;
OPWC_Write_Errors ;
; ----------------------------------;
; ======================================================================
; WRITE" primitive as part of OpenPathName
-; All "DEL"eted clusters are freed
; input from open: W = open_type, SectorHL = DIRsectorHL,
; Buffer = [DIRsector], ClusterHL = FirstCluster
; from open(GetFreeHandle): Y = DIRentry, T = CurrentHdl,
; 2 get free cluster ;
; ----------------------------------;
MOV #0,W ; init FATsector = 0, search new cluster
- MOV #0,Y ; init FAToffset
- CALL #SearchMarkNewClusterHL ;WXY output: updated (ClusterHL, FATsector, W = FATsector), SD_BUF = [new FATsector]
+ MOV #8,Y ; init FAToffset to point Cluster 2
+ CALL #SearchMarkNewClusterHL ;WXY output: updated (ClusterHL, FATsector, W = FATsector)
; ----------------------------------;
; 3 init DIRentryAttributes ;
; ----------------------------------;
; ==================================;
; free all file clusters ;
; ----------------------------------;
- CALL #FreeAllClusters ;SWXY input: HDLL_FirstClus(T), output: FATS are updated
+ CALL #FreeAllClusters ;SWXY input: HDLL_FirstClus(T)
MOV #0,HDLL_CurSize(T) ; clear currentSize
MOV #0,HDLH_CurSize(T) ;
- MOV HDLL_FirstClus(T),ClusterL ; Set ClusterHL
- MOV HDLH_FirstClus(T),ClusterH ;
- CALL #ClusterHLtoFAT1sectWofstY ;WXY output: W = FATsector, Y=FAToffset
+ CALL #HDLFrstClus2FATsecWofstY ;WXY output: W = FATsector, Y=FAToffset
CALL #SearchMarkNewClusterHL ;SWXY input: W = FATsector, Y = FAToffset output: ClusterHL, W = updated new FATsector loaded in SD_BUF
CALL #HDLSetCurClustSetFrstSect ;
MOV @IP+,PC ; --
; ======================================================================
OPEN_8W ;
CMP #2,S ; "no such file" error ?
- JZ OPEN_WRITE_CREATE ; yes
+ JZ OPEN_WRITE_CREATE ; if yes, handle is to be created
CMP #0,S ; well opened file ?
JNZ OPWC_Write_Errors ; no
; ==================================;
-OPEN_WRITE_APPEND ; yes
+OPEN_WRITE_APPEND ; yes, handle is already created
; ==================================;
-; 1- open file ; done
+SearchLastClust ;SWXY input: HDLL_FirstClus(T)
+; ----------------------------------;
+ CALL #HDLFrstClus2FATsecWofstY ;WXY output: W = FATsector, Y=FAToffset
; ----------------------------------;
- MOV.B #4,HDLB_Token(T) ; update HDLB_Token(T)
+SrchFAT1sectorWloop ;
; ----------------------------------;
-; 2.1- Compute Sectors count ; Sectors = HDLL_CurSize/512
+ MOV W,&FATsector ; FATsector memory
+ CALL #ReadFAT1SectorW ;SWX
+; ----------------------------------;
+SearchClusterLoop ; in: ClusterHL
; ----------------------------------;
- MOV.B HDLL_CurSize+1(T),Y ;Y = 0:CurSizeLOHi (bytes)
- MOV.B HDLH_CurSize(T),X ;X = 0:CurSizeHILo
- SWPB X ;X = CurSizeHIlo:0
- ADD Y,X ;X = CurSizeHIlo:CurSizeLOhi
- MOV.B HDLH_CurSize+1(T),Y ;Y:X = CurSize / 256 (bytes)
+ MOV SD_BUF(Y),W ; get [clusterLO]
+ MOV SD_BUF+2(Y),X ; get [clusterHI]
+ CMP #0FFFh,X ; [ClusterHI] = 0FFFh?
+ JNE SearchNextCluster ; no
+ CMP #-1,W ; [ClusterLO] = FFFFh?
+ JZ LastClusterFound ; LastClusterFound = ClusterHL
; ----------------------------------;
-; 2.2 Compute Clusters Count ;
+SearchNextCluster ;
; ----------------------------------;
- MOV.B &SecPerClus,T ;3 T = DIVISOR = SecPerClus = 0:SPClo
-DIVSECPERSPC ;
- MOV #0,W ;1 W = 0:REMlo = 0
- MOV #8,S ;1 S = CNT
-DIVSECPERSPC1 ;
- RRA Y ;1 0>0:SEC_HI>C
- RRC X ;1 C>SEC_LO>C
- RRC.B W ;1 C>REMlo>C
- SUB #1,S ;1 CNT-1
- RRA T ;1 0>SPChi:SPClo>C
- JNC DIVSECPERSPC1 ;2 7~ loopback if carry clear
-DIVSECPERSPC2 ;
- RRA W ;1 0>0:REMlo>C
- SUB #1,S ;1 CNT-1
- JGE DIVSECPERSPC2 ;2 4~ loopback Wlo = OFFSET, X = CLU_LO, Y = CLU_HI
+ MOV W,&ClusterL ;
+ MOV X,&ClusterH ;
+ CALL #ClusterHLtoFAT1sectWofstY ;WXY W = new FATsector, new FAToffset
+ CMP W,&FATsector ; new FATsector = prev FATsector ?
+ JZ SearchClusterLoop ; yes loop back
+ JMP LoadFAT1sectorWloop ; loop back with W = new FATsector
; ----------------------------------;
-; 2.3- Compute Current Cluster ; X = ClusterCountLO, Y = ClusterCountHI
+LastClusterFound ; in ClusterHL
; ----------------------------------;
- MOV &CurrentHDL,T ;3 reload Handle ptr
- ADD HDLL_FirstClus(T),X ;
- ADDC HDLH_FirstClus(T),Y ;
- MOV X,HDLL_CurClust(T) ; update handle
- MOV Y,HDLH_CurClust(T) ;
+ MOV HDLL_CurSize(T),W ;
+ MOV W,Y ;
; ----------------------------------;
-; 2.4- load current sectorHL ;
+; Compute Y = SD_Buf ptr ; example : Y = $A313 bytes
; ----------------------------------;
- MOV.B W,HDLB_ClustOfst(T) ;3 update handle with W = REM8 = sectors offset in last cluster
- CALL #LoadCurSectorHL ;SWX in SD_buf
+ MOV #1FFh,X ; mask for sector
+ BIC X,HDLL_CurSize(T) ; HDLL_CurSize = $A200 bytes
+ AND X,Y ; remainder Y = $0113 bytes
+ MOV Y,&BufferPtr ; init Buffer Pointer with $0113
; ----------------------------------;
-; 2.5- Compute SD_Buf ptr ;
+; Compute W = Cluster offset ;
; ----------------------------------;
- MOV HDLL_CurSize(T),W ; example : W = $A313 bytes
- BIC #01FFh,HDLL_CurSize(T) ; HDLL_CurSize = $A200 bytes
- AND #01FFh,W ; remainder W = $0113 bytes
- MOV W,&BufferPtr ; init Buffer Pointer with $0113
+ MOV.B &SecPerClus,X ;
+ SUB #1,X ; mask for Cluster offset, max = 0b0011_1111, for 4k clusters: 0b0000_0111
+ SWPB W ; W.B = 0bxxxx_xxx?
+ RRA.B W ; W.B = 0b?xxx_xxxx
+ AND X,W ; W.B = 0b00xx_xxxx max, for 4k clusters: 0b0000_0xxx
+ MOV.B W,HDLB_ClustOfst(T) ; W.B = Cluster offset
+ CALL #HDLSetCurClustSetCurSect ;
+ CALL #ReadSectorHL ; load SectorHL to be updated in SD_buf
; ----------------------------------;
- MOV @IP+,PC ; BufferPtr = first free byte offset
+ MOV @IP+,PC ;
; ----------------------------------;
BIT #RX_TERM,&TERM_IFG ;3 new char in TERMRXBUF ?
JZ T2S_Get_a_Char_Loop ;2
MOV.B &TERM_RXBUF,X ;3
- MOV.B X,&TERM_TXBUF
CMP.B #4,X ;1 EOT sent by TERATERM ?
JZ T2S_End_Of_File ;2 yes
+; ----------------------------------;
+; MOV.B X,&TERM_TXBUF ; uncomment this line to echo chars
+; ----------------------------------;
MOV.B X,SD_BUF(W) ;3
ADD #1,W ;1
CMP #BytsPerSec-1,W ;2
CALL #CloseHandle ;4
; ----------------------------------;
MOV @RSP+,IP ;
- MOV @IP+,PC ;4
+ MOV @IP+,PC ;
; ----------------------------------;
.ELSE ; if I2C_TERMINAL
FORTHWORD "TERM2SD\34" ; here, I2C_Master is reSTARTed in RX mode
; ==================================;
mDOCOL ;
+; ----------------------------------;
+ .word NOECHO ; comment this line to echo chars
+; ----------------------------------;
.word WRITEDQ ; if already exist FreeAllClusters else create it as WRITE file
mNEXTADR ;
; ----------------------------------;
CALL #CloseHandle ; tranfert SD_BUF to last sector of opened file in SD_CARD then close it
; ----------------------------------;
MOV @RSP+,IP ;
- MOV @IP+,PC ;
+ MOV #ECHO,PC ;
; ----------------------------------;
.ENDIF
I2C_CTRL_CH BIT #TX_TERM,&TERM_IFG ; send it to I2C_Master_RX to restart it in TX mode
JZ I2C_CTRL_CH ; wait TX buffer empty
MOV.B Y,&TERM_TXBUF ; send Ctrl_Char
-WAITCHAREND BIT #4,&TERM_IFG ; I2C_Master (re)STARTed ?
- JZ WAITCHAREND ; loop back if no
; ----------------------------------;
I2C_COLD_TERM
; ----------------------------------;
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
-CurFATsector=\$242A!
+LastFATsector=\$2426! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2428! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$242A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$8154! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$817E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$8184! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
+UART_INIT_TERM=\$8154! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$817E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$8184! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL &SOFT_APP)
UART_WARM=\$8186! WARM address
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$8144! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$8144! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$8146! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$8156! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$8156! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$8158! asm CODE, content of WARM+2 by default
-I2C_WARM=\$8180! WARM address
+I2C_COLD_TERM=\$8150! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$8150! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$8152! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$817A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
-CurFATsector=\$242A!
+LastFATsector=\$2426! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2428! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$242A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$C584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$C586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$C584! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$C586! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$C544! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$C544! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$C546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$C556! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$C556! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$C558! asm CODE, content of WARM+2 by default
-I2C_WARM=\$C580! WARM address
+I2C_COLD_TERM=\$C550! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$C550! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$C552! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$C57A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
-CurFATsector=\$242A!
+LastFATsector=\$2426! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2428! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$242A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$8154! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$817E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$8184! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$8186! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$8154! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$817E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$8184! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL &SOFT_APP)
+UART_WARM=\$8186! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$8144! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$8144! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$8146! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$8156! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$8156! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$8158! asm CODE, content of WARM+2 by default
-I2C_WARM=\$8180! WARM address
+I2C_COLD_TERM=\$8150! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$8150! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$8152! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$817A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
VERSION=\$180A!
DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
-DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
-DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
-DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
!
PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
LSATCK=\$2000! leave stack, grow up
PSTACK=\$2080! parameter stack, grow down
RSTACK=\$20E0! Return stack, grow down
-!
+!
PAD_I2CADR=\$20E0! RX I2C address
PAD_I2CCNT=\$20E2! count max
PAD_ORG=\$20E4! user scratch pad buffer, 84 bytes, grow up
-!
+!
TIB_I2CADR=\$2138! TX I2C address
TIB_I2CCNT=\$213A! count of bytes
TIB_ORG=\$213C! Terminal input buffer, 84 bytes, grow up
-!
+!
HOLDS_ORG=\$2190! base address for HOLDS
HOLD_BASE=\$21B2! BASE HOLD area, grow down
!
CONTEXT=\$21CE! CONTEXT dictionnary space (8 CELLS)
!
! ---------------------------------------
-!21E0! 28 RAM bytes free
+!21E0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
BUFEND=\$2400!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2402!
BS_FirstSectorL=\$2404!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$241E!
+BufferPtr=\$241E!
BufferLen=\$2420!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
-CurFATsector=\$242A!
+LastFATsector=\$2426! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2428! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$242A! used by APPEND"
! ---------------------------------------
! DIR entry
! ---------------------------------------
DIRclusterL=\$242C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$242E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2430!
+EntryOfst=\$2430!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2438!
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
INIT_FORTH=\$C4D0! asm CODE common part of RST and QABORT, starts FORTH engine
QABORT=\$C508! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$C512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+ABORT_TERM=\$C512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$C584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$C586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$C584! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$C586! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$C544! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$C544! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$C546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$C556! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$C556! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$C558! asm CODE, content of WARM+2 by default
-I2C_WARM=\$C580! WARM address
+I2C_COLD_TERM=\$C550! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$C550! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$C552! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$C57A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
I2CSLA0=\$FFA2! UCBxI2COA0 default value address
I2CSLA1=\$FFA4! UCBxI2COA1 default value address
I2CSLA2=\$FFA6! UCBxI2COA2 default value address
PMMCTL0=\$120! \ PMM Control 0
PMMCTL1=\$122! \ PMM Control 0
PMMCTL2=\$124! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-SYSCTL=\$140! \ System control
-SYSBSLC=\$142! \ Bootstrap loader configuration area
-SYSJMBC=\$146! \ JTAG mailbox control
-SYSJMBI0=\$148! \ JTAG mailbox input 0
-SYSJMBI1=\$14A! \ JTAG mailbox input 1
-SYSJMBO0=\$14C! \ JTAG mailbox output 0
-SYSJMBO1=\$14E! \ JTAG mailbox output 1
-SYSUNIV=\$15A! \ User NMI vector generator
-SYSSNIV=\$15C! \ System NMI vector generator
-SYSRSTIV=\$15E! \ Reset vector generator
-SYSCFG0=\$160! \ System configuration 0
-SYSCFG1=\$162! \ System configuration 1
-SYSCFG2=\$164! \ System configuration 2
-
-CSCTL0=\$180! \ CS control 0
-CSCTL1=\$182! \ CS control 1
-CSCTL2=\$184! \ CS control 2
-CSCTL3=\$186! \ CS control 3
-CSCTL4=\$188! \ CS control 4
-CSCTL5=\$18A! \ CS control 5
-CSCTL6=\$18C! \ CS control 6
-CSCTL7=\$18E! \ CS control 7
-CSCTL8=\$190! \ CS control 8
-
-
-FRCTLCTL0=\$1A0! \ FRAM control 0
-GCCTL0=\$1A4! \ General control 0
-GCCTL1=\$1A6! \ General control 1
-
-CRC16DI=\$1C0! \ CRC data input
-CRCDIRB=\$1C2! \ CRC data input reverse byte
-CRCINIRES=\$1C4! \ CRC initialization and result
-CRCRESR=\$1C6! \ CRC result reverse byte
+SYSCTL=\$140! \ System control
+SYSBSLC=\$142! \ Bootstrap loader configuration area
+SYSJMBC=\$146! \ JTAG mailbox control
+SYSJMBI0=\$148! \ JTAG mailbox input 0
+SYSJMBI1=\$14A! \ JTAG mailbox input 1
+SYSJMBO0=\$14C! \ JTAG mailbox output 0
+SYSJMBO1=\$14E! \ JTAG mailbox output 1
+SYSUNIV=\$15A! \ User NMI vector generator
+SYSSNIV=\$15C! \ System NMI vector generator
+SYSRSTIV=\$15E! \ Reset vector generator
+SYSCFG0=\$160! \ System configuration 0
+SYSCFG1=\$162! \ System configuration 1
+SYSCFG2=\$164! \ System configuration 2
+
+CSCTL0=\$180! \ CS control 0
+CSCTL1=\$182! \ CS control 1
+CSCTL2=\$184! \ CS control 2
+CSCTL3=\$186! \ CS control 3
+CSCTL4=\$188! \ CS control 4
+CSCTL5=\$18A! \ CS control 5
+CSCTL6=\$18C! \ CS control 6
+CSCTL7=\$18E! \ CS control 7
+CSCTL8=\$190! \ CS control 8
+
+
+FRCTLCTL0=\$1A0! \ FRAM control 0
+GCCTL0=\$1A4! \ General control 0
+GCCTL1=\$1A6! \ General control 1
+
+CRC16DI=\$1C0! \ CRC data input
+CRCDIRB=\$1C2! \ CRC data input reverse byte
+CRCINIRES=\$1C4! \ CRC initialization and result
+CRCRESR=\$1C6! \ CRC result reverse byte
WDTCTL=\$1CC! \ WDT control register
P3SEL1=\$22C!
-RTCCTL=\$300! \ RTC control
-RTCIV=\$304! \ RTC interrupt vector word
-RTCMOD=\$308! \ RTC modulo
-RTCCNT=\$30C! \ RTC counter register
+RTCCTL=\$300! \ RTC control
+RTCIV=\$304! \ RTC interrupt vector word
+RTCMOD=\$308! \ RTC modulo
+RTCCNT=\$30C! \ RTC counter register
TACLR=4!
TAIFG=1!
CCIFG=1!
-TA0CTL=\$380! \ TA0 control
-TA0CCTL0=\$382! \ Capture/compare control 0
-TA0CCTL1=\$384! \ Capture/compare control 1
-TA0CCTL2=\$386! \ Capture/compare control 2
-TA0R=\$390! \ TA0 counter register
-TA0CCR0=\$392! \ Capture/compare register 0
-TA0CCR1=\$394! \ Capture/compare register 1
-TA0CCR2=\$396! \ Capture/compare register 2
-TA0EX0=\$3A0! \ TA0 expansion register 0
-TA0IV=\$3AE! \ TA0 interrupt vector
-
-TA1CTL=\$3C0! \ TA1 control
-TA1CCTL0=\$3C2! \ Capture/compare control 0
-TA1CCTL1=\$3C4! \ Capture/compare control 1
-TA1CCTL2=\$3C6! \ Capture/compare control 2
-TA1R=\$3D0! \ TA1 counter register
-TA1CCR0=\$3D2! \ Capture/compare register 0
-TA1CCR1=\$3D4! \ Capture/compare register 1
-TA1CCR2=\$3D6! \ Capture/compare register 2
-TA1EX0=\$3E0! \ TA1 expansion register 0
-TA1IV=\$3EE! \ TA1 interrupt vector
-
-TA2CTL=\$400! \ TA2 control
-TA2CCTL0=\$402! \ Capture/compare control 0
-TA2CCTL1=\$404! \ Capture/compare control 1
-TA2R=\$410! \ TA2 counter register
-TA2CCR0=\$412! \ Capture/compare register 0
-TA2CCR1=\$414! \ Capture/compare register 1
-TA2EX0=\$420! \ TA2 expansion register 0
-TA2IV=\$42E! \ TA2 interrupt vector
-
-TA3CTL=\$440! \ TA3 control
-TA3CCTL0=\$442! \ Capture/compare control 0
-TA3CCTL1=\$444! \ Capture/compare control 1
-TA3R=\$450! \ TA3 counter register
-TA3CCR0=\$452! \ Capture/compare register 0
-TA3CCR1=\$454! \ Capture/compare register 1
-TA3EX0=\$460! \ TA3 expansion register 0
-TA3IV=\$46E! \ TA3 interrupt vector
+TA0CTL=\$380! \ TA0 control
+TA0CCTL0=\$382! \ Capture/compare control 0
+TA0CCTL1=\$384! \ Capture/compare control 1
+TA0CCTL2=\$386! \ Capture/compare control 2
+TA0R=\$390! \ TA0 counter register
+TA0CCR0=\$392! \ Capture/compare register 0
+TA0CCR1=\$394! \ Capture/compare register 1
+TA0CCR2=\$396! \ Capture/compare register 2
+TA0EX0=\$3A0! \ TA0 expansion register 0
+TA0IV=\$3AE! \ TA0 interrupt vector
+
+TA1CTL=\$3C0! \ TA1 control
+TA1CCTL0=\$3C2! \ Capture/compare control 0
+TA1CCTL1=\$3C4! \ Capture/compare control 1
+TA1CCTL2=\$3C6! \ Capture/compare control 2
+TA1R=\$3D0! \ TA1 counter register
+TA1CCR0=\$3D2! \ Capture/compare register 0
+TA1CCR1=\$3D4! \ Capture/compare register 1
+TA1CCR2=\$3D6! \ Capture/compare register 2
+TA1EX0=\$3E0! \ TA1 expansion register 0
+TA1IV=\$3EE! \ TA1 interrupt vector
+
+TA2CTL=\$400! \ TA2 control
+TA2CCTL0=\$402! \ Capture/compare control 0
+TA2CCTL1=\$404! \ Capture/compare control 1
+TA2R=\$410! \ TA2 counter register
+TA2CCR0=\$412! \ Capture/compare register 0
+TA2CCR1=\$414! \ Capture/compare register 1
+TA2EX0=\$420! \ TA2 expansion register 0
+TA2IV=\$42E! \ TA2 interrupt vector
+
+TA3CTL=\$440! \ TA3 control
+TA3CCTL0=\$442! \ Capture/compare control 0
+TA3CCTL1=\$444! \ Capture/compare control 1
+TA3R=\$450! \ TA3 counter register
+TA3CCR0=\$452! \ Capture/compare register 0
+TA3CCR1=\$454! \ Capture/compare register 1
+TA3EX0=\$460! \ TA3 expansion register 0
+TA3IV=\$46E! \ TA3 interrupt vector
MPY=\$4C0! \ 16-bit operand 1 - multiply
-UCA0CTLW0=\$500! \ eUSCI_A control word 0
-UCA0CTLW1=\$502! \ eUSCI_A control word 1
-UCA0BRW=\$506!
-UCA0BR0=\$506! \ eUSCI_A baud rate 0
-UCA0BR1=\$507! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$508! \ eUSCI_A modulation control
-UCA0STAT=\$50A! \ eUSCI_A status
-UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
-UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$510! \ eUSCI_A LIN control
-UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
-UCA0IE=\$51A! \ eUSCI_A interrupt enable
-UCA0IFG=\$51C! \ eUSCI_A interrupt flags
-UCA0IV=\$51E! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$520! \ eUSCI_A control word 0
-UCA1CTLW1=\$522! \ eUSCI_A control word 1
-UCA1BRW=\$526!
-UCA1BR0=\$526! \ eUSCI_A baud rate 0
-UCA1BR1=\$527! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$528! \ eUSCI_A modulation control
-UCA1STAT=\$52A! \ eUSCI_A status
-UCA1RXBUF=\$52C! \ eUSCI_A receive buffer
-UCA1TXBUF=\$52E! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$530! \ eUSCI_A LIN control
-UCA1IRTCTL=\$532! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$533! \ eUSCI_A IrDA receive control
-UCA1IE=\$53A! \ eUSCI_A interrupt enable
-UCA1IFG=\$53C! \ eUSCI_A interrupt flags
-UCA1IV=\$53E! \ eUSCI_A interrupt vector word
-
-
-UCB0CTLW0=\$540! \ eUSCI_B control word 0
-UCB0CTLW1=\$542! \ eUSCI_B control word 1
-UCB0BRW=\$546!
-UCB0BR0=\$546! \ eUSCI_B bit rate 0
-UCB0BR1=\$547! \ eUSCI_B bit rate 1
-UCB0STATW=\$548! \ eUSCI_B status word
-UCBCNT0=\$549! \ eUSCI_B hardware count
-UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$55C! \ eUSCI_B received address
-UCB0ADDMASK=\$55E! \ eUSCI_B address mask
-UCB0I2CSA=\$560! \ eUSCI I2C slave address
-UCB0IE=\$56A! \ eUSCI interrupt enable
-UCB0IFG=\$56C! \ eUSCI interrupt flags
-UCB0IV=\$56E! \ eUSCI interrupt vector word
+UCA0CTLW0=\$500! \ eUSCI_A control word 0
+UCA0CTLW1=\$502! \ eUSCI_A control word 1
+UCA0BRW=\$506!
+UCA0BR0=\$506! \ eUSCI_A baud rate 0
+UCA0BR1=\$507! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$508! \ eUSCI_A modulation control
+UCA0STAT=\$50A! \ eUSCI_A status
+UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
+UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$510! \ eUSCI_A LIN control
+UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
+UCA0IE=\$51A! \ eUSCI_A interrupt enable
+UCA0IFG=\$51C! \ eUSCI_A interrupt flags
+UCA0IV=\$51E! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$520! \ eUSCI_A control word 0
+UCA1CTLW1=\$522! \ eUSCI_A control word 1
+UCA1BRW=\$526!
+UCA1BR0=\$526! \ eUSCI_A baud rate 0
+UCA1BR1=\$527! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$528! \ eUSCI_A modulation control
+UCA1STAT=\$52A! \ eUSCI_A status
+UCA1RXBUF=\$52C! \ eUSCI_A receive buffer
+UCA1TXBUF=\$52E! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$530! \ eUSCI_A LIN control
+UCA1IRTCTL=\$532! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$533! \ eUSCI_A IrDA receive control
+UCA1IE=\$53A! \ eUSCI_A interrupt enable
+UCA1IFG=\$53C! \ eUSCI_A interrupt flags
+UCA1IV=\$53E! \ eUSCI_A interrupt vector word
+
+
+UCB0CTLW0=\$540! \ eUSCI_B control word 0
+UCB0CTLW1=\$542! \ eUSCI_B control word 1
+UCB0BRW=\$546!
+UCB0BR0=\$546! \ eUSCI_B bit rate 0
+UCB0BR1=\$547! \ eUSCI_B bit rate 1
+UCB0STATW=\$548! \ eUSCI_B status word
+UCBCNT0=\$549! \ eUSCI_B hardware count
+UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$55C! \ eUSCI_B received address
+UCB0ADDMASK=\$55E! \ eUSCI_B address mask
+UCB0I2CSA=\$560! \ eUSCI I2C slave address
+UCB0IE=\$56A! \ eUSCI interrupt enable
+UCB0IFG=\$56C! \ eUSCI interrupt flags
+UCB0IV=\$56E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-BAKMEM0=\$660! \ Backup Memory 0
-BAKMEM1=\$662! \ Backup Memory 1
-BAKMEM2=\$664! \ Backup Memory 2
-BAKMEM3=\$666! \ Backup Memory 3
-BAKMEM4=\$668! \ Backup Memory 4
-BAKMEM5=\$66A! \ Backup Memory 5
-BAKMEM6=\$66C! \ Backup Memory 6
-BAKMEM7=\$66E! \ Backup Memory 7
-BAKMEM8=\$670! \ Backup Memory 8
-BAKMEM9=\$672! \ Backup Memory 9
-BAKMEM10=\$674! \ Backup Memory 10
-BAKMEM11=\$676! \ Backup Memory 11
-BAKMEM12=\$678! \ Backup Memory 12
-BAKMEM13=\$67A! \ Backup Memory 13
-BAKMEM14=\$67C! \ Backup Memory 14
-BAKMEM15=\$67E! \ Backup Memory 15
-
-
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+BAKMEM0=\$660! \ Backup Memory 0
+BAKMEM1=\$662! \ Backup Memory 1
+BAKMEM2=\$664! \ Backup Memory 2
+BAKMEM3=\$666! \ Backup Memory 3
+BAKMEM4=\$668! \ Backup Memory 4
+BAKMEM5=\$66A! \ Backup Memory 5
+BAKMEM6=\$66C! \ Backup Memory 6
+BAKMEM7=\$66E! \ Backup Memory 7
+BAKMEM8=\$670! \ Backup Memory 8
+BAKMEM9=\$672! \ Backup Memory 9
+BAKMEM10=\$674! \ Backup Memory 10
+BAKMEM11=\$676! \ Backup Memory 11
+BAKMEM12=\$678! \ Backup Memory 12
+BAKMEM13=\$67A! \ Backup Memory 13
+BAKMEM14=\$67C! \ Backup Memory 14
+BAKMEM15=\$67E! \ Backup Memory 15
+
+
+ADC10CTL0=\$700! \ ADC10_B Control register 0
+ADC10CTL1=\$702! \ ADC10_B Control register 1
+ADC10CTL2=\$704! \ ADC10_B Control register 2
+ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
+ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
+ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
+ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
+ADC10IE=\$71A! \ ADC10_B Interrupt Enable
+ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
+ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
-CurFATsector=\$242A!
+LastFATsector=\$2426! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2428! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$242A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$C584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$C586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$C554! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$C57E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$C584! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$C586! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$C544! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$C544! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$C546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$C556! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$C556! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$C558! asm CODE, content of WARM+2 by default
-I2C_WARM=\$C580! WARM address
+I2C_COLD_TERM=\$C550! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$C550! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$C552! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$C57A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
! ---------------------------------------
ClusterL=\$187A! 16 bits wide (FAT16)
ClusterH=\$187C! 16 bits wide (FAT16)
-NewClusterL=\$187E! 16 bits wide (FAT16)
-NewClusterH=\$1880! 16 bits wide (FAT16)
-CurFATsector=\$1882!
+LastFATsector=\$187E! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$1880! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$1882! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$C354! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$C37E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$C384! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$C386! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$C354! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$C37E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$C384! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$C386! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$C344! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$C344! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$C346! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$C356! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$C356! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$C358! asm CODE, content of WARM+2 by default
-I2C_WARM=\$C380! WARM address
+I2C_COLD_TERM=\$C350! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$C350! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$C352! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$C37A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
! ---------------------------------------
ClusterL=\$187A! 16 bits wide (FAT16)
ClusterH=\$187C! 16 bits wide (FAT16)
-NewClusterL=\$187E! 16 bits wide (FAT16)
-NewClusterH=\$1880! 16 bits wide (FAT16)
-CurFATsector=\$1882!
+LastFATsector=\$187E! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$1880! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$1882! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$C354! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$C37E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$C384! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$C386! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$C354! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$C37E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$C384! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$C386! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$C344! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$C344! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$C346! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$C356! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$C356! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$C358! asm CODE, content of WARM+2 by default
-I2C_WARM=\$C380! WARM address
+I2C_COLD_TERM=\$C350! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$C350! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$C352! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$C37A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+LastFATsector=\$2026! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2028! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$202A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$4584! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$4586! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$4544! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
-I2C_WARM=\$4580! WARM address
+I2C_COLD_TERM=\$4550! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$4550! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$4552! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$457A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+LastFATsector=\$2026! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2028! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$202A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$4584! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$4586! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$4544! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
-I2C_WARM=\$4580! WARM address
+I2C_COLD_TERM=\$4550! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$4550! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$4552! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$457A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
TERMBRW_RST=\$1802! TERMBRW_RST
TERMMCTLW_RST=\$1804! TERMMCTLW_RST
I2CSLAVEADR=\$1802! I2C_SLAVE address
-I2CSLAVEADR1=\$1804!
+I2CSLAVEADR1=\$1804!
LPM_MODE=\$1806! LPM_MODE value, LPM0+GIE is the default value
USERSTIV=\$1808! user SYS variable, defines software RESET, DEEP_RST, INIT_HARWARE, etc.
VERSION=\$180A!
DEEP_SOFT=\$1814! to DEEP_INIT SOFT_APP
DEEP_HARD=\$1816! to DEEP_INIT HARD_APP
DEEP_SLEEP=\$1818! to DEEP_INIT SLEEP_APP
-DEEP_DP=\$181A! to DEEP_INIT RST_DP
+DEEP_DP=\$181A! to DEEP_INIT RST_DP
DEEP_LASTVOC=\$181C! to DEEP_INIT RST_LASTVOC
-DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
-DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
+DEEP_CURRENT=\$181E! to DEEP_INIT RST_CURRENT
+DEEP_CONTEXT=\$1820! to DEEP_INIT RST_CONTEXT
!
PUC_ABORT_ORG=\$1822! MOV #PUC_ABORT_ORG,X
INIT_ACCEPT=\$1822! to INIT PFA_ACCEPT
PAD_I2CCNT=\$1CE2! count max
PAD_ORG=\$1CE4! user scratch pad buffer, 84 bytes, grow up
!
-TIB_I2CADR=\$1D38! TX I2C address
+TIB_I2CADR=\$1D38! TX I2C address
TIB_I2CCNT=\$1D3A! count of bytes
TIB_ORG=\$1D3C! Terminal input buffer, 84 bytes, grow up
!
CONTEXT=\$1DCE! CONTEXT dictionnary space (8 CELLS)
!
! ---------------------------------------
-!1DE0! 28 RAM bytes free
+!1DE0! 28 RAM bytes free
! ---------------------------------------
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+LastFATsector=\$2026! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2028! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$202A! used by APPEND"
! ---------------------------------------
! DIR entry
HDLW_PrevORG=26! previous ORG
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=28!
FirstHandle=\$2038!
! to restore rDOCOL: MOV &INIT_DOCOL,rDOCOL
INIT_FORTH=\$44D0! asm CODE common part of RST and QABORT, starts FORTH engine
QABORT=\$4508! CODE_WITHOUT_RETURN run-time part of ABORT"
-ABORT_TERM=\$4512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
+ABORT_TERM=\$4512! CODE_WITHOUT_RETURN, called by QREVEAL and INTERPRET
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$4584! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$4586! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$4544! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
-I2C_WARM=\$4580! WARM address
+I2C_COLD_TERM=\$4550! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$4550! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$4552! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$457A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
DMA2SZ=\$53A! \ DMA channel 2 transfer size
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEGB2=\$5A4! \ MPU Segmentation Border2
-MPUSEGB1=\$5A6! \ MPU Segmentation Border1
-MPUSAM=\$5A8! \ MPU access management
-MPUIPC0=\$5AA! \ MPU IP control 0
-MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEGB2=\$5A4! \ MPU Segmentation Border2
+MPUSEGB1=\$5A6! \ MPU Segmentation Border1
+MPUSAM=\$5A8! \ MPU access management
+MPUIPC0=\$5AA! \ MPU IP control 0
+MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-LastFATsector=\$2026! 16 bits wide (FAT16)
-LastFAToffset=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+LastFATsector=\$2026! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2028! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$202A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$4154! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
-UART_COLD_TERM=\$417E! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
-UART_INIT_SOFT=\$4184! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
-UART_RXON=\$4186! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$4154! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$417E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$4184! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL &SOFT_APP)
+UART_WARM=\$4186! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
I2C_ACCEPT=\$4144! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$4146! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$4156! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
-I2C_INIT_SOFT=\$4156! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
-I2C_INIT_TERM=\$4158! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
-I2C_WARM=\$4180! WARM address
+I2C_COLD_TERM=\$4150! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$4150! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$4152! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$417A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+LastFATsector=\$2026! Set by FreeAllClusters, used by OPEN_OVERWRITE
+LastFAToffset=\$2028! Set by FreeAllClusters, used by OPEN_OVERWRITE
+FATsector=\$202A! used by APPEND"
! ---------------------------------------
! DIR entry
!-------------------------------------------------------------------------------
! UART FASTFORTH
!-------------------------------------------------------------------------------
-UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL #UART_INIT_TERM)
-UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL #UART_COLD_TERM)
-UART_INIT_SOFT=\$4584! asm CODE, content of INIT_FORTH+2 (by default, INIT_FORTH starts with: CALL #RET_ADR)
-UART_RXON=\$4586! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
-UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL #UART_RXON)
+UART_INIT_TERM=\$4554! asm CODE, content of WARM+2 by default (WARM starts with: CALL &HARD_APP)
+UART_COLD_TERM=\$457E! asm CODE, content of COLD+2 by default (COLD starts with: CALL &STOP_APP)
+UART_INIT_SOFT=\$4584! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SOFT_APP)
+UART_WARM=\$4586! WARM address
+UART_RXON=KEY\+\$8! asm CODE, content of SLEEP+2 (by default, SLEEP starts with: CALL &SLEEP_APP)
UART_RXOFF=ACCEPT\+\$2A! asm CODE, called by ACCEPT after 'CR' and before 'LF'.
!-------------------------------------------------------------------------------
! I2C FASTFORTH
!-------------------------------------------------------------------------------
-I2C_ACCEPT=\$4544! asm CODE, content of SLEEP+2 by default
+I2C_ACCEPT=\$4544! asm CODE, default content of SLEEP_APP (SLEEP starts with: CALL &SLEEP_APP)
I2C_CTRL_CH=\$4546! asm CODE, used as is: MOV.B #CTRL_CHAR,Y
! CALL #I2C_CTRL_CH
-I2C_COLD_TERM=\$4556! asm CODE, content of COLD+2, RET address by default
-I2C_INIT_SOFT=\$4556! asm CODE, content of INIT_FORTH+2, RET address by default
-I2C_INIT_TERM=\$4558! asm CODE, content of WARM+2 by default
-I2C_WARM=\$4580! WARM address
+I2C_COLD_TERM=\$4550! asm CODE, default content of STOP_APP (COLD starts with: CALL &STOP_APP)
+I2C_INIT_SOFT=\$4550! asm CODE, default content of SOFT_APP (INIT_FORTH starts with: CALL &SOFT_APP)
+I2C_INIT_TERM=\$4552! asm CODE, default content of HARD_APP (WARM starts with: CALL &HARD_APP)
+I2C_WARM=\$457A! WARM address
!-------------------------------------------------------------------------------
NOPUC=SYS\+\$0A! NOPUC with FORTH: ' SYS 10 +
COLD=SYS\+\$16! COLD address ' SYS 22 +
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