/*\r
- Produced by NSL Core(version=20110302), IP ARCH, Inc. Fri Jul 08 20:39:37 2011\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 23:25:37 2011\r
Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp :NON PROFIT USER:\r
*/\r
\r
-module vga_generate ( p_reset , m_clock , i_pix32_data , o_v_sync , o_h_sync , o_vga_red , o_vga_green , o_vga_blue , o_h_cnt , fi_ack_req_32dot , fo_req_32dot );\r
- input p_reset;\r
+module vga_gen ( i_clk50M , m_clock , p_reset , o_vsync , o_hsync , o_vga_r , o_vga_g , o_vga_b , i_wrdata1 , i_wrdata2 , i_wradrs1 , i_wradrs2 , fi_fifo1_write , fi_fifo2_write , outled , o_vcnt );\r
+ input i_clk50M;\r
input m_clock;\r
- input [31:0] i_pix32_data;\r
- output o_v_sync;\r
- output o_h_sync;\r
- output [3:0] o_vga_red;\r
- output [3:0] o_vga_green;\r
- output [3:0] o_vga_blue;\r
- output [9:0] o_h_cnt;\r
- input fi_ack_req_32dot;\r
- output fo_req_32dot;\r
- wire fs_disp_data;\r
- reg r_v_sync;\r
- reg r_h_sync;\r
- reg r_h_flg;\r
- reg r_vdata_flg;\r
- reg r_hdata_flg;\r
- reg [9:0] r_h_cnt;\r
- reg [18:0] r_v_cnt;\r
- reg [4:0] r_bit32_cnt;\r
- reg r_flg;\r
- reg r_cnt;\r
- reg [31:0] r1;\r
- reg [31:0] r2;\r
- reg r_data_select_flag;\r
- wire [3:0] w_red;\r
- wire [3:0] w_green;\r
- wire [3:0] w_blue;\r
- wire w_disp_data;\r
+ input p_reset;\r
+ output o_vsync;\r
+ output o_hsync;\r
+ output [3:0] o_vga_r;\r
+ output [3:0] o_vga_g;\r
+ output [3:0] o_vga_b;\r
+ input [7:0] i_wrdata1;\r
+ input [7:0] i_wrdata2;\r
+ input [7:0] i_wradrs1;\r
+ input [7:0] i_wradrs2;\r
+ input fi_fifo1_write;\r
+ input fi_fifo2_write;\r
+ output outled;\r
+ output [9:0] o_vcnt;\r
+ wire fs_fifo1_read;\r
+ wire fs_fifo2_read;\r
+ wire fs_fifo1_exec;\r
+ wire fs_fifo2_exec;\r
+ wire fs_fifo1_reset;\r
+ wire fs_fifo2_reset;\r
+ reg [4:0] r_bit_number;\r
+ reg r_vsync;\r
+ reg r_hsync;\r
+ reg [9:0] r_vcnt;\r
+ reg [9:0] r_hcnt;\r
+ reg [25:0] cnt;\r
+ reg testled;\r
+ reg [2:0] r_outcnt;\r
+ reg [6:0] r_outclr;\r
+ reg r_vcnt_hld;\r
+ wire [23:0] w_rddata1;\r
+ wire [23:0] w_rddata2;\r
+ reg [7:0] r_rdadrs1;\r
+ reg [7:0] r_rdadrs2;\r
+ wire _u_FIFO_p_reset;\r
+ wire _u_FIFO_m_clock;\r
+ wire _u_FIFO_i_we1;\r
+ wire [7:0] _u_FIFO_i_wrdata1;\r
+ wire [7:0] _u_FIFO_i_wradrs1;\r
+ wire _u_FIFO_i_we2;\r
+ wire [7:0] _u_FIFO_i_wrdata2;\r
+ wire [7:0] _u_FIFO_i_wradrs2;\r
+ wire [23:0] _u_FIFO_o_rddata1;\r
+ wire [23:0] _u_FIFO_o_rddata2;\r
+ wire [7:0] _u_FIFO_i_rdadrs1;\r
+ wire [7:0] _u_FIFO_i_rdadrs2;\r
+ wire _u_FIFO_i_clock;\r
+ wire _u_FIFO_i_re1;\r
+ wire _u_FIFO_i_re2;\r
+ wire _u_FIFO_o_rdack1;\r
+ wire _u_FIFO_o_rdack2;\r
wire _net_0;\r
wire _net_1;\r
wire _net_2;\r
wire _net_52;\r
wire _net_53;\r
wire _net_54;\r
- wire _net_55;\r
- wire _net_56;\r
- wire _net_57;\r
- wire _net_58;\r
- wire _net_59;\r
- wire _net_60;\r
- wire _net_61;\r
- wire _net_62;\r
- wire _net_63;\r
- wire _net_64;\r
- wire _net_65;\r
- wire _net_66;\r
- wire _net_67;\r
- wire _net_68;\r
- wire _net_69;\r
+vga_ram u_FIFO (.o_rdack2(_u_FIFO_o_rdack2), .o_rdack1(_u_FIFO_o_rdack1), .i_re2(_u_FIFO_i_re2), .i_re1(_u_FIFO_i_re1), .i_clock(_u_FIFO_i_clock), .i_rdadrs2(_u_FIFO_i_rdadrs2), .i_rdadrs1(_u_FIFO_i_rdadrs1), .o_rddata2(_u_FIFO_o_rddata2), .o_rddata1(_u_FIFO_o_rddata1), .i_wradrs2(_u_FIFO_i_wradrs2), .i_wrdata2(_u_FIFO_i_wrdata2), .i_we2(_u_FIFO_i_we2), .i_wradrs1(_u_FIFO_i_wradrs1), .i_wrdata1(_u_FIFO_i_wrdata1), .i_we1(_u_FIFO_i_we1), .m_clock(_u_FIFO_m_clock), .p_reset(_u_FIFO_p_reset));\r
+\r
+ assign fs_fifo1_read = _net_22;\r
+ assign fs_fifo2_read = _net_19;\r
+ assign fs_fifo1_exec = _net_14;\r
+ assign fs_fifo2_exec = _net_12;\r
+ assign fs_fifo1_reset = _net_1;\r
+ assign fs_fifo2_reset = _net_0;\r
+ assign w_rddata1 = _u_FIFO_o_rddata1;\r
+ assign w_rddata2 = _u_FIFO_o_rddata2;\r
+ assign _u_FIFO_m_clock = m_clock;\r
+ assign _u_FIFO_i_we1 = fi_fifo1_write;\r
+ assign _u_FIFO_i_wrdata1 = i_wrdata1;\r
+ assign _u_FIFO_i_wradrs1 = i_wradrs1;\r
+ assign _u_FIFO_i_we2 = fi_fifo2_write;\r
+ assign _u_FIFO_i_wrdata2 = i_wrdata2;\r
+ assign _u_FIFO_i_wradrs2 = i_wradrs2;\r
+ assign _u_FIFO_i_rdadrs1 = r_rdadrs1;\r
+ assign _u_FIFO_i_rdadrs2 = r_rdadrs2;\r
+ assign _u_FIFO_i_clock = i_clk50M;\r
+ assign _u_FIFO_i_re1 = fs_fifo1_read;\r
+ assign _u_FIFO_i_re2 = fs_fifo2_read;\r
+ assign _net_0 = r_vcnt_hld&(~(r_vcnt[0]));\r
+ assign _net_1 = (~r_vcnt_hld)&(r_vcnt[0]);\r
+ assign _net_2 = (cnt)==(26'b01011111010111100001000000);\r
+ assign _net_3 = ~_net_2;\r
+ assign _net_4 = (r_hcnt) < (10'b1100100000);\r
+ assign _net_5 = ~_net_4;\r
+ assign _net_6 = (r_vcnt) < (10'b1000001001);\r
+ assign _net_7 = ~_net_4;\r
+ assign _net_8 = (~_net_4)&_net_6;\r
+ assign _net_9 = (~_net_4)&(~_net_6);\r
+ assign _net_10 = ((r_hcnt) < (10'b1010000000))&((r_vcnt) < (10'b0111100000));\r
+ assign _net_11 = r_vcnt[0];\r
+ assign _net_12 = _net_10&_net_11;\r
+ assign _net_13 = ~(r_vcnt[0]);\r
+ assign _net_14 = _net_10&_net_13;\r
+ assign _net_15 = (r_bit_number)==(5'b10111);\r
+ assign _net_16 = _net_10&_net_15;\r
+ assign _net_17 = r_vcnt[0];\r
+ assign _net_18 = _net_10&_net_15;\r
+ assign _net_19 = (_net_10&_net_15)&_net_17;\r
+ assign _net_20 = ~(r_vcnt[0]);\r
+ assign _net_21 = _net_10&_net_15;\r
+ assign _net_22 = (_net_10&_net_15)&_net_20;\r
+ assign _net_23 = _net_10&(~_net_15);\r
+ assign _net_24 = (r_hcnt)==(10'b1011110000);\r
+ assign _net_25 = ~_net_10;\r
+ assign _net_26 = (~_net_10)&_net_24;\r
+ assign _net_27 = (r_hcnt)==(10'b1010010000);\r
+ assign _net_28 = ~_net_10;\r
+ assign _net_29 = (~_net_10)&_net_27;\r
+ assign _net_30 = (r_hcnt)==(10'b1010000000);\r
+ assign _net_31 = ~_net_10;\r
+ assign _net_32 = (~_net_10)&_net_30;\r
+ assign _net_33 = (~_net_10)&_net_30;\r
+ assign _net_34 = (~_net_10)&_net_30;\r
+ assign _net_35 = (~_net_10)&_net_30;\r
+ assign _net_36 = (~_net_10)&_net_30;\r
+ assign _net_37 = (~_net_10)&_net_30;\r
+ assign _net_38 = (r_vcnt)==(10'b0111101100);\r
+ assign _net_39 = (r_vcnt)==(10'b0111101010);\r
+ assign _net_40 = (r_vcnt)==(10'b0111100000);\r
+ assign _net_41 = w_rddata1[r_bit_number];\r
+ assign _net_42 = fs_fifo1_exec&_net_41;\r
+ assign _net_43 = fs_fifo1_exec&_net_41;\r
+ assign _net_44 = fs_fifo1_exec&_net_41;\r
+ assign _net_45 = fs_fifo1_exec&(~_net_41);\r
+ assign _net_46 = fs_fifo1_exec&(~_net_41);\r
+ assign _net_47 = fs_fifo1_exec&(~_net_41);\r
+ assign _net_48 = w_rddata2[r_bit_number];\r
+ assign _net_49 = fs_fifo2_exec&_net_48;\r
+ assign _net_50 = fs_fifo2_exec&_net_48;\r
+ assign _net_51 = fs_fifo2_exec&_net_48;\r
+ assign _net_52 = fs_fifo2_exec&(~_net_48);\r
+ assign _net_53 = fs_fifo2_exec&(~_net_48);\r
+ assign _net_54 = fs_fifo2_exec&(~_net_48);\r
+ assign o_vsync = r_vsync;\r
+ assign o_hsync = r_hsync;\r
+ assign o_vga_r = ((_net_49|_net_42)?4'b1111:4'b0)|\r
+ ((_net_52|_net_45|_net_32)?4'b0000:4'b0);\r
+ assign o_vga_g = ((_net_50|_net_43)?4'b1111:4'b0)|\r
+ ((_net_53|_net_46|_net_33)?4'b0000:4'b0);\r
+ assign o_vga_b = ((_net_51|_net_44)?4'b1111:4'b0)|\r
+ ((_net_54|_net_47|_net_34)?4'b0000:4'b0);\r
+ assign outled = testled;\r
+ assign o_vcnt = r_vcnt;\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_bit_number <= 5'b00000;\r
+else if ((_net_23)|(_net_37|_net_16)) \r
+ r_bit_number <= ((_net_23) ?(r_bit_number)+(5'b00001):5'b0)|\r
+ ((_net_37|_net_16) ?5'b00000:5'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_vsync <= 1'b0;\r
+else if ((_net_39)|(_net_38)) \r
+ r_vsync <= ((_net_39) ?1'b0:1'b0)|\r
+ ((_net_38) ?1'b1:1'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_hsync <= 1'b0;\r
+else if ((_net_29)|(_net_26)) \r
+ r_hsync <= ((_net_29) ?1'b0:1'b0)|\r
+ ((_net_26) ?1'b1:1'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_vcnt <= 10'b0000000000;\r
+else if ((_net_9)|(_net_8)) \r
+ r_vcnt <= ((_net_9) ?10'b0000000000:10'b0)|\r
+ ((_net_8) ?(r_vcnt)+(10'b0000000001):10'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_hcnt <= 10'b0000000000;\r
+else if ((_net_5)|(_net_4)) \r
+ r_hcnt <= ((_net_5) ?10'b0000000000:10'b0)|\r
+ ((_net_4) ?(r_hcnt)+(10'b0000000001):10'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ cnt <= 26'b00000000000000000000000000;\r
+else if ((_net_3)|(_net_2)) \r
+ cnt <= ((_net_3) ?(cnt)+(26'b00000000000000000000000001):26'b0)|\r
+ ((_net_2) ?26'b00000000000000000000000000:26'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ testled <= 1'b0;\r
+else if ((_net_2)) \r
+ testled <= ~testled;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_outcnt <= 3'b000;\r
+else if ((_net_35)) \r
+ r_outcnt <= 3'b000;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_outclr <= 7'b0000000;\r
+else if ((_net_36)) \r
+ r_outclr <= 7'b0000000;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_vcnt_hld <= 1'b0;\r
+else r_vcnt_hld <= r_vcnt[0];\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_rdadrs1 <= 8'b00000000;\r
+else if ((fs_fifo1_reset)|(fs_fifo1_read)) \r
+ r_rdadrs1 <= ((fs_fifo1_reset) ?8'b00000000:8'b0)|\r
+ ((fs_fifo1_read) ?(r_rdadrs1)+(8'b00000011):8'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_rdadrs2 <= 8'b00000000;\r
+else if ((fs_fifo2_reset)|(fs_fifo2_read)) \r
+ r_rdadrs2 <= ((fs_fifo2_reset) ?8'b00000000:8'b0)|\r
+ ((fs_fifo2_read) ?(r_rdadrs2)+(8'b00000011):8'b0);\r
+\r
+end\r
+endmodule\r
+/*\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 23:25:42 2011\r
+ Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp \r
+*/\r
+\r
+module vga_top ( p_reset , m_clock , i_sw , o_vsync , o_hsync , o_vga_r , o_vga_g , o_vga_b , o_LED );\r
+ input p_reset, m_clock;\r
+ input i_sw;\r
+ output o_vsync;\r
+ output o_hsync;\r
+ output [3:0] o_vga_r;\r
+ output [3:0] o_vga_g;\r
+ output [3:0] o_vga_b;\r
+ output [7:0] o_LED;\r
+ reg [2:0] trigger;\r
+ reg r_cnt;\r
+ reg r_reset;\r
+ reg [25:0] r_sec_cnt;\r
+ reg r_LED;\r
+ reg [13:0] r_init_cnt;\r
+ reg [15:0] r_vram_rddata;\r
+ reg [13:0] r_vram_start_adrs;\r
+ reg r_hld_vram_start;\r
+ wire [7:0] w_wrdata1;\r
+ wire [7:0] w_wrdata2;\r
+ wire [7:0] w_wradrs1;\r
+ wire [7:0] w_wradrs2;\r
+ wire fs_fifo1_write;\r
+ wire fs_fifo2_write;\r
+ wire fs_init;\r
+ wire fs_fifo1_charge;\r
+ wire fs_fifo2_charge;\r
+ wire fs_vram_cnt_inc;\r
+ reg [7:0] r_wradrs1;\r
+ reg [7:0] r_wradrs2;\r
+ wire test_write;\r
+ reg [25:0] r_wait_cnt;\r
+ reg [25:0] r_wait_val;\r
+ reg p_wait;\r
+ wire [13:0] _net_57;\r
+ wire [13:0] _net_60;\r
+ wire [13:0] _net_63;\r
+ wire [13:0] _net_66;\r
+ wire [13:0] _net_69;\r
+ wire _proc_p_wait_set;\r
+ wire _proc_p_wait_reset;\r
wire _net_70;\r
+ wire _u_VGA_i_clk50M;\r
+ wire _u_VGA_m_clock;\r
+ wire _u_VGA_p_reset;\r
+ wire _u_VGA_o_vsync;\r
+ wire _u_VGA_o_hsync;\r
+ wire [3:0] _u_VGA_o_vga_r;\r
+ wire [3:0] _u_VGA_o_vga_g;\r
+ wire [3:0] _u_VGA_o_vga_b;\r
+ wire [7:0] _u_VGA_i_wrdata1;\r
+ wire [7:0] _u_VGA_i_wrdata2;\r
+ wire [7:0] _u_VGA_i_wradrs1;\r
+ wire [7:0] _u_VGA_i_wradrs2;\r
+ wire _u_VGA_fi_fifo1_write;\r
+ wire _u_VGA_fi_fifo2_write;\r
+ wire _u_VGA_outled;\r
+ wire [9:0] _u_VGA_o_vcnt;\r
+ wire [13:0] _u_EXP_i_Radrs;\r
+ wire [15:0] _u_EXP_o_Rdata;\r
+ wire _u_EXP_fi_Rd_req;\r
+ wire _u_EXP_fo_Rd_ack;\r
+ wire [7:0] _u_EXP_i_Wdata;\r
+ wire [13:0] _u_EXP_i_Wadrs;\r
+ wire _u_EXP_fi_Wr_req;\r
+ wire _u_EXP_p_reset;\r
+ wire _u_EXP_m_clock;\r
+ wire [5:0] _u_FROMC_i_word_adrs;\r
+ wire [4:0] _u_FROMC_i_line_adrs;\r
+ wire [7:0] _u_FROMC_i_code_num;\r
+ wire _u_FROMC_fi_write_word;\r
+ wire _u_FROMC_fi_delete_word;\r
+ wire _u_FROMC_fi_delete_line;\r
+ wire _u_FROMC_fi_delete_display;\r
+ wire _u_FROMC_fi_slide_line;\r
+ wire [13:0] _u_FROMC_o_vram_adrs;\r
+ wire [7:0] _u_FROMC_o_vram_wdata;\r
+ wire [7:0] _u_FROMC_i_vram_rdata;\r
+ wire _u_FROMC_fo_write_vram;\r
+ wire _u_FROMC_fo_read_vram;\r
+ wire _u_FROMC_busy_call;\r
+ wire _u_FROMC_p_reset;\r
+ wire _u_FROMC_m_clock;\r
wire _net_71;\r
wire _net_72;\r
wire _net_73;\r
wire _net_78;\r
wire _net_79;\r
wire _net_80;\r
- wire _net_81;\r
- wire _net_82;\r
- wire _net_83;\r
- wire _net_84;\r
- wire _net_85;\r
- wire _net_86;\r
- wire _net_87;\r
- wire _net_88;\r
- wire _net_89;\r
- wire _net_90;\r
- wire _net_91;\r
- wire _net_92;\r
- wire _net_93;\r
- wire _net_94;\r
- wire _net_95;\r
- wire _net_96;\r
+ reg _reg_81;\r
+ reg _reg_82;\r
+ reg _reg_83;\r
+ reg _reg_84;\r
+ reg _reg_85;\r
+ reg _reg_86;\r
+ reg _reg_87;\r
+ reg _reg_88;\r
+ reg _reg_89;\r
+ reg _reg_90;\r
+ reg _reg_91;\r
+ reg _reg_92;\r
+ reg _reg_93;\r
+ reg _reg_94;\r
+ reg _reg_95;\r
+ reg _reg_96;\r
wire _net_97;\r
+ wire _reg_84_goto;\r
wire _net_98;\r
+ wire _reg_87_goin;\r
wire _net_99;\r
wire _net_100;\r
+ wire _reg_87_goto;\r
wire _net_101;\r
+ wire _reg_83_goin;\r
wire _net_102;\r
wire _net_103;\r
wire _net_104;\r
wire _net_105;\r
+ wire _reg_90_goto;\r
wire _net_106;\r
+ wire _reg_93_goin;\r
wire _net_107;\r
wire _net_108;\r
+ wire _reg_93_goto;\r
wire _net_109;\r
+ wire _reg_89_goin;\r
wire _net_110;\r
wire _net_111;\r
wire _net_112;\r
wire _net_113;\r
+ wire _reg_95_goto;\r
wire _net_114;\r
+ wire _reg_94_goin;\r
wire _net_115;\r
wire _net_116;\r
wire _net_117;\r
wire _net_118;\r
wire _net_119;\r
wire _net_120;\r
+ wire _reg_95_goin;\r
wire _net_121;\r
wire _net_122;\r
wire _net_123;\r
wire _net_138;\r
wire _net_139;\r
wire _net_140;\r
- wire _net_141;\r
- wire _net_142;\r
- wire _net_143;\r
- wire _net_144;\r
- wire _net_145;\r
- wire _net_146;\r
+ reg _reg_141;\r
+ reg _reg_142;\r
+ reg _reg_143;\r
+ reg _reg_144;\r
+ reg _reg_145;\r
+ reg _reg_146;\r
wire _net_147;\r
+ wire _reg_142_goto;\r
wire _net_148;\r
+ wire _reg_145_goin;\r
wire _net_149;\r
wire _net_150;\r
+ wire _reg_145_goto;\r
wire _net_151;\r
+ wire _reg_141_goin;\r
wire _net_152;\r
wire _net_153;\r
wire _net_154;\r
wire _net_158;\r
wire _net_159;\r
wire _net_160;\r
- wire _net_161;\r
- wire _net_162;\r
- wire _net_163;\r
- wire _net_164;\r
- wire _net_165;\r
- wire _net_166;\r
- wire _net_167;\r
+ reg _reg_161;\r
+ reg _reg_162;\r
+ reg _reg_163;\r
+ reg _reg_164;\r
+ reg _reg_165;\r
+ reg _reg_166;\r
+ reg _reg_167;\r
wire _net_168;\r
+ wire _reg_163_goto;\r
wire _net_169;\r
+ wire _reg_166_goin;\r
wire _net_170;\r
wire _net_171;\r
+ wire _reg_166_goto;\r
wire _net_172;\r
+ wire _reg_162_goin;\r
wire _net_173;\r
wire _net_174;\r
wire _net_175;\r
wire _net_187;\r
wire _net_188;\r
wire _net_189;\r
- wire _net_190;\r
- wire _net_191;\r
- wire _net_192;\r
- wire _net_193;\r
- wire _net_194;\r
- wire _net_195;\r
- wire _net_196;\r
- wire _net_197;\r
- wire _net_198;\r
- wire _net_199;\r
- wire _net_200;\r
- wire _net_201;\r
- wire _net_202;\r
- wire _net_203;\r
- wire _net_204;\r
- wire _net_205;\r
- wire _net_206;\r
- wire _net_207;\r
- wire _net_208;\r
- wire _net_209;\r
- wire _net_210;\r
- wire _net_211;\r
- wire _net_212;\r
- wire _net_213;\r
- wire _net_214;\r
- wire _net_215;\r
- wire _net_216;\r
- wire _net_217;\r
- wire _net_218;\r
+ reg _reg_190;\r
+ reg _reg_191;\r
+ reg _reg_192;\r
+ reg _reg_193;\r
+ reg _reg_194;\r
+ reg _reg_195;\r
+ reg _reg_196;\r
+ reg _reg_197;\r
+ reg _reg_198;\r
+ reg _reg_199;\r
+ reg _reg_200;\r
+ reg _reg_201;\r
+ reg _reg_202;\r
+ reg _reg_203;\r
+ reg _reg_204;\r
+ reg _reg_205;\r
+ reg _reg_206;\r
+ reg _reg_207;\r
+ reg _reg_208;\r
+ reg _reg_209;\r
+ reg _reg_210;\r
+ reg _reg_211;\r
+ reg _reg_212;\r
+ reg _reg_213;\r
+ reg _reg_214;\r
+ reg _reg_215;\r
+ reg _reg_216;\r
+ reg _reg_217;\r
+ reg _reg_218;\r
+ reg _reg_219;\r
+ reg _reg_220;\r
+ reg _reg_221;\r
+ reg _reg_222;\r
+ reg _reg_223;\r
+ reg _reg_224;\r
+ reg _reg_225;\r
+ reg _reg_226;\r
+ reg _reg_227;\r
+ reg _reg_228;\r
+ reg _reg_229;\r
+ reg _reg_230;\r
+ reg _reg_231;\r
+ reg _reg_232;\r
+ reg _reg_233;\r
+ reg _reg_234;\r
+ reg _reg_235;\r
+ reg _reg_236;\r
+ reg _reg_237;\r
+ reg _reg_238;\r
+ reg _reg_239;\r
+ reg _reg_240;\r
+ reg _reg_241;\r
+ reg _reg_242;\r
+ reg _reg_243;\r
+ reg _reg_244;\r
+ reg _reg_245;\r
+ reg _reg_246;\r
+ reg _reg_247;\r
+ reg _reg_248;\r
+ reg _reg_249;\r
+ reg _reg_250;\r
+ reg _reg_251;\r
+ reg _reg_252;\r
+ reg _reg_253;\r
+ reg _reg_254;\r
+ reg _reg_255;\r
+ reg _reg_256;\r
+ reg _reg_257;\r
+ reg _reg_258;\r
+ reg _reg_259;\r
+ reg _reg_260;\r
+ reg _reg_261;\r
+ reg _reg_262;\r
+ reg _reg_263;\r
+ reg _reg_264;\r
+ reg _reg_265;\r
+ reg _reg_266;\r
+ reg _reg_267;\r
+ reg _reg_268;\r
+ reg _reg_269;\r
+ reg _reg_270;\r
+ reg _reg_271;\r
+ reg _reg_272;\r
+ reg _reg_273;\r
+ reg _reg_274;\r
+ reg _reg_275;\r
+ reg _reg_276;\r
+ reg _reg_277;\r
+ reg _reg_278;\r
+ reg _reg_279;\r
+ reg _reg_280;\r
+ reg _reg_281;\r
+ reg _reg_282;\r
+ reg _reg_283;\r
+ reg _reg_284;\r
+ reg _reg_285;\r
+ reg _reg_286;\r
+ reg _reg_287;\r
+ reg _reg_288;\r
+ reg _reg_289;\r
+ reg _reg_290;\r
+ reg _reg_291;\r
+ reg _reg_292;\r
+ reg _reg_293;\r
+ reg _reg_294;\r
+ reg _reg_295;\r
+ reg _reg_296;\r
+ reg _reg_297;\r
+ reg _reg_298;\r
+ reg _reg_299;\r
+ reg _reg_300;\r
+ reg _reg_301;\r
+ reg _reg_302;\r
+ wire _net_303;\r
+ wire _net_304;\r
+ wire _net_305;\r
+ wire _net_306;\r
+ wire _net_307;\r
+ wire _net_308;\r
+ wire _net_309;\r
+ wire _net_310;\r
+ wire _net_311;\r
+ wire _net_312;\r
+ wire _net_313;\r
+ wire _net_314;\r
+ wire _net_315;\r
+ wire _net_316;\r
+ wire _net_317;\r
+ wire _net_318;\r
+ wire _net_319;\r
+ wire _net_320;\r
+ wire _net_321;\r
+ wire _net_322;\r
+ wire _net_323;\r
+ wire _net_324;\r
+ wire _net_325;\r
+ wire _net_326;\r
+ wire _net_327;\r
+ wire _net_328;\r
+ wire _net_329;\r
+ wire _net_330;\r
+ wire _net_331;\r
+ wire _net_332;\r
+ wire _net_333;\r
+ wire _net_334;\r
+ wire _net_335;\r
+ wire _net_336;\r
+ wire _net_337;\r
+ wire _net_338;\r
+ wire _net_339;\r
+ wire _net_340;\r
+ wire _net_341;\r
+ wire _net_342;\r
+ wire _net_343;\r
+ wire _net_344;\r
+ wire _net_345;\r
+ wire _net_346;\r
+ wire _net_347;\r
+ wire _net_348;\r
+ wire _net_349;\r
+ wire _net_350;\r
+ wire _net_351;\r
+ wire _net_352;\r
+ wire _net_353;\r
+ wire _net_354;\r
+ wire _net_355;\r
+ wire _net_356;\r
+ wire _net_357;\r
+ wire _net_358;\r
+ wire _net_359;\r
+ wire _net_360;\r
+ wire _net_361;\r
+ wire _net_362;\r
+ wire _net_363;\r
+ wire _net_364;\r
+ wire _net_365;\r
+ wire _net_366;\r
+ wire _net_367;\r
+ wire _net_368;\r
+ wire _net_369;\r
+ wire _net_370;\r
+ wire _net_371;\r
+ wire _net_372;\r
+ wire _net_373;\r
+ wire _net_374;\r
+ wire _net_375;\r
+ wire _net_376;\r
+ wire _net_377;\r
+ wire _net_378;\r
+ wire _net_379;\r
+ wire _net_380;\r
+ wire _net_381;\r
+ wire _net_382;\r
+ wire _net_383;\r
+ wire _net_384;\r
+ wire _net_385;\r
+ wire _net_386;\r
+ wire _net_387;\r
+ wire _net_388;\r
+ wire _net_389;\r
+ wire _net_390;\r
+ wire _net_391;\r
+ wire _net_392;\r
+ wire _net_393;\r
+ wire _net_394;\r
+ wire _net_395;\r
+ wire _net_396;\r
+ wire _net_397;\r
+ wire _net_398;\r
+ wire _net_399;\r
+ wire _net_400;\r
+ wire _net_401;\r
+ wire _net_402;\r
+ wire _net_403;\r
+ wire _net_404;\r
+ wire _net_405;\r
+ wire _net_406;\r
+ wire _net_407;\r
+ wire _net_408;\r
+ wire _net_409;\r
+ wire _net_410;\r
+ wire _net_411;\r
+ wire _net_412;\r
+ wire _net_413;\r
+ wire _net_414;\r
+ wire _net_415;\r
+ wire _net_416;\r
+ wire _net_417;\r
+ wire _net_418;\r
+ wire _net_419;\r
+ wire _net_420;\r
+ wire _net_421;\r
+ wire _net_422;\r
+ wire _net_423;\r
+ wire _net_424;\r
+ wire _net_425;\r
+ wire _net_426;\r
+ wire _net_427;\r
+ wire _net_428;\r
+ wire _net_429;\r
+ wire _net_430;\r
+ wire _net_431;\r
+ wire _net_432;\r
+ wire _net_433;\r
+ wire _net_434;\r
+ wire _net_435;\r
+ wire _net_436;\r
+ wire _net_437;\r
+ wire _net_438;\r
+ wire _net_439;\r
+ wire _net_440;\r
+ wire _net_441;\r
+ wire _net_442;\r
+ wire _net_443;\r
+ wire _net_444;\r
+ wire _net_445;\r
+ wire _net_446;\r
+ wire _net_447;\r
+ wire _net_448;\r
+ wire _net_449;\r
+ wire _net_450;\r
+ wire _net_451;\r
+ wire _net_452;\r
+ wire _net_453;\r
+ wire _net_454;\r
+ wire _net_455;\r
+ wire _net_456;\r
+ wire _net_457;\r
+ wire _net_458;\r
+ wire _net_459;\r
+ wire _net_460;\r
+ wire _net_461;\r
+ wire _net_462;\r
+ wire _net_463;\r
+ wire _net_464;\r
+ wire _net_465;\r
+ wire _net_466;\r
+ wire _net_467;\r
+ wire _net_468;\r
+ wire _net_469;\r
+ wire _net_470;\r
+ wire _net_471;\r
+ wire _net_472;\r
+ wire _net_473;\r
+ wire _net_474;\r
+ wire _net_475;\r
+ wire _net_476;\r
+ wire _net_477;\r
+ wire _net_478;\r
+ wire _net_479;\r
+ wire _net_480;\r
+ wire _net_481;\r
+ wire _net_482;\r
+ wire _net_483;\r
+ wire _net_484;\r
+ wire _net_485;\r
+ wire _net_486;\r
+ wire _net_487;\r
+ wire _net_488;\r
+ wire _net_489;\r
+ wire _net_490;\r
+ wire _net_491;\r
+ wire _net_492;\r
+ wire _net_493;\r
+ wire _net_494;\r
+ wire _net_495;\r
+ wire _net_496;\r
+ wire _net_497;\r
+ wire _net_498;\r
+ wire _net_499;\r
+ wire _net_500;\r
+ wire _net_501;\r
+ wire _net_502;\r
+ wire _net_503;\r
+ wire _net_504;\r
+ wire _net_505;\r
+ wire _net_506;\r
+ wire _net_507;\r
+ wire _net_508;\r
+ wire _net_509;\r
+ wire _net_510;\r
+ wire _net_511;\r
+ wire _net_512;\r
+ wire _net_513;\r
+ wire _net_514;\r
+ wire _net_515;\r
+ wire _net_516;\r
+ wire _net_517;\r
+ wire _net_518;\r
+ wire _net_519;\r
+ wire _net_520;\r
+ wire _net_521;\r
+ wire _net_522;\r
+ wire _net_523;\r
+ wire _net_524;\r
+ wire _net_525;\r
+ wire _net_526;\r
+ wire _net_527;\r
+ wire _net_528;\r
+ wire _net_529;\r
+ wire _net_530;\r
+ wire _net_531;\r
+ wire _net_532;\r
+ wire _net_533;\r
+ wire _net_534;\r
+ wire _net_535;\r
+ wire _net_536;\r
+ wire _net_537;\r
+ wire _net_538;\r
+ wire _net_539;\r
+ wire _net_540;\r
+ wire _net_541;\r
+ wire _net_542;\r
+ wire _net_543;\r
+ wire _net_544;\r
+ wire _net_545;\r
+ wire _net_546;\r
+ wire _net_547;\r
+ wire _net_548;\r
+ wire _net_549;\r
+ wire _net_550;\r
+ wire _net_551;\r
+ wire _net_552;\r
+ wire _net_553;\r
+ wire _net_554;\r
+ wire _net_555;\r
+ wire _net_556;\r
+ wire _net_557;\r
+ wire _net_558;\r
+ wire _net_559;\r
+ wire _net_560;\r
+ wire _net_561;\r
+ wire _net_562;\r
+ wire _net_563;\r
+ wire _net_564;\r
+ wire _net_565;\r
+ wire _net_566;\r
+ wire _net_567;\r
+ wire _net_568;\r
+ wire _net_569;\r
+ wire _net_570;\r
+ wire _net_571;\r
+ wire _net_572;\r
+ wire _net_573;\r
+ wire _net_574;\r
+ wire _net_575;\r
+ wire _net_576;\r
+ wire _net_577;\r
+ wire _net_578;\r
+ wire _net_579;\r
+ wire _net_580;\r
+ wire _net_581;\r
+ wire _net_582;\r
+ wire _net_583;\r
+ wire _net_584;\r
+ wire _net_585;\r
+ wire _net_586;\r
+ wire _net_587;\r
+ wire _net_588;\r
+ wire _net_589;\r
+ wire _net_590;\r
+ wire _net_591;\r
+ wire _net_592;\r
+ wire _net_593;\r
+ wire _net_594;\r
+ wire _net_595;\r
+ wire _net_596;\r
+ wire _net_597;\r
+ wire _net_598;\r
+ wire _net_599;\r
+ wire _net_600;\r
+ wire _net_601;\r
+ wire _net_602;\r
+ wire _net_603;\r
+ wire _net_604;\r
+ wire _net_605;\r
+ wire _net_606;\r
+ wire _net_607;\r
+ wire _net_608;\r
+ wire _net_609;\r
+ wire _net_610;\r
+ wire _net_611;\r
+ wire _net_612;\r
+ wire _net_613;\r
+ wire _net_614;\r
+ wire _net_615;\r
+ wire _net_616;\r
+ wire _net_617;\r
+ wire _net_618;\r
+ wire _net_619;\r
+ wire _net_620;\r
+ wire _net_621;\r
+ wire _net_622;\r
+ wire _net_623;\r
+ wire _net_624;\r
+ wire _net_625;\r
+ wire _net_626;\r
+ wire _net_627;\r
+ wire _net_628;\r
+ wire _net_629;\r
+ wire _net_630;\r
+ wire _net_631;\r
+ wire _net_632;\r
+ wire _net_633;\r
+ wire _net_634;\r
+ wire _net_635;\r
+ wire _net_636;\r
+ wire _net_637;\r
+ wire _net_638;\r
+ wire _net_639;\r
+ wire _net_640;\r
+from_ctrl u_FROMC (.p_reset(p_reset), .m_clock(m_clock), .busy_call(_u_FROMC_busy_call), .fo_read_vram(_u_FROMC_fo_read_vram), .fo_write_vram(_u_FROMC_fo_write_vram), .i_vram_rdata(_u_FROMC_i_vram_rdata), .o_vram_wdata(_u_FROMC_o_vram_wdata), .o_vram_adrs(_u_FROMC_o_vram_adrs), .fi_slide_line(_u_FROMC_fi_slide_line), .fi_delete_display(_u_FROMC_fi_delete_display), .fi_delete_line(_u_FROMC_fi_delete_line), .fi_delete_word(_u_FROMC_fi_delete_word), .fi_write_word(_u_FROMC_fi_write_word), .i_code_num(_u_FROMC_i_code_num), .i_line_adrs(_u_FROMC_i_line_adrs), .i_word_adrs(_u_FROMC_i_word_adrs));\r
+exp_ctrl u_EXP (.p_reset(p_reset), .m_clock(m_clock), .fi_Wr_req(_u_EXP_fi_Wr_req), .i_Wadrs(_u_EXP_i_Wadrs), .i_Wdata(_u_EXP_i_Wdata), .fo_Rd_ack(_u_EXP_fo_Rd_ack), .fi_Rd_req(_u_EXP_fi_Rd_req), .o_Rdata(_u_EXP_o_Rdata), .i_Radrs(_u_EXP_i_Radrs));\r
+vga_gen u_VGA (.o_vcnt(_u_VGA_o_vcnt), .outled(_u_VGA_outled), .fi_fifo2_write(_u_VGA_fi_fifo2_write), .fi_fifo1_write(_u_VGA_fi_fifo1_write), .i_wradrs2(_u_VGA_i_wradrs2), .i_wradrs1(_u_VGA_i_wradrs1), .i_wrdata2(_u_VGA_i_wrdata2), .i_wrdata1(_u_VGA_i_wrdata1), .o_vga_b(_u_VGA_o_vga_b), .o_vga_g(_u_VGA_o_vga_g), .o_vga_r(_u_VGA_o_vga_r), .o_hsync(_u_VGA_o_hsync), .o_vsync(_u_VGA_o_vsync), .p_reset(_u_VGA_p_reset), .m_clock(_u_VGA_m_clock), .i_clk50M(_u_VGA_i_clk50M));\r
\r
- assign fs_disp_data = _net_10;\r
- assign w_red = 4'b0000;\r
- assign w_green = 4'b0000;\r
- assign w_blue = ((_net_20)?4'b0000:4'b0)|\r
- ((_net_18)?4'b1111:4'b0);\r
- assign w_disp_data = ((_net_218)?r2[31]:1'b0)|\r
- ((_net_215)?r2[30]:1'b0)|\r
- ((_net_212)?r2[29]:1'b0)|\r
- ((_net_209)?r2[28]:1'b0)|\r
- ((_net_206)?r2[27]:1'b0)|\r
- ((_net_203)?r2[26]:1'b0)|\r
- ((_net_200)?r2[25]:1'b0)|\r
- ((_net_197)?r2[24]:1'b0)|\r
- ((_net_194)?r2[23]:1'b0)|\r
- ((_net_191)?r2[22]:1'b0)|\r
- ((_net_188)?r2[21]:1'b0)|\r
- ((_net_185)?r2[20]:1'b0)|\r
- ((_net_182)?r2[19]:1'b0)|\r
- ((_net_179)?r2[18]:1'b0)|\r
- ((_net_176)?r2[17]:1'b0)|\r
- ((_net_173)?r2[16]:1'b0)|\r
- ((_net_170)?r2[15]:1'b0)|\r
- ((_net_167)?r2[14]:1'b0)|\r
- ((_net_164)?r2[13]:1'b0)|\r
- ((_net_161)?r2[12]:1'b0)|\r
- ((_net_158)?r2[11]:1'b0)|\r
- ((_net_155)?r2[10]:1'b0)|\r
- ((_net_152)?r2[9]:1'b0)|\r
- ((_net_149)?r2[8]:1'b0)|\r
- ((_net_146)?r2[7]:1'b0)|\r
- ((_net_143)?r2[6]:1'b0)|\r
- ((_net_140)?r2[5]:1'b0)|\r
- ((_net_137)?r2[4]:1'b0)|\r
- ((_net_134)?r2[3]:1'b0)|\r
- ((_net_131)?r2[2]:1'b0)|\r
- ((_net_128)?r2[1]:1'b0)|\r
- ((_net_124)?r2[0]:1'b0)|\r
- ((_net_121)?r1[31]:1'b0)|\r
- ((_net_118)?r1[30]:1'b0)|\r
- ((_net_115)?r1[29]:1'b0)|\r
- ((_net_112)?r1[28]:1'b0)|\r
- ((_net_109)?r1[27]:1'b0)|\r
- ((_net_106)?r1[26]:1'b0)|\r
- ((_net_103)?r1[25]:1'b0)|\r
- ((_net_100)?r1[24]:1'b0)|\r
- ((_net_97)?r1[23]:1'b0)|\r
- ((_net_94)?r1[22]:1'b0)|\r
- ((_net_91)?r1[21]:1'b0)|\r
- ((_net_88)?r1[20]:1'b0)|\r
- ((_net_85)?r1[19]:1'b0)|\r
- ((_net_82)?r1[18]:1'b0)|\r
- ((_net_79)?r1[17]:1'b0)|\r
- ((_net_76)?r1[16]:1'b0)|\r
- ((_net_73)?r1[15]:1'b0)|\r
- ((_net_70)?r1[14]:1'b0)|\r
- ((_net_67)?r1[13]:1'b0)|\r
- ((_net_64)?r1[12]:1'b0)|\r
- ((_net_61)?r1[11]:1'b0)|\r
- ((_net_58)?r1[10]:1'b0)|\r
- ((_net_55)?r1[9]:1'b0)|\r
- ((_net_52)?r1[8]:1'b0)|\r
- ((_net_49)?r1[7]:1'b0)|\r
- ((_net_46)?r1[6]:1'b0)|\r
- ((_net_43)?r1[5]:1'b0)|\r
- ((_net_40)?r1[4]:1'b0)|\r
- ((_net_37)?r1[3]:1'b0)|\r
- ((_net_34)?r1[2]:1'b0)|\r
- ((_net_31)?r1[1]:1'b0)|\r
- ((_net_27)?r1[0]:1'b0);\r
- assign _net_0 = (r_h_cnt)==(10'b1100100000);\r
- assign _net_1 = (r_h_cnt)==(10'b1100001110);\r
- assign _net_2 = (r_h_cnt)==(10'b0010001110);\r
- assign _net_3 = (r_h_cnt)==(10'b0001100000);\r
- assign _net_4 = (((~_net_0)&(~_net_1))&(~_net_2))&(~_net_3);\r
- assign _net_5 = (r_v_cnt)==(19'b1100101110000011111);\r
- assign _net_6 = (r_v_cnt)==(19'b1100011110011011111);\r
- assign _net_7 = (r_v_cnt)==(19'b0000110000011011111);\r
- assign _net_8 = (r_v_cnt)==(19'b0000000011000111111);\r
- assign _net_9 = (((~_net_5)&(~_net_6))&(~_net_7))&(~_net_8);\r
- assign _net_10 = r_hdata_flg&r_vdata_flg;\r
- assign _net_11 = (((r_h_cnt) >= ((10'b0010001110)+(10'b1001100001)))&((r_h_cnt) <= (((10'b1100001110)+(10'b1001100001))+(10'b1111111111))))&((r_v_cnt) >= ((19'b0000110000011011111)+(19'b1111111111111100001)))&((r_v_cnt) <= (((19'b1100011110011011111)+(19'b1111111111111100001))+(19'b1111111111111111111)));\r
- assign _net_12 = (r_bit32_cnt)==(5'b00000);\r
- assign _net_13 = _net_11&_net_12;\r
- assign _net_14 = (r_bit32_cnt)==(5'b11111);\r
- assign _net_15 = _net_11&_net_14;\r
- assign _net_16 = _net_11&(~_net_14);\r
- assign _net_17 = ~_net_11;\r
- assign _net_18 = r_hdata_flg&r_vdata_flg;\r
- assign _net_19 = ~_net_18;\r
- assign _net_20 = ~_net_18;\r
- assign _net_21 = ~_net_18;\r
- assign _net_22 = fi_ack_req_32dot&r_data_select_flag;\r
- assign _net_23 = fi_ack_req_32dot&(~r_data_select_flag);\r
- assign _net_24 = ~r_flg;\r
- assign _net_25 = (r_bit32_cnt)==(5'b11111);\r
- assign _net_26 = fs_disp_data&_net_24;\r
- assign _net_27 = (fs_disp_data&_net_24)&_net_25;\r
- assign _net_28 = (fs_disp_data&_net_24)&_net_25;\r
- assign _net_29 = (r_bit32_cnt)==(5'b11110);\r
- assign _net_30 = fs_disp_data&_net_24;\r
- assign _net_31 = (fs_disp_data&_net_24)&_net_29;\r
- assign _net_32 = (r_bit32_cnt)==(5'b11101);\r
- assign _net_33 = fs_disp_data&_net_24;\r
- assign _net_34 = (fs_disp_data&_net_24)&_net_32;\r
- assign _net_35 = (r_bit32_cnt)==(5'b11100);\r
- assign _net_36 = fs_disp_data&_net_24;\r
- assign _net_37 = (fs_disp_data&_net_24)&_net_35;\r
- assign _net_38 = (r_bit32_cnt)==(5'b11011);\r
- assign _net_39 = fs_disp_data&_net_24;\r
- assign _net_40 = (fs_disp_data&_net_24)&_net_38;\r
- assign _net_41 = (r_bit32_cnt)==(5'b11010);\r
- assign _net_42 = fs_disp_data&_net_24;\r
- assign _net_43 = (fs_disp_data&_net_24)&_net_41;\r
- assign _net_44 = (r_bit32_cnt)==(5'b11001);\r
- assign _net_45 = fs_disp_data&_net_24;\r
- assign _net_46 = (fs_disp_data&_net_24)&_net_44;\r
- assign _net_47 = (r_bit32_cnt)==(5'b11000);\r
- assign _net_48 = fs_disp_data&_net_24;\r
- assign _net_49 = (fs_disp_data&_net_24)&_net_47;\r
- assign _net_50 = (r_bit32_cnt)==(5'b10111);\r
- assign _net_51 = fs_disp_data&_net_24;\r
- assign _net_52 = (fs_disp_data&_net_24)&_net_50;\r
- assign _net_53 = (r_bit32_cnt)==(5'b10110);\r
- assign _net_54 = fs_disp_data&_net_24;\r
- assign _net_55 = (fs_disp_data&_net_24)&_net_53;\r
- assign _net_56 = (r_bit32_cnt)==(5'b10101);\r
- assign _net_57 = fs_disp_data&_net_24;\r
- assign _net_58 = (fs_disp_data&_net_24)&_net_56;\r
- assign _net_59 = (r_bit32_cnt)==(5'b10100);\r
- assign _net_60 = fs_disp_data&_net_24;\r
- assign _net_61 = (fs_disp_data&_net_24)&_net_59;\r
- assign _net_62 = (r_bit32_cnt)==(5'b10011);\r
- assign _net_63 = fs_disp_data&_net_24;\r
- assign _net_64 = (fs_disp_data&_net_24)&_net_62;\r
- assign _net_65 = (r_bit32_cnt)==(5'b10010);\r
- assign _net_66 = fs_disp_data&_net_24;\r
- assign _net_67 = (fs_disp_data&_net_24)&_net_65;\r
- assign _net_68 = (r_bit32_cnt)==(5'b10001);\r
- assign _net_69 = fs_disp_data&_net_24;\r
- assign _net_70 = (fs_disp_data&_net_24)&_net_68;\r
- assign _net_71 = (r_bit32_cnt)==(5'b10000);\r
- assign _net_72 = fs_disp_data&_net_24;\r
- assign _net_73 = (fs_disp_data&_net_24)&_net_71;\r
- assign _net_74 = (r_bit32_cnt)==(5'b01111);\r
- assign _net_75 = fs_disp_data&_net_24;\r
- assign _net_76 = (fs_disp_data&_net_24)&_net_74;\r
- assign _net_77 = (r_bit32_cnt)==(5'b01110);\r
- assign _net_78 = fs_disp_data&_net_24;\r
- assign _net_79 = (fs_disp_data&_net_24)&_net_77;\r
- assign _net_80 = (r_bit32_cnt)==(5'b01101);\r
- assign _net_81 = fs_disp_data&_net_24;\r
- assign _net_82 = (fs_disp_data&_net_24)&_net_80;\r
- assign _net_83 = (r_bit32_cnt)==(5'b01100);\r
- assign _net_84 = fs_disp_data&_net_24;\r
- assign _net_85 = (fs_disp_data&_net_24)&_net_83;\r
- assign _net_86 = (r_bit32_cnt)==(5'b01011);\r
- assign _net_87 = fs_disp_data&_net_24;\r
- assign _net_88 = (fs_disp_data&_net_24)&_net_86;\r
- assign _net_89 = (r_bit32_cnt)==(5'b01010);\r
- assign _net_90 = fs_disp_data&_net_24;\r
- assign _net_91 = (fs_disp_data&_net_24)&_net_89;\r
- assign _net_92 = (r_bit32_cnt)==(5'b01001);\r
- assign _net_93 = fs_disp_data&_net_24;\r
- assign _net_94 = (fs_disp_data&_net_24)&_net_92;\r
- assign _net_95 = (r_bit32_cnt)==(5'b01000);\r
- assign _net_96 = fs_disp_data&_net_24;\r
- assign _net_97 = (fs_disp_data&_net_24)&_net_95;\r
- assign _net_98 = (r_bit32_cnt)==(5'b00111);\r
- assign _net_99 = fs_disp_data&_net_24;\r
- assign _net_100 = (fs_disp_data&_net_24)&_net_98;\r
- assign _net_101 = (r_bit32_cnt)==(5'b00110);\r
- assign _net_102 = fs_disp_data&_net_24;\r
- assign _net_103 = (fs_disp_data&_net_24)&_net_101;\r
- assign _net_104 = (r_bit32_cnt)==(5'b00101);\r
- assign _net_105 = fs_disp_data&_net_24;\r
- assign _net_106 = (fs_disp_data&_net_24)&_net_104;\r
- assign _net_107 = (r_bit32_cnt)==(5'b00100);\r
- assign _net_108 = fs_disp_data&_net_24;\r
- assign _net_109 = (fs_disp_data&_net_24)&_net_107;\r
- assign _net_110 = (r_bit32_cnt)==(5'b00011);\r
- assign _net_111 = fs_disp_data&_net_24;\r
- assign _net_112 = (fs_disp_data&_net_24)&_net_110;\r
- assign _net_113 = (r_bit32_cnt)==(5'b00010);\r
- assign _net_114 = fs_disp_data&_net_24;\r
- assign _net_115 = (fs_disp_data&_net_24)&_net_113;\r
- assign _net_116 = (r_bit32_cnt)==(5'b00001);\r
- assign _net_117 = fs_disp_data&_net_24;\r
- assign _net_118 = (fs_disp_data&_net_24)&_net_116;\r
- assign _net_119 = (r_bit32_cnt)==(5'b00000);\r
- assign _net_120 = fs_disp_data&_net_24;\r
- assign _net_121 = (fs_disp_data&_net_24)&_net_119;\r
- assign _net_122 = (r_bit32_cnt)==(5'b11111);\r
- assign _net_123 = fs_disp_data&(~_net_24);\r
- assign _net_124 = (fs_disp_data&(~_net_24))&_net_122;\r
- assign _net_125 = (fs_disp_data&(~_net_24))&_net_122;\r
- assign _net_126 = (r_bit32_cnt)==(5'b11110);\r
- assign _net_127 = fs_disp_data&(~_net_24);\r
- assign _net_128 = (fs_disp_data&(~_net_24))&_net_126;\r
- assign _net_129 = (r_bit32_cnt)==(5'b11101);\r
- assign _net_130 = fs_disp_data&(~_net_24);\r
- assign _net_131 = (fs_disp_data&(~_net_24))&_net_129;\r
- assign _net_132 = (r_bit32_cnt)==(5'b11100);\r
- assign _net_133 = fs_disp_data&(~_net_24);\r
- assign _net_134 = (fs_disp_data&(~_net_24))&_net_132;\r
- assign _net_135 = (r_bit32_cnt)==(5'b11011);\r
- assign _net_136 = fs_disp_data&(~_net_24);\r
- assign _net_137 = (fs_disp_data&(~_net_24))&_net_135;\r
- assign _net_138 = (r_bit32_cnt)==(5'b11010);\r
- assign _net_139 = fs_disp_data&(~_net_24);\r
- assign _net_140 = (fs_disp_data&(~_net_24))&_net_138;\r
- assign _net_141 = (r_bit32_cnt)==(5'b11001);\r
- assign _net_142 = fs_disp_data&(~_net_24);\r
- assign _net_143 = (fs_disp_data&(~_net_24))&_net_141;\r
- assign _net_144 = (r_bit32_cnt)==(5'b11000);\r
- assign _net_145 = fs_disp_data&(~_net_24);\r
- assign _net_146 = (fs_disp_data&(~_net_24))&_net_144;\r
- assign _net_147 = (r_bit32_cnt)==(5'b10111);\r
- assign _net_148 = fs_disp_data&(~_net_24);\r
- assign _net_149 = (fs_disp_data&(~_net_24))&_net_147;\r
- assign _net_150 = (r_bit32_cnt)==(5'b10110);\r
- assign _net_151 = fs_disp_data&(~_net_24);\r
- assign _net_152 = (fs_disp_data&(~_net_24))&_net_150;\r
- assign _net_153 = (r_bit32_cnt)==(5'b10101);\r
- assign _net_154 = fs_disp_data&(~_net_24);\r
- assign _net_155 = (fs_disp_data&(~_net_24))&_net_153;\r
- assign _net_156 = (r_bit32_cnt)==(5'b10100);\r
- assign _net_157 = fs_disp_data&(~_net_24);\r
- assign _net_158 = (fs_disp_data&(~_net_24))&_net_156;\r
- assign _net_159 = (r_bit32_cnt)==(5'b10011);\r
- assign _net_160 = fs_disp_data&(~_net_24);\r
- assign _net_161 = (fs_disp_data&(~_net_24))&_net_159;\r
- assign _net_162 = (r_bit32_cnt)==(5'b10010);\r
- assign _net_163 = fs_disp_data&(~_net_24);\r
- assign _net_164 = (fs_disp_data&(~_net_24))&_net_162;\r
- assign _net_165 = (r_bit32_cnt)==(5'b10001);\r
- assign _net_166 = fs_disp_data&(~_net_24);\r
- assign _net_167 = (fs_disp_data&(~_net_24))&_net_165;\r
- assign _net_168 = (r_bit32_cnt)==(5'b10000);\r
- assign _net_169 = fs_disp_data&(~_net_24);\r
- assign _net_170 = (fs_disp_data&(~_net_24))&_net_168;\r
- assign _net_171 = (r_bit32_cnt)==(5'b01111);\r
- assign _net_172 = fs_disp_data&(~_net_24);\r
- assign _net_173 = (fs_disp_data&(~_net_24))&_net_171;\r
- assign _net_174 = (r_bit32_cnt)==(5'b01110);\r
- assign _net_175 = fs_disp_data&(~_net_24);\r
- assign _net_176 = (fs_disp_data&(~_net_24))&_net_174;\r
- assign _net_177 = (r_bit32_cnt)==(5'b01101);\r
- assign _net_178 = fs_disp_data&(~_net_24);\r
- assign _net_179 = (fs_disp_data&(~_net_24))&_net_177;\r
- assign _net_180 = (r_bit32_cnt)==(5'b01100);\r
- assign _net_181 = fs_disp_data&(~_net_24);\r
- assign _net_182 = (fs_disp_data&(~_net_24))&_net_180;\r
- assign _net_183 = (r_bit32_cnt)==(5'b01011);\r
- assign _net_184 = fs_disp_data&(~_net_24);\r
- assign _net_185 = (fs_disp_data&(~_net_24))&_net_183;\r
- assign _net_186 = (r_bit32_cnt)==(5'b01010);\r
- assign _net_187 = fs_disp_data&(~_net_24);\r
- assign _net_188 = (fs_disp_data&(~_net_24))&_net_186;\r
- assign _net_189 = (r_bit32_cnt)==(5'b01001);\r
- assign _net_190 = fs_disp_data&(~_net_24);\r
- assign _net_191 = (fs_disp_data&(~_net_24))&_net_189;\r
- assign _net_192 = (r_bit32_cnt)==(5'b01000);\r
- assign _net_193 = fs_disp_data&(~_net_24);\r
- assign _net_194 = (fs_disp_data&(~_net_24))&_net_192;\r
- assign _net_195 = (r_bit32_cnt)==(5'b00111);\r
- assign _net_196 = fs_disp_data&(~_net_24);\r
- assign _net_197 = (fs_disp_data&(~_net_24))&_net_195;\r
- assign _net_198 = (r_bit32_cnt)==(5'b00110);\r
- assign _net_199 = fs_disp_data&(~_net_24);\r
- assign _net_200 = (fs_disp_data&(~_net_24))&_net_198;\r
- assign _net_201 = (r_bit32_cnt)==(5'b00101);\r
- assign _net_202 = fs_disp_data&(~_net_24);\r
- assign _net_203 = (fs_disp_data&(~_net_24))&_net_201;\r
- assign _net_204 = (r_bit32_cnt)==(5'b00100);\r
- assign _net_205 = fs_disp_data&(~_net_24);\r
- assign _net_206 = (fs_disp_data&(~_net_24))&_net_204;\r
- assign _net_207 = (r_bit32_cnt)==(5'b00011);\r
- assign _net_208 = fs_disp_data&(~_net_24);\r
- assign _net_209 = (fs_disp_data&(~_net_24))&_net_207;\r
- assign _net_210 = (r_bit32_cnt)==(5'b00010);\r
- assign _net_211 = fs_disp_data&(~_net_24);\r
- assign _net_212 = (fs_disp_data&(~_net_24))&_net_210;\r
- assign _net_213 = (r_bit32_cnt)==(5'b00001);\r
- assign _net_214 = fs_disp_data&(~_net_24);\r
- assign _net_215 = (fs_disp_data&(~_net_24))&_net_213;\r
- assign _net_216 = (r_bit32_cnt)==(5'b00000);\r
- assign _net_217 = fs_disp_data&(~_net_24);\r
- assign _net_218 = (fs_disp_data&(~_net_24))&_net_216;\r
- assign o_v_sync = r_v_sync;\r
- assign o_h_sync = r_h_sync;\r
- assign o_vga_red = w_red;\r
- assign o_vga_green = w_green;\r
- assign o_vga_blue = w_blue;\r
- assign o_h_cnt = r_h_cnt;\r
- assign fo_req_32dot = _net_13;\r
-always @(posedge m_clock or posedge p_reset)\r
- begin\r
-if (p_reset)\r
- r_v_sync <= 1'b0;\r
-else if ((_net_8|_net_5)) \r
- r_v_sync <= ~r_v_sync;\r
-end\r
-always @(posedge m_clock or posedge p_reset)\r
- begin\r
-if (p_reset)\r
- r_h_sync <= 1'b0;\r
-else if ((_net_3|_net_0)) \r
- r_h_sync <= ~r_h_sync;\r
-end\r
-always @(posedge p_reset)\r
- begin\r
-if (p_reset)\r
- r_h_flg <= 1'b0;\r
-end\r
-always @(posedge m_clock or posedge p_reset)\r
- begin\r
-if (p_reset)\r
- r_vdata_flg <= 1'b0;\r
-else if ((_net_7)|(_net_6)) \r
- r_vdata_flg <= ((_net_7) ?1'b1:1'b0)|\r
- ((_net_6) ?1'b0:1'b0);\r
+ assign w_wrdata1 = ((_reg_143|_reg_91)?r_vram_rddata[7:0]:8'b0)|\r
+ ((_reg_142|_reg_90)?r_vram_rddata[15:8]:8'b0);\r
+ assign w_wrdata2 = ((_reg_164|_reg_85)?r_vram_rddata[7:0]:8'b0)|\r
+ ((_reg_163|_reg_84)?r_vram_rddata[15:8]:8'b0);\r
+ assign w_wradrs1 = r_wradrs1;\r
+ assign w_wradrs2 = r_wradrs2;\r
+ assign fs_fifo1_write = _reg_143|_reg_142|_reg_91|_reg_90;\r
+ assign fs_fifo2_write = _reg_164|_reg_163|_reg_85|_reg_84;\r
+ assign fs_init = _net_71;\r
+ assign fs_fifo1_charge = _net_73;\r
+ assign fs_fifo2_charge = _net_75;\r
+ assign fs_vram_cnt_inc = _reg_161;\r
+ assign test_write = 1'b0;\r
+ assign _net_57 = (r_init_cnt)+(14'b00000000000001);\r
+ assign _net_60 = (r_init_cnt)+(14'b00000000000001);\r
+ assign _net_63 = (r_init_cnt)+(14'b00000000000001);\r
+ assign _net_66 = (r_init_cnt)+(14'b00000000000001);\r
+ assign _net_69 = (r_init_cnt)+(14'b00000000000001);\r
+ assign _proc_p_wait_set = _net_527|_net_525|_net_523|_net_521|_net_519|_reg_296|_reg_294|_reg_292|_reg_290|_reg_288|_reg_286|_reg_284|_reg_282|_reg_280|_reg_278|_reg_276|_reg_274|_reg_272|_net_465|_net_463|_reg_268|_reg_266|_reg_264|_reg_262|_reg_260|_reg_258|_reg_256|_reg_254|_reg_252|_reg_250|_reg_248|_reg_246|_reg_244|_reg_242|_reg_240|_reg_238|_reg_236|_reg_234|_net_389|_net_387|_reg_230|_reg_228|_reg_226|_reg_224|_reg_222|_reg_220|_reg_218|_reg_216|_reg_214|_reg_212|_reg_210|_reg_208|_reg_206|_reg_204|_reg_202|_reg_200|_reg_198|_reg_196|_reg_194|_reg_192|_reg_190;\r
+ assign _proc_p_wait_reset = _net_188;\r
+ assign _net_70 = _proc_p_wait_set|_proc_p_wait_reset;\r
+ assign _u_VGA_i_clk50M = m_clock;\r
+ assign _u_VGA_m_clock = r_cnt;\r
+ assign _u_VGA_p_reset = r_reset;\r
+ assign _u_VGA_i_wrdata1 = w_wrdata1;\r
+ assign _u_VGA_i_wrdata2 = w_wrdata2;\r
+ assign _u_VGA_i_wradrs1 = w_wradrs1;\r
+ assign _u_VGA_i_wradrs2 = w_wradrs2;\r
+ assign _u_VGA_fi_fifo1_write = fs_fifo1_write;\r
+ assign _u_VGA_fi_fifo2_write = fs_fifo2_write;\r
+ assign _u_EXP_i_Radrs = r_init_cnt;\r
+ assign _u_EXP_fi_Rd_req = _net_174|_net_153|_net_111|_net_103;\r
+ assign _u_EXP_i_Wdata = ((_net_123)?r_init_cnt[7:0]:8'b0)|\r
+ ((_net_77)?_u_FROMC_o_vram_wdata:8'b0);\r
+ assign _u_EXP_i_Wadrs = ((_net_124)?r_init_cnt:14'b0)|\r
+ ((_net_78)?_u_FROMC_o_vram_adrs:14'b0);\r
+ assign _u_EXP_fi_Wr_req = _net_122|_net_76;\r
+ assign _u_FROMC_i_word_adrs = ((_net_498|_net_442)?6'b000110:6'b0)|\r
+ ((_net_414)?6'b001111:6'b0)|\r
+ ((_net_518|_net_462|_net_386)?6'b000000:6'b0)|\r
+ ((_net_514|_net_458|_net_382)?6'b000001:6'b0)|\r
+ ((_net_510|_net_454|_net_378)?6'b000010:6'b0)|\r
+ ((_net_506|_net_374)?6'b000011:6'b0)|\r
+ ((_net_450|_net_370)?6'b000100:6'b0)|\r
+ ((_net_502|_net_446|_net_366)?6'b000101:6'b0)|\r
+ ((_net_494|_net_438|_net_362)?6'b000111:6'b0)|\r
+ ((_net_434|_net_358)?6'b001000:6'b0)|\r
+ ((_net_490|_net_430|_net_354)?6'b001001:6'b0)|\r
+ ((_net_486|_net_350)?6'b001010:6'b0)|\r
+ ((_net_482|_net_426|_net_346)?6'b001011:6'b0)|\r
+ ((_net_478|_net_422|_net_342)?6'b001100:6'b0)|\r
+ ((_net_474|_net_418|_net_338)?6'b001101:6'b0)|\r
+ ((_net_470|_net_334)?6'b001110:6'b0)|\r
+ ((_net_410|_net_330)?6'b010000:6'b0)|\r
+ ((_net_406|_net_326)?6'b010001:6'b0)|\r
+ ((_net_402|_net_322)?6'b010010:6'b0)|\r
+ ((_net_398|_net_318)?6'b010011:6'b0)|\r
+ ((_net_394|_net_314)?6'b010100:6'b0)|\r
+ ((_net_310)?6'b010101:6'b0)|\r
+ ((_net_306)?6'b010110:6'b0);\r
+ assign _u_FROMC_i_line_adrs = ((_net_517|_net_513|_net_509|_net_505|_net_501|_net_497|_net_493|_net_489|_net_485|_net_481|_net_477|_net_473|_net_469)?5'b00000:5'b0)|\r
+ ((_net_461|_net_457|_net_453|_net_449|_net_445|_net_441|_net_437|_net_433|_net_429|_net_425|_net_421|_net_417|_net_413|_net_409|_net_405|_net_401|_net_397|_net_393)?5'b00001:5'b0)|\r
+ ((_net_385|_net_381|_net_377|_net_373|_net_369|_net_365|_net_361|_net_357|_net_353|_net_349|_net_345|_net_341|_net_337|_net_333|_net_329|_net_325|_net_321|_net_317|_net_313|_net_309|_net_305)?5'b00010:5'b0);\r
+ assign _u_FROMC_i_code_num = ((_net_516)?8'b01010111:8'b0)|\r
+ ((_net_508)?8'b01101011:8'b0)|\r
+ ((_net_496)?8'b01110000:8'b0)|\r
+ ((_net_492)?8'b00101100:8'b0)|\r
+ ((_net_488)?8'b01001110:8'b0)|\r
+ ((_net_460)?8'b01010100:8'b0)|\r
+ ((_net_448)?8'b01001101:8'b0)|\r
+ ((_net_428)?8'b01111000:8'b0)|\r
+ ((_net_416)?8'b01110011:8'b0)|\r
+ ((_net_412)?8'b01111001:8'b0)|\r
+ ((_net_500|_net_404)?8'b01110101:8'b0)|\r
+ ((_net_384)?8'b01000110:8'b0)|\r
+ ((_net_376|_net_372)?8'b01101100:8'b0)|\r
+ ((_net_480|_net_408|_net_380|_net_368)?8'b01101111:8'b0)|\r
+ ((_net_364|_net_348)?8'b01110111:8'b0)|\r
+ ((_net_456|_net_424|_net_356|_net_344)?8'b01101000:8'b0)|\r
+ ((_net_504|_net_484|_net_452|_net_352|_net_332)?8'b01100101:8'b0)|\r
+ ((_net_436|_net_328)?8'b01110010:8'b0)|\r
+ ((_net_512|_net_444|_net_420|_net_324)?8'b01100001:8'b0)|\r
+ ((_net_320|_net_316)?8'b01100010:8'b0)|\r
+ ((_net_432|_net_340|_net_312)?8'b01101001:8'b0)|\r
+ ((_net_440|_net_360|_net_336|_net_308)?8'b01110100:8'b0)|\r
+ ((_net_476|_net_472|_net_468|_net_400|_net_396|_net_392|_net_304)?8'b00101110:8'b0);\r
+ assign _u_FROMC_fi_write_word = _net_515|_net_511|_net_507|_net_503|_net_499|_net_495|_net_491|_net_487|_net_483|_net_479|_net_475|_net_471|_net_467|_net_459|_net_455|_net_451|_net_447|_net_443|_net_439|_net_435|_net_431|_net_427|_net_423|_net_419|_net_415|_net_411|_net_407|_net_403|_net_399|_net_395|_net_391|_net_383|_net_379|_net_375|_net_371|_net_367|_net_363|_net_359|_net_355|_net_351|_net_347|_net_343|_net_339|_net_335|_net_331|_net_327|_net_323|_net_319|_net_315|_net_311|_net_307|_net_303;\r
+ assign _u_FROMC_fi_delete_word = 1'b0;\r
+ assign _u_FROMC_fi_delete_line = 1'b0;\r
+ assign _u_FROMC_fi_delete_display = 1'b0;\r
+ assign _u_FROMC_fi_slide_line = 1'b0;\r
+ assign _net_71 = (trigger)==(3'b011);\r
+ assign _net_72 = (~r_hld_vram_start)&(_u_VGA_o_vcnt[0]);\r
+ assign _net_73 = r_reset&_net_72;\r
+ assign _net_74 = r_hld_vram_start&(~(_u_VGA_o_vcnt[0]));\r
+ assign _net_75 = r_reset&_net_74;\r
+ assign _net_76 = r_reset&_u_FROMC_fo_write_vram;\r
+ assign _net_77 = r_reset&_u_FROMC_fo_write_vram;\r
+ assign _net_78 = r_reset&_u_FROMC_fo_write_vram;\r
+ assign _net_79 = (r_sec_cnt)==(26'b10111110101111000010000000);\r
+ assign _net_80 = ~_net_79;\r
+ assign _net_97 = (_net_63) < (14'b00000000101000);\r
+ assign _reg_84_goto = _net_98;\r
+ assign _net_98 = _reg_84&_net_97;\r
+ assign _reg_87_goin = _net_99;\r
+ assign _net_99 = _reg_84&_net_97;\r
+ assign _net_100 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_87_goto = _net_101;\r
+ assign _net_101 = _reg_87&_net_100;\r
+ assign _reg_83_goin = _net_102;\r
+ assign _net_102 = _reg_87&_net_100;\r
+ assign _net_103 = _reg_87&(~_net_100);\r
+ assign _net_104 = _reg_87&(~_net_100);\r
+ assign _net_105 = (_net_60) < (14'b00000000101000);\r
+ assign _reg_90_goto = _net_106;\r
+ assign _net_106 = _reg_90&_net_105;\r
+ assign _reg_93_goin = _net_107;\r
+ assign _net_107 = _reg_90&_net_105;\r
+ assign _net_108 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_93_goto = _net_109;\r
+ assign _net_109 = _reg_93&_net_108;\r
+ assign _reg_89_goin = _net_110;\r
+ assign _net_110 = _reg_93&_net_108;\r
+ assign _net_111 = _reg_93&(~_net_108);\r
+ assign _net_112 = _reg_93&(~_net_108);\r
+ assign _net_113 = ~((r_init_cnt) < (14'b10010110000000));\r
+ assign _reg_95_goto = _net_120|_net_114;\r
+ assign _net_114 = _reg_95&_net_113;\r
+ assign _reg_94_goin = _net_115;\r
+ assign _net_115 = _reg_95&_net_113;\r
+ assign _net_116 = _reg_95&(~_net_113);\r
+ assign _net_117 = _reg_95&(~_net_113);\r
+ assign _net_118 = (_net_57) < (14'b10010110000000);\r
+ assign _net_119 = _reg_95&(~_net_113);\r
+ assign _net_120 = (_reg_95&(~_net_113))&_net_118;\r
+ assign _reg_95_goin = _net_121;\r
+ assign _net_121 = (_reg_95&(~_net_113))&_net_118;\r
+ assign _net_122 = _reg_95&(~_net_113);\r
+ assign _net_123 = _reg_95&(~_net_113);\r
+ assign _net_124 = _reg_95&(~_net_113);\r
+ assign _net_125 = fs_init|_reg_96;\r
+ assign _net_126 = (_reg_95_goin|fs_init)|_reg_95|_reg_96;\r
+ assign _net_127 = _reg_94_goin|_reg_94|_reg_95;\r
+ assign _net_128 = _reg_93_goin|_reg_93|_reg_94;\r
+ assign _net_129 = _reg_93_goin|_reg_92|_reg_93;\r
+ assign _net_130 = _reg_93_goin|_reg_91|_reg_92;\r
+ assign _net_131 = _reg_93_goin|_reg_90|_reg_91;\r
+ assign _net_132 = _reg_89_goin|_reg_89|_reg_90;\r
+ assign _net_133 = _reg_89_goin|_reg_88|_reg_89;\r
+ assign _net_134 = _reg_87_goin|_reg_87|_reg_88;\r
+ assign _net_135 = _reg_87_goin|_reg_86|_reg_87;\r
+ assign _net_136 = _reg_87_goin|_reg_85|_reg_86;\r
+ assign _net_137 = _reg_87_goin|_reg_84|_reg_85;\r
+ assign _net_138 = _reg_83_goin|_reg_83|_reg_84;\r
+ assign _net_139 = _reg_83_goin|_reg_82|_reg_83;\r
+ assign _net_140 = _reg_83_goin|_reg_81|_reg_82;\r
+ assign _net_147 = (_net_66) < (14'b00000000101000);\r
+ assign _reg_142_goto = _net_148;\r
+ assign _net_148 = _reg_142&_net_147;\r
+ assign _reg_145_goin = _net_149;\r
+ assign _net_149 = _reg_142&_net_147;\r
+ assign _net_150 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_145_goto = _net_151;\r
+ assign _net_151 = _reg_145&_net_150;\r
+ assign _reg_141_goin = _net_152;\r
+ assign _net_152 = _reg_145&_net_150;\r
+ assign _net_153 = _reg_145&(~_net_150);\r
+ assign _net_154 = _reg_145&(~_net_150);\r
+ assign _net_155 = fs_fifo1_charge|_reg_146;\r
+ assign _net_156 = (_reg_145_goin|fs_fifo1_charge)|_reg_145|_reg_146;\r
+ assign _net_157 = (_reg_145_goin|fs_fifo1_charge)|_reg_144|_reg_145;\r
+ assign _net_158 = (_reg_145_goin|fs_fifo1_charge)|_reg_143|_reg_144;\r
+ assign _net_159 = (_reg_145_goin|fs_fifo1_charge)|_reg_142|_reg_143;\r
+ assign _net_160 = _reg_141_goin|_reg_141|_reg_142;\r
+ assign _net_168 = (_net_69) < (14'b00000000101000);\r
+ assign _reg_163_goto = _net_169;\r
+ assign _net_169 = _reg_163&_net_168;\r
+ assign _reg_166_goin = _net_170;\r
+ assign _net_170 = _reg_163&_net_168;\r
+ assign _net_171 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_166_goto = _net_172;\r
+ assign _net_172 = _reg_166&_net_171;\r
+ assign _reg_162_goin = _net_173;\r
+ assign _net_173 = _reg_166&_net_171;\r
+ assign _net_174 = _reg_166&(~_net_171);\r
+ assign _net_175 = _reg_166&(~_net_171);\r
+ assign _net_176 = fs_fifo2_charge|_reg_167;\r
+ assign _net_177 = (_reg_166_goin|fs_fifo2_charge)|_reg_166|_reg_167;\r
+ assign _net_178 = (_reg_166_goin|fs_fifo2_charge)|_reg_165|_reg_166;\r
+ assign _net_179 = (_reg_166_goin|fs_fifo2_charge)|_reg_164|_reg_165;\r
+ assign _net_180 = (_reg_166_goin|fs_fifo2_charge)|_reg_163|_reg_164;\r
+ assign _net_181 = _reg_162_goin|_reg_162|_reg_163;\r
+ assign _net_182 = _reg_162_goin|_reg_161|_reg_162;\r
+ assign _net_183 = (r_vram_start_adrs)==(14'b10010101011000);\r
+ assign _net_184 = fs_vram_cnt_inc&_net_183;\r
+ assign _net_185 = fs_vram_cnt_inc&(~_net_183);\r
+ assign _net_186 = (r_wait_cnt)==(r_wait_val);\r
+ assign _net_187 = p_wait&_net_186;\r
+ assign _net_188 = p_wait&_net_186;\r
+ assign _net_189 = p_wait&(~_net_186);\r
+ assign _net_303 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_304 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_305 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_306 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_307 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_308 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_309 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_310 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_311 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_312 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_313 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_314 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_315 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_316 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_317 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_318 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_319 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_320 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_321 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_322 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_323 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_324 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_325 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_326 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_327 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_328 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_329 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_330 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_331 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_332 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_333 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_334 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_335 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_336 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_337 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_338 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_339 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_340 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_341 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_342 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_343 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_344 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_345 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_346 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_347 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_348 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_349 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_350 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_351 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_352 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_353 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_354 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_355 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_356 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_357 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_358 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_359 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_360 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_361 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_362 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_363 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_364 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_365 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_366 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_367 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_368 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_369 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_370 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_371 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_372 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_373 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_374 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_375 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_376 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_377 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_378 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_379 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_380 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_381 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_382 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_383 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_384 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_385 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_386 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_387 = _reg_232&p_wait&_proc_p_wait_reset;\r
+ assign _net_388 = _reg_232&p_wait&_proc_p_wait_reset;\r
+ assign _net_389 = _reg_233&p_wait&_proc_p_wait_reset;\r
+ assign _net_390 = _reg_233&p_wait&_proc_p_wait_reset;\r
+ assign _net_391 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_392 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_393 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_394 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_395 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_396 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_397 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_398 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_399 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_400 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_401 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_402 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_403 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_404 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_405 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_406 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_407 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_408 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_409 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_410 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_411 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_412 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_413 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_414 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_415 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_416 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_417 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_418 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_419 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_420 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_421 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_422 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_423 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_424 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_425 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_426 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_427 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_428 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_429 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_430 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_431 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_432 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_433 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_434 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_435 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_436 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_437 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_438 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_439 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_440 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_441 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_442 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_443 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_444 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_445 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_446 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_447 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_448 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_449 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_450 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_451 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_452 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_453 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_454 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_455 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_456 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_457 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_458 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_459 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_460 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_461 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_462 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_463 = _reg_270&p_wait&_proc_p_wait_reset;\r
+ assign _net_464 = _reg_270&p_wait&_proc_p_wait_reset;\r
+ assign _net_465 = _reg_271&p_wait&_proc_p_wait_reset;\r
+ assign _net_466 = _reg_271&p_wait&_proc_p_wait_reset;\r
+ assign _net_467 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_468 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_469 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_470 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_471 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_472 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_473 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_474 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_475 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_476 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_477 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_478 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_479 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_480 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_481 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_482 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_483 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_484 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_485 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_486 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_487 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_488 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_489 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_490 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_491 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_492 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_493 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_494 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_495 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_496 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_497 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_498 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_499 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_500 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_501 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_502 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_503 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_504 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_505 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_506 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_507 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_508 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_509 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_510 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_511 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_512 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_513 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_514 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_515 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_516 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_517 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_518 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_519 = _reg_298&p_wait&_proc_p_wait_reset;\r
+ assign _net_520 = _reg_298&p_wait&_proc_p_wait_reset;\r
+ assign _net_521 = _reg_299&p_wait&_proc_p_wait_reset;\r
+ assign _net_522 = _reg_299&p_wait&_proc_p_wait_reset;\r
+ assign _net_523 = _reg_300&p_wait&_proc_p_wait_reset;\r
+ assign _net_524 = _reg_300&p_wait&_proc_p_wait_reset;\r
+ assign _net_525 = _reg_301&p_wait&_proc_p_wait_reset;\r
+ assign _net_526 = _reg_301&p_wait&_proc_p_wait_reset;\r
+ assign _net_527 = test_write|_reg_302;\r
+ assign _net_528 = test_write|_reg_302;\r
+ assign _net_529 = test_write|_reg_301|_reg_302;\r
+ assign _net_530 = test_write|_reg_300|_reg_301;\r
+ assign _net_531 = test_write|_reg_299|_reg_300;\r
+ assign _net_532 = test_write|_reg_298|_reg_299;\r
+ assign _net_533 = test_write|_reg_297|_reg_298;\r
+ assign _net_534 = test_write|_reg_296|_reg_297;\r
+ assign _net_535 = test_write|_reg_295|_reg_296;\r
+ assign _net_536 = test_write|_reg_294|_reg_295;\r
+ assign _net_537 = test_write|_reg_293|_reg_294;\r
+ assign _net_538 = test_write|_reg_292|_reg_293;\r
+ assign _net_539 = test_write|_reg_291|_reg_292;\r
+ assign _net_540 = test_write|_reg_290|_reg_291;\r
+ assign _net_541 = test_write|_reg_289|_reg_290;\r
+ assign _net_542 = test_write|_reg_288|_reg_289;\r
+ assign _net_543 = test_write|_reg_287|_reg_288;\r
+ assign _net_544 = test_write|_reg_286|_reg_287;\r
+ assign _net_545 = test_write|_reg_285|_reg_286;\r
+ assign _net_546 = test_write|_reg_284|_reg_285;\r
+ assign _net_547 = test_write|_reg_283|_reg_284;\r
+ assign _net_548 = test_write|_reg_282|_reg_283;\r
+ assign _net_549 = test_write|_reg_281|_reg_282;\r
+ assign _net_550 = test_write|_reg_280|_reg_281;\r
+ assign _net_551 = test_write|_reg_279|_reg_280;\r
+ assign _net_552 = test_write|_reg_278|_reg_279;\r
+ assign _net_553 = test_write|_reg_277|_reg_278;\r
+ assign _net_554 = test_write|_reg_276|_reg_277;\r
+ assign _net_555 = test_write|_reg_275|_reg_276;\r
+ assign _net_556 = test_write|_reg_274|_reg_275;\r
+ assign _net_557 = test_write|_reg_273|_reg_274;\r
+ assign _net_558 = test_write|_reg_272|_reg_273;\r
+ assign _net_559 = test_write|_reg_271|_reg_272;\r
+ assign _net_560 = test_write|_reg_270|_reg_271;\r
+ assign _net_561 = test_write|_reg_269|_reg_270;\r
+ assign _net_562 = test_write|_reg_268|_reg_269;\r
+ assign _net_563 = test_write|_reg_267|_reg_268;\r
+ assign _net_564 = test_write|_reg_266|_reg_267;\r
+ assign _net_565 = test_write|_reg_265|_reg_266;\r
+ assign _net_566 = test_write|_reg_264|_reg_265;\r
+ assign _net_567 = test_write|_reg_263|_reg_264;\r
+ assign _net_568 = test_write|_reg_262|_reg_263;\r
+ assign _net_569 = test_write|_reg_261|_reg_262;\r
+ assign _net_570 = test_write|_reg_260|_reg_261;\r
+ assign _net_571 = test_write|_reg_259|_reg_260;\r
+ assign _net_572 = test_write|_reg_258|_reg_259;\r
+ assign _net_573 = test_write|_reg_257|_reg_258;\r
+ assign _net_574 = test_write|_reg_256|_reg_257;\r
+ assign _net_575 = test_write|_reg_255|_reg_256;\r
+ assign _net_576 = test_write|_reg_254|_reg_255;\r
+ assign _net_577 = test_write|_reg_253|_reg_254;\r
+ assign _net_578 = test_write|_reg_252|_reg_253;\r
+ assign _net_579 = test_write|_reg_251|_reg_252;\r
+ assign _net_580 = test_write|_reg_250|_reg_251;\r
+ assign _net_581 = test_write|_reg_249|_reg_250;\r
+ assign _net_582 = test_write|_reg_248|_reg_249;\r
+ assign _net_583 = test_write|_reg_247|_reg_248;\r
+ assign _net_584 = test_write|_reg_246|_reg_247;\r
+ assign _net_585 = test_write|_reg_245|_reg_246;\r
+ assign _net_586 = test_write|_reg_244|_reg_245;\r
+ assign _net_587 = test_write|_reg_243|_reg_244;\r
+ assign _net_588 = test_write|_reg_242|_reg_243;\r
+ assign _net_589 = test_write|_reg_241|_reg_242;\r
+ assign _net_590 = test_write|_reg_240|_reg_241;\r
+ assign _net_591 = test_write|_reg_239|_reg_240;\r
+ assign _net_592 = test_write|_reg_238|_reg_239;\r
+ assign _net_593 = test_write|_reg_237|_reg_238;\r
+ assign _net_594 = test_write|_reg_236|_reg_237;\r
+ assign _net_595 = test_write|_reg_235|_reg_236;\r
+ assign _net_596 = test_write|_reg_234|_reg_235;\r
+ assign _net_597 = test_write|_reg_233|_reg_234;\r
+ assign _net_598 = test_write|_reg_232|_reg_233;\r
+ assign _net_599 = test_write|_reg_231|_reg_232;\r
+ assign _net_600 = test_write|_reg_230|_reg_231;\r
+ assign _net_601 = test_write|_reg_229|_reg_230;\r
+ assign _net_602 = test_write|_reg_228|_reg_229;\r
+ assign _net_603 = test_write|_reg_227|_reg_228;\r
+ assign _net_604 = test_write|_reg_226|_reg_227;\r
+ assign _net_605 = test_write|_reg_225|_reg_226;\r
+ assign _net_606 = test_write|_reg_224|_reg_225;\r
+ assign _net_607 = test_write|_reg_223|_reg_224;\r
+ assign _net_608 = test_write|_reg_222|_reg_223;\r
+ assign _net_609 = test_write|_reg_221|_reg_222;\r
+ assign _net_610 = test_write|_reg_220|_reg_221;\r
+ assign _net_611 = test_write|_reg_219|_reg_220;\r
+ assign _net_612 = test_write|_reg_218|_reg_219;\r
+ assign _net_613 = test_write|_reg_217|_reg_218;\r
+ assign _net_614 = test_write|_reg_216|_reg_217;\r
+ assign _net_615 = test_write|_reg_215|_reg_216;\r
+ assign _net_616 = test_write|_reg_214|_reg_215;\r
+ assign _net_617 = test_write|_reg_213|_reg_214;\r
+ assign _net_618 = test_write|_reg_212|_reg_213;\r
+ assign _net_619 = test_write|_reg_211|_reg_212;\r
+ assign _net_620 = test_write|_reg_210|_reg_211;\r
+ assign _net_621 = test_write|_reg_209|_reg_210;\r
+ assign _net_622 = test_write|_reg_208|_reg_209;\r
+ assign _net_623 = test_write|_reg_207|_reg_208;\r
+ assign _net_624 = test_write|_reg_206|_reg_207;\r
+ assign _net_625 = test_write|_reg_205|_reg_206;\r
+ assign _net_626 = test_write|_reg_204|_reg_205;\r
+ assign _net_627 = test_write|_reg_203|_reg_204;\r
+ assign _net_628 = test_write|_reg_202|_reg_203;\r
+ assign _net_629 = test_write|_reg_201|_reg_202;\r
+ assign _net_630 = test_write|_reg_200|_reg_201;\r
+ assign _net_631 = test_write|_reg_199|_reg_200;\r
+ assign _net_632 = test_write|_reg_198|_reg_199;\r
+ assign _net_633 = test_write|_reg_197|_reg_198;\r
+ assign _net_634 = test_write|_reg_196|_reg_197;\r
+ assign _net_635 = test_write|_reg_195|_reg_196;\r
+ assign _net_636 = test_write|_reg_194|_reg_195;\r
+ assign _net_637 = test_write|_reg_193|_reg_194;\r
+ assign _net_638 = test_write|_reg_192|_reg_193;\r
+ assign _net_639 = test_write|_reg_191|_reg_192;\r
+ assign _net_640 = test_write|_reg_190|_reg_191;\r
+ assign o_vsync = _u_VGA_o_vsync;\r
+ assign o_hsync = _u_VGA_o_hsync;\r
+ assign o_vga_r = _u_VGA_o_vga_r;\r
+ assign o_vga_g = _u_VGA_o_vga_g;\r
+ assign o_vga_b = _u_VGA_o_vga_b;\r
+ assign o_LED = {5'b00000,i_sw,r_LED,_u_VGA_outled};\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ trigger <= 3'b000;\r
+else trigger <= {trigger[1:0],1'b1};\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_cnt <= 1'b0;\r
+else r_cnt <= ~r_cnt;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_reset <= 1'b0;\r
+else if ((_reg_81)) \r
+ r_reset <= 1'b1;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_sec_cnt <= 26'b00000000000000000000000000;\r
+else if ((_net_80)|(_net_79)) \r
+ r_sec_cnt <= ((_net_80) ?(r_sec_cnt)+(26'b00000000000000000000000001):26'b0)|\r
+ ((_net_79) ?26'b00000000000000000000000000:26'b0);\r
\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_LED <= 1'b0;\r
+else if ((_net_79)) \r
+ r_LED <= ~r_LED;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r_hdata_flg <= 1'b0;\r
-else if ((_net_2)|(_net_1)) \r
- r_hdata_flg <= ((_net_2) ?1'b1:1'b0)|\r
- ((_net_1) ?1'b0:1'b0);\r
+if (~p_reset)\r
+ r_init_cnt <= 14'b00000000000000;\r
+else if ((_reg_163)|(_reg_142)|(_net_116)|(_reg_90)|(_net_176|_net_155|_net_125|_reg_94|_reg_88)|(_reg_84)) \r
+ r_init_cnt <= ((_reg_163) ?_net_69:14'b0)|\r
+ ((_reg_142) ?_net_66:14'b0)|\r
+ ((_net_116) ?_net_57:14'b0)|\r
+ ((_reg_90) ?_net_60:14'b0)|\r
+ ((_net_176|_net_155|_net_125|_reg_94|_reg_88) ?14'b00000000000000:14'b0)|\r
+ ((_reg_84) ?_net_63:14'b0);\r
\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_vram_rddata <= 16'b0000000000000000;\r
+else if ((_reg_165|_reg_144|_reg_92|_reg_86)) \r
+ r_vram_rddata <= _u_EXP_o_Rdata;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r_h_cnt <= 10'b0000000000;\r
-else if ((_net_4|_net_3|_net_2|_net_1)|(_net_0)) \r
- r_h_cnt <= ((_net_4|_net_3|_net_2|_net_1) ?(r_h_cnt)+(10'b0000000001):10'b0)|\r
- ((_net_0) ?10'b0000000000:10'b0);\r
+if (~p_reset)\r
+ r_vram_start_adrs <= 14'b00000000000000;\r
+else if ((_net_184)|(_net_185|_reg_82)) \r
+ r_vram_start_adrs <= ((_net_184) ?14'b00000000000000:14'b0)|\r
+ ((_net_185|_reg_82) ?(r_vram_start_adrs)+(14'b00000000101000):14'b0);\r
\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r_v_cnt <= 19'b0000000000000000000;\r
-else if ((_net_9|_net_8|_net_7|_net_6)|(_net_5)) \r
- r_v_cnt <= ((_net_9|_net_8|_net_7|_net_6) ?(r_v_cnt)+(19'b0000000000000000001):19'b0)|\r
- ((_net_5) ?19'b0000000000000000000:19'b0);\r
+if (~p_reset)\r
+ r_hld_vram_start <= 1'b0;\r
+else r_hld_vram_start <= _u_VGA_o_vcnt[0];\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_wradrs1 <= 8'b00000000;\r
+else if ((_reg_143|_reg_142|_reg_91|_reg_90)|(_reg_141|_reg_89)) \r
+ r_wradrs1 <= ((_reg_143|_reg_142|_reg_91|_reg_90) ?(r_wradrs1)+(8'b00000001):8'b0)|\r
+ ((_reg_141|_reg_89) ?8'b00000000:8'b0);\r
\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r_bit32_cnt <= 5'b00000;\r
-else if ((fs_disp_data)|(_net_16)|(_net_17|_net_15)) \r
- r_bit32_cnt <= ((fs_disp_data) ?(r_bit32_cnt)+(5'b00001):5'b0)|\r
- ((_net_16) ?(r_bit32_cnt)+(5'b00001):5'b0)|\r
- ((_net_17|_net_15) ?5'b00000:5'b0);\r
+if (~p_reset)\r
+ r_wradrs2 <= 8'b00000000;\r
+else if ((_reg_164|_reg_163|_reg_85|_reg_84)|(_reg_162|_reg_83)) \r
+ r_wradrs2 <= ((_reg_164|_reg_163|_reg_85|_reg_84) ?(r_wradrs2)+(8'b00000001):8'b0)|\r
+ ((_reg_162|_reg_83) ?8'b00000000:8'b0);\r
\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r_flg <= 1'b0;\r
-else if ((_net_125|_net_28)) \r
- r_flg <= ~r_flg;\r
+if (~p_reset)\r
+ r_wait_cnt <= 26'b00000000000000000000000000;\r
+else if ((_net_189)|(_net_187)) \r
+ r_wait_cnt <= ((_net_189) ?(r_wait_cnt)+(26'b00000000000000000000000001):26'b0)|\r
+ ((_net_187) ?26'b00000000000000000000000000:26'b0);\r
+\r
end\r
-always @(posedge p_reset)\r
- begin\r
-if (p_reset)\r
- r_cnt <= 1'b0;\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ r_wait_val <= 26'b00000000000000000000000000;\r
+else if ((_net_528|_net_526|_net_524|_net_522|_net_520|_net_466|_net_464|_net_390|_net_388)|(_reg_296|_reg_294|_reg_292|_reg_290|_reg_288|_reg_286|_reg_284|_reg_282|_reg_280|_reg_278|_reg_276|_reg_274|_reg_272|_reg_268|_reg_266|_reg_264|_reg_262|_reg_260|_reg_258|_reg_256|_reg_254|_reg_252|_reg_250|_reg_248|_reg_246|_reg_244|_reg_242|_reg_240|_reg_238|_reg_236|_reg_234|_reg_230|_reg_228|_reg_226|_reg_224|_reg_222|_reg_220|_reg_218|_reg_216|_reg_214|_reg_212|_reg_210|_reg_208|_reg_206|_reg_204|_reg_202|_reg_200|_reg_198|_reg_196|_reg_194|_reg_192|_reg_190)) \r
+ r_wait_val <= ((_net_528|_net_526|_net_524|_net_522|_net_520|_net_466|_net_464|_net_390|_net_388) ?26'b10111110101111000010000000:26'b0)|\r
+ ((_reg_296|_reg_294|_reg_292|_reg_290|_reg_288|_reg_286|_reg_284|_reg_282|_reg_280|_reg_278|_reg_276|_reg_274|_reg_272|_reg_268|_reg_266|_reg_264|_reg_262|_reg_260|_reg_258|_reg_256|_reg_254|_reg_252|_reg_250|_reg_248|_reg_246|_reg_244|_reg_242|_reg_240|_reg_238|_reg_236|_reg_234|_reg_230|_reg_228|_reg_226|_reg_224|_reg_222|_reg_220|_reg_218|_reg_216|_reg_214|_reg_212|_reg_210|_reg_208|_reg_206|_reg_204|_reg_202|_reg_200|_reg_198|_reg_196|_reg_194|_reg_192|_reg_190) ?26'b01011111010111100001000000:26'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ p_wait <= 1'b0;\r
+else if ((_net_70)) \r
+ p_wait <= _proc_p_wait_set;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_81 <= 1'b0;\r
+else if ((_net_140)) \r
+ _reg_81 <= _reg_82;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_82 <= 1'b0;\r
+else if ((_net_139)) \r
+ _reg_82 <= _reg_83;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_83 <= 1'b0;\r
+else if ((_net_138)) \r
+ _reg_83 <= _reg_83_goin|(_reg_84&(~_reg_84_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_84 <= 1'b0;\r
+else if ((_net_137)) \r
+ _reg_84 <= _reg_85;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_85 <= 1'b0;\r
+else if ((_net_136)) \r
+ _reg_85 <= _reg_86;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_86 <= 1'b0;\r
+else if ((_net_135)) \r
+ _reg_86 <= _reg_87&(~_reg_87_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_87 <= 1'b0;\r
+else if ((_net_134)) \r
+ _reg_87 <= _reg_87_goin|_reg_88;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_88 <= 1'b0;\r
+else if ((_net_133)) \r
+ _reg_88 <= _reg_89;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_89 <= 1'b0;\r
+else if ((_net_132)) \r
+ _reg_89 <= _reg_89_goin|(_reg_90&(~_reg_90_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_90 <= 1'b0;\r
+else if ((_net_131)) \r
+ _reg_90 <= _reg_91;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_91 <= 1'b0;\r
+else if ((_net_130)) \r
+ _reg_91 <= _reg_92;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_92 <= 1'b0;\r
+else if ((_net_129)) \r
+ _reg_92 <= _reg_93&(~_reg_93_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_93 <= 1'b0;\r
+else if ((_net_128)) \r
+ _reg_93 <= _reg_93_goin|_reg_94;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_94 <= 1'b0;\r
+else if ((_net_127)) \r
+ _reg_94 <= _reg_94_goin|(_reg_95&(~_reg_95_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_95 <= 1'b0;\r
+else if ((_net_126)) \r
+ _reg_95 <= (_reg_95_goin|_reg_96)|fs_init;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_96 <= 1'b0;\r
+else if ((_reg_96)) \r
+ _reg_96 <= 1'b0;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_141 <= 1'b0;\r
+else if ((_net_160)) \r
+ _reg_141 <= _reg_141_goin|(_reg_142&(~_reg_142_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_142 <= 1'b0;\r
+else if ((_net_159)) \r
+ _reg_142 <= _reg_143;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_143 <= 1'b0;\r
+else if ((_net_158)) \r
+ _reg_143 <= _reg_144;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_144 <= 1'b0;\r
+else if ((_net_157)) \r
+ _reg_144 <= _reg_145&(~_reg_145_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_145 <= 1'b0;\r
+else if ((_net_156)) \r
+ _reg_145 <= (_reg_145_goin|_reg_146)|fs_fifo1_charge;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_146 <= 1'b0;\r
+else if ((_reg_146)) \r
+ _reg_146 <= 1'b0;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_161 <= 1'b0;\r
+else if ((_net_182)) \r
+ _reg_161 <= _reg_162;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_162 <= 1'b0;\r
+else if ((_net_181)) \r
+ _reg_162 <= _reg_162_goin|(_reg_163&(~_reg_163_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_163 <= 1'b0;\r
+else if ((_net_180)) \r
+ _reg_163 <= _reg_164;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_164 <= 1'b0;\r
+else if ((_net_179)) \r
+ _reg_164 <= _reg_165;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_165 <= 1'b0;\r
+else if ((_net_178)) \r
+ _reg_165 <= _reg_166&(~_reg_166_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_166 <= 1'b0;\r
+else if ((_net_177)) \r
+ _reg_166 <= (_reg_166_goin|_reg_167)|fs_fifo2_charge;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_167 <= 1'b0;\r
+else if ((_reg_167)) \r
+ _reg_167 <= 1'b0;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_190 <= 1'b0;\r
+else if ((_net_640)) \r
+ _reg_190 <= _reg_191&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_191 <= 1'b0;\r
+else if ((_net_639)) \r
+ _reg_191 <= _reg_192|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_192 <= 1'b0;\r
+else if ((_net_638)) \r
+ _reg_192 <= _reg_193&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_193 <= 1'b0;\r
+else if ((_net_637)) \r
+ _reg_193 <= _reg_194|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_194 <= 1'b0;\r
+else if ((_net_636)) \r
+ _reg_194 <= _reg_195&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_195 <= 1'b0;\r
+else if ((_net_635)) \r
+ _reg_195 <= _reg_196|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_196 <= 1'b0;\r
+else if ((_net_634)) \r
+ _reg_196 <= _reg_197&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_197 <= 1'b0;\r
+else if ((_net_633)) \r
+ _reg_197 <= _reg_198|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_198 <= 1'b0;\r
+else if ((_net_632)) \r
+ _reg_198 <= _reg_199&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_199 <= 1'b0;\r
+else if ((_net_631)) \r
+ _reg_199 <= _reg_200|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_200 <= 1'b0;\r
+else if ((_net_630)) \r
+ _reg_200 <= _reg_201&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_201 <= 1'b0;\r
+else if ((_net_629)) \r
+ _reg_201 <= _reg_202|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_202 <= 1'b0;\r
+else if ((_net_628)) \r
+ _reg_202 <= _reg_203&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_203 <= 1'b0;\r
+else if ((_net_627)) \r
+ _reg_203 <= _reg_204|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_204 <= 1'b0;\r
+else if ((_net_626)) \r
+ _reg_204 <= _reg_205&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_205 <= 1'b0;\r
+else if ((_net_625)) \r
+ _reg_205 <= _reg_206|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_206 <= 1'b0;\r
+else if ((_net_624)) \r
+ _reg_206 <= _reg_207&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_207 <= 1'b0;\r
+else if ((_net_623)) \r
+ _reg_207 <= _reg_208|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_208 <= 1'b0;\r
+else if ((_net_622)) \r
+ _reg_208 <= _reg_209&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_209 <= 1'b0;\r
+else if ((_net_621)) \r
+ _reg_209 <= _reg_210|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_210 <= 1'b0;\r
+else if ((_net_620)) \r
+ _reg_210 <= _reg_211&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_211 <= 1'b0;\r
+else if ((_net_619)) \r
+ _reg_211 <= _reg_212|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_212 <= 1'b0;\r
+else if ((_net_618)) \r
+ _reg_212 <= _reg_213&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_213 <= 1'b0;\r
+else if ((_net_617)) \r
+ _reg_213 <= _reg_214|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_214 <= 1'b0;\r
+else if ((_net_616)) \r
+ _reg_214 <= _reg_215&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_215 <= 1'b0;\r
+else if ((_net_615)) \r
+ _reg_215 <= _reg_216|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_216 <= 1'b0;\r
+else if ((_net_614)) \r
+ _reg_216 <= _reg_217&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_217 <= 1'b0;\r
+else if ((_net_613)) \r
+ _reg_217 <= _reg_218|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_218 <= 1'b0;\r
+else if ((_net_612)) \r
+ _reg_218 <= _reg_219&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_219 <= 1'b0;\r
+else if ((_net_611)) \r
+ _reg_219 <= _reg_220|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_220 <= 1'b0;\r
+else if ((_net_610)) \r
+ _reg_220 <= _reg_221&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_221 <= 1'b0;\r
+else if ((_net_609)) \r
+ _reg_221 <= _reg_222|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_222 <= 1'b0;\r
+else if ((_net_608)) \r
+ _reg_222 <= _reg_223&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_223 <= 1'b0;\r
+else if ((_net_607)) \r
+ _reg_223 <= _reg_224|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_224 <= 1'b0;\r
+else if ((_net_606)) \r
+ _reg_224 <= _reg_225&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_225 <= 1'b0;\r
+else if ((_net_605)) \r
+ _reg_225 <= _reg_226|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_226 <= 1'b0;\r
+else if ((_net_604)) \r
+ _reg_226 <= _reg_227&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_227 <= 1'b0;\r
+else if ((_net_603)) \r
+ _reg_227 <= _reg_228|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_228 <= 1'b0;\r
+else if ((_net_602)) \r
+ _reg_228 <= _reg_229&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_229 <= 1'b0;\r
+else if ((_net_601)) \r
+ _reg_229 <= _reg_230|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_230 <= 1'b0;\r
+else if ((_net_600)) \r
+ _reg_230 <= _reg_231&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_231 <= 1'b0;\r
+else if ((_net_599)) \r
+ _reg_231 <= (_reg_232&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_232 <= 1'b0;\r
+else if ((_net_598)) \r
+ _reg_232 <= (_reg_233&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_233 <= 1'b0;\r
+else if ((_net_597)) \r
+ _reg_233 <= _reg_234|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_234 <= 1'b0;\r
+else if ((_net_596)) \r
+ _reg_234 <= _reg_235&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_235 <= 1'b0;\r
+else if ((_net_595)) \r
+ _reg_235 <= _reg_236|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_236 <= 1'b0;\r
+else if ((_net_594)) \r
+ _reg_236 <= _reg_237&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_237 <= 1'b0;\r
+else if ((_net_593)) \r
+ _reg_237 <= _reg_238|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_238 <= 1'b0;\r
+else if ((_net_592)) \r
+ _reg_238 <= _reg_239&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_239 <= 1'b0;\r
+else if ((_net_591)) \r
+ _reg_239 <= _reg_240|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_240 <= 1'b0;\r
+else if ((_net_590)) \r
+ _reg_240 <= _reg_241&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_241 <= 1'b0;\r
+else if ((_net_589)) \r
+ _reg_241 <= _reg_242|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_242 <= 1'b0;\r
+else if ((_net_588)) \r
+ _reg_242 <= _reg_243&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_243 <= 1'b0;\r
+else if ((_net_587)) \r
+ _reg_243 <= _reg_244|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_244 <= 1'b0;\r
+else if ((_net_586)) \r
+ _reg_244 <= _reg_245&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_245 <= 1'b0;\r
+else if ((_net_585)) \r
+ _reg_245 <= _reg_246|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_246 <= 1'b0;\r
+else if ((_net_584)) \r
+ _reg_246 <= _reg_247&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_247 <= 1'b0;\r
+else if ((_net_583)) \r
+ _reg_247 <= _reg_248|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_248 <= 1'b0;\r
+else if ((_net_582)) \r
+ _reg_248 <= _reg_249&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_249 <= 1'b0;\r
+else if ((_net_581)) \r
+ _reg_249 <= _reg_250|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_250 <= 1'b0;\r
+else if ((_net_580)) \r
+ _reg_250 <= _reg_251&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_251 <= 1'b0;\r
+else if ((_net_579)) \r
+ _reg_251 <= _reg_252|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_252 <= 1'b0;\r
+else if ((_net_578)) \r
+ _reg_252 <= _reg_253&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_253 <= 1'b0;\r
+else if ((_net_577)) \r
+ _reg_253 <= _reg_254|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_254 <= 1'b0;\r
+else if ((_net_576)) \r
+ _reg_254 <= _reg_255&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_255 <= 1'b0;\r
+else if ((_net_575)) \r
+ _reg_255 <= _reg_256|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_256 <= 1'b0;\r
+else if ((_net_574)) \r
+ _reg_256 <= _reg_257&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_257 <= 1'b0;\r
+else if ((_net_573)) \r
+ _reg_257 <= _reg_258|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_258 <= 1'b0;\r
+else if ((_net_572)) \r
+ _reg_258 <= _reg_259&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_259 <= 1'b0;\r
+else if ((_net_571)) \r
+ _reg_259 <= _reg_260|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_260 <= 1'b0;\r
+else if ((_net_570)) \r
+ _reg_260 <= _reg_261&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_261 <= 1'b0;\r
+else if ((_net_569)) \r
+ _reg_261 <= _reg_262|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_262 <= 1'b0;\r
+else if ((_net_568)) \r
+ _reg_262 <= _reg_263&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_263 <= 1'b0;\r
+else if ((_net_567)) \r
+ _reg_263 <= _reg_264|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_264 <= 1'b0;\r
+else if ((_net_566)) \r
+ _reg_264 <= _reg_265&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_265 <= 1'b0;\r
+else if ((_net_565)) \r
+ _reg_265 <= _reg_266|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_266 <= 1'b0;\r
+else if ((_net_564)) \r
+ _reg_266 <= _reg_267&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_267 <= 1'b0;\r
+else if ((_net_563)) \r
+ _reg_267 <= _reg_268|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_268 <= 1'b0;\r
+else if ((_net_562)) \r
+ _reg_268 <= _reg_269&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_269 <= 1'b0;\r
+else if ((_net_561)) \r
+ _reg_269 <= (_reg_270&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_270 <= 1'b0;\r
+else if ((_net_560)) \r
+ _reg_270 <= (_reg_271&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_271 <= 1'b0;\r
+else if ((_net_559)) \r
+ _reg_271 <= _reg_272|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_272 <= 1'b0;\r
+else if ((_net_558)) \r
+ _reg_272 <= _reg_273&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_273 <= 1'b0;\r
+else if ((_net_557)) \r
+ _reg_273 <= _reg_274|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_274 <= 1'b0;\r
+else if ((_net_556)) \r
+ _reg_274 <= _reg_275&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_275 <= 1'b0;\r
+else if ((_net_555)) \r
+ _reg_275 <= _reg_276|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_276 <= 1'b0;\r
+else if ((_net_554)) \r
+ _reg_276 <= _reg_277&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_277 <= 1'b0;\r
+else if ((_net_553)) \r
+ _reg_277 <= _reg_278|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_278 <= 1'b0;\r
+else if ((_net_552)) \r
+ _reg_278 <= _reg_279&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_279 <= 1'b0;\r
+else if ((_net_551)) \r
+ _reg_279 <= _reg_280|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_280 <= 1'b0;\r
+else if ((_net_550)) \r
+ _reg_280 <= _reg_281&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_281 <= 1'b0;\r
+else if ((_net_549)) \r
+ _reg_281 <= _reg_282|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_282 <= 1'b0;\r
+else if ((_net_548)) \r
+ _reg_282 <= _reg_283&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_283 <= 1'b0;\r
+else if ((_net_547)) \r
+ _reg_283 <= _reg_284|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_284 <= 1'b0;\r
+else if ((_net_546)) \r
+ _reg_284 <= _reg_285&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_285 <= 1'b0;\r
+else if ((_net_545)) \r
+ _reg_285 <= _reg_286|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_286 <= 1'b0;\r
+else if ((_net_544)) \r
+ _reg_286 <= _reg_287&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_287 <= 1'b0;\r
+else if ((_net_543)) \r
+ _reg_287 <= _reg_288|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_288 <= 1'b0;\r
+else if ((_net_542)) \r
+ _reg_288 <= _reg_289&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_289 <= 1'b0;\r
+else if ((_net_541)) \r
+ _reg_289 <= _reg_290|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_290 <= 1'b0;\r
+else if ((_net_540)) \r
+ _reg_290 <= _reg_291&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_291 <= 1'b0;\r
+else if ((_net_539)) \r
+ _reg_291 <= _reg_292|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_292 <= 1'b0;\r
+else if ((_net_538)) \r
+ _reg_292 <= _reg_293&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_293 <= 1'b0;\r
+else if ((_net_537)) \r
+ _reg_293 <= _reg_294|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_294 <= 1'b0;\r
+else if ((_net_536)) \r
+ _reg_294 <= _reg_295&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_295 <= 1'b0;\r
+else if ((_net_535)) \r
+ _reg_295 <= _reg_296|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_296 <= 1'b0;\r
+else if ((_net_534)) \r
+ _reg_296 <= _reg_297&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_297 <= 1'b0;\r
+else if ((_net_533)) \r
+ _reg_297 <= (_reg_298&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_298 <= 1'b0;\r
+else if ((_net_532)) \r
+ _reg_298 <= (_reg_299&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_299 <= 1'b0;\r
+else if ((_net_531)) \r
+ _reg_299 <= (_reg_300&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r1 <= 32'b00000000000000000000000000000000;\r
-else if ((_net_22)) \r
- r1 <= i_pix32_data;\r
+if (~p_reset)\r
+ _reg_300 <= 1'b0;\r
+else if ((_net_530)) \r
+ _reg_300 <= (_reg_301&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r2 <= 32'b00000000000000000000000000000000;\r
-else if ((_net_23)) \r
- r2 <= i_pix32_data;\r
+if (~p_reset)\r
+ _reg_301 <= 1'b0;\r
+else if ((_net_529)) \r
+ _reg_301 <= (_reg_302|test_write)|(p_wait&(~_proc_p_wait_reset));\r
end\r
-always @(posedge m_clock or posedge p_reset)\r
+always @(posedge m_clock or negedge p_reset)\r
begin\r
-if (p_reset)\r
- r_data_select_flag <= 1'b0;\r
-else if ((fi_ack_req_32dot)) \r
- r_data_select_flag <= ~r_data_select_flag;\r
+if (~p_reset)\r
+ _reg_302 <= 1'b0;\r
+else if ((_reg_302)) \r
+ _reg_302 <= 1'b0;\r
end\r
endmodule\r
/*\r
- Produced by NSL Core(version=20110302), IP ARCH, Inc. Fri Jul 08 20:39:41 2011\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 23:25:48 2011\r
Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp \r
*/\r
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