/*\r
- Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 10:05:41 2011\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 20:24:22 2011\r
Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp :NON PROFIT USER:\r
*/\r
\r
-module from_ctrl ( p_reset , m_clock , i_word_adrs , i_line_adrs , i_code_num , fi_write_word , fi_delete_word , fi_delete_line , fi_delete_display , fi_slide_line , o_vram_adrs , o_vram_wdata , i_vram_rdata , fo_write_vram , fo_read_vram , fo_complete_call );\r
+module font_rom ( p_reset , m_clock , i_code_num , o_font_data , fi_font_read );\r
+ input p_reset, m_clock;\r
+ input [7:0] i_code_num;\r
+ output [63:0] o_font_data;\r
+ input fi_font_read;\r
+ reg [7:0] fmem [0:2047];\r
+ wire [7:0] _net_0;\r
+ wire [7:0] _net_1;\r
+ wire [7:0] _net_2;\r
+ wire [7:0] _net_3;\r
+ wire [7:0] _net_4;\r
+ wire [7:0] _net_5;\r
+ wire [7:0] _net_6;\r
+ wire [7:0] _net_7;\r
+\r
+ assign _net_0 = fmem[{i_code_num,3'b000}];\r
+ assign _net_1 = fmem[{i_code_num,3'b001}];\r
+ assign _net_2 = fmem[{i_code_num,3'b010}];\r
+ assign _net_3 = fmem[{i_code_num,3'b011}];\r
+ assign _net_4 = fmem[{i_code_num,3'b100}];\r
+ assign _net_5 = fmem[{i_code_num,3'b101}];\r
+ assign _net_6 = fmem[{i_code_num,3'b110}];\r
+ assign _net_7 = fmem[{i_code_num,3'b111}];\r
+ assign o_font_data = {_net_7,_net_6,_net_5,_net_4,_net_3,_net_2,_net_1,_net_0};\r
+initial begin\r
+ fmem[0] <= 8'b00000000;\r
+ fmem[1] <= 8'b00000000;\r
+ fmem[2] <= 8'b00000000;\r
+ fmem[3] <= 8'b00000000;\r
+ fmem[4] <= 8'b00000000;\r
+ fmem[5] <= 8'b00000000;\r
+ fmem[6] <= 8'b00000000;\r
+ fmem[7] <= 8'b00000000;\r
+ fmem[8] <= 8'b00111100;\r
+ fmem[9] <= 8'b01000010;\r
+ fmem[10] <= 8'b00101101;\r
+ fmem[11] <= 8'b01100001;\r
+ fmem[12] <= 8'b01100001;\r
+ fmem[13] <= 8'b00101101;\r
+ fmem[14] <= 8'b01000010;\r
+ fmem[15] <= 8'b00111100;\r
+ fmem[16] <= 8'b00111100;\r
+ fmem[17] <= 8'b01111110;\r
+ fmem[18] <= 8'b01010011;\r
+ fmem[19] <= 8'b00011111;\r
+ fmem[20] <= 8'b00011111;\r
+ fmem[21] <= 8'b01010011;\r
+ fmem[22] <= 8'b01111110;\r
+ fmem[23] <= 8'b00111100;\r
+ fmem[24] <= 8'b00000000;\r
+ fmem[25] <= 8'b00001110;\r
+ fmem[26] <= 8'b00011111;\r
+ fmem[27] <= 8'b00111111;\r
+ fmem[28] <= 8'b01111110;\r
+ fmem[29] <= 8'b00111111;\r
+ fmem[30] <= 8'b00011111;\r
+ fmem[31] <= 8'b00001110;\r
+ fmem[32] <= 8'b00000000;\r
+ fmem[33] <= 8'b00001000;\r
+ fmem[34] <= 8'b00011100;\r
+ fmem[35] <= 8'b00111110;\r
+ fmem[36] <= 8'b01111111;\r
+ fmem[37] <= 8'b00111110;\r
+ fmem[38] <= 8'b00011100;\r
+ fmem[39] <= 8'b00001000;\r
+ fmem[40] <= 8'b00000000;\r
+ fmem[41] <= 8'b00011000;\r
+ fmem[42] <= 8'b00111010;\r
+ fmem[43] <= 8'b00111111;\r
+ fmem[44] <= 8'b01011111;\r
+ fmem[45] <= 8'b00111111;\r
+ fmem[46] <= 8'b00111010;\r
+ fmem[47] <= 8'b00011000;\r
+ fmem[48] <= 8'b00000000;\r
+ fmem[49] <= 8'b00011000;\r
+ fmem[50] <= 8'b00111100;\r
+ fmem[51] <= 8'b00111110;\r
+ fmem[52] <= 8'b01011111;\r
+ fmem[53] <= 8'b00111110;\r
+ fmem[54] <= 8'b00111100;\r
+ fmem[55] <= 8'b00011000;\r
+ fmem[56] <= 8'b00000000;\r
+ fmem[57] <= 8'b00000000;\r
+ fmem[58] <= 8'b00011000;\r
+ fmem[59] <= 8'b00111100;\r
+ fmem[60] <= 8'b00111100;\r
+ fmem[61] <= 8'b00011000;\r
+ fmem[62] <= 8'b00000000;\r
+ fmem[63] <= 8'b00000000;\r
+ fmem[64] <= 8'b01111111;\r
+ fmem[65] <= 8'b01111111;\r
+ fmem[66] <= 8'b01100111;\r
+ fmem[67] <= 8'b01000011;\r
+ fmem[68] <= 8'b01000011;\r
+ fmem[69] <= 8'b01100111;\r
+ fmem[70] <= 8'b01111111;\r
+ fmem[71] <= 8'b01111111;\r
+ fmem[72] <= 8'b00000000;\r
+ fmem[73] <= 8'b00011000;\r
+ fmem[74] <= 8'b00111100;\r
+ fmem[75] <= 8'b00100100;\r
+ fmem[76] <= 8'b00100100;\r
+ fmem[77] <= 8'b00111100;\r
+ fmem[78] <= 8'b00011000;\r
+ fmem[79] <= 8'b00000000;\r
+ fmem[80] <= 8'b01111111;\r
+ fmem[81] <= 8'b01100111;\r
+ fmem[82] <= 8'b01000011;\r
+ fmem[83] <= 8'b01011011;\r
+ fmem[84] <= 8'b01011011;\r
+ fmem[85] <= 8'b01000011;\r
+ fmem[86] <= 8'b01100111;\r
+ fmem[87] <= 8'b01111111;\r
+ fmem[88] <= 8'b00000000;\r
+ fmem[89] <= 8'b00111000;\r
+ fmem[90] <= 8'b01111100;\r
+ fmem[91] <= 8'b01000100;\r
+ fmem[92] <= 8'b01000100;\r
+ fmem[93] <= 8'b01111101;\r
+ fmem[94] <= 8'b00111111;\r
+ fmem[95] <= 8'b00000011;\r
+ fmem[96] <= 8'b00000000;\r
+ fmem[97] <= 8'b00001110;\r
+ fmem[98] <= 8'b01011111;\r
+ fmem[99] <= 8'b01110001;\r
+ fmem[100] <= 8'b01110001;\r
+ fmem[101] <= 8'b01011111;\r
+ fmem[102] <= 8'b00001110;\r
+ fmem[103] <= 8'b00000000;\r
+ fmem[104] <= 8'b00000000;\r
+ fmem[105] <= 8'b00000000;\r
+ fmem[106] <= 8'b01000000;\r
+ fmem[107] <= 8'b01000000;\r
+ fmem[108] <= 8'b01111111;\r
+ fmem[109] <= 8'b00000110;\r
+ fmem[110] <= 8'b00011100;\r
+ fmem[111] <= 8'b00000000;\r
+ fmem[112] <= 8'b00000000;\r
+ fmem[113] <= 8'b00110000;\r
+ fmem[114] <= 8'b00110000;\r
+ fmem[115] <= 8'b00011111;\r
+ fmem[116] <= 8'b00000101;\r
+ fmem[117] <= 8'b01001010;\r
+ fmem[118] <= 8'b01001010;\r
+ fmem[119] <= 8'b01111100;\r
+ fmem[120] <= 8'b01001000;\r
+ fmem[121] <= 8'b01101011;\r
+ fmem[122] <= 8'b00111110;\r
+ fmem[123] <= 8'b01100100;\r
+ fmem[124] <= 8'b00100111;\r
+ fmem[125] <= 8'b01111100;\r
+ fmem[126] <= 8'b01010110;\r
+ fmem[127] <= 8'b00010010;\r
+ fmem[128] <= 8'b00000000;\r
+ fmem[129] <= 8'b01111111;\r
+ fmem[130] <= 8'b00111110;\r
+ fmem[131] <= 8'b00111110;\r
+ fmem[132] <= 8'b00011100;\r
+ fmem[133] <= 8'b00011100;\r
+ fmem[134] <= 8'b00001000;\r
+ fmem[135] <= 8'b00001000;\r
+ fmem[136] <= 8'b00000000;\r
+ fmem[137] <= 8'b00001000;\r
+ fmem[138] <= 8'b00001000;\r
+ fmem[139] <= 8'b00011100;\r
+ fmem[140] <= 8'b00011100;\r
+ fmem[141] <= 8'b00111110;\r
+ fmem[142] <= 8'b00111110;\r
+ fmem[143] <= 8'b01111111;\r
+ fmem[144] <= 8'b00000000;\r
+ fmem[145] <= 8'b00100100;\r
+ fmem[146] <= 8'b01100110;\r
+ fmem[147] <= 8'b01111111;\r
+ fmem[148] <= 8'b01111111;\r
+ fmem[149] <= 8'b01100110;\r
+ fmem[150] <= 8'b00100100;\r
+ fmem[151] <= 8'b00000000;\r
+ fmem[152] <= 8'b00000000;\r
+ fmem[153] <= 8'b00000000;\r
+ fmem[154] <= 8'b01011111;\r
+ fmem[155] <= 8'b01011111;\r
+ fmem[156] <= 8'b00000000;\r
+ fmem[157] <= 8'b01011111;\r
+ fmem[158] <= 8'b01011111;\r
+ fmem[159] <= 8'b00000000;\r
+ fmem[160] <= 8'b00000000;\r
+ fmem[161] <= 8'b00000110;\r
+ fmem[162] <= 8'b00001111;\r
+ fmem[163] <= 8'b01001001;\r
+ fmem[164] <= 8'b01111111;\r
+ fmem[165] <= 8'b00000001;\r
+ fmem[166] <= 8'b01111111;\r
+ fmem[167] <= 8'b00000001;\r
+ fmem[168] <= 8'b00000000;\r
+ fmem[169] <= 8'b01001010;\r
+ fmem[170] <= 8'b01011111;\r
+ fmem[171] <= 8'b00110111;\r
+ fmem[172] <= 8'b01101101;\r
+ fmem[173] <= 8'b01111011;\r
+ fmem[174] <= 8'b01010010;\r
+ fmem[175] <= 8'b00000000;\r
+ fmem[176] <= 8'b00000000;\r
+ fmem[177] <= 8'b00111000;\r
+ fmem[178] <= 8'b00111000;\r
+ fmem[179] <= 8'b00111000;\r
+ fmem[180] <= 8'b00111000;\r
+ fmem[181] <= 8'b00111000;\r
+ fmem[182] <= 8'b00111000;\r
+ fmem[183] <= 8'b00111000;\r
+ fmem[184] <= 8'b00000000;\r
+ fmem[185] <= 8'b00010100;\r
+ fmem[186] <= 8'b00110110;\r
+ fmem[187] <= 8'b01111111;\r
+ fmem[188] <= 8'b01111111;\r
+ fmem[189] <= 8'b00110110;\r
+ fmem[190] <= 8'b00010100;\r
+ fmem[191] <= 8'b00000000;\r
+ fmem[192] <= 8'b00000000;\r
+ fmem[193] <= 8'b00001100;\r
+ fmem[194] <= 8'b00000110;\r
+ fmem[195] <= 8'b01111111;\r
+ fmem[196] <= 8'b01111111;\r
+ fmem[197] <= 8'b00000110;\r
+ fmem[198] <= 8'b00001100;\r
+ fmem[199] <= 8'b00000000;\r
+ fmem[200] <= 8'b00000000;\r
+ fmem[201] <= 8'b00011000;\r
+ fmem[202] <= 8'b00110000;\r
+ fmem[203] <= 8'b01111111;\r
+ fmem[204] <= 8'b01111111;\r
+ fmem[205] <= 8'b00110000;\r
+ fmem[206] <= 8'b00011000;\r
+ fmem[207] <= 8'b00000000;\r
+ fmem[208] <= 8'b00000000;\r
+ fmem[209] <= 8'b00011000;\r
+ fmem[210] <= 8'b00011000;\r
+ fmem[211] <= 8'b00011000;\r
+ fmem[212] <= 8'b01011010;\r
+ fmem[213] <= 8'b01111110;\r
+ fmem[214] <= 8'b00111100;\r
+ fmem[215] <= 8'b00011000;\r
+ fmem[216] <= 8'b00000000;\r
+ fmem[217] <= 8'b00011000;\r
+ fmem[218] <= 8'b00111100;\r
+ fmem[219] <= 8'b01111110;\r
+ fmem[220] <= 8'b01011010;\r
+ fmem[221] <= 8'b00011000;\r
+ fmem[222] <= 8'b00011000;\r
+ fmem[223] <= 8'b00011000;\r
+ fmem[224] <= 8'b00000000;\r
+ fmem[225] <= 8'b00111100;\r
+ fmem[226] <= 8'b00111100;\r
+ fmem[227] <= 8'b00110000;\r
+ fmem[228] <= 8'b00110000;\r
+ fmem[229] <= 8'b00110000;\r
+ fmem[230] <= 8'b00110000;\r
+ fmem[231] <= 8'b00110000;\r
+ fmem[232] <= 8'b00000000;\r
+ fmem[233] <= 8'b00011000;\r
+ fmem[234] <= 8'b00111100;\r
+ fmem[235] <= 8'b01111110;\r
+ fmem[236] <= 8'b00011000;\r
+ fmem[237] <= 8'b01111110;\r
+ fmem[238] <= 8'b00111100;\r
+ fmem[239] <= 8'b00011000;\r
+ fmem[240] <= 8'b00000000;\r
+ fmem[241] <= 8'b01000000;\r
+ fmem[242] <= 8'b01110000;\r
+ fmem[243] <= 8'b01111100;\r
+ fmem[244] <= 8'b01111111;\r
+ fmem[245] <= 8'b01111100;\r
+ fmem[246] <= 8'b01110000;\r
+ fmem[247] <= 8'b01000000;\r
+ fmem[248] <= 8'b00000000;\r
+ fmem[249] <= 8'b00000001;\r
+ fmem[250] <= 8'b00000111;\r
+ fmem[251] <= 8'b00011111;\r
+ fmem[252] <= 8'b01111111;\r
+ fmem[253] <= 8'b00011111;\r
+ fmem[254] <= 8'b00000111;\r
+ fmem[255] <= 8'b00000001;\r
+ fmem[256] <= 8'b00000000;\r
+ fmem[257] <= 8'b00000000;\r
+ fmem[258] <= 8'b00000000;\r
+ fmem[259] <= 8'b00000000;\r
+ fmem[260] <= 8'b00000000;\r
+ fmem[261] <= 8'b00000000;\r
+ fmem[262] <= 8'b00000000;\r
+ fmem[263] <= 8'b00000000;\r
+ fmem[264] <= 8'b00000000;\r
+ fmem[265] <= 8'b00000000;\r
+ fmem[266] <= 8'b00000000;\r
+ fmem[267] <= 8'b01011111;\r
+ fmem[268] <= 8'b01011111;\r
+ fmem[269] <= 8'b00000000;\r
+ fmem[270] <= 8'b00000000;\r
+ fmem[271] <= 8'b00000000;\r
+ fmem[272] <= 8'b00000000;\r
+ fmem[273] <= 8'b00000000;\r
+ fmem[274] <= 8'b00000011;\r
+ fmem[275] <= 8'b00000111;\r
+ fmem[276] <= 8'b00000000;\r
+ fmem[277] <= 8'b00000111;\r
+ fmem[278] <= 8'b00000011;\r
+ fmem[279] <= 8'b00000000;\r
+ fmem[280] <= 8'b00000000;\r
+ fmem[281] <= 8'b00010000;\r
+ fmem[282] <= 8'b01110100;\r
+ fmem[283] <= 8'b00011100;\r
+ fmem[284] <= 8'b01110111;\r
+ fmem[285] <= 8'b00011100;\r
+ fmem[286] <= 8'b00010111;\r
+ fmem[287] <= 8'b00000100;\r
+ fmem[288] <= 8'b00000000;\r
+ fmem[289] <= 8'b00100100;\r
+ fmem[290] <= 8'b00101110;\r
+ fmem[291] <= 8'b00101010;\r
+ fmem[292] <= 8'b01111111;\r
+ fmem[293] <= 8'b00101010;\r
+ fmem[294] <= 8'b00111010;\r
+ fmem[295] <= 8'b00010000;\r
+ fmem[296] <= 8'b00000000;\r
+ fmem[297] <= 8'b01001100;\r
+ fmem[298] <= 8'b01101010;\r
+ fmem[299] <= 8'b01110110;\r
+ fmem[300] <= 8'b00011010;\r
+ fmem[301] <= 8'b01101010;\r
+ fmem[302] <= 8'b01010110;\r
+ fmem[303] <= 8'b00110011;\r
+ fmem[304] <= 8'b00000000;\r
+ fmem[305] <= 8'b00110000;\r
+ fmem[306] <= 8'b01111010;\r
+ fmem[307] <= 8'b01001111;\r
+ fmem[308] <= 8'b01011101;\r
+ fmem[309] <= 8'b00110111;\r
+ fmem[310] <= 8'b01111010;\r
+ fmem[311] <= 8'b01001000;\r
+ fmem[312] <= 8'b00000000;\r
+ fmem[313] <= 8'b00000000;\r
+ fmem[314] <= 8'b00000100;\r
+ fmem[315] <= 8'b00000111;\r
+ fmem[316] <= 8'b00000011;\r
+ fmem[317] <= 8'b00000000;\r
+ fmem[318] <= 8'b00000000;\r
+ fmem[319] <= 8'b00000000;\r
+ fmem[320] <= 8'b00000000;\r
+ fmem[321] <= 8'b00000000;\r
+ fmem[322] <= 8'b00000000;\r
+ fmem[323] <= 8'b00011100;\r
+ fmem[324] <= 8'b00111110;\r
+ fmem[325] <= 8'b01100011;\r
+ fmem[326] <= 8'b01000001;\r
+ fmem[327] <= 8'b00000000;\r
+ fmem[328] <= 8'b00000000;\r
+ fmem[329] <= 8'b00000000;\r
+ fmem[330] <= 8'b01000001;\r
+ fmem[331] <= 8'b01100011;\r
+ fmem[332] <= 8'b00111110;\r
+ fmem[333] <= 8'b00011100;\r
+ fmem[334] <= 8'b00000000;\r
+ fmem[335] <= 8'b00000000;\r
+ fmem[336] <= 8'b00000000;\r
+ fmem[337] <= 8'b00001000;\r
+ fmem[338] <= 8'b00101010;\r
+ fmem[339] <= 8'b00111110;\r
+ fmem[340] <= 8'b00011100;\r
+ fmem[341] <= 8'b00111110;\r
+ fmem[342] <= 8'b00101010;\r
+ fmem[343] <= 8'b00001000;\r
+ fmem[344] <= 8'b00000000;\r
+ fmem[345] <= 8'b00001000;\r
+ fmem[346] <= 8'b00001000;\r
+ fmem[347] <= 8'b00111110;\r
+ fmem[348] <= 8'b00111110;\r
+ fmem[349] <= 8'b00001000;\r
+ fmem[350] <= 8'b00001000;\r
+ fmem[351] <= 8'b00000000;\r
+ fmem[352] <= 8'b00000000;\r
+ fmem[353] <= 8'b00000000;\r
+ fmem[354] <= 8'b00000000;\r
+ fmem[355] <= 8'b01100000;\r
+ fmem[356] <= 8'b01100000;\r
+ fmem[357] <= 8'b00000000;\r
+ fmem[358] <= 8'b00000000;\r
+ fmem[359] <= 8'b00000000;\r
+ fmem[360] <= 8'b00000000;\r
+ fmem[361] <= 8'b00001000;\r
+ fmem[362] <= 8'b00001000;\r
+ fmem[363] <= 8'b00001000;\r
+ fmem[364] <= 8'b00001000;\r
+ fmem[365] <= 8'b00001000;\r
+ fmem[366] <= 8'b00001000;\r
+ fmem[367] <= 8'b00000000;\r
+ fmem[368] <= 8'b00000000;\r
+ fmem[369] <= 8'b00000000;\r
+ fmem[370] <= 8'b00000000;\r
+ fmem[371] <= 8'b01100000;\r
+ fmem[372] <= 8'b01100000;\r
+ fmem[373] <= 8'b00000000;\r
+ fmem[374] <= 8'b00000000;\r
+ fmem[375] <= 8'b00000000;\r
+ fmem[376] <= 8'b00000000;\r
+ fmem[377] <= 8'b01100000;\r
+ fmem[378] <= 8'b00110000;\r
+ fmem[379] <= 8'b00011000;\r
+ fmem[380] <= 8'b00001100;\r
+ fmem[381] <= 8'b00000110;\r
+ fmem[382] <= 8'b00000011;\r
+ fmem[383] <= 8'b00000001;\r
+ fmem[384] <= 8'b00000000;\r
+ fmem[385] <= 8'b00011100;\r
+ fmem[386] <= 8'b00111110;\r
+ fmem[387] <= 8'b01100001;\r
+ fmem[388] <= 8'b01000011;\r
+ fmem[389] <= 8'b00111110;\r
+ fmem[390] <= 8'b00011100;\r
+ fmem[391] <= 8'b00000000;\r
+ fmem[392] <= 8'b00000000;\r
+ fmem[393] <= 8'b00000000;\r
+ fmem[394] <= 8'b01000100;\r
+ fmem[395] <= 8'b01111111;\r
+ fmem[396] <= 8'b01111111;\r
+ fmem[397] <= 8'b01000000;\r
+ fmem[398] <= 8'b00000000;\r
+ fmem[399] <= 8'b00000000;\r
+ fmem[400] <= 8'b00000000;\r
+ fmem[401] <= 8'b01000110;\r
+ fmem[402] <= 8'b01100111;\r
+ fmem[403] <= 8'b01110001;\r
+ fmem[404] <= 8'b01011001;\r
+ fmem[405] <= 8'b01001111;\r
+ fmem[406] <= 8'b01100110;\r
+ fmem[407] <= 8'b00000000;\r
+ fmem[408] <= 8'b00000000;\r
+ fmem[409] <= 8'b00100010;\r
+ fmem[410] <= 8'b01100011;\r
+ fmem[411] <= 8'b01001001;\r
+ fmem[412] <= 8'b01001101;\r
+ fmem[413] <= 8'b01111111;\r
+ fmem[414] <= 8'b00110010;\r
+ fmem[415] <= 8'b00000000;\r
+ fmem[416] <= 8'b00000000;\r
+ fmem[417] <= 8'b00011000;\r
+ fmem[418] <= 8'b00011100;\r
+ fmem[419] <= 8'b01010010;\r
+ fmem[420] <= 8'b01111111;\r
+ fmem[421] <= 8'b01111111;\r
+ fmem[422] <= 8'b01010000;\r
+ fmem[423] <= 8'b00000000;\r
+ fmem[424] <= 8'b00000000;\r
+ fmem[425] <= 8'b00101111;\r
+ fmem[426] <= 8'b01101111;\r
+ fmem[427] <= 8'b01000101;\r
+ fmem[428] <= 8'b01000101;\r
+ fmem[429] <= 8'b01111101;\r
+ fmem[430] <= 8'b00111001;\r
+ fmem[431] <= 8'b00000000;\r
+ fmem[432] <= 8'b00000000;\r
+ fmem[433] <= 8'b00111100;\r
+ fmem[434] <= 8'b01111110;\r
+ fmem[435] <= 8'b01001011;\r
+ fmem[436] <= 8'b01001001;\r
+ fmem[437] <= 8'b01111001;\r
+ fmem[438] <= 8'b00110000;\r
+ fmem[439] <= 8'b00000000;\r
+ fmem[440] <= 8'b00000000;\r
+ fmem[441] <= 8'b00000111;\r
+ fmem[442] <= 8'b01000011;\r
+ fmem[443] <= 8'b01110001;\r
+ fmem[444] <= 8'b01111101;\r
+ fmem[445] <= 8'b00001111;\r
+ fmem[446] <= 8'b00000011;\r
+ fmem[447] <= 8'b00000000;\r
+ fmem[448] <= 8'b00000000;\r
+ fmem[449] <= 8'b00110110;\r
+ fmem[450] <= 8'b01111111;\r
+ fmem[451] <= 8'b01001101;\r
+ fmem[452] <= 8'b01011001;\r
+ fmem[453] <= 8'b01111111;\r
+ fmem[454] <= 8'b00110110;\r
+ fmem[455] <= 8'b00000000;\r
+ fmem[456] <= 8'b00000000;\r
+ fmem[457] <= 8'b00000110;\r
+ fmem[458] <= 8'b01001111;\r
+ fmem[459] <= 8'b01001001;\r
+ fmem[460] <= 8'b01101001;\r
+ fmem[461] <= 8'b00111111;\r
+ fmem[462] <= 8'b00011110;\r
+ fmem[463] <= 8'b00000000;\r
+ fmem[464] <= 8'b00000000;\r
+ fmem[465] <= 8'b00000000;\r
+ fmem[466] <= 8'b00000000;\r
+ fmem[467] <= 8'b01100110;\r
+ fmem[468] <= 8'b01100110;\r
+ fmem[469] <= 8'b00000000;\r
+ fmem[470] <= 8'b00000000;\r
+ fmem[471] <= 8'b00000000;\r
+ fmem[472] <= 8'b00000000;\r
+ fmem[473] <= 8'b00000000;\r
+ fmem[474] <= 8'b00000000;\r
+ fmem[475] <= 8'b01100110;\r
+ fmem[476] <= 8'b01100110;\r
+ fmem[477] <= 8'b00000000;\r
+ fmem[478] <= 8'b00000000;\r
+ fmem[479] <= 8'b00000000;\r
+ fmem[480] <= 8'b00000000;\r
+ fmem[481] <= 8'b00000000;\r
+ fmem[482] <= 8'b00001000;\r
+ fmem[483] <= 8'b00011100;\r
+ fmem[484] <= 8'b00110110;\r
+ fmem[485] <= 8'b01100011;\r
+ fmem[486] <= 8'b01000001;\r
+ fmem[487] <= 8'b00000000;\r
+ fmem[488] <= 8'b00000000;\r
+ fmem[489] <= 8'b00010100;\r
+ fmem[490] <= 8'b00010100;\r
+ fmem[491] <= 8'b00010100;\r
+ fmem[492] <= 8'b00010100;\r
+ fmem[493] <= 8'b00010100;\r
+ fmem[494] <= 8'b00010100;\r
+ fmem[495] <= 8'b00000000;\r
+ fmem[496] <= 8'b00000000;\r
+ fmem[497] <= 8'b00000000;\r
+ fmem[498] <= 8'b01000001;\r
+ fmem[499] <= 8'b01100011;\r
+ fmem[500] <= 8'b00110110;\r
+ fmem[501] <= 8'b00011100;\r
+ fmem[502] <= 8'b00001000;\r
+ fmem[503] <= 8'b00000000;\r
+ fmem[504] <= 8'b00000000;\r
+ fmem[505] <= 8'b00000010;\r
+ fmem[506] <= 8'b00000111;\r
+ fmem[507] <= 8'b01010001;\r
+ fmem[508] <= 8'b01011001;\r
+ fmem[509] <= 8'b00001111;\r
+ fmem[510] <= 8'b00000110;\r
+ fmem[511] <= 8'b00000000;\r
+ fmem[512] <= 8'b00000000;\r
+ fmem[513] <= 8'b00111110;\r
+ fmem[514] <= 8'b01000001;\r
+ fmem[515] <= 8'b01011101;\r
+ fmem[516] <= 8'b01010101;\r
+ fmem[517] <= 8'b01011101;\r
+ fmem[518] <= 8'b01010001;\r
+ fmem[519] <= 8'b00011110;\r
+ fmem[520] <= 8'b00000000;\r
+ fmem[521] <= 8'b01000000;\r
+ fmem[522] <= 8'b01110000;\r
+ fmem[523] <= 8'b00011101;\r
+ fmem[524] <= 8'b00010111;\r
+ fmem[525] <= 8'b00011111;\r
+ fmem[526] <= 8'b01111000;\r
+ fmem[527] <= 8'b01100000;\r
+ fmem[528] <= 8'b00000000;\r
+ fmem[529] <= 8'b01000001;\r
+ fmem[530] <= 8'b01111111;\r
+ fmem[531] <= 8'b01111111;\r
+ fmem[532] <= 8'b01001001;\r
+ fmem[533] <= 8'b01001111;\r
+ fmem[534] <= 8'b01111110;\r
+ fmem[535] <= 8'b00110000;\r
+ fmem[536] <= 8'b00000000;\r
+ fmem[537] <= 8'b00011100;\r
+ fmem[538] <= 8'b00111110;\r
+ fmem[539] <= 8'b01100011;\r
+ fmem[540] <= 8'b01000001;\r
+ fmem[541] <= 8'b01000001;\r
+ fmem[542] <= 8'b01000010;\r
+ fmem[543] <= 8'b00100111;\r
+ fmem[544] <= 8'b00000000;\r
+ fmem[545] <= 8'b01000001;\r
+ fmem[546] <= 8'b01111111;\r
+ fmem[547] <= 8'b01111111;\r
+ fmem[548] <= 8'b01000001;\r
+ fmem[549] <= 8'b01100011;\r
+ fmem[550] <= 8'b00111110;\r
+ fmem[551] <= 8'b00011100;\r
+ fmem[552] <= 8'b00000000;\r
+ fmem[553] <= 8'b01000001;\r
+ fmem[554] <= 8'b01111111;\r
+ fmem[555] <= 8'b01111111;\r
+ fmem[556] <= 8'b01001001;\r
+ fmem[557] <= 8'b01011101;\r
+ fmem[558] <= 8'b01000001;\r
+ fmem[559] <= 8'b01100011;\r
+ fmem[560] <= 8'b00000000;\r
+ fmem[561] <= 8'b01000001;\r
+ fmem[562] <= 8'b01111111;\r
+ fmem[563] <= 8'b01111111;\r
+ fmem[564] <= 8'b01001001;\r
+ fmem[565] <= 8'b00011101;\r
+ fmem[566] <= 8'b00000001;\r
+ fmem[567] <= 8'b00000011;\r
+ fmem[568] <= 8'b00000000;\r
+ fmem[569] <= 8'b00011100;\r
+ fmem[570] <= 8'b00111110;\r
+ fmem[571] <= 8'b01100011;\r
+ fmem[572] <= 8'b01000001;\r
+ fmem[573] <= 8'b01010001;\r
+ fmem[574] <= 8'b01110010;\r
+ fmem[575] <= 8'b01110111;\r
+ fmem[576] <= 8'b00000000;\r
+ fmem[577] <= 8'b01111111;\r
+ fmem[578] <= 8'b01111111;\r
+ fmem[579] <= 8'b00001000;\r
+ fmem[580] <= 8'b00001000;\r
+ fmem[581] <= 8'b01111111;\r
+ fmem[582] <= 8'b01111111;\r
+ fmem[583] <= 8'b00000000;\r
+ fmem[584] <= 8'b00000000;\r
+ fmem[585] <= 8'b00000000;\r
+ fmem[586] <= 8'b01000001;\r
+ fmem[587] <= 8'b01111111;\r
+ fmem[588] <= 8'b01111111;\r
+ fmem[589] <= 8'b01000001;\r
+ fmem[590] <= 8'b00000000;\r
+ fmem[591] <= 8'b00000000;\r
+ fmem[592] <= 8'b00000000;\r
+ fmem[593] <= 8'b00110000;\r
+ fmem[594] <= 8'b01110000;\r
+ fmem[595] <= 8'b01000001;\r
+ fmem[596] <= 8'b01000001;\r
+ fmem[597] <= 8'b01111111;\r
+ fmem[598] <= 8'b00111111;\r
+ fmem[599] <= 8'b00000001;\r
+ fmem[600] <= 8'b00000000;\r
+ fmem[601] <= 8'b01111111;\r
+ fmem[602] <= 8'b01111111;\r
+ fmem[603] <= 8'b00001000;\r
+ fmem[604] <= 8'b00011100;\r
+ fmem[605] <= 8'b01110111;\r
+ fmem[606] <= 8'b01100011;\r
+ fmem[607] <= 8'b01000001;\r
+ fmem[608] <= 8'b00000000;\r
+ fmem[609] <= 8'b01000001;\r
+ fmem[610] <= 8'b01111111;\r
+ fmem[611] <= 8'b01111111;\r
+ fmem[612] <= 8'b01000001;\r
+ fmem[613] <= 8'b01000000;\r
+ fmem[614] <= 8'b01100000;\r
+ fmem[615] <= 8'b01110000;\r
+ fmem[616] <= 8'b00000000;\r
+ fmem[617] <= 8'b01111111;\r
+ fmem[618] <= 8'b01111110;\r
+ fmem[619] <= 8'b00001100;\r
+ fmem[620] <= 8'b00011000;\r
+ fmem[621] <= 8'b00001100;\r
+ fmem[622] <= 8'b01111110;\r
+ fmem[623] <= 8'b01111111;\r
+ fmem[624] <= 8'b00000000;\r
+ fmem[625] <= 8'b01111111;\r
+ fmem[626] <= 8'b01111110;\r
+ fmem[627] <= 8'b00001100;\r
+ fmem[628] <= 8'b00011000;\r
+ fmem[629] <= 8'b00110000;\r
+ fmem[630] <= 8'b01111111;\r
+ fmem[631] <= 8'b01111111;\r
+ fmem[632] <= 8'b00000000;\r
+ fmem[633] <= 8'b00011100;\r
+ fmem[634] <= 8'b00111110;\r
+ fmem[635] <= 8'b01100011;\r
+ fmem[636] <= 8'b01000001;\r
+ fmem[637] <= 8'b01100011;\r
+ fmem[638] <= 8'b00111110;\r
+ fmem[639] <= 8'b00011100;\r
+ fmem[640] <= 8'b00000000;\r
+ fmem[641] <= 8'b01000001;\r
+ fmem[642] <= 8'b01111111;\r
+ fmem[643] <= 8'b01111111;\r
+ fmem[644] <= 8'b01001001;\r
+ fmem[645] <= 8'b00001001;\r
+ fmem[646] <= 8'b00001111;\r
+ fmem[647] <= 8'b00000110;\r
+ fmem[648] <= 8'b00000000;\r
+ fmem[649] <= 8'b00011100;\r
+ fmem[650] <= 8'b00111110;\r
+ fmem[651] <= 8'b01100011;\r
+ fmem[652] <= 8'b01010001;\r
+ fmem[653] <= 8'b01100011;\r
+ fmem[654] <= 8'b00111110;\r
+ fmem[655] <= 8'b00011100;\r
+ fmem[656] <= 8'b00000000;\r
+ fmem[657] <= 8'b01111111;\r
+ fmem[658] <= 8'b01111111;\r
+ fmem[659] <= 8'b00001001;\r
+ fmem[660] <= 8'b00011001;\r
+ fmem[661] <= 8'b01111111;\r
+ fmem[662] <= 8'b01100110;\r
+ fmem[663] <= 8'b01000000;\r
+ fmem[664] <= 8'b00000000;\r
+ fmem[665] <= 8'b01100110;\r
+ fmem[666] <= 8'b01101111;\r
+ fmem[667] <= 8'b01001101;\r
+ fmem[668] <= 8'b01011001;\r
+ fmem[669] <= 8'b01111011;\r
+ fmem[670] <= 8'b00110011;\r
+ fmem[671] <= 8'b00000000;\r
+ fmem[672] <= 8'b00000000;\r
+ fmem[673] <= 8'b00000011;\r
+ fmem[674] <= 8'b01000001;\r
+ fmem[675] <= 8'b01111111;\r
+ fmem[676] <= 8'b01111111;\r
+ fmem[677] <= 8'b01000001;\r
+ fmem[678] <= 8'b00000011;\r
+ fmem[679] <= 8'b00000000;\r
+ fmem[680] <= 8'b00000000;\r
+ fmem[681] <= 8'b00111111;\r
+ fmem[682] <= 8'b01111111;\r
+ fmem[683] <= 8'b01000000;\r
+ fmem[684] <= 8'b01000000;\r
+ fmem[685] <= 8'b01000000;\r
+ fmem[686] <= 8'b01111111;\r
+ fmem[687] <= 8'b00111111;\r
+ fmem[688] <= 8'b00000000;\r
+ fmem[689] <= 8'b00000011;\r
+ fmem[690] <= 8'b00001111;\r
+ fmem[691] <= 8'b00111101;\r
+ fmem[692] <= 8'b01110000;\r
+ fmem[693] <= 8'b00011101;\r
+ fmem[694] <= 8'b00000111;\r
+ fmem[695] <= 8'b00000001;\r
+ fmem[696] <= 8'b00000000;\r
+ fmem[697] <= 8'b00001111;\r
+ fmem[698] <= 8'b01111111;\r
+ fmem[699] <= 8'b00110000;\r
+ fmem[700] <= 8'b00011100;\r
+ fmem[701] <= 8'b00110000;\r
+ fmem[702] <= 8'b01111111;\r
+ fmem[703] <= 8'b00001111;\r
+ fmem[704] <= 8'b00000000;\r
+ fmem[705] <= 8'b01100011;\r
+ fmem[706] <= 8'b01110111;\r
+ fmem[707] <= 8'b00011100;\r
+ fmem[708] <= 8'b00011100;\r
+ fmem[709] <= 8'b01110111;\r
+ fmem[710] <= 8'b01100011;\r
+ fmem[711] <= 8'b00000000;\r
+ fmem[712] <= 8'b00000001;\r
+ fmem[713] <= 8'b00000011;\r
+ fmem[714] <= 8'b01000111;\r
+ fmem[715] <= 8'b01111100;\r
+ fmem[716] <= 8'b01111000;\r
+ fmem[717] <= 8'b01000111;\r
+ fmem[718] <= 8'b00000011;\r
+ fmem[719] <= 8'b00000001;\r
+ fmem[720] <= 8'b00000000;\r
+ fmem[721] <= 8'b01100111;\r
+ fmem[722] <= 8'b01110011;\r
+ fmem[723] <= 8'b01011001;\r
+ fmem[724] <= 8'b01001101;\r
+ fmem[725] <= 8'b01100111;\r
+ fmem[726] <= 8'b01110011;\r
+ fmem[727] <= 8'b00000000;\r
+ fmem[728] <= 8'b00000000;\r
+ fmem[729] <= 8'b00000000;\r
+ fmem[730] <= 8'b00000000;\r
+ fmem[731] <= 8'b01111111;\r
+ fmem[732] <= 8'b01111111;\r
+ fmem[733] <= 8'b01000001;\r
+ fmem[734] <= 8'b01000001;\r
+ fmem[735] <= 8'b00000000;\r
+ fmem[736] <= 8'b00000000;\r
+ fmem[737] <= 8'b00000001;\r
+ fmem[738] <= 8'b00000011;\r
+ fmem[739] <= 8'b00000110;\r
+ fmem[740] <= 8'b00001100;\r
+ fmem[741] <= 8'b00011000;\r
+ fmem[742] <= 8'b00110000;\r
+ fmem[743] <= 8'b01100000;\r
+ fmem[744] <= 8'b00000000;\r
+ fmem[745] <= 8'b00000000;\r
+ fmem[746] <= 8'b01000001;\r
+ fmem[747] <= 8'b01000001;\r
+ fmem[748] <= 8'b01111111;\r
+ fmem[749] <= 8'b01111111;\r
+ fmem[750] <= 8'b00000000;\r
+ fmem[751] <= 8'b00000000;\r
+ fmem[752] <= 8'b00000000;\r
+ fmem[753] <= 8'b00000000;\r
+ fmem[754] <= 8'b00000100;\r
+ fmem[755] <= 8'b00000110;\r
+ fmem[756] <= 8'b00000011;\r
+ fmem[757] <= 8'b00000110;\r
+ fmem[758] <= 8'b00000100;\r
+ fmem[759] <= 8'b00000000;\r
+ fmem[760] <= 8'b00000000;\r
+ fmem[761] <= 8'b00000000;\r
+ fmem[762] <= 8'b00000000;\r
+ fmem[763] <= 8'b00000000;\r
+ fmem[764] <= 8'b00000000;\r
+ fmem[765] <= 8'b00000000;\r
+ fmem[766] <= 8'b00000000;\r
+ fmem[767] <= 8'b00000000;\r
+ fmem[768] <= 8'b00000000;\r
+ fmem[769] <= 8'b00000000;\r
+ fmem[770] <= 8'b00000001;\r
+ fmem[771] <= 8'b00000011;\r
+ fmem[772] <= 8'b00000110;\r
+ fmem[773] <= 8'b00000100;\r
+ fmem[774] <= 8'b00000000;\r
+ fmem[775] <= 8'b00000000;\r
+ fmem[776] <= 8'b00000000;\r
+ fmem[777] <= 8'b01101000;\r
+ fmem[778] <= 8'b01101100;\r
+ fmem[779] <= 8'b01010100;\r
+ fmem[780] <= 8'b01010100;\r
+ fmem[781] <= 8'b00111100;\r
+ fmem[782] <= 8'b01111000;\r
+ fmem[783] <= 8'b01000000;\r
+ fmem[784] <= 8'b00000000;\r
+ fmem[785] <= 8'b01000001;\r
+ fmem[786] <= 8'b01111111;\r
+ fmem[787] <= 8'b00111111;\r
+ fmem[788] <= 8'b01101100;\r
+ fmem[789] <= 8'b01000100;\r
+ fmem[790] <= 8'b01111100;\r
+ fmem[791] <= 8'b00111000;\r
+ fmem[792] <= 8'b00000000;\r
+ fmem[793] <= 8'b00111000;\r
+ fmem[794] <= 8'b01111100;\r
+ fmem[795] <= 8'b01000100;\r
+ fmem[796] <= 8'b01000100;\r
+ fmem[797] <= 8'b01101100;\r
+ fmem[798] <= 8'b00101100;\r
+ fmem[799] <= 8'b00000000;\r
+ fmem[800] <= 8'b00000000;\r
+ fmem[801] <= 8'b00111000;\r
+ fmem[802] <= 8'b01111100;\r
+ fmem[803] <= 8'b01000100;\r
+ fmem[804] <= 8'b01001001;\r
+ fmem[805] <= 8'b00111111;\r
+ fmem[806] <= 8'b01111111;\r
+ fmem[807] <= 8'b01000000;\r
+ fmem[808] <= 8'b00000000;\r
+ fmem[809] <= 8'b00111000;\r
+ fmem[810] <= 8'b01111100;\r
+ fmem[811] <= 8'b01010100;\r
+ fmem[812] <= 8'b01010100;\r
+ fmem[813] <= 8'b01011100;\r
+ fmem[814] <= 8'b01011000;\r
+ fmem[815] <= 8'b00000000;\r
+ fmem[816] <= 8'b00000000;\r
+ fmem[817] <= 8'b00000000;\r
+ fmem[818] <= 8'b01001000;\r
+ fmem[819] <= 8'b01111110;\r
+ fmem[820] <= 8'b01111111;\r
+ fmem[821] <= 8'b01001001;\r
+ fmem[822] <= 8'b00001011;\r
+ fmem[823] <= 8'b00000010;\r
+ fmem[824] <= 8'b00000000;\r
+ fmem[825] <= 8'b01001000;\r
+ fmem[826] <= 8'b01111100;\r
+ fmem[827] <= 8'b00110100;\r
+ fmem[828] <= 8'b00110100;\r
+ fmem[829] <= 8'b00101100;\r
+ fmem[830] <= 8'b01101000;\r
+ fmem[831] <= 8'b01000100;\r
+ fmem[832] <= 8'b00000000;\r
+ fmem[833] <= 8'b01000001;\r
+ fmem[834] <= 8'b01111111;\r
+ fmem[835] <= 8'b01111111;\r
+ fmem[836] <= 8'b00001000;\r
+ fmem[837] <= 8'b00000100;\r
+ fmem[838] <= 8'b01111100;\r
+ fmem[839] <= 8'b01111000;\r
+ fmem[840] <= 8'b00000000;\r
+ fmem[841] <= 8'b00000000;\r
+ fmem[842] <= 8'b01000100;\r
+ fmem[843] <= 8'b01111101;\r
+ fmem[844] <= 8'b01111101;\r
+ fmem[845] <= 8'b01000000;\r
+ fmem[846] <= 8'b00000000;\r
+ fmem[847] <= 8'b00000000;\r
+ fmem[848] <= 8'b00000000;\r
+ fmem[849] <= 8'b01100000;\r
+ fmem[850] <= 8'b01100000;\r
+ fmem[851] <= 8'b00000100;\r
+ fmem[852] <= 8'b01111101;\r
+ fmem[853] <= 8'b01111101;\r
+ fmem[854] <= 8'b00000000;\r
+ fmem[855] <= 8'b00000000;\r
+ fmem[856] <= 8'b00000000;\r
+ fmem[857] <= 8'b01000001;\r
+ fmem[858] <= 8'b01111111;\r
+ fmem[859] <= 8'b01111111;\r
+ fmem[860] <= 8'b00010000;\r
+ fmem[861] <= 8'b01111000;\r
+ fmem[862] <= 8'b01101100;\r
+ fmem[863] <= 8'b01000100;\r
+ fmem[864] <= 8'b00000000;\r
+ fmem[865] <= 8'b00000000;\r
+ fmem[866] <= 8'b01000001;\r
+ fmem[867] <= 8'b01111111;\r
+ fmem[868] <= 8'b01111111;\r
+ fmem[869] <= 8'b01000000;\r
+ fmem[870] <= 8'b00000000;\r
+ fmem[871] <= 8'b00000000;\r
+ fmem[872] <= 8'b00000000;\r
+ fmem[873] <= 8'b01111100;\r
+ fmem[874] <= 8'b01111100;\r
+ fmem[875] <= 8'b00001100;\r
+ fmem[876] <= 8'b01111000;\r
+ fmem[877] <= 8'b00001100;\r
+ fmem[878] <= 8'b01111100;\r
+ fmem[879] <= 8'b01111000;\r
+ fmem[880] <= 8'b00000000;\r
+ fmem[881] <= 8'b01000100;\r
+ fmem[882] <= 8'b01111100;\r
+ fmem[883] <= 8'b01111100;\r
+ fmem[884] <= 8'b00001000;\r
+ fmem[885] <= 8'b00000100;\r
+ fmem[886] <= 8'b01111100;\r
+ fmem[887] <= 8'b01111000;\r
+ fmem[888] <= 8'b00000000;\r
+ fmem[889] <= 8'b00111000;\r
+ fmem[890] <= 8'b01111100;\r
+ fmem[891] <= 8'b01000100;\r
+ fmem[892] <= 8'b01000100;\r
+ fmem[893] <= 8'b01111100;\r
+ fmem[894] <= 8'b00111000;\r
+ fmem[895] <= 8'b00000000;\r
+ fmem[896] <= 8'b00000000;\r
+ fmem[897] <= 8'b00000100;\r
+ fmem[898] <= 8'b01111100;\r
+ fmem[899] <= 8'b01111000;\r
+ fmem[900] <= 8'b00100100;\r
+ fmem[901] <= 8'b00100100;\r
+ fmem[902] <= 8'b00111100;\r
+ fmem[903] <= 8'b00011000;\r
+ fmem[904] <= 8'b00000000;\r
+ fmem[905] <= 8'b00011000;\r
+ fmem[906] <= 8'b00111100;\r
+ fmem[907] <= 8'b00100100;\r
+ fmem[908] <= 8'b00100100;\r
+ fmem[909] <= 8'b01111000;\r
+ fmem[910] <= 8'b01111100;\r
+ fmem[911] <= 8'b00000000;\r
+ fmem[912] <= 8'b00000000;\r
+ fmem[913] <= 8'b01000100;\r
+ fmem[914] <= 8'b01111100;\r
+ fmem[915] <= 8'b01111000;\r
+ fmem[916] <= 8'b01001100;\r
+ fmem[917] <= 8'b00000100;\r
+ fmem[918] <= 8'b00011100;\r
+ fmem[919] <= 8'b00011000;\r
+ fmem[920] <= 8'b00000000;\r
+ fmem[921] <= 8'b01001000;\r
+ fmem[922] <= 8'b01011100;\r
+ fmem[923] <= 8'b01011100;\r
+ fmem[924] <= 8'b01110100;\r
+ fmem[925] <= 8'b01110100;\r
+ fmem[926] <= 8'b00100100;\r
+ fmem[927] <= 8'b00000000;\r
+ fmem[928] <= 8'b00000000;\r
+ fmem[929] <= 8'b00000000;\r
+ fmem[930] <= 8'b00000100;\r
+ fmem[931] <= 8'b00111110;\r
+ fmem[932] <= 8'b01111111;\r
+ fmem[933] <= 8'b01000100;\r
+ fmem[934] <= 8'b00100100;\r
+ fmem[935] <= 8'b00000000;\r
+ fmem[936] <= 8'b00000000;\r
+ fmem[937] <= 8'b00111100;\r
+ fmem[938] <= 8'b01111100;\r
+ fmem[939] <= 8'b01000000;\r
+ fmem[940] <= 8'b01000000;\r
+ fmem[941] <= 8'b00111100;\r
+ fmem[942] <= 8'b01111100;\r
+ fmem[943] <= 8'b01000000;\r
+ fmem[944] <= 8'b00000000;\r
+ fmem[945] <= 8'b00000100;\r
+ fmem[946] <= 8'b00011100;\r
+ fmem[947] <= 8'b00111100;\r
+ fmem[948] <= 8'b01100000;\r
+ fmem[949] <= 8'b00110000;\r
+ fmem[950] <= 8'b00011100;\r
+ fmem[951] <= 8'b00000100;\r
+ fmem[952] <= 8'b00000000;\r
+ fmem[953] <= 8'b00011100;\r
+ fmem[954] <= 8'b01111100;\r
+ fmem[955] <= 8'b00110000;\r
+ fmem[956] <= 8'b00011100;\r
+ fmem[957] <= 8'b00110000;\r
+ fmem[958] <= 8'b01111100;\r
+ fmem[959] <= 8'b00011100;\r
+ fmem[960] <= 8'b00000000;\r
+ fmem[961] <= 8'b01000100;\r
+ fmem[962] <= 8'b01101100;\r
+ fmem[963] <= 8'b00111100;\r
+ fmem[964] <= 8'b00010000;\r
+ fmem[965] <= 8'b01111000;\r
+ fmem[966] <= 8'b01101100;\r
+ fmem[967] <= 8'b01000100;\r
+ fmem[968] <= 8'b00000000;\r
+ fmem[969] <= 8'b01000100;\r
+ fmem[970] <= 8'b01001100;\r
+ fmem[971] <= 8'b00011100;\r
+ fmem[972] <= 8'b01110000;\r
+ fmem[973] <= 8'b01100100;\r
+ fmem[974] <= 8'b00011100;\r
+ fmem[975] <= 8'b00001100;\r
+ fmem[976] <= 8'b00000000;\r
+ fmem[977] <= 8'b01001100;\r
+ fmem[978] <= 8'b01100100;\r
+ fmem[979] <= 8'b01110100;\r
+ fmem[980] <= 8'b01011100;\r
+ fmem[981] <= 8'b01001100;\r
+ fmem[982] <= 8'b01100100;\r
+ fmem[983] <= 8'b00000000;\r
+ fmem[984] <= 8'b00000000;\r
+ fmem[985] <= 8'b00001000;\r
+ fmem[986] <= 8'b00001000;\r
+ fmem[987] <= 8'b00111110;\r
+ fmem[988] <= 8'b01110111;\r
+ fmem[989] <= 8'b01000001;\r
+ fmem[990] <= 8'b01000001;\r
+ fmem[991] <= 8'b00000000;\r
+ fmem[992] <= 8'b00000000;\r
+ fmem[993] <= 8'b00000000;\r
+ fmem[994] <= 8'b00000000;\r
+ fmem[995] <= 8'b01111111;\r
+ fmem[996] <= 8'b01111111;\r
+ fmem[997] <= 8'b00000000;\r
+ fmem[998] <= 8'b00000000;\r
+ fmem[999] <= 8'b00000000;\r
+ fmem[1000] <= 8'b00000000;\r
+ fmem[1001] <= 8'b01000001;\r
+ fmem[1002] <= 8'b01000001;\r
+ fmem[1003] <= 8'b01110111;\r
+ fmem[1004] <= 8'b00111110;\r
+ fmem[1005] <= 8'b00001000;\r
+ fmem[1006] <= 8'b00001000;\r
+ fmem[1007] <= 8'b00000000;\r
+ fmem[1008] <= 8'b00000000;\r
+ fmem[1009] <= 8'b00000010;\r
+ fmem[1010] <= 8'b00000001;\r
+ fmem[1011] <= 8'b00000001;\r
+ fmem[1012] <= 8'b00000011;\r
+ fmem[1013] <= 8'b00000010;\r
+ fmem[1014] <= 8'b00000010;\r
+ fmem[1015] <= 8'b00000001;\r
+ fmem[1016] <= 8'b00000000;\r
+ fmem[1017] <= 8'b01100000;\r
+ fmem[1018] <= 8'b01111000;\r
+ fmem[1019] <= 8'b01001110;\r
+ fmem[1020] <= 8'b01000111;\r
+ fmem[1021] <= 8'b01011110;\r
+ fmem[1022] <= 8'b01111000;\r
+ fmem[1023] <= 8'b01100000;\r
+ fmem[1024] <= 8'b00000000;\r
+ fmem[1025] <= 8'b00011100;\r
+ fmem[1026] <= 8'b00111110;\r
+ fmem[1027] <= 8'b00100011;\r
+ fmem[1028] <= 8'b01000001;\r
+ fmem[1029] <= 8'b01000001;\r
+ fmem[1030] <= 8'b01000010;\r
+ fmem[1031] <= 8'b00100111;\r
+ fmem[1032] <= 8'b00000000;\r
+ fmem[1033] <= 8'b00111101;\r
+ fmem[1034] <= 8'b01111101;\r
+ fmem[1035] <= 8'b01000000;\r
+ fmem[1036] <= 8'b01000001;\r
+ fmem[1037] <= 8'b00111101;\r
+ fmem[1038] <= 8'b01111100;\r
+ fmem[1039] <= 8'b01000000;\r
+ fmem[1040] <= 8'b00000000;\r
+ fmem[1041] <= 8'b00111000;\r
+ fmem[1042] <= 8'b01111100;\r
+ fmem[1043] <= 8'b01010110;\r
+ fmem[1044] <= 8'b01010111;\r
+ fmem[1045] <= 8'b01011101;\r
+ fmem[1046] <= 8'b01011001;\r
+ fmem[1047] <= 8'b00000000;\r
+ fmem[1048] <= 8'b00000000;\r
+ fmem[1049] <= 8'b01101000;\r
+ fmem[1050] <= 8'b01101110;\r
+ fmem[1051] <= 8'b01010111;\r
+ fmem[1052] <= 8'b01010111;\r
+ fmem[1053] <= 8'b00111110;\r
+ fmem[1054] <= 8'b01111000;\r
+ fmem[1055] <= 8'b01000000;\r
+ fmem[1056] <= 8'b00000000;\r
+ fmem[1057] <= 8'b01101000;\r
+ fmem[1058] <= 8'b01101101;\r
+ fmem[1059] <= 8'b01010101;\r
+ fmem[1060] <= 8'b01010100;\r
+ fmem[1061] <= 8'b00111101;\r
+ fmem[1062] <= 8'b01111001;\r
+ fmem[1063] <= 8'b01000000;\r
+ fmem[1064] <= 8'b00000000;\r
+ fmem[1065] <= 8'b01101000;\r
+ fmem[1066] <= 8'b01101101;\r
+ fmem[1067] <= 8'b01010111;\r
+ fmem[1068] <= 8'b01010110;\r
+ fmem[1069] <= 8'b00111100;\r
+ fmem[1070] <= 8'b01111000;\r
+ fmem[1071] <= 8'b01000000;\r
+ fmem[1072] <= 8'b00000000;\r
+ fmem[1073] <= 8'b01101000;\r
+ fmem[1074] <= 8'b01101100;\r
+ fmem[1075] <= 8'b01010111;\r
+ fmem[1076] <= 8'b01010111;\r
+ fmem[1077] <= 8'b00111100;\r
+ fmem[1078] <= 8'b01111000;\r
+ fmem[1079] <= 8'b01000000;\r
+ fmem[1080] <= 8'b00000000;\r
+ fmem[1081] <= 8'b00011000;\r
+ fmem[1082] <= 8'b00111100;\r
+ fmem[1083] <= 8'b01100100;\r
+ fmem[1084] <= 8'b01000100;\r
+ fmem[1085] <= 8'b01101100;\r
+ fmem[1086] <= 8'b00101100;\r
+ fmem[1087] <= 8'b00000000;\r
+ fmem[1088] <= 8'b00000000;\r
+ fmem[1089] <= 8'b00111000;\r
+ fmem[1090] <= 8'b01111110;\r
+ fmem[1091] <= 8'b01010111;\r
+ fmem[1092] <= 8'b01010111;\r
+ fmem[1093] <= 8'b01011110;\r
+ fmem[1094] <= 8'b01011000;\r
+ fmem[1095] <= 8'b00000000;\r
+ fmem[1096] <= 8'b00000000;\r
+ fmem[1097] <= 8'b00111000;\r
+ fmem[1098] <= 8'b01111101;\r
+ fmem[1099] <= 8'b01010101;\r
+ fmem[1100] <= 8'b01010100;\r
+ fmem[1101] <= 8'b01011101;\r
+ fmem[1102] <= 8'b01011001;\r
+ fmem[1103] <= 8'b00000000;\r
+ fmem[1104] <= 8'b00000000;\r
+ fmem[1105] <= 8'b00111000;\r
+ fmem[1106] <= 8'b01111101;\r
+ fmem[1107] <= 8'b01010111;\r
+ fmem[1108] <= 8'b01010110;\r
+ fmem[1109] <= 8'b01011100;\r
+ fmem[1110] <= 8'b01011000;\r
+ fmem[1111] <= 8'b00000000;\r
+ fmem[1112] <= 8'b00000000;\r
+ fmem[1113] <= 8'b00000001;\r
+ fmem[1114] <= 8'b01000101;\r
+ fmem[1115] <= 8'b01111100;\r
+ fmem[1116] <= 8'b01111101;\r
+ fmem[1117] <= 8'b01000001;\r
+ fmem[1118] <= 8'b00000000;\r
+ fmem[1119] <= 8'b00000000;\r
+ fmem[1120] <= 8'b00000000;\r
+ fmem[1121] <= 8'b00000000;\r
+ fmem[1122] <= 8'b01001010;\r
+ fmem[1123] <= 8'b01111011;\r
+ fmem[1124] <= 8'b01111011;\r
+ fmem[1125] <= 8'b01000010;\r
+ fmem[1126] <= 8'b00000000;\r
+ fmem[1127] <= 8'b00000000;\r
+ fmem[1128] <= 8'b00000000;\r
+ fmem[1129] <= 8'b00000000;\r
+ fmem[1130] <= 8'b01001001;\r
+ fmem[1131] <= 8'b01111011;\r
+ fmem[1132] <= 8'b01111010;\r
+ fmem[1133] <= 8'b01000000;\r
+ fmem[1134] <= 8'b00000000;\r
+ fmem[1135] <= 8'b00000000;\r
+ fmem[1136] <= 8'b00000000;\r
+ fmem[1137] <= 8'b01000000;\r
+ fmem[1138] <= 8'b01110001;\r
+ fmem[1139] <= 8'b00111101;\r
+ fmem[1140] <= 8'b00100110;\r
+ fmem[1141] <= 8'b00111101;\r
+ fmem[1142] <= 8'b01111001;\r
+ fmem[1143] <= 8'b01100000;\r
+ fmem[1144] <= 8'b00000000;\r
+ fmem[1145] <= 8'b01000000;\r
+ fmem[1146] <= 8'b01110000;\r
+ fmem[1147] <= 8'b00111111;\r
+ fmem[1148] <= 8'b00101101;\r
+ fmem[1149] <= 8'b00111111;\r
+ fmem[1150] <= 8'b01111000;\r
+ fmem[1151] <= 8'b01100000;\r
+ fmem[1152] <= 8'b00000000;\r
+ fmem[1153] <= 8'b01000100;\r
+ fmem[1154] <= 8'b01111100;\r
+ fmem[1155] <= 8'b01111100;\r
+ fmem[1156] <= 8'b01010110;\r
+ fmem[1157] <= 8'b01010111;\r
+ fmem[1158] <= 8'b01000101;\r
+ fmem[1159] <= 8'b01101101;\r
+ fmem[1160] <= 8'b00000000;\r
+ fmem[1161] <= 8'b01100100;\r
+ fmem[1162] <= 8'b01110100;\r
+ fmem[1163] <= 8'b01011100;\r
+ fmem[1164] <= 8'b00111000;\r
+ fmem[1165] <= 8'b01110100;\r
+ fmem[1166] <= 8'b01011100;\r
+ fmem[1167] <= 8'b01011000;\r
+ fmem[1168] <= 8'b00000000;\r
+ fmem[1169] <= 8'b01110000;\r
+ fmem[1170] <= 8'b01111111;\r
+ fmem[1171] <= 8'b00001011;\r
+ fmem[1172] <= 8'b01111111;\r
+ fmem[1173] <= 8'b01111111;\r
+ fmem[1174] <= 8'b01001001;\r
+ fmem[1175] <= 8'b01100011;\r
+ fmem[1176] <= 8'b00000000;\r
+ fmem[1177] <= 8'b00111000;\r
+ fmem[1178] <= 8'b01111110;\r
+ fmem[1179] <= 8'b01000111;\r
+ fmem[1180] <= 8'b01000111;\r
+ fmem[1181] <= 8'b01111110;\r
+ fmem[1182] <= 8'b00111000;\r
+ fmem[1183] <= 8'b00000000;\r
+ fmem[1184] <= 8'b00000000;\r
+ fmem[1185] <= 8'b00111001;\r
+ fmem[1186] <= 8'b01111101;\r
+ fmem[1187] <= 8'b01000100;\r
+ fmem[1188] <= 8'b01000100;\r
+ fmem[1189] <= 8'b01111101;\r
+ fmem[1190] <= 8'b00111001;\r
+ fmem[1191] <= 8'b00000000;\r
+ fmem[1192] <= 8'b00000000;\r
+ fmem[1193] <= 8'b00111001;\r
+ fmem[1194] <= 8'b01111101;\r
+ fmem[1195] <= 8'b01000111;\r
+ fmem[1196] <= 8'b01000110;\r
+ fmem[1197] <= 8'b01111100;\r
+ fmem[1198] <= 8'b00111000;\r
+ fmem[1199] <= 8'b00000000;\r
+ fmem[1200] <= 8'b00000000;\r
+ fmem[1201] <= 8'b00111100;\r
+ fmem[1202] <= 8'b01111010;\r
+ fmem[1203] <= 8'b01000011;\r
+ fmem[1204] <= 8'b01000011;\r
+ fmem[1205] <= 8'b00111010;\r
+ fmem[1206] <= 8'b01111100;\r
+ fmem[1207] <= 8'b01000000;\r
+ fmem[1208] <= 8'b00000000;\r
+ fmem[1209] <= 8'b00111101;\r
+ fmem[1210] <= 8'b01111101;\r
+ fmem[1211] <= 8'b01000011;\r
+ fmem[1212] <= 8'b01000010;\r
+ fmem[1213] <= 8'b00111100;\r
+ fmem[1214] <= 8'b01111100;\r
+ fmem[1215] <= 8'b01000000;\r
+ fmem[1216] <= 8'b00000000;\r
+ fmem[1217] <= 8'b01000100;\r
+ fmem[1218] <= 8'b01001101;\r
+ fmem[1219] <= 8'b00011101;\r
+ fmem[1220] <= 8'b01110000;\r
+ fmem[1221] <= 8'b01100101;\r
+ fmem[1222] <= 8'b00011101;\r
+ fmem[1223] <= 8'b00001100;\r
+ fmem[1224] <= 8'b00000000;\r
+ fmem[1225] <= 8'b00011001;\r
+ fmem[1226] <= 8'b00111101;\r
+ fmem[1227] <= 8'b01100110;\r
+ fmem[1228] <= 8'b01000010;\r
+ fmem[1229] <= 8'b01100110;\r
+ fmem[1230] <= 8'b00111101;\r
+ fmem[1231] <= 8'b00011001;\r
+ fmem[1232] <= 8'b00000000;\r
+ fmem[1233] <= 8'b00111110;\r
+ fmem[1234] <= 8'b01111101;\r
+ fmem[1235] <= 8'b01000001;\r
+ fmem[1236] <= 8'b01000000;\r
+ fmem[1237] <= 8'b01000001;\r
+ fmem[1238] <= 8'b01111101;\r
+ fmem[1239] <= 8'b00111110;\r
+ fmem[1240] <= 8'b00000000;\r
+ fmem[1241] <= 8'b00111000;\r
+ fmem[1242] <= 8'b01111100;\r
+ fmem[1243] <= 8'b01000100;\r
+ fmem[1244] <= 8'b01111100;\r
+ fmem[1245] <= 8'b01001111;\r
+ fmem[1246] <= 8'b00101001;\r
+ fmem[1247] <= 8'b00000000;\r
+ fmem[1248] <= 8'b00000000;\r
+ fmem[1249] <= 8'b01101000;\r
+ fmem[1250] <= 8'b01011110;\r
+ fmem[1251] <= 8'b01111111;\r
+ fmem[1252] <= 8'b00111001;\r
+ fmem[1253] <= 8'b01001001;\r
+ fmem[1254] <= 8'b01100111;\r
+ fmem[1255] <= 8'b00110110;\r
+ fmem[1256] <= 8'b00000000;\r
+ fmem[1257] <= 8'b00101011;\r
+ fmem[1258] <= 8'b00101111;\r
+ fmem[1259] <= 8'b01111100;\r
+ fmem[1260] <= 8'b01111100;\r
+ fmem[1261] <= 8'b00101111;\r
+ fmem[1262] <= 8'b00101011;\r
+ fmem[1263] <= 8'b00000000;\r
+ fmem[1264] <= 8'b00000000;\r
+ fmem[1265] <= 8'b01111111;\r
+ fmem[1266] <= 8'b01111111;\r
+ fmem[1267] <= 8'b00001001;\r
+ fmem[1268] <= 8'b00101111;\r
+ fmem[1269] <= 8'b01110110;\r
+ fmem[1270] <= 8'b01111000;\r
+ fmem[1271] <= 8'b00100000;\r
+ fmem[1272] <= 8'b00000000;\r
+ fmem[1273] <= 8'b01000000;\r
+ fmem[1274] <= 8'b00001000;\r
+ fmem[1275] <= 8'b01111110;\r
+ fmem[1276] <= 8'b01111111;\r
+ fmem[1277] <= 8'b00001001;\r
+ fmem[1278] <= 8'b00001011;\r
+ fmem[1279] <= 8'b00000010;\r
+ fmem[1280] <= 8'b00000000;\r
+ fmem[1281] <= 8'b01101000;\r
+ fmem[1282] <= 8'b01101100;\r
+ fmem[1283] <= 8'b01010110;\r
+ fmem[1284] <= 8'b01010111;\r
+ fmem[1285] <= 8'b00111101;\r
+ fmem[1286] <= 8'b01111001;\r
+ fmem[1287] <= 8'b01000000;\r
+ fmem[1288] <= 8'b00000000;\r
+ fmem[1289] <= 8'b00000000;\r
+ fmem[1290] <= 8'b01001010;\r
+ fmem[1291] <= 8'b01111011;\r
+ fmem[1292] <= 8'b01111001;\r
+ fmem[1293] <= 8'b01000001;\r
+ fmem[1294] <= 8'b00000000;\r
+ fmem[1295] <= 8'b00000000;\r
+ fmem[1296] <= 8'b00000000;\r
+ fmem[1297] <= 8'b00111000;\r
+ fmem[1298] <= 8'b01111100;\r
+ fmem[1299] <= 8'b01000110;\r
+ fmem[1300] <= 8'b01000111;\r
+ fmem[1301] <= 8'b01111101;\r
+ fmem[1302] <= 8'b00111001;\r
+ fmem[1303] <= 8'b00000000;\r
+ fmem[1304] <= 8'b00000000;\r
+ fmem[1305] <= 8'b00111100;\r
+ fmem[1306] <= 8'b01111100;\r
+ fmem[1307] <= 8'b01000010;\r
+ fmem[1308] <= 8'b01000011;\r
+ fmem[1309] <= 8'b00111101;\r
+ fmem[1310] <= 8'b01111101;\r
+ fmem[1311] <= 8'b01000000;\r
+ fmem[1312] <= 8'b00000000;\r
+ fmem[1313] <= 8'b01000100;\r
+ fmem[1314] <= 8'b01111110;\r
+ fmem[1315] <= 8'b01111101;\r
+ fmem[1316] <= 8'b00001011;\r
+ fmem[1317] <= 8'b00000110;\r
+ fmem[1318] <= 8'b01111101;\r
+ fmem[1319] <= 8'b01111000;\r
+ fmem[1320] <= 8'b00000000;\r
+ fmem[1321] <= 8'b01111100;\r
+ fmem[1322] <= 8'b01111110;\r
+ fmem[1323] <= 8'b00001101;\r
+ fmem[1324] <= 8'b00011011;\r
+ fmem[1325] <= 8'b00110010;\r
+ fmem[1326] <= 8'b01111101;\r
+ fmem[1327] <= 8'b01111100;\r
+ fmem[1328] <= 8'b00000000;\r
+ fmem[1329] <= 8'b00000000;\r
+ fmem[1330] <= 8'b00100110;\r
+ fmem[1331] <= 8'b00101111;\r
+ fmem[1332] <= 8'b00101001;\r
+ fmem[1333] <= 8'b00101111;\r
+ fmem[1334] <= 8'b00101111;\r
+ fmem[1335] <= 8'b00101000;\r
+ fmem[1336] <= 8'b00000000;\r
+ fmem[1337] <= 8'b00000000;\r
+ fmem[1338] <= 8'b00100110;\r
+ fmem[1339] <= 8'b00101111;\r
+ fmem[1340] <= 8'b00101001;\r
+ fmem[1341] <= 8'b00101111;\r
+ fmem[1342] <= 8'b00100110;\r
+ fmem[1343] <= 8'b00000000;\r
+ fmem[1344] <= 8'b00000000;\r
+ fmem[1345] <= 8'b00110000;\r
+ fmem[1346] <= 8'b01111000;\r
+ fmem[1347] <= 8'b01001101;\r
+ fmem[1348] <= 8'b01000101;\r
+ fmem[1349] <= 8'b01110000;\r
+ fmem[1350] <= 8'b00100000;\r
+ fmem[1351] <= 8'b00000000;\r
+ fmem[1352] <= 8'b00000000;\r
+ fmem[1353] <= 8'b00111000;\r
+ fmem[1354] <= 8'b00111000;\r
+ fmem[1355] <= 8'b00001000;\r
+ fmem[1356] <= 8'b00001000;\r
+ fmem[1357] <= 8'b00001000;\r
+ fmem[1358] <= 8'b00001000;\r
+ fmem[1359] <= 8'b00000000;\r
+ fmem[1360] <= 8'b00000000;\r
+ fmem[1361] <= 8'b00001000;\r
+ fmem[1362] <= 8'b00001000;\r
+ fmem[1363] <= 8'b00001000;\r
+ fmem[1364] <= 8'b00001000;\r
+ fmem[1365] <= 8'b00111000;\r
+ fmem[1366] <= 8'b00111000;\r
+ fmem[1367] <= 8'b00000000;\r
+ fmem[1368] <= 8'b00000000;\r
+ fmem[1369] <= 8'b01101111;\r
+ fmem[1370] <= 8'b00111111;\r
+ fmem[1371] <= 8'b00011000;\r
+ fmem[1372] <= 8'b01011100;\r
+ fmem[1373] <= 8'b01101110;\r
+ fmem[1374] <= 8'b00111010;\r
+ fmem[1375] <= 8'b00010000;\r
+ fmem[1376] <= 8'b00000000;\r
+ fmem[1377] <= 8'b01101111;\r
+ fmem[1378] <= 8'b00111111;\r
+ fmem[1379] <= 8'b00011000;\r
+ fmem[1380] <= 8'b01101100;\r
+ fmem[1381] <= 8'b01010110;\r
+ fmem[1382] <= 8'b01111010;\r
+ fmem[1383] <= 8'b01111000;\r
+ fmem[1384] <= 8'b00000000;\r
+ fmem[1385] <= 8'b00000000;\r
+ fmem[1386] <= 8'b00000000;\r
+ fmem[1387] <= 8'b01111101;\r
+ fmem[1388] <= 8'b01111101;\r
+ fmem[1389] <= 8'b00000000;\r
+ fmem[1390] <= 8'b00000000;\r
+ fmem[1391] <= 8'b00000000;\r
+ fmem[1392] <= 8'b00000000;\r
+ fmem[1393] <= 8'b00011000;\r
+ fmem[1394] <= 8'b00111100;\r
+ fmem[1395] <= 8'b01100110;\r
+ fmem[1396] <= 8'b01011010;\r
+ fmem[1397] <= 8'b00111100;\r
+ fmem[1398] <= 8'b01100110;\r
+ fmem[1399] <= 8'b01000010;\r
+ fmem[1400] <= 8'b00000000;\r
+ fmem[1401] <= 8'b01000010;\r
+ fmem[1402] <= 8'b01100110;\r
+ fmem[1403] <= 8'b00111100;\r
+ fmem[1404] <= 8'b01011010;\r
+ fmem[1405] <= 8'b01100110;\r
+ fmem[1406] <= 8'b00111100;\r
+ fmem[1407] <= 8'b00011000;\r
+ fmem[1408] <= 8'b00000000;\r
+ fmem[1409] <= 8'b00101010;\r
+ fmem[1410] <= 8'b00000000;\r
+ fmem[1411] <= 8'b01010101;\r
+ fmem[1412] <= 8'b00000000;\r
+ fmem[1413] <= 8'b00101010;\r
+ fmem[1414] <= 8'b00000000;\r
+ fmem[1415] <= 8'b01010101;\r
+ fmem[1416] <= 8'b00101010;\r
+ fmem[1417] <= 8'b01010101;\r
+ fmem[1418] <= 8'b00101010;\r
+ fmem[1419] <= 8'b01010101;\r
+ fmem[1420] <= 8'b00101010;\r
+ fmem[1421] <= 8'b01010101;\r
+ fmem[1422] <= 8'b00101010;\r
+ fmem[1423] <= 8'b01010101;\r
+ fmem[1424] <= 8'b01111111;\r
+ fmem[1425] <= 8'b01010101;\r
+ fmem[1426] <= 8'b01111111;\r
+ fmem[1427] <= 8'b00101010;\r
+ fmem[1428] <= 8'b01111111;\r
+ fmem[1429] <= 8'b01010101;\r
+ fmem[1430] <= 8'b01111111;\r
+ fmem[1431] <= 8'b00101010;\r
+ fmem[1432] <= 8'b00000000;\r
+ fmem[1433] <= 8'b00000000;\r
+ fmem[1434] <= 8'b00000000;\r
+ fmem[1435] <= 8'b01111111;\r
+ fmem[1436] <= 8'b01111111;\r
+ fmem[1437] <= 8'b00000000;\r
+ fmem[1438] <= 8'b00000000;\r
+ fmem[1439] <= 8'b00000000;\r
+ fmem[1440] <= 8'b00011000;\r
+ fmem[1441] <= 8'b00011000;\r
+ fmem[1442] <= 8'b00011000;\r
+ fmem[1443] <= 8'b01111111;\r
+ fmem[1444] <= 8'b01111111;\r
+ fmem[1445] <= 8'b00000000;\r
+ fmem[1446] <= 8'b00000000;\r
+ fmem[1447] <= 8'b00000000;\r
+ fmem[1448] <= 8'b00101100;\r
+ fmem[1449] <= 8'b00101100;\r
+ fmem[1450] <= 8'b00101100;\r
+ fmem[1451] <= 8'b01111111;\r
+ fmem[1452] <= 8'b01111111;\r
+ fmem[1453] <= 8'b00000000;\r
+ fmem[1454] <= 8'b00000000;\r
+ fmem[1455] <= 8'b00000000;\r
+ fmem[1456] <= 8'b00011000;\r
+ fmem[1457] <= 8'b00011000;\r
+ fmem[1458] <= 8'b01111111;\r
+ fmem[1459] <= 8'b01111111;\r
+ fmem[1460] <= 8'b00000000;\r
+ fmem[1461] <= 8'b01111111;\r
+ fmem[1462] <= 8'b00000000;\r
+ fmem[1463] <= 8'b00000000;\r
+ fmem[1464] <= 8'b00011000;\r
+ fmem[1465] <= 8'b00011000;\r
+ fmem[1466] <= 8'b01111000;\r
+ fmem[1467] <= 8'b01111000;\r
+ fmem[1468] <= 8'b00011000;\r
+ fmem[1469] <= 8'b01110000;\r
+ fmem[1470] <= 8'b00000000;\r
+ fmem[1471] <= 8'b00000000;\r
+ fmem[1472] <= 8'b00101100;\r
+ fmem[1473] <= 8'b00101100;\r
+ fmem[1474] <= 8'b00101100;\r
+ fmem[1475] <= 8'b01111100;\r
+ fmem[1476] <= 8'b01111000;\r
+ fmem[1477] <= 8'b00000000;\r
+ fmem[1478] <= 8'b00000000;\r
+ fmem[1479] <= 8'b00000000;\r
+ fmem[1480] <= 8'b00101100;\r
+ fmem[1481] <= 8'b00101100;\r
+ fmem[1482] <= 8'b01101111;\r
+ fmem[1483] <= 8'b01101111;\r
+ fmem[1484] <= 8'b00000000;\r
+ fmem[1485] <= 8'b01111111;\r
+ fmem[1486] <= 8'b00000000;\r
+ fmem[1487] <= 8'b00000000;\r
+ fmem[1488] <= 8'b00000000;\r
+ fmem[1489] <= 8'b00000000;\r
+ fmem[1490] <= 8'b01111111;\r
+ fmem[1491] <= 8'b01111111;\r
+ fmem[1492] <= 8'b00000000;\r
+ fmem[1493] <= 8'b01111111;\r
+ fmem[1494] <= 8'b00000000;\r
+ fmem[1495] <= 8'b00000000;\r
+ fmem[1496] <= 8'b00101100;\r
+ fmem[1497] <= 8'b00101100;\r
+ fmem[1498] <= 8'b01101100;\r
+ fmem[1499] <= 8'b01101100;\r
+ fmem[1500] <= 8'b00001100;\r
+ fmem[1501] <= 8'b01111000;\r
+ fmem[1502] <= 8'b00000000;\r
+ fmem[1503] <= 8'b00000000;\r
+ fmem[1504] <= 8'b00101100;\r
+ fmem[1505] <= 8'b00101100;\r
+ fmem[1506] <= 8'b00101111;\r
+ fmem[1507] <= 8'b00101111;\r
+ fmem[1508] <= 8'b00100000;\r
+ fmem[1509] <= 8'b00111111;\r
+ fmem[1510] <= 8'b00000000;\r
+ fmem[1511] <= 8'b00000000;\r
+ fmem[1512] <= 8'b00011000;\r
+ fmem[1513] <= 8'b00011000;\r
+ fmem[1514] <= 8'b00011111;\r
+ fmem[1515] <= 8'b00011111;\r
+ fmem[1516] <= 8'b00011000;\r
+ fmem[1517] <= 8'b00011111;\r
+ fmem[1518] <= 8'b00000000;\r
+ fmem[1519] <= 8'b00000000;\r
+ fmem[1520] <= 8'b00101100;\r
+ fmem[1521] <= 8'b00101100;\r
+ fmem[1522] <= 8'b00101100;\r
+ fmem[1523] <= 8'b00111111;\r
+ fmem[1524] <= 8'b00111111;\r
+ fmem[1525] <= 8'b00000000;\r
+ fmem[1526] <= 8'b00000000;\r
+ fmem[1527] <= 8'b00000000;\r
+ fmem[1528] <= 8'b00011000;\r
+ fmem[1529] <= 8'b00011000;\r
+ fmem[1530] <= 8'b00011000;\r
+ fmem[1531] <= 8'b01111000;\r
+ fmem[1532] <= 8'b01111000;\r
+ fmem[1533] <= 8'b00000000;\r
+ fmem[1534] <= 8'b00000000;\r
+ fmem[1535] <= 8'b00000000;\r
+ fmem[1536] <= 8'b00000000;\r
+ fmem[1537] <= 8'b00000000;\r
+ fmem[1538] <= 8'b00000000;\r
+ fmem[1539] <= 8'b00011111;\r
+ fmem[1540] <= 8'b00011111;\r
+ fmem[1541] <= 8'b00011000;\r
+ fmem[1542] <= 8'b00011000;\r
+ fmem[1543] <= 8'b00011000;\r
+ fmem[1544] <= 8'b00011000;\r
+ fmem[1545] <= 8'b00011000;\r
+ fmem[1546] <= 8'b00011000;\r
+ fmem[1547] <= 8'b00011111;\r
+ fmem[1548] <= 8'b00011111;\r
+ fmem[1549] <= 8'b00011000;\r
+ fmem[1550] <= 8'b00011000;\r
+ fmem[1551] <= 8'b00011000;\r
+ fmem[1552] <= 8'b00011000;\r
+ fmem[1553] <= 8'b00011000;\r
+ fmem[1554] <= 8'b00011000;\r
+ fmem[1555] <= 8'b01111000;\r
+ fmem[1556] <= 8'b01111000;\r
+ fmem[1557] <= 8'b00011000;\r
+ fmem[1558] <= 8'b00011000;\r
+ fmem[1559] <= 8'b00011000;\r
+ fmem[1560] <= 8'b00000000;\r
+ fmem[1561] <= 8'b00000000;\r
+ fmem[1562] <= 8'b00000000;\r
+ fmem[1563] <= 8'b01111111;\r
+ fmem[1564] <= 8'b01111111;\r
+ fmem[1565] <= 8'b00011000;\r
+ fmem[1566] <= 8'b00011000;\r
+ fmem[1567] <= 8'b00011000;\r
+ fmem[1568] <= 8'b00011000;\r
+ fmem[1569] <= 8'b00011000;\r
+ fmem[1570] <= 8'b00011000;\r
+ fmem[1571] <= 8'b00011000;\r
+ fmem[1572] <= 8'b00011000;\r
+ fmem[1573] <= 8'b00011000;\r
+ fmem[1574] <= 8'b00011000;\r
+ fmem[1575] <= 8'b00011000;\r
+ fmem[1576] <= 8'b00011000;\r
+ fmem[1577] <= 8'b00011000;\r
+ fmem[1578] <= 8'b00011000;\r
+ fmem[1579] <= 8'b01111111;\r
+ fmem[1580] <= 8'b01111111;\r
+ fmem[1581] <= 8'b00011000;\r
+ fmem[1582] <= 8'b00011000;\r
+ fmem[1583] <= 8'b00011000;\r
+ fmem[1584] <= 8'b00000000;\r
+ fmem[1585] <= 8'b00000000;\r
+ fmem[1586] <= 8'b00000000;\r
+ fmem[1587] <= 8'b01111111;\r
+ fmem[1588] <= 8'b01111111;\r
+ fmem[1589] <= 8'b00101100;\r
+ fmem[1590] <= 8'b00101100;\r
+ fmem[1591] <= 8'b00101100;\r
+ fmem[1592] <= 8'b00000000;\r
+ fmem[1593] <= 8'b00000000;\r
+ fmem[1594] <= 8'b01111111;\r
+ fmem[1595] <= 8'b01111111;\r
+ fmem[1596] <= 8'b00000000;\r
+ fmem[1597] <= 8'b01111111;\r
+ fmem[1598] <= 8'b00011000;\r
+ fmem[1599] <= 8'b00011000;\r
+ fmem[1600] <= 8'b00000000;\r
+ fmem[1601] <= 8'b00000000;\r
+ fmem[1602] <= 8'b00011111;\r
+ fmem[1603] <= 8'b00111111;\r
+ fmem[1604] <= 8'b00100000;\r
+ fmem[1605] <= 8'b00101111;\r
+ fmem[1606] <= 8'b00101100;\r
+ fmem[1607] <= 8'b00101100;\r
+ fmem[1608] <= 8'b00000000;\r
+ fmem[1609] <= 8'b00000000;\r
+ fmem[1610] <= 8'b01111100;\r
+ fmem[1611] <= 8'b01111100;\r
+ fmem[1612] <= 8'b00001100;\r
+ fmem[1613] <= 8'b01101100;\r
+ fmem[1614] <= 8'b00101100;\r
+ fmem[1615] <= 8'b00101100;\r
+ fmem[1616] <= 8'b00101100;\r
+ fmem[1617] <= 8'b00101100;\r
+ fmem[1618] <= 8'b00101111;\r
+ fmem[1619] <= 8'b00101111;\r
+ fmem[1620] <= 8'b00100000;\r
+ fmem[1621] <= 8'b00101111;\r
+ fmem[1622] <= 8'b00101100;\r
+ fmem[1623] <= 8'b00101100;\r
+ fmem[1624] <= 8'b00101100;\r
+ fmem[1625] <= 8'b00101100;\r
+ fmem[1626] <= 8'b01101100;\r
+ fmem[1627] <= 8'b01101100;\r
+ fmem[1628] <= 8'b00001100;\r
+ fmem[1629] <= 8'b01101100;\r
+ fmem[1630] <= 8'b00101100;\r
+ fmem[1631] <= 8'b00101100;\r
+ fmem[1632] <= 8'b00000000;\r
+ fmem[1633] <= 8'b00000000;\r
+ fmem[1634] <= 8'b01111111;\r
+ fmem[1635] <= 8'b01111111;\r
+ fmem[1636] <= 8'b00000000;\r
+ fmem[1637] <= 8'b01101111;\r
+ fmem[1638] <= 8'b00101100;\r
+ fmem[1639] <= 8'b00101100;\r
+ fmem[1640] <= 8'b00101100;\r
+ fmem[1641] <= 8'b00101100;\r
+ fmem[1642] <= 8'b00101100;\r
+ fmem[1643] <= 8'b00101100;\r
+ fmem[1644] <= 8'b00101100;\r
+ fmem[1645] <= 8'b00101100;\r
+ fmem[1646] <= 8'b00101100;\r
+ fmem[1647] <= 8'b00101100;\r
+ fmem[1648] <= 8'b00101100;\r
+ fmem[1649] <= 8'b00101100;\r
+ fmem[1650] <= 8'b01101111;\r
+ fmem[1651] <= 8'b01101111;\r
+ fmem[1652] <= 8'b00000000;\r
+ fmem[1653] <= 8'b01101111;\r
+ fmem[1654] <= 8'b00101100;\r
+ fmem[1655] <= 8'b00101100;\r
+ fmem[1656] <= 8'b00101100;\r
+ fmem[1657] <= 8'b00101100;\r
+ fmem[1658] <= 8'b00101100;\r
+ fmem[1659] <= 8'b00101111;\r
+ fmem[1660] <= 8'b00101111;\r
+ fmem[1661] <= 8'b00101100;\r
+ fmem[1662] <= 8'b00101100;\r
+ fmem[1663] <= 8'b00101100;\r
+ fmem[1664] <= 8'b00011000;\r
+ fmem[1665] <= 8'b00011000;\r
+ fmem[1666] <= 8'b00011111;\r
+ fmem[1667] <= 8'b00011111;\r
+ fmem[1668] <= 8'b00011000;\r
+ fmem[1669] <= 8'b00011111;\r
+ fmem[1670] <= 8'b00011000;\r
+ fmem[1671] <= 8'b00011000;\r
+ fmem[1672] <= 8'b00101100;\r
+ fmem[1673] <= 8'b00101100;\r
+ fmem[1674] <= 8'b00101100;\r
+ fmem[1675] <= 8'b01101100;\r
+ fmem[1676] <= 8'b01101100;\r
+ fmem[1677] <= 8'b00101100;\r
+ fmem[1678] <= 8'b00101100;\r
+ fmem[1679] <= 8'b00101100;\r
+ fmem[1680] <= 8'b00011000;\r
+ fmem[1681] <= 8'b00011000;\r
+ fmem[1682] <= 8'b01111000;\r
+ fmem[1683] <= 8'b01111000;\r
+ fmem[1684] <= 8'b00011000;\r
+ fmem[1685] <= 8'b01111000;\r
+ fmem[1686] <= 8'b00011000;\r
+ fmem[1687] <= 8'b00011000;\r
+ fmem[1688] <= 8'b00000000;\r
+ fmem[1689] <= 8'b00000000;\r
+ fmem[1690] <= 8'b00001111;\r
+ fmem[1691] <= 8'b00011111;\r
+ fmem[1692] <= 8'b00011000;\r
+ fmem[1693] <= 8'b00011111;\r
+ fmem[1694] <= 8'b00011000;\r
+ fmem[1695] <= 8'b00011000;\r
+ fmem[1696] <= 8'b00000000;\r
+ fmem[1697] <= 8'b00000000;\r
+ fmem[1698] <= 8'b00000000;\r
+ fmem[1699] <= 8'b00011111;\r
+ fmem[1700] <= 8'b00111111;\r
+ fmem[1701] <= 8'b00101100;\r
+ fmem[1702] <= 8'b00101100;\r
+ fmem[1703] <= 8'b00101100;\r
+ fmem[1704] <= 8'b00000000;\r
+ fmem[1705] <= 8'b00000000;\r
+ fmem[1706] <= 8'b00000000;\r
+ fmem[1707] <= 8'b01111100;\r
+ fmem[1708] <= 8'b01111100;\r
+ fmem[1709] <= 8'b00101100;\r
+ fmem[1710] <= 8'b00101100;\r
+ fmem[1711] <= 8'b00101100;\r
+ fmem[1712] <= 8'b00000000;\r
+ fmem[1713] <= 8'b00000000;\r
+ fmem[1714] <= 8'b01111000;\r
+ fmem[1715] <= 8'b01111000;\r
+ fmem[1716] <= 8'b00011000;\r
+ fmem[1717] <= 8'b01111000;\r
+ fmem[1718] <= 8'b00011000;\r
+ fmem[1719] <= 8'b00011000;\r
+ fmem[1720] <= 8'b00011000;\r
+ fmem[1721] <= 8'b00011000;\r
+ fmem[1722] <= 8'b01111111;\r
+ fmem[1723] <= 8'b01111111;\r
+ fmem[1724] <= 8'b00011000;\r
+ fmem[1725] <= 8'b01111111;\r
+ fmem[1726] <= 8'b00011000;\r
+ fmem[1727] <= 8'b00011000;\r
+ fmem[1728] <= 8'b00101100;\r
+ fmem[1729] <= 8'b00101100;\r
+ fmem[1730] <= 8'b00101100;\r
+ fmem[1731] <= 8'b01111111;\r
+ fmem[1732] <= 8'b01111111;\r
+ fmem[1733] <= 8'b00101100;\r
+ fmem[1734] <= 8'b00101100;\r
+ fmem[1735] <= 8'b00101100;\r
+ fmem[1736] <= 8'b00011000;\r
+ fmem[1737] <= 8'b00011000;\r
+ fmem[1738] <= 8'b00011000;\r
+ fmem[1739] <= 8'b00011111;\r
+ fmem[1740] <= 8'b00011111;\r
+ fmem[1741] <= 8'b00000000;\r
+ fmem[1742] <= 8'b00000000;\r
+ fmem[1743] <= 8'b00000000;\r
+ fmem[1744] <= 8'b00000000;\r
+ fmem[1745] <= 8'b00000000;\r
+ fmem[1746] <= 8'b00000000;\r
+ fmem[1747] <= 8'b01111000;\r
+ fmem[1748] <= 8'b01111000;\r
+ fmem[1749] <= 8'b00011000;\r
+ fmem[1750] <= 8'b00011000;\r
+ fmem[1751] <= 8'b00011000;\r
+ fmem[1752] <= 8'b01111111;\r
+ fmem[1753] <= 8'b01111111;\r
+ fmem[1754] <= 8'b01111111;\r
+ fmem[1755] <= 8'b01111111;\r
+ fmem[1756] <= 8'b01111111;\r
+ fmem[1757] <= 8'b01111111;\r
+ fmem[1758] <= 8'b01111111;\r
+ fmem[1759] <= 8'b01111111;\r
+ fmem[1760] <= 8'b01110000;\r
+ fmem[1761] <= 8'b01110000;\r
+ fmem[1762] <= 8'b01110000;\r
+ fmem[1763] <= 8'b01110000;\r
+ fmem[1764] <= 8'b01110000;\r
+ fmem[1765] <= 8'b01110000;\r
+ fmem[1766] <= 8'b01110000;\r
+ fmem[1767] <= 8'b01110000;\r
+ fmem[1768] <= 8'b01111111;\r
+ fmem[1769] <= 8'b01111111;\r
+ fmem[1770] <= 8'b01111111;\r
+ fmem[1771] <= 8'b01111111;\r
+ fmem[1772] <= 8'b00000000;\r
+ fmem[1773] <= 8'b00000000;\r
+ fmem[1774] <= 8'b00000000;\r
+ fmem[1775] <= 8'b00000000;\r
+ fmem[1776] <= 8'b00000000;\r
+ fmem[1777] <= 8'b00000000;\r
+ fmem[1778] <= 8'b00000000;\r
+ fmem[1779] <= 8'b00000000;\r
+ fmem[1780] <= 8'b01111111;\r
+ fmem[1781] <= 8'b01111111;\r
+ fmem[1782] <= 8'b01111111;\r
+ fmem[1783] <= 8'b01111111;\r
+ fmem[1784] <= 8'b00001111;\r
+ fmem[1785] <= 8'b00001111;\r
+ fmem[1786] <= 8'b00001111;\r
+ fmem[1787] <= 8'b00001111;\r
+ fmem[1788] <= 8'b00001111;\r
+ fmem[1789] <= 8'b00001111;\r
+ fmem[1790] <= 8'b00001111;\r
+ fmem[1791] <= 8'b00001111;\r
+ fmem[1792] <= 8'b00000000;\r
+ fmem[1793] <= 8'b00111000;\r
+ fmem[1794] <= 8'b01111100;\r
+ fmem[1795] <= 8'b01000100;\r
+ fmem[1796] <= 8'b01101100;\r
+ fmem[1797] <= 8'b00111100;\r
+ fmem[1798] <= 8'b01111000;\r
+ fmem[1799] <= 8'b01000100;\r
+ fmem[1800] <= 8'b00000000;\r
+ fmem[1801] <= 8'b01111110;\r
+ fmem[1802] <= 8'b01111111;\r
+ fmem[1803] <= 8'b00100001;\r
+ fmem[1804] <= 8'b01100101;\r
+ fmem[1805] <= 8'b01001111;\r
+ fmem[1806] <= 8'b01111010;\r
+ fmem[1807] <= 8'b00110000;\r
+ fmem[1808] <= 8'b00000000;\r
+ fmem[1809] <= 8'b01000001;\r
+ fmem[1810] <= 8'b01111111;\r
+ fmem[1811] <= 8'b01111111;\r
+ fmem[1812] <= 8'b01000001;\r
+ fmem[1813] <= 8'b00000001;\r
+ fmem[1814] <= 8'b00000011;\r
+ fmem[1815] <= 8'b00000111;\r
+ fmem[1816] <= 8'b00000000;\r
+ fmem[1817] <= 8'b01001100;\r
+ fmem[1818] <= 8'b01100110;\r
+ fmem[1819] <= 8'b00111110;\r
+ fmem[1820] <= 8'b00000110;\r
+ fmem[1821] <= 8'b01111110;\r
+ fmem[1822] <= 8'b01100110;\r
+ fmem[1823] <= 8'b00000010;\r
+ fmem[1824] <= 8'b00000000;\r
+ fmem[1825] <= 8'b01000001;\r
+ fmem[1826] <= 8'b01100011;\r
+ fmem[1827] <= 8'b01110111;\r
+ fmem[1828] <= 8'b01011101;\r
+ fmem[1829] <= 8'b01001001;\r
+ fmem[1830] <= 8'b01100011;\r
+ fmem[1831] <= 8'b01100011;\r
+ fmem[1832] <= 8'b00000000;\r
+ fmem[1833] <= 8'b00111000;\r
+ fmem[1834] <= 8'b01111100;\r
+ fmem[1835] <= 8'b01000100;\r
+ fmem[1836] <= 8'b01111100;\r
+ fmem[1837] <= 8'b00111100;\r
+ fmem[1838] <= 8'b00000100;\r
+ fmem[1839] <= 8'b00000100;\r
+ fmem[1840] <= 8'b00000000;\r
+ fmem[1841] <= 8'b01000000;\r
+ fmem[1842] <= 8'b01111100;\r
+ fmem[1843] <= 8'b00111100;\r
+ fmem[1844] <= 8'b01000000;\r
+ fmem[1845] <= 8'b01100000;\r
+ fmem[1846] <= 8'b00111100;\r
+ fmem[1847] <= 8'b01111100;\r
+ fmem[1848] <= 8'b00000000;\r
+ fmem[1849] <= 8'b00001100;\r
+ fmem[1850] <= 8'b00000110;\r
+ fmem[1851] <= 8'b00111110;\r
+ fmem[1852] <= 8'b01110110;\r
+ fmem[1853] <= 8'b01100110;\r
+ fmem[1854] <= 8'b00000110;\r
+ fmem[1855] <= 8'b00000010;\r
+ fmem[1856] <= 8'b00000000;\r
+ fmem[1857] <= 8'b00001000;\r
+ fmem[1858] <= 8'b00011100;\r
+ fmem[1859] <= 8'b01010101;\r
+ fmem[1860] <= 8'b01111111;\r
+ fmem[1861] <= 8'b01010101;\r
+ fmem[1862] <= 8'b00011100;\r
+ fmem[1863] <= 8'b00001000;\r
+ fmem[1864] <= 8'b00000000;\r
+ fmem[1865] <= 8'b00011100;\r
+ fmem[1866] <= 8'b00111110;\r
+ fmem[1867] <= 8'b01101011;\r
+ fmem[1868] <= 8'b01001001;\r
+ fmem[1869] <= 8'b01101011;\r
+ fmem[1870] <= 8'b00111110;\r
+ fmem[1871] <= 8'b00011100;\r
+ fmem[1872] <= 8'b00000000;\r
+ fmem[1873] <= 8'b01101100;\r
+ fmem[1874] <= 8'b01011110;\r
+ fmem[1875] <= 8'b01110011;\r
+ fmem[1876] <= 8'b00000001;\r
+ fmem[1877] <= 8'b01110011;\r
+ fmem[1878] <= 8'b01011110;\r
+ fmem[1879] <= 8'b01101100;\r
+ fmem[1880] <= 8'b00000000;\r
+ fmem[1881] <= 8'b00110000;\r
+ fmem[1882] <= 8'b01111010;\r
+ fmem[1883] <= 8'b01000111;\r
+ fmem[1884] <= 8'b01001101;\r
+ fmem[1885] <= 8'b01111001;\r
+ fmem[1886] <= 8'b00110000;\r
+ fmem[1887] <= 8'b00000000;\r
+ fmem[1888] <= 8'b00000000;\r
+ fmem[1889] <= 8'b00111100;\r
+ fmem[1890] <= 8'b01100110;\r
+ fmem[1891] <= 8'b01110110;\r
+ fmem[1892] <= 8'b00111100;\r
+ fmem[1893] <= 8'b01101110;\r
+ fmem[1894] <= 8'b01100110;\r
+ fmem[1895] <= 8'b00111100;\r
+ fmem[1896] <= 8'b00000000;\r
+ fmem[1897] <= 8'b00111000;\r
+ fmem[1898] <= 8'b01111100;\r
+ fmem[1899] <= 8'b01100100;\r
+ fmem[1900] <= 8'b01010100;\r
+ fmem[1901] <= 8'b01001100;\r
+ fmem[1902] <= 8'b01111110;\r
+ fmem[1903] <= 8'b00111011;\r
+ fmem[1904] <= 8'b00000000;\r
+ fmem[1905] <= 8'b00000000;\r
+ fmem[1906] <= 8'b00111000;\r
+ fmem[1907] <= 8'b01111100;\r
+ fmem[1908] <= 8'b01010100;\r
+ fmem[1909] <= 8'b01010100;\r
+ fmem[1910] <= 8'b01010100;\r
+ fmem[1911] <= 8'b00000000;\r
+ fmem[1912] <= 8'b00000000;\r
+ fmem[1913] <= 8'b01111110;\r
+ fmem[1914] <= 8'b01111111;\r
+ fmem[1915] <= 8'b00000001;\r
+ fmem[1916] <= 8'b00000001;\r
+ fmem[1917] <= 8'b01111111;\r
+ fmem[1918] <= 8'b01111110;\r
+ fmem[1919] <= 8'b00000000;\r
+ fmem[1920] <= 8'b00000000;\r
+ fmem[1921] <= 8'b00101010;\r
+ fmem[1922] <= 8'b00101010;\r
+ fmem[1923] <= 8'b00101010;\r
+ fmem[1924] <= 8'b00101010;\r
+ fmem[1925] <= 8'b00101010;\r
+ fmem[1926] <= 8'b00101010;\r
+ fmem[1927] <= 8'b00000000;\r
+ fmem[1928] <= 8'b00000000;\r
+ fmem[1929] <= 8'b01000100;\r
+ fmem[1930] <= 8'b01000100;\r
+ fmem[1931] <= 8'b01011111;\r
+ fmem[1932] <= 8'b01011111;\r
+ fmem[1933] <= 8'b01000100;\r
+ fmem[1934] <= 8'b01000100;\r
+ fmem[1935] <= 8'b00000000;\r
+ fmem[1936] <= 8'b00000000;\r
+ fmem[1937] <= 8'b01010001;\r
+ fmem[1938] <= 8'b01011011;\r
+ fmem[1939] <= 8'b01001010;\r
+ fmem[1940] <= 8'b01001110;\r
+ fmem[1941] <= 8'b01000100;\r
+ fmem[1942] <= 8'b01000100;\r
+ fmem[1943] <= 8'b00000000;\r
+ fmem[1944] <= 8'b00000000;\r
+ fmem[1945] <= 8'b01000100;\r
+ fmem[1946] <= 8'b01000100;\r
+ fmem[1947] <= 8'b01001110;\r
+ fmem[1948] <= 8'b01001010;\r
+ fmem[1949] <= 8'b01011011;\r
+ fmem[1950] <= 8'b01010001;\r
+ fmem[1951] <= 8'b00000000;\r
+ fmem[1952] <= 8'b00000000;\r
+ fmem[1953] <= 8'b00000000;\r
+ fmem[1954] <= 8'b00000000;\r
+ fmem[1955] <= 8'b01111110;\r
+ fmem[1956] <= 8'b01111111;\r
+ fmem[1957] <= 8'b00000001;\r
+ fmem[1958] <= 8'b00000111;\r
+ fmem[1959] <= 8'b00000010;\r
+ fmem[1960] <= 8'b00100000;\r
+ fmem[1961] <= 8'b01110000;\r
+ fmem[1962] <= 8'b01000000;\r
+ fmem[1963] <= 8'b01111111;\r
+ fmem[1964] <= 8'b00111111;\r
+ fmem[1965] <= 8'b00000000;\r
+ fmem[1966] <= 8'b00000000;\r
+ fmem[1967] <= 8'b00000000;\r
+ fmem[1968] <= 8'b00000000;\r
+ fmem[1969] <= 8'b00001000;\r
+ fmem[1970] <= 8'b00001000;\r
+ fmem[1971] <= 8'b01101011;\r
+ fmem[1972] <= 8'b01101011;\r
+ fmem[1973] <= 8'b00001000;\r
+ fmem[1974] <= 8'b00001000;\r
+ fmem[1975] <= 8'b00000000;\r
+ fmem[1976] <= 8'b00000000;\r
+ fmem[1977] <= 8'b00100100;\r
+ fmem[1978] <= 8'b00110110;\r
+ fmem[1979] <= 8'b00010010;\r
+ fmem[1980] <= 8'b00110110;\r
+ fmem[1981] <= 8'b00100100;\r
+ fmem[1982] <= 8'b00110110;\r
+ fmem[1983] <= 8'b00010010;\r
+ fmem[1984] <= 8'b00000000;\r
+ fmem[1985] <= 8'b00000000;\r
+ fmem[1986] <= 8'b00000110;\r
+ fmem[1987] <= 8'b00001111;\r
+ fmem[1988] <= 8'b00001001;\r
+ fmem[1989] <= 8'b00001111;\r
+ fmem[1990] <= 8'b00000110;\r
+ fmem[1991] <= 8'b00000000;\r
+ fmem[1992] <= 8'b00000000;\r
+ fmem[1993] <= 8'b00000000;\r
+ fmem[1994] <= 8'b00001000;\r
+ fmem[1995] <= 8'b00011100;\r
+ fmem[1996] <= 8'b00011100;\r
+ fmem[1997] <= 8'b00001000;\r
+ fmem[1998] <= 8'b00000000;\r
+ fmem[1999] <= 8'b00000000;\r
+ fmem[2000] <= 8'b00000000;\r
+ fmem[2001] <= 8'b00000000;\r
+ fmem[2002] <= 8'b00000000;\r
+ fmem[2003] <= 8'b00001000;\r
+ fmem[2004] <= 8'b00001000;\r
+ fmem[2005] <= 8'b00000000;\r
+ fmem[2006] <= 8'b00000000;\r
+ fmem[2007] <= 8'b00000000;\r
+ fmem[2008] <= 8'b00000000;\r
+ fmem[2009] <= 8'b00010000;\r
+ fmem[2010] <= 8'b00111000;\r
+ fmem[2011] <= 8'b01100000;\r
+ fmem[2012] <= 8'b01110000;\r
+ fmem[2013] <= 8'b00011100;\r
+ fmem[2014] <= 8'b00000111;\r
+ fmem[2015] <= 8'b00000001;\r
+ fmem[2016] <= 8'b00000000;\r
+ fmem[2017] <= 8'b00000001;\r
+ fmem[2018] <= 8'b00011111;\r
+ fmem[2019] <= 8'b00011111;\r
+ fmem[2020] <= 8'b00000010;\r
+ fmem[2021] <= 8'b00000001;\r
+ fmem[2022] <= 8'b00011111;\r
+ fmem[2023] <= 8'b00011110;\r
+ fmem[2024] <= 8'b00000000;\r
+ fmem[2025] <= 8'b00010010;\r
+ fmem[2026] <= 8'b00011011;\r
+ fmem[2027] <= 8'b00011001;\r
+ fmem[2028] <= 8'b00011101;\r
+ fmem[2029] <= 8'b00010111;\r
+ fmem[2030] <= 8'b00010010;\r
+ fmem[2031] <= 8'b00000000;\r
+ fmem[2032] <= 8'b00000000;\r
+ fmem[2033] <= 8'b00000000;\r
+ fmem[2034] <= 8'b00111100;\r
+ fmem[2035] <= 8'b00111100;\r
+ fmem[2036] <= 8'b00111100;\r
+ fmem[2037] <= 8'b00111100;\r
+ fmem[2038] <= 8'b00000000;\r
+ fmem[2039] <= 8'b00000000;\r
+ fmem[2040] <= 0;\r
+ fmem[2041] <= 0;\r
+ fmem[2042] <= 0;\r
+ fmem[2043] <= 0;\r
+ fmem[2044] <= 0;\r
+ fmem[2045] <= 0;\r
+ fmem[2046] <= 0;\r
+ fmem[2047] <= 0;\r
+end\r
+endmodule\r
+/*\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 20:24:28 2011\r
+ Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp \r
+*/\r
+\r
+module from_ctrl ( p_reset , m_clock , i_word_adrs , i_line_adrs , i_code_num , fi_write_word , fi_delete_word , fi_delete_line , fi_delete_display , fi_slide_line , o_vram_adrs , o_vram_wdata , i_vram_rdata , fo_write_vram , fo_read_vram , busy_call );\r
input p_reset, m_clock;\r
input [5:0] i_word_adrs;\r
input [4:0] i_line_adrs;\r
input [7:0] i_vram_rdata;\r
output fo_write_vram;\r
output fo_read_vram;\r
- output fo_complete_call;\r
+ output busy_call;\r
wire [7:0] w_code_num;\r
wire [63:0] w_font_data;\r
wire [5:0] w_word_adrs;\r
wire [13:0] w_vram_adrs;\r
wire fs_font_read;\r
wire fs_adrs_exec;\r
+ wire fs_complete_call;\r
wire [13:0] w_line_value;\r
reg [63:0] r_word;\r
reg [13:0] r_start_adrs;\r
- reg [2:0] r_cnt;\r
- wire [2:0] _net_2;\r
+ reg [13:0] r_cnt;\r
+ reg busy_flag;\r
+ wire [13:0] _net_10;\r
+ wire [13:0] _net_13;\r
+ wire [13:0] _net_16;\r
+ wire [13:0] _net_19;\r
wire [7:0] _U_FONT_ROM_i_code_num;\r
wire [63:0] _U_FONT_ROM_o_font_data;\r
wire _U_FONT_ROM_fi_font_read;\r
wire _U_FONT_ROM_p_reset;\r
wire _U_FONT_ROM_m_clock;\r
- reg _reg_3;\r
- reg _reg_4;\r
- reg _reg_5;\r
- reg _reg_6;\r
- wire _net_7;\r
- wire _reg_3_goto;\r
- wire _net_8;\r
- wire _reg_4_goin;\r
- wire _net_9;\r
- wire _net_10;\r
- wire _reg_4_goto;\r
- wire _net_11;\r
- wire _net_12;\r
- wire _net_13;\r
- wire _net_14;\r
- wire _net_15;\r
- wire _net_16;\r
- wire _net_17;\r
- wire _net_18;\r
- wire _net_19;\r
wire _net_20;\r
wire _net_21;\r
wire _net_22;\r
- wire _net_23;\r
- wire _net_24;\r
- wire _net_25;\r
- wire _net_26;\r
- wire _net_27;\r
- wire _net_28;\r
+ reg _reg_23;\r
+ reg _reg_24;\r
+ reg _reg_25;\r
+ reg _reg_26;\r
+ reg _reg_27;\r
+ reg _reg_28;\r
wire _net_29;\r
+ wire _reg_24_goto;\r
wire _net_30;\r
+ wire _reg_26_goin;\r
wire _net_31;\r
wire _net_32;\r
+ wire _reg_26_goto;\r
wire _net_33;\r
+ wire _reg_23_goin;\r
wire _net_34;\r
wire _net_35;\r
wire _net_36;\r
wire _net_42;\r
wire _net_43;\r
wire _net_44;\r
- wire _net_45;\r
- wire _net_46;\r
- wire _net_47;\r
- wire _net_48;\r
- wire _net_49;\r
+ reg _reg_45;\r
+ reg _reg_46;\r
+ reg _reg_47;\r
+ reg _reg_48;\r
+ reg _reg_49;\r
wire _net_50;\r
+ wire _reg_46_goto;\r
wire _net_51;\r
+ wire _reg_47_goin;\r
wire _net_52;\r
wire _net_53;\r
+ wire _reg_47_goto;\r
wire _net_54;\r
+ wire _reg_45_goin;\r
wire _net_55;\r
wire _net_56;\r
wire _net_57;\r
wire _net_61;\r
wire _net_62;\r
wire _net_63;\r
- wire _net_64;\r
- wire _net_65;\r
- wire _net_66;\r
- wire _net_67;\r
- wire _net_68;\r
+ reg _reg_64;\r
+ reg _reg_65;\r
+ reg _reg_66;\r
+ reg _reg_67;\r
+ reg _reg_68;\r
wire _net_69;\r
+ wire _reg_65_goto;\r
wire _net_70;\r
+ wire _reg_66_goin;\r
wire _net_71;\r
wire _net_72;\r
+ wire _reg_66_goto;\r
wire _net_73;\r
+ wire _reg_64_goin;\r
wire _net_74;\r
wire _net_75;\r
wire _net_76;\r
wire _net_77;\r
wire _net_78;\r
+ wire _net_79;\r
+ wire _net_80;\r
+ wire _net_81;\r
+ wire _net_82;\r
+ reg _reg_83;\r
+ reg _reg_84;\r
+ reg _reg_85;\r
+ wire _net_86;\r
+ wire _reg_84_goto;\r
+ wire _net_87;\r
+ wire _reg_83_goin;\r
+ wire _net_88;\r
+ wire _net_89;\r
+ wire _net_90;\r
+ wire _net_91;\r
+ wire _net_92;\r
+ wire _net_93;\r
+ wire _reg_84_goin;\r
+ wire _net_94;\r
+ wire _net_95;\r
+ wire _net_96;\r
+ wire _net_97;\r
+ wire _net_98;\r
+ wire _net_99;\r
+ wire _net_100;\r
+ wire _net_101;\r
+ wire _net_102;\r
+ wire _net_103;\r
+ wire _net_104;\r
+ wire _net_105;\r
+ wire _net_106;\r
+ wire _net_107;\r
+ wire _net_108;\r
+ wire _net_109;\r
+ wire _net_110;\r
+ wire _net_111;\r
+ wire _net_112;\r
+ wire _net_113;\r
+ wire _net_114;\r
+ wire _net_115;\r
+ wire _net_116;\r
+ wire _net_117;\r
+ wire _net_118;\r
+ wire _net_119;\r
+ wire _net_120;\r
+ wire _net_121;\r
+ wire _net_122;\r
+ wire _net_123;\r
+ wire _net_124;\r
+ wire _net_125;\r
+ wire _net_126;\r
+ wire _net_127;\r
+ wire _net_128;\r
+ wire _net_129;\r
+ wire _net_130;\r
+ wire _net_131;\r
+ wire _net_132;\r
+ wire _net_133;\r
+ wire _net_134;\r
+ wire _net_135;\r
+ wire _net_136;\r
+ wire _net_137;\r
+ wire _net_138;\r
+ wire _net_139;\r
+ wire _net_140;\r
+ wire _net_141;\r
+ wire _net_142;\r
+ wire _net_143;\r
+ wire _net_144;\r
+ wire _net_145;\r
+ wire _net_146;\r
+ wire _net_147;\r
+ wire _net_148;\r
+ wire _net_149;\r
+ wire _net_150;\r
+ wire _net_151;\r
+ wire _net_152;\r
+ wire _net_153;\r
+ wire _net_154;\r
+ wire _net_155;\r
+ wire _net_156;\r
+ wire _net_157;\r
+ wire _net_158;\r
+ wire _net_159;\r
font_rom U_FONT_ROM (.p_reset(p_reset), .m_clock(m_clock), .fi_font_read(_U_FONT_ROM_fi_font_read), .o_font_data(_U_FONT_ROM_o_font_data), .i_code_num(_U_FONT_ROM_i_code_num));\r
\r
assign w_code_num = i_code_num;\r
assign w_font_data = _U_FONT_ROM_o_font_data;\r
- assign w_word_adrs = i_word_adrs;\r
+ assign w_word_adrs = ((_net_78)?6'b000000:6'b0)|\r
+ ((_net_59|_net_39)?i_word_adrs:6'b0);\r
assign w_line_adrs = i_line_adrs;\r
assign w_vram_adrs = (w_line_value)+({8'b00000000,w_word_adrs});\r
- assign fs_font_read = _net_15;\r
- assign fs_adrs_exec = _net_16;\r
- assign w_line_value = ((_net_78)?14'b10010001000000:14'b0)|\r
- ((_net_77)?14'b00000000000000:14'b0)|\r
- ((_net_75)?14'b00000101000000:14'b0)|\r
- ((_net_73)?14'b00001010000000:14'b0)|\r
- ((_net_71)?14'b00001111000000:14'b0)|\r
- ((_net_69)?14'b00010100000000:14'b0)|\r
- ((_net_67)?14'b00011001000000:14'b0)|\r
- ((_net_65)?14'b00011110000000:14'b0)|\r
- ((_net_63)?14'b00100011000000:14'b0)|\r
- ((_net_61)?14'b00101000000000:14'b0)|\r
- ((_net_59)?14'b00101101000000:14'b0)|\r
- ((_net_57)?14'b00110010000000:14'b0)|\r
- ((_net_55)?14'b00110111000000:14'b0)|\r
- ((_net_53)?14'b00111100000000:14'b0)|\r
- ((_net_51)?14'b01000001000000:14'b0)|\r
- ((_net_49)?14'b01000110000000:14'b0)|\r
- ((_net_47)?14'b01001011000000:14'b0)|\r
- ((_net_45)?14'b01010000000000:14'b0)|\r
- ((_net_43)?14'b01010101000000:14'b0)|\r
- ((_net_41)?14'b01011010000000:14'b0)|\r
- ((_net_39)?14'b01011111000000:14'b0)|\r
- ((_net_37)?14'b01100100000000:14'b0)|\r
- ((_net_35)?14'b01101001000000:14'b0)|\r
- ((_net_33)?14'b01101110000000:14'b0)|\r
- ((_net_31)?14'b01110011000000:14'b0)|\r
- ((_net_29)?14'b01111000000000:14'b0)|\r
- ((_net_27)?14'b01111101000000:14'b0)|\r
- ((_net_25)?14'b10000010000000:14'b0)|\r
- ((_net_23)?14'b10000111000000:14'b0)|\r
- ((_net_21)?14'b10001100000000:14'b0);\r
- assign _net_2 = (r_cnt)+(3'b001);\r
+ assign fs_font_read = _net_38;\r
+ assign fs_adrs_exec = _net_78|_net_59|_net_39;\r
+ assign fs_complete_call = _reg_83|_reg_64|_reg_45|_reg_23;\r
+ assign w_line_value = ((_net_159)?14'b10010001000000:14'b0)|\r
+ ((_net_158)?14'b00000000000000:14'b0)|\r
+ ((_net_156)?14'b00000101000000:14'b0)|\r
+ ((_net_154)?14'b00001010000000:14'b0)|\r
+ ((_net_152)?14'b00001111000000:14'b0)|\r
+ ((_net_150)?14'b00010100000000:14'b0)|\r
+ ((_net_148)?14'b00011001000000:14'b0)|\r
+ ((_net_146)?14'b00011110000000:14'b0)|\r
+ ((_net_144)?14'b00100011000000:14'b0)|\r
+ ((_net_142)?14'b00101000000000:14'b0)|\r
+ ((_net_140)?14'b00101101000000:14'b0)|\r
+ ((_net_138)?14'b00110010000000:14'b0)|\r
+ ((_net_136)?14'b00110111000000:14'b0)|\r
+ ((_net_134)?14'b00111100000000:14'b0)|\r
+ ((_net_132)?14'b01000001000000:14'b0)|\r
+ ((_net_130)?14'b01000110000000:14'b0)|\r
+ ((_net_128)?14'b01001011000000:14'b0)|\r
+ ((_net_126)?14'b01010000000000:14'b0)|\r
+ ((_net_124)?14'b01010101000000:14'b0)|\r
+ ((_net_122)?14'b01011010000000:14'b0)|\r
+ ((_net_120)?14'b01011111000000:14'b0)|\r
+ ((_net_118)?14'b01100100000000:14'b0)|\r
+ ((_net_116)?14'b01101001000000:14'b0)|\r
+ ((_net_114)?14'b01101110000000:14'b0)|\r
+ ((_net_112)?14'b01110011000000:14'b0)|\r
+ ((_net_110)?14'b01111000000000:14'b0)|\r
+ ((_net_108)?14'b01111101000000:14'b0)|\r
+ ((_net_106)?14'b10000010000000:14'b0)|\r
+ ((_net_104)?14'b10000111000000:14'b0)|\r
+ ((_net_102)?14'b10001100000000:14'b0);\r
+ assign _net_10 = (r_cnt)+(14'b00000000000001);\r
+ assign _net_13 = (r_cnt)+(14'b00000000000001);\r
+ assign _net_16 = (r_cnt)+(14'b00000000000001);\r
+ assign _net_19 = (r_cnt)+(14'b00000000000001);\r
assign _U_FONT_ROM_i_code_num = w_code_num;\r
assign _U_FONT_ROM_fi_font_read = fs_font_read;\r
- assign _net_7 = (_net_2) <= (3'b111);\r
- assign _reg_3_goto = _net_8;\r
- assign _net_8 = _reg_3&_net_7;\r
- assign _reg_4_goin = _net_9;\r
- assign _net_9 = _reg_3&_net_7;\r
- assign _net_10 = ~((r_cnt) <= (3'b111));\r
- assign _reg_4_goto = _net_11;\r
- assign _net_11 = _reg_4&_net_10;\r
- assign _net_12 = _reg_4&(~_net_10);\r
- assign _net_13 = _reg_4&(~_net_10);\r
- assign _net_14 = _reg_4&(~_net_10);\r
- assign _net_15 = fi_write_word|_reg_6;\r
- assign _net_16 = fi_write_word|_reg_6;\r
- assign _net_17 = fi_write_word|_reg_5|_reg_6;\r
- assign _net_18 = _reg_4_goin|_reg_4|_reg_5;\r
- assign _net_19 = _reg_4_goin|_reg_3|_reg_4;\r
- assign _net_20 = (w_line_adrs)==(5'b11100);\r
- assign _net_21 = fs_adrs_exec&_net_20;\r
- assign _net_22 = (w_line_adrs)==(5'b11011);\r
- assign _net_23 = fs_adrs_exec&_net_22;\r
- assign _net_24 = (w_line_adrs)==(5'b11010);\r
- assign _net_25 = fs_adrs_exec&_net_24;\r
- assign _net_26 = (w_line_adrs)==(5'b11001);\r
- assign _net_27 = fs_adrs_exec&_net_26;\r
- assign _net_28 = (w_line_adrs)==(5'b11000);\r
- assign _net_29 = fs_adrs_exec&_net_28;\r
- assign _net_30 = (w_line_adrs)==(5'b10111);\r
- assign _net_31 = fs_adrs_exec&_net_30;\r
- assign _net_32 = (w_line_adrs)==(5'b10110);\r
- assign _net_33 = fs_adrs_exec&_net_32;\r
- assign _net_34 = (w_line_adrs)==(5'b10101);\r
- assign _net_35 = fs_adrs_exec&_net_34;\r
- assign _net_36 = (w_line_adrs)==(5'b10100);\r
- assign _net_37 = fs_adrs_exec&_net_36;\r
- assign _net_38 = (w_line_adrs)==(5'b10011);\r
- assign _net_39 = fs_adrs_exec&_net_38;\r
- assign _net_40 = (w_line_adrs)==(5'b10010);\r
- assign _net_41 = fs_adrs_exec&_net_40;\r
- assign _net_42 = (w_line_adrs)==(5'b10001);\r
- assign _net_43 = fs_adrs_exec&_net_42;\r
- assign _net_44 = (w_line_adrs)==(5'b10000);\r
- assign _net_45 = fs_adrs_exec&_net_44;\r
- assign _net_46 = (w_line_adrs)==(5'b01111);\r
- assign _net_47 = fs_adrs_exec&_net_46;\r
- assign _net_48 = (w_line_adrs)==(5'b01110);\r
- assign _net_49 = fs_adrs_exec&_net_48;\r
- assign _net_50 = (w_line_adrs)==(5'b01101);\r
- assign _net_51 = fs_adrs_exec&_net_50;\r
- assign _net_52 = (w_line_adrs)==(5'b01100);\r
- assign _net_53 = fs_adrs_exec&_net_52;\r
- assign _net_54 = (w_line_adrs)==(5'b01011);\r
- assign _net_55 = fs_adrs_exec&_net_54;\r
- assign _net_56 = (w_line_adrs)==(5'b01010);\r
- assign _net_57 = fs_adrs_exec&_net_56;\r
- assign _net_58 = (w_line_adrs)==(5'b01001);\r
- assign _net_59 = fs_adrs_exec&_net_58;\r
- assign _net_60 = (w_line_adrs)==(5'b01000);\r
- assign _net_61 = fs_adrs_exec&_net_60;\r
- assign _net_62 = (w_line_adrs)==(5'b00111);\r
- assign _net_63 = fs_adrs_exec&_net_62;\r
- assign _net_64 = (w_line_adrs)==(5'b00110);\r
- assign _net_65 = fs_adrs_exec&_net_64;\r
- assign _net_66 = (w_line_adrs)==(5'b00101);\r
- assign _net_67 = fs_adrs_exec&_net_66;\r
- assign _net_68 = (w_line_adrs)==(5'b00100);\r
- assign _net_69 = fs_adrs_exec&_net_68;\r
- assign _net_70 = (w_line_adrs)==(5'b00011);\r
- assign _net_71 = fs_adrs_exec&_net_70;\r
- assign _net_72 = (w_line_adrs)==(5'b00010);\r
- assign _net_73 = fs_adrs_exec&_net_72;\r
- assign _net_74 = (w_line_adrs)==(5'b00001);\r
- assign _net_75 = fs_adrs_exec&_net_74;\r
- assign _net_76 = (w_line_adrs)==(5'b00000);\r
- assign _net_77 = fs_adrs_exec&_net_76;\r
- assign _net_78 = ((((((((((((((((((((((((((((fs_adrs_exec&(~_net_20))&(~_net_22))&(~_net_24))&(~_net_26))&(~_net_28))&(~_net_30))&(~_net_32))&(~_net_34))&(~_net_36))&(~_net_38))&(~_net_40))&(~_net_42))&(~_net_44))&(~_net_46))&(~_net_48))&(~_net_50))&(~_net_52))&(~_net_54))&(~_net_56))&(~_net_58))&(~_net_60))&(~_net_62))&(~_net_64))&(~_net_66))&(~_net_68))&(~_net_70))&(~_net_72))&(~_net_74))&(~_net_76);\r
- assign o_vram_adrs = r_start_adrs;\r
- assign o_vram_wdata = r_word[63:56];\r
- assign fo_write_vram = _net_12;\r
+ assign _net_20 = ((((fi_write_word|fi_delete_word)|fi_delete_line)|fi_delete_display)|fi_slide_line)|busy_flag;\r
+ assign _net_21 = (((fi_write_word|fi_delete_word)|fi_delete_line)|fi_delete_display)|fi_slide_line;\r
+ assign _net_22 = (~_net_21)&fs_complete_call;\r
+ assign _net_29 = (_net_10) <= (14'b00000000000111);\r
+ assign _reg_24_goto = _net_30;\r
+ assign _net_30 = _reg_24&_net_29;\r
+ assign _reg_26_goin = _net_31;\r
+ assign _net_31 = _reg_24&_net_29;\r
+ assign _net_32 = ~((r_cnt) <= (14'b00000000000111));\r
+ assign _reg_26_goto = _net_33;\r
+ assign _net_33 = _reg_26&_net_32;\r
+ assign _reg_23_goin = _net_34;\r
+ assign _net_34 = _reg_26&_net_32;\r
+ assign _net_35 = _reg_26&(~_net_32);\r
+ assign _net_36 = _reg_26&(~_net_32);\r
+ assign _net_37 = _reg_26&(~_net_32);\r
+ assign _net_38 = fi_write_word|_reg_28;\r
+ assign _net_39 = fi_write_word|_reg_28;\r
+ assign _net_40 = fi_write_word|_reg_27|_reg_28;\r
+ assign _net_41 = _reg_26_goin|_reg_26|_reg_27;\r
+ assign _net_42 = _reg_26_goin|_reg_25|_reg_26;\r
+ assign _net_43 = _reg_26_goin|_reg_24|_reg_25;\r
+ assign _net_44 = _reg_23_goin|_reg_23|_reg_24;\r
+ assign _net_50 = (_net_13) <= (14'b00000000000111);\r
+ assign _reg_46_goto = _net_51;\r
+ assign _net_51 = _reg_46&_net_50;\r
+ assign _reg_47_goin = _net_52;\r
+ assign _net_52 = _reg_46&_net_50;\r
+ assign _net_53 = ~((r_cnt) <= (14'b00000000000111));\r
+ assign _reg_47_goto = _net_54;\r
+ assign _net_54 = _reg_47&_net_53;\r
+ assign _reg_45_goin = _net_55;\r
+ assign _net_55 = _reg_47&_net_53;\r
+ assign _net_56 = _reg_47&(~_net_53);\r
+ assign _net_57 = _reg_47&(~_net_53);\r
+ assign _net_58 = _reg_47&(~_net_53);\r
+ assign _net_59 = fi_delete_word|_reg_49;\r
+ assign _net_60 = fi_delete_word|_reg_48|_reg_49;\r
+ assign _net_61 = _reg_47_goin|_reg_47|_reg_48;\r
+ assign _net_62 = _reg_47_goin|_reg_46|_reg_47;\r
+ assign _net_63 = _reg_45_goin|_reg_45|_reg_46;\r
+ assign _net_69 = (_net_16) < (14'b00000101000000);\r
+ assign _reg_65_goto = _net_70;\r
+ assign _net_70 = _reg_65&_net_69;\r
+ assign _reg_66_goin = _net_71;\r
+ assign _net_71 = _reg_65&_net_69;\r
+ assign _net_72 = ~((r_cnt) < (14'b00000101000000));\r
+ assign _reg_66_goto = _net_73;\r
+ assign _net_73 = _reg_66&_net_72;\r
+ assign _reg_64_goin = _net_74;\r
+ assign _net_74 = _reg_66&_net_72;\r
+ assign _net_75 = _reg_66&(~_net_72);\r
+ assign _net_76 = _reg_66&(~_net_72);\r
+ assign _net_77 = _reg_66&(~_net_72);\r
+ assign _net_78 = fi_delete_line|_reg_68;\r
+ assign _net_79 = fi_delete_line|_reg_67|_reg_68;\r
+ assign _net_80 = _reg_66_goin|_reg_66|_reg_67;\r
+ assign _net_81 = _reg_66_goin|_reg_65|_reg_66;\r
+ assign _net_82 = _reg_64_goin|_reg_64|_reg_65;\r
+ assign _net_86 = ~((r_cnt) < (14'b10010110000000));\r
+ assign _reg_84_goto = _net_93|_net_87;\r
+ assign _net_87 = _reg_84&_net_86;\r
+ assign _reg_83_goin = _net_88;\r
+ assign _net_88 = _reg_84&_net_86;\r
+ assign _net_89 = _reg_84&(~_net_86);\r
+ assign _net_90 = _reg_84&(~_net_86);\r
+ assign _net_91 = (_net_19) < (14'b10010110000000);\r
+ assign _net_92 = _reg_84&(~_net_86);\r
+ assign _net_93 = (_reg_84&(~_net_86))&_net_91;\r
+ assign _reg_84_goin = _net_94;\r
+ assign _net_94 = (_reg_84&(~_net_86))&_net_91;\r
+ assign _net_95 = _reg_84&(~_net_86);\r
+ assign _net_96 = _reg_84&(~_net_86);\r
+ assign _net_97 = _reg_84&(~_net_86);\r
+ assign _net_98 = fi_delete_display|_reg_85;\r
+ assign _net_99 = (_reg_84_goin|fi_delete_display)|_reg_84|_reg_85;\r
+ assign _net_100 = _reg_83_goin|_reg_83|_reg_84;\r
+ assign _net_101 = (w_line_adrs)==(5'b11100);\r
+ assign _net_102 = fs_adrs_exec&_net_101;\r
+ assign _net_103 = (w_line_adrs)==(5'b11011);\r
+ assign _net_104 = fs_adrs_exec&_net_103;\r
+ assign _net_105 = (w_line_adrs)==(5'b11010);\r
+ assign _net_106 = fs_adrs_exec&_net_105;\r
+ assign _net_107 = (w_line_adrs)==(5'b11001);\r
+ assign _net_108 = fs_adrs_exec&_net_107;\r
+ assign _net_109 = (w_line_adrs)==(5'b11000);\r
+ assign _net_110 = fs_adrs_exec&_net_109;\r
+ assign _net_111 = (w_line_adrs)==(5'b10111);\r
+ assign _net_112 = fs_adrs_exec&_net_111;\r
+ assign _net_113 = (w_line_adrs)==(5'b10110);\r
+ assign _net_114 = fs_adrs_exec&_net_113;\r
+ assign _net_115 = (w_line_adrs)==(5'b10101);\r
+ assign _net_116 = fs_adrs_exec&_net_115;\r
+ assign _net_117 = (w_line_adrs)==(5'b10100);\r
+ assign _net_118 = fs_adrs_exec&_net_117;\r
+ assign _net_119 = (w_line_adrs)==(5'b10011);\r
+ assign _net_120 = fs_adrs_exec&_net_119;\r
+ assign _net_121 = (w_line_adrs)==(5'b10010);\r
+ assign _net_122 = fs_adrs_exec&_net_121;\r
+ assign _net_123 = (w_line_adrs)==(5'b10001);\r
+ assign _net_124 = fs_adrs_exec&_net_123;\r
+ assign _net_125 = (w_line_adrs)==(5'b10000);\r
+ assign _net_126 = fs_adrs_exec&_net_125;\r
+ assign _net_127 = (w_line_adrs)==(5'b01111);\r
+ assign _net_128 = fs_adrs_exec&_net_127;\r
+ assign _net_129 = (w_line_adrs)==(5'b01110);\r
+ assign _net_130 = fs_adrs_exec&_net_129;\r
+ assign _net_131 = (w_line_adrs)==(5'b01101);\r
+ assign _net_132 = fs_adrs_exec&_net_131;\r
+ assign _net_133 = (w_line_adrs)==(5'b01100);\r
+ assign _net_134 = fs_adrs_exec&_net_133;\r
+ assign _net_135 = (w_line_adrs)==(5'b01011);\r
+ assign _net_136 = fs_adrs_exec&_net_135;\r
+ assign _net_137 = (w_line_adrs)==(5'b01010);\r
+ assign _net_138 = fs_adrs_exec&_net_137;\r
+ assign _net_139 = (w_line_adrs)==(5'b01001);\r
+ assign _net_140 = fs_adrs_exec&_net_139;\r
+ assign _net_141 = (w_line_adrs)==(5'b01000);\r
+ assign _net_142 = fs_adrs_exec&_net_141;\r
+ assign _net_143 = (w_line_adrs)==(5'b00111);\r
+ assign _net_144 = fs_adrs_exec&_net_143;\r
+ assign _net_145 = (w_line_adrs)==(5'b00110);\r
+ assign _net_146 = fs_adrs_exec&_net_145;\r
+ assign _net_147 = (w_line_adrs)==(5'b00101);\r
+ assign _net_148 = fs_adrs_exec&_net_147;\r
+ assign _net_149 = (w_line_adrs)==(5'b00100);\r
+ assign _net_150 = fs_adrs_exec&_net_149;\r
+ assign _net_151 = (w_line_adrs)==(5'b00011);\r
+ assign _net_152 = fs_adrs_exec&_net_151;\r
+ assign _net_153 = (w_line_adrs)==(5'b00010);\r
+ assign _net_154 = fs_adrs_exec&_net_153;\r
+ assign _net_155 = (w_line_adrs)==(5'b00001);\r
+ assign _net_156 = fs_adrs_exec&_net_155;\r
+ assign _net_157 = (w_line_adrs)==(5'b00000);\r
+ assign _net_158 = fs_adrs_exec&_net_157;\r
+ assign _net_159 = ((((((((((((((((((((((((((((fs_adrs_exec&(~_net_101))&(~_net_103))&(~_net_105))&(~_net_107))&(~_net_109))&(~_net_111))&(~_net_113))&(~_net_115))&(~_net_117))&(~_net_119))&(~_net_121))&(~_net_123))&(~_net_125))&(~_net_127))&(~_net_129))&(~_net_131))&(~_net_133))&(~_net_135))&(~_net_137))&(~_net_139))&(~_net_141))&(~_net_143))&(~_net_145))&(~_net_147))&(~_net_149))&(~_net_151))&(~_net_153))&(~_net_155))&(~_net_157);\r
+ assign o_vram_adrs = ((_net_97)?r_cnt:14'b0)|\r
+ ((_net_77|_net_58|_net_37|_reg_25)?r_start_adrs:14'b0);\r
+ assign o_vram_wdata = ((_net_96|_net_76|_net_57|_net_36)?8'b00000000:8'b0)|\r
+ ((_reg_25)?r_word[63:56]:8'b0);\r
+ assign fo_write_vram = _net_95|_net_75|_net_56|_net_35|_reg_25;\r
assign fo_read_vram = 1'b0;\r
- assign fo_complete_call = 1'b0;\r
+ assign busy_call = _net_20;\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_word <= 64'b0000000000000000000000000000000000000000000000000000000000000000;\r
-else if ((_net_15)|(_reg_3)) \r
- r_word <= ((_net_15) ?w_font_data:64'b0)|\r
- ((_reg_3) ?(r_word)<<(8):64'b0);\r
+else if ((_net_38)|(_reg_24)) \r
+ r_word <= ((_net_38) ?w_font_data:64'b0)|\r
+ ((_reg_24) ?(r_word)<<(8):64'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_start_adrs <= 14'b00000000000000;\r
-else if ((_net_16)|(_reg_3)) \r
- r_start_adrs <= ((_net_16) ?w_vram_adrs:14'b0)|\r
- ((_reg_3) ?(r_start_adrs)+(14'b00000000101000):14'b0);\r
+else if ((_reg_65)|(_net_78|_net_59|_net_39)|(_reg_46|_reg_24)) \r
+ r_start_adrs <= ((_reg_65) ?(r_start_adrs)+(14'b00000000000001):14'b0)|\r
+ ((_net_78|_net_59|_net_39) ?w_vram_adrs:14'b0)|\r
+ ((_reg_46|_reg_24) ?(r_start_adrs)+(14'b00000000101000):14'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- r_cnt <= 3'b000;\r
-else if ((_reg_5)|(_reg_3)) \r
- r_cnt <= ((_reg_5) ?3'b000:3'b0)|\r
- ((_reg_3) ?_net_2:3'b0);\r
+ r_cnt <= 14'b00000000000000;\r
+else if ((_net_89)|(_reg_65)|(_reg_46)|(_net_98|_reg_67|_reg_48|_reg_27)|(_reg_24)) \r
+ r_cnt <= ((_net_89) ?_net_19:14'b0)|\r
+ ((_reg_65) ?_net_16:14'b0)|\r
+ ((_reg_46) ?_net_13:14'b0)|\r
+ ((_net_98|_reg_67|_reg_48|_reg_27) ?14'b00000000000000:14'b0)|\r
+ ((_reg_24) ?_net_10:14'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_3 <= 1'b0;\r
-else if ((_net_19)) \r
- _reg_3 <= _reg_4&(~_reg_4_goto);\r
+ busy_flag <= 1'b0;\r
+else if ((_net_22)|(_net_21)) \r
+ busy_flag <= ((_net_22) ?1'b0:1'b0)|\r
+ ((_net_21) ?1'b1:1'b0);\r
+\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_23 <= 1'b0;\r
+else if ((_net_44)) \r
+ _reg_23 <= _reg_23_goin|(_reg_24&(~_reg_24_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_24 <= 1'b0;\r
+else if ((_net_43)) \r
+ _reg_24 <= _reg_25;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_25 <= 1'b0;\r
+else if ((_net_42)) \r
+ _reg_25 <= _reg_26&(~_reg_26_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_26 <= 1'b0;\r
+else if ((_net_41)) \r
+ _reg_26 <= _reg_26_goin|_reg_27;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_27 <= 1'b0;\r
+else if ((_net_40)) \r
+ _reg_27 <= _reg_28|fi_write_word;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_28 <= 1'b0;\r
+else if ((_reg_28)) \r
+ _reg_28 <= 1'b0;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_45 <= 1'b0;\r
+else if ((_net_63)) \r
+ _reg_45 <= _reg_45_goin|(_reg_46&(~_reg_46_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_46 <= 1'b0;\r
+else if ((_net_62)) \r
+ _reg_46 <= _reg_47&(~_reg_47_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_47 <= 1'b0;\r
+else if ((_net_61)) \r
+ _reg_47 <= _reg_47_goin|_reg_48;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_48 <= 1'b0;\r
+else if ((_net_60)) \r
+ _reg_48 <= _reg_49|fi_delete_word;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_49 <= 1'b0;\r
+else if ((_reg_49)) \r
+ _reg_49 <= 1'b0;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_64 <= 1'b0;\r
+else if ((_net_82)) \r
+ _reg_64 <= _reg_64_goin|(_reg_65&(~_reg_65_goto));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_65 <= 1'b0;\r
+else if ((_net_81)) \r
+ _reg_65 <= _reg_66&(~_reg_66_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_66 <= 1'b0;\r
+else if ((_net_80)) \r
+ _reg_66 <= _reg_66_goin|_reg_67;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_67 <= 1'b0;\r
+else if ((_net_79)) \r
+ _reg_67 <= _reg_68|fi_delete_line;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_68 <= 1'b0;\r
+else if ((_reg_68)) \r
+ _reg_68 <= 1'b0;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_4 <= 1'b0;\r
-else if ((_net_18)) \r
- _reg_4 <= _reg_4_goin|_reg_5;\r
+ _reg_83 <= 1'b0;\r
+else if ((_net_100)) \r
+ _reg_83 <= _reg_83_goin|(_reg_84&(~_reg_84_goto));\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_5 <= 1'b0;\r
-else if ((_net_17)) \r
- _reg_5 <= _reg_6|fi_write_word;\r
+ _reg_84 <= 1'b0;\r
+else if ((_net_99)) \r
+ _reg_84 <= (_reg_84_goin|_reg_85)|fi_delete_display;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_6 <= 1'b0;\r
-else if ((_reg_6)) \r
- _reg_6 <= 1'b0;\r
+ _reg_85 <= 1'b0;\r
+else if ((_reg_85)) \r
+ _reg_85 <= 1'b0;\r
end\r
endmodule\r
/*\r
- Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 10:05:43 2011\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 20:24:31 2011\r
Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp \r
*/\r
/*\r
- Produced by NSL Core(version=20110302), IP ARCH, Inc. Sat Aug 20 23:09:32 2011\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 23:25:37 2011\r
Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp :NON PROFIT USER:\r
*/\r
\r
end\r
endmodule\r
/*\r
- Produced by NSL Core(version=20110302), IP ARCH, Inc. Sat Aug 20 23:09:36 2011\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 23:25:42 2011\r
Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp \r
*/\r
\r
wire fs_vram_cnt_inc;\r
reg [7:0] r_wradrs1;\r
reg [7:0] r_wradrs2;\r
+ wire test_write;\r
+ reg [25:0] r_wait_cnt;\r
+ reg [25:0] r_wait_val;\r
+ reg p_wait;\r
wire [13:0] _net_57;\r
wire [13:0] _net_60;\r
wire [13:0] _net_63;\r
wire [13:0] _net_66;\r
wire [13:0] _net_69;\r
+ wire _proc_p_wait_set;\r
+ wire _proc_p_wait_reset;\r
+ wire _net_70;\r
wire _u_VGA_i_clk50M;\r
wire _u_VGA_m_clock;\r
wire _u_VGA_p_reset;\r
wire _u_EXP_fi_Wr_req;\r
wire _u_EXP_p_reset;\r
wire _u_EXP_m_clock;\r
- wire _net_70;\r
+ wire [5:0] _u_FROMC_i_word_adrs;\r
+ wire [4:0] _u_FROMC_i_line_adrs;\r
+ wire [7:0] _u_FROMC_i_code_num;\r
+ wire _u_FROMC_fi_write_word;\r
+ wire _u_FROMC_fi_delete_word;\r
+ wire _u_FROMC_fi_delete_line;\r
+ wire _u_FROMC_fi_delete_display;\r
+ wire _u_FROMC_fi_slide_line;\r
+ wire [13:0] _u_FROMC_o_vram_adrs;\r
+ wire [7:0] _u_FROMC_o_vram_wdata;\r
+ wire [7:0] _u_FROMC_i_vram_rdata;\r
+ wire _u_FROMC_fo_write_vram;\r
+ wire _u_FROMC_fo_read_vram;\r
+ wire _u_FROMC_busy_call;\r
+ wire _u_FROMC_p_reset;\r
+ wire _u_FROMC_m_clock;\r
wire _net_71;\r
wire _net_72;\r
wire _net_73;\r
wire _net_74;\r
wire _net_75;\r
wire _net_76;\r
- reg _reg_77;\r
- reg _reg_78;\r
- reg _reg_79;\r
- reg _reg_80;\r
+ wire _net_77;\r
+ wire _net_78;\r
+ wire _net_79;\r
+ wire _net_80;\r
reg _reg_81;\r
reg _reg_82;\r
reg _reg_83;\r
reg _reg_90;\r
reg _reg_91;\r
reg _reg_92;\r
- wire _net_93;\r
- wire _reg_80_goto;\r
- wire _net_94;\r
- wire _reg_83_goin;\r
- wire _net_95;\r
- wire _net_96;\r
- wire _reg_83_goto;\r
+ reg _reg_93;\r
+ reg _reg_94;\r
+ reg _reg_95;\r
+ reg _reg_96;\r
wire _net_97;\r
- wire _reg_79_goin;\r
+ wire _reg_84_goto;\r
wire _net_98;\r
+ wire _reg_87_goin;\r
wire _net_99;\r
wire _net_100;\r
+ wire _reg_87_goto;\r
wire _net_101;\r
- wire _reg_86_goto;\r
+ wire _reg_83_goin;\r
wire _net_102;\r
- wire _reg_89_goin;\r
wire _net_103;\r
wire _net_104;\r
- wire _reg_89_goto;\r
wire _net_105;\r
- wire _reg_85_goin;\r
+ wire _reg_90_goto;\r
wire _net_106;\r
+ wire _reg_93_goin;\r
wire _net_107;\r
wire _net_108;\r
+ wire _reg_93_goto;\r
wire _net_109;\r
- wire _reg_91_goto;\r
+ wire _reg_89_goin;\r
wire _net_110;\r
- wire _reg_90_goin;\r
wire _net_111;\r
wire _net_112;\r
wire _net_113;\r
+ wire _reg_95_goto;\r
wire _net_114;\r
+ wire _reg_94_goin;\r
wire _net_115;\r
wire _net_116;\r
- wire _reg_91_goin;\r
wire _net_117;\r
wire _net_118;\r
wire _net_119;\r
wire _net_120;\r
+ wire _reg_95_goin;\r
wire _net_121;\r
wire _net_122;\r
wire _net_123;\r
wire _net_134;\r
wire _net_135;\r
wire _net_136;\r
- reg _reg_137;\r
- reg _reg_138;\r
- reg _reg_139;\r
- reg _reg_140;\r
+ wire _net_137;\r
+ wire _net_138;\r
+ wire _net_139;\r
+ wire _net_140;\r
reg _reg_141;\r
reg _reg_142;\r
- wire _net_143;\r
- wire _reg_138_goto;\r
- wire _net_144;\r
- wire _reg_141_goin;\r
- wire _net_145;\r
- wire _net_146;\r
- wire _reg_141_goto;\r
+ reg _reg_143;\r
+ reg _reg_144;\r
+ reg _reg_145;\r
+ reg _reg_146;\r
wire _net_147;\r
- wire _reg_137_goin;\r
+ wire _reg_142_goto;\r
wire _net_148;\r
+ wire _reg_145_goin;\r
wire _net_149;\r
wire _net_150;\r
+ wire _reg_145_goto;\r
wire _net_151;\r
+ wire _reg_141_goin;\r
wire _net_152;\r
wire _net_153;\r
wire _net_154;\r
wire _net_155;\r
wire _net_156;\r
- reg _reg_157;\r
- reg _reg_158;\r
- reg _reg_159;\r
- reg _reg_160;\r
+ wire _net_157;\r
+ wire _net_158;\r
+ wire _net_159;\r
+ wire _net_160;\r
reg _reg_161;\r
reg _reg_162;\r
reg _reg_163;\r
- wire _net_164;\r
- wire _reg_159_goto;\r
- wire _net_165;\r
- wire _reg_162_goin;\r
- wire _net_166;\r
- wire _net_167;\r
- wire _reg_162_goto;\r
+ reg _reg_164;\r
+ reg _reg_165;\r
+ reg _reg_166;\r
+ reg _reg_167;\r
wire _net_168;\r
- wire _reg_158_goin;\r
+ wire _reg_163_goto;\r
wire _net_169;\r
+ wire _reg_166_goin;\r
wire _net_170;\r
wire _net_171;\r
+ wire _reg_166_goto;\r
wire _net_172;\r
+ wire _reg_162_goin;\r
wire _net_173;\r
wire _net_174;\r
wire _net_175;\r
wire _net_179;\r
wire _net_180;\r
wire _net_181;\r
+ wire _net_182;\r
+ wire _net_183;\r
+ wire _net_184;\r
+ wire _net_185;\r
+ wire _net_186;\r
+ wire _net_187;\r
+ wire _net_188;\r
+ wire _net_189;\r
+ reg _reg_190;\r
+ reg _reg_191;\r
+ reg _reg_192;\r
+ reg _reg_193;\r
+ reg _reg_194;\r
+ reg _reg_195;\r
+ reg _reg_196;\r
+ reg _reg_197;\r
+ reg _reg_198;\r
+ reg _reg_199;\r
+ reg _reg_200;\r
+ reg _reg_201;\r
+ reg _reg_202;\r
+ reg _reg_203;\r
+ reg _reg_204;\r
+ reg _reg_205;\r
+ reg _reg_206;\r
+ reg _reg_207;\r
+ reg _reg_208;\r
+ reg _reg_209;\r
+ reg _reg_210;\r
+ reg _reg_211;\r
+ reg _reg_212;\r
+ reg _reg_213;\r
+ reg _reg_214;\r
+ reg _reg_215;\r
+ reg _reg_216;\r
+ reg _reg_217;\r
+ reg _reg_218;\r
+ reg _reg_219;\r
+ reg _reg_220;\r
+ reg _reg_221;\r
+ reg _reg_222;\r
+ reg _reg_223;\r
+ reg _reg_224;\r
+ reg _reg_225;\r
+ reg _reg_226;\r
+ reg _reg_227;\r
+ reg _reg_228;\r
+ reg _reg_229;\r
+ reg _reg_230;\r
+ reg _reg_231;\r
+ reg _reg_232;\r
+ reg _reg_233;\r
+ reg _reg_234;\r
+ reg _reg_235;\r
+ reg _reg_236;\r
+ reg _reg_237;\r
+ reg _reg_238;\r
+ reg _reg_239;\r
+ reg _reg_240;\r
+ reg _reg_241;\r
+ reg _reg_242;\r
+ reg _reg_243;\r
+ reg _reg_244;\r
+ reg _reg_245;\r
+ reg _reg_246;\r
+ reg _reg_247;\r
+ reg _reg_248;\r
+ reg _reg_249;\r
+ reg _reg_250;\r
+ reg _reg_251;\r
+ reg _reg_252;\r
+ reg _reg_253;\r
+ reg _reg_254;\r
+ reg _reg_255;\r
+ reg _reg_256;\r
+ reg _reg_257;\r
+ reg _reg_258;\r
+ reg _reg_259;\r
+ reg _reg_260;\r
+ reg _reg_261;\r
+ reg _reg_262;\r
+ reg _reg_263;\r
+ reg _reg_264;\r
+ reg _reg_265;\r
+ reg _reg_266;\r
+ reg _reg_267;\r
+ reg _reg_268;\r
+ reg _reg_269;\r
+ reg _reg_270;\r
+ reg _reg_271;\r
+ reg _reg_272;\r
+ reg _reg_273;\r
+ reg _reg_274;\r
+ reg _reg_275;\r
+ reg _reg_276;\r
+ reg _reg_277;\r
+ reg _reg_278;\r
+ reg _reg_279;\r
+ reg _reg_280;\r
+ reg _reg_281;\r
+ reg _reg_282;\r
+ reg _reg_283;\r
+ reg _reg_284;\r
+ reg _reg_285;\r
+ reg _reg_286;\r
+ reg _reg_287;\r
+ reg _reg_288;\r
+ reg _reg_289;\r
+ reg _reg_290;\r
+ reg _reg_291;\r
+ reg _reg_292;\r
+ reg _reg_293;\r
+ reg _reg_294;\r
+ reg _reg_295;\r
+ reg _reg_296;\r
+ reg _reg_297;\r
+ reg _reg_298;\r
+ reg _reg_299;\r
+ reg _reg_300;\r
+ reg _reg_301;\r
+ reg _reg_302;\r
+ wire _net_303;\r
+ wire _net_304;\r
+ wire _net_305;\r
+ wire _net_306;\r
+ wire _net_307;\r
+ wire _net_308;\r
+ wire _net_309;\r
+ wire _net_310;\r
+ wire _net_311;\r
+ wire _net_312;\r
+ wire _net_313;\r
+ wire _net_314;\r
+ wire _net_315;\r
+ wire _net_316;\r
+ wire _net_317;\r
+ wire _net_318;\r
+ wire _net_319;\r
+ wire _net_320;\r
+ wire _net_321;\r
+ wire _net_322;\r
+ wire _net_323;\r
+ wire _net_324;\r
+ wire _net_325;\r
+ wire _net_326;\r
+ wire _net_327;\r
+ wire _net_328;\r
+ wire _net_329;\r
+ wire _net_330;\r
+ wire _net_331;\r
+ wire _net_332;\r
+ wire _net_333;\r
+ wire _net_334;\r
+ wire _net_335;\r
+ wire _net_336;\r
+ wire _net_337;\r
+ wire _net_338;\r
+ wire _net_339;\r
+ wire _net_340;\r
+ wire _net_341;\r
+ wire _net_342;\r
+ wire _net_343;\r
+ wire _net_344;\r
+ wire _net_345;\r
+ wire _net_346;\r
+ wire _net_347;\r
+ wire _net_348;\r
+ wire _net_349;\r
+ wire _net_350;\r
+ wire _net_351;\r
+ wire _net_352;\r
+ wire _net_353;\r
+ wire _net_354;\r
+ wire _net_355;\r
+ wire _net_356;\r
+ wire _net_357;\r
+ wire _net_358;\r
+ wire _net_359;\r
+ wire _net_360;\r
+ wire _net_361;\r
+ wire _net_362;\r
+ wire _net_363;\r
+ wire _net_364;\r
+ wire _net_365;\r
+ wire _net_366;\r
+ wire _net_367;\r
+ wire _net_368;\r
+ wire _net_369;\r
+ wire _net_370;\r
+ wire _net_371;\r
+ wire _net_372;\r
+ wire _net_373;\r
+ wire _net_374;\r
+ wire _net_375;\r
+ wire _net_376;\r
+ wire _net_377;\r
+ wire _net_378;\r
+ wire _net_379;\r
+ wire _net_380;\r
+ wire _net_381;\r
+ wire _net_382;\r
+ wire _net_383;\r
+ wire _net_384;\r
+ wire _net_385;\r
+ wire _net_386;\r
+ wire _net_387;\r
+ wire _net_388;\r
+ wire _net_389;\r
+ wire _net_390;\r
+ wire _net_391;\r
+ wire _net_392;\r
+ wire _net_393;\r
+ wire _net_394;\r
+ wire _net_395;\r
+ wire _net_396;\r
+ wire _net_397;\r
+ wire _net_398;\r
+ wire _net_399;\r
+ wire _net_400;\r
+ wire _net_401;\r
+ wire _net_402;\r
+ wire _net_403;\r
+ wire _net_404;\r
+ wire _net_405;\r
+ wire _net_406;\r
+ wire _net_407;\r
+ wire _net_408;\r
+ wire _net_409;\r
+ wire _net_410;\r
+ wire _net_411;\r
+ wire _net_412;\r
+ wire _net_413;\r
+ wire _net_414;\r
+ wire _net_415;\r
+ wire _net_416;\r
+ wire _net_417;\r
+ wire _net_418;\r
+ wire _net_419;\r
+ wire _net_420;\r
+ wire _net_421;\r
+ wire _net_422;\r
+ wire _net_423;\r
+ wire _net_424;\r
+ wire _net_425;\r
+ wire _net_426;\r
+ wire _net_427;\r
+ wire _net_428;\r
+ wire _net_429;\r
+ wire _net_430;\r
+ wire _net_431;\r
+ wire _net_432;\r
+ wire _net_433;\r
+ wire _net_434;\r
+ wire _net_435;\r
+ wire _net_436;\r
+ wire _net_437;\r
+ wire _net_438;\r
+ wire _net_439;\r
+ wire _net_440;\r
+ wire _net_441;\r
+ wire _net_442;\r
+ wire _net_443;\r
+ wire _net_444;\r
+ wire _net_445;\r
+ wire _net_446;\r
+ wire _net_447;\r
+ wire _net_448;\r
+ wire _net_449;\r
+ wire _net_450;\r
+ wire _net_451;\r
+ wire _net_452;\r
+ wire _net_453;\r
+ wire _net_454;\r
+ wire _net_455;\r
+ wire _net_456;\r
+ wire _net_457;\r
+ wire _net_458;\r
+ wire _net_459;\r
+ wire _net_460;\r
+ wire _net_461;\r
+ wire _net_462;\r
+ wire _net_463;\r
+ wire _net_464;\r
+ wire _net_465;\r
+ wire _net_466;\r
+ wire _net_467;\r
+ wire _net_468;\r
+ wire _net_469;\r
+ wire _net_470;\r
+ wire _net_471;\r
+ wire _net_472;\r
+ wire _net_473;\r
+ wire _net_474;\r
+ wire _net_475;\r
+ wire _net_476;\r
+ wire _net_477;\r
+ wire _net_478;\r
+ wire _net_479;\r
+ wire _net_480;\r
+ wire _net_481;\r
+ wire _net_482;\r
+ wire _net_483;\r
+ wire _net_484;\r
+ wire _net_485;\r
+ wire _net_486;\r
+ wire _net_487;\r
+ wire _net_488;\r
+ wire _net_489;\r
+ wire _net_490;\r
+ wire _net_491;\r
+ wire _net_492;\r
+ wire _net_493;\r
+ wire _net_494;\r
+ wire _net_495;\r
+ wire _net_496;\r
+ wire _net_497;\r
+ wire _net_498;\r
+ wire _net_499;\r
+ wire _net_500;\r
+ wire _net_501;\r
+ wire _net_502;\r
+ wire _net_503;\r
+ wire _net_504;\r
+ wire _net_505;\r
+ wire _net_506;\r
+ wire _net_507;\r
+ wire _net_508;\r
+ wire _net_509;\r
+ wire _net_510;\r
+ wire _net_511;\r
+ wire _net_512;\r
+ wire _net_513;\r
+ wire _net_514;\r
+ wire _net_515;\r
+ wire _net_516;\r
+ wire _net_517;\r
+ wire _net_518;\r
+ wire _net_519;\r
+ wire _net_520;\r
+ wire _net_521;\r
+ wire _net_522;\r
+ wire _net_523;\r
+ wire _net_524;\r
+ wire _net_525;\r
+ wire _net_526;\r
+ wire _net_527;\r
+ wire _net_528;\r
+ wire _net_529;\r
+ wire _net_530;\r
+ wire _net_531;\r
+ wire _net_532;\r
+ wire _net_533;\r
+ wire _net_534;\r
+ wire _net_535;\r
+ wire _net_536;\r
+ wire _net_537;\r
+ wire _net_538;\r
+ wire _net_539;\r
+ wire _net_540;\r
+ wire _net_541;\r
+ wire _net_542;\r
+ wire _net_543;\r
+ wire _net_544;\r
+ wire _net_545;\r
+ wire _net_546;\r
+ wire _net_547;\r
+ wire _net_548;\r
+ wire _net_549;\r
+ wire _net_550;\r
+ wire _net_551;\r
+ wire _net_552;\r
+ wire _net_553;\r
+ wire _net_554;\r
+ wire _net_555;\r
+ wire _net_556;\r
+ wire _net_557;\r
+ wire _net_558;\r
+ wire _net_559;\r
+ wire _net_560;\r
+ wire _net_561;\r
+ wire _net_562;\r
+ wire _net_563;\r
+ wire _net_564;\r
+ wire _net_565;\r
+ wire _net_566;\r
+ wire _net_567;\r
+ wire _net_568;\r
+ wire _net_569;\r
+ wire _net_570;\r
+ wire _net_571;\r
+ wire _net_572;\r
+ wire _net_573;\r
+ wire _net_574;\r
+ wire _net_575;\r
+ wire _net_576;\r
+ wire _net_577;\r
+ wire _net_578;\r
+ wire _net_579;\r
+ wire _net_580;\r
+ wire _net_581;\r
+ wire _net_582;\r
+ wire _net_583;\r
+ wire _net_584;\r
+ wire _net_585;\r
+ wire _net_586;\r
+ wire _net_587;\r
+ wire _net_588;\r
+ wire _net_589;\r
+ wire _net_590;\r
+ wire _net_591;\r
+ wire _net_592;\r
+ wire _net_593;\r
+ wire _net_594;\r
+ wire _net_595;\r
+ wire _net_596;\r
+ wire _net_597;\r
+ wire _net_598;\r
+ wire _net_599;\r
+ wire _net_600;\r
+ wire _net_601;\r
+ wire _net_602;\r
+ wire _net_603;\r
+ wire _net_604;\r
+ wire _net_605;\r
+ wire _net_606;\r
+ wire _net_607;\r
+ wire _net_608;\r
+ wire _net_609;\r
+ wire _net_610;\r
+ wire _net_611;\r
+ wire _net_612;\r
+ wire _net_613;\r
+ wire _net_614;\r
+ wire _net_615;\r
+ wire _net_616;\r
+ wire _net_617;\r
+ wire _net_618;\r
+ wire _net_619;\r
+ wire _net_620;\r
+ wire _net_621;\r
+ wire _net_622;\r
+ wire _net_623;\r
+ wire _net_624;\r
+ wire _net_625;\r
+ wire _net_626;\r
+ wire _net_627;\r
+ wire _net_628;\r
+ wire _net_629;\r
+ wire _net_630;\r
+ wire _net_631;\r
+ wire _net_632;\r
+ wire _net_633;\r
+ wire _net_634;\r
+ wire _net_635;\r
+ wire _net_636;\r
+ wire _net_637;\r
+ wire _net_638;\r
+ wire _net_639;\r
+ wire _net_640;\r
+from_ctrl u_FROMC (.p_reset(p_reset), .m_clock(m_clock), .busy_call(_u_FROMC_busy_call), .fo_read_vram(_u_FROMC_fo_read_vram), .fo_write_vram(_u_FROMC_fo_write_vram), .i_vram_rdata(_u_FROMC_i_vram_rdata), .o_vram_wdata(_u_FROMC_o_vram_wdata), .o_vram_adrs(_u_FROMC_o_vram_adrs), .fi_slide_line(_u_FROMC_fi_slide_line), .fi_delete_display(_u_FROMC_fi_delete_display), .fi_delete_line(_u_FROMC_fi_delete_line), .fi_delete_word(_u_FROMC_fi_delete_word), .fi_write_word(_u_FROMC_fi_write_word), .i_code_num(_u_FROMC_i_code_num), .i_line_adrs(_u_FROMC_i_line_adrs), .i_word_adrs(_u_FROMC_i_word_adrs));\r
exp_ctrl u_EXP (.p_reset(p_reset), .m_clock(m_clock), .fi_Wr_req(_u_EXP_fi_Wr_req), .i_Wadrs(_u_EXP_i_Wadrs), .i_Wdata(_u_EXP_i_Wdata), .fo_Rd_ack(_u_EXP_fo_Rd_ack), .fi_Rd_req(_u_EXP_fi_Rd_req), .o_Rdata(_u_EXP_o_Rdata), .i_Radrs(_u_EXP_i_Radrs));\r
vga_gen u_VGA (.o_vcnt(_u_VGA_o_vcnt), .outled(_u_VGA_outled), .fi_fifo2_write(_u_VGA_fi_fifo2_write), .fi_fifo1_write(_u_VGA_fi_fifo1_write), .i_wradrs2(_u_VGA_i_wradrs2), .i_wradrs1(_u_VGA_i_wradrs1), .i_wrdata2(_u_VGA_i_wrdata2), .i_wrdata1(_u_VGA_i_wrdata1), .o_vga_b(_u_VGA_o_vga_b), .o_vga_g(_u_VGA_o_vga_g), .o_vga_r(_u_VGA_o_vga_r), .o_hsync(_u_VGA_o_hsync), .o_vsync(_u_VGA_o_vsync), .p_reset(_u_VGA_p_reset), .m_clock(_u_VGA_m_clock), .i_clk50M(_u_VGA_i_clk50M));\r
\r
- assign w_wrdata1 = ((_reg_139|_reg_87)?r_vram_rddata[7:0]:8'b0)|\r
- ((_reg_138|_reg_86)?r_vram_rddata[15:8]:8'b0);\r
- assign w_wrdata2 = ((_reg_160|_reg_81)?r_vram_rddata[7:0]:8'b0)|\r
- ((_reg_159|_reg_80)?r_vram_rddata[15:8]:8'b0);\r
+ assign w_wrdata1 = ((_reg_143|_reg_91)?r_vram_rddata[7:0]:8'b0)|\r
+ ((_reg_142|_reg_90)?r_vram_rddata[15:8]:8'b0);\r
+ assign w_wrdata2 = ((_reg_164|_reg_85)?r_vram_rddata[7:0]:8'b0)|\r
+ ((_reg_163|_reg_84)?r_vram_rddata[15:8]:8'b0);\r
assign w_wradrs1 = r_wradrs1;\r
assign w_wradrs2 = r_wradrs2;\r
- assign fs_fifo1_write = _reg_139|_reg_138|_reg_87|_reg_86;\r
- assign fs_fifo2_write = _reg_160|_reg_159|_reg_81|_reg_80;\r
- assign fs_init = _net_70;\r
- assign fs_fifo1_charge = _net_72;\r
- assign fs_fifo2_charge = _net_74;\r
- assign fs_vram_cnt_inc = _reg_157;\r
+ assign fs_fifo1_write = _reg_143|_reg_142|_reg_91|_reg_90;\r
+ assign fs_fifo2_write = _reg_164|_reg_163|_reg_85|_reg_84;\r
+ assign fs_init = _net_71;\r
+ assign fs_fifo1_charge = _net_73;\r
+ assign fs_fifo2_charge = _net_75;\r
+ assign fs_vram_cnt_inc = _reg_161;\r
+ assign test_write = 1'b0;\r
assign _net_57 = (r_init_cnt)+(14'b00000000000001);\r
assign _net_60 = (r_init_cnt)+(14'b00000000000001);\r
assign _net_63 = (r_init_cnt)+(14'b00000000000001);\r
assign _net_66 = (r_init_cnt)+(14'b00000000000001);\r
assign _net_69 = (r_init_cnt)+(14'b00000000000001);\r
+ assign _proc_p_wait_set = _net_527|_net_525|_net_523|_net_521|_net_519|_reg_296|_reg_294|_reg_292|_reg_290|_reg_288|_reg_286|_reg_284|_reg_282|_reg_280|_reg_278|_reg_276|_reg_274|_reg_272|_net_465|_net_463|_reg_268|_reg_266|_reg_264|_reg_262|_reg_260|_reg_258|_reg_256|_reg_254|_reg_252|_reg_250|_reg_248|_reg_246|_reg_244|_reg_242|_reg_240|_reg_238|_reg_236|_reg_234|_net_389|_net_387|_reg_230|_reg_228|_reg_226|_reg_224|_reg_222|_reg_220|_reg_218|_reg_216|_reg_214|_reg_212|_reg_210|_reg_208|_reg_206|_reg_204|_reg_202|_reg_200|_reg_198|_reg_196|_reg_194|_reg_192|_reg_190;\r
+ assign _proc_p_wait_reset = _net_188;\r
+ assign _net_70 = _proc_p_wait_set|_proc_p_wait_reset;\r
assign _u_VGA_i_clk50M = m_clock;\r
assign _u_VGA_m_clock = r_cnt;\r
assign _u_VGA_p_reset = r_reset;\r
assign _u_VGA_fi_fifo1_write = fs_fifo1_write;\r
assign _u_VGA_fi_fifo2_write = fs_fifo2_write;\r
assign _u_EXP_i_Radrs = r_init_cnt;\r
- assign _u_EXP_fi_Rd_req = _net_170|_net_149|_net_107|_net_99;\r
- assign _u_EXP_i_Wdata = 8'b00001111;\r
- assign _u_EXP_i_Wadrs = r_init_cnt;\r
- assign _u_EXP_fi_Wr_req = _net_118;\r
- assign _net_70 = (trigger)==(3'b011);\r
- assign _net_71 = (~r_hld_vram_start)&(_u_VGA_o_vcnt[0]);\r
- assign _net_72 = r_reset&_net_71;\r
- assign _net_73 = r_hld_vram_start&(~(_u_VGA_o_vcnt[0]));\r
- assign _net_74 = r_reset&_net_73;\r
- assign _net_75 = (r_sec_cnt)==(26'b10111110101111000010000000);\r
- assign _net_76 = ~_net_75;\r
- assign _net_93 = (_net_63) < (14'b00000000101000);\r
- assign _reg_80_goto = _net_94;\r
- assign _net_94 = _reg_80&_net_93;\r
- assign _reg_83_goin = _net_95;\r
- assign _net_95 = _reg_80&_net_93;\r
- assign _net_96 = ~((r_init_cnt) < (14'b00000000101000));\r
- assign _reg_83_goto = _net_97;\r
- assign _net_97 = _reg_83&_net_96;\r
- assign _reg_79_goin = _net_98;\r
- assign _net_98 = _reg_83&_net_96;\r
- assign _net_99 = _reg_83&(~_net_96);\r
- assign _net_100 = _reg_83&(~_net_96);\r
- assign _net_101 = (_net_60) < (14'b00000000101000);\r
- assign _reg_86_goto = _net_102;\r
- assign _net_102 = _reg_86&_net_101;\r
- assign _reg_89_goin = _net_103;\r
- assign _net_103 = _reg_86&_net_101;\r
- assign _net_104 = ~((r_init_cnt) < (14'b00000000101000));\r
- assign _reg_89_goto = _net_105;\r
- assign _net_105 = _reg_89&_net_104;\r
- assign _reg_85_goin = _net_106;\r
- assign _net_106 = _reg_89&_net_104;\r
- assign _net_107 = _reg_89&(~_net_104);\r
- assign _net_108 = _reg_89&(~_net_104);\r
- assign _net_109 = ~((r_init_cnt) < (14'b10010110000000));\r
- assign _reg_91_goto = _net_116|_net_110;\r
- assign _net_110 = _reg_91&_net_109;\r
- assign _reg_90_goin = _net_111;\r
- assign _net_111 = _reg_91&_net_109;\r
- assign _net_112 = _reg_91&(~_net_109);\r
- assign _net_113 = _reg_91&(~_net_109);\r
- assign _net_114 = (_net_57) < (14'b10010110000000);\r
- assign _net_115 = _reg_91&(~_net_109);\r
- assign _net_116 = (_reg_91&(~_net_109))&_net_114;\r
- assign _reg_91_goin = _net_117;\r
- assign _net_117 = (_reg_91&(~_net_109))&_net_114;\r
- assign _net_118 = _reg_91&(~_net_109);\r
- assign _net_119 = _reg_91&(~_net_109);\r
- assign _net_120 = _reg_91&(~_net_109);\r
- assign _net_121 = fs_init|_reg_92;\r
- assign _net_122 = (_reg_91_goin|fs_init)|_reg_91|_reg_92;\r
- assign _net_123 = _reg_90_goin|_reg_90|_reg_91;\r
- assign _net_124 = _reg_89_goin|_reg_89|_reg_90;\r
- assign _net_125 = _reg_89_goin|_reg_88|_reg_89;\r
- assign _net_126 = _reg_89_goin|_reg_87|_reg_88;\r
- assign _net_127 = _reg_89_goin|_reg_86|_reg_87;\r
- assign _net_128 = _reg_85_goin|_reg_85|_reg_86;\r
- assign _net_129 = _reg_85_goin|_reg_84|_reg_85;\r
- assign _net_130 = _reg_83_goin|_reg_83|_reg_84;\r
- assign _net_131 = _reg_83_goin|_reg_82|_reg_83;\r
- assign _net_132 = _reg_83_goin|_reg_81|_reg_82;\r
- assign _net_133 = _reg_83_goin|_reg_80|_reg_81;\r
- assign _net_134 = _reg_79_goin|_reg_79|_reg_80;\r
- assign _net_135 = _reg_79_goin|_reg_78|_reg_79;\r
- assign _net_136 = _reg_79_goin|_reg_77|_reg_78;\r
- assign _net_143 = (_net_66) < (14'b00000000101000);\r
- assign _reg_138_goto = _net_144;\r
- assign _net_144 = _reg_138&_net_143;\r
- assign _reg_141_goin = _net_145;\r
- assign _net_145 = _reg_138&_net_143;\r
- assign _net_146 = ~((r_init_cnt) < (14'b00000000101000));\r
- assign _reg_141_goto = _net_147;\r
- assign _net_147 = _reg_141&_net_146;\r
- assign _reg_137_goin = _net_148;\r
- assign _net_148 = _reg_141&_net_146;\r
- assign _net_149 = _reg_141&(~_net_146);\r
- assign _net_150 = _reg_141&(~_net_146);\r
- assign _net_151 = fs_fifo1_charge|_reg_142;\r
- assign _net_152 = (_reg_141_goin|fs_fifo1_charge)|_reg_141|_reg_142;\r
- assign _net_153 = (_reg_141_goin|fs_fifo1_charge)|_reg_140|_reg_141;\r
- assign _net_154 = (_reg_141_goin|fs_fifo1_charge)|_reg_139|_reg_140;\r
- assign _net_155 = (_reg_141_goin|fs_fifo1_charge)|_reg_138|_reg_139;\r
- assign _net_156 = _reg_137_goin|_reg_137|_reg_138;\r
- assign _net_164 = (_net_69) < (14'b00000000101000);\r
- assign _reg_159_goto = _net_165;\r
- assign _net_165 = _reg_159&_net_164;\r
- assign _reg_162_goin = _net_166;\r
- assign _net_166 = _reg_159&_net_164;\r
- assign _net_167 = ~((r_init_cnt) < (14'b00000000101000));\r
- assign _reg_162_goto = _net_168;\r
- assign _net_168 = _reg_162&_net_167;\r
- assign _reg_158_goin = _net_169;\r
- assign _net_169 = _reg_162&_net_167;\r
- assign _net_170 = _reg_162&(~_net_167);\r
- assign _net_171 = _reg_162&(~_net_167);\r
- assign _net_172 = fs_fifo2_charge|_reg_163;\r
- assign _net_173 = (_reg_162_goin|fs_fifo2_charge)|_reg_162|_reg_163;\r
- assign _net_174 = (_reg_162_goin|fs_fifo2_charge)|_reg_161|_reg_162;\r
- assign _net_175 = (_reg_162_goin|fs_fifo2_charge)|_reg_160|_reg_161;\r
- assign _net_176 = (_reg_162_goin|fs_fifo2_charge)|_reg_159|_reg_160;\r
- assign _net_177 = _reg_158_goin|_reg_158|_reg_159;\r
- assign _net_178 = _reg_158_goin|_reg_157|_reg_158;\r
- assign _net_179 = (r_vram_start_adrs)==(14'b10010101011000);\r
- assign _net_180 = fs_vram_cnt_inc&_net_179;\r
- assign _net_181 = fs_vram_cnt_inc&(~_net_179);\r
+ assign _u_EXP_fi_Rd_req = _net_174|_net_153|_net_111|_net_103;\r
+ assign _u_EXP_i_Wdata = ((_net_123)?r_init_cnt[7:0]:8'b0)|\r
+ ((_net_77)?_u_FROMC_o_vram_wdata:8'b0);\r
+ assign _u_EXP_i_Wadrs = ((_net_124)?r_init_cnt:14'b0)|\r
+ ((_net_78)?_u_FROMC_o_vram_adrs:14'b0);\r
+ assign _u_EXP_fi_Wr_req = _net_122|_net_76;\r
+ assign _u_FROMC_i_word_adrs = ((_net_498|_net_442)?6'b000110:6'b0)|\r
+ ((_net_414)?6'b001111:6'b0)|\r
+ ((_net_518|_net_462|_net_386)?6'b000000:6'b0)|\r
+ ((_net_514|_net_458|_net_382)?6'b000001:6'b0)|\r
+ ((_net_510|_net_454|_net_378)?6'b000010:6'b0)|\r
+ ((_net_506|_net_374)?6'b000011:6'b0)|\r
+ ((_net_450|_net_370)?6'b000100:6'b0)|\r
+ ((_net_502|_net_446|_net_366)?6'b000101:6'b0)|\r
+ ((_net_494|_net_438|_net_362)?6'b000111:6'b0)|\r
+ ((_net_434|_net_358)?6'b001000:6'b0)|\r
+ ((_net_490|_net_430|_net_354)?6'b001001:6'b0)|\r
+ ((_net_486|_net_350)?6'b001010:6'b0)|\r
+ ((_net_482|_net_426|_net_346)?6'b001011:6'b0)|\r
+ ((_net_478|_net_422|_net_342)?6'b001100:6'b0)|\r
+ ((_net_474|_net_418|_net_338)?6'b001101:6'b0)|\r
+ ((_net_470|_net_334)?6'b001110:6'b0)|\r
+ ((_net_410|_net_330)?6'b010000:6'b0)|\r
+ ((_net_406|_net_326)?6'b010001:6'b0)|\r
+ ((_net_402|_net_322)?6'b010010:6'b0)|\r
+ ((_net_398|_net_318)?6'b010011:6'b0)|\r
+ ((_net_394|_net_314)?6'b010100:6'b0)|\r
+ ((_net_310)?6'b010101:6'b0)|\r
+ ((_net_306)?6'b010110:6'b0);\r
+ assign _u_FROMC_i_line_adrs = ((_net_517|_net_513|_net_509|_net_505|_net_501|_net_497|_net_493|_net_489|_net_485|_net_481|_net_477|_net_473|_net_469)?5'b00000:5'b0)|\r
+ ((_net_461|_net_457|_net_453|_net_449|_net_445|_net_441|_net_437|_net_433|_net_429|_net_425|_net_421|_net_417|_net_413|_net_409|_net_405|_net_401|_net_397|_net_393)?5'b00001:5'b0)|\r
+ ((_net_385|_net_381|_net_377|_net_373|_net_369|_net_365|_net_361|_net_357|_net_353|_net_349|_net_345|_net_341|_net_337|_net_333|_net_329|_net_325|_net_321|_net_317|_net_313|_net_309|_net_305)?5'b00010:5'b0);\r
+ assign _u_FROMC_i_code_num = ((_net_516)?8'b01010111:8'b0)|\r
+ ((_net_508)?8'b01101011:8'b0)|\r
+ ((_net_496)?8'b01110000:8'b0)|\r
+ ((_net_492)?8'b00101100:8'b0)|\r
+ ((_net_488)?8'b01001110:8'b0)|\r
+ ((_net_460)?8'b01010100:8'b0)|\r
+ ((_net_448)?8'b01001101:8'b0)|\r
+ ((_net_428)?8'b01111000:8'b0)|\r
+ ((_net_416)?8'b01110011:8'b0)|\r
+ ((_net_412)?8'b01111001:8'b0)|\r
+ ((_net_500|_net_404)?8'b01110101:8'b0)|\r
+ ((_net_384)?8'b01000110:8'b0)|\r
+ ((_net_376|_net_372)?8'b01101100:8'b0)|\r
+ ((_net_480|_net_408|_net_380|_net_368)?8'b01101111:8'b0)|\r
+ ((_net_364|_net_348)?8'b01110111:8'b0)|\r
+ ((_net_456|_net_424|_net_356|_net_344)?8'b01101000:8'b0)|\r
+ ((_net_504|_net_484|_net_452|_net_352|_net_332)?8'b01100101:8'b0)|\r
+ ((_net_436|_net_328)?8'b01110010:8'b0)|\r
+ ((_net_512|_net_444|_net_420|_net_324)?8'b01100001:8'b0)|\r
+ ((_net_320|_net_316)?8'b01100010:8'b0)|\r
+ ((_net_432|_net_340|_net_312)?8'b01101001:8'b0)|\r
+ ((_net_440|_net_360|_net_336|_net_308)?8'b01110100:8'b0)|\r
+ ((_net_476|_net_472|_net_468|_net_400|_net_396|_net_392|_net_304)?8'b00101110:8'b0);\r
+ assign _u_FROMC_fi_write_word = _net_515|_net_511|_net_507|_net_503|_net_499|_net_495|_net_491|_net_487|_net_483|_net_479|_net_475|_net_471|_net_467|_net_459|_net_455|_net_451|_net_447|_net_443|_net_439|_net_435|_net_431|_net_427|_net_423|_net_419|_net_415|_net_411|_net_407|_net_403|_net_399|_net_395|_net_391|_net_383|_net_379|_net_375|_net_371|_net_367|_net_363|_net_359|_net_355|_net_351|_net_347|_net_343|_net_339|_net_335|_net_331|_net_327|_net_323|_net_319|_net_315|_net_311|_net_307|_net_303;\r
+ assign _u_FROMC_fi_delete_word = 1'b0;\r
+ assign _u_FROMC_fi_delete_line = 1'b0;\r
+ assign _u_FROMC_fi_delete_display = 1'b0;\r
+ assign _u_FROMC_fi_slide_line = 1'b0;\r
+ assign _net_71 = (trigger)==(3'b011);\r
+ assign _net_72 = (~r_hld_vram_start)&(_u_VGA_o_vcnt[0]);\r
+ assign _net_73 = r_reset&_net_72;\r
+ assign _net_74 = r_hld_vram_start&(~(_u_VGA_o_vcnt[0]));\r
+ assign _net_75 = r_reset&_net_74;\r
+ assign _net_76 = r_reset&_u_FROMC_fo_write_vram;\r
+ assign _net_77 = r_reset&_u_FROMC_fo_write_vram;\r
+ assign _net_78 = r_reset&_u_FROMC_fo_write_vram;\r
+ assign _net_79 = (r_sec_cnt)==(26'b10111110101111000010000000);\r
+ assign _net_80 = ~_net_79;\r
+ assign _net_97 = (_net_63) < (14'b00000000101000);\r
+ assign _reg_84_goto = _net_98;\r
+ assign _net_98 = _reg_84&_net_97;\r
+ assign _reg_87_goin = _net_99;\r
+ assign _net_99 = _reg_84&_net_97;\r
+ assign _net_100 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_87_goto = _net_101;\r
+ assign _net_101 = _reg_87&_net_100;\r
+ assign _reg_83_goin = _net_102;\r
+ assign _net_102 = _reg_87&_net_100;\r
+ assign _net_103 = _reg_87&(~_net_100);\r
+ assign _net_104 = _reg_87&(~_net_100);\r
+ assign _net_105 = (_net_60) < (14'b00000000101000);\r
+ assign _reg_90_goto = _net_106;\r
+ assign _net_106 = _reg_90&_net_105;\r
+ assign _reg_93_goin = _net_107;\r
+ assign _net_107 = _reg_90&_net_105;\r
+ assign _net_108 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_93_goto = _net_109;\r
+ assign _net_109 = _reg_93&_net_108;\r
+ assign _reg_89_goin = _net_110;\r
+ assign _net_110 = _reg_93&_net_108;\r
+ assign _net_111 = _reg_93&(~_net_108);\r
+ assign _net_112 = _reg_93&(~_net_108);\r
+ assign _net_113 = ~((r_init_cnt) < (14'b10010110000000));\r
+ assign _reg_95_goto = _net_120|_net_114;\r
+ assign _net_114 = _reg_95&_net_113;\r
+ assign _reg_94_goin = _net_115;\r
+ assign _net_115 = _reg_95&_net_113;\r
+ assign _net_116 = _reg_95&(~_net_113);\r
+ assign _net_117 = _reg_95&(~_net_113);\r
+ assign _net_118 = (_net_57) < (14'b10010110000000);\r
+ assign _net_119 = _reg_95&(~_net_113);\r
+ assign _net_120 = (_reg_95&(~_net_113))&_net_118;\r
+ assign _reg_95_goin = _net_121;\r
+ assign _net_121 = (_reg_95&(~_net_113))&_net_118;\r
+ assign _net_122 = _reg_95&(~_net_113);\r
+ assign _net_123 = _reg_95&(~_net_113);\r
+ assign _net_124 = _reg_95&(~_net_113);\r
+ assign _net_125 = fs_init|_reg_96;\r
+ assign _net_126 = (_reg_95_goin|fs_init)|_reg_95|_reg_96;\r
+ assign _net_127 = _reg_94_goin|_reg_94|_reg_95;\r
+ assign _net_128 = _reg_93_goin|_reg_93|_reg_94;\r
+ assign _net_129 = _reg_93_goin|_reg_92|_reg_93;\r
+ assign _net_130 = _reg_93_goin|_reg_91|_reg_92;\r
+ assign _net_131 = _reg_93_goin|_reg_90|_reg_91;\r
+ assign _net_132 = _reg_89_goin|_reg_89|_reg_90;\r
+ assign _net_133 = _reg_89_goin|_reg_88|_reg_89;\r
+ assign _net_134 = _reg_87_goin|_reg_87|_reg_88;\r
+ assign _net_135 = _reg_87_goin|_reg_86|_reg_87;\r
+ assign _net_136 = _reg_87_goin|_reg_85|_reg_86;\r
+ assign _net_137 = _reg_87_goin|_reg_84|_reg_85;\r
+ assign _net_138 = _reg_83_goin|_reg_83|_reg_84;\r
+ assign _net_139 = _reg_83_goin|_reg_82|_reg_83;\r
+ assign _net_140 = _reg_83_goin|_reg_81|_reg_82;\r
+ assign _net_147 = (_net_66) < (14'b00000000101000);\r
+ assign _reg_142_goto = _net_148;\r
+ assign _net_148 = _reg_142&_net_147;\r
+ assign _reg_145_goin = _net_149;\r
+ assign _net_149 = _reg_142&_net_147;\r
+ assign _net_150 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_145_goto = _net_151;\r
+ assign _net_151 = _reg_145&_net_150;\r
+ assign _reg_141_goin = _net_152;\r
+ assign _net_152 = _reg_145&_net_150;\r
+ assign _net_153 = _reg_145&(~_net_150);\r
+ assign _net_154 = _reg_145&(~_net_150);\r
+ assign _net_155 = fs_fifo1_charge|_reg_146;\r
+ assign _net_156 = (_reg_145_goin|fs_fifo1_charge)|_reg_145|_reg_146;\r
+ assign _net_157 = (_reg_145_goin|fs_fifo1_charge)|_reg_144|_reg_145;\r
+ assign _net_158 = (_reg_145_goin|fs_fifo1_charge)|_reg_143|_reg_144;\r
+ assign _net_159 = (_reg_145_goin|fs_fifo1_charge)|_reg_142|_reg_143;\r
+ assign _net_160 = _reg_141_goin|_reg_141|_reg_142;\r
+ assign _net_168 = (_net_69) < (14'b00000000101000);\r
+ assign _reg_163_goto = _net_169;\r
+ assign _net_169 = _reg_163&_net_168;\r
+ assign _reg_166_goin = _net_170;\r
+ assign _net_170 = _reg_163&_net_168;\r
+ assign _net_171 = ~((r_init_cnt) < (14'b00000000101000));\r
+ assign _reg_166_goto = _net_172;\r
+ assign _net_172 = _reg_166&_net_171;\r
+ assign _reg_162_goin = _net_173;\r
+ assign _net_173 = _reg_166&_net_171;\r
+ assign _net_174 = _reg_166&(~_net_171);\r
+ assign _net_175 = _reg_166&(~_net_171);\r
+ assign _net_176 = fs_fifo2_charge|_reg_167;\r
+ assign _net_177 = (_reg_166_goin|fs_fifo2_charge)|_reg_166|_reg_167;\r
+ assign _net_178 = (_reg_166_goin|fs_fifo2_charge)|_reg_165|_reg_166;\r
+ assign _net_179 = (_reg_166_goin|fs_fifo2_charge)|_reg_164|_reg_165;\r
+ assign _net_180 = (_reg_166_goin|fs_fifo2_charge)|_reg_163|_reg_164;\r
+ assign _net_181 = _reg_162_goin|_reg_162|_reg_163;\r
+ assign _net_182 = _reg_162_goin|_reg_161|_reg_162;\r
+ assign _net_183 = (r_vram_start_adrs)==(14'b10010101011000);\r
+ assign _net_184 = fs_vram_cnt_inc&_net_183;\r
+ assign _net_185 = fs_vram_cnt_inc&(~_net_183);\r
+ assign _net_186 = (r_wait_cnt)==(r_wait_val);\r
+ assign _net_187 = p_wait&_net_186;\r
+ assign _net_188 = p_wait&_net_186;\r
+ assign _net_189 = p_wait&(~_net_186);\r
+ assign _net_303 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_304 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_305 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_306 = _reg_191&p_wait&_proc_p_wait_reset;\r
+ assign _net_307 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_308 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_309 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_310 = _reg_193&p_wait&_proc_p_wait_reset;\r
+ assign _net_311 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_312 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_313 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_314 = _reg_195&p_wait&_proc_p_wait_reset;\r
+ assign _net_315 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_316 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_317 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_318 = _reg_197&p_wait&_proc_p_wait_reset;\r
+ assign _net_319 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_320 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_321 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_322 = _reg_199&p_wait&_proc_p_wait_reset;\r
+ assign _net_323 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_324 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_325 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_326 = _reg_201&p_wait&_proc_p_wait_reset;\r
+ assign _net_327 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_328 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_329 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_330 = _reg_203&p_wait&_proc_p_wait_reset;\r
+ assign _net_331 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_332 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_333 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_334 = _reg_205&p_wait&_proc_p_wait_reset;\r
+ assign _net_335 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_336 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_337 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_338 = _reg_207&p_wait&_proc_p_wait_reset;\r
+ assign _net_339 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_340 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_341 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_342 = _reg_209&p_wait&_proc_p_wait_reset;\r
+ assign _net_343 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_344 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_345 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_346 = _reg_211&p_wait&_proc_p_wait_reset;\r
+ assign _net_347 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_348 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_349 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_350 = _reg_213&p_wait&_proc_p_wait_reset;\r
+ assign _net_351 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_352 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_353 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_354 = _reg_215&p_wait&_proc_p_wait_reset;\r
+ assign _net_355 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_356 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_357 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_358 = _reg_217&p_wait&_proc_p_wait_reset;\r
+ assign _net_359 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_360 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_361 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_362 = _reg_219&p_wait&_proc_p_wait_reset;\r
+ assign _net_363 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_364 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_365 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_366 = _reg_221&p_wait&_proc_p_wait_reset;\r
+ assign _net_367 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_368 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_369 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_370 = _reg_223&p_wait&_proc_p_wait_reset;\r
+ assign _net_371 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_372 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_373 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_374 = _reg_225&p_wait&_proc_p_wait_reset;\r
+ assign _net_375 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_376 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_377 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_378 = _reg_227&p_wait&_proc_p_wait_reset;\r
+ assign _net_379 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_380 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_381 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_382 = _reg_229&p_wait&_proc_p_wait_reset;\r
+ assign _net_383 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_384 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_385 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_386 = _reg_231&p_wait&_proc_p_wait_reset;\r
+ assign _net_387 = _reg_232&p_wait&_proc_p_wait_reset;\r
+ assign _net_388 = _reg_232&p_wait&_proc_p_wait_reset;\r
+ assign _net_389 = _reg_233&p_wait&_proc_p_wait_reset;\r
+ assign _net_390 = _reg_233&p_wait&_proc_p_wait_reset;\r
+ assign _net_391 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_392 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_393 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_394 = _reg_235&p_wait&_proc_p_wait_reset;\r
+ assign _net_395 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_396 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_397 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_398 = _reg_237&p_wait&_proc_p_wait_reset;\r
+ assign _net_399 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_400 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_401 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_402 = _reg_239&p_wait&_proc_p_wait_reset;\r
+ assign _net_403 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_404 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_405 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_406 = _reg_241&p_wait&_proc_p_wait_reset;\r
+ assign _net_407 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_408 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_409 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_410 = _reg_243&p_wait&_proc_p_wait_reset;\r
+ assign _net_411 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_412 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_413 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_414 = _reg_245&p_wait&_proc_p_wait_reset;\r
+ assign _net_415 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_416 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_417 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_418 = _reg_247&p_wait&_proc_p_wait_reset;\r
+ assign _net_419 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_420 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_421 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_422 = _reg_249&p_wait&_proc_p_wait_reset;\r
+ assign _net_423 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_424 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_425 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_426 = _reg_251&p_wait&_proc_p_wait_reset;\r
+ assign _net_427 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_428 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_429 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_430 = _reg_253&p_wait&_proc_p_wait_reset;\r
+ assign _net_431 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_432 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_433 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_434 = _reg_255&p_wait&_proc_p_wait_reset;\r
+ assign _net_435 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_436 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_437 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_438 = _reg_257&p_wait&_proc_p_wait_reset;\r
+ assign _net_439 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_440 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_441 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_442 = _reg_259&p_wait&_proc_p_wait_reset;\r
+ assign _net_443 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_444 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_445 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_446 = _reg_261&p_wait&_proc_p_wait_reset;\r
+ assign _net_447 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_448 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_449 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_450 = _reg_263&p_wait&_proc_p_wait_reset;\r
+ assign _net_451 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_452 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_453 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_454 = _reg_265&p_wait&_proc_p_wait_reset;\r
+ assign _net_455 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_456 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_457 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_458 = _reg_267&p_wait&_proc_p_wait_reset;\r
+ assign _net_459 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_460 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_461 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_462 = _reg_269&p_wait&_proc_p_wait_reset;\r
+ assign _net_463 = _reg_270&p_wait&_proc_p_wait_reset;\r
+ assign _net_464 = _reg_270&p_wait&_proc_p_wait_reset;\r
+ assign _net_465 = _reg_271&p_wait&_proc_p_wait_reset;\r
+ assign _net_466 = _reg_271&p_wait&_proc_p_wait_reset;\r
+ assign _net_467 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_468 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_469 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_470 = _reg_273&p_wait&_proc_p_wait_reset;\r
+ assign _net_471 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_472 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_473 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_474 = _reg_275&p_wait&_proc_p_wait_reset;\r
+ assign _net_475 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_476 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_477 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_478 = _reg_277&p_wait&_proc_p_wait_reset;\r
+ assign _net_479 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_480 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_481 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_482 = _reg_279&p_wait&_proc_p_wait_reset;\r
+ assign _net_483 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_484 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_485 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_486 = _reg_281&p_wait&_proc_p_wait_reset;\r
+ assign _net_487 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_488 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_489 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_490 = _reg_283&p_wait&_proc_p_wait_reset;\r
+ assign _net_491 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_492 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_493 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_494 = _reg_285&p_wait&_proc_p_wait_reset;\r
+ assign _net_495 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_496 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_497 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_498 = _reg_287&p_wait&_proc_p_wait_reset;\r
+ assign _net_499 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_500 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_501 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_502 = _reg_289&p_wait&_proc_p_wait_reset;\r
+ assign _net_503 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_504 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_505 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_506 = _reg_291&p_wait&_proc_p_wait_reset;\r
+ assign _net_507 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_508 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_509 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_510 = _reg_293&p_wait&_proc_p_wait_reset;\r
+ assign _net_511 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_512 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_513 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_514 = _reg_295&p_wait&_proc_p_wait_reset;\r
+ assign _net_515 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_516 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_517 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_518 = _reg_297&p_wait&_proc_p_wait_reset;\r
+ assign _net_519 = _reg_298&p_wait&_proc_p_wait_reset;\r
+ assign _net_520 = _reg_298&p_wait&_proc_p_wait_reset;\r
+ assign _net_521 = _reg_299&p_wait&_proc_p_wait_reset;\r
+ assign _net_522 = _reg_299&p_wait&_proc_p_wait_reset;\r
+ assign _net_523 = _reg_300&p_wait&_proc_p_wait_reset;\r
+ assign _net_524 = _reg_300&p_wait&_proc_p_wait_reset;\r
+ assign _net_525 = _reg_301&p_wait&_proc_p_wait_reset;\r
+ assign _net_526 = _reg_301&p_wait&_proc_p_wait_reset;\r
+ assign _net_527 = test_write|_reg_302;\r
+ assign _net_528 = test_write|_reg_302;\r
+ assign _net_529 = test_write|_reg_301|_reg_302;\r
+ assign _net_530 = test_write|_reg_300|_reg_301;\r
+ assign _net_531 = test_write|_reg_299|_reg_300;\r
+ assign _net_532 = test_write|_reg_298|_reg_299;\r
+ assign _net_533 = test_write|_reg_297|_reg_298;\r
+ assign _net_534 = test_write|_reg_296|_reg_297;\r
+ assign _net_535 = test_write|_reg_295|_reg_296;\r
+ assign _net_536 = test_write|_reg_294|_reg_295;\r
+ assign _net_537 = test_write|_reg_293|_reg_294;\r
+ assign _net_538 = test_write|_reg_292|_reg_293;\r
+ assign _net_539 = test_write|_reg_291|_reg_292;\r
+ assign _net_540 = test_write|_reg_290|_reg_291;\r
+ assign _net_541 = test_write|_reg_289|_reg_290;\r
+ assign _net_542 = test_write|_reg_288|_reg_289;\r
+ assign _net_543 = test_write|_reg_287|_reg_288;\r
+ assign _net_544 = test_write|_reg_286|_reg_287;\r
+ assign _net_545 = test_write|_reg_285|_reg_286;\r
+ assign _net_546 = test_write|_reg_284|_reg_285;\r
+ assign _net_547 = test_write|_reg_283|_reg_284;\r
+ assign _net_548 = test_write|_reg_282|_reg_283;\r
+ assign _net_549 = test_write|_reg_281|_reg_282;\r
+ assign _net_550 = test_write|_reg_280|_reg_281;\r
+ assign _net_551 = test_write|_reg_279|_reg_280;\r
+ assign _net_552 = test_write|_reg_278|_reg_279;\r
+ assign _net_553 = test_write|_reg_277|_reg_278;\r
+ assign _net_554 = test_write|_reg_276|_reg_277;\r
+ assign _net_555 = test_write|_reg_275|_reg_276;\r
+ assign _net_556 = test_write|_reg_274|_reg_275;\r
+ assign _net_557 = test_write|_reg_273|_reg_274;\r
+ assign _net_558 = test_write|_reg_272|_reg_273;\r
+ assign _net_559 = test_write|_reg_271|_reg_272;\r
+ assign _net_560 = test_write|_reg_270|_reg_271;\r
+ assign _net_561 = test_write|_reg_269|_reg_270;\r
+ assign _net_562 = test_write|_reg_268|_reg_269;\r
+ assign _net_563 = test_write|_reg_267|_reg_268;\r
+ assign _net_564 = test_write|_reg_266|_reg_267;\r
+ assign _net_565 = test_write|_reg_265|_reg_266;\r
+ assign _net_566 = test_write|_reg_264|_reg_265;\r
+ assign _net_567 = test_write|_reg_263|_reg_264;\r
+ assign _net_568 = test_write|_reg_262|_reg_263;\r
+ assign _net_569 = test_write|_reg_261|_reg_262;\r
+ assign _net_570 = test_write|_reg_260|_reg_261;\r
+ assign _net_571 = test_write|_reg_259|_reg_260;\r
+ assign _net_572 = test_write|_reg_258|_reg_259;\r
+ assign _net_573 = test_write|_reg_257|_reg_258;\r
+ assign _net_574 = test_write|_reg_256|_reg_257;\r
+ assign _net_575 = test_write|_reg_255|_reg_256;\r
+ assign _net_576 = test_write|_reg_254|_reg_255;\r
+ assign _net_577 = test_write|_reg_253|_reg_254;\r
+ assign _net_578 = test_write|_reg_252|_reg_253;\r
+ assign _net_579 = test_write|_reg_251|_reg_252;\r
+ assign _net_580 = test_write|_reg_250|_reg_251;\r
+ assign _net_581 = test_write|_reg_249|_reg_250;\r
+ assign _net_582 = test_write|_reg_248|_reg_249;\r
+ assign _net_583 = test_write|_reg_247|_reg_248;\r
+ assign _net_584 = test_write|_reg_246|_reg_247;\r
+ assign _net_585 = test_write|_reg_245|_reg_246;\r
+ assign _net_586 = test_write|_reg_244|_reg_245;\r
+ assign _net_587 = test_write|_reg_243|_reg_244;\r
+ assign _net_588 = test_write|_reg_242|_reg_243;\r
+ assign _net_589 = test_write|_reg_241|_reg_242;\r
+ assign _net_590 = test_write|_reg_240|_reg_241;\r
+ assign _net_591 = test_write|_reg_239|_reg_240;\r
+ assign _net_592 = test_write|_reg_238|_reg_239;\r
+ assign _net_593 = test_write|_reg_237|_reg_238;\r
+ assign _net_594 = test_write|_reg_236|_reg_237;\r
+ assign _net_595 = test_write|_reg_235|_reg_236;\r
+ assign _net_596 = test_write|_reg_234|_reg_235;\r
+ assign _net_597 = test_write|_reg_233|_reg_234;\r
+ assign _net_598 = test_write|_reg_232|_reg_233;\r
+ assign _net_599 = test_write|_reg_231|_reg_232;\r
+ assign _net_600 = test_write|_reg_230|_reg_231;\r
+ assign _net_601 = test_write|_reg_229|_reg_230;\r
+ assign _net_602 = test_write|_reg_228|_reg_229;\r
+ assign _net_603 = test_write|_reg_227|_reg_228;\r
+ assign _net_604 = test_write|_reg_226|_reg_227;\r
+ assign _net_605 = test_write|_reg_225|_reg_226;\r
+ assign _net_606 = test_write|_reg_224|_reg_225;\r
+ assign _net_607 = test_write|_reg_223|_reg_224;\r
+ assign _net_608 = test_write|_reg_222|_reg_223;\r
+ assign _net_609 = test_write|_reg_221|_reg_222;\r
+ assign _net_610 = test_write|_reg_220|_reg_221;\r
+ assign _net_611 = test_write|_reg_219|_reg_220;\r
+ assign _net_612 = test_write|_reg_218|_reg_219;\r
+ assign _net_613 = test_write|_reg_217|_reg_218;\r
+ assign _net_614 = test_write|_reg_216|_reg_217;\r
+ assign _net_615 = test_write|_reg_215|_reg_216;\r
+ assign _net_616 = test_write|_reg_214|_reg_215;\r
+ assign _net_617 = test_write|_reg_213|_reg_214;\r
+ assign _net_618 = test_write|_reg_212|_reg_213;\r
+ assign _net_619 = test_write|_reg_211|_reg_212;\r
+ assign _net_620 = test_write|_reg_210|_reg_211;\r
+ assign _net_621 = test_write|_reg_209|_reg_210;\r
+ assign _net_622 = test_write|_reg_208|_reg_209;\r
+ assign _net_623 = test_write|_reg_207|_reg_208;\r
+ assign _net_624 = test_write|_reg_206|_reg_207;\r
+ assign _net_625 = test_write|_reg_205|_reg_206;\r
+ assign _net_626 = test_write|_reg_204|_reg_205;\r
+ assign _net_627 = test_write|_reg_203|_reg_204;\r
+ assign _net_628 = test_write|_reg_202|_reg_203;\r
+ assign _net_629 = test_write|_reg_201|_reg_202;\r
+ assign _net_630 = test_write|_reg_200|_reg_201;\r
+ assign _net_631 = test_write|_reg_199|_reg_200;\r
+ assign _net_632 = test_write|_reg_198|_reg_199;\r
+ assign _net_633 = test_write|_reg_197|_reg_198;\r
+ assign _net_634 = test_write|_reg_196|_reg_197;\r
+ assign _net_635 = test_write|_reg_195|_reg_196;\r
+ assign _net_636 = test_write|_reg_194|_reg_195;\r
+ assign _net_637 = test_write|_reg_193|_reg_194;\r
+ assign _net_638 = test_write|_reg_192|_reg_193;\r
+ assign _net_639 = test_write|_reg_191|_reg_192;\r
+ assign _net_640 = test_write|_reg_190|_reg_191;\r
assign o_vsync = _u_VGA_o_vsync;\r
assign o_hsync = _u_VGA_o_hsync;\r
assign o_vga_r = _u_VGA_o_vga_r;\r
begin\r
if (~p_reset)\r
r_reset <= 1'b0;\r
-else if ((_reg_77)) \r
+else if ((_reg_81)) \r
r_reset <= 1'b1;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_sec_cnt <= 26'b00000000000000000000000000;\r
-else if ((_net_76)|(_net_75)) \r
- r_sec_cnt <= ((_net_76) ?(r_sec_cnt)+(26'b00000000000000000000000001):26'b0)|\r
- ((_net_75) ?26'b00000000000000000000000000:26'b0);\r
+else if ((_net_80)|(_net_79)) \r
+ r_sec_cnt <= ((_net_80) ?(r_sec_cnt)+(26'b00000000000000000000000001):26'b0)|\r
+ ((_net_79) ?26'b00000000000000000000000000:26'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_LED <= 1'b0;\r
-else if ((_net_75)) \r
+else if ((_net_79)) \r
r_LED <= ~r_LED;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_init_cnt <= 14'b00000000000000;\r
-else if ((_reg_159)|(_reg_138)|(_net_112)|(_reg_86)|(_net_172|_net_151|_net_121|_reg_90|_reg_84)|(_reg_80)) \r
- r_init_cnt <= ((_reg_159) ?_net_69:14'b0)|\r
- ((_reg_138) ?_net_66:14'b0)|\r
- ((_net_112) ?_net_57:14'b0)|\r
- ((_reg_86) ?_net_60:14'b0)|\r
- ((_net_172|_net_151|_net_121|_reg_90|_reg_84) ?14'b00000000000000:14'b0)|\r
- ((_reg_80) ?_net_63:14'b0);\r
+else if ((_reg_163)|(_reg_142)|(_net_116)|(_reg_90)|(_net_176|_net_155|_net_125|_reg_94|_reg_88)|(_reg_84)) \r
+ r_init_cnt <= ((_reg_163) ?_net_69:14'b0)|\r
+ ((_reg_142) ?_net_66:14'b0)|\r
+ ((_net_116) ?_net_57:14'b0)|\r
+ ((_reg_90) ?_net_60:14'b0)|\r
+ ((_net_176|_net_155|_net_125|_reg_94|_reg_88) ?14'b00000000000000:14'b0)|\r
+ ((_reg_84) ?_net_63:14'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_vram_rddata <= 16'b0000000000000000;\r
-else if ((_reg_161|_reg_140|_reg_88|_reg_82)) \r
+else if ((_reg_165|_reg_144|_reg_92|_reg_86)) \r
r_vram_rddata <= _u_EXP_o_Rdata;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_vram_start_adrs <= 14'b00000000000000;\r
-else if ((_net_180)|(_net_181|_reg_78)) \r
- r_vram_start_adrs <= ((_net_180) ?14'b00000000000000:14'b0)|\r
- ((_net_181|_reg_78) ?(r_vram_start_adrs)+(14'b00000000101000):14'b0);\r
+else if ((_net_184)|(_net_185|_reg_82)) \r
+ r_vram_start_adrs <= ((_net_184) ?14'b00000000000000:14'b0)|\r
+ ((_net_185|_reg_82) ?(r_vram_start_adrs)+(14'b00000000101000):14'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_wradrs1 <= 8'b00000000;\r
-else if ((_reg_139|_reg_138|_reg_87|_reg_86)|(_reg_137|_reg_85)) \r
- r_wradrs1 <= ((_reg_139|_reg_138|_reg_87|_reg_86) ?(r_wradrs1)+(8'b00000001):8'b0)|\r
- ((_reg_137|_reg_85) ?8'b00000000:8'b0);\r
+else if ((_reg_143|_reg_142|_reg_91|_reg_90)|(_reg_141|_reg_89)) \r
+ r_wradrs1 <= ((_reg_143|_reg_142|_reg_91|_reg_90) ?(r_wradrs1)+(8'b00000001):8'b0)|\r
+ ((_reg_141|_reg_89) ?8'b00000000:8'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
r_wradrs2 <= 8'b00000000;\r
-else if ((_reg_160|_reg_159|_reg_81|_reg_80)|(_reg_158|_reg_79)) \r
- r_wradrs2 <= ((_reg_160|_reg_159|_reg_81|_reg_80) ?(r_wradrs2)+(8'b00000001):8'b0)|\r
- ((_reg_158|_reg_79) ?8'b00000000:8'b0);\r
+else if ((_reg_164|_reg_163|_reg_85|_reg_84)|(_reg_162|_reg_83)) \r
+ r_wradrs2 <= ((_reg_164|_reg_163|_reg_85|_reg_84) ?(r_wradrs2)+(8'b00000001):8'b0)|\r
+ ((_reg_162|_reg_83) ?8'b00000000:8'b0);\r
\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_77 <= 1'b0;\r
-else if ((_net_136)) \r
- _reg_77 <= _reg_78;\r
-end\r
-always @(posedge m_clock or negedge p_reset)\r
- begin\r
-if (~p_reset)\r
- _reg_78 <= 1'b0;\r
-else if ((_net_135)) \r
- _reg_78 <= _reg_79;\r
+ r_wait_cnt <= 26'b00000000000000000000000000;\r
+else if ((_net_189)|(_net_187)) \r
+ r_wait_cnt <= ((_net_189) ?(r_wait_cnt)+(26'b00000000000000000000000001):26'b0)|\r
+ ((_net_187) ?26'b00000000000000000000000000:26'b0);\r
+\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_79 <= 1'b0;\r
-else if ((_net_134)) \r
- _reg_79 <= _reg_79_goin|(_reg_80&(~_reg_80_goto));\r
+ r_wait_val <= 26'b00000000000000000000000000;\r
+else if ((_net_528|_net_526|_net_524|_net_522|_net_520|_net_466|_net_464|_net_390|_net_388)|(_reg_296|_reg_294|_reg_292|_reg_290|_reg_288|_reg_286|_reg_284|_reg_282|_reg_280|_reg_278|_reg_276|_reg_274|_reg_272|_reg_268|_reg_266|_reg_264|_reg_262|_reg_260|_reg_258|_reg_256|_reg_254|_reg_252|_reg_250|_reg_248|_reg_246|_reg_244|_reg_242|_reg_240|_reg_238|_reg_236|_reg_234|_reg_230|_reg_228|_reg_226|_reg_224|_reg_222|_reg_220|_reg_218|_reg_216|_reg_214|_reg_212|_reg_210|_reg_208|_reg_206|_reg_204|_reg_202|_reg_200|_reg_198|_reg_196|_reg_194|_reg_192|_reg_190)) \r
+ r_wait_val <= ((_net_528|_net_526|_net_524|_net_522|_net_520|_net_466|_net_464|_net_390|_net_388) ?26'b10111110101111000010000000:26'b0)|\r
+ ((_reg_296|_reg_294|_reg_292|_reg_290|_reg_288|_reg_286|_reg_284|_reg_282|_reg_280|_reg_278|_reg_276|_reg_274|_reg_272|_reg_268|_reg_266|_reg_264|_reg_262|_reg_260|_reg_258|_reg_256|_reg_254|_reg_252|_reg_250|_reg_248|_reg_246|_reg_244|_reg_242|_reg_240|_reg_238|_reg_236|_reg_234|_reg_230|_reg_228|_reg_226|_reg_224|_reg_222|_reg_220|_reg_218|_reg_216|_reg_214|_reg_212|_reg_210|_reg_208|_reg_206|_reg_204|_reg_202|_reg_200|_reg_198|_reg_196|_reg_194|_reg_192|_reg_190) ?26'b01011111010111100001000000:26'b0);\r
+\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_80 <= 1'b0;\r
-else if ((_net_133)) \r
- _reg_80 <= _reg_81;\r
+ p_wait <= 1'b0;\r
+else if ((_net_70)) \r
+ p_wait <= _proc_p_wait_set;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_81 <= 1'b0;\r
-else if ((_net_132)) \r
+else if ((_net_140)) \r
_reg_81 <= _reg_82;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_82 <= 1'b0;\r
-else if ((_net_131)) \r
- _reg_82 <= _reg_83&(~_reg_83_goto);\r
+else if ((_net_139)) \r
+ _reg_82 <= _reg_83;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_83 <= 1'b0;\r
-else if ((_net_130)) \r
- _reg_83 <= _reg_83_goin|_reg_84;\r
+else if ((_net_138)) \r
+ _reg_83 <= _reg_83_goin|(_reg_84&(~_reg_84_goto));\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_84 <= 1'b0;\r
-else if ((_net_129)) \r
+else if ((_net_137)) \r
_reg_84 <= _reg_85;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_85 <= 1'b0;\r
-else if ((_net_128)) \r
- _reg_85 <= _reg_85_goin|(_reg_86&(~_reg_86_goto));\r
+else if ((_net_136)) \r
+ _reg_85 <= _reg_86;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_86 <= 1'b0;\r
-else if ((_net_127)) \r
- _reg_86 <= _reg_87;\r
+else if ((_net_135)) \r
+ _reg_86 <= _reg_87&(~_reg_87_goto);\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_87 <= 1'b0;\r
-else if ((_net_126)) \r
- _reg_87 <= _reg_88;\r
+else if ((_net_134)) \r
+ _reg_87 <= _reg_87_goin|_reg_88;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_88 <= 1'b0;\r
-else if ((_net_125)) \r
- _reg_88 <= _reg_89&(~_reg_89_goto);\r
+else if ((_net_133)) \r
+ _reg_88 <= _reg_89;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_89 <= 1'b0;\r
-else if ((_net_124)) \r
- _reg_89 <= _reg_89_goin|_reg_90;\r
+else if ((_net_132)) \r
+ _reg_89 <= _reg_89_goin|(_reg_90&(~_reg_90_goto));\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_90 <= 1'b0;\r
-else if ((_net_123)) \r
- _reg_90 <= _reg_90_goin|(_reg_91&(~_reg_91_goto));\r
+else if ((_net_131)) \r
+ _reg_90 <= _reg_91;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_91 <= 1'b0;\r
-else if ((_net_122)) \r
- _reg_91 <= (_reg_91_goin|_reg_92)|fs_init;\r
+else if ((_net_130)) \r
+ _reg_91 <= _reg_92;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_92 <= 1'b0;\r
-else if ((_reg_92)) \r
- _reg_92 <= 1'b0;\r
+else if ((_net_129)) \r
+ _reg_92 <= _reg_93&(~_reg_93_goto);\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_137 <= 1'b0;\r
-else if ((_net_156)) \r
- _reg_137 <= _reg_137_goin|(_reg_138&(~_reg_138_goto));\r
+ _reg_93 <= 1'b0;\r
+else if ((_net_128)) \r
+ _reg_93 <= _reg_93_goin|_reg_94;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_138 <= 1'b0;\r
-else if ((_net_155)) \r
- _reg_138 <= _reg_139;\r
+ _reg_94 <= 1'b0;\r
+else if ((_net_127)) \r
+ _reg_94 <= _reg_94_goin|(_reg_95&(~_reg_95_goto));\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_139 <= 1'b0;\r
-else if ((_net_154)) \r
- _reg_139 <= _reg_140;\r
+ _reg_95 <= 1'b0;\r
+else if ((_net_126)) \r
+ _reg_95 <= (_reg_95_goin|_reg_96)|fs_init;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_140 <= 1'b0;\r
-else if ((_net_153)) \r
- _reg_140 <= _reg_141&(~_reg_141_goto);\r
+ _reg_96 <= 1'b0;\r
+else if ((_reg_96)) \r
+ _reg_96 <= 1'b0;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_141 <= 1'b0;\r
-else if ((_net_152)) \r
- _reg_141 <= (_reg_141_goin|_reg_142)|fs_fifo1_charge;\r
+else if ((_net_160)) \r
+ _reg_141 <= _reg_141_goin|(_reg_142&(~_reg_142_goto));\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_142 <= 1'b0;\r
-else if ((_reg_142)) \r
- _reg_142 <= 1'b0;\r
+else if ((_net_159)) \r
+ _reg_142 <= _reg_143;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_157 <= 1'b0;\r
-else if ((_net_178)) \r
- _reg_157 <= _reg_158;\r
+ _reg_143 <= 1'b0;\r
+else if ((_net_158)) \r
+ _reg_143 <= _reg_144;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_158 <= 1'b0;\r
-else if ((_net_177)) \r
- _reg_158 <= _reg_158_goin|(_reg_159&(~_reg_159_goto));\r
+ _reg_144 <= 1'b0;\r
+else if ((_net_157)) \r
+ _reg_144 <= _reg_145&(~_reg_145_goto);\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_159 <= 1'b0;\r
-else if ((_net_176)) \r
- _reg_159 <= _reg_160;\r
+ _reg_145 <= 1'b0;\r
+else if ((_net_156)) \r
+ _reg_145 <= (_reg_145_goin|_reg_146)|fs_fifo1_charge;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
- _reg_160 <= 1'b0;\r
-else if ((_net_175)) \r
- _reg_160 <= _reg_161;\r
+ _reg_146 <= 1'b0;\r
+else if ((_reg_146)) \r
+ _reg_146 <= 1'b0;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_161 <= 1'b0;\r
-else if ((_net_174)) \r
- _reg_161 <= _reg_162&(~_reg_162_goto);\r
+else if ((_net_182)) \r
+ _reg_161 <= _reg_162;\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_162 <= 1'b0;\r
-else if ((_net_173)) \r
- _reg_162 <= (_reg_162_goin|_reg_163)|fs_fifo2_charge;\r
+else if ((_net_181)) \r
+ _reg_162 <= _reg_162_goin|(_reg_163&(~_reg_163_goto));\r
end\r
always @(posedge m_clock or negedge p_reset)\r
begin\r
if (~p_reset)\r
_reg_163 <= 1'b0;\r
-else if ((_reg_163)) \r
- _reg_163 <= 1'b0;\r
+else if ((_net_180)) \r
+ _reg_163 <= _reg_164;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_164 <= 1'b0;\r
+else if ((_net_179)) \r
+ _reg_164 <= _reg_165;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_165 <= 1'b0;\r
+else if ((_net_178)) \r
+ _reg_165 <= _reg_166&(~_reg_166_goto);\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_166 <= 1'b0;\r
+else if ((_net_177)) \r
+ _reg_166 <= (_reg_166_goin|_reg_167)|fs_fifo2_charge;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_167 <= 1'b0;\r
+else if ((_reg_167)) \r
+ _reg_167 <= 1'b0;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_190 <= 1'b0;\r
+else if ((_net_640)) \r
+ _reg_190 <= _reg_191&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_191 <= 1'b0;\r
+else if ((_net_639)) \r
+ _reg_191 <= _reg_192|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_192 <= 1'b0;\r
+else if ((_net_638)) \r
+ _reg_192 <= _reg_193&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_193 <= 1'b0;\r
+else if ((_net_637)) \r
+ _reg_193 <= _reg_194|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_194 <= 1'b0;\r
+else if ((_net_636)) \r
+ _reg_194 <= _reg_195&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_195 <= 1'b0;\r
+else if ((_net_635)) \r
+ _reg_195 <= _reg_196|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_196 <= 1'b0;\r
+else if ((_net_634)) \r
+ _reg_196 <= _reg_197&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_197 <= 1'b0;\r
+else if ((_net_633)) \r
+ _reg_197 <= _reg_198|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_198 <= 1'b0;\r
+else if ((_net_632)) \r
+ _reg_198 <= _reg_199&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_199 <= 1'b0;\r
+else if ((_net_631)) \r
+ _reg_199 <= _reg_200|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_200 <= 1'b0;\r
+else if ((_net_630)) \r
+ _reg_200 <= _reg_201&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_201 <= 1'b0;\r
+else if ((_net_629)) \r
+ _reg_201 <= _reg_202|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_202 <= 1'b0;\r
+else if ((_net_628)) \r
+ _reg_202 <= _reg_203&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_203 <= 1'b0;\r
+else if ((_net_627)) \r
+ _reg_203 <= _reg_204|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_204 <= 1'b0;\r
+else if ((_net_626)) \r
+ _reg_204 <= _reg_205&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_205 <= 1'b0;\r
+else if ((_net_625)) \r
+ _reg_205 <= _reg_206|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_206 <= 1'b0;\r
+else if ((_net_624)) \r
+ _reg_206 <= _reg_207&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_207 <= 1'b0;\r
+else if ((_net_623)) \r
+ _reg_207 <= _reg_208|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_208 <= 1'b0;\r
+else if ((_net_622)) \r
+ _reg_208 <= _reg_209&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_209 <= 1'b0;\r
+else if ((_net_621)) \r
+ _reg_209 <= _reg_210|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_210 <= 1'b0;\r
+else if ((_net_620)) \r
+ _reg_210 <= _reg_211&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_211 <= 1'b0;\r
+else if ((_net_619)) \r
+ _reg_211 <= _reg_212|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_212 <= 1'b0;\r
+else if ((_net_618)) \r
+ _reg_212 <= _reg_213&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_213 <= 1'b0;\r
+else if ((_net_617)) \r
+ _reg_213 <= _reg_214|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_214 <= 1'b0;\r
+else if ((_net_616)) \r
+ _reg_214 <= _reg_215&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_215 <= 1'b0;\r
+else if ((_net_615)) \r
+ _reg_215 <= _reg_216|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_216 <= 1'b0;\r
+else if ((_net_614)) \r
+ _reg_216 <= _reg_217&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_217 <= 1'b0;\r
+else if ((_net_613)) \r
+ _reg_217 <= _reg_218|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_218 <= 1'b0;\r
+else if ((_net_612)) \r
+ _reg_218 <= _reg_219&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_219 <= 1'b0;\r
+else if ((_net_611)) \r
+ _reg_219 <= _reg_220|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_220 <= 1'b0;\r
+else if ((_net_610)) \r
+ _reg_220 <= _reg_221&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_221 <= 1'b0;\r
+else if ((_net_609)) \r
+ _reg_221 <= _reg_222|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_222 <= 1'b0;\r
+else if ((_net_608)) \r
+ _reg_222 <= _reg_223&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_223 <= 1'b0;\r
+else if ((_net_607)) \r
+ _reg_223 <= _reg_224|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_224 <= 1'b0;\r
+else if ((_net_606)) \r
+ _reg_224 <= _reg_225&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_225 <= 1'b0;\r
+else if ((_net_605)) \r
+ _reg_225 <= _reg_226|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_226 <= 1'b0;\r
+else if ((_net_604)) \r
+ _reg_226 <= _reg_227&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_227 <= 1'b0;\r
+else if ((_net_603)) \r
+ _reg_227 <= _reg_228|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_228 <= 1'b0;\r
+else if ((_net_602)) \r
+ _reg_228 <= _reg_229&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_229 <= 1'b0;\r
+else if ((_net_601)) \r
+ _reg_229 <= _reg_230|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_230 <= 1'b0;\r
+else if ((_net_600)) \r
+ _reg_230 <= _reg_231&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_231 <= 1'b0;\r
+else if ((_net_599)) \r
+ _reg_231 <= (_reg_232&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_232 <= 1'b0;\r
+else if ((_net_598)) \r
+ _reg_232 <= (_reg_233&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_233 <= 1'b0;\r
+else if ((_net_597)) \r
+ _reg_233 <= _reg_234|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_234 <= 1'b0;\r
+else if ((_net_596)) \r
+ _reg_234 <= _reg_235&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_235 <= 1'b0;\r
+else if ((_net_595)) \r
+ _reg_235 <= _reg_236|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_236 <= 1'b0;\r
+else if ((_net_594)) \r
+ _reg_236 <= _reg_237&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_237 <= 1'b0;\r
+else if ((_net_593)) \r
+ _reg_237 <= _reg_238|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_238 <= 1'b0;\r
+else if ((_net_592)) \r
+ _reg_238 <= _reg_239&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_239 <= 1'b0;\r
+else if ((_net_591)) \r
+ _reg_239 <= _reg_240|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_240 <= 1'b0;\r
+else if ((_net_590)) \r
+ _reg_240 <= _reg_241&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_241 <= 1'b0;\r
+else if ((_net_589)) \r
+ _reg_241 <= _reg_242|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_242 <= 1'b0;\r
+else if ((_net_588)) \r
+ _reg_242 <= _reg_243&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_243 <= 1'b0;\r
+else if ((_net_587)) \r
+ _reg_243 <= _reg_244|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_244 <= 1'b0;\r
+else if ((_net_586)) \r
+ _reg_244 <= _reg_245&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_245 <= 1'b0;\r
+else if ((_net_585)) \r
+ _reg_245 <= _reg_246|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_246 <= 1'b0;\r
+else if ((_net_584)) \r
+ _reg_246 <= _reg_247&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_247 <= 1'b0;\r
+else if ((_net_583)) \r
+ _reg_247 <= _reg_248|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_248 <= 1'b0;\r
+else if ((_net_582)) \r
+ _reg_248 <= _reg_249&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_249 <= 1'b0;\r
+else if ((_net_581)) \r
+ _reg_249 <= _reg_250|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_250 <= 1'b0;\r
+else if ((_net_580)) \r
+ _reg_250 <= _reg_251&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_251 <= 1'b0;\r
+else if ((_net_579)) \r
+ _reg_251 <= _reg_252|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_252 <= 1'b0;\r
+else if ((_net_578)) \r
+ _reg_252 <= _reg_253&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_253 <= 1'b0;\r
+else if ((_net_577)) \r
+ _reg_253 <= _reg_254|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_254 <= 1'b0;\r
+else if ((_net_576)) \r
+ _reg_254 <= _reg_255&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_255 <= 1'b0;\r
+else if ((_net_575)) \r
+ _reg_255 <= _reg_256|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_256 <= 1'b0;\r
+else if ((_net_574)) \r
+ _reg_256 <= _reg_257&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_257 <= 1'b0;\r
+else if ((_net_573)) \r
+ _reg_257 <= _reg_258|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_258 <= 1'b0;\r
+else if ((_net_572)) \r
+ _reg_258 <= _reg_259&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_259 <= 1'b0;\r
+else if ((_net_571)) \r
+ _reg_259 <= _reg_260|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_260 <= 1'b0;\r
+else if ((_net_570)) \r
+ _reg_260 <= _reg_261&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_261 <= 1'b0;\r
+else if ((_net_569)) \r
+ _reg_261 <= _reg_262|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_262 <= 1'b0;\r
+else if ((_net_568)) \r
+ _reg_262 <= _reg_263&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_263 <= 1'b0;\r
+else if ((_net_567)) \r
+ _reg_263 <= _reg_264|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_264 <= 1'b0;\r
+else if ((_net_566)) \r
+ _reg_264 <= _reg_265&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_265 <= 1'b0;\r
+else if ((_net_565)) \r
+ _reg_265 <= _reg_266|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_266 <= 1'b0;\r
+else if ((_net_564)) \r
+ _reg_266 <= _reg_267&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_267 <= 1'b0;\r
+else if ((_net_563)) \r
+ _reg_267 <= _reg_268|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_268 <= 1'b0;\r
+else if ((_net_562)) \r
+ _reg_268 <= _reg_269&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_269 <= 1'b0;\r
+else if ((_net_561)) \r
+ _reg_269 <= (_reg_270&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_270 <= 1'b0;\r
+else if ((_net_560)) \r
+ _reg_270 <= (_reg_271&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_271 <= 1'b0;\r
+else if ((_net_559)) \r
+ _reg_271 <= _reg_272|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_272 <= 1'b0;\r
+else if ((_net_558)) \r
+ _reg_272 <= _reg_273&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_273 <= 1'b0;\r
+else if ((_net_557)) \r
+ _reg_273 <= _reg_274|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_274 <= 1'b0;\r
+else if ((_net_556)) \r
+ _reg_274 <= _reg_275&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_275 <= 1'b0;\r
+else if ((_net_555)) \r
+ _reg_275 <= _reg_276|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_276 <= 1'b0;\r
+else if ((_net_554)) \r
+ _reg_276 <= _reg_277&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_277 <= 1'b0;\r
+else if ((_net_553)) \r
+ _reg_277 <= _reg_278|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_278 <= 1'b0;\r
+else if ((_net_552)) \r
+ _reg_278 <= _reg_279&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_279 <= 1'b0;\r
+else if ((_net_551)) \r
+ _reg_279 <= _reg_280|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_280 <= 1'b0;\r
+else if ((_net_550)) \r
+ _reg_280 <= _reg_281&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_281 <= 1'b0;\r
+else if ((_net_549)) \r
+ _reg_281 <= _reg_282|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_282 <= 1'b0;\r
+else if ((_net_548)) \r
+ _reg_282 <= _reg_283&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_283 <= 1'b0;\r
+else if ((_net_547)) \r
+ _reg_283 <= _reg_284|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_284 <= 1'b0;\r
+else if ((_net_546)) \r
+ _reg_284 <= _reg_285&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_285 <= 1'b0;\r
+else if ((_net_545)) \r
+ _reg_285 <= _reg_286|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_286 <= 1'b0;\r
+else if ((_net_544)) \r
+ _reg_286 <= _reg_287&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_287 <= 1'b0;\r
+else if ((_net_543)) \r
+ _reg_287 <= _reg_288|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_288 <= 1'b0;\r
+else if ((_net_542)) \r
+ _reg_288 <= _reg_289&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_289 <= 1'b0;\r
+else if ((_net_541)) \r
+ _reg_289 <= _reg_290|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_290 <= 1'b0;\r
+else if ((_net_540)) \r
+ _reg_290 <= _reg_291&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_291 <= 1'b0;\r
+else if ((_net_539)) \r
+ _reg_291 <= _reg_292|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_292 <= 1'b0;\r
+else if ((_net_538)) \r
+ _reg_292 <= _reg_293&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_293 <= 1'b0;\r
+else if ((_net_537)) \r
+ _reg_293 <= _reg_294|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_294 <= 1'b0;\r
+else if ((_net_536)) \r
+ _reg_294 <= _reg_295&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_295 <= 1'b0;\r
+else if ((_net_535)) \r
+ _reg_295 <= _reg_296|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_296 <= 1'b0;\r
+else if ((_net_534)) \r
+ _reg_296 <= _reg_297&_proc_p_wait_reset;\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_297 <= 1'b0;\r
+else if ((_net_533)) \r
+ _reg_297 <= (_reg_298&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_298 <= 1'b0;\r
+else if ((_net_532)) \r
+ _reg_298 <= (_reg_299&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_299 <= 1'b0;\r
+else if ((_net_531)) \r
+ _reg_299 <= (_reg_300&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_300 <= 1'b0;\r
+else if ((_net_530)) \r
+ _reg_300 <= (_reg_301&_proc_p_wait_reset)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_301 <= 1'b0;\r
+else if ((_net_529)) \r
+ _reg_301 <= (_reg_302|test_write)|(p_wait&(~_proc_p_wait_reset));\r
+end\r
+always @(posedge m_clock or negedge p_reset)\r
+ begin\r
+if (~p_reset)\r
+ _reg_302 <= 1'b0;\r
+else if ((_reg_302)) \r
+ _reg_302 <= 1'b0;\r
end\r
endmodule\r
/*\r
- Produced by NSL Core(version=20110302), IP ARCH, Inc. Sat Aug 20 23:09:39 2011\r
+ Produced by NSL Core(version=20110302), IP ARCH, Inc. Sun Sep 04 23:25:48 2011\r
Licensed to Yujiro_Kaneko::yujiro.kaneko@overtone.co.jp \r
*/\r
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