rendering thread is running on masked CPUs.
Bit 0 is for CPU-0, bit 1 is for CPU-1...
-- qcom,l2pc-update-queue:
- Disables L2PC on masked CPUs at queue time when it's true.
-
- qcom,snapshot-size:
Specify the size of snapshot in bytes. This will override
snapshot size defined in the driver code.
/* make sure ADRENO_DEVICE_STARTED is not set here */
BUG_ON(test_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv));
- /* disallow l2pc during wake up to improve GPU wake up time */
- kgsl_pwrctrl_update_l2pc(&adreno_dev->dev,
- KGSL_L2PC_WAKEUP_TIMEOUT);
-
pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
pmqos_wakeup_vote);
spin_unlock(&drawctxt->lock);
- if (device->pwrctrl.l2pc_update_queue)
- kgsl_pwrctrl_update_l2pc(&adreno_dev->dev,
- KGSL_L2PC_QUEUE_TIMEOUT);
+ kgsl_pwrctrl_update_l2pc(&adreno_dev->dev);
/* Add the context to the dispatcher pending list */
dispatcher_queue_context(adreno_dev, drawctxt);
#define DEFAULT_BUS_P 25
+/*
+ * The effective duration of qos request in usecs. After
+ * timeout, qos request is cancelled automatically.
+ * Kept 80ms default, inline with default GPU idle time.
+ */
+#define KGSL_L2PC_CPU_TIMEOUT (80 * 1000)
+
/* Order deeply matters here because reasons. New entries go on the end */
static const char * const clocks[] = {
"src_clk",
/**
* kgsl_pwrctrl_update_l2pc() - Update existing qos request
* @device: Pointer to the kgsl_device struct
- * @timeout_us: the effective duration of qos request in usecs.
*
* Updates an existing qos request to avoid L2PC on the
* CPUs (which are selected through dtsi) on which GPU
* thread is running. This would help for performance.
*/
-void kgsl_pwrctrl_update_l2pc(struct kgsl_device *device,
- unsigned long timeout_us)
+void kgsl_pwrctrl_update_l2pc(struct kgsl_device *device)
{
int cpu;
pm_qos_update_request_timeout(
&device->pwrctrl.l2pc_cpus_qos,
device->pwrctrl.pm_qos_cpu_mask_latency,
- timeout_us);
+ KGSL_L2PC_CPU_TIMEOUT);
}
}
EXPORT_SYMBOL(kgsl_pwrctrl_update_l2pc);
kgsl_property_read_u32(device, "qcom,l2pc-cpu-mask",
&pwr->l2pc_cpus_mask);
- pwr->l2pc_update_queue = of_property_read_bool(
- device->pdev->dev.of_node,
- "qcom,l2pc-update-queue");
-
pm_runtime_enable(&pdev->dev);
ocmem_bus_node = of_find_node_by_name(
#define KGSL_PWR_DEL_LIMIT 1
#define KGSL_PWR_SET_LIMIT 2
-/*
- * The effective duration of qos request in usecs at queue time.
- * After timeout, qos request is cancelled automatically.
- * Kept 80ms default, inline with default GPU idle time.
- */
-#define KGSL_L2PC_QUEUE_TIMEOUT (80 * 1000)
-
-/*
- * The effective duration of qos request in usecs at wakeup time.
- * After timeout, qos request is cancelled automatically.
- */
-#define KGSL_L2PC_WAKEUP_TIMEOUT (10 * 1000)
-
enum kgsl_pwrctrl_timer_type {
KGSL_PWR_IDLE_TIMER,
};
* @irq_name - resource name for the IRQ
* @clk_stats - structure of clock statistics
* @l2pc_cpus_mask - mask to avoid L2PC on masked CPUs
- * @l2pc_update_queue - Boolean flag to avoid L2PC on masked CPUs at queue time
* @l2pc_cpus_qos - qos structure to avoid L2PC on CPUs
* @pm_qos_req_dma - the power management quality of service structure
* @pm_qos_active_latency - allowed CPU latency in microseconds when active
const char *irq_name;
struct kgsl_clk_stats clk_stats;
unsigned int l2pc_cpus_mask;
- bool l2pc_update_queue;
struct pm_qos_request l2pc_cpus_qos;
struct pm_qos_request pm_qos_req_dma;
unsigned int pm_qos_active_latency;
void kgsl_pwrctrl_busy_time(struct kgsl_device *device, u64 time, u64 busy);
void kgsl_pwrctrl_set_constraint(struct kgsl_device *device,
struct kgsl_pwr_constraint *pwrc, uint32_t id);
-void kgsl_pwrctrl_update_l2pc(struct kgsl_device *device,
- unsigned long timeout_us);
+void kgsl_pwrctrl_update_l2pc(struct kgsl_device *device);
#endif /* __KGSL_PWRCTRL_H */