OSDN Git Service
George Burgess IV [Mon, 11 Jun 2018 22:58:32 +0000 (22:58 +0000)]
Simplify; NFC
Not shown in the diff: AQ is a `vector<SUnit *>`, and SU is a `SUnit *`
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334451
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Wei Mi [Mon, 11 Jun 2018 22:51:28 +0000 (22:51 +0000)]
Fix a warning reported by clang but not by gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334449
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Wei Mi [Mon, 11 Jun 2018 22:40:43 +0000 (22:40 +0000)]
[SampleFDO] Add a new compact binary format for sample profile.
Name table occupies a big chunk of size in current binary format sample profile.
In order to reduce its size, the patch changes the sample writer/reader to
save/restore MD5Hash of names in the name table. Sample annotation phase will
also use MD5Hash of name to query samples accordingly.
Experiment shows compact binary format can reduce the size of sample profile by
2/3 compared with binary format generally.
Differential Revision: https://reviews.llvm.org/D47955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334447
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David Blaikie [Mon, 11 Jun 2018 22:14:43 +0000 (22:14 +0000)]
TableGen: Change some pointer parameters to references since they're never null anyway
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334446
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Konstantin Zhuravlyov [Mon, 11 Jun 2018 21:37:57 +0000 (21:37 +0000)]
AMDGPU: Add 64-bit relative variant kind
Differential Revision: https://reviews.llvm.org/D47601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334443
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Matt Arsenault [Mon, 11 Jun 2018 21:27:41 +0000 (21:27 +0000)]
DAG: Fix extract_subvector combine for a single element
This would fail before because 1x vectors aren't legal,
so instead just use the scalar type.
Avoids regressions in a future AMDGPU commit to add
v4i16/v4f16 as legal types.
Test update is just the one test that this triggers
on in tree now. It wasn't checking anything before.
The result is completely changed since the selects
are eliminated. Not sure if it's considered better
or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334440
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Craig Topper [Mon, 11 Jun 2018 20:50:58 +0000 (20:50 +0000)]
[X86] Push some variable declarations down into the individual switch cases that need them. NFC
All of the cases are already wrapped in curly braces so declaring a variable there isn't an issue. And the variables aren't assigned or used in the larger scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334436
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Farhana Aleen [Mon, 11 Jun 2018 20:29:31 +0000 (20:29 +0000)]
[SLP] Add testcases of min/max reduction pattern for AMDGPU.
Author: FarhanaAleen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334435
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Tim Shen [Mon, 11 Jun 2018 19:56:12 +0000 (19:56 +0000)]
Fix incorrect CHECK-LABEL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334434
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Craig Topper [Mon, 11 Jun 2018 19:20:15 +0000 (19:20 +0000)]
[X86] Reorder some type constraints to force things to be vectors and integer/fp before forcing them to be the same size.
This may be needed by another patch that I'm working on. It should have no effect on any of the generated outputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334430
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Justin Lebar [Mon, 11 Jun 2018 18:57:58 +0000 (18:57 +0000)]
[SCEV] Add transform zext((A * B * ...)<nuw>) --> (zext(A) * zext(B) * ...)<nuw>.
Reviewers: sanjoy
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D48041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334429
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Justin Lebar [Mon, 11 Jun 2018 18:57:42 +0000 (18:57 +0000)]
[SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags where safe.
Summary:
Previously we would add them for adds, but not multiplies.
Reviewers: sanjoy
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D48038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334428
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Justin Lebar [Mon, 11 Jun 2018 18:57:27 +0000 (18:57 +0000)]
Fix indentation in ScalarEvolution.cpp.
Whitespace-only change. (clang-formatted the whole block.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334427
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Krzysztof Parzyszek [Mon, 11 Jun 2018 18:45:52 +0000 (18:45 +0000)]
[Hexagon] Late predicate producers cannot be used as dot-new sources
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334426
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Tim Shen [Mon, 11 Jun 2018 18:44:58 +0000 (18:44 +0000)]
[SCEV] Canonicalize "A /u C1 /u C2" to "A /u (C1*C2)".
Summary: FWIW InstCombine already folds this. Also avoid the case where C1*C2 overflows.
Reviewers: sunfish, sanjoy
Subscribers: hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D47965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334425
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Simon Pilgrim [Mon, 11 Jun 2018 17:28:00 +0000 (17:28 +0000)]
[X86][AVX512] Tag AVX5124FMAPS/AVX5124VNNIW with missing scheduler classes
Necessary for D46276 as even though btver2 doesn't use these instructions, its now flagged as complete so complains if ANY instruction isn't tagged.....
UnsupportedFeatures wouldn't help here as these instructions don't appear to have a feature predicate (like a lot of AVX512).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334423
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Stanislav Mekhanoshin [Mon, 11 Jun 2018 16:50:49 +0000 (16:50 +0000)]
[AMDGPU] Do not consider indirect acces through phi for wave limiter
Rational: if there is indirect access that is usually an issue
because load is not ready by the use. However, if use is inside a
loop and load is outside that is potentially an issue for a first
iteration only.
Differential Revision: https://reviews.llvm.org/D47740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334420
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Aleksandar Beserminji [Mon, 11 Jun 2018 16:50:28 +0000 (16:50 +0000)]
[mips] Fix spill slot for mips3, n64 abi
When program is compiled for mips3 with n64 abi, wrong register class
is used for creating an emergency spill slot. This patch fixes the
correct register class to be chosen.
This patch resolves PR35859.
Thanks to John Baldwin for reporting the issue!
Differential Revision: https://reviews.llvm.org/D47938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334419
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Dylan McKay [Mon, 11 Jun 2018 14:46:48 +0000 (14:46 +0000)]
[AVR] Set trackLivenessAfterRegAlloc
This sets trackLivenessAfterRegAlloc on AVRRegisterInfo.
Most existing targets set this flag. Without it, specific IR inputs
cause LLVM to fail with:
Assertion failed: (getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) &&
"Liveness information is accurate"), function livein_begin
file MachineBasicBlock.cpp, line 1354.
With this commit, this no longer happens.
Patch by Peter Nimmervoll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334409
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Clement Courbet [Mon, 11 Jun 2018 14:37:53 +0000 (14:37 +0000)]
[X86] Fix skylake server scheduling info.
Summary:
This fixes most of the scheduling info for SKX vector operations.
I had to split a lot of the YMM/ZMM classes into separate classes for YMM and ZMM.
The before/after llvm-exegesis analysis are in the phabricator diff.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47721
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334407
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Guillaume Chatelet [Mon, 11 Jun 2018 14:10:10 +0000 (14:10 +0000)]
[llvm-exegesis] Fix unhandled error.
Summary: Fixing an unhandled error when calling writeYaml.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334405
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Sanjay Patel [Mon, 11 Jun 2018 13:51:34 +0000 (13:51 +0000)]
[x86] add scalar cvtt intrinsic tests; NFC
More coverage for the problem noted in D47993 (although these shouldn't be affected by that patch).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334404
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Pavel Labath [Mon, 11 Jun 2018 13:30:47 +0000 (13:30 +0000)]
Fix build errors on some configurations
It's been reported
<http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20180611/559616.html>
that template argument deduction for RetryAfterSignal fails if open is
not prefixed with "::".
This should help us build correctly on those platforms and explicitly
specifying the namespace is more correct anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334403
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Pavel Labath [Mon, 11 Jun 2018 10:28:04 +0000 (10:28 +0000)]
Move VersionTuple from clang/Basic to llvm/Support
Summary:
This kind of functionality is useful to other project apart from clang.
LLDB works with version numbers a lot, but it does not have a convenient
abstraction for this. Moving this class to a lower level library allows
it to be freely used within LLDB.
Since this class is used in a lot of places in clang, and it used to be
in the clang namespace, it seemed appropriate to add it to the list of
adopted classes in LLVM.h to avoid prefixing all uses with "llvm::".
Also, I didn't find any tests specific for this class, so I wrote a
couple of quick ones for the more interesting bits of functionality.
Reviewers: zturner, erik.pilkington
Subscribers: mgorny, cfe-commits, llvm-commits
Differential Revision: https://reviews.llvm.org/D47887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334399
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Roman Lebedev [Mon, 11 Jun 2018 10:21:10 +0000 (10:21 +0000)]
[NFC][AMDGPU] Add tests for all the various IR patterns equivalent to extracting low bits.
Summary:
The idiom recognition seems rather poor.
Only the `@bzhi32_d0` produces `v_bfe_u32`.
But they all should.
This needs to be fixed before D47980 can be re-landed.
Reviewers: mareko, bogner, rampitec, arsenm, tstellar, nhaehnle
Reviewed By: nhaehnle
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #amdgpu
Differential Revision: https://reviews.llvm.org/D48005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334398
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Roman Lebedev [Mon, 11 Jun 2018 09:20:21 +0000 (09:20 +0000)]
[Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples
Summary:
Lack of that support has taken me by surprise.
I need to add (or at least look at) some tests for https://reviews.llvm.org/D47980#
1127615,
and i don't really fancy doing that by hand.
The asm pattern is quite similar to that of x86:
https://godbolt.org/g/hfgeds
just with `#` replaced with `;`
Reviewers: spatel, RKSimon, MaskRay, tstellar, arsenm
Reviewed By: arsenm
Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, rampitec, bogner, mareko, llvm-commits
Tags: #amdgpu
Differential Revision: https://reviews.llvm.org/D48001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334396
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Guillaume Chatelet [Mon, 11 Jun 2018 09:18:01 +0000 (09:18 +0000)]
[llvm-exegesis] Program should succeed if benchmark returns StringError.
Summary: Fix for https://bugs.llvm.org/show_bug.cgi?id=37759.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334395
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Mikhail Maltsev [Mon, 11 Jun 2018 09:15:37 +0000 (09:15 +0000)]
[Unittests] Change linker flags of dynamic library tests
A recent change https://reviews.llvm.org/D46898 which had no intended
behavior change, actually modified the linker flags used when linking
the dynamic libraries used by the DynamicLibraryTests unit test. This
made the test fail in our testing environment which runs the tests
from an NFS share. Prior to D46898 the two libraries used by the test
were different (because the library name used to be embedded into the
binary), and after the change they became bit-to-bit identical. This
causes dlopen to return the same handle when these two libraries are
loaded from an NFS share, and the test expects two different handles.
This patch reverts the part of D46898 that is responsible for
changing the linker flags.
Differential Revision: https://reviews.llvm.org/D47469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334394
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Clement Courbet [Mon, 11 Jun 2018 07:33:08 +0000 (07:33 +0000)]
[ExynosM1][Sched] Fix resource usage in scheduling model.
This is part of https://reviews.llvm.org/D46356.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334391
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Clement Courbet [Mon, 11 Jun 2018 07:00:08 +0000 (07:00 +0000)]
[X86] Explicitly mark unsupported classes in scheduling models.
Summary: In preparation for D47721. HSW and SNB still define unsupported
classes as they are used by KNL and generic models respectively.
Reviewers: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334389
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Craig Topper [Mon, 11 Jun 2018 06:22:41 +0000 (06:22 +0000)]
[X86] Add encoding tests for avx5124fmaps and avx5124vnni instructions.
I forgot to git add these in r333812
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334387
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Craig Topper [Mon, 11 Jun 2018 06:20:24 +0000 (06:20 +0000)]
[X86] Add test files for upgrade of vbmi2 expand load and compress store intrinsics that was done in r334381.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334386
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Craig Topper [Mon, 11 Jun 2018 06:18:22 +0000 (06:18 +0000)]
[X86] Remove masking from dbpsadbw intrinsics, use select in IR instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334384
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Daniel Cederman [Mon, 11 Jun 2018 05:50:08 +0000 (05:50 +0000)]
[Sparc] Add support for 13-bit PIC
Summary: When compiling with -fpic, in contrast to -fPIC, use only the
immediate field to index into the GOT. This saves space if the GOT is
known to be small. The linker will warn if the GOT is too large for
this method.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: brad, fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D47136
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334383
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Brock Wyma [Mon, 11 Jun 2018 01:39:34 +0000 (01:39 +0000)]
[CodeView] Omit forward references for unnamed structs and unions
Codeview references to unnamed structs and unions are expected to refer to the
complete type definition instead of a forward reference so Visual Studio can
resolve the type properly.
Differential Revision: https://reviews.llvm.org/D32498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334382
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Craig Topper [Mon, 11 Jun 2018 01:25:22 +0000 (01:25 +0000)]
[X86] Remove and autoupgrade the expandload and compressstore intrinsics.
We use the target independent intrinsics now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334381
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Craig Topper [Sun, 10 Jun 2018 23:15:49 +0000 (23:15 +0000)]
[TableGen] Make better use of std::map::emplace and emplace construct the object in the map rather than moving it into it. Remove a use std::map::find by remembering the return from emplace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334380
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Craig Topper [Sun, 10 Jun 2018 23:15:48 +0000 (23:15 +0000)]
[TableGen] Combine two constructors by taking vectors by value instead of trying to support combininations for rvalue and lvalue references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334379
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Sanjay Patel [Sun, 10 Jun 2018 23:09:50 +0000 (23:09 +0000)]
[DAGCombiner] match vector compare and select sizes with extload operand (PR37427)
This patch started off much more general and ambitious, but it's been a nightmare
seeing all the ways x86 vector codegen can go wrong.
So the code is still structured to allow extending easily, but it's currently
limited in several ways:
1. Only handle cases with an extending load.
2. Only handle cases with a zero constant compare.
3. Ignore setcc with vector bitmask (SetCCWidth != 1) - so AVX512 should be unaffected.
The motivating case from PR37427:
https://bugs.llvm.org/show_bug.cgi?id=37427
...is the 1st test, and that shows the expected win - we eliminated the unnecessary
intermediate cast.
There's a clear regression in the last test (sgt_zero_fp_select) because we longer
recognize a 'SHRUNKBLEND' opportunity. I think that general problem is also present
in sgt_zero, so I'll try to fix that in a follow-up. We need to match a sign-bit
setcc from a sign-extended operand and remove it.
Differential Revision: https://reviews.llvm.org/D47330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334378
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Craig Topper [Sun, 10 Jun 2018 21:48:24 +0000 (21:48 +0000)]
[X86] Miscellaneous fixes to get the load folding table generator to work again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334377
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Florian Hahn [Sun, 10 Jun 2018 21:06:24 +0000 (21:06 +0000)]
Revert r334374 [TableGen] Move some shared_ptrs to avoid unnecessary copies (NFC).
This breaks some builders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334376
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Zachary Turner [Sun, 10 Jun 2018 20:57:14 +0000 (20:57 +0000)]
Attempt 3: Resubmit "[Support] Expose flattenWindowsCommandLine."
I took some liberties and quoted fewer characters than before,
based on an article from MSDN which says that only certain characters
cause an arg to require quoting. This seems to be incorrect, though,
and worse it seems to be a difference in Windows version. The bot
that fails is Windows 7, and I can't reproduce the failure on Win
10. But it's definitely related to quoting and special characters,
because both tests that fail have a * in the argument, which is one
of the special characters that would cause an argument to be quoted
before but not any longer after the new patch.
Since I don't have Win 7, all I can do is just guess that I need to
restore the old quoting rules. So this patch does that in hopes that
it fixes the problem on Windows 7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334375
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Florian Hahn [Sun, 10 Jun 2018 20:38:52 +0000 (20:38 +0000)]
[TableGen] Move some shared_ptrs to avoid unnecessary copies (NFC).
Those changes were suggested post-commit for D47463.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334374
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Roman Lebedev [Sun, 10 Jun 2018 20:32:03 +0000 (20:32 +0000)]
Revert rL334371 / D47980: "[InstCombine] Fold (x << y) >> y -> x & (-1 >> y)"
test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll broke,
and i did not notice because i did not build that backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334373
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Roman Lebedev [Sun, 10 Jun 2018 20:10:13 +0000 (20:10 +0000)]
[InstCombine] Fold (x >> y) << y -> x & (-1 << y)
Summary:
We already do it for matching splat constants, but not just values.
Further improvements for non-matching splat constants, as noted in
https://reviews.llvm.org/D46760#
1123713 will be needed,
but i'd prefer to do that as a follow-up.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://rise4fun.com/Alive/cplX
https://rise4fun.com/Alive/0HF
Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47981
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334372
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Roman Lebedev [Sun, 10 Jun 2018 20:10:06 +0000 (20:10 +0000)]
[InstCombine] Fold (x << y) >> y -> x & (-1 >> y)
Summary:
We already do it for splat constants, but not just values.
Also, undef cases are mostly non-functional.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://rise4fun.com/Alive/cplX
Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334371
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Roman Lebedev [Sun, 10 Jun 2018 20:10:00 +0000 (20:10 +0000)]
[NFC][InstCombine] Revisit tests for D47980 / D47981 once more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334370
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Craig Topper [Sun, 10 Jun 2018 18:55:37 +0000 (18:55 +0000)]
[X86] Add expandload and compresstore fast-isel tests for avx512f and avx512vl. Update existing tests for avx512vbmi2 to use target independent intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334368
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Sanjay Patel [Sun, 10 Jun 2018 17:42:12 +0000 (17:42 +0000)]
[x86] add tests for potentially miscompiling cvttp2si (PR37751); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334367
91177308-0d34-0410-b5e6-
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Craig Topper [Sun, 10 Jun 2018 17:27:00 +0000 (17:27 +0000)]
[X86] Remove GCCBuiltin from some intrinsics so we can custom handle them in clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334365
91177308-0d34-0410-b5e6-
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Ivan A. Kosarev [Sun, 10 Jun 2018 09:27:27 +0000 (09:27 +0000)]
[NEON] Support VST1xN intrinsics in AArch32 mode (LLVM part)
We currently support them only in AArch64. The NEON Reference,
however, says they are 'ARMv7, ARMv8' intrinsics.
Differential Revision: https://reviews.llvm.org/D47447
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334361
91177308-0d34-0410-b5e6-
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Craig Topper [Sun, 10 Jun 2018 06:43:48 +0000 (06:43 +0000)]
[X86] Fix forward declaration in a test case that was messed up in r334358
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334360
91177308-0d34-0410-b5e6-
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Craig Topper [Sun, 10 Jun 2018 06:01:36 +0000 (06:01 +0000)]
[X86] Remove masking from the 512-bit masked floating point add/sub/mul/div intrinsics. Use a select in IR instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334358
91177308-0d34-0410-b5e6-
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Fangrui Song [Sun, 10 Jun 2018 04:53:14 +0000 (04:53 +0000)]
Cleanup. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334357
91177308-0d34-0410-b5e6-
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Zachary Turner [Sun, 10 Jun 2018 03:16:25 +0000 (03:16 +0000)]
Revert "Resubmit "[Support] Expose flattenWindowsCommandLine.""
This reverts commit
65243b6d19143cb7a03f68df0169dcb63e8b4632.
Seems like it's not a flake. It might have something to do with
the '*' character being in a command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334356
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Zachary Turner [Sun, 10 Jun 2018 02:46:11 +0000 (02:46 +0000)]
Resubmit "[Support] Expose flattenWindowsCommandLine."
There were a few linux compilation failures, but other than that
I think this was just a flake that caused the tests to fail. I'm
going to resubmit and see if the failures go away, if not I'll
revert again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334355
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Zachary Turner [Sat, 9 Jun 2018 23:07:39 +0000 (23:07 +0000)]
Revert "[Support] Expose flattenWindowsCommandLine."
This reverts commit
10d2e88e87150a35dc367ba30716189d2af26774.
This is causing some test failures for some reason, reverting
while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334354
91177308-0d34-0410-b5e6-
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Zachary Turner [Sat, 9 Jun 2018 22:44:44 +0000 (22:44 +0000)]
[Support] Expose flattenWindowsCommandLine.
This function was internal to Program.inc, but I've needed this
on several occasions when I've had to use CreateProcess without
llvm's sys::Execute functions. In doing so, I noticed that the
function was written using unsafe C-string access and was pretty
hard to understand / make sense of, so I've also re-written the
functions to use more modern LLVM constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334353
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Sat, 9 Jun 2018 16:08:25 +0000 (16:08 +0000)]
[CostModel][X86] Add 'select' style shuffle costs tests (PR33744)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334351
91177308-0d34-0410-b5e6-
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Roman Lebedev [Sat, 9 Jun 2018 14:01:46 +0000 (14:01 +0000)]
[NFC][InstCombine] More tests for (x >> y) << y -> x & (-1 << y) fold.
Followup for rL334347.
The fold is also valid for ashr.
https://rise4fun.com/Alive/0HF
https://bugs.llvm.org/show_bug.cgi?id=37603
https://reviews.llvm.org/D46760#
1123713
https://rise4fun.com/Alive/cplX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334349
91177308-0d34-0410-b5e6-
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Roman Lebedev [Sat, 9 Jun 2018 09:27:43 +0000 (09:27 +0000)]
[NFC][InstCombine] Tests for (x >> y) << y -> x & (-1 << y) fold.
We already do it for splat constants, but not just values.
Also, undef cases are mostly non-functional.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://reviews.llvm.org/D46760#
1123713
https://rise4fun.com/Alive/cplX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334347
91177308-0d34-0410-b5e6-
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Roman Lebedev [Sat, 9 Jun 2018 09:27:39 +0000 (09:27 +0000)]
[NFC][InstCombine] Tests for (x << y) >> y -> x & (-1 >> y) fold.
We already do it for splat constants, but not just values.
Also, undef cases are mostly non-functional.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://rise4fun.com/Alive/cplX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334346
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Gabor Buella [Sat, 9 Jun 2018 09:19:40 +0000 (09:19 +0000)]
[X86] NFC Use member initialization in X86Subtarget
The separate initializeEnvironment function was sort of
useless since r217071.
ARM did this move already with r273556.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334345
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Serge Pavlov [Sat, 9 Jun 2018 05:19:45 +0000 (05:19 +0000)]
Use uniform mechanism for OOM errors handling
This is a recommit of r333506, which was reverted in r333518.
The original commit message is below.
In r325551 many calls of malloc/calloc/realloc were replaces with calls of
their safe counterparts defined in the namespace llvm. There functions
generate crash if memory cannot be allocated, such behavior facilitates
handling of out of memory errors on Windows.
If the result of *alloc function were checked for success, the function was
not replaced with the safe variant. In these cases the calling function made
the error handling, like:
T *NewElts = static_cast<T*>(malloc(NewCapacity*sizeof(T)));
if (NewElts == nullptr)
report_bad_alloc_error("Allocation of SmallVector element failed.");
Actually knowledge about the function where OOM occurred is useless. Moreover
having a single entry point for OOM handling is convenient for investigation
of memory problems. This change removes custom OOM errors handling and
replaces them with calls to functions `llvm::safe_*alloc`.
Declarations of `safe_*alloc` are moved to a separate include file, to avoid
cyclic dependency in SmallVector.h
Differential Revision: https://reviews.llvm.org/D47440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334344
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Craig Topper [Sat, 9 Jun 2018 05:04:20 +0000 (05:04 +0000)]
Use SmallPtrSet instead of SmallSet in places where we iterate over the set.
SmallSet forwards to SmallPtrSet for pointer types. SmallPtrSet supports iteration, but a normal SmallSet doesn't. So if it wasn't for the forwarding, this wouldn't work.
These places were found by hiding the begin/end methods in the SmallSet forwarding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334343
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Daniel Sanders [Fri, 8 Jun 2018 23:12:29 +0000 (23:12 +0000)]
[tablegen] Improve performance on *GenRegisterInfo.inc by replacing SparseVector with BitVector. NFC
Summary: Generating X86GenRegisterInfo.inc and AArch64GenRegisterInfo.inc is 8-9% faster on my build.
Reviewers: bogner, javed.absar
Reviewed By: bogner
Subscribers: llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D47907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334337
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Craig Topper [Fri, 8 Jun 2018 21:49:09 +0000 (21:49 +0000)]
[X86] Remove GCCBuiltin from some intrinsics so we can do custom IR generation from clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334328
91177308-0d34-0410-b5e6-
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Eli Friedman [Fri, 8 Jun 2018 21:33:33 +0000 (21:33 +0000)]
[LangRef] fptosi and fptoui return poison on overflow.
I think we assume poison, not undef, for certain transforms we
currently do. In any case, we should clarify the language here.
(This sort of conversion is undefined behavior according to the C
and C++ standards. And in practice, hardware implementations handle
overflow inconsistently, so it would be difficult to define the
result here.)
Differential Revision: https://reviews.llvm.org/D47851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334326
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Eli Friedman [Fri, 8 Jun 2018 21:23:09 +0000 (21:23 +0000)]
[LangRef] insertelement/extractelement return poison for out of range.
We need to clarify the language here. I think poison makes more sense
than undef, since it's an undefined operation rather than uninitialized
memory. I don't think anything depends on the difference at the moment,
though.
Differential Revision: https://reviews.llvm.org/D47859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334325
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Ryan Prichard [Fri, 8 Jun 2018 21:21:55 +0000 (21:21 +0000)]
Test commit: remove a blank line
Test commit access
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334324
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Eli Friedman [Fri, 8 Jun 2018 21:16:56 +0000 (21:16 +0000)]
[ARM] Allow CMPZ transforms even if the input has multiple uses.
It looks like this got left in by accident in r289794; I can't think of
any reason this check would be necessary. (Maybe it was meant to be a
check that the AND has one use? But we check that a few lines earlier.)
Differential Revision: https://reviews.llvm.org/D47921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334322
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Florian Hahn [Fri, 8 Jun 2018 21:14:49 +0000 (21:14 +0000)]
[SmallSet] Add some simple unit tests.
Reviewers: craig.topper, dblaikie
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D47940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334321
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Krzysztof Parzyszek [Fri, 8 Jun 2018 20:43:07 +0000 (20:43 +0000)]
[SCEV] Look through zero-extends in howFarToZero
An expression like
(zext i2 {(trunc i32 (1 + %B) to i2),+,1}<%while.body> to i32)
will become zero exactly when the nested value becomes zero in its type.
Strip injective operations from the input value in howFarToZero to make
the value simpler.
Differential Revision: https://reviews.llvm.org/D47951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334318
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Davide Italiano [Fri, 8 Jun 2018 20:42:36 +0000 (20:42 +0000)]
[InstCombine] Skip dbg.value(s) when looking at stack{save,restore}.
Fixes PR37713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334317
91177308-0d34-0410-b5e6-
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Sanjay Patel [Fri, 8 Jun 2018 18:47:33 +0000 (18:47 +0000)]
[InstCombine] add llvm.assume + debuginfo test (PR37726); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334314
91177308-0d34-0410-b5e6-
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Reid Kleckner [Fri, 8 Jun 2018 18:33:16 +0000 (18:33 +0000)]
[asan] Instrument comdat globals on COFF targets
Summary:
If we can use comdats, then we can make it so that the global metadata
is thrown away if the prevailing definition of the global was
uninstrumented. I have only tested this on COFF targets, but in theory,
there is no reason that we cannot also do this for ELF.
This will allow us to re-enable string merging with ASan on Windows,
reducing the binary size cost of ASan on Windows.
Reviewers: eugenis, vitalybuka
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D47841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334313
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Sanjay Patel [Fri, 8 Jun 2018 18:00:46 +0000 (18:00 +0000)]
[DAGCombiner] clean up comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334312
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 8 Jun 2018 17:58:42 +0000 (17:58 +0000)]
[X86][SSE] Support v8i16/v16i16 rotations
Extension to D46954 (PR37426), this patch adds support for v8i16/v16i16 rotations in a similar manner - the conversion of the shift/rotate amount to a multiplication factor and the use of PMULLW to shift left and PMULHUW (ISD::MULHU) to shift the wrapped bits back around to be ORd together.
Differential Revision: https://reviews.llvm.org/D47822
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334309
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Sanjay Patel [Fri, 8 Jun 2018 17:54:28 +0000 (17:54 +0000)]
[x86] add tests for node-level FMF; NFC
These cases should be optimized using the change from D47911.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334308
91177308-0d34-0410-b5e6-
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Sanjay Patel [Fri, 8 Jun 2018 17:42:35 +0000 (17:42 +0000)]
[x86] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334307
91177308-0d34-0410-b5e6-
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Michael Berg [Fri, 8 Jun 2018 17:39:50 +0000 (17:39 +0000)]
Utilize new SDNode flag functionality to expand current support for fsub
Summary: This patch originated from D46562 and is a proper subset, with some issues addressed for fsub.
Reviewers: spatel, hfinkel, wristow, arsenm
Reviewed By: spatel
Subscribers: wdng
Differential Revision: https://reviews.llvm.org/D47910
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334306
91177308-0d34-0410-b5e6-
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Florian Hahn [Fri, 8 Jun 2018 17:30:45 +0000 (17:30 +0000)]
[VPlan] Move recipe construction to VPRecipeBuilder.
This patch moves the recipe-creation functions out of
LoopVectorizationPlanner, which should do the high-level
orchestration of the transformations.
Reviewers: dcaballe, rengolin, hsaito, Ayal
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D47595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334305
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Simon Pilgrim [Fri, 8 Jun 2018 17:00:45 +0000 (17:00 +0000)]
[X86][BtVer2] Add support for all SUB/XOR 32/64 scalar instructions that should match the dependency-breaking 'zero-idiom'
As detailed on Agner's Microarchitecture doc (21.8 AMD Bobcat and Jaguar pipeline - Dependency-breaking instructions), these instructions are dependency breaking and fast-path zero the destination register (and appropriate EFLAGS bits).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334303
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Simon Pilgrim [Fri, 8 Jun 2018 16:40:15 +0000 (16:40 +0000)]
[X86] Fix schedule-x86_64.s tests to use different registers in reg-reg cases
Same fix as rL334110: I noticed while working on zero-idiom + dependency-breaking support (PR36671) that most of our binary instruction schedule tests were reusing the same src registers, which would cause the tests to fail once we enable scalar zero-idiom support on btver2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334302
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Daniil Fukalov [Fri, 8 Jun 2018 16:29:04 +0000 (16:29 +0000)]
[AMDGPU] Inline asm - added i16, half and i128 types support
AMDGPU inline assembler support i16, half and i128 typed variables in constraints, but they were reported as error.
Needed to fix https://github.com/RadeonOpenCompute/ROCm/issues/341,
e.g. to be able to load with global_load_dwordx4 to a 128bit integer variable
Differential Revision: https://reviews.llvm.org/D44920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334301
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Daniil Fukalov [Fri, 8 Jun 2018 16:22:52 +0000 (16:22 +0000)]
reapply r334209 with fixes for harfbuzz in Chromium
r334209 description:
[LSR] Check yet more intrinsic pointer operands
the patch fixes another assertion in isLegalUse()
Differential Revision: https://reviews.llvm.org/D47794
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334300
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Roman Lebedev [Fri, 8 Jun 2018 15:44:53 +0000 (15:44 +0000)]
[NFC][InstSimplify] SimplifyAddInst(): coding style: variable names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334299
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Roman Lebedev [Fri, 8 Jun 2018 15:44:47 +0000 (15:44 +0000)]
[InstSimplify] add nuw %x, -1 -> -1 fold.
Summary:
`%ret = add nuw i8 %x, C`
From [[ https://llvm.org/docs/LangRef.html#add-instruction | langref ]]:
nuw and nsw stand for “No Unsigned Wrap” and “No Signed Wrap”,
respectively. If the nuw and/or nsw keywords are present,
the result value of the add is a poison value if unsigned
and/or signed overflow, respectively, occurs.
So if `C` is `-1`, `%x` can only be `0`, and the result is always `-1`.
I'm not sure we want to use `KnownBits`/`LVI` here, because there is
exactly one possible value (all bits set, `-1`), so some other pass
should take care of replacing the known-all-ones with constant `-1`.
The `test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll` change *is* confusing.
What happening is, before this: (omitting `nuw` for simplicity)
1. First, InstCombine D47428/rL334127 folds `shl i32 1, %NBits`) to `shl nuw i32 -1, %NBits`
2. Then, InstSimplify D47883/rL334222 folds `shl nuw i32 -1, %NBits` to `-1`,
3. `-1` is inverted to `0`.
But now:
1. *This* InstSimplify fold `%ret = add nuw i32 %setbit, -1` -> `-1` happens first,
before InstCombine D47428/rL334127 fold could happen.
Thus we now end up with the opposite constant,
and it is all good: https://rise4fun.com/Alive/OA9
https://rise4fun.com/Alive/sldC
Was mentioned in D47428 review.
Follow-up for D47883.
Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334298
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 8 Jun 2018 15:43:00 +0000 (15:43 +0000)]
[X86][BtVer2] Remove SBB tests that were accidentally added in rL334296
These aren't true zero-idiom instructions (just dependency breaking).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334297
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 8 Jun 2018 15:28:43 +0000 (15:28 +0000)]
[X86][BtVer2] Add tests for scalar SUB/XOR instructions that should match the dependency-breaking 'zero-idiom'
As detailed on Agner's Microarchitecture doc (21.8 AMD Bobcat and Jaguar pipeline - Dependency-breaking instructions).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334296
91177308-0d34-0410-b5e6-
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Alexander Kornienko [Fri, 8 Jun 2018 15:19:16 +0000 (15:19 +0000)]
commandLineFitsWithinSystemLimits Overestimates System Limits
Summary:
The function `llvm::sys::commandLineFitsWithinSystemLimits` appears to be overestimating the system limits. This issue was discovered while attempting to enable response files in the Swift compiler. When the compiler submits its frontend jobs, those jobs are subjected to the system limits on command line length. `commandLineFitsWithinSystemLimits` is used to determine if the job's arguments need to be wrapped in a response file. There are some cases where the argument size for the job passes `commandLineFitsWithinSystemLimits`, but actually exceeds the real system limit, and the job fails.
`clang` also uses this function to decide whether or not to wrap it's job arguments in response files. See: https://github.com/llvm-mirror/clang/blob/master/lib/Driver/Driver.cpp#L1341. Clang will also fail for response files who's size falls within a certain range. I wrote a script that should find a failure point for `clang++`. All that is needed to run it is Python 2.7, and a simple "hello world" program for `test.cc`. It should run on Linux and on macOS. The script is available here: https://gist.github.com/dabelknap/
71bd083cd06b91c5b3cef6a7f4d3d427. When it hits a failure point, you should see a `clang: error: unable to execute command: posix_spawn failed: Argument list too long`.
The proposed solution is to mirror the behavior of `xargs` in `commandLinefitsWithinSystemLimits`. `xargs` defaults to 128k for the command line length size (See: https://fossies.org/dox/findutils-4.6.0/buildcmd_8c_source.html#l00551). It adjusts this depending on the value of `ARG_MAX`.
Reviewers: alexfh
Reviewed By: alexfh
Subscribers: llvm-commits
Tags: #clang
Patch by Austin Belknap!
Differential Revision: https://reviews.llvm.org/D47795
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334295
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Zachary Turner [Fri, 8 Jun 2018 15:16:25 +0000 (15:16 +0000)]
Clean up some code in Program.
NFC here, this just raises some platform specific ifdef hackery
out of a class and creates proper platform-independent typedefs
for the relevant things. This allows these typedefs to be
reused in other places without having to reinvent this preprocessor
logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334294
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Zachary Turner [Fri, 8 Jun 2018 15:15:56 +0000 (15:15 +0000)]
Add a file open flag that disables O_CLOEXEC.
O_CLOEXEC is the right default, but occasionally you don't
want this. This is especially true for tools like debuggers
where you might need to spawn the child process with specific
files already open, but it's occasionally useful in other
scenarios as well, like when you want to do some IPC between
parent and child.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334293
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Simon Pilgrim [Fri, 8 Jun 2018 15:01:40 +0000 (15:01 +0000)]
[X86][BtVer2] Limit zero idiom tests to a single iteration.
Reduces output size and we're only wanting to check that the instructions are fast-path'd (just Dispatch+Retire) anyhow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334292
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Simon Pilgrim [Fri, 8 Jun 2018 14:53:52 +0000 (14:53 +0000)]
Fix Wdocumentation warning for unknown param. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334291
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Simon Pilgrim [Fri, 8 Jun 2018 14:07:21 +0000 (14:07 +0000)]
[X86][SSE] Add SSE2/AVX2 vector rotate tests
Now that we're custom lowering vector rotates for SSE in general we should be testing the combines with them as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334290
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Simon Pilgrim [Fri, 8 Jun 2018 13:59:11 +0000 (13:59 +0000)]
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
Simplify combineVectorTruncationWithPACKUS to mask the upper bits followed by calling truncateVectorWithPACK instead of duplicating with similar code.
This results in the codegen using (V)PACKUSDW on SSE41+ targets for vXi64/vXi32 inputs where before it always used PACKUSWB (along with a lot more bitcasting).
I've raised PR37749 as until we avoid unnecessary concats back to 256-bit for bitwise ops, we can't avoid splitting the input value into 128-bit subvectors for masking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334289
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Sanjay Patel [Fri, 8 Jun 2018 13:53:13 +0000 (13:53 +0000)]
[x86] restore test comment; NFC
The description got deleted along with the FIXME note in
rL334268.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334288
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Artur Pilipenko [Fri, 8 Jun 2018 13:03:21 +0000 (13:03 +0000)]
[BPI] Apply invoke heuristic before loop branch heuristic
Currently the loop branch heuristic is applied before the invoke heuristic which makes us overestimate the probability of the unwind destination of invokes inside loops. This in turn makes us grossly underestimate the frequencies of loops with invokes.
Reviewed By: skatkov, vsk
Differential Revision: https://reviews.llvm.org/D47371
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334285
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Florian Hahn [Fri, 8 Jun 2018 12:53:51 +0000 (12:53 +0000)]
[VPlan] Move recipe based VPlan generation to separate function.
This first step separates VPInstruction-based and VPRecipe-based
VPlan creation, which should make it easier to migrate to VPInstruction
based code-gen step by step.
Reviewers: Ayal, rengolin, dcaballe, hsaito, mkuper, mzolotukhin
Reviewed By: dcaballe
Subscribers: bollu, tschuett, rkruppe, llvm-commits
Differential Revision: https://reviews.llvm.org/D47477
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334284
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