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Konstantin Zhuravlyov [Tue, 12 Jun 2018 18:02:46 +0000 (18:02 +0000)]
AMDHSA: Code object v3 updates
- Do not emit following assembler directives:
- .hsa_code_object_version
- .hsa_code_object_isa
- .amd_amdgpu_isa
- .amd_amdgpu_hsa_metadata
- .amd_amdgpu_pal_metadata
- Do not emit .note entries
- Cleanup and bring in sync kernel descriptor header file
- Emit kernel descriptor into .rodata with appropriate relocations and
alignments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334519
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Zachary Turner [Tue, 12 Jun 2018 17:43:52 +0000 (17:43 +0000)]
Refactor ExecuteAndWait to take StringRefs.
This simplifies some code which had StringRefs to begin with, and
makes other code more complicated which had const char* to begin
with.
In the end, I think this makes for a more idiomatic and platform
agnostic API. Not all platforms launch process with null terminated
c-string arrays for the environment pointer and argv, but the api
was designed that way because it allowed easy pass-through for
posix-based platforms. There's a little additional overhead now
since on posix based platforms we'll be takign StringRefs which
were constructed from null terminated strings and then copying
them to null terminate them again, but from a readability and
usability standpoint of the API user, I think this API signature
is strictly better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334518
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Fangrui Song [Tue, 12 Jun 2018 16:20:44 +0000 (16:20 +0000)]
[MC] [X86] Teach leaq _GLOBAL_OFFSET_TABLE(%rip), %r15 to use R_X86_64_GOTPC32 instead of R_X86_64_PC32
Summary:
This is similar to D46319 (ARM). x86-64 psABI p40 gives an example:
leaq _GLOBAL_OFFSET_TABLE(%rip), %r15 # GOTPC32 reloc
GNU as creates R_X86_64_GOTPC32. However, MC currently emits R_X86_64_PC32.
Reviewers: javed.absar, echristo
Subscribers: kristof.beyls, llvm-commits, peter.smith, grimar
Differential Revision: https://reviews.llvm.org/D47507
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334515
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Michael Berg [Tue, 12 Jun 2018 16:13:11 +0000 (16:13 +0000)]
Utilize new SDNode flag functionality to expand current support for fmul
Summary: This patch originated from D46562 and is a proper subset, with some issues addressed for fmul.
Reviewers: spatel, hfinkel, wristow, arsenm
Reviewed By: spatel
Subscribers: nhaehnle, wdng
Differential Revision: https://reviews.llvm.org/D47911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334514
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Simon Pilgrim [Tue, 12 Jun 2018 16:12:29 +0000 (16:12 +0000)]
[CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select (PR33744)
As discussed on PR33744, this patch relaxes ShuffleKind::SK_Alternate which requires shuffle masks to only match an alternating pattern from its 2 sources:
e.g. v4f32: <0,5,2,7> or <4,1,6,3>
This seems far too restrictive as most SIMD hardware which will implement it using a general blend/bit-select instruction, so replaces it with SK_Select, permitting elements from either source as long as they are inline:
e.g. v4f32: <0,5,2,7>, <4,1,6,3>, <0,1,6,7>, <4,1,2,3> etc.
This initial patch just updates the name and cost model shuffle mask analysis, later patch reviews will update SLP to better utilise this - it still limits itself to SK_Alternate style patterns.
Differential Revision: https://reviews.llvm.org/D47985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334513
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Paul Robinson [Tue, 12 Jun 2018 16:09:03 +0000 (16:09 +0000)]
[DWARFv5] llvm-mc -dwarf-version does not imply -g.
Don't provide the assembler source as the "root file" unless the user
asked to have debug info for the assembler source (with -g).
If the source doesn't provide an explicit ".file 0" then (a) use the
compilation directory as directory #0, and (b) use the file #1 info
for file #0 also.
Differential Revision: https://reviews.llvm.org/D48055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334512
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Craig Topper [Tue, 12 Jun 2018 15:48:03 +0000 (15:48 +0000)]
[X86] Remove TB_ALIGN_16 from VEXTRACTF128/VEXTRACTI128 in the memory folding table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334511
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Simon Pilgrim [Tue, 12 Jun 2018 15:14:34 +0000 (15:14 +0000)]
Fix signed/unsigned warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334509
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Krzysztof Parzyszek [Tue, 12 Jun 2018 15:12:50 +0000 (15:12 +0000)]
[Hexagon] Make floating point operations expensive for vectorization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334508
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Simon Pilgrim [Tue, 12 Jun 2018 14:47:13 +0000 (14:47 +0000)]
[CostModel] Treat Identity shuffle masks as zero cost
As discussed on D47985, identity shuffle masks should probably be free.
I've limited this to the case where the input and output types all match - but we could probably accept all cases.
Differential Revision: https://reviews.llvm.org/D47986
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334506
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Sanjay Patel [Tue, 12 Jun 2018 14:21:51 +0000 (14:21 +0000)]
[x86] move shrunkblend transform to helper function; NFCI
We should be able to obsolete D48043 by easing the constraints
on this existing code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334504
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Clement Courbet [Tue, 12 Jun 2018 13:28:37 +0000 (13:28 +0000)]
[llvm-exegesis] Sum counter values when several counters are specified for a ProcRes.
Summary: This allows handling memory ports on SNB.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334502
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Guillaume Chatelet [Tue, 12 Jun 2018 13:07:16 +0000 (13:07 +0000)]
[llvm-exegesis] Move libpfm linking to LLVMExegesis.
Summary: This patch moves linking of libpfm from different places to a single one.
Reviewers: courbet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334499
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Krzysztof Parzyszek [Tue, 12 Jun 2018 12:49:36 +0000 (12:49 +0000)]
[SelectionDAG] Provide default expansion for rotates
Implement default legalization of rotates: either in terms of the rotation
in the opposite direction (if legal), or in terms of shifts and ors.
Implement generating of rotate instructions for Hexagon. Hexagon only
supports rotates by an immediate value, so implement custom lowering of
ROTL/ROTR on Hexagon. If a rotate is not legal, use the default expansion.
Differential Revision: https://reviews.llvm.org/D47725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334497
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Florian Hahn [Tue, 12 Jun 2018 11:16:56 +0000 (11:16 +0000)]
Use SmallPtrSet explicitly for SmallSets with pointer types (NFC).
Currently SmallSet<PointerTy> inherits from SmallPtrSet<PointerTy>. This
patch replaces such types with SmallPtrSet, because IMO it is slightly
clearer and allows us to get rid of unnecessarily including SmallSet.h
Reviewers: dblaikie, craig.topper
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D47836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334492
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Simon Dardis [Tue, 12 Jun 2018 10:28:06 +0000 (10:28 +0000)]
[mips] Guard some floating point instructions correctly
Reviewers: smaksimovic, atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D47636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334491
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Aleksandar Beserminji [Tue, 12 Jun 2018 10:23:49 +0000 (10:23 +0000)]
[mips] Extend LONG_BRANCH_LUi/ADDiu with extra parameter
Extend LONG_BRANCH_LUi and LONG_BRANCH_ADDiu pseudo instructions with
additional flag, so instead of always lowering to lui %hi(...),
addiu %lo(...) or addiu %hi(...), now they can lower to either %lo, %hi,
%higher or %highest depending on the added flag.
Differential Revision: https://reviews.llvm.org/D47941
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334490
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Luke Geeson [Tue, 12 Jun 2018 09:35:20 +0000 (09:35 +0000)]
[AArch64] Audit on rL333879 to fix FP16 64bit bitpatterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334488
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Simon Pilgrim [Tue, 12 Jun 2018 09:18:13 +0000 (09:18 +0000)]
[CostModel][X86] Add extra Identity shuffle mask cost tests (D47986)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334486
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Craig Topper [Tue, 12 Jun 2018 07:32:19 +0000 (07:32 +0000)]
[X86] Add NotMemoryFoldable to the VPCOMPRESS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334481
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Craig Topper [Tue, 12 Jun 2018 07:32:18 +0000 (07:32 +0000)]
[X86] Don't add stores to the autogenerated load folding tables if the register and memory operands have different widths.
This can cause the amount of the memory written to be changed which would be bad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334480
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Craig Topper [Tue, 12 Jun 2018 07:32:17 +0000 (07:32 +0000)]
[X86] Add NotMemoryFoldable to more instructions.
These include PUSH/POP instructions that don't match the manual table. This also includes CMPXCHG which we never emit in non-locked form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334479
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Craig Topper [Tue, 12 Jun 2018 07:32:15 +0000 (07:32 +0000)]
[X86] Update folding table generator to properly detect RMW arithmetic instructions.
The RMW instructions are detected by reading the SchedRW data, but the RMW instructions have had their SchedRW changed in recent months. This broke the expectation.
We probably should fix this to use the mayLoad/mayStore flags if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334478
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Wei Mi [Tue, 12 Jun 2018 05:53:49 +0000 (05:53 +0000)]
[NFC] Change sample profile format enum name SPF_Raw_Binary to SPF_Binary.
Some out-of-tree targets depend on the enum name SPF_Binary. Keep the name
can avoid unnecessary churn to those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334476
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Wei Mi [Tue, 12 Jun 2018 04:43:09 +0000 (04:43 +0000)]
Fix a typo in rL334447.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334475
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Craig Topper [Tue, 12 Jun 2018 04:34:59 +0000 (04:34 +0000)]
[X86] Add NotMemoryFoldable to a bunch of instructions to suppress them from the autogenerated load folding table.
Most of these are system instructions or other instructions we don't use in CodeGen. No point wasting space for them in the table. Removing them from the autogenerated table makes it easier to review the manual table.
A few are real opcode collisions where the memory and register forms are completely different instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334474
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Craig Topper [Tue, 12 Jun 2018 04:34:58 +0000 (04:34 +0000)]
[X86] Enforce agreement of AdSize field when autogenerating load folding table entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334473
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Michael Berg [Tue, 12 Jun 2018 00:52:43 +0000 (00:52 +0000)]
NFC, some additional tests added and some renaming for planned fma support changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334461
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Craig Topper [Tue, 12 Jun 2018 00:48:57 +0000 (00:48 +0000)]
[X86] Add isel patterns for folding loads when creating ROUND instructions from ffloor/fnearbyint/fceil/frint/ftrunc.
We were missing packed isel folding patterns for all of sse41, avx, and avx512.
For some reason avx512 had scalar load folding patterns under optsize(due to partial/undef reg update), but we didn't have the equivalent sse41 and avx patterns.
Sometimes we would get load folding due to peephole pass anyway, but we're also missing avx512 instructions from the load folding table. I'll try to fix that in another patch.
Some of this was spotted in the review for D47993.
This patch adds all the folds to isel, adds a few spot tests, and disables the peephole pass on a few tests to ensure we're testing some of these patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334460
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Mark Searles [Tue, 12 Jun 2018 00:41:26 +0000 (00:41 +0000)]
[AMDGPU] prevent hitting Assertion `isReg() && "Wrong MachineOperand accessor"'
The use iterator, used within findMaskOperands(), can return anything which is
not a def. isUse() requires a register, so check isReg() before calling isUse().
Differential Revision: https://reviews.llvm.org/D48047
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334459
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Wei Mi [Mon, 11 Jun 2018 23:39:02 +0000 (23:39 +0000)]
Fix a buildbot error reported by sanitizer-x86_64-linux-fast:
Function::getGUID may complain if its input is an empty StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334455
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Wei Mi [Mon, 11 Jun 2018 23:09:04 +0000 (23:09 +0000)]
Fix a warning issued by clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334453
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Justin Bogner [Mon, 11 Jun 2018 23:05:28 +0000 (23:05 +0000)]
[CMake] Fix dropped dependency in install-llvm-headers
This dependency was accidentally dropped in r319480, causing
install-distribution and install-llvm-headers to install an incomplete
set of headers (the generated Intrinsics and Attributes would be
missing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334452
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George Burgess IV [Mon, 11 Jun 2018 22:58:32 +0000 (22:58 +0000)]
Simplify; NFC
Not shown in the diff: AQ is a `vector<SUnit *>`, and SU is a `SUnit *`
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334451
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Wei Mi [Mon, 11 Jun 2018 22:51:28 +0000 (22:51 +0000)]
Fix a warning reported by clang but not by gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334449
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Wei Mi [Mon, 11 Jun 2018 22:40:43 +0000 (22:40 +0000)]
[SampleFDO] Add a new compact binary format for sample profile.
Name table occupies a big chunk of size in current binary format sample profile.
In order to reduce its size, the patch changes the sample writer/reader to
save/restore MD5Hash of names in the name table. Sample annotation phase will
also use MD5Hash of name to query samples accordingly.
Experiment shows compact binary format can reduce the size of sample profile by
2/3 compared with binary format generally.
Differential Revision: https://reviews.llvm.org/D47955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334447
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David Blaikie [Mon, 11 Jun 2018 22:14:43 +0000 (22:14 +0000)]
TableGen: Change some pointer parameters to references since they're never null anyway
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334446
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Konstantin Zhuravlyov [Mon, 11 Jun 2018 21:37:57 +0000 (21:37 +0000)]
AMDGPU: Add 64-bit relative variant kind
Differential Revision: https://reviews.llvm.org/D47601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334443
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Matt Arsenault [Mon, 11 Jun 2018 21:27:41 +0000 (21:27 +0000)]
DAG: Fix extract_subvector combine for a single element
This would fail before because 1x vectors aren't legal,
so instead just use the scalar type.
Avoids regressions in a future AMDGPU commit to add
v4i16/v4f16 as legal types.
Test update is just the one test that this triggers
on in tree now. It wasn't checking anything before.
The result is completely changed since the selects
are eliminated. Not sure if it's considered better
or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334440
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Craig Topper [Mon, 11 Jun 2018 20:50:58 +0000 (20:50 +0000)]
[X86] Push some variable declarations down into the individual switch cases that need them. NFC
All of the cases are already wrapped in curly braces so declaring a variable there isn't an issue. And the variables aren't assigned or used in the larger scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334436
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Farhana Aleen [Mon, 11 Jun 2018 20:29:31 +0000 (20:29 +0000)]
[SLP] Add testcases of min/max reduction pattern for AMDGPU.
Author: FarhanaAleen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334435
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Tim Shen [Mon, 11 Jun 2018 19:56:12 +0000 (19:56 +0000)]
Fix incorrect CHECK-LABEL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334434
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Craig Topper [Mon, 11 Jun 2018 19:20:15 +0000 (19:20 +0000)]
[X86] Reorder some type constraints to force things to be vectors and integer/fp before forcing them to be the same size.
This may be needed by another patch that I'm working on. It should have no effect on any of the generated outputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334430
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Justin Lebar [Mon, 11 Jun 2018 18:57:58 +0000 (18:57 +0000)]
[SCEV] Add transform zext((A * B * ...)<nuw>) --> (zext(A) * zext(B) * ...)<nuw>.
Reviewers: sanjoy
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D48041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334429
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Justin Lebar [Mon, 11 Jun 2018 18:57:42 +0000 (18:57 +0000)]
[SCEV] Add nuw/nsw to mul ops in StrengthenNoWrapFlags where safe.
Summary:
Previously we would add them for adds, but not multiplies.
Reviewers: sanjoy
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D48038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334428
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Justin Lebar [Mon, 11 Jun 2018 18:57:27 +0000 (18:57 +0000)]
Fix indentation in ScalarEvolution.cpp.
Whitespace-only change. (clang-formatted the whole block.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334427
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Krzysztof Parzyszek [Mon, 11 Jun 2018 18:45:52 +0000 (18:45 +0000)]
[Hexagon] Late predicate producers cannot be used as dot-new sources
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334426
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Tim Shen [Mon, 11 Jun 2018 18:44:58 +0000 (18:44 +0000)]
[SCEV] Canonicalize "A /u C1 /u C2" to "A /u (C1*C2)".
Summary: FWIW InstCombine already folds this. Also avoid the case where C1*C2 overflows.
Reviewers: sunfish, sanjoy
Subscribers: hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D47965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334425
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Simon Pilgrim [Mon, 11 Jun 2018 17:28:00 +0000 (17:28 +0000)]
[X86][AVX512] Tag AVX5124FMAPS/AVX5124VNNIW with missing scheduler classes
Necessary for D46276 as even though btver2 doesn't use these instructions, its now flagged as complete so complains if ANY instruction isn't tagged.....
UnsupportedFeatures wouldn't help here as these instructions don't appear to have a feature predicate (like a lot of AVX512).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334423
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Stanislav Mekhanoshin [Mon, 11 Jun 2018 16:50:49 +0000 (16:50 +0000)]
[AMDGPU] Do not consider indirect acces through phi for wave limiter
Rational: if there is indirect access that is usually an issue
because load is not ready by the use. However, if use is inside a
loop and load is outside that is potentially an issue for a first
iteration only.
Differential Revision: https://reviews.llvm.org/D47740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334420
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Aleksandar Beserminji [Mon, 11 Jun 2018 16:50:28 +0000 (16:50 +0000)]
[mips] Fix spill slot for mips3, n64 abi
When program is compiled for mips3 with n64 abi, wrong register class
is used for creating an emergency spill slot. This patch fixes the
correct register class to be chosen.
This patch resolves PR35859.
Thanks to John Baldwin for reporting the issue!
Differential Revision: https://reviews.llvm.org/D47938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334419
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Dylan McKay [Mon, 11 Jun 2018 14:46:48 +0000 (14:46 +0000)]
[AVR] Set trackLivenessAfterRegAlloc
This sets trackLivenessAfterRegAlloc on AVRRegisterInfo.
Most existing targets set this flag. Without it, specific IR inputs
cause LLVM to fail with:
Assertion failed: (getParent()->getProperties().hasProperty( MachineFunctionProperties::Property::TracksLiveness) &&
"Liveness information is accurate"), function livein_begin
file MachineBasicBlock.cpp, line 1354.
With this commit, this no longer happens.
Patch by Peter Nimmervoll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334409
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 11 Jun 2018 14:37:53 +0000 (14:37 +0000)]
[X86] Fix skylake server scheduling info.
Summary:
This fixes most of the scheduling info for SKX vector operations.
I had to split a lot of the YMM/ZMM classes into separate classes for YMM and ZMM.
The before/after llvm-exegesis analysis are in the phabricator diff.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47721
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334407
91177308-0d34-0410-b5e6-
96231b3b80d8
Guillaume Chatelet [Mon, 11 Jun 2018 14:10:10 +0000 (14:10 +0000)]
[llvm-exegesis] Fix unhandled error.
Summary: Fixing an unhandled error when calling writeYaml.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334405
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 11 Jun 2018 13:51:34 +0000 (13:51 +0000)]
[x86] add scalar cvtt intrinsic tests; NFC
More coverage for the problem noted in D47993 (although these shouldn't be affected by that patch).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334404
91177308-0d34-0410-b5e6-
96231b3b80d8
Pavel Labath [Mon, 11 Jun 2018 13:30:47 +0000 (13:30 +0000)]
Fix build errors on some configurations
It's been reported
<http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20180611/559616.html>
that template argument deduction for RetryAfterSignal fails if open is
not prefixed with "::".
This should help us build correctly on those platforms and explicitly
specifying the namespace is more correct anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334403
91177308-0d34-0410-b5e6-
96231b3b80d8
Pavel Labath [Mon, 11 Jun 2018 10:28:04 +0000 (10:28 +0000)]
Move VersionTuple from clang/Basic to llvm/Support
Summary:
This kind of functionality is useful to other project apart from clang.
LLDB works with version numbers a lot, but it does not have a convenient
abstraction for this. Moving this class to a lower level library allows
it to be freely used within LLDB.
Since this class is used in a lot of places in clang, and it used to be
in the clang namespace, it seemed appropriate to add it to the list of
adopted classes in LLVM.h to avoid prefixing all uses with "llvm::".
Also, I didn't find any tests specific for this class, so I wrote a
couple of quick ones for the more interesting bits of functionality.
Reviewers: zturner, erik.pilkington
Subscribers: mgorny, cfe-commits, llvm-commits
Differential Revision: https://reviews.llvm.org/D47887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334399
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Mon, 11 Jun 2018 10:21:10 +0000 (10:21 +0000)]
[NFC][AMDGPU] Add tests for all the various IR patterns equivalent to extracting low bits.
Summary:
The idiom recognition seems rather poor.
Only the `@bzhi32_d0` produces `v_bfe_u32`.
But they all should.
This needs to be fixed before D47980 can be re-landed.
Reviewers: mareko, bogner, rampitec, arsenm, tstellar, nhaehnle
Reviewed By: nhaehnle
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #amdgpu
Differential Revision: https://reviews.llvm.org/D48005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334398
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Mon, 11 Jun 2018 09:20:21 +0000 (09:20 +0000)]
[Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples
Summary:
Lack of that support has taken me by surprise.
I need to add (or at least look at) some tests for https://reviews.llvm.org/D47980#
1127615,
and i don't really fancy doing that by hand.
The asm pattern is quite similar to that of x86:
https://godbolt.org/g/hfgeds
just with `#` replaced with `;`
Reviewers: spatel, RKSimon, MaskRay, tstellar, arsenm
Reviewed By: arsenm
Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, rampitec, bogner, mareko, llvm-commits
Tags: #amdgpu
Differential Revision: https://reviews.llvm.org/D48001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334396
91177308-0d34-0410-b5e6-
96231b3b80d8
Guillaume Chatelet [Mon, 11 Jun 2018 09:18:01 +0000 (09:18 +0000)]
[llvm-exegesis] Program should succeed if benchmark returns StringError.
Summary: Fix for https://bugs.llvm.org/show_bug.cgi?id=37759.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334395
91177308-0d34-0410-b5e6-
96231b3b80d8
Mikhail Maltsev [Mon, 11 Jun 2018 09:15:37 +0000 (09:15 +0000)]
[Unittests] Change linker flags of dynamic library tests
A recent change https://reviews.llvm.org/D46898 which had no intended
behavior change, actually modified the linker flags used when linking
the dynamic libraries used by the DynamicLibraryTests unit test. This
made the test fail in our testing environment which runs the tests
from an NFS share. Prior to D46898 the two libraries used by the test
were different (because the library name used to be embedded into the
binary), and after the change they became bit-to-bit identical. This
causes dlopen to return the same handle when these two libraries are
loaded from an NFS share, and the test expects two different handles.
This patch reverts the part of D46898 that is responsible for
changing the linker flags.
Differential Revision: https://reviews.llvm.org/D47469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334394
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 11 Jun 2018 07:33:08 +0000 (07:33 +0000)]
[ExynosM1][Sched] Fix resource usage in scheduling model.
This is part of https://reviews.llvm.org/D46356.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334391
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 11 Jun 2018 07:00:08 +0000 (07:00 +0000)]
[X86] Explicitly mark unsupported classes in scheduling models.
Summary: In preparation for D47721. HSW and SNB still define unsupported
classes as they are used by KNL and generic models respectively.
Reviewers: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334389
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 11 Jun 2018 06:22:41 +0000 (06:22 +0000)]
[X86] Add encoding tests for avx5124fmaps and avx5124vnni instructions.
I forgot to git add these in r333812
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334387
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 11 Jun 2018 06:20:24 +0000 (06:20 +0000)]
[X86] Add test files for upgrade of vbmi2 expand load and compress store intrinsics that was done in r334381.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334386
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 11 Jun 2018 06:18:22 +0000 (06:18 +0000)]
[X86] Remove masking from dbpsadbw intrinsics, use select in IR instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334384
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Cederman [Mon, 11 Jun 2018 05:50:08 +0000 (05:50 +0000)]
[Sparc] Add support for 13-bit PIC
Summary: When compiling with -fpic, in contrast to -fPIC, use only the
immediate field to index into the GOT. This saves space if the GOT is
known to be small. The linker will warn if the GOT is too large for
this method.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: brad, fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D47136
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334383
91177308-0d34-0410-b5e6-
96231b3b80d8
Brock Wyma [Mon, 11 Jun 2018 01:39:34 +0000 (01:39 +0000)]
[CodeView] Omit forward references for unnamed structs and unions
Codeview references to unnamed structs and unions are expected to refer to the
complete type definition instead of a forward reference so Visual Studio can
resolve the type properly.
Differential Revision: https://reviews.llvm.org/D32498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334382
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 11 Jun 2018 01:25:22 +0000 (01:25 +0000)]
[X86] Remove and autoupgrade the expandload and compressstore intrinsics.
We use the target independent intrinsics now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334381
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 10 Jun 2018 23:15:49 +0000 (23:15 +0000)]
[TableGen] Make better use of std::map::emplace and emplace construct the object in the map rather than moving it into it. Remove a use std::map::find by remembering the return from emplace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334380
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 10 Jun 2018 23:15:48 +0000 (23:15 +0000)]
[TableGen] Combine two constructors by taking vectors by value instead of trying to support combininations for rvalue and lvalue references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334379
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 10 Jun 2018 23:09:50 +0000 (23:09 +0000)]
[DAGCombiner] match vector compare and select sizes with extload operand (PR37427)
This patch started off much more general and ambitious, but it's been a nightmare
seeing all the ways x86 vector codegen can go wrong.
So the code is still structured to allow extending easily, but it's currently
limited in several ways:
1. Only handle cases with an extending load.
2. Only handle cases with a zero constant compare.
3. Ignore setcc with vector bitmask (SetCCWidth != 1) - so AVX512 should be unaffected.
The motivating case from PR37427:
https://bugs.llvm.org/show_bug.cgi?id=37427
...is the 1st test, and that shows the expected win - we eliminated the unnecessary
intermediate cast.
There's a clear regression in the last test (sgt_zero_fp_select) because we longer
recognize a 'SHRUNKBLEND' opportunity. I think that general problem is also present
in sgt_zero, so I'll try to fix that in a follow-up. We need to match a sign-bit
setcc from a sign-extended operand and remove it.
Differential Revision: https://reviews.llvm.org/D47330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334378
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 10 Jun 2018 21:48:24 +0000 (21:48 +0000)]
[X86] Miscellaneous fixes to get the load folding table generator to work again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334377
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Sun, 10 Jun 2018 21:06:24 +0000 (21:06 +0000)]
Revert r334374 [TableGen] Move some shared_ptrs to avoid unnecessary copies (NFC).
This breaks some builders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334376
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Sun, 10 Jun 2018 20:57:14 +0000 (20:57 +0000)]
Attempt 3: Resubmit "[Support] Expose flattenWindowsCommandLine."
I took some liberties and quoted fewer characters than before,
based on an article from MSDN which says that only certain characters
cause an arg to require quoting. This seems to be incorrect, though,
and worse it seems to be a difference in Windows version. The bot
that fails is Windows 7, and I can't reproduce the failure on Win
10. But it's definitely related to quoting and special characters,
because both tests that fail have a * in the argument, which is one
of the special characters that would cause an argument to be quoted
before but not any longer after the new patch.
Since I don't have Win 7, all I can do is just guess that I need to
restore the old quoting rules. So this patch does that in hopes that
it fixes the problem on Windows 7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334375
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Sun, 10 Jun 2018 20:38:52 +0000 (20:38 +0000)]
[TableGen] Move some shared_ptrs to avoid unnecessary copies (NFC).
Those changes were suggested post-commit for D47463.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334374
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sun, 10 Jun 2018 20:32:03 +0000 (20:32 +0000)]
Revert rL334371 / D47980: "[InstCombine] Fold (x << y) >> y -> x & (-1 >> y)"
test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll broke,
and i did not notice because i did not build that backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334373
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sun, 10 Jun 2018 20:10:13 +0000 (20:10 +0000)]
[InstCombine] Fold (x >> y) << y -> x & (-1 << y)
Summary:
We already do it for matching splat constants, but not just values.
Further improvements for non-matching splat constants, as noted in
https://reviews.llvm.org/D46760#
1123713 will be needed,
but i'd prefer to do that as a follow-up.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://rise4fun.com/Alive/cplX
https://rise4fun.com/Alive/0HF
Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47981
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334372
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sun, 10 Jun 2018 20:10:06 +0000 (20:10 +0000)]
[InstCombine] Fold (x << y) >> y -> x & (-1 >> y)
Summary:
We already do it for splat constants, but not just values.
Also, undef cases are mostly non-functional.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://rise4fun.com/Alive/cplX
Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334371
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sun, 10 Jun 2018 20:10:00 +0000 (20:10 +0000)]
[NFC][InstCombine] Revisit tests for D47980 / D47981 once more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334370
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 10 Jun 2018 18:55:37 +0000 (18:55 +0000)]
[X86] Add expandload and compresstore fast-isel tests for avx512f and avx512vl. Update existing tests for avx512vbmi2 to use target independent intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334368
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 10 Jun 2018 17:42:12 +0000 (17:42 +0000)]
[x86] add tests for potentially miscompiling cvttp2si (PR37751); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334367
91177308-0d34-0410-b5e6-
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Craig Topper [Sun, 10 Jun 2018 17:27:00 +0000 (17:27 +0000)]
[X86] Remove GCCBuiltin from some intrinsics so we can custom handle them in clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334365
91177308-0d34-0410-b5e6-
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Ivan A. Kosarev [Sun, 10 Jun 2018 09:27:27 +0000 (09:27 +0000)]
[NEON] Support VST1xN intrinsics in AArch32 mode (LLVM part)
We currently support them only in AArch64. The NEON Reference,
however, says they are 'ARMv7, ARMv8' intrinsics.
Differential Revision: https://reviews.llvm.org/D47447
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334361
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 10 Jun 2018 06:43:48 +0000 (06:43 +0000)]
[X86] Fix forward declaration in a test case that was messed up in r334358
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334360
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sun, 10 Jun 2018 06:01:36 +0000 (06:01 +0000)]
[X86] Remove masking from the 512-bit masked floating point add/sub/mul/div intrinsics. Use a select in IR instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334358
91177308-0d34-0410-b5e6-
96231b3b80d8
Fangrui Song [Sun, 10 Jun 2018 04:53:14 +0000 (04:53 +0000)]
Cleanup. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334357
91177308-0d34-0410-b5e6-
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Zachary Turner [Sun, 10 Jun 2018 03:16:25 +0000 (03:16 +0000)]
Revert "Resubmit "[Support] Expose flattenWindowsCommandLine.""
This reverts commit
65243b6d19143cb7a03f68df0169dcb63e8b4632.
Seems like it's not a flake. It might have something to do with
the '*' character being in a command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334356
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Sun, 10 Jun 2018 02:46:11 +0000 (02:46 +0000)]
Resubmit "[Support] Expose flattenWindowsCommandLine."
There were a few linux compilation failures, but other than that
I think this was just a flake that caused the tests to fail. I'm
going to resubmit and see if the failures go away, if not I'll
revert again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334355
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Sat, 9 Jun 2018 23:07:39 +0000 (23:07 +0000)]
Revert "[Support] Expose flattenWindowsCommandLine."
This reverts commit
10d2e88e87150a35dc367ba30716189d2af26774.
This is causing some test failures for some reason, reverting
while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334354
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Sat, 9 Jun 2018 22:44:44 +0000 (22:44 +0000)]
[Support] Expose flattenWindowsCommandLine.
This function was internal to Program.inc, but I've needed this
on several occasions when I've had to use CreateProcess without
llvm's sys::Execute functions. In doing so, I noticed that the
function was written using unsafe C-string access and was pretty
hard to understand / make sense of, so I've also re-written the
functions to use more modern LLVM constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334353
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 9 Jun 2018 16:08:25 +0000 (16:08 +0000)]
[CostModel][X86] Add 'select' style shuffle costs tests (PR33744)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334351
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sat, 9 Jun 2018 14:01:46 +0000 (14:01 +0000)]
[NFC][InstCombine] More tests for (x >> y) << y -> x & (-1 << y) fold.
Followup for rL334347.
The fold is also valid for ashr.
https://rise4fun.com/Alive/0HF
https://bugs.llvm.org/show_bug.cgi?id=37603
https://reviews.llvm.org/D46760#
1123713
https://rise4fun.com/Alive/cplX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334349
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sat, 9 Jun 2018 09:27:43 +0000 (09:27 +0000)]
[NFC][InstCombine] Tests for (x >> y) << y -> x & (-1 << y) fold.
We already do it for splat constants, but not just values.
Also, undef cases are mostly non-functional.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://reviews.llvm.org/D46760#
1123713
https://rise4fun.com/Alive/cplX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334347
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Sat, 9 Jun 2018 09:27:39 +0000 (09:27 +0000)]
[NFC][InstCombine] Tests for (x << y) >> y -> x & (-1 >> y) fold.
We already do it for splat constants, but not just values.
Also, undef cases are mostly non-functional.
https://bugs.llvm.org/show_bug.cgi?id=37603
https://rise4fun.com/Alive/cplX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334346
91177308-0d34-0410-b5e6-
96231b3b80d8
Gabor Buella [Sat, 9 Jun 2018 09:19:40 +0000 (09:19 +0000)]
[X86] NFC Use member initialization in X86Subtarget
The separate initializeEnvironment function was sort of
useless since r217071.
ARM did this move already with r273556.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334345
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Pavlov [Sat, 9 Jun 2018 05:19:45 +0000 (05:19 +0000)]
Use uniform mechanism for OOM errors handling
This is a recommit of r333506, which was reverted in r333518.
The original commit message is below.
In r325551 many calls of malloc/calloc/realloc were replaces with calls of
their safe counterparts defined in the namespace llvm. There functions
generate crash if memory cannot be allocated, such behavior facilitates
handling of out of memory errors on Windows.
If the result of *alloc function were checked for success, the function was
not replaced with the safe variant. In these cases the calling function made
the error handling, like:
T *NewElts = static_cast<T*>(malloc(NewCapacity*sizeof(T)));
if (NewElts == nullptr)
report_bad_alloc_error("Allocation of SmallVector element failed.");
Actually knowledge about the function where OOM occurred is useless. Moreover
having a single entry point for OOM handling is convenient for investigation
of memory problems. This change removes custom OOM errors handling and
replaces them with calls to functions `llvm::safe_*alloc`.
Declarations of `safe_*alloc` are moved to a separate include file, to avoid
cyclic dependency in SmallVector.h
Differential Revision: https://reviews.llvm.org/D47440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334344
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 9 Jun 2018 05:04:20 +0000 (05:04 +0000)]
Use SmallPtrSet instead of SmallSet in places where we iterate over the set.
SmallSet forwards to SmallPtrSet for pointer types. SmallPtrSet supports iteration, but a normal SmallSet doesn't. So if it wasn't for the forwarding, this wouldn't work.
These places were found by hiding the begin/end methods in the SmallSet forwarding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334343
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 8 Jun 2018 23:12:29 +0000 (23:12 +0000)]
[tablegen] Improve performance on *GenRegisterInfo.inc by replacing SparseVector with BitVector. NFC
Summary: Generating X86GenRegisterInfo.inc and AArch64GenRegisterInfo.inc is 8-9% faster on my build.
Reviewers: bogner, javed.absar
Reviewed By: bogner
Subscribers: llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D47907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334337
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 8 Jun 2018 21:49:09 +0000 (21:49 +0000)]
[X86] Remove GCCBuiltin from some intrinsics so we can do custom IR generation from clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334328
91177308-0d34-0410-b5e6-
96231b3b80d8