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Brian Paul [Fri, 6 May 2016 15:46:29 +0000 (09:46 -0600)]
svga: null out all sampler views if start=num=0
Because the CSO module handles sampler views for fragment shaders
differently than vertex/geom shaders, VS/GS shader sampler views
aren't explicitly unbound like for FS sampler vers. This code
checks for the case of start=num=0 and nulls out the sampler views.
Fixes a assert regression in piglit's arb_texture_multisample-
sample-position test.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 10 May 2016 19:01:26 +0000 (13:01 -0600)]
st/mesa: remove unused st_context::default_texture
The code which used this was removed quite a while ago.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 6 May 2016 15:20:23 +0000 (09:20 -0600)]
cso: remove / add some comments
Signed-off-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Tue, 17 May 2016 19:57:44 +0000 (12:57 -0700)]
vc4: Add support for vertex color clamping in the rasterizer.
This gets us precompile of vertex shaders at the state tracker level as
well.
Eric Anholt [Tue, 17 May 2016 19:46:27 +0000 (12:46 -0700)]
vc4: Move tgsi_to_nir to precompile time.
Now we have an immutable nir shader in our shader's CSO that we can clone
and lower/optimize.
Eric Anholt [Tue, 17 May 2016 19:15:54 +0000 (12:15 -0700)]
vc4: Mark the driver as supporting fragment color clamping in rast.
We always clamp fragment colors, since they're always 8-bit unorm, so
there's no need to have us compile separate shaders based on
GL_ARB_color_buffer_float. This gives us precompilation of fragment
programs to the vc4_shader_state_create() level.
Eric Anholt [Tue, 17 May 2016 19:24:06 +0000 (12:24 -0700)]
vc4: Enable sharing shaders across contexts.
This allows the same pipe_shader_state to be referenced from multiple
contexts. Since our pipe_shader_state is treated as immutable (other than
the variant number) within the driver, this is no problem.
Eric Anholt [Tue, 17 May 2016 22:30:59 +0000 (15:30 -0700)]
vc4: Switch to using nir_load_front_face.
This will be generated by glsl_to_nir, and it turns out that this is a
more code-efficient path than the floating point math, anyway.
No change on shader-db, but drops an instruction in piglit's
glsl-fs-frontfacing.
Eric Anholt [Tue, 17 May 2016 19:35:44 +0000 (12:35 -0700)]
vc4: Drop the dead export_linkage array.
This came from deriving from freedreno.
Eric Anholt [Tue, 17 May 2016 21:06:39 +0000 (14:06 -0700)]
vc4: Fix a -Wformat-security warning.
This is apparently enabled as an error in Android builds, and the compiler
can't tell that the return value is safe.
Alex Deucher [Tue, 17 May 2016 21:10:50 +0000 (17:10 -0400)]
radeonsi: add new polaris11 pci ids
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 17 May 2016 21:06:26 +0000 (17:06 -0400)]
radeonsi: add new polaris10 pci ids
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Graunke [Fri, 13 May 2016 06:04:10 +0000 (23:04 -0700)]
i965: Make brw_reg_from_fs_reg() halve exec_size when compressed.
In
a5d7e144eaf43fee37e6ff9e2de194407087632b, Connor generalized the
exec_size halving code to handle more cases. As part of this, he made
it not halve anything if the region accessed falls completely in a
single register.
Unfortunately, it started producing some invalid regions:
-add(16) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 compr };
-add(16) g8<1>F g12<8,8,1>UW -g1.1<0,1,0>F { align1 compr };
+add(16) g6<1>F g10<16,16,1>UW -g1<0,1,0>F { align1 compr };
+add(16) g8<1>F g12<16,16,1>UW -g1.1<0,1,0>F { align1 compr };
Here, the UW source region completely fits within a register. However,
we have to use instruction compression because the destination region
spans two registers. <16,16,1> is invalid because it's compressed.
To handle this, skip the "everything fits in one register" case and
fall through to the exec_size halving case when compressed.
Fixes hundreds of Piglit regressions on GM965.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95370
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 16 May 2016 22:09:17 +0000 (15:09 -0700)]
i965: Move compression decisions before brw_reg_from_fs_reg().
brw_reg_from_fs_reg() needs to know whether the instruction will be
compressed or not.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95370
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 4 Apr 2016 06:03:34 +0000 (23:03 -0700)]
i965: Enable ES 3.2 sample shading extensions.
This enables:
- GL_OES_sample_shading
- GL_OES_sample_variables
- GL_OES_shader_multisample_interpolation
On Gen8, we pass all the CTS tests, and all but 4 of the dEQP-GLES31
tests (dealing with 1x/2x MSAA at half rate sampling). We believe
those 4 dEQP-GLES31 tests are incorrect.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jordan Justen [Tue, 17 May 2016 21:06:39 +0000 (14:06 -0700)]
anv: Fix warning: unused variable ‘cs_prog_data’
This was introduced in
8a80af282091e692da7bf4e412918ba2362dfb4f.
Reported-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Mauro Rossi [Tue, 17 May 2016 20:48:36 +0000 (22:48 +0200)]
android: fix building error in libmesa_st_mesa
Fixes the following building error due to libmesa_nir dependency:
In file included from external/mesa/src/mesa/state_tracker/st_glsl_to_nir.cpp:44:0:
external/mesa/src/compiler/nir/nir.h:42:25: fatal error: nir_opcodes.h: No such file or directory
#include "nir_opcodes.h"
^
compilation terminated.
build/core/binary.mk:706: recipe for target 'out/target/product/x86/obj/STATIC_LIBRARIES/libmesa_st_mesa_intermediates/state_tracker/st_glsl_to_nir.o' failed
make: *** [out/target/product/x86/obj/STATIC_LIBRARIES/libmesa_st_mesa_intermediates/state_tracker/st_glsl_to_nir.o] Error 1
make: *** Waiting for unfinished jobs....
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Nicolai Hähnle [Thu, 12 May 2016 17:44:44 +0000 (12:44 -0500)]
radeonsi: force level zero on image instructions in non-fragment shaders (v2)
Section 8.9 (Texture Functions) of the OpenGL Shading Language 4.5
specification:
However, automatic level of detail is computed only for fragment shaders.
Other shaders operate as though the base level of detail were computed as
zero.
and Section 8.9.3 (Texture Gather Functions):
When performing a texture gather operation, the minification and
magnification filters are ignored, and the rules for LINEAR filtering in
the OpenGL Specification are applied to the base level of the texture
image to identify the four texels i_0 j_1, i_1 j_1, i_1 j_0, and i_0 j_0.
Of course, explicit LOD or derivative variants work in all shader types.
This fixes several GL4x-CTS.texture_gather.* tests.
v2: TG4 is always level zero (thanks, Ilia)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 12 May 2016 16:52:36 +0000 (11:52 -0500)]
radeonsi: emit TXQ in separate functions
TXQ is sufficiently different that having in it in the same code path as
texture sampling/fetching opcodes doesn't make much sense.
v2: guard against NULL pointer dereferences
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Nicolai Hähnle [Fri, 6 May 2016 03:08:39 +0000 (22:08 -0500)]
winsys/amdgpu: cleanup error handling in amdgpu_ctx_create
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 5 May 2016 21:35:09 +0000 (16:35 -0500)]
winsys/amdgpu: avoid ioctl call when fence_wait is called without timeout
When user fences are used, we don't need the kernel for polling.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 6 May 2016 22:02:30 +0000 (17:02 -0500)]
gallium/radeon: add radeon_emitted to check for non-trivial IBs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 6 May 2016 22:07:10 +0000 (17:07 -0500)]
gallium/radeon: use radeon_emit_array
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 6 May 2016 21:42:03 +0000 (16:42 -0500)]
gallium/radeon: use radeon_emit
Mostly generated using a sed-script, with manual fix-up for multi-line
statements.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 13 May 2016 05:12:37 +0000 (00:12 -0500)]
st/mesa: fix reversed copyimage canonical format
The format_desc swizzle describes where in the array each color channel
comes from - but the existing code was written as if each entry in the
swizzle described the meaning of an array element.
Fixes piglit's arb_copy_image-format-swizzle.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jordan Justen [Thu, 12 May 2016 01:03:15 +0000 (18:03 -0700)]
Revert "HACK: Don't re-configure L3$ in render stages pre-BDW"
This reverts commit
41af9b2e517dd0c17e519490ca915b96f6898390.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94468
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sat, 2 Apr 2016 08:34:40 +0000 (01:34 -0700)]
anv: Port L3 cache programming from i965
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Tue, 12 Apr 2016 17:15:38 +0000 (10:15 -0700)]
anv/gen7: Add memory barrier to vkCmdWaitEvents call
We also have this barrier call for gen8 vkCmdWaitEvents.
We don't implement waiting on events for gen7 yet, but this barrier at
least helps to not regress CTS cases when data caching is enabled.
Without this, the tests would intermittently report a failure when the
data cache was enabled.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sat, 2 Apr 2016 20:44:55 +0000 (13:44 -0700)]
anv: Keep track of whether the data cache should be enabled in L3
If images or shader buffers are used, we will enable the data cache in
the the L3 config.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jordan Justen [Sat, 2 Apr 2016 08:25:05 +0000 (01:25 -0700)]
genxml/hsw: Add L3 cache control registers
These were added to the i965 driver in
5912da45a69923afa1b7f2eb5bb371d848813c41.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jan Vesely [Tue, 17 May 2016 13:25:44 +0000 (09:25 -0400)]
Treewide: Remove Elements() macro
Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Jan Vesely [Tue, 17 May 2016 17:29:40 +0000 (13:29 -0400)]
r600g,sb: Don't use standard macro name
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Jason Ekstrand [Mon, 16 May 2016 18:02:57 +0000 (11:02 -0700)]
anv/formats: Add support for VK_FORMAT_B4G4R4A4_UNORM pre-gen8
Jason Ekstrand [Mon, 16 May 2016 17:25:54 +0000 (10:25 -0700)]
anv: Add a devinfo argument to the get_format functions
Jason Ekstrand [Mon, 16 May 2016 04:50:47 +0000 (21:50 -0700)]
anv/formats: Set the swizzle to RGB1 when using an RGBA format to fake RGB
This way we get correct sampling from RGB formats that are faked as RGBA.
This should also cause it to disable rendering and blending on those
formats. We should be able to render to them and, on Broadwell and above,
we can blend on them with work-arounds. However, we'll add support for
that more properly later when it's deemed useful. For now, disabling
rendering and blending should be safe.
Jason Ekstrand [Mon, 16 May 2016 04:46:05 +0000 (21:46 -0700)]
anv/formats: Refactor anv_get_format
The new code removes the switch statement and instead handles depth/stencil
as up-front special cases. This allows for potentially more complicated
color format handling in the future.
Jason Ekstrand [Mon, 16 May 2016 04:41:55 +0000 (21:41 -0700)]
anv: Use 16 bits for the isl_format in anv_format
This way the entire anv_format structure fits in 32 bits
Jason Ekstrand [Mon, 16 May 2016 04:31:38 +0000 (21:31 -0700)]
anv/formats: Use the isl_channel_select enum for the swizzle
Jason Ekstrand [Mon, 16 May 2016 04:15:59 +0000 (21:15 -0700)]
anv/formats: Add an anv_get_format helper
This commit removes anv_format_for_vk_format and adds an anv_get_format
helper. The anv_get_format helper returns the anv_format by-value. Unlike
anv_format_for_vk_format the format returned by anv_get_format is 100%
accurate and includes any tweaks needed for tiled vs. linear.
anv_get_isl_format is now just a wrapper around anv_get_format that picks
off just the isl_format.
Jason Ekstrand [Sat, 14 May 2016 00:24:39 +0000 (17:24 -0700)]
anv/format: Simplify anv_format
Now that we have VkFormat introspection and we've removed everything that
tried to use anv_format for introspection, we no longer need most of what
was in anv_format.
Jason Ekstrand [Sat, 14 May 2016 00:08:16 +0000 (17:08 -0700)]
anv/formats: Delete validate_GetPhysicalDeviceFormatProperties
All it ever did was some extra logging that was useful when initially
bringing up Dota2. We don't need it anymore.
Jason Ekstrand [Sat, 14 May 2016 00:00:58 +0000 (17:00 -0700)]
anv/image: Use aspects for computing full usage
Jason Ekstrand [Fri, 13 May 2016 23:52:15 +0000 (16:52 -0700)]
anv: Remove the anv_format member from anv_image
Jason Ekstrand [Fri, 13 May 2016 23:55:08 +0000 (16:55 -0700)]
anv/wsi: Use vk_format_info for asserts rather than anv_format
Jason Ekstrand [Fri, 13 May 2016 23:54:00 +0000 (16:54 -0700)]
anv/copy: Use the linear format from the image for the buffer block size
Because the buffer is exposed to the user, the block size is defined to
always exactly be the size of the actual vulkan format. This is the same
size (it had better be) as the linaer image format.
Jason Ekstrand [Fri, 13 May 2016 23:52:41 +0000 (16:52 -0700)]
anv/image: Stop using anv_format for image create validation
Jason Ekstrand [Fri, 13 May 2016 23:47:39 +0000 (16:47 -0700)]
anv/image: Make heavier use of aspects
Jason Ekstrand [Fri, 13 May 2016 21:39:40 +0000 (14:39 -0700)]
anv/copy: Use the color_surf from the image to get the block size
Jason Ekstrand [Fri, 13 May 2016 21:07:21 +0000 (14:07 -0700)]
anv: Change render_pass_attachment.format to a VkFormat
Jason Ekstrand [Fri, 13 May 2016 21:05:00 +0000 (14:05 -0700)]
anv: Add helpers to provide simple VkFormat introspection
As much as I hate adding yet more format introspection, there are times
when the VkFormat is sufficient and we don't want to round-trip through
isl_format. For these times, the new vk_format_info.c/h files provide some
simple driver-agnostic VkFormat introspection. This intended to be
specific to Vulkan but not to any driver whatsoever.
Jason Ekstrand [Fri, 13 May 2016 20:39:20 +0000 (13:39 -0700)]
anv/image: Use get_isl_format when creating buffer views
Jason Ekstrand [Fri, 13 May 2016 19:50:11 +0000 (12:50 -0700)]
anv/image: Add an aspects field
This makes several checks easier and allows us to avoid calling
anv_format_for_vk_format in a number of cases.
Jason Ekstrand [Fri, 13 May 2016 19:38:12 +0000 (12:38 -0700)]
anv: Make format_for_descriptor return an isl_format
Jason Ekstrand [Mon, 16 May 2016 17:19:20 +0000 (10:19 -0700)]
anv/wayland: Don't allow non-renderable formats
Jason Ekstrand [Mon, 16 May 2016 05:21:24 +0000 (22:21 -0700)]
anv/wsi: Make WSI per-physical-device rather than per-instance
This better maps to the Vulkan object model and also allows WSI to at least
know the hardware generation which is useful for format checks.
Adam Jackson [Wed, 4 May 2016 18:32:38 +0000 (14:32 -0400)]
glapi/gen: Copy some GL 1.0 enum details into ARB_viewport_array
Otherwise the instances in the extension XML override the core
definitions, and we stop knowing their sizes in indirect_size_get.c
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Wed, 4 May 2016 18:14:56 +0000 (14:14 -0400)]
glapi: Define PURE for Sun Studio as well
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Thu, 24 Mar 2016 17:57:58 +0000 (13:57 -0400)]
glapi/glx: Mark byteswap functions as _X_UNUSED (v2)
Squashes the one remaining warning in the xserver build.
v2: Also clean up some non-standard whitespace (Ian Romanick)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Thu, 24 Mar 2016 17:57:58 +0000 (13:57 -0400)]
glapi: Harden GLX request size processing (v2)
v2: Use == not is for equality testing (Dylan Baker)
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Thu, 24 Mar 2016 17:57:58 +0000 (13:57 -0400)]
glapi: Add the safe_{add,mul,pad} functions from xserver
We're about to update the generator scripts to use these, easier not to
vary between client and server.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Adam Jackson [Thu, 24 Mar 2016 17:57:58 +0000 (13:57 -0400)]
glapi: Fix whitespace droppings when printing the license header
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Rob Clark [Tue, 22 Dec 2015 02:34:11 +0000 (21:34 -0500)]
mesa/st: add support for NIR as possible driver IR
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Eric Anholt <eric@anholt.net>
Rob Clark [Mon, 28 Mar 2016 14:55:59 +0000 (10:55 -0400)]
mesa/st: move things around a bit in st_create_fp_variant()
Prep work for next patch.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rob Clark [Fri, 29 Jan 2016 17:16:23 +0000 (12:16 -0500)]
mesa/st: add nir pass for lowering builtin uniforms
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Emil Velikov [Mon, 16 May 2016 17:55:08 +0000 (18:55 +0100)]
scons: gallium: link against nir as needed
... otherwise we'll produce uncomplete binaries with introduction of NIR
as alternative IR with next commits.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Jason Ekstrand [Mon, 16 May 2016 21:30:25 +0000 (14:30 -0700)]
i965/fs: Add an allow_spilling flag to brw_compile_fs
This allows us to disable spilling for blorp shaders since blorp state
setup doesn't handle spilling. Without this, blorp fails hard if you run
with INTEL_DEBUG=spill.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Francisco Jerez <currojerez@riseup.net>
Ilia Mirkin [Tue, 17 May 2016 07:27:02 +0000 (03:27 -0400)]
nvc0/ir: fix shared atomic lowering to preserve shared memory location
We were always doing atomics on shared memory location 0 instead of the
originally supplied location. Make sure to pass through the original
symbol and any indirection.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org # note: expect minor conflict
Rob Clark [Mon, 16 May 2016 17:37:24 +0000 (13:37 -0400)]
freedreno/ir3: fix compiler warning
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 14 May 2016 19:40:54 +0000 (15:40 -0400)]
nir/validate: dump annotated shader with error msgs
Log all the errors, and at the end dump the shader w/ error annotations
to make it easier to see where the problems are.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Rob Clark [Mon, 16 May 2016 16:44:59 +0000 (12:44 -0400)]
nir/validate: assert() -> validate_assert()
Prep work for next patch.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Rob Clark [Sat, 14 May 2016 19:37:32 +0000 (15:37 -0400)]
nir/print: add support for print annotations
Caller can pass a hashtable mapping NIR object (currently instr or var,
but I guess others could be added as needed) to annotation msg to print
inline with the shader dump. As the annotation msg is printed, it is
removed from the hashtable to give the caller a way to know about any
unassociated msgs.
This is used in the next patch, for nir_validate to try to associate
error msgs to nir_print dump.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Alejandro Piñeiro [Tue, 26 Apr 2016 12:35:24 +0000 (14:35 +0200)]
i965: Expose OpenGL 4.2 for gen8+
ARB_vertex_attrib_64bit was the only feature missing.
v2: we can expose 4.2 instead of 4.1 (Ian Romanick)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Alejandro Piñeiro [Tue, 26 Apr 2016 12:37:38 +0000 (14:37 +0200)]
docs: Mark ARB_vertex_attrib_64bit as done for i965/gen8+
v2: label as done for i965/gen8+ instead of i965 (Kenneth Graunke)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Alejandro Piñeiro [Sat, 12 Mar 2016 11:34:06 +0000 (12:34 +0100)]
i965: Enable ARB_vertex_attrib_64bit for gen8+
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Juan A. Suarez Romero [Fri, 15 Apr 2016 10:51:05 +0000 (12:51 +0200)]
i965: take care of doubles when lowering VS inputs
Input attributes can require 2 vec4 or 1 vec4 depending on whether they
are double-precision or not.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Juan A. Suarez Romero [Mon, 4 Apr 2016 10:47:57 +0000 (12:47 +0200)]
i965/fs: calculate first non-payload GRF using attrib slots
When computing where the first non-payload GRF starts, we can't rely on
the number of attributes, as each attribute can be using 1 or 2 slots
depending on whether they are a dvec3/4 or other.
Instead, we need to use the number of slots used by the attributes.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Juan A. Suarez Romero [Mon, 4 Apr 2016 10:47:57 +0000 (12:47 +0200)]
i965/vec4: use attribute slots to calculate URB read length
Do not use total attributes because a dvec3/dvec4 attribute requires two
slots. So rather use total attribute slots.
v2: do not use loop to calculate required attribute slots (Kenneth
Graunke)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Juan A. Suarez Romero [Fri, 1 Apr 2016 15:25:03 +0000 (17:25 +0200)]
i965: take care of doubles when remapping VS attributes
Double-precision types require 1 slot in VUE for double and dvec2, and 2 slots for
anything else.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Juan A. Suarez Romero [Fri, 15 Apr 2016 10:30:54 +0000 (12:30 +0200)]
nir: add double input bitmap
This bitmap tracks which input attributes are double-precision.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Juan A. Suarez Romero [Thu, 31 Mar 2016 10:49:53 +0000 (11:49 +0100)]
i965/fs: shuffle 32bits into 64bits for doubles
VS Thread Payload handles attributes in URB as vec4, no matter if they
are actually single or double precision.
So with double-precision types, value ends up in the registers split in
32bits chunks, in different positions.
We need to shuffle the chunks to get the doubles correctly.
v2:
* Extra blank line. Add { } on if body (Ian Romanick)
* Use dest directly (Kenneth Graunke)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Alejandro Piñeiro [Wed, 23 Mar 2016 11:20:05 +0000 (12:20 +0100)]
i965/fs: half exec_size when dealing with 64 bits attributes
The HW has a restriction that only vertical stride may cross register
boundaries. Until now this was only handled on VGRFs at
rw_reg_from_fs_reg, but it is also needed for attributes.
v2:
* Remove reference to commit id on commit message (Juan Suarez)
* Simplify code that compute final exec_size (Ian Romanick)
* Use REG_SIZE on that same code (Kenneth Graunke)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Alejandro Piñeiro [Thu, 24 Mar 2016 10:49:53 +0000 (11:49 +0100)]
i965: passthru formats cannot be used width edge flag enabled
Add an assertion to detect this case.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Antia Puentes [Fri, 15 Apr 2016 09:32:46 +0000 (11:32 +0200)]
i965: Configure how to store *64*PASSTHRU vertex components
From the Broadwell specification, structure VERTEX_ELEMENT_STATE
description:
"When SourceElementFormat is set to one of the *64*_PASSTHRU
formats, 64-bit components are stored in the URB without any
conversion. In this case, vertex elements must be written as 128
or 256 bits, with VFCOMP_STORE_0 being used to pad the output
as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red component into
the URB, Component 1 must be specified as VFCOMP_STORE_0 (with
Components 2,3 set to VFCOMP_NOSTORE) in order to output a 128-bit
vertex element, or Components 1-3 must be specified as VFCOMP_STORE_0
in order to output a 256-bit vertex element. Likewise, use of
R64G64B64_PASSTHRU requires Component 3 to be specified as VFCOMP_STORE_0
in order to output a 256-bit vertex element."
Uses 128-bits to write double and dvec2 vertex elements, and 256-bits for
dvec3 and dvec4 vertex elements.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Antia Puentes <apuentes@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Alejandro Piñeiro [Tue, 15 Mar 2016 11:53:07 +0000 (12:53 +0100)]
i965: get the proper vertex surface type for doubles on gen8+
This commit adds support for PASSTHRU format when pushing
double-precision attributes.
Check glarray->Doubles in order to know if we should choose a format
that does a conversion to float, or just passthru the 64-bit double.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Sun, 15 May 2016 19:35:04 +0000 (15:35 -0400)]
nvc0/ir: make sure out-of-bounds buffer loads/atomics get a 0 result
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Tue, 17 May 2016 01:18:50 +0000 (11:18 +1000)]
glsl: make reserved_varying_slot() static
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Sat, 27 Feb 2016 01:16:34 +0000 (12:16 +1100)]
glsl: include per-patch varyings when generating reserved slot bitfield
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Tue, 17 May 2016 01:34:38 +0000 (11:34 +1000)]
glsl: don't incorrectly eliminate patches with explicit locations
These varying have a separate location domain from per-vertex varyings
and need to be handled separately.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Tue, 17 May 2016 01:31:00 +0000 (11:31 +1000)]
glsl: remove remainings tabs in link_varyings.cpp
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Tue, 17 May 2016 01:29:40 +0000 (11:29 +1000)]
glsl: fix location and component packing validation on patches
These varyings have a separate location domain from per-vertex varyings
and need to be handled separately.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Kenneth Graunke [Tue, 17 May 2016 00:49:21 +0000 (17:49 -0700)]
i965: Enable ARB_shader_precision on Gen8+.
I recently fixed a bug in the Piglit tests:
https://lists.freedesktop.org/archives/piglit/2016-May/019802.html
With that patch in place, we pass all the tests. So, turn it on.
We could probably expose this earlier than Gen8, but the extension
says that OpenGL 4.0 is required, and all of our tests are written
against GLSL 4.00 (which is only supported on Gen8+).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Jose Fonseca [Mon, 16 May 2016 20:46:58 +0000 (21:46 +0100)]
vl/dri: Move the DRI3 check out of sources include into C.
Fixes SCons build.
Trivial. Built locally with SCons and autotools.
Leo Liu [Tue, 26 Apr 2016 15:23:53 +0000 (11:23 -0400)]
st/vdpau: add dri3 support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 9 May 2016 20:03:41 +0000 (16:03 -0400)]
vl/dri3: implement functions for get and set timestamp
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 9 May 2016 19:53:48 +0000 (15:53 -0400)]
vl/dri3: handle PresentCompleteNotify event
and get timestamp calculated based on the event's reply
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 25 Apr 2016 20:07:21 +0000 (16:07 -0400)]
st/va: add dri3 support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 9 May 2016 19:27:49 +0000 (15:27 -0400)]
vl/dri3: implement DRI3 BufferFromPixmap
We also need render to the front buffer of temporary X pixmap,
this is the case of when we using opengl as video out for vaapi.
the basic implementation is to pass pixmap ID to X server, and
then X will return dma-buf fd, we will get the buffer object
through this dma-buf fd.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 25 Apr 2016 19:49:28 +0000 (15:49 -0400)]
vl/dri3: add support for resizing
When drawable size changed, PresentConfigureNotify event will be
emitted, by handling the event to re-allocate resized buffer.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 9 May 2016 19:09:45 +0000 (15:09 -0400)]
vl/dri3: implement funciton for get dirty area
This will clear presentation area not covered by video content
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Mon, 25 Apr 2016 18:37:57 +0000 (14:37 -0400)]
vl/dri3: implement function for flush frontbuffer
Request drawable content in pixmap by calling DRI3 PresentPixmap,
and handle PresentIdleNotify event.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>