encode: h264, h265: Remove unnecessary warning

The warning "Input ref list is Wrong" is generating
based on assumption that reference frames provided in
VAEncPictureParameterBuffer are in align with
ref_pic_list included in VAEncSliceParameterBuffer.
There shoudn't be such constraints, as per VA specification
pic_param->reference_frames can have any order based on
dpb manipulation.

Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
(cherry picked from commit b21b187c8146f7840bf176f94a3ad62a4c922add)

Export the P010 surface attribute for HEVC/VP9 10-bits decoding

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 62c3a0d75434e76c228247786817336430862b29)

shaders/gen9: fix build when no intel-gen4asm available

If intel-gen4asm version is < 1.9 or not installed then we
shouldn't run the associated make rules.

This fixes 'make dist' failure.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 09d29db2a1dd6880297c49a73fc8be4b872f1eb9)

i965_drv: fix cb_cr_height for YUV422 formats

YUV422 has full vertical chroma resolution, not half.

Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
(cherry picked from commit a77556ca48f977b89eab9d3f9b965d1a78e6bacb)

Downgrade the alignment requirement for linear surface on BDW+

When sharing the YUY2/UYVY buffer with other driver, the current alignment is too
strict, which causes that it is not handled correctly by other driver.(The current
alignment is considered based on I420/YV12)

https://bugs.freedesktop.org/show_bug.cgi?id=96689

Tested-by: Cheah, Vincent Beng Keat<vincent.beng.keat.cheah@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit bcde10dac40cbc4c8502fa519404c9379372184b)

Update PCI IDs for Kabylake

Remove unused PCI IDs and add new PCI IDs for KBL, the IDs are taken
directly from intel-gfx patches, which are under review:

https://lists.freedesktop.org/archives/intel-gfx/2016-June/099263.html
https://lists.freedesktop.org/archives/intel-gfx/2016-June/099264.html

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit f47e513dcd8557b84463379d52d7156adef121a9)

Make sure a right VEBOX_IECP_STATE is used on BDW+

Some features of IECP aren't enabled, and the corresponding fields must
be set to 0 in VEBOX_IECP_STATE. Thanks for Peng's finding: The issue disappear
when disable libdrm cache

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=95349

Cc: peng.chen <peng.c.chen@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Tested-by: peng.chen <peng.c.chen@intel.com>
Tested-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
(cherry picked from commit 09afaebfb94aad7a01ed5a3f71a77fbb70e7b550)

check the result of hsw_veb_post_format_convert()

This commit is related to previous commit e4996019, which is a simpler
approach of this commit, by adding more supported color formats.

For example, VA_FOURCC_BGRX should be added too, to avoid an assert with this
gstreamer pipeline:

gst-play-1.0 burosch1.mpg --videosink=ximagesink

http://samples.mplayerhq.hu/MPEG2/interlaced/burosch1.mpg

Nonetheless, instead of just adding already supported color formats
conversion, it is better to rely on what vpp_surface_convert() already checks,
by verifying the result operation, and avoid the assert.

This patch does it for hsw_veb_post_format_convert().

Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
(cherry picked from commit bf387bbdde4fa1a419d19d7c606e9ba94e07e24e)

Follow the HW spec to set the surface cache attribute for Gen9+

Currently it will use the unoptimized cache attribute for the surface on Gen9+.
This is to follow the HW spec to optimize the cache attribute of the surface
for gen9+.

Signed-off-by: Qu, Pengfei <pengfei.qu@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit dd9a0fb7a885f79f6413df0bd1afd5556c919a03)

Encoding: H264 uses the GPU to construct the PAK obj command on Gen8+

This is helpful to reduce the waiting time when preparing the command
buffer of PAK object.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 7b823b8fe7d3d4b166852b8714abe52d4344d0fc)

Encoding: Encoding reuses aux_batchbuffer instead of allocate new buffer

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 79f2bd8d76392331a3033ae4b8dc8edb3642b90f)

jpeg enc/dec gen9: Allow up to 8K JPEG max resolution on gen9

Allow up to 8K * 8K resolution for JPEG encode and decode on
gen9 HW (SKL,BXT,KBL).

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
(cherry picked from commit 8b1e436793360880f54402161a9f469e9b42e143)

i965_drv: add support for per-codec max resolution

Add a functor to hw_codec_info to allow each hw instance to report
maximum resolution on a per-codec basis.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
(cherry picked from commit 39ebba0d61657a7c306cc8fd1c5780f3bfc8ba30)

Fix the alpha mask at getting derive images

The alpha mask is set to 0x0 when getting derived images, regardless the
alpha channel in the RGB format. But,

When RGBx, the x means an alpha mask of 0x00000000
When RGBA, the A means an alpha mask of 0xff000000

This patch set the alpha mask correctly.

Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
(cherry picked from commit e656d84dc512dc899dda4b9a8121b48f5148fc4b)

1.7.2.pre1 for development

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 3b84d9866f6eeaa013c75e6e5e99e8b5bdeb0e94)

Conflicts:
configure.ac

libva-intel-driver 1.7.1

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Update NEWS

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the potential NULL issue

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Restrict the VP9 HW encoding for Profile0

Fix the issue that VP9 HW encoding is reported incorrectly for VP9 Profile2.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

libdrm 2.4.52 is required to avoid the compiler error

  CC       i965_drv_video_la-intel_batchbuffer.lo
intel_batchbuffer.c: In function 'intel_batchbuffer_emit_reloc64':
intel_batchbuffer.c:183:24: error: 'drm_intel_bo' has no member named 'offset64'
    uint64_t offset = bo->offset64 + delta;
                        ^
make[3]: *** [i965_drv_video_la-intel_batchbuffer.lo] Error 1

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Don't check WAYLAND_SCANNER if wayland isn't used or found

checking for WAYLAND... no
checking for LIBVA_WAYLAND_DEPS... no
checking for pkg-config... (cached) /usr/bin/pkg-config
checking pkg-config is at least version 0.9.0... yes
checking for WAYLAND_SCANNER... no
configure: error: Package requirements (wayland-scanner) were not met:

No package 'wayland-scanner' found

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Remove extraneous OUT_BATCH in gen8_gpe_state_base_address

Line accidentally left behind in:

  a82f0be Fix the 48-bit address issue for gpe_util functions on

Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>

Update the dependency on VA-API version

VA-API 0.39.2 is required for VP9 encode

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Export the VBR bit rate-control for VP9 encoding on KBL

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Add the support of CBR/VBR for Vp9 Encoding

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Release the corresponding buffers for VP9 encoding

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Export the Vp9 encoding profile/entrypoint for KBL

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Add the low-level implementation of VP9 encoding

The following are includes:
a. The definition of data structure related with VP9 encoding
b. VME/PAK pipeline related with VP9 encoding
c. The required helper function

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Add some utility functions for i965_gpe_resources

This is to add the wrapper function required by vp9 encoding.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Add the VAEncMacroblockMapBufferType buffer for encoding

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Fix the 48-bit address issue for gpe_util functions on gen8+

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Use the buffer allocated externally to configure dynamic state for gpe_context on Gen8+

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Add one field to keep the specific priv_state for encoding

It will be better that it is allocated/initialized in calling the
XXX_vme_context_init callback function.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Add common helper functions for VP9 Hw encoding

Some are to initialize/update the frame_context related with VP9.
The second is to initialize the uncompressed_header, which can be used
when the user doesn't pass the uncompressed_header.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Refine vp9_probs.h so that the prob table can be used for encoding

Otherwise the prob definition will be defined twice if it is included
in two files.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>

Avoid potential NULL pointer access

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>

Update the dependency on VA-API version

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Export Low power encoding for H.264 on SKL

Only CQP mode is supported by now

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Implement low power mode on SKL

VDEnc is one of the fixed function pipelines in VDBox which is a dedicated
engine for low power mode

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Add support for VAEntrypointEncSliceLP

VAEntrypointEncSliceLP is used to expose low power variant of slice level
encoding entrypoint and we will implement low power encoding on SKL

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Add a path to fetch encoder status from the underlying context

We can use it to get the coded buffer size if the underlying context support status query

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Make intel_avc_find_skipemulcnt() a public function

In addition, move intel_avc_find_skipemulcnt() to i965_encoder_utils.c

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Add some utility functions for MI commands for GEN9

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Add 'struct i965_gpe_resource' and related utility functions

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Inrease the maximum number of attributes

We will add more attributes in the driver

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Add a flag for skylake in struct intel_device_info

In addition, add IS_SKL() and IS_BXT() for later usage

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

Add OUT_BCS_RELOC64() to support 48-bit address relocations on BCS

We will use this MACRO later

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>

add the support of 8-aligned size setting for hevc encoding

v2:
disable drop cu flag for 16-aliged size

v1:
created

Signed-off-by: peng.chen <peng.c.chen@intel.com>

Set the right alignment on BXT/KBL

With the commit 'CSC: Remove average logic when saving NV12 surface on IVB+',
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=94845 on BXT/KBL

Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

CSC: Remove average logic when saving NV12 surface on IVB+

This fixes the issue mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=94845 on
IVB+(except BXT/KBL)

v2: Remove the adding <1> in GEN7 shader (Emil)

Cc: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Restrict the hybrid Vp9 usage on the platform without Vp9 HWDEC

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

fix the FPS caculation error for HEVC encoder

Signed-off-by: peng.chen <peng.c.chen@intel.com>

optimize the internal prob buffer management

Signed-off-by: peng.chen <peng.c.chen@intel.com>

CSC: Set the right filter mode for YUY2/UYVY surface on BDW+

AVS doesn't support mode 3 for YUY2/UYVY surface

https://bugs.freedesktop.org/show_bug.cgi?id=94765

Cc: James Tang <jun.tang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

update PIPE_MODE command setting for VP9 decoding

v2:
modify the commit message

v1:
initial

Signed-off-by: peng.chen <peng.c.chen@intel.com>

vp9_decoding: disable all seg reference for key frame or intra_only enabled frame

Signed-off-by: peng.chen <peng.c.chen@intel.com>

1.7.1.pre1 for development

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Merge remote-tracking branch 'fdo/v1.7-branch' into fdo--master

libva-intel-driver 1.7.0

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

fix memory leak in jpeg encoding

Signed-off-by: James Tang <jun.tang@intel.com>

Update NEWS and README

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Remove duplicate H264MultiviewHigh and H264StereoHigh in the profile list

Otherwise vainfo got duplicate print message that list out the video format
support for H264MultiviewHigh, H264StereoHigh.

Reported-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Tested-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix a potential infinite loop

It will result in infinite loop if the input fourcc isn't supported
by the driver. This issue is reported by Guangxin

Cc: Xu, Guangxin <Guangxin.Xu@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Add missing SKL/BXT PCI IDs

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

1.7.0.pre1 for development

Update the dependency on VA-API as well

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Merge remote-tracking branch 'fdo/v1.6-branch' into fdo--master

support VP9 profile2 10bits decoding

v2:
ignore bit_depth for profile0,1
add the support of enum VAProfileVP9Profile2

v1:
initial

Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit f6fe8428cc395771659a010222d0e3774b876535)

KBL driver enabling

v2:
remove the file mode change

v1:
initial

Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit 5fb654b2577be19005bd9792a0b62c3ac1d2395b)

set the minimum of vp9 deocding frame width and height as 1, not 8

Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit 99ae37b2e2d29be0c00447f26ccab294a2bcc2d9)

don't mask 8bit NV12 surface supporting for hevc main10 profile

Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit f96392ce2479c8cadef30a923c985b62fa4091c0)

support VP9 profile2 10bits decoding

v2:
ignore bit_depth for profile0,1
add the support of enum VAProfileVP9Profile2

v1:
initial

Signed-off-by: peng.chen <peng.c.chen@intel.com>

KBL driver enabling

v2:
remove the file mode change

v1:
initial

Signed-off-by: peng.chen <peng.c.chen@intel.com>

set the minimum of vp9 deocding frame width and height as 1, not 8

Signed-off-by: peng.chen <peng.c.chen@intel.com>

don't mask 8bit NV12 surface supporting for hevc main10 profile

Signed-off-by: peng.chen <peng.c.chen@intel.com>

Merge remote-tracking branch 'fdo/master' into v1.6-branch

Conflicts:
configure.ac
src/gen9_mfd.c
src/gen9_mfd.h
src/i965_device_info.c
src/i965_drv_video.c
src/i965_drv_video.h
src/intel_media_common.c

P010(10bits) enabling in vaCreateImage(), vaGetImage(), vaPutImage()

1, don't support the conversion from NV12 or other 8bits formats to P010
2, don't support scaling for P010->P010

v2:
add GEN arch limitation for vebox_processing_simple()

v1:
initial

Signed-off-by: peng.chen <peng.c.chen@intel.com>

VPP P010(10bits) enabling

v2:
1, remove VPP P016 related code
2, optimize NV12->P010
3, enable IECP if all DI&DN are disabled

v1:
initial

Signed-off-by: peng.chen <peng.c.chen@intel.com>

only re-caculate surface width&height for tiled surface

fix Bug 93499 - daf8f6c762874 introduced display corruption on i3 330M
https://bugs.freedesktop.org/show_bug.cgi?id=93499

Signed-off-by: peng.chen <peng.c.chen@intel.com>

VP9HWDEC:fix vp9 hw decoder issue

v2:
codes change according to haihao's comments

v1:
1. fix one segmentent fault issue
2. change and optimize the mv bufffer update the logic
3. fix one segment feature issue
4. fix one issue when loopfilter level is zero.

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>

libva-intel-driver 1.6.2

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Add assert checking for allocated gen9_vp9_surface

Signed-off-by: Lim Siew Hoon <siew.hoon.lim@intel.com>

1.6.3.pre1 for development

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

version 1.6.2.pre2

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Update NEWS and README

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Keep backward compatibility with VA API 0.38.0

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 9ce333f193fa0f56ec09b9f5b2f4823461f48776)

Keep backward compatibility with VA API 0.38.0

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>

Export VP9 decoding on BXT

Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit e16f923193a10f78f5462db7efa4e89e242fca93)

VP9 HWDec:change the name vp8_xxx to vpx_xxx and share it with VP9

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 6859ab7a51650cbcfa8159a37cf8d1485d162ad4)

VP9 HWDec: add VP9 HW decoding pipeline

v2: fix sengment feature in inter frame

v3: update the prob buffer logic

v4: fix intra-only feature issue

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 8f1e1015a4cc8c08dd685f80829ca1555ae1cab1)

VP9 HWDec:add vp9 parameter check function before decoding

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 833fa7715d28b89af4bd661e3f2cac72345c9a27)

VP9 HWDec:add vp9 surface structure and related parameter

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit f36ab3413f814c80f4df4f4570f4ef9a1168b624)

VP9 HWDEC:add vp9 table file

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 9bc5ecadd4ea11ebab1e383632be3448eb8411f4)

VP9 HWDec: Added profile and entrypoint for VAProfileVP9Profile0 in the driver

v2: don't export VP9 decoding on BXT because VP9 decoding isn't enabled (Peng)

Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit bcab944bc6e898e209b1e09befb81134c31a0b22)

Add support for P010 in vaPutSurface() in a X window system

Currently it converts P010 to RGBA32 because the drawable to vaPutSurface() is RGBA color

v2: P010 has interleaved UV planar (Peng)

v3: change commit log

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit bace1e29c669f3fe47cb41c57fc817b493fc7882)

support HEVC 10bits decoding

v2: code cleanup

v3: store shift in an int to make it more readable (Emil)

Signed-off-by: Peng Chen <peng.c.chen@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit 5ec92f48aeff12c7db0a96b65aca44feb4965d92)

Initial support for Broxton in the intel-driver

Added PCIIDs, Device info and the relevant code.

Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
[Peng: disable MPEG-2 encoding on BXT]
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 70fe9ba8cf83e27c48f80767565149c7d40ea665)

Export VP9 decoding on BXT

Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>

VP9 HWDec:change the name vp8_xxx to vpx_xxx and share it with VP9

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>

VP9 HWDec: add VP9 HW decoding pipeline

v2: fix sengment feature in inter frame

v3: update the prob buffer logic

v4: fix intra-only feature issue

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>

VP9 HWDec:add vp9 parameter check function before decoding

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>