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Daniel Charles [Sat, 13 Aug 2016 00:30:55 +0000 (17:30 -0700)]
vp9encoder: encoder to handle properly CSC on input surface
VP9 encoder was not checking for the yuv surface fourcc provided as the input.
If the format is I420, the driver creates an underlying surface where the input
is converted to NV12.
The underlying temporary surface was not used properly by the vme_pipeline_vp9 as
intel_encoder_check_yuv_surface will place the underlying surface on the
encode_state->input_yuv_object if it needed conversion or it will place the correct
current_render_target if the conversion is not needed.
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Xiang, Haihao [Mon, 15 Aug 2016 07:44:48 +0000 (15:44 +0800)]
Update the dependency on VA-API version
VA-API 0.39.3 is required for ROI delta QP support for CBR
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Jia Meng [Tue, 17 May 2016 02:13:16 +0000 (10:13 +0800)]
scaling matrix of h264 encoder on gen7/gen7.5/gen8/gen9
v1:
change the title according to yakui's comments.
qm is in raster scan order per va api, and fqm is in
column wise raster scan order per hardware requirement.
Signed-off-by: Jia Meng <jia.meng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Jia Meng [Fri, 11 Oct 2013 03:22:47 +0000 (11:22 +0800)]
Adjust the maximum number of motion vectors for B frame on HSW+
Signed-off-by: Jia Meng <jia.meng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Pengfei Qu [Mon, 18 Jul 2016 04:57:39 +0000 (12:57 +0800)]
ROI:enable on gen8 and gen9
v2:
use ASSERT_RET to check the ROI flag setted by user. instead of assert.
v1:
ROI enable on gen8 and gen9
Enable GPU to construct GPU command under ROI scenario
fix roi attrib config incorrectly
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 02:54:34 +0000 (02:54 +0000)]
Encoding: ROI support for CQP/CBR on Haswell/Ivy
v2:
remove unused variable
set max ROI number to 3 according low power mode or 8
v1:
merge 3 ROI patches together
Encoding: Add the support of ROI under CQP on Haswell/Ivybridge
Encoding: Add the support of ROI for CBR
Currently it will allocate the different qp for the ROI and non_ROI region
based on the ROI ratio. The qp delta is related with the ratio of ROI region.
Encoding: Expand to support multiple ROI regions.
Encoding: bits.roi_rc_qp_delat_support
user guide:
The first is that the driver should expose the feature of qp_delta in
VAConfigAttribValEncROI.
The second is that the user-app can pass the qp_delta flag in
VAEncMiscParameterBufferROI and then the driver will use the qp_delta to
calculate the corresponding qp for ROI region. For the non-ROI region: I
think that currently we can use the following model to predicate the qp.
(qp_value = intel_qpvalue_from_qp(qp))
Qp_value_roi * ROI_area + qp_value_nonroi * area_nonroi = base_qp *
total_area.
Signed-off-by: ceciliapeng <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 02:13:28 +0000 (02:13 +0000)]
encoding:use the qp per every macroblock on Ivy and haswell
v1:
combine the patch together for Ivy and haswell
use-CPU-to-construct-the-MFC-pak-command
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: ceciliapeng <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 02:19:05 +0000 (02:19 +0000)]
Encoding: Add one ROI flag and ROI buffer
v3:
free the qp_per_mb for vme context
v2:
remove unused variable to avoid warning when compiling.
v1:
Add one flag to indicate whether ROI is supported in one encode context
Allocate one ROI buffer to hold qp per mb dynamically
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 02:18:58 +0000 (02:18 +0000)]
Encoding: Dynamically select one mechanism to construct encoding command buffer for each frame on Haswell and Gen7/Gen6
v2:remove the warning when compiling
v1: combine the Haswell and Gen7/6 patch together
Currently it uses the fixed policy to construct encoding command buffer.
(Use CPU or GPU). And it is statically compiled.
But sometimes it needs to choose the different mechanism on the fly instead
of statically compiled mode.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 02:18:52 +0000 (02:18 +0000)]
Encoding: Pass the qp parameter into VME shader and VME shader select the different cost table based on input Qp on Ivy
v1: add assert after bo map
In order to suppor that macroblocks have the different QP to do the motion
prediction, different cost tables are provided so that the VME engine can
select the different mode/motion-vector cost tables based on the input Qp.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 02:18:48 +0000 (02:18 +0000)]
encoding: Send VME instruction uses one register as the desc parameter
The desc parameter of current VME send instruction is immediate. And it can't
be updated based on the input parameter.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 02:18:44 +0000 (02:18 +0000)]
Encoding: VME shader reads mbmv_cost from cost_table surface instead of constant buffer on Haswell
This is to do the prepartion of enhanced features.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Sun, 1 Jan 2012 01:24:19 +0000 (01:24 +0000)]
Encoding: mbmv cost table related changes for ROI
v3:remove the warning according to haihao's comments
v2: merge three mbmv cost table related patches together.
Encoding:Abstract the calculation of mbmv cost for qp as one function.
Encoding:Add one function that initialize mbmv cost table for supported Qp range.
Encoding:Setup one cost_table surface state for VME shader
According haihao's comments, free pointer directly.
v1:
format/style aligment accordingly to avoid the warning.
Currently the length of VME MEDIA_OBJECT command on Ivy can't exceed 8 dwords. If more parameter needs to be passed, the buffer length should be enlarged.
Pass the Qp parameter into VME shader
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Zhao Yakui [Wed, 10 Aug 2016 04:30:13 +0000 (12:30 +0800)]
VPP: Check the returned status of hsw_veb_pre_format_convert before VEBOX VPP
V1->V2: Use the ASSERT_RET for the debug purpose
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Wed, 10 Aug 2016 04:30:12 +0000 (12:30 +0800)]
VPP: Check the VPP pipeline_parameter to avoid NULL pointer
This is to fix the crash issue caused by the commit
51ad826fcc0d2512f7ef74e807e4b8526663fc28.
Reported-by: Xu,Guangxin <guangxin.xu@itnel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Hyunjun Ko [Wed, 10 Aug 2016 03:24:23 +0000 (12:24 +0900)]
gen8_mfc: fix memory leak during vp8 encoding
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=97272
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Xiang, Haihao [Fri, 5 Aug 2016 05:25:58 +0000 (13:25 +0800)]
decoder/h264: don't assert on invalid parameter
Remove redundant checking on input parameters as well.
This avoids assertion failure in https://bugs.freedesktop.org/show_bug.cgi?id=94007,
but the upper library should check why are the invalid paramters passed to libva.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Xiang, Haihao [Wed, 3 Aug 2016 08:43:31 +0000 (16:43 +0800)]
Set cost for modes used for VP8 encoding
This is similar to what commit
1cd6795 does
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Wang, Fei W <fei.w.wang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Xiang, Haihao [Mon, 25 Jul 2016 08:53:08 +0000 (16:53 +0800)]
Encode: Set cost for MODE_CHROMA_INTRA/MODE_REFID_COST
This fixes the remaining issues mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=96703
after applying commit
3699c14
On GEN75+, driver copies vme_context->vme_state_message to VME kernel curbe buffer and
VME kernel uses the data in curbe buffer to initialize VME message payload.
vme_context->vme_state_message is set up in intel_vme_update_mbmv_cost(), which doesn't
set all costs for used modes in VME kernels. The uninitialized mode cost will result in
difference in VME output. Thanks for Elaine's finding that the issue disappears after
initializing VME state message buffer with zeros.
Signed-off-by: Elaine Wang <elaine.wang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Mingruo Sun <mingruo.sun@intel.com>
XuGuangxin [Mon, 25 Jul 2016 08:53:07 +0000 (16:53 +0800)]
Encode: Clear right and bottom border of NV12 surface to avoid run2run issue
This fixes some issues mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=96703
Signed-off-by: Xu Guangxin <guangxin.xu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Mingruo Sun <mingruo.sun@intel.com>
Daniel Charles [Fri, 29 Jul 2016 00:11:54 +0000 (17:11 -0700)]
i965_encoder: return a failing status
VAStatus when calling vme_pipeline was silently failing
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Lim Siew Hoon [Tue, 26 Jul 2016 08:54:37 +0000 (16:54 +0800)]
Missing 'do' in "do ...while" in macro ALLOC_VDENC_BUFFER_RESOURCE
Signed-off-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Scott D Phillips [Mon, 25 Jul 2016 20:19:28 +0000 (13:19 -0700)]
dri: return error for unimplemented surface formats
Previously packed YUV422 surface were allowed to be renderd but
got rendered improperly.
Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
Ung, Teng En [Wed, 22 Jun 2016 02:49:22 +0000 (10:49 +0800)]
Fix to use source and output regions size instead of the input output surfaces original size.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=96739
Signed-off-by: Ung, Teng En <teng.en.ung@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Wed, 13 Jul 2016 08:41:31 +0000 (16:41 +0800)]
Fix the condition used in 'else if()'
This 'else if()' is used to check output surface format, not input surface format.
Tested-by: Xu, Guangxin <Guangxin.Xu@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Sreerenj Balachandran [Fri, 15 Jul 2016 14:38:20 +0000 (17:38 +0300)]
encode: h264, h265: Remove unnecessary warning
The warning "Input ref list is Wrong" is generating
based on assumption that reference frames provided in
VAEncPictureParameterBuffer are in align with
ref_pic_list included in VAEncSliceParameterBuffer.
There shoudn't be such constraints, as per VA specification
pic_param->reference_frames can have any order based on
dpb manipulation.
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Zhao Yakui [Tue, 19 Jul 2016 07:33:46 +0000 (15:33 +0800)]
Export the P010 surface attribute for HEVC/VP9 10-bits decoding
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
U. Artie Eoff [Wed, 20 Jul 2016 16:33:18 +0000 (09:33 -0700)]
shaders/gen9: fix build when no intel-gen4asm available
If intel-gen4asm version is < 1.9 or not installed then we
shouldn't run the associated make rules.
This fixes 'make dist' failure.
Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Scott D Phillips [Tue, 19 Jul 2016 17:04:54 +0000 (10:04 -0700)]
i965_drv: fix cb_cr_height for YUV422 formats
YUV422 has full vertical chroma resolution, not half.
Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
Zhao Yakui [Mon, 27 Jun 2016 04:08:26 +0000 (12:08 +0800)]
Downgrade the alignment requirement for linear surface on BDW+
When sharing the YUY2/UYVY buffer with other driver, the current alignment is too
strict, which causes that it is not handled correctly by other driver.(The current
alignment is considered based on I420/YV12)
https://bugs.freedesktop.org/show_bug.cgi?id=96689
Tested-by: Cheah, Vincent Beng Keat<vincent.beng.keat.cheah@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Fri, 24 Jun 2016 02:04:28 +0000 (10:04 +0800)]
Update PCI IDs for Kabylake
Remove unused PCI IDs and add new PCI IDs for KBL, the IDs are taken
directly from intel-gfx patches, which are under review:
https://lists.freedesktop.org/archives/intel-gfx/2016-June/099263.html
https://lists.freedesktop.org/archives/intel-gfx/2016-June/099264.html
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 16 Jun 2016 05:32:00 +0000 (13:32 +0800)]
Make sure a right VEBOX_IECP_STATE is used on BDW+
Some features of IECP aren't enabled, and the corresponding fields must
be set to 0 in VEBOX_IECP_STATE. Thanks for Peng's finding: The issue disappear
when disable libdrm cache
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=95349
Cc: peng.chen <peng.c.chen@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Tested-by: peng.chen <peng.c.chen@intel.com>
Tested-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Víctor Manuel Jáquez Leal [Wed, 8 Jun 2016 12:03:16 +0000 (14:03 +0200)]
check the result of hsw_veb_post_format_convert()
This commit is related to previous commit
e4996019, which is a simpler
approach of this commit, by adding more supported color formats.
For example, VA_FOURCC_BGRX should be added too, to avoid an assert with this
gstreamer pipeline:
gst-play-1.0 burosch1.mpg --videosink=ximagesink
http://samples.mplayerhq.hu/MPEG2/interlaced/burosch1.mpg
Nonetheless, instead of just adding already supported color formats
conversion, it is better to rely on what vpp_surface_convert() already checks,
by verifying the result operation, and avoid the assert.
This patch does it for hsw_veb_post_format_convert().
Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Qu, PengFei [Mon, 30 May 2016 13:56:00 +0000 (09:56 -0400)]
Follow the HW spec to set the surface cache attribute for Gen9+
Currently it will use the unoptimized cache attribute for the surface on Gen9+.
This is to follow the HW spec to optimize the cache attribute of the surface
for gen9+.
Signed-off-by: Qu, Pengfei <pengfei.qu@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Mon, 30 May 2016 13:55:59 +0000 (09:55 -0400)]
Encoding: H264 uses the GPU to construct the PAK obj command on Gen8+
This is helpful to reduce the waiting time when preparing the command
buffer of PAK object.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Mon, 30 May 2016 13:55:58 +0000 (09:55 -0400)]
Encoding: Encoding reuses aux_batchbuffer instead of allocate new buffer
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
U. Artie Eoff [Tue, 7 Jun 2016 20:28:03 +0000 (13:28 -0700)]
jpeg enc/dec gen9: Allow up to 8K JPEG max resolution on gen9
Allow up to 8K * 8K resolution for JPEG encode and decode on
gen9 HW (SKL,BXT,KBL).
Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
U. Artie Eoff [Tue, 7 Jun 2016 20:28:02 +0000 (13:28 -0700)]
i965_drv: add support for per-codec max resolution
Add a functor to hw_codec_info to allow each hw instance to report
maximum resolution on a per-codec basis.
Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Zhao Yakui [Tue, 7 Jun 2016 12:56:42 +0000 (08:56 -0400)]
Fix the potential NULL issue
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 7 Jun 2016 12:56:41 +0000 (08:56 -0400)]
Restrict the VP9 HW encoding for Profile0
Fix the issue that VP9 HW encoding is reported incorrectly for VP9 Profile2.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Víctor Manuel Jáquez Leal [Fri, 3 Jun 2016 10:48:09 +0000 (12:48 +0200)]
Fix the alpha mask at getting derive images
The alpha mask is set to 0x0 when getting derived images, regardless the
alpha channel in the RGB format. But,
When RGBx, the x means an alpha mask of 0x00000000
When RGBA, the A means an alpha mask of 0xff000000
This patch set the alpha mask correctly.
Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Xiang, Haihao [Thu, 2 Jun 2016 17:05:47 +0000 (01:05 +0800)]
1.7.2.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 4 May 2016 17:36:25 +0000 (01:36 +0800)]
libdrm 2.4.52 is required to avoid the compiler error
CC i965_drv_video_la-intel_batchbuffer.lo
intel_batchbuffer.c: In function 'intel_batchbuffer_emit_reloc64':
intel_batchbuffer.c:183:24: error: 'drm_intel_bo' has no member named 'offset64'
uint64_t offset = bo->offset64 + delta;
^
make[3]: *** [i965_drv_video_la-intel_batchbuffer.lo] Error 1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Wed, 4 May 2016 08:48:15 +0000 (16:48 +0800)]
Don't check WAYLAND_SCANNER if wayland isn't used or found
checking for WAYLAND... no
checking for LIBVA_WAYLAND_DEPS... no
checking for pkg-config... (cached) /usr/bin/pkg-config
checking pkg-config is at least version 0.9.0... yes
checking for WAYLAND_SCANNER... no
configure: error: Package requirements (wayland-scanner) were not met:
No package 'wayland-scanner' found
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Scott D Phillips [Tue, 31 May 2016 23:38:51 +0000 (16:38 -0700)]
Remove extraneous OUT_BATCH in gen8_gpe_state_base_address
Line accidentally left behind in:
a82f0be Fix the 48-bit address issue for gpe_util functions on
Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Fri, 27 May 2016 05:12:30 +0000 (13:12 +0800)]
Update the dependency on VA-API version
VA-API 0.39.2 is required for VP9 encode
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:38 +0000 (08:00 -0400)]
Export the VBR bit rate-control for VP9 encoding on KBL
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:37 +0000 (08:00 -0400)]
Add the support of CBR/VBR for Vp9 Encoding
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:36 +0000 (08:00 -0400)]
Release the corresponding buffers for VP9 encoding
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:35 +0000 (08:00 -0400)]
Export the Vp9 encoding profile/entrypoint for KBL
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:34 +0000 (08:00 -0400)]
Add the low-level implementation of VP9 encoding
The following are includes:
a. The definition of data structure related with VP9 encoding
b. VME/PAK pipeline related with VP9 encoding
c. The required helper function
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:33 +0000 (08:00 -0400)]
Add some utility functions for i965_gpe_resources
This is to add the wrapper function required by vp9 encoding.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:32 +0000 (08:00 -0400)]
Add the VAEncMacroblockMapBufferType buffer for encoding
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:31 +0000 (08:00 -0400)]
Fix the 48-bit address issue for gpe_util functions on gen8+
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:30 +0000 (08:00 -0400)]
Use the buffer allocated externally to configure dynamic state for gpe_context on Gen8+
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:29 +0000 (08:00 -0400)]
Add one field to keep the specific priv_state for encoding
It will be better that it is allocated/initialized in calling the
XXX_vme_context_init callback function.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:28 +0000 (08:00 -0400)]
Add common helper functions for VP9 Hw encoding
Some are to initialize/update the frame_context related with VP9.
The second is to initialize the uncompressed_header, which can be used
when the user doesn't pass the uncompressed_header.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Zhao Yakui [Tue, 24 May 2016 12:00:27 +0000 (08:00 -0400)]
Refine vp9_probs.h so that the prob table can be used for encoding
Otherwise the prob definition will be defined twice if it is included
in two files.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Mon, 23 May 2016 03:07:43 +0000 (11:07 +0800)]
Avoid potential NULL pointer access
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Wed, 11 May 2016 02:58:30 +0000 (10:58 +0800)]
Update the dependency on VA-API version
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 23 Nov 2015 02:59:45 +0000 (10:59 +0800)]
Export Low power encoding for H.264 on SKL
Only CQP mode is supported by now
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Tue, 29 Sep 2015 06:41:30 +0000 (14:41 +0800)]
Implement low power mode on SKL
VDEnc is one of the fixed function pipelines in VDBox which is a dedicated
engine for low power mode
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Tue, 19 Jan 2016 05:23:36 +0000 (13:23 +0800)]
Add support for VAEntrypointEncSliceLP
VAEntrypointEncSliceLP is used to expose low power variant of slice level
encoding entrypoint and we will implement low power encoding on SKL
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Tue, 10 Nov 2015 07:04:04 +0000 (15:04 +0800)]
Add a path to fetch encoder status from the underlying context
We can use it to get the coded buffer size if the underlying context support status query
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Thu, 21 Jan 2016 07:52:24 +0000 (15:52 +0800)]
Make intel_avc_find_skipemulcnt() a public function
In addition, move intel_avc_find_skipemulcnt() to i965_encoder_utils.c
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Fri, 9 Oct 2015 02:46:24 +0000 (10:46 +0800)]
Add some utility functions for MI commands for GEN9
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Fri, 9 Oct 2015 02:46:24 +0000 (10:46 +0800)]
Add 'struct i965_gpe_resource' and related utility functions
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Mon, 25 Jan 2016 05:50:32 +0000 (13:50 +0800)]
Inrease the maximum number of attributes
We will add more attributes in the driver
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Wed, 2 Mar 2016 04:48:26 +0000 (12:48 +0800)]
Add a flag for skylake in struct intel_device_info
In addition, add IS_SKL() and IS_BXT() for later usage
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Tue, 19 Jan 2016 05:31:29 +0000 (13:31 +0800)]
Add OUT_BCS_RELOC64() to support 48-bit address relocations on BCS
We will use this MACRO later
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
peng.chen [Mon, 25 Apr 2016 05:42:50 +0000 (13:42 +0800)]
add the support of 8-aligned size setting for hevc encoding
v2:
disable drop cu flag for 16-aliged size
v1:
created
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Xiang, Haihao [Mon, 11 Apr 2016 08:22:18 +0000 (16:22 +0800)]
Set the right alignment on BXT/KBL
With the commit 'CSC: Remove average logic when saving NV12 surface on IVB+',
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=94845 on BXT/KBL
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 7 Apr 2016 04:03:55 +0000 (12:03 +0800)]
CSC: Remove average logic when saving NV12 surface on IVB+
This fixes the issue mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=94845 on
IVB+(except BXT/KBL)
v2: Remove the adding <1> in GEN7 shader (Emil)
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Thu, 21 Apr 2016 20:49:12 +0000 (16:49 -0400)]
Restrict the hybrid Vp9 usage on the platform without Vp9 HWDEC
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
peng.chen [Thu, 7 Apr 2016 02:36:21 +0000 (10:36 +0800)]
fix the FPS caculation error for HEVC encoder
Signed-off-by: peng.chen <peng.c.chen@intel.com>
peng.chen [Tue, 5 Apr 2016 06:50:45 +0000 (14:50 +0800)]
optimize the internal prob buffer management
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Xiang, Haihao [Thu, 31 Mar 2016 07:38:17 +0000 (15:38 +0800)]
CSC: Set the right filter mode for YUY2/UYVY surface on BDW+
AVS doesn't support mode 3 for YUY2/UYVY surface
https://bugs.freedesktop.org/show_bug.cgi?id=94765
Cc: James Tang <jun.tang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
peng.chen [Wed, 16 Mar 2016 07:08:17 +0000 (15:08 +0800)]
update PIPE_MODE command setting for VP9 decoding
v2:
modify the commit message
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>
peng.chen [Tue, 15 Mar 2016 07:11:10 +0000 (15:11 +0800)]
vp9_decoding: disable all seg reference for key frame or intra_only enabled frame
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Xiang, Haihao [Thu, 17 Mar 2016 00:59:14 +0000 (08:59 +0800)]
1.7.1.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 17 Mar 2016 00:58:06 +0000 (08:58 +0800)]
Merge remote-tracking branch 'fdo/v1.7-branch' into fdo--master
Xiang, Haihao [Tue, 15 Mar 2016 06:44:45 +0000 (14:44 +0800)]
libva-intel-driver 1.7.0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
James Tang [Thu, 10 Mar 2016 07:09:00 +0000 (15:09 +0800)]
fix memory leak in jpeg encoding
Signed-off-by: James Tang <jun.tang@intel.com>
Xiang, Haihao [Fri, 4 Mar 2016 04:41:37 +0000 (12:41 +0800)]
Update NEWS and README
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 3 Mar 2016 04:02:56 +0000 (12:02 +0800)]
Remove duplicate H264MultiviewHigh and H264StereoHigh in the profile list
Otherwise vainfo got duplicate print message that list out the video format
support for H264MultiviewHigh, H264StereoHigh.
Reported-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Tested-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 3 Mar 2016 02:01:19 +0000 (10:01 +0800)]
Fix a potential infinite loop
It will result in infinite loop if the input fourcc isn't supported
by the driver. This issue is reported by Guangxin
Cc: Xu, Guangxin <Guangxin.Xu@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 1 Mar 2016 05:00:52 +0000 (13:00 +0800)]
Add missing SKL/BXT PCI IDs
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 3 Mar 2016 05:17:29 +0000 (13:17 +0800)]
1.7.0.pre1 for development
Update the dependency on VA-API as well
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 3 Mar 2016 05:14:16 +0000 (13:14 +0800)]
Merge remote-tracking branch 'fdo/v1.6-branch' into fdo--master
peng.chen [Wed, 27 Jan 2016 07:13:43 +0000 (15:13 +0800)]
support VP9 profile2 10bits decoding
v2:
ignore bit_depth for profile0,1
add the support of enum VAProfileVP9Profile2
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit
f6fe8428cc395771659a010222d0e3774b876535)
Peng Chen [Wed, 27 Jan 2016 07:01:25 +0000 (15:01 +0800)]
KBL driver enabling
v2:
remove the file mode change
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit
5fb654b2577be19005bd9792a0b62c3ac1d2395b)
peng.chen [Mon, 25 Jan 2016 01:55:36 +0000 (09:55 +0800)]
set the minimum of vp9 deocding frame width and height as 1, not 8
Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit
99ae37b2e2d29be0c00447f26ccab294a2bcc2d9)
peng.chen [Mon, 25 Jan 2016 01:54:25 +0000 (09:54 +0800)]
don't mask 8bit NV12 surface supporting for hevc main10 profile
Signed-off-by: peng.chen <peng.c.chen@intel.com>
(cherry picked from commit
f96392ce2479c8cadef30a923c985b62fa4091c0)
peng.chen [Wed, 27 Jan 2016 07:13:43 +0000 (15:13 +0800)]
support VP9 profile2 10bits decoding
v2:
ignore bit_depth for profile0,1
add the support of enum VAProfileVP9Profile2
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Peng Chen [Wed, 27 Jan 2016 07:01:25 +0000 (15:01 +0800)]
KBL driver enabling
v2:
remove the file mode change
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>
peng.chen [Mon, 25 Jan 2016 01:55:36 +0000 (09:55 +0800)]
set the minimum of vp9 deocding frame width and height as 1, not 8
Signed-off-by: peng.chen <peng.c.chen@intel.com>
peng.chen [Mon, 25 Jan 2016 01:54:25 +0000 (09:54 +0800)]
don't mask 8bit NV12 surface supporting for hevc main10 profile
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Xiang, Haihao [Fri, 15 Jan 2016 01:21:52 +0000 (09:21 +0800)]
Merge remote-tracking branch 'fdo/master' into v1.6-branch
Conflicts:
configure.ac
src/gen9_mfd.c
src/gen9_mfd.h
src/i965_device_info.c
src/i965_drv_video.c
src/i965_drv_video.h
src/intel_media_common.c
peng.chen [Wed, 13 Jan 2016 07:34:11 +0000 (15:34 +0800)]
P010(10bits) enabling in vaCreateImage(), vaGetImage(), vaPutImage()
1, don't support the conversion from NV12 or other 8bits formats to P010
2, don't support scaling for P010->P010
v2:
add GEN arch limitation for vebox_processing_simple()
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>
peng.chen [Wed, 13 Jan 2016 07:31:37 +0000 (15:31 +0800)]
VPP P010(10bits) enabling
v2:
1, remove VPP P016 related code
2, optimize NV12->P010
3, enable IECP if all DI&DN are disabled
v1:
initial
Signed-off-by: peng.chen <peng.c.chen@intel.com>