OSDN Git Service
Mauro Rossi [Sat, 9 Jun 2018 19:04:26 +0000 (21:04 +0200)]
android: Analysis: update sources list
Mauro Rossi [Sun, 10 Jun 2018 18:35:33 +0000 (20:35 +0200)]
android: Support: update sources list
Source files updated for Support target
Mauro Rossi [Sat, 9 Jun 2018 10:58:01 +0000 (12:58 +0200)]
android: [Support] Move syntax highlighting into support
Apply changes also in Android targets
Fixes the following building error:
ninja: error: 'external/llvm/lib/DebugInfo/DWARF/SyntaxHighlighting.cpp',
needed by 'out/target/product/x86/obj/STATIC_LIBRARIES/libLLVMDebugInfoDWARF_intermediates/SyntaxHighlighting.o',
missing and no known rule to make it
12:05:41 ninja failed with: exit status 1
Reference:
01d72e5767 ("[Support] Move syntax highlighting into support")
Mauro Rossi [Sat, 9 Jun 2018 19:04:26 +0000 (21:04 +0200)]
android: CodeGen: update sources list
Mauro Rossi [Sat, 9 Jun 2018 12:43:57 +0000 (14:43 +0200)]
android: [IR][CodeGen] Move EVT to CodeGen layer.
Apply the change in Android target
Fixes following building error:
ninja: error: 'external/llvm/lib/IR/ValueTypes.cpp',
needed by 'out/target/product/x86/obj/STATIC_LIBRARIES/libLLVMCore_intermediates/ValueTypes.o',
missing and no known rule to make it
14:32:04 ninja failed with: exit status 1
Reference:
f137ed238d ("[IR][CodeGen] Remove dependency on EVT from IR/Function.cpp.
Move EVT to CodeGen layer.")
Mauro Rossi [Sat, 9 Jun 2018 12:32:34 +0000 (14:32 +0200)]
android: Codegen: Rename ExecutionDepsFix files to ExecutionDomainFix
Rename the source file in Android target
Fixes following building error:
ninja: error: 'external/llvm/lib/CodeGen/ExecutionDepsFix.cpp',
needed by 'out/target/product/x86/obj/STATIC_LIBRARIES/libLLVMCodeGen_intermediates/ExecutionDepsFix.o',
missing and no known rule to make it
13:15:38 ninja failed with: exit status 1
Reference:
d6bf9cdf27 ("Rename ExecutionDepsFix files to ExecutionDomainFix")
Mauro Rossi [Sat, 9 Jun 2018 11:13:30 +0000 (13:13 +0200)]
android: Codegen/AsmPrinter: Rename DwarfAccelTable to AccelTable
Apply changes also in Android targets
Fixes the following building error:
ninja: error: 'external/llvm/lib/CodeGen/AsmPrinter/DwarfAccelTable.cpp',
needed by 'out/target/product/x86/obj/STATIC_LIBRARIES/libLLVMAsmPrinter_intermediates/DwarfAccelTable.o',
missing and no known rule to make it
12:13:33 ninja failed with: exit status 1
Reference:
633599ba03 ("[NFC] Rename DwarfAccelTable and move header.")
Mauro Rossi [Sun, 10 Jun 2018 18:17:20 +0000 (20:17 +0200)]
android: fix AMDGPU target build
Source files and tblgen targets are updated for AMDGPU target
Mauro Rossi [Sat, 9 Jun 2018 10:00:37 +0000 (12:00 +0200)]
android: [AMDGPU][Waitcnt] Remove the old waitcnt pass
Remove source also in Android AMDGPU target
Fixes the following building error:
ninja: error: 'external/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp',
needed by 'out/target/product/x86/obj/STATIC_LIBRARIES/libLLVMAMDGPUCodeGen_intermediates/SIInsertWaits.o',
missing and no known rule to make it
11:44:43 ninja failed with: exit status 1
Reference:
ac95aa536 ("[AMDGPU][Waitcnt] Remove the old waitcnt pass")
Mauro Rossi [Sat, 9 Jun 2018 09:46:59 +0000 (11:46 +0200)]
android: AMDGPU: Rename OpenCL lowering pass to be R600 specific.
Rename the source file in Android AMDGPU target
Fixes following building error:
ninja: error: 'external/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp',
needed by 'out/target/product/x86/obj/STATIC_LIBRARIES/libLLVMAMDGPUCodeGen_intermediates/AMDGPUOpenCLImageTypeLoweringPass.o',
missing and no known rule to make it
11:26:11 ninja failed with: exit status 1
Reference:
0d44e5b362 ("AMDGPU: Rename OpenCL lowering pass to be R600 specific.")
Mauro Rossi [Sat, 9 Jun 2018 16:42:18 +0000 (18:42 +0200)]
android: add tblgen rules for searchable-tables targets
Required for AMDGPUGenSearchableTables.inc target
Mauro Rossi [Sat, 9 Jun 2018 19:04:26 +0000 (21:04 +0200)]
android: Target/X86: update sources list
Mauro Rossi [Fri, 19 Jan 2018 13:10:18 +0000 (14:10 +0100)]
android: fix Target/ARM build
Changelog:
updated list of *.cpp sources in ARM Android.mk makefiles
added lib/Target/ARM/Utils/Android.mk to build libLLVMARMUtils module
shared_llvm.mk: added libLLVMARMUtils to arm static libraries
main Android.mk: lib/Target/ARM/Utils path added
llvm-tblgen-rules.mk: new rule for ARMGenSystemRegister.inc aligned to AMR Cmakelist.txt
ARM modules Android.mk: added ARMGenSystemRegister.inc generated file where necessary
ARM modules Android.mk: added *GEN_ATTRIBUTES_MK, *GEN_INTRINSICS_MK rules where necessary
Mauro Rossi [Sat, 20 Jan 2018 19:57:19 +0000 (20:57 +0100)]
android: Target/X86/InstPrinter: fix {Attributes,Intrinsics}.gen dependencies
Makefile rules are aligned to X86/AsmParser ones
Fixes the following building errors:
host C++: libLLVM70X86AsmPrinter_32 <= external/llvm70/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp
...
In file included from external/llvm70/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp:17:
In file included from external/llvm70/lib/Target/X86/InstPrinter/X86InstComments.h:18:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/CodeGen/MachineInstr.h:23:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/Analysis/AliasAnalysis.h:44:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/Analysis/MemoryLocation.h:21:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/IR/CallSite.h:32:
external/llvm70/lib/Transforms/Hello/../../../include/llvm/IR/Attributes.h:74:14: fatal error: 'llvm/IR/Attributes.gen' file not found
#include "llvm/IR/Attributes.gen"
^~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
target C++: libLLVM70X86AsmPrinter_32 <= external/llvm70/lib/Target/X86/InstPrinter/X86InstComments.cpp
...
In file included from external/llvm70/lib/Target/X86/InstPrinter/X86InstComments.cpp:15:
In file included from external/llvm70/lib/Target/X86/InstPrinter/X86InstComments.h:18:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/CodeGen/MachineInstr.h:23:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/Analysis/AliasAnalysis.h:44:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/Analysis/MemoryLocation.h:21:
In file included from external/llvm70/lib/Transforms/Hello/../../../include/llvm/IR/CallSite.h:32:
external/llvm70/lib/Transforms/Hello/../../../include/llvm/IR/Attributes.h:74:14: fatal error: 'llvm/IR/Attributes.gen' file not found
#include "llvm/IR/Attributes.gen"
^
1 error generated.
Mauro Rossi [Sat, 3 Feb 2018 18:43:17 +0000 (19:43 +0100)]
android: add support for "retpoline" x86 mitigation
Builds the new sources added by commit
e307072 ("Merging r323155:")
Mauro Rossi [Fri, 19 Jan 2018 17:44:18 +0000 (18:44 +0100)]
android: update sources file names for llvm70
*SRC_FILES lists are aligned as per Cmakelist.txt files,
to avoid building errors due to changes in codebase
e.g. AMDGPUCodeObjectMetadata.cpp => AMDGPUMetadata.cpp
ninja: error: 'external/llvm70/lib/Support/AMDGPUCodeObjectMetadata.cpp',
needed by 'out/host/linux-x86/obj/STATIC_LIBRARIES/libLLVM70Support_intermediates/AMDGPUCodeObjectMetadata.o',
missing and no known rule to make it
or new missing sources:
external/llvm70/utils/TableGen/CodeGenDAGPatterns.cpp:88: error: undefined reference to 'llvm::ValueTypeByHwMode:
Qiang Yu [Thu, 17 Aug 2017 01:45:47 +0000 (09:45 +0800)]
for new mesa build (LLVM70)
Change-Id: I6008945796c2fdd0bcfe4a21b171d962be593646
Qiang Yu [Fri, 11 Aug 2017 02:58:55 +0000 (10:58 +0800)]
for sync with upstream update
Change-Id: Ifa8ab4651323b78ba69ac46c421f3d6ad2cf7a50
Qiang Yu [Tue, 1 Aug 2017 07:39:40 +0000 (15:39 +0800)]
CLEAR_TBLGEN_VARS to CLEAR_TBLGEN_VARS70
find . -type f -name "*.mk" -exec sed -i 's/CLEAR_TBLGEN_VARS/CLEAR_TBLGEN_VARS70/g' {} +
Change-Id: I49cea6080f2c69f241d1a28f55f342aa95f62c7b
Qiang Yu [Tue, 1 Aug 2017 07:38:22 +0000 (15:38 +0800)]
TBLGEN_TD_DIR to TBLGEN_TD_DIR70
find . -type f -name "*.mk" -exec sed -i 's/TBLGEN_TD_DIR/TBLGEN_TD_DIR70/g' {} +
Change-Id: I6ea2fb993626240761432fb3db38caead251e78a
Qiang Yu [Tue, 1 Aug 2017 07:37:29 +0000 (15:37 +0800)]
INTRINSICTD to INTRINSICTD70
find . -type f -name "*.mk" -exec sed -i 's/INTRINSICTD/INTRINSICTD70/g' {} +
Change-Id: I042b6a3526260d3d811b4cbba1751e73ffdd0fd6
Qiang Yu [Tue, 1 Aug 2017 07:36:24 +0000 (15:36 +0800)]
ATTRIBUTETD to ATTRIBUTETD70
find . -type f -name "*.mk" -exec sed -i 's/ATTRIBUTETD/ATTRIBUTETD70/g' {} +
Change-Id: I03509f4ce804035e3a12a9a36d8158fb2052027d
Qiang Yu [Tue, 1 Aug 2017 07:35:30 +0000 (15:35 +0800)]
TBLGEN_TABLES to TBLGEN_TABLES70
find . -type f -name "*.mk" -exec sed -i 's/TBLGEN_TABLES/TBLGEN_TABLES70/g' {} +
Change-Id: I4a1d920b0371b659637f08cc7426a5c7b6f47bdc
Qiang Yu [Tue, 1 Aug 2017 07:33:46 +0000 (15:33 +0800)]
transform-td-to-out to transform-td-to-out70
find . -type f -name "*.mk" -exec sed -i 's/transform-td-to-out/transform-td-to-out70/g' {} +
Change-Id: I0f068d1e05366de42771cf273ebdb5c8fcc18cf9
Qiang Yu [Tue, 1 Aug 2017 07:32:52 +0000 (15:32 +0800)]
transform-host-td-to-out to transform-host-td-to-out70
find . -type f -name "*.mk" -exec sed -i 's/transform-host-td-to-out/transform-host-td-to-out70/g' {} +
Change-Id: I9e7c253ab9c25b8b74538b7e5eda84fd024ca4d9
Qiang Yu [Tue, 1 Aug 2017 07:30:20 +0000 (15:30 +0800)]
transform-device-td-to-out to transform-device-td-to-out70
find . -type f -name "*.mk" -exec sed -i 's/transform-device-td-to-out/transform-device-td-to-out70/g' {} +
Change-Id: I973ec407d87d5972abe72aa39e75db4846adabd2
Qiang Yu [Tue, 1 Aug 2017 07:19:53 +0000 (15:19 +0800)]
LLVM_SUPPORTED_ARCH to LLVM70_SUPPORTED_ARCH
find . -type f -name "*.mk" -exec sed -i 's/LLVM_SUPPORTED_ARCH/LLVM70_SUPPORTED_ARCH/g' {} +
Change-Id: I239a21f1e350a8ddb0e8c122ea35d2a91c28cb71
Qiang Yu [Tue, 1 Aug 2017 07:16:51 +0000 (15:16 +0800)]
LLVM_GEN_ to LLVM70_GEN_
find . -type f -name "*.mk" -exec sed -i 's/LLVM_GEN_/LLVM70_GEN_/g' {} +
Change-Id: Ia0680db15a1318cac2750a09c07b1c8c8870cb5c
Qiang Yu [Tue, 1 Aug 2017 07:01:50 +0000 (15:01 +0800)]
LLVM_DEVICE_BUILD_MK to LLVM70_DEVICE_BUILD_MK
find . -type f -name "*.mk" -exec sed -i 's/LLVM_DEVICE_BUILD_MK/LLVM70_DEVICE_BUILD_MK/g' {} +
Change-Id: If859305d7d6220a8a7cf49a515f09a008162c091
Qiang Yu [Tue, 1 Aug 2017 07:00:40 +0000 (15:00 +0800)]
LLVM_HOST_BUILD_MK to LLVM70_HOST_BUILD_MK
find . -type f -name "*.mk" -exec sed -i 's/LLVM_HOST_BUILD_MK/LLVM70_HOST_BUILD_MK/g' {} +
Change-Id: Ifb3c227afbc06823fe3275c88a0af8b754ce5cfb
Qiang Yu [Tue, 1 Aug 2017 06:57:55 +0000 (14:57 +0800)]
LLVM_TBLGEN to LLVM70_TBLGEN
find . -type f -name "*.mk" -exec sed -i 's/LLVM_TBLGEN/LLVM70_TBLGEN/g' {} +
Change-Id: Ida23ea5bafd566034ad172dc84d4a53fe399f914
Qiang Yu [Tue, 1 Aug 2017 06:55:37 +0000 (14:55 +0800)]
LLVM_ROOT_PATH to LLVM70_ROOT_PATH
find . -type f -name "*.mk" -exec sed -i 's/LLVM_ROOT_PATH/LLVM70_ROOT_PATH/g' {} +
Change-Id: Ie102b63dbd4200d923a398d57d05f6e56b1e970b
Qiang Yu [Tue, 1 Aug 2017 06:27:55 +0000 (14:27 +0800)]
more llvm to llvm70
Change-Id: I15d009a0b5e2714b9da5acbf224c90777e79a96e
Qiang Yu [Tue, 1 Aug 2017 06:06:50 +0000 (14:06 +0800)]
remove un-needed utils
Change-Id: Icf27befffad1a982c5199b0a5a6ed4914871710e
Qiang Yu [Tue, 1 Aug 2017 06:05:31 +0000 (14:05 +0800)]
don't build tools
Change-Id: I0bffab8e880a9eb07778e666a89782453777ab71
Qiang Yu [Tue, 1 Aug 2017 06:03:07 +0000 (14:03 +0800)]
rename LLVMxxx to LLVM70xxx
Change-Id: I6e1a5a5e50a5c06d12fff20ee889b2c9b1d8ab3f
Qiang Yu [Tue, 1 Aug 2017 05:57:12 +0000 (13:57 +0800)]
rename libLLVM to libLLVM70
find . -type f -name "*.mk" -exec sed -i 's/libLLVM/libLLVM70/g' {} +
Change-Id: I7868e2f0d559077d04233164c378f5ad4de089ac
Qiang Yu [Sun, 16 Jul 2017 15:52:25 +0000 (23:52 +0800)]
enable GlobalISel
Change-Id: I54623fef9a8f523db2827c4371c93ce42354e790
Qiang Yu [Fri, 14 Jul 2017 10:08:17 +0000 (18:08 +0800)]
now mesa can be compiled
Change-Id: I7ebd71ab29384a5850bcc8227e007704d24fb057
Qiang Yu [Fri, 14 Jul 2017 00:33:14 +0000 (08:33 +0800)]
update config
Change-Id: Id0c53452b223ebeeed6dded8f47f19d71f4a2310
Qiang Yu [Thu, 13 Jul 2017 14:43:17 +0000 (22:43 +0800)]
add device include config
Change-Id: If52fde7458825a853cafef004649339da1b87236
Qiang Yu [Thu, 13 Jul 2017 13:51:59 +0000 (21:51 +0800)]
move all mk file
Change-Id: If2445f05934836410b1f1bbdc9da22b0a193d646
Serge Pavlov [Sat, 9 Jun 2018 05:19:45 +0000 (05:19 +0000)]
Use uniform mechanism for OOM errors handling
This is a recommit of r333506, which was reverted in r333518.
The original commit message is below.
In r325551 many calls of malloc/calloc/realloc were replaces with calls of
their safe counterparts defined in the namespace llvm. There functions
generate crash if memory cannot be allocated, such behavior facilitates
handling of out of memory errors on Windows.
If the result of *alloc function were checked for success, the function was
not replaced with the safe variant. In these cases the calling function made
the error handling, like:
T *NewElts = static_cast<T*>(malloc(NewCapacity*sizeof(T)));
if (NewElts == nullptr)
report_bad_alloc_error("Allocation of SmallVector element failed.");
Actually knowledge about the function where OOM occurred is useless. Moreover
having a single entry point for OOM handling is convenient for investigation
of memory problems. This change removes custom OOM errors handling and
replaces them with calls to functions `llvm::safe_*alloc`.
Declarations of `safe_*alloc` are moved to a separate include file, to avoid
cyclic dependency in SmallVector.h
Differential Revision: https://reviews.llvm.org/D47440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334344
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 9 Jun 2018 05:04:20 +0000 (05:04 +0000)]
Use SmallPtrSet instead of SmallSet in places where we iterate over the set.
SmallSet forwards to SmallPtrSet for pointer types. SmallPtrSet supports iteration, but a normal SmallSet doesn't. So if it wasn't for the forwarding, this wouldn't work.
These places were found by hiding the begin/end methods in the SmallSet forwarding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334343
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Fri, 8 Jun 2018 23:12:29 +0000 (23:12 +0000)]
[tablegen] Improve performance on *GenRegisterInfo.inc by replacing SparseVector with BitVector. NFC
Summary: Generating X86GenRegisterInfo.inc and AArch64GenRegisterInfo.inc is 8-9% faster on my build.
Reviewers: bogner, javed.absar
Reviewed By: bogner
Subscribers: llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D47907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334337
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 8 Jun 2018 21:49:09 +0000 (21:49 +0000)]
[X86] Remove GCCBuiltin from some intrinsics so we can do custom IR generation from clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334328
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Fri, 8 Jun 2018 21:33:33 +0000 (21:33 +0000)]
[LangRef] fptosi and fptoui return poison on overflow.
I think we assume poison, not undef, for certain transforms we
currently do. In any case, we should clarify the language here.
(This sort of conversion is undefined behavior according to the C
and C++ standards. And in practice, hardware implementations handle
overflow inconsistently, so it would be difficult to define the
result here.)
Differential Revision: https://reviews.llvm.org/D47851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334326
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Fri, 8 Jun 2018 21:23:09 +0000 (21:23 +0000)]
[LangRef] insertelement/extractelement return poison for out of range.
We need to clarify the language here. I think poison makes more sense
than undef, since it's an undefined operation rather than uninitialized
memory. I don't think anything depends on the difference at the moment,
though.
Differential Revision: https://reviews.llvm.org/D47859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334325
91177308-0d34-0410-b5e6-
96231b3b80d8
Ryan Prichard [Fri, 8 Jun 2018 21:21:55 +0000 (21:21 +0000)]
Test commit: remove a blank line
Test commit access
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334324
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Fri, 8 Jun 2018 21:16:56 +0000 (21:16 +0000)]
[ARM] Allow CMPZ transforms even if the input has multiple uses.
It looks like this got left in by accident in r289794; I can't think of
any reason this check would be necessary. (Maybe it was meant to be a
check that the AND has one use? But we check that a few lines earlier.)
Differential Revision: https://reviews.llvm.org/D47921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334322
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Fri, 8 Jun 2018 21:14:49 +0000 (21:14 +0000)]
[SmallSet] Add some simple unit tests.
Reviewers: craig.topper, dblaikie
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D47940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334321
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 8 Jun 2018 20:43:07 +0000 (20:43 +0000)]
[SCEV] Look through zero-extends in howFarToZero
An expression like
(zext i2 {(trunc i32 (1 + %B) to i2),+,1}<%while.body> to i32)
will become zero exactly when the nested value becomes zero in its type.
Strip injective operations from the input value in howFarToZero to make
the value simpler.
Differential Revision: https://reviews.llvm.org/D47951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334318
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Fri, 8 Jun 2018 20:42:36 +0000 (20:42 +0000)]
[InstCombine] Skip dbg.value(s) when looking at stack{save,restore}.
Fixes PR37713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334317
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 8 Jun 2018 18:47:33 +0000 (18:47 +0000)]
[InstCombine] add llvm.assume + debuginfo test (PR37726); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334314
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Fri, 8 Jun 2018 18:33:16 +0000 (18:33 +0000)]
[asan] Instrument comdat globals on COFF targets
Summary:
If we can use comdats, then we can make it so that the global metadata
is thrown away if the prevailing definition of the global was
uninstrumented. I have only tested this on COFF targets, but in theory,
there is no reason that we cannot also do this for ELF.
This will allow us to re-enable string merging with ASan on Windows,
reducing the binary size cost of ASan on Windows.
Reviewers: eugenis, vitalybuka
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D47841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334313
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 8 Jun 2018 18:00:46 +0000 (18:00 +0000)]
[DAGCombiner] clean up comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334312
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 17:58:42 +0000 (17:58 +0000)]
[X86][SSE] Support v8i16/v16i16 rotations
Extension to D46954 (PR37426), this patch adds support for v8i16/v16i16 rotations in a similar manner - the conversion of the shift/rotate amount to a multiplication factor and the use of PMULLW to shift left and PMULHUW (ISD::MULHU) to shift the wrapped bits back around to be ORd together.
Differential Revision: https://reviews.llvm.org/D47822
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334309
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 8 Jun 2018 17:54:28 +0000 (17:54 +0000)]
[x86] add tests for node-level FMF; NFC
These cases should be optimized using the change from D47911.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334308
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 8 Jun 2018 17:42:35 +0000 (17:42 +0000)]
[x86] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334307
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Berg [Fri, 8 Jun 2018 17:39:50 +0000 (17:39 +0000)]
Utilize new SDNode flag functionality to expand current support for fsub
Summary: This patch originated from D46562 and is a proper subset, with some issues addressed for fsub.
Reviewers: spatel, hfinkel, wristow, arsenm
Reviewed By: spatel
Subscribers: wdng
Differential Revision: https://reviews.llvm.org/D47910
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334306
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Fri, 8 Jun 2018 17:30:45 +0000 (17:30 +0000)]
[VPlan] Move recipe construction to VPRecipeBuilder.
This patch moves the recipe-creation functions out of
LoopVectorizationPlanner, which should do the high-level
orchestration of the transformations.
Reviewers: dcaballe, rengolin, hsaito, Ayal
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D47595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334305
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 17:00:45 +0000 (17:00 +0000)]
[X86][BtVer2] Add support for all SUB/XOR 32/64 scalar instructions that should match the dependency-breaking 'zero-idiom'
As detailed on Agner's Microarchitecture doc (21.8 AMD Bobcat and Jaguar pipeline - Dependency-breaking instructions), these instructions are dependency breaking and fast-path zero the destination register (and appropriate EFLAGS bits).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334303
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 16:40:15 +0000 (16:40 +0000)]
[X86] Fix schedule-x86_64.s tests to use different registers in reg-reg cases
Same fix as rL334110: I noticed while working on zero-idiom + dependency-breaking support (PR36671) that most of our binary instruction schedule tests were reusing the same src registers, which would cause the tests to fail once we enable scalar zero-idiom support on btver2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334302
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniil Fukalov [Fri, 8 Jun 2018 16:29:04 +0000 (16:29 +0000)]
[AMDGPU] Inline asm - added i16, half and i128 types support
AMDGPU inline assembler support i16, half and i128 typed variables in constraints, but they were reported as error.
Needed to fix https://github.com/RadeonOpenCompute/ROCm/issues/341,
e.g. to be able to load with global_load_dwordx4 to a 128bit integer variable
Differential Revision: https://reviews.llvm.org/D44920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334301
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniil Fukalov [Fri, 8 Jun 2018 16:22:52 +0000 (16:22 +0000)]
reapply r334209 with fixes for harfbuzz in Chromium
r334209 description:
[LSR] Check yet more intrinsic pointer operands
the patch fixes another assertion in isLegalUse()
Differential Revision: https://reviews.llvm.org/D47794
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334300
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Fri, 8 Jun 2018 15:44:53 +0000 (15:44 +0000)]
[NFC][InstSimplify] SimplifyAddInst(): coding style: variable names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334299
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Fri, 8 Jun 2018 15:44:47 +0000 (15:44 +0000)]
[InstSimplify] add nuw %x, -1 -> -1 fold.
Summary:
`%ret = add nuw i8 %x, C`
From [[ https://llvm.org/docs/LangRef.html#add-instruction | langref ]]:
nuw and nsw stand for “No Unsigned Wrap” and “No Signed Wrap”,
respectively. If the nuw and/or nsw keywords are present,
the result value of the add is a poison value if unsigned
and/or signed overflow, respectively, occurs.
So if `C` is `-1`, `%x` can only be `0`, and the result is always `-1`.
I'm not sure we want to use `KnownBits`/`LVI` here, because there is
exactly one possible value (all bits set, `-1`), so some other pass
should take care of replacing the known-all-ones with constant `-1`.
The `test/Transforms/InstCombine/set-lowbits-mask-canonicalize.ll` change *is* confusing.
What happening is, before this: (omitting `nuw` for simplicity)
1. First, InstCombine D47428/rL334127 folds `shl i32 1, %NBits`) to `shl nuw i32 -1, %NBits`
2. Then, InstSimplify D47883/rL334222 folds `shl nuw i32 -1, %NBits` to `-1`,
3. `-1` is inverted to `0`.
But now:
1. *This* InstSimplify fold `%ret = add nuw i32 %setbit, -1` -> `-1` happens first,
before InstCombine D47428/rL334127 fold could happen.
Thus we now end up with the opposite constant,
and it is all good: https://rise4fun.com/Alive/OA9
https://rise4fun.com/Alive/sldC
Was mentioned in D47428 review.
Follow-up for D47883.
Reviewers: spatel, craig.topper
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D47908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334298
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 15:43:00 +0000 (15:43 +0000)]
[X86][BtVer2] Remove SBB tests that were accidentally added in rL334296
These aren't true zero-idiom instructions (just dependency breaking).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334297
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 15:28:43 +0000 (15:28 +0000)]
[X86][BtVer2] Add tests for scalar SUB/XOR instructions that should match the dependency-breaking 'zero-idiom'
As detailed on Agner's Microarchitecture doc (21.8 AMD Bobcat and Jaguar pipeline - Dependency-breaking instructions).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334296
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexander Kornienko [Fri, 8 Jun 2018 15:19:16 +0000 (15:19 +0000)]
commandLineFitsWithinSystemLimits Overestimates System Limits
Summary:
The function `llvm::sys::commandLineFitsWithinSystemLimits` appears to be overestimating the system limits. This issue was discovered while attempting to enable response files in the Swift compiler. When the compiler submits its frontend jobs, those jobs are subjected to the system limits on command line length. `commandLineFitsWithinSystemLimits` is used to determine if the job's arguments need to be wrapped in a response file. There are some cases where the argument size for the job passes `commandLineFitsWithinSystemLimits`, but actually exceeds the real system limit, and the job fails.
`clang` also uses this function to decide whether or not to wrap it's job arguments in response files. See: https://github.com/llvm-mirror/clang/blob/master/lib/Driver/Driver.cpp#L1341. Clang will also fail for response files who's size falls within a certain range. I wrote a script that should find a failure point for `clang++`. All that is needed to run it is Python 2.7, and a simple "hello world" program for `test.cc`. It should run on Linux and on macOS. The script is available here: https://gist.github.com/dabelknap/
71bd083cd06b91c5b3cef6a7f4d3d427. When it hits a failure point, you should see a `clang: error: unable to execute command: posix_spawn failed: Argument list too long`.
The proposed solution is to mirror the behavior of `xargs` in `commandLinefitsWithinSystemLimits`. `xargs` defaults to 128k for the command line length size (See: https://fossies.org/dox/findutils-4.6.0/buildcmd_8c_source.html#l00551). It adjusts this depending on the value of `ARG_MAX`.
Reviewers: alexfh
Reviewed By: alexfh
Subscribers: llvm-commits
Tags: #clang
Patch by Austin Belknap!
Differential Revision: https://reviews.llvm.org/D47795
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334295
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Fri, 8 Jun 2018 15:16:25 +0000 (15:16 +0000)]
Clean up some code in Program.
NFC here, this just raises some platform specific ifdef hackery
out of a class and creates proper platform-independent typedefs
for the relevant things. This allows these typedefs to be
reused in other places without having to reinvent this preprocessor
logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334294
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Fri, 8 Jun 2018 15:15:56 +0000 (15:15 +0000)]
Add a file open flag that disables O_CLOEXEC.
O_CLOEXEC is the right default, but occasionally you don't
want this. This is especially true for tools like debuggers
where you might need to spawn the child process with specific
files already open, but it's occasionally useful in other
scenarios as well, like when you want to do some IPC between
parent and child.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334293
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 15:01:40 +0000 (15:01 +0000)]
[X86][BtVer2] Limit zero idiom tests to a single iteration.
Reduces output size and we're only wanting to check that the instructions are fast-path'd (just Dispatch+Retire) anyhow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334292
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 14:53:52 +0000 (14:53 +0000)]
Fix Wdocumentation warning for unknown param. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334291
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 14:07:21 +0000 (14:07 +0000)]
[X86][SSE] Add SSE2/AVX2 vector rotate tests
Now that we're custom lowering vector rotates for SSE in general we should be testing the combines with them as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334290
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 13:59:11 +0000 (13:59 +0000)]
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
Simplify combineVectorTruncationWithPACKUS to mask the upper bits followed by calling truncateVectorWithPACK instead of duplicating with similar code.
This results in the codegen using (V)PACKUSDW on SSE41+ targets for vXi64/vXi32 inputs where before it always used PACKUSWB (along with a lot more bitcasting).
I've raised PR37749 as until we avoid unnecessary concats back to 256-bit for bitwise ops, we can't avoid splitting the input value into 128-bit subvectors for masking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334289
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 8 Jun 2018 13:53:13 +0000 (13:53 +0000)]
[x86] restore test comment; NFC
The description got deleted along with the FIXME note in
rL334268.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334288
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Fri, 8 Jun 2018 13:03:21 +0000 (13:03 +0000)]
[BPI] Apply invoke heuristic before loop branch heuristic
Currently the loop branch heuristic is applied before the invoke heuristic which makes us overestimate the probability of the unwind destination of invokes inside loops. This in turn makes us grossly underestimate the frequencies of loops with invokes.
Reviewed By: skatkov, vsk
Differential Revision: https://reviews.llvm.org/D47371
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334285
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Fri, 8 Jun 2018 12:53:51 +0000 (12:53 +0000)]
[VPlan] Move recipe based VPlan generation to separate function.
This first step separates VPInstruction-based and VPRecipe-based
VPlan creation, which should make it easier to migrate to VPInstruction
based code-gen step by step.
Reviewers: Ayal, rengolin, dcaballe, hsaito, mkuper, mzolotukhin
Reviewed By: dcaballe
Subscribers: bollu, tschuett, rkruppe, llvm-commits
Differential Revision: https://reviews.llvm.org/D47477
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334284
91177308-0d34-0410-b5e6-
96231b3b80d8
Henry Wong [Fri, 8 Jun 2018 12:42:12 +0000 (12:42 +0000)]
[ADT] Add `StringRef::rsplit(StringRef Separator)`.
Summary: Add `StringRef::rsplit(StringRef Separator)` to achieve the function of getting the tail substring according to the separator. A typical usage is to get `data` in `std::basic_string::data`.
Reviewers: mehdi_amini, zturner, beanz, xbolva00, vsk
Reviewed By: zturner, xbolva00, vsk
Subscribers: vsk, xbolva00, llvm-commits, MTC
Differential Revision: https://reviews.llvm.org/D47406
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334283
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Dardis [Fri, 8 Jun 2018 10:55:34 +0000 (10:55 +0000)]
[mips] Correct the predicates for a number of codegen only instructions
Reviewers: smaksimovic, atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D47638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334280
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Fri, 8 Jun 2018 10:39:05 +0000 (10:39 +0000)]
[RISCV] Implement MC layer support for the fence.tso instruction
The instruction makes use of a previously ignored field in the fence
instruction. It is introduced in the version 2.3 draft of the RISC-V
specification after much work by the Memory Model Task Group.
As clarified here <https://github.com/riscv/riscv-isa-manual/issues/186>,
the fence.tso assembler mnemonic does not have operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334278
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 8 Jun 2018 10:29:00 +0000 (10:29 +0000)]
[X86][SSE] Consistently prefer lowering to PACKUS over PACKSS
We have some combines/lowerings that attempt to use PACKSS-then-PACKUS and others that use PACKUS-then-PACKSS.
PACKUS is much easier to combine with if we know the upper bits are zero as ComputeKnownBits can easily see through BITCASTs etc. especially now that rL333995 and rL334007 have landed. It also effectively works at byte level which further simplifies shuffle combines.
The only (minor) annoyances are that ComputeKnownBits can sometimes take longer as it doesn't fail as quickly as ComputeNumSignBits (but I'm not seeing any actual regressions in tests) and PACKUSDW only became available after SSE41 so we have more codegen diffs between targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334276
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Fri, 8 Jun 2018 09:54:04 +0000 (09:54 +0000)]
[TableGen] Make DAGInstruction own Pattern to avoid leaking it.
Reviewers: dsanders, craig.topper, stoklund, nhaehnle
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D47525
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334275
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Shirokiy [Fri, 8 Jun 2018 08:21:20 +0000 (08:21 +0000)]
[LV] Fix PR36983. For a given recurrence, fix all phis in exit block
There could be more than one PHIs in exit block using same loop recurrence.
Don't assume there is only one and fix each user.
Differential Revision: https://reviews.llvm.org/D47788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334271
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Fri, 8 Jun 2018 08:05:54 +0000 (08:05 +0000)]
AMDGPU: Error on LDS global address in functions
These won't work as expected now, so error on them to avoid
wasting time debugging this in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334269
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Parker [Fri, 8 Jun 2018 07:49:04 +0000 (07:49 +0000)]
[DAGCombine] Fix for PR37667
While trying to propagate AND masks back to loads, we currently allow
one non-load node to be included as a leaf in chain. This fix now
limits that node to produce only a single data value.
Differential Revision: https://reviews.llvm.org/D47878
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334268
91177308-0d34-0410-b5e6-
96231b3b80d8
Hiroshi Inoue [Fri, 8 Jun 2018 04:00:54 +0000 (04:00 +0000)]
[NFC] fix formatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334263
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 8 Jun 2018 01:09:31 +0000 (01:09 +0000)]
[X86] Improve some shuffle decoding code to remove a conditional from a loop and reduce the number of temporary variables. NFCI
The NumControlBits variable was definitely sketchy. I think that only worked because the expected value was 1 or 2 and the number of lanes was 2 or 4. Had their been 8 lanes the number of bits should have been 3 not 4 as the previous code would have given.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334258
91177308-0d34-0410-b5e6-
96231b3b80d8
Tony Tye [Fri, 8 Jun 2018 01:00:11 +0000 (01:00 +0000)]
[AMDGPU] Simplify memory legalizer (add missing virtual descructor)
Differential Revision: https://reviews.llvm.org/D47504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334257
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Fri, 8 Jun 2018 00:43:27 +0000 (00:43 +0000)]
Revert r334209 "[LSR] Check yet more intrinsic pointer operands"
This causes cast failures when compiling harfbuzz in Chromium.
Reproducer on the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334254
91177308-0d34-0410-b5e6-
96231b3b80d8
Gabor Buella [Thu, 7 Jun 2018 23:32:18 +0000 (23:32 +0000)]
NFC Fix a comment in ValueTypes.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334247
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 7 Jun 2018 23:25:13 +0000 (23:25 +0000)]
Expose a single global file open function.
This one allows much more flexibility than the standard
openFileForRead / openFileForWrite functions. Since there is now
just one "real" function that does the work, all other implementations
simply delegate to this one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334246
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Berg [Thu, 7 Jun 2018 22:49:09 +0000 (22:49 +0000)]
propagate fast math flags via IR on fma and sub expressions
Summary: This change uses fmf subflags to guard fma optimizations as well as unsafe. These changes originated from D46483 and have been simplified via getNode.
Reviewers: spatel, arsenm, hfinkel, javed.absar
Reviewed By: spatel
Subscribers: nemanjai, wdng
Differential Revision: https://reviews.llvm.org/D47388
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334242
91177308-0d34-0410-b5e6-
96231b3b80d8
Tony Tye [Thu, 7 Jun 2018 22:28:32 +0000 (22:28 +0000)]
[AMDGPU] Simplify memory legalizer
- Make code easier to maintain.
- Avoid generating waitcnts for VMEM if the address sppace does not involve VMEM.
- Add support to generate waitcnts for LDS and GDS memory.
Differential Revision: https://reviews.llvm.org/D47504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334241
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Thu, 7 Jun 2018 21:19:50 +0000 (21:19 +0000)]
[NFC][InstSimplify] Add tests for add nuw %x, -1 -> -1 fold.
%ret = add nuw i8 %x, C
From langref:
nuw and nsw stand for “No Unsigned Wrap” and “No Signed Wrap”,
respectively. If the nuw and/or nsw keywords are present,
the result value of the add is a poison value if unsigned
and/or signed overflow, respectively, occurs.
So if C is -1, %x can only be 0, and the result is always -1.
https://rise4fun.com/Alive/sldC
Was mentioned in D47428 review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334236
91177308-0d34-0410-b5e6-
96231b3b80d8
Roman Lebedev [Thu, 7 Jun 2018 21:19:45 +0000 (21:19 +0000)]
[NFC][InstSimplify] One more negative test for shl nuw C, %x -> C fold.
Follow-up for rL334200, rL334206.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334235
91177308-0d34-0410-b5e6-
96231b3b80d8
Petr Hosek [Thu, 7 Jun 2018 21:01:32 +0000 (21:01 +0000)]
[Support] Link libzircon.so when building LLVM for Fuchsia
This is necessary for zx_* symbols.
Differential Revision: https://reviews.llvm.org/D47848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334232
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 7 Jun 2018 20:37:22 +0000 (20:37 +0000)]
Try to fix build.
I don't know how to build this code, but based on the failing
buildbot error message it looks like this change should get
the buildbot up and running again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334231
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 7 Jun 2018 20:07:08 +0000 (20:07 +0000)]
Fix unused private variable.
This parameter got lost in the refactor. Add it back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334223
91177308-0d34-0410-b5e6-
96231b3b80d8