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android-x86/hardware-intel-common-vaapi.git
7 years agoUpdate CBR algo for H.264 per tempolar layer
Xiang, Haihao [Tue, 13 Sep 2016 08:02:46 +0000 (16:02 +0800)]
Update CBR algo for H.264 per tempolar layer

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoInitialize internal related parameters per temporal layer for H.264 BRC
Xiang, Haihao [Tue, 13 Sep 2016 08:02:45 +0000 (16:02 +0800)]
Initialize internal related parameters per temporal layer for H.264 BRC

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoUse arrays to store BRC related parameters per temporal layer
Xiang, Haihao [Tue, 13 Sep 2016 08:02:44 +0000 (16:02 +0800)]
Use arrays to store BRC related parameters per temporal layer

Currently only the first element is used

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoChange the type of the 2nd parameter of intel_mfc_update_hrd()
Xiang, Haihao [Tue, 13 Sep 2016 08:02:43 +0000 (16:02 +0800)]
Change the type of the 2nd parameter of intel_mfc_update_hrd()

In addition, change the two caller functions as well.

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoSave bitrate and framerate per temporal layer
Xiang, Haihao [Tue, 13 Sep 2016 08:02:42 +0000 (16:02 +0800)]
Save bitrate and framerate per temporal layer

v2: bitrate and framerate related fields in VAEncSequenceParameterBufferH264
are used for the hightest layer

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoUse arrays to store bitrate and framerate
Xiang, Haihao [Tue, 13 Sep 2016 08:02:41 +0000 (16:02 +0800)]
Use arrays to store bitrate and framerate

Currently only the first element is used

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoCheck temporal layer structure
Xiang, Haihao [Tue, 13 Sep 2016 08:02:40 +0000 (16:02 +0800)]
Check temporal layer structure

v2: set right temporal layer id for current frame

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoStore buffers for VAEncMiscParameterTypeRateControl and VAEncMiscParameterTypeFrameRa...
Xiang, Haihao [Tue, 13 Sep 2016 08:02:39 +0000 (16:02 +0800)]
Store buffers for VAEncMiscParameterTypeRateControl and VAEncMiscParameterTypeFrameRate per temporal layer

v2: rebased

v3: Don't store buffers per layer if the layer structure is not submitted before

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoUse a 2-dimensional array to store misc parameters
Xiang, Haihao [Tue, 13 Sep 2016 08:02:38 +0000 (16:02 +0800)]
Use a 2-dimensional array to store misc parameters

This patch allows multiple misc parameter buffers for the same type
within the same Begin/Render/End sequence in the future. Currently
only the first element for each misc type is used, so it doesn't
change any functionality yet.

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agomove QpPrimeY to another inner structure for H.264/VP8 BRC
Xiang, Haihao [Tue, 13 Sep 2016 08:02:37 +0000 (16:02 +0800)]
move QpPrimeY to another inner structure for H.264/VP8 BRC

It doesn't cause functionality change

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoRemove unused fields and code in H.264/VP8 BRC
Xiang, Haihao [Tue, 13 Sep 2016 08:02:36 +0000 (16:02 +0800)]
Remove unused fields and code in H.264/VP8 BRC

H.264 and VP8 share some data structures

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoDo not use the input parameters directly in H.264 BRC
Xiang, Haihao [Tue, 13 Sep 2016 08:02:35 +0000 (16:02 +0800)]
Do not use the input parameters directly in H.264 BRC

The corresponding paramters are saved in the context

v2: use frame_width_in_pixel and frame_height_in_pixel instead of
frame_width_in_mbs and frame_height_in_mbs

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoRemove unnecessary code in H.264 BRC
Xiang, Haihao [Tue, 13 Sep 2016 08:02:34 +0000 (16:02 +0800)]
Remove unnecessary code in H.264 BRC

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoCheck bitrate control related parameters in sequence and misc parameters
Xiang, Haihao [Tue, 13 Sep 2016 08:02:33 +0000 (16:02 +0800)]
Check bitrate control related parameters in sequence and misc parameters

Currently only used for H.264 encoding

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoAdd some new internal variables for a new sequence
Xiang, Haihao [Tue, 13 Sep 2016 08:02:32 +0000 (16:02 +0800)]
Add some new internal variables for a new sequence

Currently these variables are used only for H.264 encoding

v2: rename frame_width_in_mbs and frame_height_in_mbs to
frame_width_in_pixel and frame_height_in_pixel. It moves
WIDTH_IN_MACROBLOCKS() and HEIGHT_IN_MACROBLOCKS() from gen9_vdenc.h
to i965_encoder.h so that the two macros can be used in
other codecs.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoAdd an internal flag to indicate the start of a new sequence
Xiang, Haihao [Tue, 13 Sep 2016 08:02:31 +0000 (16:02 +0800)]
Add an internal flag to indicate the start of a new sequence

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agointel_mfc_brc_prepare() only works for H.264 or H.264 MVC
Xiang, Haihao [Tue, 13 Sep 2016 08:02:30 +0000 (16:02 +0800)]
intel_mfc_brc_prepare() only works for H.264 or H.264 MVC

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Luo, Focus <focus.luo@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoFix: check the bo of reconstructed to ensure it is not NULL
Pengfei Qu [Tue, 13 Sep 2016 02:07:00 +0000 (10:07 +0800)]
Fix: check the bo of reconstructed to ensure it is not NULL

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Tested-by: Xiang, Haihao <haihao.xiang@intel.com>
7 years agoCode cleanup for vme/mfc initializing on SKL
Xiang, Haihao [Thu, 8 Sep 2016 08:28:14 +0000 (16:28 +0800)]
Code cleanup for vme/mfc initializing on SKL

It keeps i965_encoder.c simple

v2: rebased

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agotest: skip jpeg fourcc decode test if unsupported by hw
U. Artie Eoff [Wed, 7 Sep 2016 20:43:38 +0000 (13:43 -0700)]
test: skip jpeg fourcc decode test if unsupported by hw

If the hardware does not support jpeg decode, then log this
information and return from the test early.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add getFullTestName to i965 test fixture
U. Artie Eoff [Wed, 7 Sep 2016 20:43:37 +0000 (13:43 -0700)]
test: add getFullTestName to i965 test fixture

Add I965TestFixture::getFullTestName to allow tests to
log the current test's name.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add jpeg entrypoint test
U. Artie Eoff [Wed, 7 Sep 2016 20:43:36 +0000 (13:43 -0700)]
test: add jpeg entrypoint test

Add a test to verify the i965_CreateConfig functionality
for the VAProfileJPEGBaseline/VAEntrypointVLD entrypoint
based on platform supported or not.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add more convenience macros and wrap VAStatus
U. Artie Eoff [Wed, 7 Sep 2016 20:43:35 +0000 (13:43 -0700)]
test: add more convenience macros and wrap VAStatus

Add some more convenience test macros and wrap the
VAStatus in a class so that it can be streamed by its
name instead of its value by the gtest framework.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agomove HAS_* macros to header
U. Artie Eoff [Thu, 8 Sep 2016 14:47:57 +0000 (07:47 -0700)]
move HAS_* macros to header

Move the HAS_* macros (i.e. HAS_JPEG_ENCODING, etc.) to
the i965_drv_video.h header so that they can be used
by testing.

This will allow tests to use the macros to determine
if a particular test is supported on the current
execution platform.

v2: rebased

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoHEVC10bit ENC: work around gpu hang when p010->nv12
Pengfei Qu [Thu, 8 Sep 2016 00:43:27 +0000 (08:43 +0800)]
HEVC10bit ENC: work around gpu hang when p010->nv12

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoHEVC10bit ENC:enable hevc 10bit encoding pipeline
Pengfei Qu [Thu, 8 Sep 2016 00:43:26 +0000 (08:43 +0800)]
HEVC10bit ENC:enable hevc 10bit encoding pipeline

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoHEVC10bit ENC:enable hevc 10bit on VME and PAK
Pengfei Qu [Thu, 8 Sep 2016 00:43:25 +0000 (08:43 +0800)]
HEVC10bit ENC:enable hevc 10bit on VME and PAK

1.add p010->nv12 before VME
2.add CBR support

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com>
7 years agoHEVC10bit ENC: add private surface for p010 conversion to nv12
Pengfei Qu [Thu, 8 Sep 2016 00:43:24 +0000 (08:43 +0800)]
HEVC10bit ENC: add private surface for p010 conversion to nv12

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com>
7 years agotest: fix jpeg decode invalid indexing
U. Artie Eoff [Wed, 7 Sep 2016 19:22:44 +0000 (12:22 -0700)]
test: fix jpeg decode invalid indexing

Use hsample and vsample factor in printComponentDataTo to
avoid invalid indexes into the data array.

This fixes a segfault in the jpeg fourcc tests that may be
triggered during 'make check'.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
7 years agotest: add TESTING readme file
U. Artie Eoff [Thu, 1 Sep 2016 19:59:45 +0000 (12:59 -0700)]
test: add TESTING readme file

Add a TESTING readme file to describe the design and usage
of the libva-intel-driver tests.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add some chipset tests
U. Artie Eoff [Thu, 1 Sep 2016 19:59:44 +0000 (12:59 -0700)]
test: add some chipset tests

Add various tests to verify the integrity of the
chipset and pciid definitions and lookups.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add some object_heap tests
U. Artie Eoff [Thu, 1 Sep 2016 19:59:43 +0000 (12:59 -0700)]
test: add some object_heap tests

Add some basic object_heap tests to verify logical
usage.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add some JPEG decode test cases
U. Artie Eoff [Thu, 1 Sep 2016 19:59:42 +0000 (12:59 -0700)]
test: add some JPEG decode test cases

Test that the driver properly decodes JPEG data that
is encoded in various fourcc formats.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add an i965 initialize test
U. Artie Eoff [Thu, 1 Sep 2016 19:59:41 +0000 (12:59 -0700)]
test: add an i965 initialize test

Add basic i965 initialize test to verify certain driver data
is properly initialized and to demonstrate the usage of the
I965TestFixture class.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add i965 test fixture
U. Artie Eoff [Thu, 1 Sep 2016 19:59:40 +0000 (12:59 -0700)]
test: add i965 test fixture

Add an i965 test fixture class which creates a va drm display
for driver testing and initializes/terminates va.  It also
provides some conversion operators for converting to various
driver data types.  Various driver wrapper functions are
provided, too, for convenience.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: link to i965 convenience library
U. Artie Eoff [Thu, 1 Sep 2016 19:59:39 +0000 (12:59 -0700)]
test: link to i965 convenience library

Link the i965 convenience library to the i965 test
executable for testing.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoi965: compile driver source as convenience library
U. Artie Eoff [Thu, 1 Sep 2016 19:59:38 +0000 (12:59 -0700)]
i965: compile driver source as convenience library

Compile driver source into a noinst convenience library and
link it into the driver module.  This allows for tests to link
to the driver library, too, for testing.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add initial test_i965_drv_video target
U. Artie Eoff [Thu, 1 Sep 2016 19:59:37 +0000 (12:59 -0700)]
test: add initial test_i965_drv_video target

Add test_i965_drv_video as noinst program with an initial
test main() definition.

Also provide a test.h header with common test includes and
definitions that can be included by all test compilation
units.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotoolchain: build gtest convenience library
U. Artie Eoff [Thu, 1 Sep 2016 19:59:36 +0000 (12:59 -0700)]
toolchain: build gtest convenience library

Define autoconf/automake rules to build libgtest.la
as a convenience library.

Add --enable-tests configure option (default:no).

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agotest: add googletest release-1.8.0 source
U. Artie Eoff [Thu, 1 Sep 2016 19:59:35 +0000 (12:59 -0700)]
test: add googletest release-1.8.0 source

We will use the Google Test Framework for testing.

Google Test is not meant to be packaged and used as a system
dependency like other libraries.  Google Test recommends that
it be custom compiled for each project that uses it.  Thus,
we'll keep our own copy of it here and compile it as needed.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoAdd the write_enabled flag of GPE media surface state
peng.chen [Tue, 23 Aug 2016 05:25:01 +0000 (13:25 +0800)]
Add the write_enabled flag of GPE media surface state

Fix this issue: https://bugs.freedesktop.org/show_bug.cgi?id=94607

Signed-off-by: peng.chen <peng.c.chen@intel.com>
7 years ago1.7.3.pre1 for development
Xiang, Haihao [Tue, 23 Aug 2016 03:50:59 +0000 (11:50 +0800)]
1.7.3.pre1 for development

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
7 years agoHEVC ENC:set the initial QP threshold to avoid the low quality in the first GOP
Pengfei Qu [Tue, 23 Aug 2016 02:07:46 +0000 (10:07 +0800)]
HEVC ENC:set the initial QP threshold to avoid the low quality in the first GOP

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoHEVC ENC:fill the correct chroma intra mode
Pengfei Qu [Tue, 23 Aug 2016 02:06:43 +0000 (10:06 +0800)]
HEVC ENC:fill the correct chroma intra mode

Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoRemove unused .g9a/.g9b files
Xiang, Haihao [Tue, 23 Aug 2016 01:53:02 +0000 (09:53 +0800)]
Remove unused .g9a/.g9b files

v2: remove unused .g9a files, and change the short commit log as well

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoCleanup gen9_mfc.c
Xiang, Haihao [Mon, 22 Aug 2016 08:52:51 +0000 (16:52 +0800)]
Cleanup gen9_mfc.c

This patch removes all unneeded functions/variables in gen9_mfc.c for mfc pipeline setting.

Especially it doesn't include shaders/utils/mfc_batchbuffer_avc_intra.g9b and
shaders/utils/mfc_batchbuffer_avc_inter.g9b in gen9_mfc.c because the two .g9b files are no longer
included in the package created by 'make dist'

C       i965_drv_video_la-gen9_mfc.lo
gen9_mfc.c:54:55: fatal error: shaders/utils/mfc_batchbuffer_avc_intra.g9b: No such file or directory
 #include "shaders/utils/mfc_batchbuffer_avc_intra.g9b"

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoSet the right transform 8x8 flag for Intra macroblock in VME output on BDW+
Xiang, Haihao [Wed, 17 Aug 2016 01:59:53 +0000 (09:59 +0800)]
Set the right transform 8x8 flag for Intra macroblock in VME output on BDW+

VME message doesn't output the transform 8x8 flag, the shader
set the right flag accordingly.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Meng, Jia <jia.meng@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoRemove unused fields in struct encode_state
Xiang, Haihao [Tue, 16 Aug 2016 04:33:19 +0000 (12:33 +0800)]
Remove unused fields in struct encode_state

It also fixes a wrong assert() in gen8_mfc.c

v2: Correct condition code when removing used fields

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoSet cost to 0 for CHROMA INTRA mode
Xiang, Haihao [Tue, 16 Aug 2016 04:10:55 +0000 (12:10 +0800)]
Set cost to 0 for CHROMA INTRA mode

Commit 1cd6795 causes quality drop for U/V plane.

Reported-by: Wang, Fei W <fei.w.wang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Wang, Fei W <fei.w.wang@intel.com>
Reviewed-by: Seaan V Kelley <seanvk@posteo.de>
7 years agoEncode/VP9: Don't use hardcoded offsets
Xiang, Haihao [Mon, 15 Aug 2016 02:46:11 +0000 (10:46 +0800)]
Encode/VP9: Don't use hardcoded offsets

codec_private_data in struct i965_coded_buffer_segment is used to store
codec related data. Add 'struct vp9_encode_status' for the data that will
be written into codec_private_data

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoEncode/VP9: turn gen9_vp9_get_coded_status() into a local function
Xiang, Haihao [Mon, 15 Aug 2016 02:46:10 +0000 (10:46 +0800)]
Encode/VP9: turn gen9_vp9_get_coded_status() into a local function

Set encoder_context->get_status to this local function when initializing,
so that we can fetch VP9 encoding status from the underlying context.

This patch changes the input parameters and removes redundant assigns

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoFix the code to avoid plus minus conversion if the result is already zero in the...
Ung, Teng En [Thu, 18 Aug 2016 06:06:36 +0000 (14:06 +0800)]
Fix the code to avoid plus minus conversion if the result is already zero in the float to integer conversion algorithm.

Signed-off-by: Ung, Teng En <teng.en.ung@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoi965_encoder: remove double check for VAStatus result
Daniel Charles [Thu, 18 Aug 2016 19:43:46 +0000 (12:43 -0700)]
i965_encoder: remove double check for VAStatus result

after creating underlying surface there's a double check on the
VAStatus result. Replace it with ASSERT_RET.

Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agovp9encoder: encoder to handle properly CSC on input surface
Daniel Charles [Sat, 13 Aug 2016 00:30:55 +0000 (17:30 -0700)]
vp9encoder: encoder to handle properly CSC on input surface

VP9 encoder was not checking for the yuv surface fourcc provided as the input.
If the format is I420, the driver creates an underlying surface where the input
is converted to NV12.

The underlying temporary surface was not used properly by the vme_pipeline_vp9 as
intel_encoder_check_yuv_surface will place the underlying surface on the
encode_state->input_yuv_object if it needed conversion or it will place the correct
current_render_target if the conversion is not needed.

Signed-off-by: Daniel Charles <daniel.charles@intel.com>
7 years agoUpdate the dependency on VA-API version
Xiang, Haihao [Mon, 15 Aug 2016 07:44:48 +0000 (15:44 +0800)]
Update the dependency on VA-API version

VA-API 0.39.3 is required for ROI delta QP support for CBR

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
7 years agoscaling matrix of h264 encoder on gen7/gen7.5/gen8/gen9
Jia Meng [Tue, 17 May 2016 02:13:16 +0000 (10:13 +0800)]
scaling matrix of h264 encoder on gen7/gen7.5/gen8/gen9

v1:
change the title according to yakui's comments.

qm is in raster scan order per va api, and fqm is in
column wise raster scan order per hardware requirement.

Signed-off-by: Jia Meng <jia.meng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoAdjust the maximum number of motion vectors for B frame on HSW+
Jia Meng [Fri, 11 Oct 2013 03:22:47 +0000 (11:22 +0800)]
Adjust the maximum number of motion vectors for B frame on HSW+

Signed-off-by: Jia Meng <jia.meng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoROI:enable on gen8 and gen9
Pengfei Qu [Mon, 18 Jul 2016 04:57:39 +0000 (12:57 +0800)]
ROI:enable on gen8 and gen9

v2:
use ASSERT_RET to check the ROI flag setted by user. instead of assert.

v1:
ROI enable on gen8 and gen9
Enable GPU to construct GPU command under ROI scenario
fix roi attrib config incorrectly

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoEncoding: ROI support for CQP/CBR on Haswell/Ivy
Zhao Yakui [Sun, 1 Jan 2012 02:54:34 +0000 (02:54 +0000)]
Encoding: ROI support for CQP/CBR on Haswell/Ivy

v2:
remove unused variable
set max ROI number to 3 according low power mode or 8

v1:
merge 3 ROI patches together
Encoding: Add the support of ROI under CQP on Haswell/Ivybridge
Encoding: Add the support of ROI for CBR
          Currently it will allocate the different qp for the ROI and non_ROI region
          based on the ROI ratio. The qp delta is related with the ratio of ROI region.
Encoding: Expand to support multiple ROI regions.
Encoding: bits.roi_rc_qp_delat_support

user guide:
The first is that the driver should expose the feature of qp_delta in
VAConfigAttribValEncROI.

The second is that the user-app can pass the qp_delta flag in
VAEncMiscParameterBufferROI and then the driver will use the qp_delta to
calculate the corresponding qp for ROI region. For the non-ROI region: I
think that currently we can use the following model to predicate the qp.
(qp_value = intel_qpvalue_from_qp(qp))
 Qp_value_roi * ROI_area + qp_value_nonroi * area_nonroi = base_qp *
total_area.

Signed-off-by: ceciliapeng <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoencoding:use the qp per every macroblock on Ivy and haswell
Zhao Yakui [Sun, 1 Jan 2012 02:13:28 +0000 (02:13 +0000)]
encoding:use the qp per every macroblock on Ivy and haswell

v1:
combine the patch together for Ivy and haswell
use-CPU-to-construct-the-MFC-pak-command

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: ceciliapeng <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoEncoding: Add one ROI flag and ROI buffer
Zhao Yakui [Sun, 1 Jan 2012 02:19:05 +0000 (02:19 +0000)]
Encoding: Add one ROI flag and ROI buffer

v3:
free the qp_per_mb for vme context

v2:
remove unused variable to avoid warning when compiling.

v1:
Add one flag to indicate whether ROI is supported in one encode context
Allocate one ROI buffer to hold qp per mb dynamically

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoEncoding: Dynamically select one mechanism to construct encoding command buffer for...
Zhao Yakui [Sun, 1 Jan 2012 02:18:58 +0000 (02:18 +0000)]
Encoding: Dynamically select one mechanism to construct encoding command buffer for each frame on Haswell and Gen7/Gen6

v2:remove the warning when compiling

v1: combine the Haswell and Gen7/6 patch together

Currently it uses the fixed policy to construct encoding command buffer.
(Use CPU or GPU). And it is statically compiled.
But sometimes it needs to choose the different mechanism on the fly instead
of statically compiled mode.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoEncoding: Pass the qp parameter into VME shader and VME shader select the different...
Zhao Yakui [Sun, 1 Jan 2012 02:18:52 +0000 (02:18 +0000)]
Encoding: Pass the qp parameter into VME shader and VME shader select the different cost table based on input Qp on Ivy

v1: add assert after bo map

In order to suppor that macroblocks have the different QP to do the motion
prediction, different cost tables are provided so that the VME engine can
select the different mode/motion-vector cost tables based on the input Qp.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoencoding: Send VME instruction uses one register as the desc parameter
Zhao Yakui [Sun, 1 Jan 2012 02:18:48 +0000 (02:18 +0000)]
encoding: Send VME instruction uses one register as the desc parameter

The desc parameter of current VME send instruction is immediate. And it can't
be updated based on the input parameter.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoEncoding: VME shader reads mbmv_cost from cost_table surface instead of constant...
Zhao Yakui [Sun, 1 Jan 2012 02:18:44 +0000 (02:18 +0000)]
Encoding: VME shader reads mbmv_cost from cost_table surface instead of constant buffer on Haswell

This is to do the prepartion of enhanced features.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoEncoding: mbmv cost table related changes for ROI
Zhao Yakui [Sun, 1 Jan 2012 01:24:19 +0000 (01:24 +0000)]
Encoding: mbmv cost table related changes for ROI

v3:remove the warning according to haihao's comments

v2: merge three mbmv cost table related patches together.
Encoding:Abstract the calculation of mbmv cost for qp as one function.
Encoding:Add one function that initialize mbmv cost table for supported Qp range.
Encoding:Setup one cost_table surface state for VME shader
According haihao's comments, free pointer directly.

v1:
format/style aligment accordingly to avoid the warning.
Currently the length of VME MEDIA_OBJECT command on Ivy can't exceed 8 dwords. If more parameter needs to be passed, the buffer length should be enlarged.
Pass the Qp parameter into VME shader

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: pjl <cecilia.peng@intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
7 years agoVPP: Check the returned status of hsw_veb_pre_format_convert before VEBOX VPP
Zhao Yakui [Wed, 10 Aug 2016 04:30:13 +0000 (12:30 +0800)]
VPP: Check the returned status of hsw_veb_pre_format_convert before VEBOX VPP

V1->V2: Use the ASSERT_RET for the debug purpose

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agoVPP: Check the VPP pipeline_parameter to avoid NULL pointer
Zhao Yakui [Wed, 10 Aug 2016 04:30:12 +0000 (12:30 +0800)]
VPP: Check the VPP pipeline_parameter to avoid NULL pointer

This is to fix the crash issue caused by the commit
51ad826fcc0d2512f7ef74e807e4b8526663fc28.

Reported-by: Xu,Guangxin <guangxin.xu@itnel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agogen8_mfc: fix memory leak during vp8 encoding
Hyunjun Ko [Wed, 10 Aug 2016 03:24:23 +0000 (12:24 +0900)]
gen8_mfc: fix memory leak during vp8 encoding

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=97272

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
7 years agodecoder/h264: don't assert on invalid parameter
Xiang, Haihao [Fri, 5 Aug 2016 05:25:58 +0000 (13:25 +0800)]
decoder/h264: don't assert on invalid parameter

Remove redundant checking on input parameters as well.

This avoids assertion failure in https://bugs.freedesktop.org/show_bug.cgi?id=94007,
but the upper library should check why are the invalid paramters passed to libva.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoSet cost for modes used for VP8 encoding
Xiang, Haihao [Wed, 3 Aug 2016 08:43:31 +0000 (16:43 +0800)]
Set cost for modes used for VP8 encoding

This is similar to what commit 1cd6795 does

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Wang, Fei W <fei.w.wang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoEncode: Set cost for MODE_CHROMA_INTRA/MODE_REFID_COST
Xiang, Haihao [Mon, 25 Jul 2016 08:53:08 +0000 (16:53 +0800)]
Encode: Set cost for MODE_CHROMA_INTRA/MODE_REFID_COST

This fixes the remaining issues mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=96703
after applying commit 3699c14

On GEN75+, driver copies vme_context->vme_state_message to VME kernel curbe buffer and
VME kernel uses the data in curbe buffer to initialize VME message payload.
vme_context->vme_state_message is set up in intel_vme_update_mbmv_cost(), which doesn't
set all costs for used modes in VME kernels. The uninitialized mode cost will result in
difference in VME output. Thanks for Elaine's finding that the issue disappears after
initializing VME state message buffer with zeros.

Signed-off-by: Elaine Wang <elaine.wang@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Mingruo Sun <mingruo.sun@intel.com>
7 years agoEncode: Clear right and bottom border of NV12 surface to avoid run2run issue
XuGuangxin [Mon, 25 Jul 2016 08:53:07 +0000 (16:53 +0800)]
Encode: Clear right and bottom border of NV12 surface to avoid run2run issue

This fixes some issues mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=96703

Signed-off-by: Xu Guangxin <guangxin.xu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Mingruo Sun <mingruo.sun@intel.com>
7 years agoi965_encoder: return a failing status
Daniel Charles [Fri, 29 Jul 2016 00:11:54 +0000 (17:11 -0700)]
i965_encoder: return a failing status

VAStatus when calling vme_pipeline was silently failing

Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
7 years agoMissing 'do' in "do ...while" in macro ALLOC_VDENC_BUFFER_RESOURCE
Lim Siew Hoon [Tue, 26 Jul 2016 08:54:37 +0000 (16:54 +0800)]
Missing 'do' in "do ...while" in macro ALLOC_VDENC_BUFFER_RESOURCE

Signed-off-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
7 years agodri: return error for unimplemented surface formats
Scott D Phillips [Mon, 25 Jul 2016 20:19:28 +0000 (13:19 -0700)]
dri: return error for unimplemented surface formats

Previously packed YUV422 surface were allowed to be renderd but
got rendered improperly.

Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
7 years agoFix to use source and output regions size instead of the input output surfaces origin...
Ung, Teng En [Wed, 22 Jun 2016 02:49:22 +0000 (10:49 +0800)]
Fix to use source and output regions size instead of the input output surfaces original size.

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=96739

Signed-off-by: Ung, Teng En <teng.en.ung@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoFix the condition used in 'else if()'
Xiang, Haihao [Wed, 13 Jul 2016 08:41:31 +0000 (16:41 +0800)]
Fix the condition used in 'else if()'

This 'else if()' is used to check output surface format, not input surface format.

Tested-by: Xu, Guangxin <Guangxin.Xu@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
8 years agoencode: h264, h265: Remove unnecessary warning
Sreerenj Balachandran [Fri, 15 Jul 2016 14:38:20 +0000 (17:38 +0300)]
encode: h264, h265: Remove unnecessary warning

The warning "Input ref list is Wrong" is generating
based on assumption that reference frames provided in
VAEncPictureParameterBuffer are in align with
ref_pic_list included in VAEncSliceParameterBuffer.
There shoudn't be such constraints, as per VA specification
pic_param->reference_frames can have any order based on
dpb manipulation.

Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
8 years agoExport the P010 surface attribute for HEVC/VP9 10-bits decoding
Zhao Yakui [Tue, 19 Jul 2016 07:33:46 +0000 (15:33 +0800)]
Export the P010 surface attribute for HEVC/VP9 10-bits decoding

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoshaders/gen9: fix build when no intel-gen4asm available
U. Artie Eoff [Wed, 20 Jul 2016 16:33:18 +0000 (09:33 -0700)]
shaders/gen9: fix build when no intel-gen4asm available

If intel-gen4asm version is < 1.9 or not installed then we
shouldn't run the associated make rules.

This fixes 'make dist' failure.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoi965_drv: fix cb_cr_height for YUV422 formats
Scott D Phillips [Tue, 19 Jul 2016 17:04:54 +0000 (10:04 -0700)]
i965_drv: fix cb_cr_height for YUV422 formats

YUV422 has full vertical chroma resolution, not half.

Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
8 years agoDowngrade the alignment requirement for linear surface on BDW+
Zhao Yakui [Mon, 27 Jun 2016 04:08:26 +0000 (12:08 +0800)]
Downgrade the alignment requirement for linear surface on BDW+

When sharing the YUY2/UYVY buffer with other driver, the current alignment is too
strict, which causes that it is not handled correctly by other driver.(The current
alignment is considered based on I420/YV12)

https://bugs.freedesktop.org/show_bug.cgi?id=96689

Tested-by: Cheah, Vincent Beng Keat<vincent.beng.keat.cheah@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoUpdate PCI IDs for Kabylake
Xiang, Haihao [Fri, 24 Jun 2016 02:04:28 +0000 (10:04 +0800)]
Update PCI IDs for Kabylake

Remove unused PCI IDs and add new PCI IDs for KBL, the IDs are taken
directly from intel-gfx patches, which are under review:

https://lists.freedesktop.org/archives/intel-gfx/2016-June/099263.html
https://lists.freedesktop.org/archives/intel-gfx/2016-June/099264.html

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
8 years agoMake sure a right VEBOX_IECP_STATE is used on BDW+
Xiang, Haihao [Thu, 16 Jun 2016 05:32:00 +0000 (13:32 +0800)]
Make sure a right VEBOX_IECP_STATE is used on BDW+

Some features of IECP aren't enabled, and the corresponding fields must
be set to 0 in VEBOX_IECP_STATE. Thanks for Peng's finding: The issue disappear
when disable libdrm cache

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=95349

Cc: peng.chen <peng.c.chen@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Lim Siew Hoon <siew.hoon.lim@intel.com>
Tested-by: peng.chen <peng.c.chen@intel.com>
Tested-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
8 years agocheck the result of hsw_veb_post_format_convert()
Víctor Manuel Jáquez Leal [Wed, 8 Jun 2016 12:03:16 +0000 (14:03 +0200)]
check the result of hsw_veb_post_format_convert()

This commit is related to previous commit e4996019, which is a simpler
approach of this commit, by adding more supported color formats.

For example, VA_FOURCC_BGRX should be added too, to avoid an assert with this
gstreamer pipeline:

gst-play-1.0 burosch1.mpg --videosink=ximagesink

http://samples.mplayerhq.hu/MPEG2/interlaced/burosch1.mpg

Nonetheless, instead of just adding already supported color formats
conversion, it is better to rely on what vpp_surface_convert() already checks,
by verifying the result operation, and avoid the assert.

This patch does it for hsw_veb_post_format_convert().

Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
8 years agoFollow the HW spec to set the surface cache attribute for Gen9+
Qu, PengFei [Mon, 30 May 2016 13:56:00 +0000 (09:56 -0400)]
Follow the HW spec to set the surface cache attribute for Gen9+

Currently it will use the unoptimized cache attribute for the surface on Gen9+.
This is to follow the HW spec to optimize the cache attribute of the surface
for gen9+.

Signed-off-by: Qu, Pengfei <pengfei.qu@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoEncoding: H264 uses the GPU to construct the PAK obj command on Gen8+
Zhao Yakui [Mon, 30 May 2016 13:55:59 +0000 (09:55 -0400)]
Encoding: H264 uses the GPU to construct the PAK obj command on Gen8+

This is helpful to reduce the waiting time when preparing the command
buffer of PAK object.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoEncoding: Encoding reuses aux_batchbuffer instead of allocate new buffer
Zhao Yakui [Mon, 30 May 2016 13:55:58 +0000 (09:55 -0400)]
Encoding: Encoding reuses aux_batchbuffer instead of allocate new buffer

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agojpeg enc/dec gen9: Allow up to 8K JPEG max resolution on gen9
U. Artie Eoff [Tue, 7 Jun 2016 20:28:03 +0000 (13:28 -0700)]
jpeg enc/dec gen9: Allow up to 8K JPEG max resolution on gen9

Allow up to 8K * 8K resolution for JPEG encode and decode on
gen9 HW (SKL,BXT,KBL).

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
8 years agoi965_drv: add support for per-codec max resolution
U. Artie Eoff [Tue, 7 Jun 2016 20:28:02 +0000 (13:28 -0700)]
i965_drv: add support for per-codec max resolution

Add a functor to hw_codec_info to allow each hw instance to report
maximum resolution on a per-codec basis.

Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
8 years agoFix the potential NULL issue
Zhao Yakui [Tue, 7 Jun 2016 12:56:42 +0000 (08:56 -0400)]
Fix the potential NULL issue

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoRestrict the VP9 HW encoding for Profile0
Zhao Yakui [Tue, 7 Jun 2016 12:56:41 +0000 (08:56 -0400)]
Restrict the VP9 HW encoding for Profile0

Fix the issue that VP9 HW encoding is reported incorrectly for VP9 Profile2.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoFix the alpha mask at getting derive images
Víctor Manuel Jáquez Leal [Fri, 3 Jun 2016 10:48:09 +0000 (12:48 +0200)]
Fix the alpha mask at getting derive images

The alpha mask is set to 0x0 when getting derived images, regardless the
alpha channel in the RGB format. But,

When RGBx, the x means an alpha mask of 0x00000000
When RGBA, the A means an alpha mask of 0xff000000

This patch set the alpha mask correctly.

Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
8 years ago1.7.2.pre1 for development
Xiang, Haihao [Thu, 2 Jun 2016 17:05:47 +0000 (01:05 +0800)]
1.7.2.pre1 for development

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
8 years agolibdrm 2.4.52 is required to avoid the compiler error
Xiang, Haihao [Wed, 4 May 2016 17:36:25 +0000 (01:36 +0800)]
libdrm 2.4.52 is required to avoid the compiler error

  CC       i965_drv_video_la-intel_batchbuffer.lo
intel_batchbuffer.c: In function 'intel_batchbuffer_emit_reloc64':
intel_batchbuffer.c:183:24: error: 'drm_intel_bo' has no member named 'offset64'
    uint64_t offset = bo->offset64 + delta;
                        ^
make[3]: *** [i965_drv_video_la-intel_batchbuffer.lo] Error 1

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
8 years agoDon't check WAYLAND_SCANNER if wayland isn't used or found
Xiang, Haihao [Wed, 4 May 2016 08:48:15 +0000 (16:48 +0800)]
Don't check WAYLAND_SCANNER if wayland isn't used or found

checking for WAYLAND... no
checking for LIBVA_WAYLAND_DEPS... no
checking for pkg-config... (cached) /usr/bin/pkg-config
checking pkg-config is at least version 0.9.0... yes
checking for WAYLAND_SCANNER... no
configure: error: Package requirements (wayland-scanner) were not met:

No package 'wayland-scanner' found

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
8 years agoRemove extraneous OUT_BATCH in gen8_gpe_state_base_address
Scott D Phillips [Tue, 31 May 2016 23:38:51 +0000 (16:38 -0700)]
Remove extraneous OUT_BATCH in gen8_gpe_state_base_address

Line accidentally left behind in:

  a82f0be Fix the 48-bit address issue for gpe_util functions on

Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
8 years agoUpdate the dependency on VA-API version
Xiang, Haihao [Fri, 27 May 2016 05:12:30 +0000 (13:12 +0800)]
Update the dependency on VA-API version

VA-API 0.39.2 is required for VP9 encode

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
8 years agoExport the VBR bit rate-control for VP9 encoding on KBL
Zhao Yakui [Tue, 24 May 2016 12:00:38 +0000 (08:00 -0400)]
Export the VBR bit rate-control for VP9 encoding on KBL

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>