OSDN Git Service
Eric Anholt [Thu, 6 Jun 2013 06:19:27 +0000 (23:19 -0700)]
mesa: Add a _mesa_problem to document a piglit failure on i965.
Having figured out what was going on with piglit fbo-depth copypixels
GL_DEPTH_COMPONENT32F (falling all the way back to swrast on CopyPixels to
a float depth buffer), I'm not inclined to fix the problem currently but
it seems worth saving someone else the debug time.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Sat, 8 Jun 2013 01:29:50 +0000 (18:29 -0700)]
i965/vs: Avoid the MUL/MACH/MOV sequence for small integer multiplies.
We do a lot of multiplies by 3 or 4 for skinning shaders, and we can avoid
the sequence if we just move them into the right argument of the MUL.
On pre-IVB, this means reliably putting a constant in a position where it
can't be constant folded, but that's still better than MUL/MACH/MOV.
Improves GLB 2.7 trex performance by 0.788648% +/- 0.23865% (n=29/30)
v2: Fix test for pre-sandybridge.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
Eric Anholt [Sat, 8 Jun 2013 00:58:18 +0000 (17:58 -0700)]
i965/vs: Allow copy propagation into MUL/MACH.
This is a trivial port of
1d6ead38042cc0d1e667d8ff55937c1e32d108b1 from
the FS.
No significant performance difference on trex (misplaced the data, but it
was about n=20).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Thu, 6 Jun 2013 17:14:41 +0000 (10:14 -0700)]
i965/vs: Use the MAD instruction when possible.
This is different from how we do it in the FS - we are using MAD even when
some of the args are constants, because with the relatively unrestrained
ability to schedule a MOV to prepare a temporary with that data, we can
get lower latency for the sequence of instructions.
No significant performance difference on GLB2.7 trex (n=33/34), though it
doesn't have that many MADs. I noticed MAD opportunities while reading
the code for the DOTA2 bug.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Richard Sandiford [Thu, 25 Apr 2013 20:50:07 +0000 (16:50 -0400)]
draw: Add A8R8G8B8 to draw_print_arrays
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Richard Sandiford <r.sandiford@uk.ibm.com>
Richard Sandiford [Tue, 4 Jun 2013 20:19:41 +0000 (21:19 +0100)]
draw: Fix type mismatch between draw_private.h and LLVM
draw_vertex_buffer declared the size field to be a size_t, but the LLVM
code used an int32 instead. This caused problems on big-endian 64-bit
targets, because the first 32-bit chunk of the 64-bit size_t was always 0.
In one sense size_t seems like a good choice for a size, so one fix
would have been to try to get the LLVM code to use the equivalent of
size_t too. However, in practice, the size is taken from things like ~0
or width0, both of which are int-sized, so it seemed simpler to make the
size field int-sized as well.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Richard Sandiford <rsandifo@linux.vnet.ibm.com>
Richard Sandiford [Wed, 5 Jun 2013 14:38:27 +0000 (15:38 +0100)]
util: Use sizeof(void *) rather than 0 as the fallback cache line size
Without this, llvmpipe ends up giving a zero size to all uncompressed textures
on non-x86 systems, since align() cannot handle a 0 alignment.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Richard Sandiford <rsandifo@linux.vnet.ibm.com>
Richard Sandiford [Fri, 7 Jun 2013 12:31:58 +0000 (13:31 +0100)]
llvmpipe: Use saturating add/sub for UNORM formats
lp_build_add and lp_build_sub have fallback code for cases
that cannot be handled by known intrinsics. For UNORM formats,
this code was using modulo rather than saturating arithmetic.
This fixes some rendering issues for a gnome session on System z.
It also fixes various piglit tests on z, such as
spec/ARB_color_buffer_float/GL_RGBA8-render.
The patch deliberately doesn't tackle the more complicated
SNORM case.
Tested against piglit on x86_64 and System z with no regressions.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Richard Sandiford <rsandifo@linux.vnet.ibm.com>
Kenneth Graunke [Sat, 8 Jun 2013 17:17:22 +0000 (10:17 -0700)]
intel: Reserve less batchbuffer space.
Now that Gen6+ relies on hardware contexts, we don't need to record an
occlusion query value at the end of each batch. That means we no longer
need to reserve space for the absurd number of PIPE_CONTROLs required to
do that on Sandybridge.
See commit
4e087de51ad0e7ba4a7199d3664e1d096f8dc510, which bumped this
up to 60 bytes. This is not quite a revert, as it uses 24 bytes instead
of 16, and saves the comments. As far as I can tell, the old value of
16 bytes was just wrong, so we shouldn't go back to that.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 17:06:21 +0000 (10:06 -0700)]
i965: Allocate push constant L3 space once at startup on Gen7+.
We always allocate the maximum amount of space and never change it, so
it makes sense to do it once. Programming it on startup also lets us
skip re-programming it from BLORP.
This removes a tiny amount of overhead from our drawing loop.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 16:57:54 +0000 (09:57 -0700)]
i965: Disable unused pipeline stages once at startup on Gen7+.
This removes a tiny bit of code from our drawing loop.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 17:01:34 +0000 (10:01 -0700)]
i965: Don't emit PIPELINE_SELECT from BLORP.
Now that we emit invariant state at startup (and never select the media
pipeline), the 3D pipeline will always already be selected, even if BLORP
is the first operation. So this is unnecessary.
v2: Fix unused variable warning (intel_context is no longer used).
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 16:55:36 +0000 (09:55 -0700)]
i965: Emit invariant state once at startup on Gen6+.
Now that we have hardware contexts, we can safely initialize our GPU
state once at startup, rather than needing a state atom with the
BRW_NEW_CONTEXT flag set.
This removes a tiny bit of code from our drawing loop.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 16:31:31 +0000 (09:31 -0700)]
i965: Delete some dead state atom prototypes.
These atoms don't actually exist.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 15:48:18 +0000 (08:48 -0700)]
i965: Change return type of check_state() to bool.
The existing code already returned a boolean; this just clarifies that.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 15:46:14 +0000 (08:46 -0700)]
i965: Remove unused second parameter of brw_print_dirty_count().
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 07:06:52 +0000 (00:06 -0700)]
glsl: Allow the use of determinant() in GLSL 1.50.
We already implemented this for ES3, so we just need to turn it on.
Fixes 6 Piglit tests:
spec/glsl-1.50/compiler/built-in-functions/determinant-mat[234].{vert,frag}
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 05:04:23 +0000 (22:04 -0700)]
glcpp: Automatically #define GL_core_profile 1 on GLSL 1.50+.
Page 17 of the GLSL 1.50.11 specification states:
"There is a built-in macro definition for each profile the
implementation supports. All implementations provide the following
macro:
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 04:28:59 +0000 (21:28 -0700)]
glsl: Parse "#version 150 core" directives.
Previously we only supported "#version 150". This patch recognizes
"compatibility" to give the user a more descriptive error message.
Fixes Piglit's version-150-core-profile test.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 8 Jun 2013 04:46:04 +0000 (21:46 -0700)]
glsl: Bail on parsing if the #version directive is bogus.
If we didn't successfully parse the #version line, there's no point in
continuing with parsing and compiling: it's already failed.
Furthermore, it can actually be harmful: right after handling #version,
we call _mesa_glsl_initialize_types(), which checks state->es_shader and
language_version. If it isn't valid, it hits an assertion failure.
Fixes Piglit's "invalid-version-es." When processing "#version 110 es",
our code set state->es_shader and state->language_version = 110. It
then properly determined that this was invalid and flagged an error.
Since we continued anyway, we hit the assertion mentioned above.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Sun, 9 Jun 2013 21:17:16 +0000 (09:17 +1200)]
dlist: fix save_SamplerParameteri
This was building the temporary array to pass to
save_SamplerParameteriv, and then not passing it.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Vinson Lee <vlee@freedesktop.org>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Vinson Lee [Thu, 6 Jun 2013 06:01:00 +0000 (23:01 -0700)]
mesa: Prevent possible out-of-bounds read by save_SamplerParameteriv.
Fixes "Out-of-bounds access" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Maarten Lankhorst [Sat, 8 Jun 2013 18:09:25 +0000 (20:09 +0200)]
nvc0: fix up video buffer alignment requirements
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Rob Clark [Sat, 1 Jun 2013 18:16:30 +0000 (14:16 -0400)]
freedreno: better scissor fix
Actually respect rasterizer state.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 27 May 2013 00:36:35 +0000 (20:36 -0400)]
freedreno: gmem bypass
The GPU (at least a3xx, but I think also a2xx) can render directly to
memory, bypassing tiling. Although it can't do this if blend, depth,
and a few other features of the pipeline are enabled. This direct
memory mode can be faster for some sorts of operations, such as simple
blits. In particular, this significantly speeds up XA by avoiding to
pull the entire dest pixmap into GMEM, render tiles, and write it all
back out again. This should also speed up resource copy-region and
blit.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 26 May 2013 21:13:44 +0000 (17:13 -0400)]
freedreno: add a3xx support
The adreno a3xx GPU is found in newer snapdragon devices, such as the
nexus4. The a3xx is GLESv3 and OpenCL capable, although that is not
enabled yet in gallium.
Compared to a2xx, it introduces an entirely new unified shader ISA, and
re-shuffles all or nearly all of the registers. The good news is that
(for the most part) the registers are more orthogonal, not combining
unrelated state in a single register. And that there is a lot more
flexibility, so we don't need to patch and re-emit the shader like we
did on a2xx.
The shader compiler is currently quite dumb, there would be a lot of
room for improvement with an optimizing pass. Despite that, with the
a320 in my nexus4 it seems to be ~2-3x faster compared to the a220 in my
HP touchpad.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 26 May 2013 21:13:27 +0000 (17:13 -0400)]
freedreno: prepare for a3xx
Split the parts that are specific to adreno a2xx series GPUs from the
parts that will be in common with a3xx, so that a3xx support can be
added more cleanly.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Roland Scheidegger [Fri, 7 Jun 2013 19:20:01 +0000 (21:20 +0200)]
gallivm: work around slow code generated for interleaving 128bit vectors
We use 128bit vector interleave for untwiddling in the blend code (with
256bit vectors). llvm generates terrible code for this for some reason,
so instead of generating a shuffle for 2 128bit vectors use a
extract/insert shuffle instead (it only seems to matter we're not using
128bit wide vectors for the shuffle). This decreases instruction count of
the blend code generated for a rgba8 render target without blending from
169 to 113 with llvm 3.1 and from 136 to 114 in llvm 3.2/3.3, and I got
a ~8% (llvm 3.1) and ~5% (3.2/3.3) performance improvement in gears.
(The generated code is still not terribly good as we could actually avoid
the interleaving completely but llvm can't know this.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
José Fonseca [Sat, 8 Jun 2013 07:55:06 +0000 (08:55 +0100)]
scons: Fix implicit python dependency discovery on Windows.
Probably due to CRLF endings, the discovery of python import statements
was not working on Windows builds, causing incremental builds to often
fail unless one wiped out the build directory.
NOTE: This is a candidate for stable branches.
Stéphane Marchesin [Sat, 11 May 2013 01:30:46 +0000 (18:30 -0700)]
st/xlib: Flush the front buffer before doing CopySubBuffer
We flush pending rendering before running CopySubBuffer, which
ensures that the right bits get to the screen.
NOTE: This is a candidate for stable release branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Stéphane Marchesin [Sat, 11 May 2013 01:29:52 +0000 (18:29 -0700)]
st/xlib: Fix upside down coordinates for CopySubBuffer
The coordinates need to be inverted between glX and gallium.
NOTE: This is a candidate for stable release branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Thu, 6 Jun 2013 18:13:02 +0000 (11:13 -0700)]
mesa: Report core FBO incompleteness cases through GL_ARB_debug_output.
Just like we produce from inside the Intel driver, this can help provide
information quickly about FBO incompatibility problems (particularly when
using apitrace replay).
Currently, in driver-marked incompleteness cases, you'll get both the
driver message and the core message on Intel. Until the other drivers are
fixed to produce output, I think this is better than not putting in a
message for driver-marked incomplete.
Reviewed-by: Brian Paul <brianp@vmware.com>
Paul Berry [Fri, 31 May 2013 16:45:49 +0000 (09:45 -0700)]
intel: flush fake front buffer if server is about to destroy it.
Fixes piglit test "spec/!OpenGL 1.0/gl-1.0-front-invalidate-back"
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Paul Berry [Wed, 29 May 2013 16:48:26 +0000 (09:48 -0700)]
intel: flush fake front buffer more robustly.
When a fake front buffer is in use, if we request the front buffer
(using screen->dri2.loader->getBuffersWithFormat()), the X server
copies the real front buffer to the fake front buffer and returns the
fake front buffer. We sometimes make redundant requests for the front
buffer (due to using a single counter to track invalidates for both
the front and back buffers), so there's a danger of pending front
buffer rendering getting overwritten when the redundant front buffer
request occurs.
Previous to this patch, intel_update_renderbuffers() worked around
that problem by sometimes doing intel_flush() and intel_flush_front()
before calling intel_query_dri2_buffers(). But it only did the
workaround when the front buffer was bound for drawing; it didn't do
it when the front buffer was bound for reading.
This patch moves the workaround code to intel_query_dri2_buffers(), so
that it happens in exactly the circumstances where it is needed.
This should fix some of the sporadic failures in Piglit tests
fbo-sys-blit and fbo-sys-sub-blit.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Paul Berry [Thu, 30 May 2013 14:08:07 +0000 (07:08 -0700)]
intel: make intel_flush_front safe to call during initial MakeCurrent
The patch that follows will fix a bug that prevents
intel_flush_front() from being called often enough. In doing so, it
will create a situation where intel_flush_front() is called during the
initial call to glXMakeCurrent(). In this circumstance,
ctx->DrawBuffer hasn't been initialized yet and is NULL. Fortunately,
intel->front_buffer_dirty is false, so intel_flush_front() doesn't
actually need to do anything. To avoid a segfault, swap the order of
terms in intel_flush_front()'s if statement.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Eric Anholt [Wed, 5 Jun 2013 21:46:19 +0000 (14:46 -0700)]
mesa: Expose MAX_FRAGMENT_INPUT_COMPONENTS on ES3 and desktop 3.2.
piglit OpenGL ES 3.0/minmax now passes. This was also one of the subcase
failures in OpenGL 3.2/minmax (and still is, because our value is too low
for 3.2, but at least we report what it is).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 5 Jun 2013 21:37:36 +0000 (14:37 -0700)]
mesa: Expose texture array getters on GLES3.
Part of fixing piglit OpenGL ES 3.0/minmax.
v2: s/_gles3/_es3/ in extra name, for consistency (review by Matt).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Eric Anholt [Wed, 5 Jun 2013 23:20:18 +0000 (16:20 -0700)]
mesa: Fix the return value of TEXTURE_BINDING_2D_ARRAY.
Noticed by inspection when reviewing the next commit.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 5 Jun 2013 21:27:34 +0000 (14:27 -0700)]
mesa: Expose texel offset limits in GLES3.
Part of fixing piglit OpenGL ES 3.0/minmax.
v2: s/_gles3/_es3/ in extra name, for consistency (review by Matt).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Roland Scheidegger [Fri, 7 Jun 2013 19:12:22 +0000 (21:12 +0200)]
util: add comment about bogus transfer flags
Roland Scheidegger [Fri, 7 Jun 2013 19:10:59 +0000 (21:10 +0200)]
util: fix util_clear_render_target and util_clear_depth_stencil layer handling
These functions must clear all bound layers, not just the first.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Fri, 7 Jun 2013 00:27:49 +0000 (02:27 +0200)]
llvmpipe: move create_surface/destroy_surface functions to lp_surface.c
Believe it or not but these two are actually the first two functions which
really belong in this file nowadays.
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Fri, 7 Jun 2013 19:03:40 +0000 (21:03 +0200)]
llvmpipe: add support for layered rendering
Mostly just make sure the layer parameter gets passed through to the right
places (and get clamped, can do this at setup time), fix up clears to
clear all layers and disable opaque optimization. Luckily don't need to
touch the jitted code.
(Clears invoked via pipe's clear_render_target method will not work however
since the pipe_util_clear function used for it doesn't handle clearing
multiple layers yet.)
v2: per Brian's suggestion, prettify var initialization and add some comments,
add assertion for impossible layer specification for surface.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 7 Jun 2013 18:54:54 +0000 (20:54 +0200)]
gallium/docs: fix up transfer description for 1d arrays, add cube map arrays
Transfers always use z/depth for layers no matter if it's a 1d or 2d array
texture, we don't follow OpenGL's crazyness there. Luckily this appears to
only be a doc bug, everyone doing the right thing already.
While here also document z/depth parameter for cube map arrays.
v2: fix typo spotted by Eric Anholt
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Chia-I Wu [Fri, 7 Jun 2013 07:10:19 +0000 (15:10 +0800)]
ilo: fix textureSize() for single-layered array textures
We returned 0 instead of 1 for the number of layers when the array texutre is
single-layered. This fixed it on GEN7+.
Chia-I Wu [Fri, 7 Jun 2013 06:52:48 +0000 (14:52 +0800)]
util: add util_resource_is_array_texture()
Checking if array_size is greater than 1 is not enough for single-layered
array textures.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Fri, 7 Jun 2013 16:12:28 +0000 (10:12 -0600)]
docs: update some environment variable info
Drop the GALLIUM_NOSSE/PPC env vars, added ST_DEBUG and some of the
VMware SVGA driver env vars.
Arnas Milasevicius [Thu, 6 Jun 2013 22:21:19 +0000 (01:21 +0300)]
gallium: Remove draw_arrays() and draw_arrays_instanced() functions
Moved draw_arrays() to st_draw_feedback.c and removed draw_arrays_instanced().
draw_arrays() was used by nobody else. Now there's just one "draw" entrypoint
into the draw module.
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 6 Jun 2013 15:46:40 +0000 (09:46 -0600)]
tgsi: replace tgsi_file_names tgsi_file_names[] with tgsi_file_name() function
This change came from the discovery that the STATIC_ASSERT to check that
the number of register file strings didn't actually work.
Similar changes could be made for the other string arrays in tgsi_string.c
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Chia-I Wu [Tue, 4 Jun 2013 08:39:07 +0000 (16:39 +0800)]
u_vbuf: fix index buffer leak
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Chris Forbes [Mon, 20 May 2013 10:10:29 +0000 (22:10 +1200)]
i965/vs: add support for emitting gl_ClipVertex
Removes the special-case suppression of gl_ClipVertex in the VUE map.
Also calculate vertex outcodes for user clip planes based on
gl_ClipVertex if written; otherwise gl_Position.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Mon, 20 May 2013 09:51:43 +0000 (21:51 +1200)]
i965/clip: Add support for gl_ClipVertex
When clipping triangles against a user clip plane, and gl_ClipVertex
is provided in the vertex, use it instead of hpos.
TODO: A similar change should be made at some point for line clipping.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Fri, 7 Jun 2013 05:39:41 +0000 (13:39 +0800)]
ilo: advertise PIPE_CAP_CUBE_MAP_ARRAY
It was supported but not advertised. Also remove TODO tag for
PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT, as it is not a TODO.
Chia-I Wu [Fri, 7 Jun 2013 06:18:59 +0000 (14:18 +0800)]
ilo: add support for TEX2/TXB2/TXL2 in fs
They were already supported, just being rejected in the TGSI translator.
Vinson Lee [Fri, 24 May 2013 06:48:28 +0000 (23:48 -0700)]
glsl linker: Initialize member variable interface_namespace.
Fixes "Uninitialized pointer field" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Fri, 7 Jun 2013 05:11:49 +0000 (13:11 +0800)]
ilo: use slab allocator for transfers
Slab allocator is perfect for transfer. Improved OpenArena performance by 1%
with several casual runs.
Chia-I Wu [Tue, 4 Jun 2013 08:20:05 +0000 (16:20 +0800)]
ilo: clean up states upon context destroy
We need to unreference resources that we referenced.
Chia-I Wu [Tue, 4 Jun 2013 05:25:38 +0000 (13:25 +0800)]
ilo: unmap cp bo before destroying it
The BOs are mapped in their entire life times for the chipsets we support so
do not forget to unmap it.
Chia-I Wu [Wed, 5 Jun 2013 18:41:21 +0000 (02:41 +0800)]
ilo: enable bo reuse
This magical line of code must have got lost at some point in the history...
Chia-I Wu [Wed, 5 Jun 2013 04:04:46 +0000 (12:04 +0800)]
ilo: construct 3DSTATE_SF in create_rasterizer_state()
Add ilo_rasterizer_sf and initialize it in create_rasterizer_state().
Chia-I Wu [Tue, 4 Jun 2013 10:37:23 +0000 (18:37 +0800)]
ilo: construct 3DSTATE_CLIP in create_rasterizer_state()
Add ilo_rasterizer_clip and initialize it in create_rasterizer_state().
Chia-I Wu [Mon, 3 Jun 2013 07:34:13 +0000 (15:34 +0800)]
ilo: use emit_SURFACE_STATE() for render targets
Introduce ilo_surface_cso and initialize it in create_surface(). With the
change, we can emit SURFACE_STATE directly from the CSO and remove
emit_surf_SURFACE_STATE(). We do not deal with depth/stencil surfaces yet.
Chia-I Wu [Mon, 3 Jun 2013 07:25:48 +0000 (15:25 +0800)]
ilo: use emit_SURFACE_STATE() for constant buffers
Introduce ilo_cbuf_cso and initialize it in set_constant_buffer(). As
ilo_view_surface is embedded in ilo_cbuf_cso, switch to emit_SURFACE_STATE()
for constant buffers and remove emit_cbuf_SURFACE_STATE().
Chia-I Wu [Thu, 6 Jun 2013 03:28:02 +0000 (11:28 +0800)]
ilo: add emit_SURFACE_STATE() for sampler views
Introduce ilo_view_cso and initialize it in create_sampler_view(). Add
emit_SURFACE_STATE() to GPE, which can emit SURFACE_STATE from
ilo_view_surface.
Chia-I Wu [Thu, 6 Jun 2013 03:16:13 +0000 (11:16 +0800)]
ilo: add ilo_view_surface for SURFACE_STATE
Define struct ilo_view_surface for SURFACE_STATE construction and emission.
Courtney Goeltzenleuchter [Fri, 31 May 2013 19:43:11 +0000 (13:43 -0600)]
ilo: convert generic depth-stencil-alpha pipe state to ilo pipe state
Moving the work to create time reduces the work at emit time.
Saves time overall as create work is only done once.
Fix compiler warning in gen7_pipeline_sol.
[olv: remember pipe_alpha_state instead of pipe_depth_stencil_alpha_state in
ilo_dsa_state]
Chia-I Wu [Fri, 31 May 2013 18:00:55 +0000 (02:00 +0800)]
ilo: introduce vertex element CSO
Introduce ilo_ve_cso and initialize it in create_vertex_elements_state().
This commit goes a step further by setting up mappings from HW VB to PIPE VB,
which we failed to do previously. That allows us to support instanced
rendering.
Chia-I Wu [Mon, 3 Jun 2013 04:35:01 +0000 (12:35 +0800)]
ilo: simplify emit_3DSTATE_DEPTH_BUFFER()
Remove hiz and dsa from the parameters. We would know whether HiZ buffer
exists from ilo_texture once it is supported. DSA state should not affect
3DSTATE_DEPTH_BUFFER.
Chia-I Wu [Fri, 31 May 2013 08:11:38 +0000 (16:11 +0800)]
ilo: introduce blend CSO
Introduce ilo_blend_cso and initialize it in create_blend_state(). This saves
us from having to construct hardware blend states in draw_vbo().
Chia-I Wu [Fri, 31 May 2013 03:52:47 +0000 (11:52 +0800)]
ilo: introduce sampler CSO
Introduce ilo_sampler_cso and initialize it in create_sampler_state(). This
saves us from having to perform CPU-intensive calculations to construct
hardware sampler states in draw_vbo().
Chia-I Wu [Thu, 30 May 2013 11:48:32 +0000 (19:48 +0800)]
ilo: construct SCISSOR_RECT in set_scissor_states()
This allows us to memcpy() the state in draw_vbo(). Add ilo_init_states() and
ilo_cleanup_states() that are called when contexts are created and destroyed
respectively, and properly set the initial scissor state in ilo_init_states().
Chia-I Wu [Thu, 30 May 2013 06:37:49 +0000 (14:37 +0800)]
ilo: introduce viewport CSO
Introduce ilo_viewport_cso and initialize it in set_viewport_states(). This
saves us from having to perform CPU-intensive calculations to construct
hardware viewport states in draw_vbo().
Chia-I Wu [Wed, 29 May 2013 07:43:38 +0000 (15:43 +0800)]
ilo: switch to ilo states for shaders and resources
Define and use
struct ilo_sampler_state;
struct ilo_view_state;
struct ilo_cbuf_state;
struct ilo_resource_state;
struct ilo_global_binding;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 07:06:48 +0000 (15:06 +0800)]
ilo: switch to ilo states for CC stage
Define and use
struct ilo_dsa_state;
struct ilo_blend_state;
struct ilo_fb_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 07:02:31 +0000 (15:02 +0800)]
ilo: switch to ilo states for WM stage
Define and use
struct ilo_rasterizer_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 06:42:13 +0000 (14:42 +0800)]
ilo: switch to ilo states for CLIP and SF stages
Define and use
struct ilo_viewport_state;
struct ilo_scissor_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 06:39:17 +0000 (14:39 +0800)]
ilo: switch to ilo states for SOL stage
Define and use
struct ilo_so_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 06:25:34 +0000 (14:25 +0800)]
ilo: switch to ilo states for VF stage
Define and use
struct ilo_vb_state;
struct ilo_ve_state;
struct ilo_ib_state;
in ilo_context.
Chia-I Wu [Mon, 27 May 2013 07:17:19 +0000 (15:17 +0800)]
ilo: move hardware limits to ilo_gpe.h
Roland Scheidegger [Thu, 6 Jun 2013 21:50:45 +0000 (23:50 +0200)]
draw: trivial fix comment typo
Roland Scheidegger [Thu, 6 Jun 2013 21:50:21 +0000 (23:50 +0200)]
gallium/tgsi: add missing string for layer semantic
Also report if a shader writes the layer semantic
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Thu, 6 Jun 2013 00:43:51 +0000 (02:43 +0200)]
llvmpipe: bump 3d and cube map limits to 2048 and 8192 respectively
These should just work, required by d3d10. Too large resources will
get thrown out separately anyway.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Thu, 23 May 2013 18:10:15 +0000 (11:10 -0700)]
glsl: Fix uniform buffer object counting.
We were counting uniforms located in UBOs against the default uniform
block limit, while not doing any counting against the specific combined
limit.
Note that I couldn't quite find justification for the way I did this, but
I think it's the only sensible thing: The spec talks about components, so
each "float" in a std140 block would count as 1 component and a "vec4"
would count as 4, though they occupy the same amount of space. Since GPU
limits on uniform buffer loads are surely going to be about the size of
the blocks, I just counted them that way.
Fixes link failures in piglit
arb_uniform_buffer_object/maxuniformblocksize when ported to geometry
shaders on Paul's GS branch, since in that case the max block size is
bigger than the default uniform block component limit.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Thu, 23 May 2013 17:14:37 +0000 (10:14 -0700)]
glsl: Make a local variable to avoid restating this array lookup.
v2: Convert another instance of the array lookup. (caught by Tapani)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Wed, 5 Jun 2013 02:01:51 +0000 (19:01 -0700)]
intel: Use the CHIPSET macro in the PCI ID tables for the device name.
Putting the human readable device names directly in the PCI ID list
consolidates things in one place. It also makes it easy to customize
the name on a per-PCI ID basis without a huge code explosion.
Based on a patch by Kristian Høgsberg.
v2: Fix 830M/845G names and #undef CHIPSET (caught by Emit Velikov).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 5 Jun 2013 01:41:53 +0000 (18:41 -0700)]
intel: Remove 'misc' parameter from CHIPSET macro in PCI ID tables.
This has never actually been used for anything.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Andreas Boll [Wed, 5 Jun 2013 08:43:10 +0000 (10:43 +0200)]
build: Use PACKAGE_VERSION from autoconf
Both variables had the same value.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Andreas Boll [Tue, 4 Jun 2013 18:39:13 +0000 (20:39 +0200)]
build: Unify PACKAGE_VERSION on autotools, scons and Android
This patch unifies mesa's PACKAGE_VERSION on autotools, scons and
Android build systems.
Current behaviour is:
- Autotools uses 9.2.0 as PACKAGE_VERSION
- Scons and Android use 9.2-devel as PACKAGE_VERSION
With this patch all three build systems use 9.2.0-devel as
PACKAGE_VERSION.
Reviewed-by: Brian Paul <brianp@vmware.com>
Jonathan Gray [Wed, 5 Jun 2013 05:00:33 +0000 (15:00 +1000)]
radeon/winsys: correct RADEON_GEM_WAIT_IDLE use
RADEON_GEM_WAIT_IDLE is declared DRM_IOW but mesa
uses it with drmCommandWriteRead instead of drmCommandWrite
which leads to the ioctl being unmatched and returning an
error on at least OpenBSD.
Problem originally noticed in libdrm by Mark Kettenis.
Dave Airlie pointed out that mesa has the same issue.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Mike Stroyan [Mon, 18 Mar 2013 19:34:35 +0000 (13:34 -0600)]
configure.ac: Build dricommon for gallium swrast
When building dri-swrast, use gallium_check_st to set HAVE_COMMON_DRI.
Commit
07f2dee7 added setting of HAVE_COMMON_DRI in gallium_check_st.
But the dri-swrast case did not use gallium_check_st.
So dri/common was still not built.
v2: set HAVE_COMMON_DRI=yes instead of using gallium_check_st
NOTE: This is a candidate for the 9.1 branch.
(Depends on
7de78ce5 and
07f2dee)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61821
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Rodrigo Vivi [Mon, 13 May 2013 20:53:39 +0000 (17:53 -0300)]
i965: Adding more reserved PCI IDs for Haswell.
At DDX commit Chris mentioned the tendency we have of finding out more
PCI IDs only when users report. So Let's add all new reserved Haswell IDs.
NOTE: This is a candidate for stable branches.
Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=63701
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Rico Schüller [Wed, 5 Jun 2013 14:54:14 +0000 (08:54 -0600)]
mesa: remove outdated version lines in comments
Signed-off-by: Brian Paul <brianp@vmware.com>
Richard Sandiford [Wed, 5 Jun 2013 08:26:29 +0000 (09:26 +0100)]
gallium: System z support
The main change is to use MCJIT rather than the old JIT, which will never
be supported for System z. The endianness part is by example since the
patch was tested on a glibc system.
Signed-off-by: Richard Sandiford <rsandifo@linux.vnet.ibm.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Tue, 4 Jun 2013 01:20:55 +0000 (03:20 +0200)]
llvmpipe: improve alignment calculation for fetching/storing pixels
This was always doing per-pixel alignment which isn't necessary, except
for the buffer case (due to the per-element offset). The disabled code
for calculating it was incorrect because it assumed that always the full
block would be fetched, which may not be the case, so fix this up.
The original code failed for instance for r10g10b10a2 the alignment would
have been calculated as 4 (block_width) * 4 (bytes) so 16, but the actual
fetch may have only fetched 2 values at a time, hence only alignment 8 -
it is unclear what exactly would happen in this case (alignment larger
than size to fetch).
So just use the (already calculated) fetch size instead and get alignment
from that which should always work, no matter if fetching 1,2 or 4 pixels.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 4 Jun 2013 22:17:22 +0000 (00:17 +0200)]
llvmpipe: reduce alignment requirement for 1d resources from 4x4 to 4x1
For rendering to buffers, we cannot have any y alignment.
So make sure that tile clear commands only clear up to the fb width/height,
not more (do this for all resources actually as clearing more seems
pointless for other resources too). For the jit fs function, skip execution
of the lower half of the fragment shader for the 4x4 stamp completely,
for depth/stencil only load/store the values from the first row
(replace other row with undef).
For the blend function, also only load half the values from fs output,
replace the rest with undefs so that everything still operates on the
full 4x4 block to keep code the same between 4x1 and 4x4 (except for
load/store of course which also needs to skip (store) or replace these
values with undefs (load))., at the cost of slightly less optimal code
being produced in some cases.
Also reduce 1d and 1d array alignment too, because they can be handled the
same as buffers so don't need to waste memory.
v2: don't try to run special blend code for 4x1, (very) slightly less
complexity if we just use the same code as for 4x4 which may or may not
make it easier to optimize in the future (as we care a lot more about 4x4
performance than 1d).
v2: don't use undef values for unused fs src outputs with llvm 3.1 as it
apparently can trigger a bug in llvm.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Mon, 3 Jun 2013 14:01:05 +0000 (16:01 +0200)]
llvmpipe: cleanup of generate_unswizzled_blend
Some parameters were used inconsistently, for instance not using
block_width/block_height/block_size for deferring number of pixels
but rather relying on guesses from the number of fragment shaders etc,
so fix this up (no actual change in behavior since the block size stays
fixed). (Though most of the code would work with different block_height,
with three exceptions, one being the hacked r11g11b10 conversions and
twiddle code which only work with block_height 2 not 1, and the last
one being blend vector type not being 128bit wide.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 4 Jun 2013 22:11:45 +0000 (00:11 +0200)]
gallivm: enhance special sse2 4x4f and 2x8f -> 1x16ub conversion
There's no good reason why it can't handle 2x4f->1x8ub, 1x4f->1x4ub and
1x8f->1x8ub cases, there might be legitimate reasons why we don't have
enough input vectors for a full destination vector, and using pack
intrinsics should still be much better than using generic conversion
(it looks like convert_alpha from the blend code might hit this though
I suspect it could be avoided).
v2: add another test vector format to lp_test_conv so this gets tested.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Sat, 1 Jun 2013 18:55:17 +0000 (20:55 +0200)]
gallivm: (trivial) fix lp_build_concat_n
The code was designed to handle no-op concat but failed (unless the
caller was using same pointer for src and dst).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 4 Jun 2013 16:51:15 +0000 (09:51 -0700)]
mesa: change MAX_PROGRAM_ADDRESS_REGS to 1, clamp to it in state tracker
We've never properly supported more than one address register. There
isn't even a field in prog_src_register or prog_dst_register to indicate
which address register to use if RelAddr!=0.
In the state tracker, clamp MaxAddressRegs against MAX_PROGRAM_ADDRESS_REGS
since many gallium drivers do support more.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65226
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Paul Berry [Sun, 2 Jun 2013 23:25:03 +0000 (16:25 -0700)]
intel: Don't try to blorp or blit CopyTexSubImage(1D_ARRAY).
Blorp and the hardware blitter can't be used to implement
CopyTexSubImage when the image type is 1D_ARRAY, because of a
coordinate system mismatch (the Y coordinate in the source image is
supposed to be matched up to the Z coordinate in the destination
texture).
The hardware blitter path (intel_copy_texsubimage) contained a perf
debug warning for this case, but it failed to actually fall back. The
blorp path didn't even check.
Fixes piglit test "copyteximage 1D_ARRAY".
Reviewed-by: Eric Anholt <eric@anholt.net>