2 * Copyright (C) 2009 The Android Open Source Project
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
18 #include "vm/compiler/CompilerInternals.h"
24 /* Check RAW, WAR, and WAR dependency on the register operands */
25 #define CHECK_REG_DEP(use, def, check) ((def & check->useMask) || \
26 ((use | def) & check->defMask))
28 /* Scheduler heuristics */
29 #define MAX_HOIST_DISTANCE 20
30 #define LDLD_DISTANCE 4
33 static inline bool isDalvikRegisterClobbered(MipsLIR *lir1, MipsLIR *lir2)
35 int reg1Lo = DECODE_ALIAS_INFO_REG(lir1->aliasInfo);
36 int reg1Hi = reg1Lo + DECODE_ALIAS_INFO_WIDE(lir1->aliasInfo);
37 int reg2Lo = DECODE_ALIAS_INFO_REG(lir2->aliasInfo);
38 int reg2Hi = reg2Lo + DECODE_ALIAS_INFO_WIDE(lir2->aliasInfo);
40 return (reg1Lo == reg2Lo) || (reg1Lo == reg2Hi) || (reg1Hi == reg2Lo);
44 /* Debugging utility routine */
45 static void dumpDependentInsnPair(MipsLIR *thisLIR, MipsLIR *checkLIR,
46 const char *optimization)
48 LOGD("************ %s ************", optimization);
49 dvmDumpLIRInsn((LIR *) thisLIR, 0);
50 dvmDumpLIRInsn((LIR *) checkLIR, 0);
54 /* Convert a more expensive instruction (ie load) into a move */
55 static void convertMemOpIntoMove(CompilationUnit *cUnit, MipsLIR *origLIR,
58 /* Insert a move to replace the load */
60 moveLIR = dvmCompilerRegCopyNoInsert( cUnit, dest, src);
62 * Insert the converted instruction after the original since the
63 * optimization is scannng in the top-down order and the new instruction
64 * will need to be re-checked (eg the new dest clobbers the src used in
67 dvmCompilerInsertLIRAfter((LIR *) origLIR, (LIR *) moveLIR);
71 * Perform a pass of top-down walk, from the second-last instruction in the
72 * superblock, to eliminate redundant loads and stores.
74 * An earlier load can eliminate a later load iff
75 * 1) They are must-aliases
76 * 2) The native register is not clobbered in between
77 * 3) The memory location is not written to in between
79 * An earlier store can eliminate a later load iff
80 * 1) They are must-aliases
81 * 2) The native register is not clobbered in between
82 * 3) The memory location is not written to in between
84 * A later store can be eliminated by an earlier store iff
85 * 1) They are must-aliases
86 * 2) The memory location is not written to in between
88 static void applyLoadStoreElimination(CompilationUnit *cUnit,
94 if (headLIR == tailLIR) return;
96 for (thisLIR = PREV_LIR(tailLIR);
98 thisLIR = PREV_LIR(thisLIR)) {
101 /* Skip non-interesting instructions */
102 if ((thisLIR->flags.isNop == true) ||
103 isPseudoOpCode(thisLIR->opcode) ||
104 !(EncodingMap[thisLIR->opcode].flags & (IS_LOAD | IS_STORE))) {
108 int nativeRegId = thisLIR->operands[0];
109 bool isThisLIRLoad = EncodingMap[thisLIR->opcode].flags & IS_LOAD;
111 /* Use the mem mask to determine the rough memory location */
112 u8 thisMemMask = (thisLIR->useMask | thisLIR->defMask) & ENCODE_MEM;
115 * Currently only eliminate redundant ld/st for constant and Dalvik
118 if (!(thisMemMask & (ENCODE_LITERAL | ENCODE_DALVIK_REG))) continue;
121 * Add r15 (pc) to the resource mask to prevent this instruction
122 * from sinking past branch instructions. Also take out the memory
123 * region bits since stopMask is used to check data/control
126 u8 stopUseRegMask = (ENCODE_REG_PC | thisLIR->useMask) &
128 u8 stopDefRegMask = thisLIR->defMask & ~ENCODE_MEM;
130 for (checkLIR = NEXT_LIR(thisLIR);
132 checkLIR = NEXT_LIR(checkLIR)) {
135 * Skip already dead instructions (whose dataflow information is
136 * outdated and misleading).
138 if (checkLIR->flags.isNop) continue;
140 u8 checkMemMask = (checkLIR->useMask | checkLIR->defMask) &
142 u8 aliasCondition = thisMemMask & checkMemMask;
143 bool stopHere = false;
146 * Potential aliases seen - check the alias relations
148 if (checkMemMask != ENCODE_MEM && aliasCondition != 0) {
149 bool isCheckLIRLoad = EncodingMap[checkLIR->opcode].flags &
151 if (aliasCondition == ENCODE_LITERAL) {
153 * Should only see literal loads in the instruction
156 assert(!(EncodingMap[checkLIR->opcode].flags &
158 /* Same value && same register type */
159 if (checkLIR->aliasInfo == thisLIR->aliasInfo &&
160 REGTYPE(checkLIR->operands[0]) == REGTYPE(nativeRegId)){
162 * Different destination register - insert
165 if (checkLIR->operands[0] != nativeRegId) {
166 convertMemOpIntoMove(cUnit, checkLIR,
167 checkLIR->operands[0],
170 checkLIR->flags.isNop = true;
172 } else if (aliasCondition == ENCODE_DALVIK_REG) {
174 if (checkLIR->aliasInfo == thisLIR->aliasInfo) {
175 /* Only optimize compatible registers */
177 REGTYPE(checkLIR->operands[0]) ==
178 REGTYPE(nativeRegId);
179 if ((isThisLIRLoad && isCheckLIRLoad) ||
180 (!isThisLIRLoad && isCheckLIRLoad)) {
184 * Different destination register -
187 if (checkLIR->operands[0] !=
189 convertMemOpIntoMove(cUnit,
191 checkLIR->operands[0],
194 checkLIR->flags.isNop = true;
197 * Destinaions are of different types -
198 * something complicated going on so
203 } else if (isThisLIRLoad && !isCheckLIRLoad) {
204 /* WAR - register value is killed */
206 } else if (!isThisLIRLoad && !isCheckLIRLoad) {
207 /* WAW - nuke the earlier store */
208 thisLIR->flags.isNop = true;
211 /* Partial overlap */
212 } else if (isDalvikRegisterClobbered(thisLIR, checkLIR)) {
214 * It is actually ok to continue if checkLIR
215 * is a read. But it is hard to make a test
216 * case for this so we just stop here to be
222 /* Memory content may be updated. Stop looking now. */
225 /* The checkLIR has been transformed - check the next one */
226 } else if (checkLIR->flags.isNop) {
233 * this and check LIRs have no memory dependency. Now check if
234 * their register operands have any RAW, WAR, and WAW
235 * dependencies. If so, stop looking.
237 if (stopHere == false) {
238 stopHere = CHECK_REG_DEP(stopUseRegMask, stopDefRegMask,
242 if (stopHere == true) {
243 DEBUG_OPT(dumpDependentInsnPair(thisLIR, checkLIR,
245 /* Only sink store instructions */
246 if (sinkDistance && !isThisLIRLoad) {
247 MipsLIR *newStoreLIR =
248 (MipsLIR *) dvmCompilerNew(sizeof(MipsLIR), true);
249 *newStoreLIR = *thisLIR;
251 * Stop point found - insert *before* the checkLIR
252 * since the instruction list is scanned in the
255 dvmCompilerInsertLIRBefore((LIR *) checkLIR,
256 (LIR *) newStoreLIR);
257 thisLIR->flags.isNop = true;
260 } else if (!checkLIR->flags.isNop) {
268 * Perform a pass of bottom-up walk, from the second instruction in the
269 * superblock, to try to hoist loads to earlier slots.
271 static void applyLoadHoisting(CompilationUnit *cUnit,
275 MipsLIR *thisLIR, *checkLIR;
277 * Store the list of independent instructions that can be hoisted past.
278 * Will decide the best place to insert later.
280 MipsLIR *prevInstList[MAX_HOIST_DISTANCE];
283 if (headLIR == tailLIR) return;
285 /* Start from the second instruction */
286 for (thisLIR = NEXT_LIR(headLIR);
288 thisLIR = NEXT_LIR(thisLIR)) {
290 /* Skip non-interesting instructions */
291 if ((thisLIR->flags.isNop == true) ||
292 isPseudoOpCode(thisLIR->opcode) ||
293 !(EncodingMap[thisLIR->opcode].flags & IS_LOAD)) {
297 u8 stopUseAllMask = thisLIR->useMask;
300 * Branches for null/range checks are marked with the true resource
301 * bits, and loads to Dalvik registers, constant pools, and non-alias
302 * locations are safe to be hoisted. So only mark the heap references
303 * conservatively here.
305 if (stopUseAllMask & ENCODE_HEAP_REF) {
306 stopUseAllMask |= ENCODE_REG_PC;
309 /* Similar as above, but just check for pure register dependency */
310 u8 stopUseRegMask = stopUseAllMask & ~ENCODE_MEM;
311 u8 stopDefRegMask = thisLIR->defMask & ~ENCODE_MEM;
314 bool stopHere = false;
316 /* Try to hoist the load to a good spot */
317 for (checkLIR = PREV_LIR(thisLIR);
319 checkLIR = PREV_LIR(checkLIR)) {
322 * Skip already dead instructions (whose dataflow information is
323 * outdated and misleading).
325 if (checkLIR->flags.isNop) continue;
327 u8 checkMemMask = checkLIR->defMask & ENCODE_MEM;
328 u8 aliasCondition = stopUseAllMask & checkMemMask;
331 /* Potential WAR alias seen - check the exact relation */
332 if (checkMemMask != ENCODE_MEM && aliasCondition != 0) {
333 /* We can fully disambiguate Dalvik references */
334 if (aliasCondition == ENCODE_DALVIK_REG) {
335 /* Must alias or partually overlap */
336 if ((checkLIR->aliasInfo == thisLIR->aliasInfo) ||
337 isDalvikRegisterClobbered(thisLIR, checkLIR)) {
340 /* Conservatively treat all heap refs as may-alias */
342 assert(aliasCondition == ENCODE_HEAP_REF);
345 /* Memory content may be updated. Stop looking now. */
347 prevInstList[nextSlot++] = checkLIR;
352 if (stopHere == false) {
353 stopHere = CHECK_REG_DEP(stopUseRegMask, stopDefRegMask,
358 * Store the dependent or non-pseudo/indepedent instruction to the
361 if (stopHere || !isPseudoOpCode(checkLIR->opcode)) {
362 prevInstList[nextSlot++] = checkLIR;
363 if (nextSlot == MAX_HOIST_DISTANCE) break;
366 /* Found a new place to put the load - move it here */
367 if (stopHere == true) {
368 DEBUG_OPT(dumpDependentInsnPair(checkLIR, thisLIR
375 * Reached the top - use headLIR as the dependent marker as all labels
378 if (stopHere == false && nextSlot < MAX_HOIST_DISTANCE) {
379 prevInstList[nextSlot++] = headLIR;
383 * At least one independent instruction is found. Scan in the reversed
384 * direction to find a beneficial slot.
387 int firstSlot = nextSlot - 2;
389 MipsLIR *depLIR = prevInstList[nextSlot-1];
390 /* If there is ld-ld dependency, wait LDLD_DISTANCE cycles */
391 if (!isPseudoOpCode(depLIR->opcode) &&
392 (EncodingMap[depLIR->opcode].flags & IS_LOAD)) {
393 firstSlot -= LDLD_DISTANCE;
396 * Make sure we check slot >= 0 since firstSlot may be negative
397 * when the loop is first entered.
399 for (slot = firstSlot; slot >= 0; slot--) {
400 MipsLIR *curLIR = prevInstList[slot];
401 MipsLIR *prevLIR = prevInstList[slot+1];
403 /* Check the highest instruction */
404 if (prevLIR->defMask == ENCODE_ALL) {
406 * If the first instruction is a load, don't hoist anything
407 * above it since it is unlikely to be beneficial.
409 if (EncodingMap[curLIR->opcode].flags & IS_LOAD) continue;
411 * If the remaining number of slots is less than LD_LATENCY,
412 * insert the hoisted load here.
414 if (slot < LD_LATENCY) break;
418 * NOTE: now prevLIR is guaranteed to be a non-pseudo
419 * instruction (ie accessing EncodingMap[prevLIR->opcode] is
422 * Try to find two instructions with load/use dependency until
423 * the remaining instructions are less than LD_LATENCY.
425 if (((curLIR->useMask & prevLIR->defMask) &&
426 (EncodingMap[prevLIR->opcode].flags & IS_LOAD)) ||
427 (slot < LD_LATENCY)) {
432 /* Found a slot to hoist to */
434 MipsLIR *curLIR = prevInstList[slot];
435 MipsLIR *newLoadLIR = (MipsLIR *) dvmCompilerNew(sizeof(MipsLIR),
437 *newLoadLIR = *thisLIR;
439 * Insertion is guaranteed to succeed since checkLIR
440 * is never the first LIR on the list
442 dvmCompilerInsertLIRBefore((LIR *) curLIR,
444 thisLIR->flags.isNop = true;
450 void dvmCompilerApplyLocalOptimizations(CompilationUnit *cUnit, LIR *headLIR,
453 if (!(gDvmJit.disableOpt & (1 << kLoadStoreElimination))) {
454 applyLoadStoreElimination(cUnit, (MipsLIR *) headLIR,
455 (MipsLIR *) tailLIR);
457 if (!(gDvmJit.disableOpt & (1 << kLoadHoisting))) {
458 applyLoadHoisting(cUnit, (MipsLIR *) headLIR, (MipsLIR *) tailLIR);