1 %default {"preinstr":"", "chkzero":"0"}
3 * Generic 64-bit binary operation. Provide an "instr" line that
4 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5 * This could be an MIPS instruction or a function call.
6 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7 * vCC (a1). Useful for integer division and modulus.
9 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
10 * xor-long, add-double, sub-double, mul-double, div-double,
13 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
15 /* binop vAA, vBB, vCC */
16 FETCH(a0, 1) # a0 <- CCBB
17 GET_OPA(rOBJ) # s5 <- AA
18 and a2, a0, 255 # a2 <- BB
19 srl a3, a0, 8 # a3 <- CC
20 EAS2(rOBJ, rFP, rOBJ) # s5 <- &fp[AA]
21 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
22 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
24 LOAD64(rARG0, rARG1, a2) # a0/a1 <- vBB/vBB+1
25 LOAD64(rARG2, rARG3, t1) # a2/a3 <- vCC/vCC+1
27 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
28 beqz t0, common_errDivideByZero
31 LOAD64_F(fa0, fa0f, a2)
32 LOAD64_F(fa1, fa1f, t1)
36 bc1t fcc0, common_errDivideByZero
40 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
41 $preinstr # optional op
43 $instr # result <- op, a0-a3 changed
44 STORE64(rRESULT0, rRESULT1, rOBJ)
47 STORE64_F(fv0, fv0f, rOBJ)
49 GET_INST_OPCODE(t0) # extract opcode from rINST
50 GOTO_OPCODE(t0) # jump to next instruction
51 /* 14-17 instructions */