2 * This file was generated automatically by gen-mterp.py for 'mips'.
7 /* File: mips/header.S */
8 #include "../common/asm-constants.h"
9 #include "../common/mips-defines.h"
10 #include <asm/regdef.h>
11 #include <asm/fpregdef.h>
13 #ifdef __mips_hard_float
19 #if (__mips==32) && (__mips_isa_rev>=2)
23 /* MIPS definitions and declarations
26 s0 rPC interpreted program counter, used for fetching instructions
27 s1 rFP interpreted frame pointer, used for accessing locals and args
28 s2 rSELF self (Thread) pointer
29 s3 rIBASE interpreted instruction base pointer, used for computed goto
30 s4 rINST first 16-bit code unit of current instruction
34 /* single-purpose registers, given names for clarity */
44 /* The long arguments sent to function calls in Big-endian mode should be register
45 swapped when sent to functions in little endian mode. In other words long variable
46 sent as a0(MSW), a1(LSW) for a function call in LE mode should be sent as a1, a0 in
49 #ifdef HAVE_LITTLE_ENDIAN
66 /* save/restore the PC and/or FP from the glue struct */
67 #define LOAD_PC_FROM_SELF() lw rPC, offThread_pc(rSELF)
68 #define SAVE_PC_TO_SELF() sw rPC, offThread_pc(rSELF)
69 #define LOAD_FP_FROM_SELF() lw rFP, offThread_curFrame(rSELF)
70 #define SAVE_FP_TO_SELF() sw rFP, offThread_curFrame(rSELF)
71 #define LOAD_PC_FP_FROM_SELF() \
72 LOAD_PC_FROM_SELF(); \
74 #define SAVE_PC_FP_TO_SELF() \
79 sw rPC, (offStackSaveArea_currentPc - sizeofStackSaveArea)(rFP)
81 #define SAVEAREA_FROM_FP(rd, _fpreg) \
82 subu rd, _fpreg, sizeofStackSaveArea
84 #define FETCH_INST() lhu rINST, (rPC)
86 #define FETCH_ADVANCE_INST(_count) lhu rINST, ((_count)*2)(rPC); \
87 addu rPC, rPC, ((_count) * 2)
89 #define PREFETCH_ADVANCE_INST(_dreg, _sreg, _count) \
90 lhu _dreg, ((_count)*2)(_sreg) ; \
91 addu _sreg, _sreg, (_count)*2
93 #define FETCH_ADVANCE_INST_RB(rd) addu rPC, rPC, rd; \
96 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC)
97 #define FETCH_S(rd, _count) lh rd, ((_count) * 2)(rPC)
99 #ifdef HAVE_LITTLE_ENDIAN
101 #define FETCH_B(rd, _count) lbu rd, ((_count) * 2)(rPC)
102 #define FETCH_C(rd, _count) lbu rd, ((_count) * 2 + 1)(rPC)
106 #define FETCH_B(rd, _count) lbu rd, ((_count) * 2 + 1)(rPC)
107 #define FETCH_C(rd, _count) lbu rd, ((_count) * 2)(rPC)
111 #define GET_INST_OPCODE(rd) and rd, rINST, 0xFF
114 * Put the prefetched instruction's opcode field into the specified register.
117 #define GET_PREFETCHED_OPCODE(dreg, sreg) andi dreg, sreg, 255
119 #define GOTO_OPCODE(rd) sll rd, rd, 7; \
120 addu rd, rIBASE, rd; \
123 #define GOTO_OPCODE_BASE(_base, rd) sll rd, rd, 7; \
124 addu rd, _base, rd; \
127 #define GET_VREG(rd, rix) LOAD_eas2(rd, rFP, rix)
129 #define GET_VREG_F(rd, rix) EAS2(AT, rFP, rix); \
130 .set noat; l.s rd, (AT); .set at
132 #define SET_VREG(rd, rix) STORE_eas2(rd, rFP, rix)
134 #define SET_VREG_GOTO(rd, rix, dst) .set noreorder; \
136 addu dst, rIBASE, dst; \
143 #define SET_VREG_F(rd, rix) EAS2(AT, rFP, rix); \
144 .set noat; s.s rd, (AT); .set at
147 #define GET_OPA(rd) srl rd, rINST, 8
149 #define GET_OPA4(rd) GET_OPA(rd); and rd, 0xf
151 #define GET_OPA4(rd) ext rd, rINST, 8, 4
153 #define GET_OPB(rd) srl rd, rINST, 12
155 #define LOAD_rSELF_OFF(rd, off) lw rd, offThread_##off## (rSELF)
157 #define LOAD_rSELF_method(rd) LOAD_rSELF_OFF(rd, method)
158 #define LOAD_rSELF_methodClassDex(rd) LOAD_rSELF_OFF(rd, methodClassDex)
159 #define LOAD_rSELF_interpStackEnd(rd) LOAD_rSELF_OFF(rd, interpStackEnd)
160 #define LOAD_rSELF_retval(rd) LOAD_rSELF_OFF(rd, retval)
161 #define LOAD_rSELF_pActiveProfilers(rd) LOAD_rSELF_OFF(rd, pActiveProfilers)
162 #define LOAD_rSELF_bailPtr(rd) LOAD_rSELF_OFF(rd, bailPtr)
163 #define LOAD_rSELF_SelfSuspendCount(rd) LOAD_rSELF_OFF(rd, SelfSuspendCount)
167 * Form an Effective Address rd = rbase + roff<<n;
170 #define EASN(rd, rbase, roff, rshift) .set noat; \
171 sll AT, roff, rshift; \
172 addu rd, rbase, AT; \
175 #define EAS1(rd, rbase, roff) EASN(rd, rbase, roff, 1)
176 #define EAS2(rd, rbase, roff) EASN(rd, rbase, roff, 2)
177 #define EAS3(rd, rbase, roff) EASN(rd, rbase, roff, 3)
178 #define EAS4(rd, rbase, roff) EASN(rd, rbase, roff, 4)
181 * Form an Effective Shift Right rd = rbase + roff>>n;
184 #define ESRN(rd, rbase, roff, rshift) .set noat; \
185 srl AT, roff, rshift; \
186 addu rd, rbase, AT; \
189 #define LOAD_eas2(rd, rbase, roff) EAS2(AT, rbase, roff); \
190 .set noat; lw rd, 0(AT); .set at
192 #define STORE_eas2(rd, rbase, roff) EAS2(AT, rbase, roff); \
193 .set noat; sw rd, 0(AT); .set at
195 #define LOAD_RB_OFF(rd, rbase, off) lw rd, off(rbase)
196 #define LOADu2_RB_OFF(rd, rbase, off) lhu rd, off(rbase)
197 #define STORE_RB_OFF(rd, rbase, off) sw rd, off(rbase)
199 #ifdef HAVE_LITTLE_ENDIAN
201 #define STORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \
202 sw rhi, (off+4)(rbase)
203 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \
204 lw rhi, (off+4)(rbase)
206 #define vSTORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \
207 sw rhi, (off+4)(rbase)
208 #define vLOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \
209 lw rhi, (off+4)(rbase)
211 #define STORE64_off_F(rlo, rhi, rbase, off) s.s rlo, off(rbase); \
212 s.s rhi, (off+4)(rbase)
213 #define LOAD64_off_F(rlo, rhi, rbase, off) l.s rlo, off(rbase); \
214 l.s rhi, (off+4)(rbase)
217 #define STORE64_off(rlo, rhi, rbase, off) sw rlo, (off+4)(rbase); \
219 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, (off+4)(rbase); \
221 #define vSTORE64_off(rlo, rhi, rbase, off) sw rlo, (off+4)(rbase); \
223 #define vLOAD64_off(rlo, rhi, rbase, off) lw rlo, (off+4)(rbase); \
225 #define STORE64_off_F(rlo, rhi, rbase, off) s.s rlo, (off+4)(rbase); \
226 s.s rhi, (off)(rbase)
227 #define LOAD64_off_F(rlo, rhi, rbase, off) l.s rlo, (off+4)(rbase); \
228 l.s rhi, (off)(rbase)
231 #define STORE64(rlo, rhi, rbase) STORE64_off(rlo, rhi, rbase, 0)
232 #define LOAD64(rlo, rhi, rbase) LOAD64_off(rlo, rhi, rbase, 0)
234 #define vSTORE64(rlo, rhi, rbase) vSTORE64_off(rlo, rhi, rbase, 0)
235 #define vLOAD64(rlo, rhi, rbase) vLOAD64_off(rlo, rhi, rbase, 0)
237 #define STORE64_F(rlo, rhi, rbase) STORE64_off_F(rlo, rhi, rbase, 0)
238 #define LOAD64_F(rlo, rhi, rbase) LOAD64_off_F(rlo, rhi, rbase, 0)
240 #define STORE64_lo(rd, rbase) sw rd, 0(rbase)
241 #define STORE64_hi(rd, rbase) sw rd, 4(rbase)
244 #define LOAD_offThread_exception(rd, rbase) LOAD_RB_OFF(rd, rbase, offThread_exception)
245 #define LOAD_base_offArrayObject_length(rd, rbase) LOAD_RB_OFF(rd, rbase, offArrayObject_length)
246 #define LOAD_base_offClassObject_accessFlags(rd, rbase) LOAD_RB_OFF(rd, rbase, offClassObject_accessFlags)
247 #define LOAD_base_offClassObject_descriptor(rd, rbase) LOAD_RB_OFF(rd, rbase, offClassObject_descriptor)
248 #define LOAD_base_offClassObject_super(rd, rbase) LOAD_RB_OFF(rd, rbase, offClassObject_super)
250 #define LOAD_base_offClassObject_vtable(rd, rbase) LOAD_RB_OFF(rd, rbase, offClassObject_vtable)
251 #define LOAD_base_offClassObject_vtableCount(rd, rbase) LOAD_RB_OFF(rd, rbase, offClassObject_vtableCount)
252 #define LOAD_base_offDvmDex_pResClasses(rd, rbase) LOAD_RB_OFF(rd, rbase, offDvmDex_pResClasses)
253 #define LOAD_base_offDvmDex_pResFields(rd, rbase) LOAD_RB_OFF(rd, rbase, offDvmDex_pResFields)
255 #define LOAD_base_offDvmDex_pResMethods(rd, rbase) LOAD_RB_OFF(rd, rbase, offDvmDex_pResMethods)
256 #define LOAD_base_offDvmDex_pResStrings(rd, rbase) LOAD_RB_OFF(rd, rbase, offDvmDex_pResStrings)
257 #define LOAD_base_offInstField_byteOffset(rd, rbase) LOAD_RB_OFF(rd, rbase, offInstField_byteOffset)
258 #define LOAD_base_offStaticField_value(rd, rbase) LOAD_RB_OFF(rd, rbase, offStaticField_value)
259 #define LOAD_base_offMethod_clazz(rd, rbase) LOAD_RB_OFF(rd, rbase, offMethod_clazz)
261 #define LOAD_base_offMethod_name(rd, rbase) LOAD_RB_OFF(rd, rbase, offMethod_name)
262 #define LOAD_base_offObject_clazz(rd, rbase) LOAD_RB_OFF(rd, rbase, offObject_clazz)
264 #define LOADu2_offMethod_methodIndex(rd, rbase) LOADu2_RB_OFF(rd, rbase, offMethod_methodIndex)
267 #define STORE_offThread_exception(rd, rbase) STORE_RB_OFF(rd, rbase, offThread_exception)
270 #define STACK_STORE(rd, off) sw rd, off(sp)
271 #define STACK_LOAD(rd, off) lw rd, off(sp)
272 #define CREATE_STACK(n) subu sp, sp, n
273 #define DELETE_STACK(n) addu sp, sp, n
275 #define SAVE_RA(offset) STACK_STORE(ra, offset)
276 #define LOAD_RA(offset) STACK_LOAD(ra, offset)
278 #define LOAD_ADDR(dest, addr) la dest, addr
279 #define LOAD_IMM(dest, imm) li dest, imm
280 #define MOVE_REG(dest, src) move dest, src
282 #define STACK_SIZE 128
284 #define STACK_OFFSET_ARG04 16
285 #define STACK_OFFSET_ARG05 20
286 #define STACK_OFFSET_ARG06 24
287 #define STACK_OFFSET_ARG07 28
288 #define STACK_OFFSET_SCR 32
289 #define STACK_OFFSET_SCRMX 80
290 #define STACK_OFFSET_GP 84
291 #define STACK_OFFSET_rFP 112
296 #define STACK_STORE_RA() CREATE_STACK(STACK_SIZE); \
297 STACK_STORE(gp, STACK_OFFSET_GP); \
300 #define STACK_STORE_S0() STACK_STORE_RA(); \
303 #define STACK_STORE_S0S1() STACK_STORE_S0(); \
304 STACK_STORE(s1, STACK_OFFSET_rFP)
306 #define STACK_LOAD_RA() STACK_LOAD(ra, 124); \
307 STACK_LOAD(gp, STACK_OFFSET_GP); \
308 DELETE_STACK(STACK_SIZE)
310 #define STACK_LOAD_S0() STACK_LOAD(s0, 116); \
313 #define STACK_LOAD_S0S1() STACK_LOAD(s1, STACK_OFFSET_rFP); \
316 #define STACK_STORE_FULL() CREATE_STACK(STACK_SIZE); \
317 STACK_STORE(ra, 124); \
318 STACK_STORE(fp, 120); \
319 STACK_STORE(s0, 116); \
320 STACK_STORE(s1, STACK_OFFSET_rFP); \
321 STACK_STORE(s2, 108); \
322 STACK_STORE(s3, 104); \
323 STACK_STORE(s4, 100); \
324 STACK_STORE(s5, 96); \
325 STACK_STORE(s6, 92); \
328 #define STACK_LOAD_FULL() STACK_LOAD(gp, STACK_OFFSET_GP); \
329 STACK_LOAD(s7, 88); \
330 STACK_LOAD(s6, 92); \
331 STACK_LOAD(s5, 96); \
332 STACK_LOAD(s4, 100); \
333 STACK_LOAD(s3, 104); \
334 STACK_LOAD(s2, 108); \
335 STACK_LOAD(s1, STACK_OFFSET_rFP); \
336 STACK_LOAD(s0, 116); \
337 STACK_LOAD(fp, 120); \
338 STACK_LOAD(ra, 124); \
339 DELETE_STACK(STACK_SIZE)
342 * first 8 words are reserved for function calls
343 * Maximum offset is STACK_OFFSET_SCRMX-STACK_OFFSET_SCR
345 #define SCRATCH_STORE(r,off) \
346 STACK_STORE(r, STACK_OFFSET_SCR+off);
347 #define SCRATCH_LOAD(r,off) \
348 STACK_LOAD(r, STACK_OFFSET_SCR+off);
350 #if defined(WITH_JIT)
351 #include "../common/jit-config.h"
354 /* File: mips/platform.S */
356 * ===========================================================================
357 * CPU-version-specific defines
358 * ===========================================================================
361 #if !defined(ANDROID_SMP)
362 # error "Must define ANDROID_SMP"
366 * Macro for data memory barrier.
377 * Macro for data memory barrier (store/store variant).
381 // FIXME: Is this really needed?
388 /* File: mips/entry.S */
391 * Copyright (C) 2008 The Android Open Source Project
393 * Licensed under the Apache License, Version 2.0 (the "License");
394 * you may not use this file except in compliance with the License.
395 * You may obtain a copy of the License at
397 * http://www.apache.org/licenses/LICENSE-2.0
399 * Unless required by applicable law or agreed to in writing, software
400 * distributed under the License is distributed on an "AS IS" BASIS,
401 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
402 * See the License for the specific language governing permissions and
403 * limitations under the License.
406 * Interpreter entry point.
409 #define ASSIST_DEBUGGER 1
413 .global dvmMterpStdRun
415 .frame sp, STACK_SIZE, ra
420 * The return comes via a call to dvmMterpStdBail().
427 /* Save to the stack. Frame size = STACK_SIZE */
429 /* This directive will make sure all subsequent jal restore gp at a known offset */
430 .cprestore STACK_OFFSET_GP
432 addu fp, sp, STACK_SIZE # Move Frame Pointer to the base of frame
433 /* save stack pointer, add magic word for debuggerd */
434 sw sp, offThread_bailPtr(a0) # Save SP
436 /* set up "named" registers, figure out entry point */
437 move rSELF, a0 # set rSELF
440 lw rIBASE, offThread_curHandlerTable(rSELF)
442 #if defined(WITH_JIT)
444 /* Entry is always a possible trace start */
445 lw a0, offThread_pJitProfTable(rSELF)
446 FETCH_INST() # load rINST from rPC
447 sw zero, offThread_inJitCodeCache(rSELF)
448 #if !defined(WITH_SELF_VERIFICATION)
449 bnez a0, common_updateProfile # profiling is enabled
451 lw a2, offThread_shadowSpace(rSELF) # to find out the jit exit state
452 beqz a0, 1f # profiling is disabled
453 lw a3, offShadowSpace_jitExitState(a2) # jit exit state
454 li t0, kSVSTraceSelect
456 li a2, kJitTSelectRequestHot # ask for trace selection
457 b common_selectTrace # go build the trace
460 beq a3, a4, 1f # don't profile the next instruction?
461 b common_updateProfile # collect profiles
464 GET_INST_OPCODE(t0) # extract opcode from rINST
465 GOTO_OPCODE(t0) # jump to next instruction
467 /* start executing the instruction at rPC */
468 FETCH_INST() # load rINST from rPC
469 GET_INST_OPCODE(t0) # extract opcode from rINST
470 GOTO_OPCODE(t0) # jump to next instruction
474 la a0, .LstrBadEntryPoint
475 #a1 holds value of entryPoint
481 .global dvmMterpStdBail
484 /* Restore the stack pointer and all the registers stored at sp from the save
485 * point established on entry. Return to whoever called dvmMterpStdRun.
491 lw sp, offThread_bailPtr(a0) # Restore sp
498 .global dvmAsmInstructionStart
499 .type dvmAsmInstructionStart, %function
500 dvmAsmInstructionStart = .L_OP_NOP
503 /* ------------------------------ */
505 .L_OP_NOP: /* 0x00 */
506 /* File: mips/OP_NOP.S */
507 FETCH_ADVANCE_INST(1) # advance to next instr, load rINST
509 GOTO_OPCODE(t0) # execute it
511 #ifdef ASSIST_DEBUGGER
512 /* insert fake function header to help gdb find the stack frame */
513 .type dalvik_inst, @function
520 /* ------------------------------ */
522 .L_OP_MOVE: /* 0x01 */
523 /* File: mips/OP_MOVE.S */
524 /* for move, move-object, long-to-int */
526 GET_OPB(a1) # a1 <- B from 15:12
527 GET_OPA4(a0) # a0 <- A from 11:8
528 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
529 GET_VREG(a2, a1) # a2 <- fp[B]
530 GET_INST_OPCODE(t0) # t0 <- opcode from rINST
531 SET_VREG_GOTO(a2, a0, t0) # fp[A] <- a2
534 /* ------------------------------ */
536 .L_OP_MOVE_FROM16: /* 0x02 */
537 /* File: mips/OP_MOVE_FROM16.S */
538 /* for: move/from16, move-object/from16 */
540 FETCH(a1, 1) # a1 <- BBBB
541 GET_OPA(a0) # a0 <- AA
542 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
543 GET_VREG(a2, a1) # a2 <- fp[BBBB]
544 GET_INST_OPCODE(t0) # extract opcode from rINST
545 SET_VREG_GOTO(a2, a0, t0) # fp[AA] <- a2
548 /* ------------------------------ */
550 .L_OP_MOVE_16: /* 0x03 */
551 /* File: mips/OP_MOVE_16.S */
552 /* for: move/16, move-object/16 */
553 /* op vAAAA, vBBBB */
554 FETCH(a1, 2) # a1 <- BBBB
555 FETCH(a0, 1) # a0 <- AAAA
556 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
557 GET_VREG(a2, a1) # a2 <- fp[BBBB]
558 GET_INST_OPCODE(t0) # extract opcode from rINST
559 SET_VREG_GOTO(a2, a0, t0) # fp[AAAA] <- a2 and jump
562 /* ------------------------------ */
564 .L_OP_MOVE_WIDE: /* 0x04 */
565 /* File: mips/OP_MOVE_WIDE.S */
566 /* move-wide vA, vB */
567 /* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
568 GET_OPA4(a2) # a2 <- A(+)
569 GET_OPB(a3) # a3 <- B
570 EAS2(a3, rFP, a3) # a3 <- &fp[B]
571 EAS2(a2, rFP, a2) # a2 <- &fp[A]
572 LOAD64(a0, a1, a3) # a0/a1 <- fp[B]
573 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
574 GET_INST_OPCODE(t0) # extract opcode from rINST
575 STORE64(a0, a1, a2) # fp[A] <- a0/a1
576 GOTO_OPCODE(t0) # jump to next instruction
579 /* ------------------------------ */
581 .L_OP_MOVE_WIDE_FROM16: /* 0x05 */
582 /* File: mips/OP_MOVE_WIDE_FROM16.S */
583 /* move-wide/from16 vAA, vBBBB */
584 /* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
585 FETCH(a3, 1) # a3 <- BBBB
586 GET_OPA(a2) # a2 <- AA
587 EAS2(a3, rFP, a3) # a3 <- &fp[BBBB]
588 EAS2(a2, rFP, a2) # a2 <- &fp[AA]
589 LOAD64(a0, a1, a3) # a0/a1 <- fp[BBBB]
590 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
591 GET_INST_OPCODE(t0) # extract opcode from rINST
592 STORE64(a0, a1, a2) # fp[AA] <- a0/a1
593 GOTO_OPCODE(t0) # jump to next instruction
596 /* ------------------------------ */
598 .L_OP_MOVE_WIDE_16: /* 0x06 */
599 /* File: mips/OP_MOVE_WIDE_16.S */
600 /* move-wide/16 vAAAA, vBBBB */
601 /* NOTE: regs can overlap, e.g. "move v6, v7" or "move v7, v6" */
602 FETCH(a3, 2) # a3 <- BBBB
603 FETCH(a2, 1) # a2 <- AAAA
604 EAS2(a3, rFP, a3) # a3 <- &fp[BBBB]
605 EAS2(a2, rFP, a2) # a2 <- &fp[AAAA]
606 LOAD64(a0, a1, a3) # a0/a1 <- fp[BBBB]
607 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
608 GET_INST_OPCODE(t0) # extract opcode from rINST
609 STORE64(a0, a1, a2) # fp[AAAA] <- a0/a1
610 GOTO_OPCODE(t0) # jump to next instruction
613 /* ------------------------------ */
615 .L_OP_MOVE_OBJECT: /* 0x07 */
616 /* File: mips/OP_MOVE_OBJECT.S */
617 /* File: mips/OP_MOVE.S */
618 /* for move, move-object, long-to-int */
620 GET_OPB(a1) # a1 <- B from 15:12
621 GET_OPA4(a0) # a0 <- A from 11:8
622 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
623 GET_VREG(a2, a1) # a2 <- fp[B]
624 GET_INST_OPCODE(t0) # t0 <- opcode from rINST
625 SET_VREG_GOTO(a2, a0, t0) # fp[A] <- a2
629 /* ------------------------------ */
631 .L_OP_MOVE_OBJECT_FROM16: /* 0x08 */
632 /* File: mips/OP_MOVE_OBJECT_FROM16.S */
633 /* File: mips/OP_MOVE_FROM16.S */
634 /* for: move/from16, move-object/from16 */
636 FETCH(a1, 1) # a1 <- BBBB
637 GET_OPA(a0) # a0 <- AA
638 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
639 GET_VREG(a2, a1) # a2 <- fp[BBBB]
640 GET_INST_OPCODE(t0) # extract opcode from rINST
641 SET_VREG_GOTO(a2, a0, t0) # fp[AA] <- a2
645 /* ------------------------------ */
647 .L_OP_MOVE_OBJECT_16: /* 0x09 */
648 /* File: mips/OP_MOVE_OBJECT_16.S */
649 /* File: mips/OP_MOVE_16.S */
650 /* for: move/16, move-object/16 */
651 /* op vAAAA, vBBBB */
652 FETCH(a1, 2) # a1 <- BBBB
653 FETCH(a0, 1) # a0 <- AAAA
654 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
655 GET_VREG(a2, a1) # a2 <- fp[BBBB]
656 GET_INST_OPCODE(t0) # extract opcode from rINST
657 SET_VREG_GOTO(a2, a0, t0) # fp[AAAA] <- a2 and jump
661 /* ------------------------------ */
663 .L_OP_MOVE_RESULT: /* 0x0a */
664 /* File: mips/OP_MOVE_RESULT.S */
665 /* for: move-result, move-result-object */
667 GET_OPA(a2) # a2 <- AA
668 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
669 LOAD_rSELF_retval(a0) # a0 <- self->retval.i
670 GET_INST_OPCODE(t0) # extract opcode from rINST
671 SET_VREG_GOTO(a0, a2, t0) # fp[AA] <- a0
674 /* ------------------------------ */
676 .L_OP_MOVE_RESULT_WIDE: /* 0x0b */
677 /* File: mips/OP_MOVE_RESULT_WIDE.S */
678 /* move-result-wide vAA */
679 GET_OPA(a2) # a2 <- AA
680 addu a3, rSELF, offThread_retval # a3 <- &self->retval
681 EAS2(a2, rFP, a2) # a2 <- &fp[AA]
682 LOAD64(a0, a1, a3) # a0/a1 <- retval.j
683 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
684 GET_INST_OPCODE(t0) # extract opcode from rINST
685 STORE64(a0, a1, a2) # fp[AA] <- a0/a1
686 GOTO_OPCODE(t0) # jump to next instruction
689 /* ------------------------------ */
691 .L_OP_MOVE_RESULT_OBJECT: /* 0x0c */
692 /* File: mips/OP_MOVE_RESULT_OBJECT.S */
693 /* File: mips/OP_MOVE_RESULT.S */
694 /* for: move-result, move-result-object */
696 GET_OPA(a2) # a2 <- AA
697 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
698 LOAD_rSELF_retval(a0) # a0 <- self->retval.i
699 GET_INST_OPCODE(t0) # extract opcode from rINST
700 SET_VREG_GOTO(a0, a2, t0) # fp[AA] <- a0
704 /* ------------------------------ */
706 .L_OP_MOVE_EXCEPTION: /* 0x0d */
707 /* File: mips/OP_MOVE_EXCEPTION.S */
708 /* move-exception vAA */
709 GET_OPA(a2) # a2 <- AA
710 LOAD_offThread_exception(a3, rSELF) # a3 <- dvmGetException bypass
712 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
713 SET_VREG(a3, a2) # fp[AA] <- exception obj
714 GET_INST_OPCODE(t0) # extract opcode from rINST
715 STORE_offThread_exception(a1, rSELF) # dvmClearException bypass
716 GOTO_OPCODE(t0) # jump to next instruction
719 /* ------------------------------ */
721 .L_OP_RETURN_VOID: /* 0x0e */
722 /* File: mips/OP_RETURN_VOID.S */
723 b common_returnFromMethod
726 /* ------------------------------ */
728 .L_OP_RETURN: /* 0x0f */
729 /* File: mips/OP_RETURN.S */
731 * Return a 32-bit value. Copies the return value into the "thread"
732 * structure, then jumps to the return handler.
734 * for: return, return-object
737 GET_OPA(a2) # a2 <- AA
738 GET_VREG(a0, a2) # a0 <- vAA
739 sw a0, offThread_retval(rSELF) # retval.i <- vAA
740 b common_returnFromMethod
743 /* ------------------------------ */
745 .L_OP_RETURN_WIDE: /* 0x10 */
746 /* File: mips/OP_RETURN_WIDE.S */
748 * Return a 64-bit value. Copies the return value into the "thread"
749 * structure, then jumps to the return handler.
751 /* return-wide vAA */
752 GET_OPA(a2) # a2 <- AA
753 EAS2(a2, rFP, a2) # a2 <- &fp[AA]
754 addu a3, rSELF, offThread_retval # a3 <- &self->retval
755 LOAD64(a0, a1, a2) # a0/a1 <- vAA/vAA+1
756 STORE64(a0, a1, a3) # retval <- a0/a1
757 b common_returnFromMethod
760 /* ------------------------------ */
762 .L_OP_RETURN_OBJECT: /* 0x11 */
763 /* File: mips/OP_RETURN_OBJECT.S */
764 /* File: mips/OP_RETURN.S */
766 * Return a 32-bit value. Copies the return value into the "thread"
767 * structure, then jumps to the return handler.
769 * for: return, return-object
772 GET_OPA(a2) # a2 <- AA
773 GET_VREG(a0, a2) # a0 <- vAA
774 sw a0, offThread_retval(rSELF) # retval.i <- vAA
775 b common_returnFromMethod
779 /* ------------------------------ */
781 .L_OP_CONST_4: /* 0x12 */
782 /* File: mips/OP_CONST_4.S */
783 # const/4 vA, /* +B */
784 sll a1, rINST, 16 # a1 <- Bxxx0000
785 GET_OPA(a0) # a0 <- A+
786 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
787 sra a1, a1, 28 # a1 <- sssssssB (sign-extended)
789 GET_INST_OPCODE(t0) # ip <- opcode from rINST
790 SET_VREG_GOTO(a1, a0, t0) # fp[A] <- a1
793 /* ------------------------------ */
795 .L_OP_CONST_16: /* 0x13 */
796 /* File: mips/OP_CONST_16.S */
797 # const/16 vAA, /* +BBBB */
798 FETCH_S(a0, 1) # a0 <- ssssBBBB (sign-extended)
799 GET_OPA(a3) # a3 <- AA
800 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
801 GET_INST_OPCODE(t0) # extract opcode from rINST
802 SET_VREG_GOTO(a0, a3, t0) # vAA <- a0
805 /* ------------------------------ */
807 .L_OP_CONST: /* 0x14 */
808 /* File: mips/OP_CONST.S */
809 # const vAA, /* +BBBBbbbb */
810 GET_OPA(a3) # a3 <- AA
811 FETCH(a0, 1) # a0 <- bbbb (low)
812 FETCH(a1, 2) # a1 <- BBBB (high)
813 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
815 or a0, a1, a0 # a0 <- BBBBbbbb
816 GET_INST_OPCODE(t0) # extract opcode from rINST
817 SET_VREG_GOTO(a0, a3, t0) # vAA <- a0
820 /* ------------------------------ */
822 .L_OP_CONST_HIGH16: /* 0x15 */
823 /* File: mips/OP_CONST_HIGH16.S */
824 # const/high16 vAA, /* +BBBB0000 */
825 FETCH(a0, 1) # a0 <- 0000BBBB (zero-extended)
826 GET_OPA(a3) # a3 <- AA
827 sll a0, a0, 16 # a0 <- BBBB0000
828 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
829 GET_INST_OPCODE(t0) # extract opcode from rINST
830 SET_VREG_GOTO(a0, a3, t0) # vAA <- a0
833 /* ------------------------------ */
835 .L_OP_CONST_WIDE_16: /* 0x16 */
836 /* File: mips/OP_CONST_WIDE_16.S */
837 # const-wide/16 vAA, /* +BBBB */
838 FETCH_S(a0, 1) # a0 <- ssssBBBB (sign-extended)
839 GET_OPA(a3) # a3 <- AA
840 sra a1, a0, 31 # a1 <- ssssssss
841 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
842 EAS2(a3, rFP, a3) # a3 <- &fp[AA]
843 GET_INST_OPCODE(t0) # extract opcode from rINST
844 STORE64(a0, a1, a3) # vAA <- a0/a1
845 GOTO_OPCODE(t0) # jump to next instruction
848 /* ------------------------------ */
850 .L_OP_CONST_WIDE_32: /* 0x17 */
851 /* File: mips/OP_CONST_WIDE_32.S */
852 # const-wide/32 vAA, /* +BBBBbbbb */
853 FETCH(a0, 1) # a0 <- 0000bbbb (low)
854 GET_OPA(a3) # a3 <- AA
855 FETCH_S(a2, 2) # a2 <- ssssBBBB (high)
856 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
858 or a0, a0, a2 # a0 <- BBBBbbbb
859 EAS2(a3, rFP, a3) # a3 <- &fp[AA]
860 sra a1, a0, 31 # a1 <- ssssssss
861 GET_INST_OPCODE(t0) # extract opcode from rINST
862 STORE64(a0, a1, a3) # vAA <- a0/a1
863 GOTO_OPCODE(t0) # jump to next instruction
866 /* ------------------------------ */
868 .L_OP_CONST_WIDE: /* 0x18 */
869 /* File: mips/OP_CONST_WIDE.S */
870 # const-wide vAA, /* +HHHHhhhhBBBBbbbb */
871 FETCH(a0, 1) # a0 <- bbbb (low)
872 FETCH(a1, 2) # a1 <- BBBB (low middle)
873 FETCH(a2, 3) # a2 <- hhhh (high middle)
875 or a0, a1 # a0 <- BBBBbbbb (low word)
876 FETCH(a3, 4) # a3 <- HHHH (high)
877 GET_OPA(t1) # t1 <- AA
879 or a1, a3, a2 # a1 <- HHHHhhhh (high word)
880 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
881 EAS2(t1, rFP, t1) # t1 <- &fp[AA]
882 GET_INST_OPCODE(t0) # extract opcode from rINST
883 STORE64(a0, a1, t1) # vAA <- a0/a1
884 GOTO_OPCODE(t0) # jump to next instruction
887 /* ------------------------------ */
889 .L_OP_CONST_WIDE_HIGH16: /* 0x19 */
890 /* File: mips/OP_CONST_WIDE_HIGH16.S */
891 # const-wide/high16 vAA, /* +BBBB000000000000 */
892 FETCH(a1, 1) # a1 <- 0000BBBB (zero-extended)
893 GET_OPA(a3) # a3 <- AA
894 li a0, 0 # a0 <- 00000000
895 sll a1, 16 # a1 <- BBBB0000
896 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
897 EAS2(a3, rFP, a3) # a3 <- &fp[AA]
898 GET_INST_OPCODE(t0) # extract opcode from rINST
899 STORE64(a0, a1, a3) # vAA <- a0/a1
900 GOTO_OPCODE(t0) # jump to next instruction
903 /* ------------------------------ */
905 .L_OP_CONST_STRING: /* 0x1a */
906 /* File: mips/OP_CONST_STRING.S */
907 # const/string vAA, String /* BBBB */
908 FETCH(a1, 1) # a1 <- BBBB
909 LOAD_rSELF_methodClassDex(a2) # a2 <- self->methodClassDex
910 GET_OPA(rOBJ) # rOBJ <- AA
911 LOAD_base_offDvmDex_pResStrings(a2, a2) # a2 <- dvmDex->pResStrings
912 LOAD_eas2(v0, a2, a1) # v0 <- pResStrings[BBBB]
914 bnez v0, .LOP_CONST_STRING_resolve
916 * Continuation if the String has not yet been resolved.
917 * a1: BBBB (String ref)
918 * rOBJ: target register
921 LOAD_rSELF_method(a0) # a0 <- self->method
922 LOAD_base_offMethod_clazz(a0, a0) # a0 <- method->clazz
923 JAL(dvmResolveString) # v0 <- String reference
925 beqz v0, common_exceptionThrown # yup, handle the exception
927 .LOP_CONST_STRING_resolve:
928 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
929 GET_INST_OPCODE(t0) # extract opcode from rINST
930 SET_VREG_GOTO(v0, rOBJ, t0) # vAA <- v0
937 /* ------------------------------ */
939 .L_OP_CONST_STRING_JUMBO: /* 0x1b */
940 /* File: mips/OP_CONST_STRING_JUMBO.S */
941 # const/string vAA, String /* BBBBBBBB */
942 FETCH(a0, 1) # a0 <- bbbb (low)
943 FETCH(a1, 2) # a1 <- BBBB (high)
944 LOAD_rSELF_methodClassDex(a2) # a2 <- self->methodClassDex
945 GET_OPA(rOBJ) # rOBJ <- AA
946 LOAD_base_offDvmDex_pResStrings(a2, a2) # a2 <- dvmDex->pResStrings
948 or a1, a1, a0 # a1 <- BBBBbbbb
949 LOAD_eas2(v0, a2, a1) # v0 <- pResStrings[BBBB]
950 bnez v0, .LOP_CONST_STRING_JUMBO_resolve
953 * Continuation if the String has not yet been resolved.
954 * a1: BBBBBBBB (String ref)
955 * rOBJ: target register
958 LOAD_rSELF_method(a0) # a0 <- self->method
959 LOAD_base_offMethod_clazz(a0, a0) # a0 <- method->clazz
960 JAL(dvmResolveString) # v0 <- String reference
962 beqz v0, common_exceptionThrown # yup, handle the exception
964 .LOP_CONST_STRING_JUMBO_resolve:
965 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
966 GET_INST_OPCODE(t1) # extract opcode from rINST
967 SET_VREG_GOTO(v0, rOBJ, t1) # vAA <- v0
970 /* ------------------------------ */
972 .L_OP_CONST_CLASS: /* 0x1c */
973 /* File: mips/OP_CONST_CLASS.S */
974 # const/class vAA, Class /* BBBB */
975 FETCH(a1, 1) # a1 <- BBBB
976 LOAD_rSELF_methodClassDex(a2) # a2 <- self->methodClassDex
977 GET_OPA(rOBJ) # rOBJ <- AA
978 LOAD_base_offDvmDex_pResClasses(a2, a2) # a2 <- dvmDex->pResClasses
979 LOAD_eas2(v0, a2, a1) # v0 <- pResClasses[BBBB]
981 bnez v0, .LOP_CONST_CLASS_resolve # v0!=0 => resolved-ok
983 * Continuation if the Class has not yet been resolved.
984 * a1: BBBB (Class ref)
985 * rOBJ: target register
988 LOAD_rSELF_method(a0) # a0 <- self->method
989 li a2, 1 # a2 <- true
990 LOAD_base_offMethod_clazz(a0, a0) # a0 <- method->clazz
991 JAL(dvmResolveClass) # v0 <- Class reference
993 beqz v0, common_exceptionThrown # yup, handle the exception
995 .LOP_CONST_CLASS_resolve:
996 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
997 GET_INST_OPCODE(t0) # extract opcode from rINST
998 SET_VREG_GOTO(v0, rOBJ, t0) # vAA <- v0
1002 /* ------------------------------ */
1004 .L_OP_MONITOR_ENTER: /* 0x1d */
1005 /* File: mips/OP_MONITOR_ENTER.S */
1007 * Synchronize on an object.
1009 /* monitor-enter vAA */
1010 GET_OPA(a2) # a2 <- AA
1011 GET_VREG(a1, a2) # a1 <- vAA (object)
1012 move a0, rSELF # a0 <- self
1013 EXPORT_PC() # export PC so we can grab stack trace
1015 beqz a1, common_errNullObject # null object, throw an exception
1016 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
1017 JAL(dvmLockObject) # call(self, obj)
1018 GET_INST_OPCODE(t0) # extract opcode from rINST
1019 GOTO_OPCODE(t0) # jump to next instruction
1022 /* ------------------------------ */
1024 .L_OP_MONITOR_EXIT: /* 0x1e */
1025 /* File: mips/OP_MONITOR_EXIT.S */
1029 * Exceptions that occur when unlocking a monitor need to appear as
1030 * if they happened at the following instruction. See the Dalvik
1033 /* monitor-exit vAA */
1034 GET_OPA(a2) # a2 <- AA
1035 EXPORT_PC() # before fetch: export the PC
1036 GET_VREG(a1, a2) # a1 <- vAA (object)
1039 move a0, rSELF # a0 <- self
1040 JAL(dvmUnlockObject) # v0 <- success for unlock(self, obj)
1042 FETCH_ADVANCE_INST(1) # before throw: advance rPC, load rINST
1043 beqz v0, common_exceptionThrown # yes, exception is pending
1044 GET_INST_OPCODE(t0) # extract opcode from rINST
1045 GOTO_OPCODE(t0) # jump to next instruction
1047 FETCH_ADVANCE_INST(1) # before throw: advance rPC, load rINST
1048 b common_errNullObject
1050 /* ------------------------------ */
1052 .L_OP_CHECK_CAST: /* 0x1f */
1053 /* File: mips/OP_CHECK_CAST.S */
1055 * Check to see if a cast from one class to another is allowed.
1057 # check-cast vAA, class /* BBBB */
1058 GET_OPA(a3) # a3 <- AA
1059 FETCH(a2, 1) # a2 <- BBBB
1060 GET_VREG(rOBJ, a3) # rOBJ <- object
1061 LOAD_rSELF_methodClassDex(a0) # a0 <- pDvmDex
1062 LOAD_base_offDvmDex_pResClasses(a0, a0) # a0 <- pDvmDex->pResClasses
1064 beqz rOBJ, .LOP_CHECK_CAST_okay # null obj, cast always succeeds
1065 LOAD_eas2(a1, a0, a2) # a1 <- resolved class
1066 LOAD_base_offObject_clazz(a0, rOBJ) # a0 <- obj->clazz
1067 # have we resolved this before?
1068 beqz a1, .LOP_CHECK_CAST_resolve # not resolved, do it now
1069 .LOP_CHECK_CAST_resolved:
1070 # same class (trivial success)?
1071 bne a0, a1, .LOP_CHECK_CAST_fullcheck # no, do full check
1072 .LOP_CHECK_CAST_okay:
1073 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
1074 GET_INST_OPCODE(t0) # extract opcode from rINST
1075 GOTO_OPCODE(t0) # jump to next instruction
1078 * Trivial test failed, need to perform full check. This is common.
1079 * a0 holds obj->clazz
1080 * a1 holds class resolved from BBBB
1083 .LOP_CHECK_CAST_fullcheck:
1084 move rBIX,a1 # avoid ClassObject getting clobbered
1085 JAL(dvmInstanceofNonTrivial) # v0 <- boolean result
1087 bnez v0, .LOP_CHECK_CAST_okay # no, success
1088 b .LOP_CHECK_CAST_castfailure
1090 /* ------------------------------ */
1092 .L_OP_INSTANCE_OF: /* 0x20 */
1093 /* File: mips/OP_INSTANCE_OF.S */
1095 * Check to see if an object reference is an instance of a class.
1097 * Most common situation is a non-null object, being compared against
1098 * an already-resolved class.
1100 # instance-of vA, vB, class /* CCCC */
1101 GET_OPB(a3) # a3 <- B
1102 GET_OPA4(rOBJ) # rOBJ <- A+
1103 GET_VREG(a0, a3) # a0 <- vB (object)
1104 LOAD_rSELF_methodClassDex(a2) # a2 <- pDvmDex
1106 beqz a0, .LOP_INSTANCE_OF_store # null obj, not an instance, store a0
1107 FETCH(a3, 1) # a3 <- CCCC
1108 LOAD_base_offDvmDex_pResClasses(a2, a2) # a2 <- pDvmDex->pResClasses
1109 LOAD_eas2(a1, a2, a3) # a1 <- resolved class
1110 LOAD_base_offObject_clazz(a0, a0) # a0 <- obj->clazz
1111 # have we resolved this before?
1112 beqz a1, .LOP_INSTANCE_OF_resolve # not resolved, do it now
1113 .LOP_INSTANCE_OF_resolved: # a0=obj->clazz, a1=resolved class
1114 # same class (trivial success)?
1115 beq a0, a1, .LOP_INSTANCE_OF_trivial # yes, trivial finish
1116 b .LOP_INSTANCE_OF_fullcheck # no, do full check
1119 * Trivial test succeeded, save and bail.
1122 .LOP_INSTANCE_OF_trivial:
1123 li a0, 1 # indicate success
1126 * a0 holds boolean result
1129 .LOP_INSTANCE_OF_store:
1130 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
1131 SET_VREG(a0, rOBJ) # vA <- a0
1132 GET_INST_OPCODE(t0) # extract opcode from rINST
1133 GOTO_OPCODE(t0) # jump to next instruction
1136 /* ------------------------------ */
1138 .L_OP_ARRAY_LENGTH: /* 0x21 */
1139 /* File: mips/OP_ARRAY_LENGTH.S */
1141 * Return the length of an array.
1143 GET_OPB(a1) # a1 <- B
1144 GET_OPA4(a2) # a2 <- A+
1145 GET_VREG(a0, a1) # a0 <- vB (object ref)
1147 beqz a0, common_errNullObject # yup, fail
1148 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
1149 LOAD_base_offArrayObject_length(a3, a0) # a3 <- array length
1150 GET_INST_OPCODE(t0) # extract opcode from rINST
1151 SET_VREG_GOTO(a3, a2, t0) # vA <- length
1154 /* ------------------------------ */
1156 .L_OP_NEW_INSTANCE: /* 0x22 */
1157 /* File: mips/OP_NEW_INSTANCE.S */
1159 * Create a new instance of a class.
1161 # new-instance vAA, class /* BBBB */
1162 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
1163 FETCH(a1, 1) # a1 <- BBBB
1164 LOAD_base_offDvmDex_pResClasses(a3, a3) # a3 <- pDvmDex->pResClasses
1165 LOAD_eas2(a0, a3, a1) # a0 <- resolved class
1166 #if defined(WITH_JIT)
1167 EAS2(rBIX, a3, a1) # rBIX <- &resolved_class
1169 EXPORT_PC() # req'd for init, resolve, alloc
1171 beqz a0, .LOP_NEW_INSTANCE_resolve # no, resolve it now
1172 .LOP_NEW_INSTANCE_resolved: # a0=class
1173 lbu a1, offClassObject_status(a0) # a1 <- ClassStatus enum
1174 # has class been initialized?
1175 li t0, CLASS_INITIALIZED
1176 move rOBJ, a0 # save a0
1177 bne a1, t0, .LOP_NEW_INSTANCE_needinit # no, init class now
1179 .LOP_NEW_INSTANCE_initialized: # a0=class
1180 LOAD_base_offClassObject_accessFlags(a3, a0) # a3 <- clazz->accessFlags
1181 li a1, ALLOC_DONT_TRACK # flags for alloc call
1183 JAL(dvmAllocObject) # v0 <- new object
1184 GET_OPA(a3) # a3 <- AA
1185 #if defined(WITH_JIT)
1187 * The JIT needs the class to be fully resolved before it can
1188 * include this instruction in a trace.
1190 lhu a1, offThread_subMode(rSELF)
1191 beqz v0, common_exceptionThrown # yes, handle the exception
1192 and a1, kSubModeJitTraceBuild # under construction?
1193 bnez a1, .LOP_NEW_INSTANCE_jitCheck
1196 beqz v0, common_exceptionThrown # yes, handle the exception
1198 b .LOP_NEW_INSTANCE_continue
1201 /* ------------------------------ */
1203 .L_OP_NEW_ARRAY: /* 0x23 */
1204 /* File: mips/OP_NEW_ARRAY.S */
1206 * Allocate an array of objects, specified with the array class
1209 * The verifier guarantees that this is an array class, so we don't
1210 * check for it here.
1212 /* new-array vA, vB, class@CCCC */
1213 GET_OPB(a0) # a0 <- B
1214 FETCH(a2, 1) # a2 <- CCCC
1215 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
1216 GET_VREG(a1, a0) # a1 <- vB (array length)
1217 LOAD_base_offDvmDex_pResClasses(a3, a3) # a3 <- pDvmDex->pResClasses
1218 LOAD_eas2(a0, a3, a2) # a0 <- resolved class
1220 bltz a1, common_errNegativeArraySize # negative length, bail - len in a1
1221 EXPORT_PC() # req'd for resolve, alloc
1223 beqz a0, .LOP_NEW_ARRAY_resolve
1226 * Finish allocation.
1229 * a1 holds array length
1231 .LOP_NEW_ARRAY_finish:
1232 li a2, ALLOC_DONT_TRACK # don't track in local refs table
1233 JAL(dvmAllocArrayByClass) # v0 <- call(clazz, length, flags)
1234 GET_OPA4(a2) # a2 <- A+
1236 beqz v0, common_exceptionThrown # yes, handle the exception
1237 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
1238 GET_INST_OPCODE(t0) # extract opcode from rINST
1239 SET_VREG(v0, a2) # vA <- v0
1240 GOTO_OPCODE(t0) # jump to next instruction
1242 /* ------------------------------ */
1244 .L_OP_FILLED_NEW_ARRAY: /* 0x24 */
1245 /* File: mips/OP_FILLED_NEW_ARRAY.S */
1247 * Create a new array with elements filled from registers.
1249 * for: filled-new-array, filled-new-array/range
1251 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
1252 # op {vCCCC..v(CCCC+AA-1)}, type /* BBBB */
1253 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
1254 FETCH(a1, 1) # a1 <- BBBB
1255 LOAD_base_offDvmDex_pResClasses(a3, a3) # a3 <- pDvmDex->pResClasses
1256 EXPORT_PC() # need for resolve and alloc
1257 LOAD_eas2(a0, a3, a1) # a0 <- resolved class
1258 GET_OPA(rOBJ) # rOBJ <- AA or BA
1260 bnez a0, .LOP_FILLED_NEW_ARRAY_continue # yes, continue on
1261 LOAD_rSELF_method(a3) # a3 <- self->method
1262 li a2, 0 # a2 <- false
1263 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
1264 JAL(dvmResolveClass) # v0 <- call(clazz, ref)
1267 beqz v0, common_exceptionThrown # yes, handle exception
1268 b .LOP_FILLED_NEW_ARRAY_continue
1270 /* ------------------------------ */
1272 .L_OP_FILLED_NEW_ARRAY_RANGE: /* 0x25 */
1273 /* File: mips/OP_FILLED_NEW_ARRAY_RANGE.S */
1274 /* File: mips/OP_FILLED_NEW_ARRAY.S */
1276 * Create a new array with elements filled from registers.
1278 * for: filled-new-array, filled-new-array/range
1280 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
1281 # op {vCCCC..v(CCCC+AA-1)}, type /* BBBB */
1282 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
1283 FETCH(a1, 1) # a1 <- BBBB
1284 LOAD_base_offDvmDex_pResClasses(a3, a3) # a3 <- pDvmDex->pResClasses
1285 EXPORT_PC() # need for resolve and alloc
1286 LOAD_eas2(a0, a3, a1) # a0 <- resolved class
1287 GET_OPA(rOBJ) # rOBJ <- AA or BA
1289 bnez a0, .LOP_FILLED_NEW_ARRAY_RANGE_continue # yes, continue on
1290 LOAD_rSELF_method(a3) # a3 <- self->method
1291 li a2, 0 # a2 <- false
1292 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
1293 JAL(dvmResolveClass) # v0 <- call(clazz, ref)
1296 beqz v0, common_exceptionThrown # yes, handle exception
1297 b .LOP_FILLED_NEW_ARRAY_RANGE_continue
1300 /* ------------------------------ */
1302 .L_OP_FILL_ARRAY_DATA: /* 0x26 */
1303 /* File: mips/OP_FILL_ARRAY_DATA.S */
1304 /* fill-array-data vAA, +BBBBBBBB */
1305 FETCH(a0, 1) # a0 <- bbbb (lo)
1306 FETCH(a1, 2) # a1 <- BBBB (hi)
1307 GET_OPA(a3) # a3 <- AA
1308 sll a1, a1, 16 # a1 <- BBBBbbbb
1309 or a1, a0, a1 # a1 <- BBBBbbbb
1310 GET_VREG(a0, a3) # a0 <- vAA (array object)
1311 EAS1(a1, rPC, a1) # a1 <- PC + BBBBbbbb*2 (array data off.)
1313 JAL(dvmInterpHandleFillArrayData) # fill the array with predefined data
1314 # 0 means an exception is thrown
1315 beqz v0, common_exceptionThrown # has exception
1316 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
1317 GET_INST_OPCODE(t0) # extract opcode from rINST
1318 GOTO_OPCODE(t0) # jump to next instruction
1320 /* ------------------------------ */
1322 .L_OP_THROW: /* 0x27 */
1323 /* File: mips/OP_THROW.S */
1325 * Throw an exception object in the current thread.
1328 GET_OPA(a2) # a2 <- AA
1329 GET_VREG(a1, a2) # a1 <- vAA (exception object)
1330 EXPORT_PC() # exception handler can throw
1332 beqz a1, common_errNullObject # yes, throw an NPE instead
1333 # bypass dvmSetException, just store it
1334 STORE_offThread_exception(a1, rSELF) # thread->exception <- obj
1335 b common_exceptionThrown
1338 /* ------------------------------ */
1340 .L_OP_GOTO: /* 0x28 */
1341 /* File: mips/OP_GOTO.S */
1343 * Unconditional branch, 8-bit offset.
1345 * The branch distance is a signed code-unit offset, which we need to
1346 * double to get a byte offset.
1349 sll a0, rINST, 16 # a0 <- AAxx0000
1350 sra a1, a0, 24 # a1 <- ssssssAA (sign-extended)
1351 addu a2, a1, a1 # a2 <- byte offset
1352 /* If backwards branch refresh rBASE */
1354 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh handler base
1356 FETCH_ADVANCE_INST_RB(a2) # update rPC, load rINST
1357 #if defined(WITH_JIT)
1358 lw a0, offThread_pJitProfTable(rSELF)
1359 bltz a1, common_testUpdateProfile # (a0) check for trace hotness
1361 GET_INST_OPCODE(t0) # extract opcode from rINST
1362 GOTO_OPCODE(t0) # jump to next instruction
1364 /* ------------------------------ */
1366 .L_OP_GOTO_16: /* 0x29 */
1367 /* File: mips/OP_GOTO_16.S */
1369 * Unconditional branch, 16-bit offset.
1371 * The branch distance is a signed code-unit offset, which we need to
1372 * double to get a byte offset.
1375 FETCH_S(a0, 1) # a0 <- ssssAAAA (sign-extended)
1376 addu a1, a0, a0 # a1 <- byte offset, flags set
1377 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
1379 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh handler base
1381 #if defined(WITH_JIT)
1382 lw a0, offThread_pJitProfTable(rSELF)
1383 bltz a1, common_testUpdateProfile # (a0) hot trace head?
1385 GET_INST_OPCODE(t0) # extract opcode from rINST
1386 GOTO_OPCODE(t0) # jump to next instruction
1388 /* ------------------------------ */
1390 .L_OP_GOTO_32: /* 0x2a */
1391 /* File: mips/OP_GOTO_32.S */
1393 * Unconditional branch, 32-bit offset.
1395 * The branch distance is a signed code-unit offset, which we need to
1396 * double to get a byte offset.
1398 * Unlike most opcodes, this one is allowed to branch to itself, so
1399 * our "backward branch" test must be "<=0" instead of "<0".
1401 /* goto/32 +AAAAAAAA */
1402 FETCH(a0, 1) # a0 <- aaaa (lo)
1403 FETCH(a1, 2) # a1 <- AAAA (hi)
1405 or a0, a0, a1 # a0 <- AAAAaaaa
1406 addu a1, a0, a0 # a1 <- byte offset
1407 #if defined(WITH_JIT)
1408 lw a0, offThread_pJitProfTable(rSELF)
1410 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh handler base
1412 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
1413 blez a1, common_testUpdateProfile # (a0) hot trace head?
1415 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
1417 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh handler base
1420 GET_INST_OPCODE(t0) # extract opcode from rINST
1421 GOTO_OPCODE(t0) # jump to next instruction
1423 /* ------------------------------ */
1425 .L_OP_PACKED_SWITCH: /* 0x2b */
1426 /* File: mips/OP_PACKED_SWITCH.S */
1428 * Handle a packed-switch or sparse-switch instruction. In both cases
1429 * we decode it and hand it off to a helper function.
1431 * We don't really expect backward branches in a switch statement, but
1432 * they're perfectly legal, so we check for them here.
1434 * When the JIT is present, all targets are considered treated as
1435 * a potential trace heads regardless of branch direction.
1437 * for: packed-switch, sparse-switch
1440 FETCH(a0, 1) # a0 <- bbbb (lo)
1441 FETCH(a1, 2) # a1 <- BBBB (hi)
1442 GET_OPA(a3) # a3 <- AA
1444 or a0, a0, t0 # a0 <- BBBBbbbb
1445 GET_VREG(a1, a3) # a1 <- vAA
1446 EAS1(a0, rPC, a0) # a0 <- PC + BBBBbbbb*2
1447 JAL(dvmInterpHandlePackedSwitch) # a0 <- code-unit branch offset
1448 addu a1, v0, v0 # a1 <- byte offset
1450 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh handler base
1452 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
1453 #if defined(WITH_JIT)
1454 lw a0, offThread_pJitProfTable(rSELF)
1455 bnez a0, common_updateProfile
1457 GET_INST_OPCODE(t0) # extract opcode from rINST
1458 GOTO_OPCODE(t0) # jump to next instruction
1460 /* ------------------------------ */
1462 .L_OP_SPARSE_SWITCH: /* 0x2c */
1463 /* File: mips/OP_SPARSE_SWITCH.S */
1464 /* File: mips/OP_PACKED_SWITCH.S */
1466 * Handle a packed-switch or sparse-switch instruction. In both cases
1467 * we decode it and hand it off to a helper function.
1469 * We don't really expect backward branches in a switch statement, but
1470 * they're perfectly legal, so we check for them here.
1472 * When the JIT is present, all targets are considered treated as
1473 * a potential trace heads regardless of branch direction.
1475 * for: packed-switch, sparse-switch
1478 FETCH(a0, 1) # a0 <- bbbb (lo)
1479 FETCH(a1, 2) # a1 <- BBBB (hi)
1480 GET_OPA(a3) # a3 <- AA
1482 or a0, a0, t0 # a0 <- BBBBbbbb
1483 GET_VREG(a1, a3) # a1 <- vAA
1484 EAS1(a0, rPC, a0) # a0 <- PC + BBBBbbbb*2
1485 JAL(dvmInterpHandleSparseSwitch) # a0 <- code-unit branch offset
1486 addu a1, v0, v0 # a1 <- byte offset
1488 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh handler base
1490 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
1491 #if defined(WITH_JIT)
1492 lw a0, offThread_pJitProfTable(rSELF)
1493 bnez a0, common_updateProfile
1495 GET_INST_OPCODE(t0) # extract opcode from rINST
1496 GOTO_OPCODE(t0) # jump to next instruction
1499 /* ------------------------------ */
1501 .L_OP_CMPL_FLOAT: /* 0x2d */
1502 /* File: mips/OP_CMPL_FLOAT.S */
1504 * Compare two floating-point values. Puts 0, 1, or -1 into the
1505 * destination register based on the results of the comparison.
1507 * Provide a "naninst" instruction that puts 1 or -1 into a1 depending
1508 * on what value we'd like to return when one of the operands is NaN.
1510 * The operation we're implementing is:
1518 * return {-1,1}; // one or both operands was NaN
1520 * for: cmpl-float, cmpg-float
1522 /* op vAA, vBB, vCC */
1525 FETCH(a0, 1) # a0 <- CCBB
1526 and a2, a0, 255 # a2 <- BB
1529 GET_VREG(rOBJ, a2) # rOBJ <- vBB
1530 GET_VREG(rBIX, a3) # rBIX <- vCC
1531 move a0, rOBJ # a0 <- vBB
1532 move a1, rBIX # a1 <- vCC
1533 JAL(__eqsf2) # a0 <- (vBB == vCC)
1534 li rTEMP, 0 # set rTEMP to 0
1535 beqz v0, OP_CMPL_FLOAT_finish
1536 move a0, rOBJ # a0 <- vBB
1537 move a1, rBIX # a1 <- vCC
1538 JAL(__ltsf2) # a0 <- (vBB < vCC)
1540 bltz v0, OP_CMPL_FLOAT_finish
1541 move a0, rOBJ # a0 <- vBB
1542 move a1, rBIX # a1 <- vCC
1543 b OP_CMPL_FLOAT_continue
1547 c.olt.s fcc0, fs0, fs1 # Is fs0 < fs1
1549 bc1t fcc0, OP_CMPL_FLOAT_finish
1550 c.olt.s fcc0, fs1, fs0
1552 bc1t fcc0, OP_CMPL_FLOAT_finish
1553 c.eq.s fcc0, fs0, fs1
1555 bc1t fcc0, OP_CMPL_FLOAT_finish
1561 /* ------------------------------ */
1563 .L_OP_CMPG_FLOAT: /* 0x2e */
1564 /* File: mips/OP_CMPG_FLOAT.S */
1565 /* File: mips/OP_CMPL_FLOAT.S */
1567 * Compare two floating-point values. Puts 0, 1, or -1 into the
1568 * destination register based on the results of the comparison.
1570 * Provide a "naninst" instruction that puts 1 or -1 into a1 depending
1571 * on what value we'd like to return when one of the operands is NaN.
1573 * The operation we're implementing is:
1581 * return {-1,1}; // one or both operands was NaN
1583 * for: cmpl-float, cmpg-float
1585 /* op vAA, vBB, vCC */
1588 FETCH(a0, 1) # a0 <- CCBB
1589 and a2, a0, 255 # a2 <- BB
1592 GET_VREG(rOBJ, a2) # rOBJ <- vBB
1593 GET_VREG(rBIX, a3) # rBIX <- vCC
1594 move a0, rOBJ # a0 <- vBB
1595 move a1, rBIX # a1 <- vCC
1596 JAL(__eqsf2) # a0 <- (vBB == vCC)
1597 li rTEMP, 0 # set rTEMP to 0
1598 beqz v0, OP_CMPG_FLOAT_finish
1599 move a0, rOBJ # a0 <- vBB
1600 move a1, rBIX # a1 <- vCC
1601 JAL(__ltsf2) # a0 <- (vBB < vCC)
1603 bltz v0, OP_CMPG_FLOAT_finish
1604 move a0, rOBJ # a0 <- vBB
1605 move a1, rBIX # a1 <- vCC
1606 b OP_CMPG_FLOAT_continue
1610 c.olt.s fcc0, fs0, fs1 # Is fs0 < fs1
1612 bc1t fcc0, OP_CMPG_FLOAT_finish
1613 c.olt.s fcc0, fs1, fs0
1615 bc1t fcc0, OP_CMPG_FLOAT_finish
1616 c.eq.s fcc0, fs0, fs1
1618 bc1t fcc0, OP_CMPG_FLOAT_finish
1625 /* ------------------------------ */
1627 .L_OP_CMPL_DOUBLE: /* 0x2f */
1628 /* File: mips/OP_CMPL_DOUBLE.S */
1630 * Compare two floating-point values. Puts 0, 1, or -1 into the
1631 * destination register based on the results of the comparison.
1633 * Provide a "naninst" instruction that puts 1 or -1 into a1 depending
1634 * on what value we'd like to return when one of the operands is NaN.
1636 * See OP_CMPL_FLOAT for an explanation.
1638 * For: cmpl-double, cmpg-double
1640 /* op vAA, vBB, vCC */
1642 FETCH(a0, 1) # a0 <- CCBB
1643 and rOBJ, a0, 255 # s0 <- BB
1644 srl rBIX, a0, 8 # t0 <- CC
1645 EAS2(rOBJ, rFP, rOBJ) # s0 <- &fp[BB]
1646 EAS2(rBIX, rFP, rBIX) # t0 <- &fp[CC]
1648 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vBB/vBB+1
1649 LOAD64(rARG2, rARG3, rBIX) # a2/a3 <- vCC/vCC+1
1650 JAL(__eqdf2) # cmp <=: C clear if <, Z set if eq
1652 beqz v0, OP_CMPL_DOUBLE_finish
1654 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vBB/vBB+1
1655 LOAD64(rARG2, rARG3, rBIX) # a2/a3 <- vCC/vCC+1
1658 bltz v0, OP_CMPL_DOUBLE_finish
1659 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vBB/vBB+1
1660 b OP_CMPL_DOUBLE_continue
1662 LOAD64_F(fs0, fs0f, rOBJ)
1663 LOAD64_F(fs1, fs1f, rBIX)
1664 c.olt.d fcc0, fs0, fs1
1666 bc1t fcc0, OP_CMPL_DOUBLE_finish
1667 c.olt.d fcc0, fs1, fs0
1669 bc1t fcc0, OP_CMPL_DOUBLE_finish
1670 c.eq.d fcc0, fs0, fs1
1672 bc1t fcc0, OP_CMPL_DOUBLE_finish
1673 b OP_CMPL_DOUBLE_nan
1676 /* ------------------------------ */
1678 .L_OP_CMPG_DOUBLE: /* 0x30 */
1679 /* File: mips/OP_CMPG_DOUBLE.S */
1680 /* File: mips/OP_CMPL_DOUBLE.S */
1682 * Compare two floating-point values. Puts 0, 1, or -1 into the
1683 * destination register based on the results of the comparison.
1685 * Provide a "naninst" instruction that puts 1 or -1 into a1 depending
1686 * on what value we'd like to return when one of the operands is NaN.
1688 * See OP_CMPL_FLOAT for an explanation.
1690 * For: cmpl-double, cmpg-double
1692 /* op vAA, vBB, vCC */
1694 FETCH(a0, 1) # a0 <- CCBB
1695 and rOBJ, a0, 255 # s0 <- BB
1696 srl rBIX, a0, 8 # t0 <- CC
1697 EAS2(rOBJ, rFP, rOBJ) # s0 <- &fp[BB]
1698 EAS2(rBIX, rFP, rBIX) # t0 <- &fp[CC]
1700 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vBB/vBB+1
1701 LOAD64(rARG2, rARG3, rBIX) # a2/a3 <- vCC/vCC+1
1702 JAL(__eqdf2) # cmp <=: C clear if <, Z set if eq
1704 beqz v0, OP_CMPG_DOUBLE_finish
1706 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vBB/vBB+1
1707 LOAD64(rARG2, rARG3, rBIX) # a2/a3 <- vCC/vCC+1
1710 bltz v0, OP_CMPG_DOUBLE_finish
1711 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vBB/vBB+1
1712 b OP_CMPG_DOUBLE_continue
1714 LOAD64_F(fs0, fs0f, rOBJ)
1715 LOAD64_F(fs1, fs1f, rBIX)
1716 c.olt.d fcc0, fs0, fs1
1718 bc1t fcc0, OP_CMPG_DOUBLE_finish
1719 c.olt.d fcc0, fs1, fs0
1721 bc1t fcc0, OP_CMPG_DOUBLE_finish
1722 c.eq.d fcc0, fs0, fs1
1724 bc1t fcc0, OP_CMPG_DOUBLE_finish
1725 b OP_CMPG_DOUBLE_nan
1729 /* ------------------------------ */
1731 .L_OP_CMP_LONG: /* 0x31 */
1732 /* File: mips/OP_CMP_LONG.S */
1734 * Compare two 64-bit values
1739 * I think I can improve on the ARM code by the following observation
1740 * slt t0, x.hi, y.hi; # (x.hi < y.hi) ? 1:0
1741 * sgt t1, x.hi, y.hi; # (y.hi > x.hi) ? 1:0
1742 * subu v0, t0, t1 # v0= -1:1:0 for [ < > = ]
1744 /* cmp-long vAA, vBB, vCC */
1745 FETCH(a0, 1) # a0 <- CCBB
1746 GET_OPA(rOBJ) # rOBJ <- AA
1747 and a2, a0, 255 # a2 <- BB
1748 srl a3, a0, 8 # a3 <- CC
1749 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
1750 EAS2(a3, rFP, a3) # a3 <- &fp[CC]
1751 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
1752 LOAD64(a2, a3, a3) # a2/a3 <- vCC/vCC+1
1754 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
1755 slt t0, a1, a3 # compare hi
1757 subu v0, t1, t0 # v0 <- (-1, 1, 0)
1758 bnez v0, .LOP_CMP_LONG_finish
1759 # at this point x.hi==y.hi
1760 sltu t0, a0, a2 # compare lo
1762 subu v0, t1, t0 # v0 <- (-1, 1, 0) for [< > =]
1764 .LOP_CMP_LONG_finish:
1765 SET_VREG(v0, rOBJ) # vAA <- v0
1766 GET_INST_OPCODE(t0) # extract opcode from rINST
1767 GOTO_OPCODE(t0) # jump to next instruction
1770 /* ------------------------------ */
1772 .L_OP_IF_EQ: /* 0x32 */
1773 /* File: mips/OP_IF_EQ.S */
1774 /* File: mips/bincmp.S */
1776 * Generic two-operand compare-and-branch operation. Provide a "revcmp"
1777 * fragment that specifies the *reverse* comparison to perform, e.g.
1778 * for "if-le" you would use "gt".
1780 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
1782 /* if-cmp vA, vB, +CCCC */
1783 GET_OPA4(a0) # a0 <- A+
1784 GET_OPB(a1) # a1 <- B
1785 GET_VREG(a3, a1) # a3 <- vB
1786 GET_VREG(a2, a0) # a2 <- vA
1787 bne a2, a3, 1f # branch to 1 if comparison failed
1788 FETCH_S(a1, 1) # a1<- branch offset, in code units
1791 li a1, 2 # a1- BYTE branch dist for not-taken
1793 addu a2, a1, a1 # convert to bytes
1794 FETCH_ADVANCE_INST_RB(a2) # update rPC, load rINST
1795 #if defined(WITH_JIT)
1796 lw a0, offThread_pJitProfTable(rSELF)
1798 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1800 bnez a0, common_updateProfile
1803 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1806 GET_INST_OPCODE(t0) # extract opcode from rINST
1807 GOTO_OPCODE(t0) # jump to next instruction
1810 /* ------------------------------ */
1812 .L_OP_IF_NE: /* 0x33 */
1813 /* File: mips/OP_IF_NE.S */
1814 /* File: mips/bincmp.S */
1816 * Generic two-operand compare-and-branch operation. Provide a "revcmp"
1817 * fragment that specifies the *reverse* comparison to perform, e.g.
1818 * for "if-le" you would use "gt".
1820 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
1822 /* if-cmp vA, vB, +CCCC */
1823 GET_OPA4(a0) # a0 <- A+
1824 GET_OPB(a1) # a1 <- B
1825 GET_VREG(a3, a1) # a3 <- vB
1826 GET_VREG(a2, a0) # a2 <- vA
1827 beq a2, a3, 1f # branch to 1 if comparison failed
1828 FETCH_S(a1, 1) # a1<- branch offset, in code units
1831 li a1, 2 # a1- BYTE branch dist for not-taken
1833 addu a2, a1, a1 # convert to bytes
1834 FETCH_ADVANCE_INST_RB(a2) # update rPC, load rINST
1835 #if defined(WITH_JIT)
1836 lw a0, offThread_pJitProfTable(rSELF)
1838 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1840 bnez a0, common_updateProfile
1843 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1846 GET_INST_OPCODE(t0) # extract opcode from rINST
1847 GOTO_OPCODE(t0) # jump to next instruction
1850 /* ------------------------------ */
1852 .L_OP_IF_LT: /* 0x34 */
1853 /* File: mips/OP_IF_LT.S */
1854 /* File: mips/bincmp.S */
1856 * Generic two-operand compare-and-branch operation. Provide a "revcmp"
1857 * fragment that specifies the *reverse* comparison to perform, e.g.
1858 * for "if-le" you would use "gt".
1860 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
1862 /* if-cmp vA, vB, +CCCC */
1863 GET_OPA4(a0) # a0 <- A+
1864 GET_OPB(a1) # a1 <- B
1865 GET_VREG(a3, a1) # a3 <- vB
1866 GET_VREG(a2, a0) # a2 <- vA
1867 bge a2, a3, 1f # branch to 1 if comparison failed
1868 FETCH_S(a1, 1) # a1<- branch offset, in code units
1871 li a1, 2 # a1- BYTE branch dist for not-taken
1873 addu a2, a1, a1 # convert to bytes
1874 FETCH_ADVANCE_INST_RB(a2) # update rPC, load rINST
1875 #if defined(WITH_JIT)
1876 lw a0, offThread_pJitProfTable(rSELF)
1878 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1880 bnez a0, common_updateProfile
1883 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1886 GET_INST_OPCODE(t0) # extract opcode from rINST
1887 GOTO_OPCODE(t0) # jump to next instruction
1890 /* ------------------------------ */
1892 .L_OP_IF_GE: /* 0x35 */
1893 /* File: mips/OP_IF_GE.S */
1894 /* File: mips/bincmp.S */
1896 * Generic two-operand compare-and-branch operation. Provide a "revcmp"
1897 * fragment that specifies the *reverse* comparison to perform, e.g.
1898 * for "if-le" you would use "gt".
1900 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
1902 /* if-cmp vA, vB, +CCCC */
1903 GET_OPA4(a0) # a0 <- A+
1904 GET_OPB(a1) # a1 <- B
1905 GET_VREG(a3, a1) # a3 <- vB
1906 GET_VREG(a2, a0) # a2 <- vA
1907 blt a2, a3, 1f # branch to 1 if comparison failed
1908 FETCH_S(a1, 1) # a1<- branch offset, in code units
1911 li a1, 2 # a1- BYTE branch dist for not-taken
1913 addu a2, a1, a1 # convert to bytes
1914 FETCH_ADVANCE_INST_RB(a2) # update rPC, load rINST
1915 #if defined(WITH_JIT)
1916 lw a0, offThread_pJitProfTable(rSELF)
1918 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1920 bnez a0, common_updateProfile
1923 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1926 GET_INST_OPCODE(t0) # extract opcode from rINST
1927 GOTO_OPCODE(t0) # jump to next instruction
1930 /* ------------------------------ */
1932 .L_OP_IF_GT: /* 0x36 */
1933 /* File: mips/OP_IF_GT.S */
1934 /* File: mips/bincmp.S */
1936 * Generic two-operand compare-and-branch operation. Provide a "revcmp"
1937 * fragment that specifies the *reverse* comparison to perform, e.g.
1938 * for "if-le" you would use "gt".
1940 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
1942 /* if-cmp vA, vB, +CCCC */
1943 GET_OPA4(a0) # a0 <- A+
1944 GET_OPB(a1) # a1 <- B
1945 GET_VREG(a3, a1) # a3 <- vB
1946 GET_VREG(a2, a0) # a2 <- vA
1947 ble a2, a3, 1f # branch to 1 if comparison failed
1948 FETCH_S(a1, 1) # a1<- branch offset, in code units
1951 li a1, 2 # a1- BYTE branch dist for not-taken
1953 addu a2, a1, a1 # convert to bytes
1954 FETCH_ADVANCE_INST_RB(a2) # update rPC, load rINST
1955 #if defined(WITH_JIT)
1956 lw a0, offThread_pJitProfTable(rSELF)
1958 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1960 bnez a0, common_updateProfile
1963 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
1966 GET_INST_OPCODE(t0) # extract opcode from rINST
1967 GOTO_OPCODE(t0) # jump to next instruction
1970 /* ------------------------------ */
1972 .L_OP_IF_LE: /* 0x37 */
1973 /* File: mips/OP_IF_LE.S */
1974 /* File: mips/bincmp.S */
1976 * Generic two-operand compare-and-branch operation. Provide a "revcmp"
1977 * fragment that specifies the *reverse* comparison to perform, e.g.
1978 * for "if-le" you would use "gt".
1980 * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
1982 /* if-cmp vA, vB, +CCCC */
1983 GET_OPA4(a0) # a0 <- A+
1984 GET_OPB(a1) # a1 <- B
1985 GET_VREG(a3, a1) # a3 <- vB
1986 GET_VREG(a2, a0) # a2 <- vA
1987 bgt a2, a3, 1f # branch to 1 if comparison failed
1988 FETCH_S(a1, 1) # a1<- branch offset, in code units
1991 li a1, 2 # a1- BYTE branch dist for not-taken
1993 addu a2, a1, a1 # convert to bytes
1994 FETCH_ADVANCE_INST_RB(a2) # update rPC, load rINST
1995 #if defined(WITH_JIT)
1996 lw a0, offThread_pJitProfTable(rSELF)
1998 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
2000 bnez a0, common_updateProfile
2003 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
2006 GET_INST_OPCODE(t0) # extract opcode from rINST
2007 GOTO_OPCODE(t0) # jump to next instruction
2010 /* ------------------------------ */
2012 .L_OP_IF_EQZ: /* 0x38 */
2013 /* File: mips/OP_IF_EQZ.S */
2014 /* File: mips/zcmp.S */
2016 * Generic one-operand compare-and-branch operation. Provide a "revcmp"
2017 * fragment that specifies the *reverse* comparison to perform, e.g.
2018 * for "if-le" you would use "gt".
2020 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
2022 /* if-cmp vAA, +BBBB */
2023 GET_OPA(a0) # a0 <- AA
2024 GET_VREG(a2, a0) # a2 <- vAA
2025 FETCH_S(a1, 1) # a1 <- branch offset, in code units
2026 bne a2, zero, 1f # branch to 1 if comparison failed
2029 li a1, 2 # a1- BYTE branch dist for not-taken
2031 addu a1, a1, a1 # convert to bytes
2032 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
2033 #if defined(WITH_JIT)
2034 lw a0, offThread_pJitProfTable(rSELF)
2036 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh table base
2038 bnez a0, common_updateProfile # test for JIT off at target
2041 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rtable base
2044 GET_INST_OPCODE(t0) # extract opcode from rINST
2045 GOTO_OPCODE(t0) # jump to next instruction
2048 /* ------------------------------ */
2050 .L_OP_IF_NEZ: /* 0x39 */
2051 /* File: mips/OP_IF_NEZ.S */
2052 /* File: mips/zcmp.S */
2054 * Generic one-operand compare-and-branch operation. Provide a "revcmp"
2055 * fragment that specifies the *reverse* comparison to perform, e.g.
2056 * for "if-le" you would use "gt".
2058 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
2060 /* if-cmp vAA, +BBBB */
2061 GET_OPA(a0) # a0 <- AA
2062 GET_VREG(a2, a0) # a2 <- vAA
2063 FETCH_S(a1, 1) # a1 <- branch offset, in code units
2064 beq a2, zero, 1f # branch to 1 if comparison failed
2067 li a1, 2 # a1- BYTE branch dist for not-taken
2069 addu a1, a1, a1 # convert to bytes
2070 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
2071 #if defined(WITH_JIT)
2072 lw a0, offThread_pJitProfTable(rSELF)
2074 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh table base
2076 bnez a0, common_updateProfile # test for JIT off at target
2079 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rtable base
2082 GET_INST_OPCODE(t0) # extract opcode from rINST
2083 GOTO_OPCODE(t0) # jump to next instruction
2086 /* ------------------------------ */
2088 .L_OP_IF_LTZ: /* 0x3a */
2089 /* File: mips/OP_IF_LTZ.S */
2090 /* File: mips/zcmp.S */
2092 * Generic one-operand compare-and-branch operation. Provide a "revcmp"
2093 * fragment that specifies the *reverse* comparison to perform, e.g.
2094 * for "if-le" you would use "gt".
2096 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
2098 /* if-cmp vAA, +BBBB */
2099 GET_OPA(a0) # a0 <- AA
2100 GET_VREG(a2, a0) # a2 <- vAA
2101 FETCH_S(a1, 1) # a1 <- branch offset, in code units
2102 bge a2, zero, 1f # branch to 1 if comparison failed
2105 li a1, 2 # a1- BYTE branch dist for not-taken
2107 addu a1, a1, a1 # convert to bytes
2108 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
2109 #if defined(WITH_JIT)
2110 lw a0, offThread_pJitProfTable(rSELF)
2112 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh table base
2114 bnez a0, common_updateProfile # test for JIT off at target
2117 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rtable base
2120 GET_INST_OPCODE(t0) # extract opcode from rINST
2121 GOTO_OPCODE(t0) # jump to next instruction
2124 /* ------------------------------ */
2126 .L_OP_IF_GEZ: /* 0x3b */
2127 /* File: mips/OP_IF_GEZ.S */
2128 /* File: mips/zcmp.S */
2130 * Generic one-operand compare-and-branch operation. Provide a "revcmp"
2131 * fragment that specifies the *reverse* comparison to perform, e.g.
2132 * for "if-le" you would use "gt".
2134 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
2136 /* if-cmp vAA, +BBBB */
2137 GET_OPA(a0) # a0 <- AA
2138 GET_VREG(a2, a0) # a2 <- vAA
2139 FETCH_S(a1, 1) # a1 <- branch offset, in code units
2140 blt a2, zero, 1f # branch to 1 if comparison failed
2143 li a1, 2 # a1- BYTE branch dist for not-taken
2145 addu a1, a1, a1 # convert to bytes
2146 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
2147 #if defined(WITH_JIT)
2148 lw a0, offThread_pJitProfTable(rSELF)
2150 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh table base
2152 bnez a0, common_updateProfile # test for JIT off at target
2155 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rtable base
2158 GET_INST_OPCODE(t0) # extract opcode from rINST
2159 GOTO_OPCODE(t0) # jump to next instruction
2162 /* ------------------------------ */
2164 .L_OP_IF_GTZ: /* 0x3c */
2165 /* File: mips/OP_IF_GTZ.S */
2166 /* File: mips/zcmp.S */
2168 * Generic one-operand compare-and-branch operation. Provide a "revcmp"
2169 * fragment that specifies the *reverse* comparison to perform, e.g.
2170 * for "if-le" you would use "gt".
2172 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
2174 /* if-cmp vAA, +BBBB */
2175 GET_OPA(a0) # a0 <- AA
2176 GET_VREG(a2, a0) # a2 <- vAA
2177 FETCH_S(a1, 1) # a1 <- branch offset, in code units
2178 ble a2, zero, 1f # branch to 1 if comparison failed
2181 li a1, 2 # a1- BYTE branch dist for not-taken
2183 addu a1, a1, a1 # convert to bytes
2184 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
2185 #if defined(WITH_JIT)
2186 lw a0, offThread_pJitProfTable(rSELF)
2188 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh table base
2190 bnez a0, common_updateProfile # test for JIT off at target
2193 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rtable base
2196 GET_INST_OPCODE(t0) # extract opcode from rINST
2197 GOTO_OPCODE(t0) # jump to next instruction
2200 /* ------------------------------ */
2202 .L_OP_IF_LEZ: /* 0x3d */
2203 /* File: mips/OP_IF_LEZ.S */
2204 /* File: mips/zcmp.S */
2206 * Generic one-operand compare-and-branch operation. Provide a "revcmp"
2207 * fragment that specifies the *reverse* comparison to perform, e.g.
2208 * for "if-le" you would use "gt".
2210 * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
2212 /* if-cmp vAA, +BBBB */
2213 GET_OPA(a0) # a0 <- AA
2214 GET_VREG(a2, a0) # a2 <- vAA
2215 FETCH_S(a1, 1) # a1 <- branch offset, in code units
2216 bgt a2, zero, 1f # branch to 1 if comparison failed
2219 li a1, 2 # a1- BYTE branch dist for not-taken
2221 addu a1, a1, a1 # convert to bytes
2222 FETCH_ADVANCE_INST_RB(a1) # update rPC, load rINST
2223 #if defined(WITH_JIT)
2224 lw a0, offThread_pJitProfTable(rSELF)
2226 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh table base
2228 bnez a0, common_updateProfile # test for JIT off at target
2231 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rtable base
2234 GET_INST_OPCODE(t0) # extract opcode from rINST
2235 GOTO_OPCODE(t0) # jump to next instruction
2238 /* ------------------------------ */
2240 .L_OP_UNUSED_3E: /* 0x3e */
2241 /* File: mips/OP_UNUSED_3E.S */
2242 /* File: mips/unused.S */
2247 /* ------------------------------ */
2249 .L_OP_UNUSED_3F: /* 0x3f */
2250 /* File: mips/OP_UNUSED_3F.S */
2251 /* File: mips/unused.S */
2256 /* ------------------------------ */
2258 .L_OP_UNUSED_40: /* 0x40 */
2259 /* File: mips/OP_UNUSED_40.S */
2260 /* File: mips/unused.S */
2265 /* ------------------------------ */
2267 .L_OP_UNUSED_41: /* 0x41 */
2268 /* File: mips/OP_UNUSED_41.S */
2269 /* File: mips/unused.S */
2274 /* ------------------------------ */
2276 .L_OP_UNUSED_42: /* 0x42 */
2277 /* File: mips/OP_UNUSED_42.S */
2278 /* File: mips/unused.S */
2283 /* ------------------------------ */
2285 .L_OP_UNUSED_43: /* 0x43 */
2286 /* File: mips/OP_UNUSED_43.S */
2287 /* File: mips/unused.S */
2292 /* ------------------------------ */
2294 .L_OP_AGET: /* 0x44 */
2295 /* File: mips/OP_AGET.S */
2297 * Array get, 32 bits or less. vAA <- vBB[vCC].
2299 * Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
2300 * instructions. We use a pair of FETCH_Bs instead.
2302 * for: aget, aget-object, aget-boolean, aget-byte, aget-char, aget-short
2304 /* op vAA, vBB, vCC */
2305 FETCH_B(a2, 1) # a2 <- BB
2306 GET_OPA(rOBJ) # rOBJ <- AA
2307 FETCH_C(a3, 1) # a3 <- CC
2308 GET_VREG(a0, a2) # a0 <- vBB (array object)
2309 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2310 # null array object?
2311 beqz a0, common_errNullObject # yes, bail
2312 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2314 EASN(a0, a0, a1, 2) # a0 <- arrayObj + index*width
2318 # a1 >= a3; compare unsigned index
2319 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2320 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2321 lw a2, offArrayObject_contents(a0) # a2 <- vBB[vCC]
2322 GET_INST_OPCODE(t0) # extract opcode from rINST
2323 SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
2326 /* ------------------------------ */
2328 .L_OP_AGET_WIDE: /* 0x45 */
2329 /* File: mips/OP_AGET_WIDE.S */
2331 * Array get, 64 bits. vAA <- vBB[vCC].
2333 * Arrays of long/double are 64-bit aligned.
2335 /* aget-wide vAA, vBB, vCC */
2336 FETCH(a0, 1) # a0 <- CCBB
2337 GET_OPA(rOBJ) # rOBJ <- AA
2338 and a2, a0, 255 # a2 <- BB
2339 srl a3, a0, 8 # a3 <- CC
2340 GET_VREG(a0, a2) # a0 <- vBB (array object)
2341 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2342 # null array object?
2343 beqz a0, common_errNullObject # yes, bail
2344 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2345 EAS3(a0, a0, a1) # a0 <- arrayObj + index*width
2346 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2348 .LOP_AGET_WIDE_finish:
2349 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2350 LOAD64_off(a2, a3, a0, offArrayObject_contents)
2351 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
2352 GET_INST_OPCODE(t0) # extract opcode from rINST
2353 STORE64(a2, a3, rOBJ) # vAA/vAA+1 <- a2/a3
2354 GOTO_OPCODE(t0) # jump to next instruction
2357 /* ------------------------------ */
2359 .L_OP_AGET_OBJECT: /* 0x46 */
2360 /* File: mips/OP_AGET_OBJECT.S */
2361 /* File: mips/OP_AGET.S */
2363 * Array get, 32 bits or less. vAA <- vBB[vCC].
2365 * Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
2366 * instructions. We use a pair of FETCH_Bs instead.
2368 * for: aget, aget-object, aget-boolean, aget-byte, aget-char, aget-short
2370 /* op vAA, vBB, vCC */
2371 FETCH_B(a2, 1) # a2 <- BB
2372 GET_OPA(rOBJ) # rOBJ <- AA
2373 FETCH_C(a3, 1) # a3 <- CC
2374 GET_VREG(a0, a2) # a0 <- vBB (array object)
2375 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2376 # null array object?
2377 beqz a0, common_errNullObject # yes, bail
2378 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2380 EASN(a0, a0, a1, 2) # a0 <- arrayObj + index*width
2384 # a1 >= a3; compare unsigned index
2385 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2386 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2387 lw a2, offArrayObject_contents(a0) # a2 <- vBB[vCC]
2388 GET_INST_OPCODE(t0) # extract opcode from rINST
2389 SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
2393 /* ------------------------------ */
2395 .L_OP_AGET_BOOLEAN: /* 0x47 */
2396 /* File: mips/OP_AGET_BOOLEAN.S */
2397 /* File: mips/OP_AGET.S */
2399 * Array get, 32 bits or less. vAA <- vBB[vCC].
2401 * Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
2402 * instructions. We use a pair of FETCH_Bs instead.
2404 * for: aget, aget-object, aget-boolean, aget-byte, aget-char, aget-short
2406 /* op vAA, vBB, vCC */
2407 FETCH_B(a2, 1) # a2 <- BB
2408 GET_OPA(rOBJ) # rOBJ <- AA
2409 FETCH_C(a3, 1) # a3 <- CC
2410 GET_VREG(a0, a2) # a0 <- vBB (array object)
2411 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2412 # null array object?
2413 beqz a0, common_errNullObject # yes, bail
2414 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2416 EASN(a0, a0, a1, 0) # a0 <- arrayObj + index*width
2420 # a1 >= a3; compare unsigned index
2421 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2422 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2423 lbu a2, offArrayObject_contents(a0) # a2 <- vBB[vCC]
2424 GET_INST_OPCODE(t0) # extract opcode from rINST
2425 SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
2429 /* ------------------------------ */
2431 .L_OP_AGET_BYTE: /* 0x48 */
2432 /* File: mips/OP_AGET_BYTE.S */
2433 /* File: mips/OP_AGET.S */
2435 * Array get, 32 bits or less. vAA <- vBB[vCC].
2437 * Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
2438 * instructions. We use a pair of FETCH_Bs instead.
2440 * for: aget, aget-object, aget-boolean, aget-byte, aget-char, aget-short
2442 /* op vAA, vBB, vCC */
2443 FETCH_B(a2, 1) # a2 <- BB
2444 GET_OPA(rOBJ) # rOBJ <- AA
2445 FETCH_C(a3, 1) # a3 <- CC
2446 GET_VREG(a0, a2) # a0 <- vBB (array object)
2447 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2448 # null array object?
2449 beqz a0, common_errNullObject # yes, bail
2450 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2452 EASN(a0, a0, a1, 0) # a0 <- arrayObj + index*width
2456 # a1 >= a3; compare unsigned index
2457 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2458 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2459 lb a2, offArrayObject_contents(a0) # a2 <- vBB[vCC]
2460 GET_INST_OPCODE(t0) # extract opcode from rINST
2461 SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
2465 /* ------------------------------ */
2467 .L_OP_AGET_CHAR: /* 0x49 */
2468 /* File: mips/OP_AGET_CHAR.S */
2469 /* File: mips/OP_AGET.S */
2471 * Array get, 32 bits or less. vAA <- vBB[vCC].
2473 * Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
2474 * instructions. We use a pair of FETCH_Bs instead.
2476 * for: aget, aget-object, aget-boolean, aget-byte, aget-char, aget-short
2478 /* op vAA, vBB, vCC */
2479 FETCH_B(a2, 1) # a2 <- BB
2480 GET_OPA(rOBJ) # rOBJ <- AA
2481 FETCH_C(a3, 1) # a3 <- CC
2482 GET_VREG(a0, a2) # a0 <- vBB (array object)
2483 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2484 # null array object?
2485 beqz a0, common_errNullObject # yes, bail
2486 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2488 EASN(a0, a0, a1, 1) # a0 <- arrayObj + index*width
2492 # a1 >= a3; compare unsigned index
2493 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2494 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2495 lhu a2, offArrayObject_contents(a0) # a2 <- vBB[vCC]
2496 GET_INST_OPCODE(t0) # extract opcode from rINST
2497 SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
2501 /* ------------------------------ */
2503 .L_OP_AGET_SHORT: /* 0x4a */
2504 /* File: mips/OP_AGET_SHORT.S */
2505 /* File: mips/OP_AGET.S */
2507 * Array get, 32 bits or less. vAA <- vBB[vCC].
2509 * Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
2510 * instructions. We use a pair of FETCH_Bs instead.
2512 * for: aget, aget-object, aget-boolean, aget-byte, aget-char, aget-short
2514 /* op vAA, vBB, vCC */
2515 FETCH_B(a2, 1) # a2 <- BB
2516 GET_OPA(rOBJ) # rOBJ <- AA
2517 FETCH_C(a3, 1) # a3 <- CC
2518 GET_VREG(a0, a2) # a0 <- vBB (array object)
2519 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2520 # null array object?
2521 beqz a0, common_errNullObject # yes, bail
2522 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2524 EASN(a0, a0, a1, 1) # a0 <- arrayObj + index*width
2528 # a1 >= a3; compare unsigned index
2529 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2530 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2531 lh a2, offArrayObject_contents(a0) # a2 <- vBB[vCC]
2532 GET_INST_OPCODE(t0) # extract opcode from rINST
2533 SET_VREG_GOTO(a2, rOBJ, t0) # vAA <- a2
2537 /* ------------------------------ */
2539 .L_OP_APUT: /* 0x4b */
2540 /* File: mips/OP_APUT.S */
2542 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2543 * for: aput, aput-boolean, aput-byte, aput-char, aput-short
2545 /* op vAA, vBB, vCC */
2546 FETCH_B(a2, 1) # a2 <- BB
2547 GET_OPA(rOBJ) # rOBJ <- AA
2548 FETCH_C(a3, 1) # a3 <- CC
2549 GET_VREG(a0, a2) # a0 <- vBB (array object)
2550 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2551 # null array object?
2552 beqz a0, common_errNullObject # yes, bail
2553 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2555 EASN(a0, a0, a1, 2) # a0 <- arrayObj + index*width
2559 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2560 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2561 GET_VREG(a2, rOBJ) # a2 <- vAA
2562 GET_INST_OPCODE(t0) # extract opcode from rINST
2563 sw a2, offArrayObject_contents(a0) # vBB[vCC] <- a2
2564 GOTO_OPCODE(t0) # jump to next instruction
2567 /* ------------------------------ */
2569 .L_OP_APUT_WIDE: /* 0x4c */
2570 /* File: mips/OP_APUT_WIDE.S */
2572 * Array put, 64 bits. vBB[vCC] <- vAA.
2574 * Arrays of long/double are 64-bit aligned, so it's okay to use STRD.
2576 /* aput-wide vAA, vBB, vCC */
2577 FETCH(a0, 1) # a0 <- CCBB
2578 GET_OPA(t0) # t0 <- AA
2579 and a2, a0, 255 # a2 <- BB
2580 srl a3, a0, 8 # a3 <- CC
2581 GET_VREG(a0, a2) # a0 <- vBB (array object)
2582 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2583 # null array object?
2584 beqz a0, common_errNullObject # yes, bail
2585 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2586 EAS3(a0, a0, a1) # a0 <- arrayObj + index*width
2587 EAS2(rOBJ, rFP, t0) # rOBJ <- &fp[AA]
2588 # compare unsigned index, length
2589 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2591 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2592 LOAD64(a2, a3, rOBJ) # a2/a3 <- vAA/vAA+1
2593 GET_INST_OPCODE(t0) # extract opcode from rINST
2594 STORE64_off(a2, a3, a0, offArrayObject_contents) # a2/a3 <- vBB[vCC]
2595 GOTO_OPCODE(t0) # jump to next instruction
2598 /* ------------------------------ */
2600 .L_OP_APUT_OBJECT: /* 0x4d */
2601 /* File: mips/OP_APUT_OBJECT.S */
2603 * Store an object into an array. vBB[vCC] <- vAA.
2606 /* op vAA, vBB, vCC */
2607 FETCH(a0, 1) # a0 <- CCBB
2608 GET_OPA(t1) # t1 <- AA
2609 and a2, a0, 255 # a2 <- BB
2610 srl a3, a0, 8 # a3 <- CC
2611 GET_VREG(rINST, a2) # rINST <- vBB (array object)
2612 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2613 GET_VREG(rBIX, t1) # rBIX <- vAA
2614 # null array object?
2615 beqz rINST, common_errNullObject # yes, bail
2617 LOAD_base_offArrayObject_length(a3, rINST) # a3 <- arrayObj->length
2618 EAS2(rOBJ, rINST, a1) # rOBJ <- arrayObj + index*width
2619 # compare unsigned index, length
2620 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2623 * rINST = vBB (arrayObj)
2625 * rOBJ = offset into array (vBB + vCC * width)
2627 bnez rBIX, .LOP_APUT_OBJECT_checks # yes, skip type checks
2628 .LOP_APUT_OBJECT_finish:
2629 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2630 GET_INST_OPCODE(t0) # extract opcode from rINST
2631 sw rBIX, offArrayObject_contents(rOBJ) # vBB[vCC] <- vAA
2632 GOTO_OPCODE(t0) # jump to next instruction
2635 /* ------------------------------ */
2637 .L_OP_APUT_BOOLEAN: /* 0x4e */
2638 /* File: mips/OP_APUT_BOOLEAN.S */
2639 /* File: mips/OP_APUT.S */
2641 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2642 * for: aput, aput-boolean, aput-byte, aput-char, aput-short
2644 /* op vAA, vBB, vCC */
2645 FETCH_B(a2, 1) # a2 <- BB
2646 GET_OPA(rOBJ) # rOBJ <- AA
2647 FETCH_C(a3, 1) # a3 <- CC
2648 GET_VREG(a0, a2) # a0 <- vBB (array object)
2649 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2650 # null array object?
2651 beqz a0, common_errNullObject # yes, bail
2652 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2654 EASN(a0, a0, a1, 0) # a0 <- arrayObj + index*width
2658 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2659 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2660 GET_VREG(a2, rOBJ) # a2 <- vAA
2661 GET_INST_OPCODE(t0) # extract opcode from rINST
2662 sb a2, offArrayObject_contents(a0) # vBB[vCC] <- a2
2663 GOTO_OPCODE(t0) # jump to next instruction
2667 /* ------------------------------ */
2669 .L_OP_APUT_BYTE: /* 0x4f */
2670 /* File: mips/OP_APUT_BYTE.S */
2671 /* File: mips/OP_APUT.S */
2673 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2674 * for: aput, aput-boolean, aput-byte, aput-char, aput-short
2676 /* op vAA, vBB, vCC */
2677 FETCH_B(a2, 1) # a2 <- BB
2678 GET_OPA(rOBJ) # rOBJ <- AA
2679 FETCH_C(a3, 1) # a3 <- CC
2680 GET_VREG(a0, a2) # a0 <- vBB (array object)
2681 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2682 # null array object?
2683 beqz a0, common_errNullObject # yes, bail
2684 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2686 EASN(a0, a0, a1, 0) # a0 <- arrayObj + index*width
2690 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2691 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2692 GET_VREG(a2, rOBJ) # a2 <- vAA
2693 GET_INST_OPCODE(t0) # extract opcode from rINST
2694 sb a2, offArrayObject_contents(a0) # vBB[vCC] <- a2
2695 GOTO_OPCODE(t0) # jump to next instruction
2699 /* ------------------------------ */
2701 .L_OP_APUT_CHAR: /* 0x50 */
2702 /* File: mips/OP_APUT_CHAR.S */
2703 /* File: mips/OP_APUT.S */
2705 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2706 * for: aput, aput-boolean, aput-byte, aput-char, aput-short
2708 /* op vAA, vBB, vCC */
2709 FETCH_B(a2, 1) # a2 <- BB
2710 GET_OPA(rOBJ) # rOBJ <- AA
2711 FETCH_C(a3, 1) # a3 <- CC
2712 GET_VREG(a0, a2) # a0 <- vBB (array object)
2713 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2714 # null array object?
2715 beqz a0, common_errNullObject # yes, bail
2716 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2718 EASN(a0, a0, a1, 1) # a0 <- arrayObj + index*width
2722 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2723 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2724 GET_VREG(a2, rOBJ) # a2 <- vAA
2725 GET_INST_OPCODE(t0) # extract opcode from rINST
2726 sh a2, offArrayObject_contents(a0) # vBB[vCC] <- a2
2727 GOTO_OPCODE(t0) # jump to next instruction
2731 /* ------------------------------ */
2733 .L_OP_APUT_SHORT: /* 0x51 */
2734 /* File: mips/OP_APUT_SHORT.S */
2735 /* File: mips/OP_APUT.S */
2737 * Array put, 32 bits or less. vBB[vCC] <- vAA.
2738 * for: aput, aput-boolean, aput-byte, aput-char, aput-short
2740 /* op vAA, vBB, vCC */
2741 FETCH_B(a2, 1) # a2 <- BB
2742 GET_OPA(rOBJ) # rOBJ <- AA
2743 FETCH_C(a3, 1) # a3 <- CC
2744 GET_VREG(a0, a2) # a0 <- vBB (array object)
2745 GET_VREG(a1, a3) # a1 <- vCC (requested index)
2746 # null array object?
2747 beqz a0, common_errNullObject # yes, bail
2748 LOAD_base_offArrayObject_length(a3, a0) # a3 <- arrayObj->length
2750 EASN(a0, a0, a1, 1) # a0 <- arrayObj + index*width
2754 bgeu a1, a3, common_errArrayIndex # index >= length, bail
2755 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
2756 GET_VREG(a2, rOBJ) # a2 <- vAA
2757 GET_INST_OPCODE(t0) # extract opcode from rINST
2758 sh a2, offArrayObject_contents(a0) # vBB[vCC] <- a2
2759 GOTO_OPCODE(t0) # jump to next instruction
2763 /* ------------------------------ */
2765 .L_OP_IGET: /* 0x52 */
2766 /* File: mips/OP_IGET.S */
2768 * General 32-bit instance field get.
2770 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
2772 # op vA, vB, field /* CCCC */
2773 GET_OPB(a0) # a0 <- B
2774 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2775 FETCH(a1, 1) # a1 <- field ref CCCC
2776 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
2777 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2778 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2779 # is resolved entry null?
2780 bnez a0, .LOP_IGET_finish # no, already resolved
2781 LOAD_rSELF_method(a2) # a2 <- current method
2782 EXPORT_PC() # resolve() could throw
2783 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2784 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2787 bnez v0, .LOP_IGET_finish
2788 b common_exceptionThrown
2790 /* ------------------------------ */
2792 .L_OP_IGET_WIDE: /* 0x53 */
2793 /* File: mips/OP_IGET_WIDE.S */
2795 * Wide 32-bit instance field get.
2797 # iget-wide vA, vB, field /* CCCC */
2798 GET_OPB(a0) # a0 <- B
2799 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2800 FETCH(a1, 1) # a1 <- field ref CCCC
2801 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
2802 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2803 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2804 # is resolved entry null?
2805 bnez a0, .LOP_IGET_WIDE_finish # no, already resolved
2806 LOAD_rSELF_method(a2) # a2 <- current method
2807 EXPORT_PC() # resolve() could throw
2808 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2809 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2812 bnez v0, .LOP_IGET_WIDE_finish
2813 b common_exceptionThrown
2815 /* ------------------------------ */
2817 .L_OP_IGET_OBJECT: /* 0x54 */
2818 /* File: mips/OP_IGET_OBJECT.S */
2819 /* File: mips/OP_IGET.S */
2821 * General 32-bit instance field get.
2823 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
2825 # op vA, vB, field /* CCCC */
2826 GET_OPB(a0) # a0 <- B
2827 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2828 FETCH(a1, 1) # a1 <- field ref CCCC
2829 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
2830 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2831 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2832 # is resolved entry null?
2833 bnez a0, .LOP_IGET_OBJECT_finish # no, already resolved
2834 LOAD_rSELF_method(a2) # a2 <- current method
2835 EXPORT_PC() # resolve() could throw
2836 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2837 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2840 bnez v0, .LOP_IGET_OBJECT_finish
2841 b common_exceptionThrown
2844 /* ------------------------------ */
2846 .L_OP_IGET_BOOLEAN: /* 0x55 */
2847 /* File: mips/OP_IGET_BOOLEAN.S */
2848 /* File: mips/OP_IGET.S */
2850 * General 32-bit instance field get.
2852 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
2854 # op vA, vB, field /* CCCC */
2855 GET_OPB(a0) # a0 <- B
2856 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2857 FETCH(a1, 1) # a1 <- field ref CCCC
2858 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
2859 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2860 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2861 # is resolved entry null?
2862 bnez a0, .LOP_IGET_BOOLEAN_finish # no, already resolved
2863 LOAD_rSELF_method(a2) # a2 <- current method
2864 EXPORT_PC() # resolve() could throw
2865 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2866 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2869 bnez v0, .LOP_IGET_BOOLEAN_finish
2870 b common_exceptionThrown
2873 /* ------------------------------ */
2875 .L_OP_IGET_BYTE: /* 0x56 */
2876 /* File: mips/OP_IGET_BYTE.S */
2877 /* File: mips/OP_IGET.S */
2879 * General 32-bit instance field get.
2881 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
2883 # op vA, vB, field /* CCCC */
2884 GET_OPB(a0) # a0 <- B
2885 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2886 FETCH(a1, 1) # a1 <- field ref CCCC
2887 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
2888 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2889 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2890 # is resolved entry null?
2891 bnez a0, .LOP_IGET_BYTE_finish # no, already resolved
2892 LOAD_rSELF_method(a2) # a2 <- current method
2893 EXPORT_PC() # resolve() could throw
2894 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2895 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2898 bnez v0, .LOP_IGET_BYTE_finish
2899 b common_exceptionThrown
2902 /* ------------------------------ */
2904 .L_OP_IGET_CHAR: /* 0x57 */
2905 /* File: mips/OP_IGET_CHAR.S */
2906 /* File: mips/OP_IGET.S */
2908 * General 32-bit instance field get.
2910 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
2912 # op vA, vB, field /* CCCC */
2913 GET_OPB(a0) # a0 <- B
2914 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2915 FETCH(a1, 1) # a1 <- field ref CCCC
2916 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
2917 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2918 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2919 # is resolved entry null?
2920 bnez a0, .LOP_IGET_CHAR_finish # no, already resolved
2921 LOAD_rSELF_method(a2) # a2 <- current method
2922 EXPORT_PC() # resolve() could throw
2923 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2924 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2927 bnez v0, .LOP_IGET_CHAR_finish
2928 b common_exceptionThrown
2931 /* ------------------------------ */
2933 .L_OP_IGET_SHORT: /* 0x58 */
2934 /* File: mips/OP_IGET_SHORT.S */
2935 /* File: mips/OP_IGET.S */
2937 * General 32-bit instance field get.
2939 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
2941 # op vA, vB, field /* CCCC */
2942 GET_OPB(a0) # a0 <- B
2943 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2944 FETCH(a1, 1) # a1 <- field ref CCCC
2945 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
2946 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2947 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2948 # is resolved entry null?
2949 bnez a0, .LOP_IGET_SHORT_finish # no, already resolved
2950 LOAD_rSELF_method(a2) # a2 <- current method
2951 EXPORT_PC() # resolve() could throw
2952 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2953 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2956 bnez v0, .LOP_IGET_SHORT_finish
2957 b common_exceptionThrown
2960 /* ------------------------------ */
2962 .L_OP_IPUT: /* 0x59 */
2963 /* File: mips/OP_IPUT.S */
2965 * General 32-bit instance field put.
2967 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short
2969 # op vA, vB, field /* CCCC */
2970 GET_OPB(a0) # a0 <- B
2971 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2972 FETCH(a1, 1) # a1 <- field ref CCCC
2973 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
2974 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2975 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2976 # is resolved entry null?
2977 bnez a0, .LOP_IPUT_finish # no, already resolved
2978 LOAD_rSELF_method(a2) # a2 <- current method
2979 EXPORT_PC() # resolve() could throw
2980 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
2981 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
2984 bnez v0, .LOP_IPUT_finish # yes, finish up
2985 b common_exceptionThrown
2987 /* ------------------------------ */
2989 .L_OP_IPUT_WIDE: /* 0x5a */
2990 /* File: mips/OP_IPUT_WIDE.S */
2991 # iput-wide vA, vB, field /* CCCC */
2992 GET_OPB(a0) # a0 <- B
2993 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
2994 FETCH(a1, 1) # a1 <- field ref CCCC
2995 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
2996 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
2997 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
2998 # is resolved entry null?
2999 bnez a0, .LOP_IPUT_WIDE_finish # no, already resolved
3000 LOAD_rSELF_method(a2) # a2 <- current method
3001 EXPORT_PC() # resolve() could throw
3002 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3003 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
3006 bnez v0, .LOP_IPUT_WIDE_finish # yes, finish up
3007 b common_exceptionThrown
3009 /* ------------------------------ */
3011 .L_OP_IPUT_OBJECT: /* 0x5b */
3012 /* File: mips/OP_IPUT_OBJECT.S */
3014 * 32-bit instance field put.
3016 * for: iput-object, iput-object-volatile
3018 # op vA, vB, field /* CCCC */
3019 GET_OPB(a0) # a0 <- B
3020 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
3021 FETCH(a1, 1) # a1 <- field ref CCCC
3022 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
3023 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
3024 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
3025 # is resolved entry null?
3026 bnez a0, .LOP_IPUT_OBJECT_finish # no, already resolved
3027 LOAD_rSELF_method(a2) # a2 <- current method
3028 EXPORT_PC() # resolve() could throw
3029 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3030 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
3033 bnez v0, .LOP_IPUT_OBJECT_finish # yes, finish up
3034 b common_exceptionThrown
3036 /* ------------------------------ */
3038 .L_OP_IPUT_BOOLEAN: /* 0x5c */
3039 /* File: mips/OP_IPUT_BOOLEAN.S */
3040 /* File: mips/OP_IPUT.S */
3042 * General 32-bit instance field put.
3044 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short
3046 # op vA, vB, field /* CCCC */
3047 GET_OPB(a0) # a0 <- B
3048 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
3049 FETCH(a1, 1) # a1 <- field ref CCCC
3050 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
3051 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
3052 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
3053 # is resolved entry null?
3054 bnez a0, .LOP_IPUT_BOOLEAN_finish # no, already resolved
3055 LOAD_rSELF_method(a2) # a2 <- current method
3056 EXPORT_PC() # resolve() could throw
3057 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3058 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
3061 bnez v0, .LOP_IPUT_BOOLEAN_finish # yes, finish up
3062 b common_exceptionThrown
3065 /* ------------------------------ */
3067 .L_OP_IPUT_BYTE: /* 0x5d */
3068 /* File: mips/OP_IPUT_BYTE.S */
3069 /* File: mips/OP_IPUT.S */
3071 * General 32-bit instance field put.
3073 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short
3075 # op vA, vB, field /* CCCC */
3076 GET_OPB(a0) # a0 <- B
3077 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
3078 FETCH(a1, 1) # a1 <- field ref CCCC
3079 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
3080 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
3081 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
3082 # is resolved entry null?
3083 bnez a0, .LOP_IPUT_BYTE_finish # no, already resolved
3084 LOAD_rSELF_method(a2) # a2 <- current method
3085 EXPORT_PC() # resolve() could throw
3086 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3087 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
3090 bnez v0, .LOP_IPUT_BYTE_finish # yes, finish up
3091 b common_exceptionThrown
3094 /* ------------------------------ */
3096 .L_OP_IPUT_CHAR: /* 0x5e */
3097 /* File: mips/OP_IPUT_CHAR.S */
3098 /* File: mips/OP_IPUT.S */
3100 * General 32-bit instance field put.
3102 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short
3104 # op vA, vB, field /* CCCC */
3105 GET_OPB(a0) # a0 <- B
3106 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
3107 FETCH(a1, 1) # a1 <- field ref CCCC
3108 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
3109 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
3110 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
3111 # is resolved entry null?
3112 bnez a0, .LOP_IPUT_CHAR_finish # no, already resolved
3113 LOAD_rSELF_method(a2) # a2 <- current method
3114 EXPORT_PC() # resolve() could throw
3115 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3116 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
3119 bnez v0, .LOP_IPUT_CHAR_finish # yes, finish up
3120 b common_exceptionThrown
3123 /* ------------------------------ */
3125 .L_OP_IPUT_SHORT: /* 0x5f */
3126 /* File: mips/OP_IPUT_SHORT.S */
3127 /* File: mips/OP_IPUT.S */
3129 * General 32-bit instance field put.
3131 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short
3133 # op vA, vB, field /* CCCC */
3134 GET_OPB(a0) # a0 <- B
3135 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
3136 FETCH(a1, 1) # a1 <- field ref CCCC
3137 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
3138 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
3139 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
3140 # is resolved entry null?
3141 bnez a0, .LOP_IPUT_SHORT_finish # no, already resolved
3142 LOAD_rSELF_method(a2) # a2 <- current method
3143 EXPORT_PC() # resolve() could throw
3144 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3145 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
3148 bnez v0, .LOP_IPUT_SHORT_finish # yes, finish up
3149 b common_exceptionThrown
3152 /* ------------------------------ */
3154 .L_OP_SGET: /* 0x60 */
3155 /* File: mips/OP_SGET.S */
3157 * General 32-bit SGET handler.
3159 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
3161 # op vAA, field /* BBBB */
3162 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3163 FETCH(a1, 1) # a1 <- field ref BBBB
3164 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3165 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3166 # is resolved entry !null?
3167 bnez a0, .LOP_SGET_finish
3170 * Continuation if the field has not yet been resolved.
3171 * a1: BBBB field ref
3172 * rBIX: dvmDex->pResFields
3174 LOAD_rSELF_method(a2) # a2 <- current method
3175 #if defined(WITH_JIT)
3176 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3178 EXPORT_PC() # resolve() could throw, so export now
3179 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3180 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3183 beqz v0, common_exceptionThrown # no, handle exception
3184 #if defined(WITH_JIT)
3186 * If the JIT is actively building a trace we need to make sure
3187 * that the field is fully resolved before including this instruction.
3189 JAL(common_verifyField)
3191 b .LOP_SGET_finish # resume
3193 /* ------------------------------ */
3195 .L_OP_SGET_WIDE: /* 0x61 */
3196 /* File: mips/OP_SGET_WIDE.S */
3198 * 64-bit SGET handler.
3200 # sget-wide vAA, field /* BBBB */
3201 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3202 FETCH(a1, 1) # a1 <- field ref BBBB
3203 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3204 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3205 # is resolved entry null?
3206 bnez a0, .LOP_SGET_WIDE_finish
3209 * Continuation if the field has not yet been resolved.
3210 * a1: BBBB field ref
3211 * rBIX: dvmDex->pResFields
3213 * Returns StaticField pointer in v0.
3215 LOAD_rSELF_method(a2) # a2 <- current method
3216 #if defined(WITH_JIT)
3217 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3219 EXPORT_PC() # resolve() could throw, so export now
3220 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3221 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3224 beqz v0, common_exceptionThrown # no, handle exception
3225 #if defined(WITH_JIT)
3227 * If the JIT is actively building a trace we need to make sure
3228 * that the field is fully resolved before including this instruction.
3230 JAL(common_verifyField)
3233 b .LOP_SGET_WIDE_finish # resume
3235 /* ------------------------------ */
3237 .L_OP_SGET_OBJECT: /* 0x62 */
3238 /* File: mips/OP_SGET_OBJECT.S */
3239 /* File: mips/OP_SGET.S */
3241 * General 32-bit SGET handler.
3243 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
3245 # op vAA, field /* BBBB */
3246 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3247 FETCH(a1, 1) # a1 <- field ref BBBB
3248 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3249 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3250 # is resolved entry !null?
3251 bnez a0, .LOP_SGET_OBJECT_finish
3254 * Continuation if the field has not yet been resolved.
3255 * a1: BBBB field ref
3256 * rBIX: dvmDex->pResFields
3258 LOAD_rSELF_method(a2) # a2 <- current method
3259 #if defined(WITH_JIT)
3260 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3262 EXPORT_PC() # resolve() could throw, so export now
3263 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3264 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3267 beqz v0, common_exceptionThrown # no, handle exception
3268 #if defined(WITH_JIT)
3270 * If the JIT is actively building a trace we need to make sure
3271 * that the field is fully resolved before including this instruction.
3273 JAL(common_verifyField)
3275 b .LOP_SGET_OBJECT_finish # resume
3278 /* ------------------------------ */
3280 .L_OP_SGET_BOOLEAN: /* 0x63 */
3281 /* File: mips/OP_SGET_BOOLEAN.S */
3282 /* File: mips/OP_SGET.S */
3284 * General 32-bit SGET handler.
3286 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
3288 # op vAA, field /* BBBB */
3289 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3290 FETCH(a1, 1) # a1 <- field ref BBBB
3291 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3292 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3293 # is resolved entry !null?
3294 bnez a0, .LOP_SGET_BOOLEAN_finish
3297 * Continuation if the field has not yet been resolved.
3298 * a1: BBBB field ref
3299 * rBIX: dvmDex->pResFields
3301 LOAD_rSELF_method(a2) # a2 <- current method
3302 #if defined(WITH_JIT)
3303 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3305 EXPORT_PC() # resolve() could throw, so export now
3306 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3307 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3310 beqz v0, common_exceptionThrown # no, handle exception
3311 #if defined(WITH_JIT)
3313 * If the JIT is actively building a trace we need to make sure
3314 * that the field is fully resolved before including this instruction.
3316 JAL(common_verifyField)
3318 b .LOP_SGET_BOOLEAN_finish # resume
3321 /* ------------------------------ */
3323 .L_OP_SGET_BYTE: /* 0x64 */
3324 /* File: mips/OP_SGET_BYTE.S */
3325 /* File: mips/OP_SGET.S */
3327 * General 32-bit SGET handler.
3329 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
3331 # op vAA, field /* BBBB */
3332 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3333 FETCH(a1, 1) # a1 <- field ref BBBB
3334 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3335 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3336 # is resolved entry !null?
3337 bnez a0, .LOP_SGET_BYTE_finish
3340 * Continuation if the field has not yet been resolved.
3341 * a1: BBBB field ref
3342 * rBIX: dvmDex->pResFields
3344 LOAD_rSELF_method(a2) # a2 <- current method
3345 #if defined(WITH_JIT)
3346 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3348 EXPORT_PC() # resolve() could throw, so export now
3349 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3350 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3353 beqz v0, common_exceptionThrown # no, handle exception
3354 #if defined(WITH_JIT)
3356 * If the JIT is actively building a trace we need to make sure
3357 * that the field is fully resolved before including this instruction.
3359 JAL(common_verifyField)
3361 b .LOP_SGET_BYTE_finish # resume
3364 /* ------------------------------ */
3366 .L_OP_SGET_CHAR: /* 0x65 */
3367 /* File: mips/OP_SGET_CHAR.S */
3368 /* File: mips/OP_SGET.S */
3370 * General 32-bit SGET handler.
3372 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
3374 # op vAA, field /* BBBB */
3375 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3376 FETCH(a1, 1) # a1 <- field ref BBBB
3377 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3378 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3379 # is resolved entry !null?
3380 bnez a0, .LOP_SGET_CHAR_finish
3383 * Continuation if the field has not yet been resolved.
3384 * a1: BBBB field ref
3385 * rBIX: dvmDex->pResFields
3387 LOAD_rSELF_method(a2) # a2 <- current method
3388 #if defined(WITH_JIT)
3389 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3391 EXPORT_PC() # resolve() could throw, so export now
3392 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3393 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3396 beqz v0, common_exceptionThrown # no, handle exception
3397 #if defined(WITH_JIT)
3399 * If the JIT is actively building a trace we need to make sure
3400 * that the field is fully resolved before including this instruction.
3402 JAL(common_verifyField)
3404 b .LOP_SGET_CHAR_finish # resume
3407 /* ------------------------------ */
3409 .L_OP_SGET_SHORT: /* 0x66 */
3410 /* File: mips/OP_SGET_SHORT.S */
3411 /* File: mips/OP_SGET.S */
3413 * General 32-bit SGET handler.
3415 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
3417 # op vAA, field /* BBBB */
3418 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3419 FETCH(a1, 1) # a1 <- field ref BBBB
3420 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3421 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3422 # is resolved entry !null?
3423 bnez a0, .LOP_SGET_SHORT_finish
3426 * Continuation if the field has not yet been resolved.
3427 * a1: BBBB field ref
3428 * rBIX: dvmDex->pResFields
3430 LOAD_rSELF_method(a2) # a2 <- current method
3431 #if defined(WITH_JIT)
3432 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3434 EXPORT_PC() # resolve() could throw, so export now
3435 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3436 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3439 beqz v0, common_exceptionThrown # no, handle exception
3440 #if defined(WITH_JIT)
3442 * If the JIT is actively building a trace we need to make sure
3443 * that the field is fully resolved before including this instruction.
3445 JAL(common_verifyField)
3447 b .LOP_SGET_SHORT_finish # resume
3450 /* ------------------------------ */
3452 .L_OP_SPUT: /* 0x67 */
3453 /* File: mips/OP_SPUT.S */
3455 * General 32-bit SPUT handler.
3457 * for: sput, sput-object, sput-boolean, sput-byte, sput-char, sput-short
3459 # op vAA, field /* BBBB */
3460 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3461 FETCH(a1, 1) # a1 <- field ref BBBB
3462 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3463 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3464 bnez a0, .LOP_SPUT_finish # is resolved entry null?
3466 * Continuation if the field has not yet been resolved.
3467 * a1: BBBB field ref
3468 * rBIX: dvmDex->pResFields
3470 LOAD_rSELF_method(a2) # a2 <- current method
3471 #if defined(WITH_JIT)
3472 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3474 EXPORT_PC() # resolve() may throw, so export now
3475 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3476 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3478 beqz v0, common_exceptionThrown # success? no, handle exception
3479 #if defined(WITH_JIT)
3481 * If the JIT is actively building a trace we need to make sure
3482 * that the field is fully resolved before including this instruction.
3484 JAL(common_verifyField)
3486 b .LOP_SPUT_finish # resume
3488 /* ------------------------------ */
3490 .L_OP_SPUT_WIDE: /* 0x68 */
3491 /* File: mips/OP_SPUT_WIDE.S */
3493 * 64-bit SPUT handler.
3495 # sput-wide vAA, field /* BBBB */
3496 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3497 FETCH(a1, 1) # a1 <- field ref BBBB
3498 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3499 GET_OPA(t0) # t0 <- AA
3500 LOAD_eas2(a2, rBIX, a1) # a2 <- resolved StaticField ptr
3501 EAS2(rOBJ, rFP, t0) # rOBJ<- &fp[AA]
3502 # is resolved entry null?
3503 beqz a2, .LOP_SPUT_WIDE_resolve # yes, do resolve
3504 .LOP_SPUT_WIDE_finish: # field ptr in a2, AA in rOBJ
3505 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
3506 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
3507 GET_INST_OPCODE(rBIX) # extract opcode from rINST
3509 addu a2, offStaticField_value # a2<- pointer to data
3510 JAL(dvmQuasiAtomicSwap64Sync) # stores a0/a1 into addr a2
3512 STORE64_off(a0, a1, a2, offStaticField_value) # field <- vAA/vAA+1
3514 GOTO_OPCODE(rBIX) # jump to next instruction
3516 /* ------------------------------ */
3518 .L_OP_SPUT_OBJECT: /* 0x69 */
3519 /* File: mips/OP_SPUT_OBJECT.S */
3521 * General 32-bit SPUT handler.
3523 * for: sput-object, sput-object-volatile
3525 /* op vAA, field@BBBB */
3526 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3527 FETCH(a1, 1) # a1 <- field ref BBBB
3528 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3529 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3530 bnez a0, .LOP_SPUT_OBJECT_finish # is resolved entry null?
3532 /* Continuation if the field has not yet been resolved.
3533 * a1: BBBB field ref
3534 * rBIX: dvmDex->pResFields
3536 LOAD_rSELF_method(a2) # a2 <- current method
3537 #if defined(WITH_JIT)
3538 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3540 EXPORT_PC() # resolve() may throw, so export now
3541 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3542 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3544 beqz v0, common_exceptionThrown # success? no, handle exception
3545 #if defined(WITH_JIT)
3547 * If the JIT is actively building a trace we need to make sure
3548 * that the field is fully resolved before including this instruction.
3550 JAL(common_verifyField)
3552 b .LOP_SPUT_OBJECT_finish # resume
3555 /* ------------------------------ */
3557 .L_OP_SPUT_BOOLEAN: /* 0x6a */
3558 /* File: mips/OP_SPUT_BOOLEAN.S */
3559 /* File: mips/OP_SPUT.S */
3561 * General 32-bit SPUT handler.
3563 * for: sput, sput-object, sput-boolean, sput-byte, sput-char, sput-short
3565 # op vAA, field /* BBBB */
3566 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3567 FETCH(a1, 1) # a1 <- field ref BBBB
3568 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3569 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3570 bnez a0, .LOP_SPUT_BOOLEAN_finish # is resolved entry null?
3572 * Continuation if the field has not yet been resolved.
3573 * a1: BBBB field ref
3574 * rBIX: dvmDex->pResFields
3576 LOAD_rSELF_method(a2) # a2 <- current method
3577 #if defined(WITH_JIT)
3578 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3580 EXPORT_PC() # resolve() may throw, so export now
3581 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3582 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3584 beqz v0, common_exceptionThrown # success? no, handle exception
3585 #if defined(WITH_JIT)
3587 * If the JIT is actively building a trace we need to make sure
3588 * that the field is fully resolved before including this instruction.
3590 JAL(common_verifyField)
3592 b .LOP_SPUT_BOOLEAN_finish # resume
3595 /* ------------------------------ */
3597 .L_OP_SPUT_BYTE: /* 0x6b */
3598 /* File: mips/OP_SPUT_BYTE.S */
3599 /* File: mips/OP_SPUT.S */
3601 * General 32-bit SPUT handler.
3603 * for: sput, sput-object, sput-boolean, sput-byte, sput-char, sput-short
3605 # op vAA, field /* BBBB */
3606 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3607 FETCH(a1, 1) # a1 <- field ref BBBB
3608 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3609 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3610 bnez a0, .LOP_SPUT_BYTE_finish # is resolved entry null?
3612 * Continuation if the field has not yet been resolved.
3613 * a1: BBBB field ref
3614 * rBIX: dvmDex->pResFields
3616 LOAD_rSELF_method(a2) # a2 <- current method
3617 #if defined(WITH_JIT)
3618 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3620 EXPORT_PC() # resolve() may throw, so export now
3621 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3622 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3624 beqz v0, common_exceptionThrown # success? no, handle exception
3625 #if defined(WITH_JIT)
3627 * If the JIT is actively building a trace we need to make sure
3628 * that the field is fully resolved before including this instruction.
3630 JAL(common_verifyField)
3632 b .LOP_SPUT_BYTE_finish # resume
3635 /* ------------------------------ */
3637 .L_OP_SPUT_CHAR: /* 0x6c */
3638 /* File: mips/OP_SPUT_CHAR.S */
3639 /* File: mips/OP_SPUT.S */
3641 * General 32-bit SPUT handler.
3643 * for: sput, sput-object, sput-boolean, sput-byte, sput-char, sput-short
3645 # op vAA, field /* BBBB */
3646 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3647 FETCH(a1, 1) # a1 <- field ref BBBB
3648 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3649 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3650 bnez a0, .LOP_SPUT_CHAR_finish # is resolved entry null?
3652 * Continuation if the field has not yet been resolved.
3653 * a1: BBBB field ref
3654 * rBIX: dvmDex->pResFields
3656 LOAD_rSELF_method(a2) # a2 <- current method
3657 #if defined(WITH_JIT)
3658 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3660 EXPORT_PC() # resolve() may throw, so export now
3661 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3662 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3664 beqz v0, common_exceptionThrown # success? no, handle exception
3665 #if defined(WITH_JIT)
3667 * If the JIT is actively building a trace we need to make sure
3668 * that the field is fully resolved before including this instruction.
3670 JAL(common_verifyField)
3672 b .LOP_SPUT_CHAR_finish # resume
3675 /* ------------------------------ */
3677 .L_OP_SPUT_SHORT: /* 0x6d */
3678 /* File: mips/OP_SPUT_SHORT.S */
3679 /* File: mips/OP_SPUT.S */
3681 * General 32-bit SPUT handler.
3683 * for: sput, sput-object, sput-boolean, sput-byte, sput-char, sput-short
3685 # op vAA, field /* BBBB */
3686 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
3687 FETCH(a1, 1) # a1 <- field ref BBBB
3688 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
3689 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
3690 bnez a0, .LOP_SPUT_SHORT_finish # is resolved entry null?
3692 * Continuation if the field has not yet been resolved.
3693 * a1: BBBB field ref
3694 * rBIX: dvmDex->pResFields
3696 LOAD_rSELF_method(a2) # a2 <- current method
3697 #if defined(WITH_JIT)
3698 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
3700 EXPORT_PC() # resolve() may throw, so export now
3701 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
3702 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
3704 beqz v0, common_exceptionThrown # success? no, handle exception
3705 #if defined(WITH_JIT)
3707 * If the JIT is actively building a trace we need to make sure
3708 * that the field is fully resolved before including this instruction.
3710 JAL(common_verifyField)
3712 b .LOP_SPUT_SHORT_finish # resume
3715 /* ------------------------------ */
3717 .L_OP_INVOKE_VIRTUAL: /* 0x6e */
3718 /* File: mips/OP_INVOKE_VIRTUAL.S */
3720 * Handle a virtual method call.
3722 * for: invoke-virtual, invoke-virtual/range
3724 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
3725 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
3726 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
3727 FETCH(a1, 1) # a1 <- BBBB
3728 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
3729 FETCH(rBIX, 2) # rBIX <- GFED or CCCC
3730 LOAD_eas2(a0, a3, a1) # a0 <- resolved baseMethod
3732 and rBIX, rBIX, 15 # rBIX <- D (or stays CCCC)
3734 EXPORT_PC() # must export for invoke
3736 bnez a0, .LOP_INVOKE_VIRTUAL_continue # yes, continue on
3738 LOAD_rSELF_method(a3) # a3 <- self->method
3739 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
3740 li a2, METHOD_VIRTUAL # resolver method type
3741 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
3744 bnez v0, .LOP_INVOKE_VIRTUAL_continue # no, continue
3745 b common_exceptionThrown # yes, handle exception
3747 /* ------------------------------ */
3749 .L_OP_INVOKE_SUPER: /* 0x6f */
3750 /* File: mips/OP_INVOKE_SUPER.S */
3752 * Handle a "super" method call.
3754 * for: invoke-super, invoke-super/range
3756 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
3757 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
3758 FETCH(t0, 2) # t0 <- GFED or CCCC
3759 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
3761 and t0, t0, 15 # t0 <- D (or stays CCCC)
3763 FETCH(a1, 1) # a1 <- BBBB
3764 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
3765 GET_VREG(rOBJ, t0) # rOBJ <- "this" ptr
3766 LOAD_eas2(a0, a3, a1) # a0 <- resolved baseMethod
3768 LOAD_rSELF_method(t1) # t1 <- current method
3769 beqz rOBJ, common_errNullObject # null "this", throw exception
3770 # cmp a0, 0; already resolved?
3771 LOAD_base_offMethod_clazz(rBIX, t1) # rBIX <- method->clazz
3772 EXPORT_PC() # must export for invoke
3773 bnez a0, .LOP_INVOKE_SUPER_continue # resolved, continue on
3775 move a0, rBIX # a0 <- method->clazz
3776 li a2, METHOD_VIRTUAL # resolver method type
3777 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
3780 beqz v0, common_exceptionThrown # yes, handle exception
3781 b .LOP_INVOKE_SUPER_continue
3783 /* ------------------------------ */
3785 .L_OP_INVOKE_DIRECT: /* 0x70 */
3786 /* File: mips/OP_INVOKE_DIRECT.S */
3788 * Handle a direct method call.
3790 * (We could defer the "is 'this' pointer null" test to the common
3791 * method invocation code, and use a flag to indicate that static
3792 * calls don't count. If we do this as part of copying the arguments
3793 * out we could avoiding loading the first arg twice.)
3795 * for: invoke-direct, invoke-direct/range
3797 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
3798 # op {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
3799 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
3800 FETCH(a1, 1) # a1 <- BBBB
3801 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
3802 FETCH(rBIX, 2) # rBIX <- GFED or CCCC
3803 LOAD_eas2(a0, a3, a1) # a0 <- resolved methodToCall
3805 and rBIX, rBIX, 15 # rBIX <- D (or stays CCCC)
3807 EXPORT_PC() # must export for invoke
3808 GET_VREG(rOBJ, rBIX) # rOBJ <- "this" ptr
3810 bnez a0, 1f # resolved, call the function
3812 lw a3, offThread_method(rSELF) # a3 <- self->method
3813 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
3814 li a2, METHOD_DIRECT # resolver method type
3815 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
3818 beqz v0, common_exceptionThrown # yes, handle exception
3821 bnez rOBJ, common_invokeMethodNoRange # a0=method, rOBJ="this"
3822 b common_errNullObject # yes, throw exception
3827 /* ------------------------------ */
3829 .L_OP_INVOKE_STATIC: /* 0x71 */
3830 /* File: mips/OP_INVOKE_STATIC.S */
3832 * Handle a static method call.
3834 * for: invoke-static, invoke-static/range
3836 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
3837 # op {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
3838 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
3839 FETCH(a1, 1) # a1 <- BBBB
3840 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
3841 li rOBJ, 0 # null "this" in delay slot
3842 LOAD_eas2(a0, a3, a1) # a0 <- resolved methodToCall
3843 #if defined(WITH_JIT)
3844 EAS2(rBIX, a3, a1) # rBIX<- &resolved_metherToCall
3846 EXPORT_PC() # must export for invoke
3848 bnez a0, common_invokeMethodNoRange # yes, continue on
3849 b .LOP_INVOKE_STATIC_resolve
3851 /* ------------------------------ */
3853 .L_OP_INVOKE_INTERFACE: /* 0x72 */
3854 /* File: mips/OP_INVOKE_INTERFACE.S */
3856 * Handle an interface method call.
3858 * for: invoke-interface, invoke-interface/range
3860 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */
3861 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
3862 FETCH(a2, 2) # a2 <- FEDC or CCCC
3863 FETCH(a1, 1) # a1 <- BBBB
3865 and a2, 15 # a2 <- C (or stays CCCC)
3867 EXPORT_PC() # must export for invoke
3868 GET_VREG(rOBJ, a2) # rOBJ <- first arg ("this")
3869 LOAD_rSELF_methodClassDex(a3) # a3 <- methodClassDex
3870 LOAD_rSELF_method(a2) # a2 <- method
3872 beqz rOBJ, common_errNullObject # yes, fail
3873 LOAD_base_offObject_clazz(a0, rOBJ) # a0 <- thisPtr->clazz
3874 JAL(dvmFindInterfaceMethodInCache) # v0 <- call(class, ref, method, dex)
3877 beqz v0, common_exceptionThrown # yes, handle exception
3878 b common_invokeMethodNoRange # (a0=method, rOBJ="this")
3880 /* ------------------------------ */
3882 .L_OP_UNUSED_73: /* 0x73 */
3883 /* File: mips/OP_UNUSED_73.S */
3884 /* File: mips/unused.S */
3889 /* ------------------------------ */
3891 .L_OP_INVOKE_VIRTUAL_RANGE: /* 0x74 */
3892 /* File: mips/OP_INVOKE_VIRTUAL_RANGE.S */
3893 /* File: mips/OP_INVOKE_VIRTUAL.S */
3895 * Handle a virtual method call.
3897 * for: invoke-virtual, invoke-virtual/range
3899 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
3900 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
3901 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
3902 FETCH(a1, 1) # a1 <- BBBB
3903 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
3904 FETCH(rBIX, 2) # rBIX <- GFED or CCCC
3905 LOAD_eas2(a0, a3, a1) # a0 <- resolved baseMethod
3907 and rBIX, rBIX, 15 # rBIX <- D (or stays CCCC)
3909 EXPORT_PC() # must export for invoke
3911 bnez a0, .LOP_INVOKE_VIRTUAL_RANGE_continue # yes, continue on
3913 LOAD_rSELF_method(a3) # a3 <- self->method
3914 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
3915 li a2, METHOD_VIRTUAL # resolver method type
3916 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
3919 bnez v0, .LOP_INVOKE_VIRTUAL_RANGE_continue # no, continue
3920 b common_exceptionThrown # yes, handle exception
3923 /* ------------------------------ */
3925 .L_OP_INVOKE_SUPER_RANGE: /* 0x75 */
3926 /* File: mips/OP_INVOKE_SUPER_RANGE.S */
3927 /* File: mips/OP_INVOKE_SUPER.S */
3929 * Handle a "super" method call.
3931 * for: invoke-super, invoke-super/range
3933 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
3934 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
3935 FETCH(t0, 2) # t0 <- GFED or CCCC
3936 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
3938 and t0, t0, 15 # t0 <- D (or stays CCCC)
3940 FETCH(a1, 1) # a1 <- BBBB
3941 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
3942 GET_VREG(rOBJ, t0) # rOBJ <- "this" ptr
3943 LOAD_eas2(a0, a3, a1) # a0 <- resolved baseMethod
3945 LOAD_rSELF_method(t1) # t1 <- current method
3946 beqz rOBJ, common_errNullObject # null "this", throw exception
3947 # cmp a0, 0; already resolved?
3948 LOAD_base_offMethod_clazz(rBIX, t1) # rBIX <- method->clazz
3949 EXPORT_PC() # must export for invoke
3950 bnez a0, .LOP_INVOKE_SUPER_RANGE_continue # resolved, continue on
3952 move a0, rBIX # a0 <- method->clazz
3953 li a2, METHOD_VIRTUAL # resolver method type
3954 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
3957 beqz v0, common_exceptionThrown # yes, handle exception
3958 b .LOP_INVOKE_SUPER_RANGE_continue
3961 /* ------------------------------ */
3963 .L_OP_INVOKE_DIRECT_RANGE: /* 0x76 */
3964 /* File: mips/OP_INVOKE_DIRECT_RANGE.S */
3965 /* File: mips/OP_INVOKE_DIRECT.S */
3967 * Handle a direct method call.
3969 * (We could defer the "is 'this' pointer null" test to the common
3970 * method invocation code, and use a flag to indicate that static
3971 * calls don't count. If we do this as part of copying the arguments
3972 * out we could avoiding loading the first arg twice.)
3974 * for: invoke-direct, invoke-direct/range
3976 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
3977 # op {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
3978 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
3979 FETCH(a1, 1) # a1 <- BBBB
3980 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
3981 FETCH(rBIX, 2) # rBIX <- GFED or CCCC
3982 LOAD_eas2(a0, a3, a1) # a0 <- resolved methodToCall
3984 and rBIX, rBIX, 15 # rBIX <- D (or stays CCCC)
3986 EXPORT_PC() # must export for invoke
3987 GET_VREG(rOBJ, rBIX) # rOBJ <- "this" ptr
3989 bnez a0, 1f # resolved, call the function
3991 lw a3, offThread_method(rSELF) # a3 <- self->method
3992 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
3993 li a2, METHOD_DIRECT # resolver method type
3994 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
3997 beqz v0, common_exceptionThrown # yes, handle exception
4000 bnez rOBJ, common_invokeMethodRange # a0=method, rOBJ="this"
4001 b common_errNullObject # yes, throw exception
4007 /* ------------------------------ */
4009 .L_OP_INVOKE_STATIC_RANGE: /* 0x77 */
4010 /* File: mips/OP_INVOKE_STATIC_RANGE.S */
4011 /* File: mips/OP_INVOKE_STATIC.S */
4013 * Handle a static method call.
4015 * for: invoke-static, invoke-static/range
4017 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
4018 # op {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
4019 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
4020 FETCH(a1, 1) # a1 <- BBBB
4021 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
4022 li rOBJ, 0 # null "this" in delay slot
4023 LOAD_eas2(a0, a3, a1) # a0 <- resolved methodToCall
4024 #if defined(WITH_JIT)
4025 EAS2(rBIX, a3, a1) # rBIX<- &resolved_metherToCall
4027 EXPORT_PC() # must export for invoke
4029 bnez a0, common_invokeMethodRange # yes, continue on
4030 b .LOP_INVOKE_STATIC_RANGE_resolve
4033 /* ------------------------------ */
4035 .L_OP_INVOKE_INTERFACE_RANGE: /* 0x78 */
4036 /* File: mips/OP_INVOKE_INTERFACE_RANGE.S */
4037 /* File: mips/OP_INVOKE_INTERFACE.S */
4039 * Handle an interface method call.
4041 * for: invoke-interface, invoke-interface/range
4043 /* op vB, {vD, vE, vF, vG, vA}, class@CCCC */
4044 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
4045 FETCH(a2, 2) # a2 <- FEDC or CCCC
4046 FETCH(a1, 1) # a1 <- BBBB
4048 and a2, 15 # a2 <- C (or stays CCCC)
4050 EXPORT_PC() # must export for invoke
4051 GET_VREG(rOBJ, a2) # rOBJ <- first arg ("this")
4052 LOAD_rSELF_methodClassDex(a3) # a3 <- methodClassDex
4053 LOAD_rSELF_method(a2) # a2 <- method
4055 beqz rOBJ, common_errNullObject # yes, fail
4056 LOAD_base_offObject_clazz(a0, rOBJ) # a0 <- thisPtr->clazz
4057 JAL(dvmFindInterfaceMethodInCache) # v0 <- call(class, ref, method, dex)
4060 beqz v0, common_exceptionThrown # yes, handle exception
4061 b common_invokeMethodRange # (a0=method, rOBJ="this")
4064 /* ------------------------------ */
4066 .L_OP_UNUSED_79: /* 0x79 */
4067 /* File: mips/OP_UNUSED_79.S */
4068 /* File: mips/unused.S */
4073 /* ------------------------------ */
4075 .L_OP_UNUSED_7A: /* 0x7a */
4076 /* File: mips/OP_UNUSED_7A.S */
4077 /* File: mips/unused.S */
4082 /* ------------------------------ */
4084 .L_OP_NEG_INT: /* 0x7b */
4085 /* File: mips/OP_NEG_INT.S */
4086 /* File: mips/unop.S */
4088 * Generic 32-bit unary operation. Provide an "instr" line that
4089 * specifies an instruction that performs "result = op a0".
4090 * This could be a MIPS instruction or a function call.
4092 * for: neg-int, not-int, neg-float, int-to-float, float-to-int,
4093 * int-to-byte, int-to-char, int-to-short
4096 GET_OPB(a3) # a3 <- B
4097 GET_OPA4(t0) # t0 <- A+
4098 GET_VREG(a0, a3) # a0 <- vB
4099 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4101 negu a0, a0 # a0 <- op, a0-a3 changed
4102 GET_INST_OPCODE(t1) # extract opcode from rINST
4103 SET_VREG_GOTO(a0, t0, t1) # vAA <- result0
4104 /* 9-10 instructions */
4107 /* ------------------------------ */
4109 .L_OP_NOT_INT: /* 0x7c */
4110 /* File: mips/OP_NOT_INT.S */
4111 /* File: mips/unop.S */
4113 * Generic 32-bit unary operation. Provide an "instr" line that
4114 * specifies an instruction that performs "result = op a0".
4115 * This could be a MIPS instruction or a function call.
4117 * for: neg-int, not-int, neg-float, int-to-float, float-to-int,
4118 * int-to-byte, int-to-char, int-to-short
4121 GET_OPB(a3) # a3 <- B
4122 GET_OPA4(t0) # t0 <- A+
4123 GET_VREG(a0, a3) # a0 <- vB
4124 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4126 not a0, a0 # a0 <- op, a0-a3 changed
4127 GET_INST_OPCODE(t1) # extract opcode from rINST
4128 SET_VREG_GOTO(a0, t0, t1) # vAA <- result0
4129 /* 9-10 instructions */
4132 /* ------------------------------ */
4134 .L_OP_NEG_LONG: /* 0x7d */
4135 /* File: mips/OP_NEG_LONG.S */
4136 /* File: mips/unopWide.S */
4138 * Generic 64-bit unary operation. Provide an "instr" line that
4139 * specifies an instruction that performs "result = op a0/a1".
4140 * This could be MIPS instruction or a function call.
4142 * For: neg-long, not-long, neg-double, long-to-double, double-to-long
4145 GET_OPA4(t1) # t1 <- A+
4146 GET_OPB(a3) # a3 <- B
4147 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4148 EAS2(rOBJ, rFP, t1) # rOBJ <- &fp[A]
4149 LOAD64(a0, a1, a3) # a0/a1 <- vAA
4150 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4151 negu v0, a0 # optional op
4152 negu v1, a1; sltu a0, zero, v0; subu v1, v1, a0 # a0/a1 <- op, a2-a3 changed
4153 GET_INST_OPCODE(t0) # extract opcode from rINST
4154 STORE64(v0, v1, rOBJ) # vAA <- a0/a1
4155 GOTO_OPCODE(t0) # jump to next instruction
4156 /* 12-13 instructions */
4161 /* ------------------------------ */
4163 .L_OP_NOT_LONG: /* 0x7e */
4164 /* File: mips/OP_NOT_LONG.S */
4165 /* File: mips/unopWide.S */
4167 * Generic 64-bit unary operation. Provide an "instr" line that
4168 * specifies an instruction that performs "result = op a0/a1".
4169 * This could be MIPS instruction or a function call.
4171 * For: neg-long, not-long, neg-double, long-to-double, double-to-long
4174 GET_OPA4(t1) # t1 <- A+
4175 GET_OPB(a3) # a3 <- B
4176 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4177 EAS2(rOBJ, rFP, t1) # rOBJ <- &fp[A]
4178 LOAD64(a0, a1, a3) # a0/a1 <- vAA
4179 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4180 not a0, a0 # optional op
4181 not a1, a1 # a0/a1 <- op, a2-a3 changed
4182 GET_INST_OPCODE(t0) # extract opcode from rINST
4183 STORE64(a0, a1, rOBJ) # vAA <- a0/a1
4184 GOTO_OPCODE(t0) # jump to next instruction
4185 /* 12-13 instructions */
4189 /* ------------------------------ */
4191 .L_OP_NEG_FLOAT: /* 0x7f */
4192 /* File: mips/OP_NEG_FLOAT.S */
4193 /* File: mips/unop.S */
4195 * Generic 32-bit unary operation. Provide an "instr" line that
4196 * specifies an instruction that performs "result = op a0".
4197 * This could be a MIPS instruction or a function call.
4199 * for: neg-int, not-int, neg-float, int-to-float, float-to-int,
4200 * int-to-byte, int-to-char, int-to-short
4203 GET_OPB(a3) # a3 <- B
4204 GET_OPA4(t0) # t0 <- A+
4205 GET_VREG(a0, a3) # a0 <- vB
4206 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4208 addu a0, a0, 0x80000000 # a0 <- op, a0-a3 changed
4209 GET_INST_OPCODE(t1) # extract opcode from rINST
4210 SET_VREG_GOTO(a0, t0, t1) # vAA <- result0
4211 /* 9-10 instructions */
4214 /* ------------------------------ */
4216 .L_OP_NEG_DOUBLE: /* 0x80 */
4217 /* File: mips/OP_NEG_DOUBLE.S */
4218 /* File: mips/unopWide.S */
4220 * Generic 64-bit unary operation. Provide an "instr" line that
4221 * specifies an instruction that performs "result = op a0/a1".
4222 * This could be MIPS instruction or a function call.
4224 * For: neg-long, not-long, neg-double, long-to-double, double-to-long
4227 GET_OPA4(t1) # t1 <- A+
4228 GET_OPB(a3) # a3 <- B
4229 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4230 EAS2(rOBJ, rFP, t1) # rOBJ <- &fp[A]
4231 LOAD64(a0, a1, a3) # a0/a1 <- vAA
4232 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4234 addu a1, a1, 0x80000000 # a0/a1 <- op, a2-a3 changed
4235 GET_INST_OPCODE(t0) # extract opcode from rINST
4236 STORE64(a0, a1, rOBJ) # vAA <- a0/a1
4237 GOTO_OPCODE(t0) # jump to next instruction
4238 /* 12-13 instructions */
4242 /* ------------------------------ */
4244 .L_OP_INT_TO_LONG: /* 0x81 */
4245 /* File: mips/OP_INT_TO_LONG.S */
4246 /* File: mips/unopWider.S */
4248 * Generic 32bit-to-64bit unary operation. Provide an "instr" line
4249 * that specifies an instruction that performs "result = op a0", where
4250 * "result" is a 64-bit quantity in a0/a1.
4252 * For: int-to-long, int-to-double, float-to-long, float-to-double
4255 GET_OPA4(t1) # t1 <- A+
4256 GET_OPB(a3) # a3 <- B
4257 GET_VREG(a0, a3) # a0 <- vB
4258 EAS2(rOBJ, rFP, t1) # rOBJ <- &fp[A]
4259 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4261 sra a1, a0, 31 # result <- op, a0-a3 changed
4262 GET_INST_OPCODE(t0) # extract opcode from rINST
4263 STORE64(a0, a1, rOBJ) # vA/vA+1 <- a0/a1
4264 GOTO_OPCODE(t0) # jump to next instruction
4265 /* 10-11 instructions */
4268 /* ------------------------------ */
4270 .L_OP_INT_TO_FLOAT: /* 0x82 */
4271 /* File: mips/OP_INT_TO_FLOAT.S */
4272 /* File: mips/unflop.S */
4274 * Generic 32-bit unary operation. Provide an "instr" line that
4275 * specifies an instruction that performs "result = op a0".
4276 * This could be a MIPS instruction or a function call.
4278 * for: int-to-float, float-to-int
4281 GET_OPB(a3) # a3 <- B
4282 GET_OPA4(rOBJ) # t0 <- A+
4284 GET_VREG(a0, a3) # a0 <- vB
4289 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4291 JAL(__floatsisf) # a0 <- op, a0-a3 changed
4293 .LOP_INT_TO_FLOAT_set_vreg:
4294 SET_VREG(v0, rOBJ) # vAA <- result0
4298 .LOP_INT_TO_FLOAT_set_vreg_f:
4299 SET_VREG_F(fv0, rOBJ)
4301 GET_INST_OPCODE(t1) # extract opcode from rINST
4302 GOTO_OPCODE(t1) # jump to next instruction
4303 /* 9-10 instructions */
4306 /* ------------------------------ */
4308 .L_OP_INT_TO_DOUBLE: /* 0x83 */
4309 /* File: mips/OP_INT_TO_DOUBLE.S */
4310 /* File: mips/unflopWider.S */
4312 * Generic 32bit-to-64bit unary operation. Provide an "instr" line
4313 * that specifies an instruction that performs "result = op a0", where
4314 * "result" is a 64-bit quantity in a0/a1.
4316 * For: int-to-double, float-to-long, float-to-double
4319 GET_OPA4(rOBJ) # rOBJ <- A+
4320 GET_OPB(a3) # a3 <- B
4322 GET_VREG(a0, a3) # a0 <- vB
4326 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
4327 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4330 JAL(__floatsidf) # result <- op, a0-a3 changed
4332 .LOP_INT_TO_DOUBLE_set_vreg:
4333 STORE64(rRESULT0, rRESULT1, rOBJ) # vA/vA+1 <- a0/a1
4337 .LOP_INT_TO_DOUBLE_set_vreg:
4338 STORE64_F(fv0, fv0f, rOBJ) # vA/vA+1 <- a0/a1
4340 GET_INST_OPCODE(t0) # extract opcode from rINST
4341 GOTO_OPCODE(t0) # jump to next instruction
4342 /* 10-11 instructions */
4345 /* ------------------------------ */
4347 .L_OP_LONG_TO_INT: /* 0x84 */
4348 /* File: mips/OP_LONG_TO_INT.S */
4349 GET_OPB(a1) # a1 <- B from 15:12
4350 GET_OPA4(a0) # a0 <- A from 11:8
4351 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4352 #ifdef HAVE_BIG_ENDIAN
4355 GET_VREG(a2, a1) # a2 <- fp[B]
4356 GET_INST_OPCODE(t0) # t0 <- opcode from rINST
4357 SET_VREG_GOTO(a2, a0, t0) # fp[A] <- a2
4359 /* ------------------------------ */
4361 .L_OP_LONG_TO_FLOAT: /* 0x85 */
4362 /* File: mips/OP_LONG_TO_FLOAT.S */
4363 /* File: mips/unopNarrower.S */
4365 * Generic 64bit-to-32bit unary operation. Provide an "instr" line
4366 * that specifies an instruction that performs "result = op a0/a1", where
4367 * "result" is a 32-bit quantity in a0.
4369 * For: long-to-float, double-to-int, double-to-float
4370 * If hard floating point support is available, use fa0 as the parameter, except for
4371 * long-to-float opcode.
4372 * (This would work for long-to-int, but that instruction is actually
4373 * an exact match for OP_MOVE.)
4376 GET_OPB(a3) # a3 <- B
4377 GET_OPA4(rOBJ) # t1 <- A+
4378 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4380 LOAD64(rARG0, rARG1, a3) # a0/a1 <- vB/vB+1
4382 LOAD64(rARG0, rARG1, a3)
4384 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4387 JAL(__floatdisf) # a0 <- op, a0-a3 changed
4389 .LOP_LONG_TO_FLOAT_set_vreg:
4390 SET_VREG(v0, rOBJ) # vA <- result0
4394 .LOP_LONG_TO_FLOAT_set_vreg_f:
4395 SET_VREG_F(fv0, rOBJ) # vA <- result0
4397 GET_INST_OPCODE(t0) # extract opcode from rINST
4398 GOTO_OPCODE(t0) # jump to next instruction
4399 /* 10-11 instructions */
4402 /* ------------------------------ */
4404 .L_OP_LONG_TO_DOUBLE: /* 0x86 */
4405 /* File: mips/OP_LONG_TO_DOUBLE.S */
4406 /* File: mips/unflopWide.S */
4408 * Generic 64-bit unary operation. Provide an "instr" line that
4409 * specifies an instruction that performs "result = op a0/a1".
4410 * This could be a MIPS instruction or a function call.
4412 * long-to-double, double-to-long
4415 GET_OPA4(rOBJ) # t1 <- A+
4416 GET_OPB(a3) # a3 <- B
4417 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4418 EAS2(rOBJ, rFP, rOBJ) # t1 <- &fp[A]
4420 LOAD64(rARG0, rARG1, a3) # a0/a1 <- vAA
4422 LOAD64(rARG0, rARG1, a3)
4424 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4426 JAL(__floatdidf) # a0/a1 <- op, a2-a3 changed
4428 .LOP_LONG_TO_DOUBLE_set_vreg:
4430 STORE64(rRESULT0, rRESULT1, rOBJ) # vAA <- a0/a1
4432 STORE64_F(fv0, fv0f, rOBJ) # vAA <- a0/a1
4434 GET_INST_OPCODE(t0) # extract opcode from rINST
4435 GOTO_OPCODE(t0) # jump to next instruction
4436 /* 12-13 instructions */
4440 /* ------------------------------ */
4442 .L_OP_FLOAT_TO_INT: /* 0x87 */
4443 /* File: mips/OP_FLOAT_TO_INT.S */
4444 /* File: mips/unflop.S */
4446 * Generic 32-bit unary operation. Provide an "instr" line that
4447 * specifies an instruction that performs "result = op a0".
4448 * This could be a MIPS instruction or a function call.
4450 * for: int-to-float, float-to-int
4453 GET_OPB(a3) # a3 <- B
4454 GET_OPA4(rOBJ) # t0 <- A+
4456 GET_VREG(a0, a3) # a0 <- vB
4461 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4463 b f2i_doconv # a0 <- op, a0-a3 changed
4465 .LOP_FLOAT_TO_INT_set_vreg:
4466 SET_VREG(v0, rOBJ) # vAA <- result0
4470 .LOP_FLOAT_TO_INT_set_vreg_f:
4471 SET_VREG_F(fv0, rOBJ)
4473 GET_INST_OPCODE(t1) # extract opcode from rINST
4474 GOTO_OPCODE(t1) # jump to next instruction
4475 /* 9-10 instructions */
4478 /* ------------------------------ */
4480 .L_OP_FLOAT_TO_LONG: /* 0x88 */
4481 /* File: mips/OP_FLOAT_TO_LONG.S */
4482 /* File: mips/unflopWider.S */
4484 * Generic 32bit-to-64bit unary operation. Provide an "instr" line
4485 * that specifies an instruction that performs "result = op a0", where
4486 * "result" is a 64-bit quantity in a0/a1.
4488 * For: int-to-double, float-to-long, float-to-double
4491 GET_OPA4(rOBJ) # rOBJ <- A+
4492 GET_OPB(a3) # a3 <- B
4494 GET_VREG(a0, a3) # a0 <- vB
4498 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
4499 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4502 b f2l_doconv # result <- op, a0-a3 changed
4504 .LOP_FLOAT_TO_LONG_set_vreg:
4505 STORE64(rRESULT0, rRESULT1, rOBJ) # vA/vA+1 <- a0/a1
4509 .LOP_FLOAT_TO_LONG_set_vreg:
4510 STORE64(rRESULT0, rRESULT1, rOBJ) # vA/vA+1 <- a0/a1
4512 GET_INST_OPCODE(t0) # extract opcode from rINST
4513 GOTO_OPCODE(t0) # jump to next instruction
4514 /* 10-11 instructions */
4517 /* ------------------------------ */
4519 .L_OP_FLOAT_TO_DOUBLE: /* 0x89 */
4520 /* File: mips/OP_FLOAT_TO_DOUBLE.S */
4521 /* File: mips/unflopWider.S */
4523 * Generic 32bit-to-64bit unary operation. Provide an "instr" line
4524 * that specifies an instruction that performs "result = op a0", where
4525 * "result" is a 64-bit quantity in a0/a1.
4527 * For: int-to-double, float-to-long, float-to-double
4530 GET_OPA4(rOBJ) # rOBJ <- A+
4531 GET_OPB(a3) # a3 <- B
4533 GET_VREG(a0, a3) # a0 <- vB
4537 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
4538 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4541 JAL(__extendsfdf2) # result <- op, a0-a3 changed
4543 .LOP_FLOAT_TO_DOUBLE_set_vreg:
4544 STORE64(rRESULT0, rRESULT1, rOBJ) # vA/vA+1 <- a0/a1
4548 .LOP_FLOAT_TO_DOUBLE_set_vreg:
4549 STORE64_F(fv0, fv0f, rOBJ) # vA/vA+1 <- a0/a1
4551 GET_INST_OPCODE(t0) # extract opcode from rINST
4552 GOTO_OPCODE(t0) # jump to next instruction
4553 /* 10-11 instructions */
4556 /* ------------------------------ */
4558 .L_OP_DOUBLE_TO_INT: /* 0x8a */
4559 /* File: mips/OP_DOUBLE_TO_INT.S */
4560 /* File: mips/unopNarrower.S */
4562 * Generic 64bit-to-32bit unary operation. Provide an "instr" line
4563 * that specifies an instruction that performs "result = op a0/a1", where
4564 * "result" is a 32-bit quantity in a0.
4566 * For: long-to-float, double-to-int, double-to-float
4567 * If hard floating point support is available, use fa0 as the parameter, except for
4568 * long-to-float opcode.
4569 * (This would work for long-to-int, but that instruction is actually
4570 * an exact match for OP_MOVE.)
4573 GET_OPB(a3) # a3 <- B
4574 GET_OPA4(rOBJ) # t1 <- A+
4575 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4577 LOAD64(rARG0, rARG1, a3) # a0/a1 <- vB/vB+1
4579 LOAD64_F(fa0, fa0f, a3)
4581 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4584 b d2i_doconv # a0 <- op, a0-a3 changed
4586 .LOP_DOUBLE_TO_INT_set_vreg:
4587 SET_VREG(v0, rOBJ) # vA <- result0
4591 .LOP_DOUBLE_TO_INT_set_vreg_f:
4592 SET_VREG_F(fv0, rOBJ) # vA <- result0
4594 GET_INST_OPCODE(t0) # extract opcode from rINST
4595 GOTO_OPCODE(t0) # jump to next instruction
4596 /* 10-11 instructions */
4599 * Convert the double in a0/a1 to an int in a0.
4601 * We have to clip values to int min/max per the specification. The
4602 * expected common case is a "reasonable" value that converts directly
4603 * to modest integer. The EABI convert function isn't doing this for us.
4604 * Use rBIX / rTEMP as global to hold arguments (they are not bound to a global var)
4607 /* ------------------------------ */
4609 .L_OP_DOUBLE_TO_LONG: /* 0x8b */
4610 /* File: mips/OP_DOUBLE_TO_LONG.S */
4611 /* File: mips/unflopWide.S */
4613 * Generic 64-bit unary operation. Provide an "instr" line that
4614 * specifies an instruction that performs "result = op a0/a1".
4615 * This could be a MIPS instruction or a function call.
4617 * long-to-double, double-to-long
4620 GET_OPA4(rOBJ) # t1 <- A+
4621 GET_OPB(a3) # a3 <- B
4622 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4623 EAS2(rOBJ, rFP, rOBJ) # t1 <- &fp[A]
4625 LOAD64(rARG0, rARG1, a3) # a0/a1 <- vAA
4627 LOAD64_F(fa0, fa0f, a3)
4629 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4631 b d2l_doconv # a0/a1 <- op, a2-a3 changed
4633 .LOP_DOUBLE_TO_LONG_set_vreg:
4635 STORE64(rRESULT0, rRESULT1, rOBJ) # vAA <- a0/a1
4637 STORE64(rRESULT0, rRESULT1, rOBJ) # vAA <- a0/a1
4639 GET_INST_OPCODE(t0) # extract opcode from rINST
4640 GOTO_OPCODE(t0) # jump to next instruction
4641 /* 12-13 instructions */
4645 /* ------------------------------ */
4647 .L_OP_DOUBLE_TO_FLOAT: /* 0x8c */
4648 /* File: mips/OP_DOUBLE_TO_FLOAT.S */
4649 /* File: mips/unopNarrower.S */
4651 * Generic 64bit-to-32bit unary operation. Provide an "instr" line
4652 * that specifies an instruction that performs "result = op a0/a1", where
4653 * "result" is a 32-bit quantity in a0.
4655 * For: long-to-float, double-to-int, double-to-float
4656 * If hard floating point support is available, use fa0 as the parameter, except for
4657 * long-to-float opcode.
4658 * (This would work for long-to-int, but that instruction is actually
4659 * an exact match for OP_MOVE.)
4662 GET_OPB(a3) # a3 <- B
4663 GET_OPA4(rOBJ) # t1 <- A+
4664 EAS2(a3, rFP, a3) # a3 <- &fp[B]
4666 LOAD64(rARG0, rARG1, a3) # a0/a1 <- vB/vB+1
4668 LOAD64_F(fa0, fa0f, a3)
4670 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4673 JAL(__truncdfsf2) # a0 <- op, a0-a3 changed
4675 .LOP_DOUBLE_TO_FLOAT_set_vreg:
4676 SET_VREG(v0, rOBJ) # vA <- result0
4680 .LOP_DOUBLE_TO_FLOAT_set_vreg_f:
4681 SET_VREG_F(fv0, rOBJ) # vA <- result0
4683 GET_INST_OPCODE(t0) # extract opcode from rINST
4684 GOTO_OPCODE(t0) # jump to next instruction
4685 /* 10-11 instructions */
4688 /* ------------------------------ */
4690 .L_OP_INT_TO_BYTE: /* 0x8d */
4691 /* File: mips/OP_INT_TO_BYTE.S */
4692 /* File: mips/unop.S */
4694 * Generic 32-bit unary operation. Provide an "instr" line that
4695 * specifies an instruction that performs "result = op a0".
4696 * This could be a MIPS instruction or a function call.
4698 * for: neg-int, not-int, neg-float, int-to-float, float-to-int,
4699 * int-to-byte, int-to-char, int-to-short
4702 GET_OPB(a3) # a3 <- B
4703 GET_OPA4(t0) # t0 <- A+
4704 GET_VREG(a0, a3) # a0 <- vB
4705 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4706 sll a0, a0, 24 # optional op
4707 sra a0, a0, 24 # a0 <- op, a0-a3 changed
4708 GET_INST_OPCODE(t1) # extract opcode from rINST
4709 SET_VREG_GOTO(a0, t0, t1) # vAA <- result0
4710 /* 9-10 instructions */
4713 /* ------------------------------ */
4715 .L_OP_INT_TO_CHAR: /* 0x8e */
4716 /* File: mips/OP_INT_TO_CHAR.S */
4717 /* File: mips/unop.S */
4719 * Generic 32-bit unary operation. Provide an "instr" line that
4720 * specifies an instruction that performs "result = op a0".
4721 * This could be a MIPS instruction or a function call.
4723 * for: neg-int, not-int, neg-float, int-to-float, float-to-int,
4724 * int-to-byte, int-to-char, int-to-short
4727 GET_OPB(a3) # a3 <- B
4728 GET_OPA4(t0) # t0 <- A+
4729 GET_VREG(a0, a3) # a0 <- vB
4730 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4732 and a0, 0xffff # a0 <- op, a0-a3 changed
4733 GET_INST_OPCODE(t1) # extract opcode from rINST
4734 SET_VREG_GOTO(a0, t0, t1) # vAA <- result0
4735 /* 9-10 instructions */
4738 /* ------------------------------ */
4740 .L_OP_INT_TO_SHORT: /* 0x8f */
4741 /* File: mips/OP_INT_TO_SHORT.S */
4742 /* File: mips/unop.S */
4744 * Generic 32-bit unary operation. Provide an "instr" line that
4745 * specifies an instruction that performs "result = op a0".
4746 * This could be a MIPS instruction or a function call.
4748 * for: neg-int, not-int, neg-float, int-to-float, float-to-int,
4749 * int-to-byte, int-to-char, int-to-short
4752 GET_OPB(a3) # a3 <- B
4753 GET_OPA4(t0) # t0 <- A+
4754 GET_VREG(a0, a3) # a0 <- vB
4755 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
4756 sll a0, 16 # optional op
4757 sra a0, 16 # a0 <- op, a0-a3 changed
4758 GET_INST_OPCODE(t1) # extract opcode from rINST
4759 SET_VREG_GOTO(a0, t0, t1) # vAA <- result0
4760 /* 9-10 instructions */
4763 /* ------------------------------ */
4765 .L_OP_ADD_INT: /* 0x90 */
4766 /* File: mips/OP_ADD_INT.S */
4767 /* File: mips/binop.S */
4769 * Generic 32-bit binary operation. Provide an "instr" line that
4770 * specifies an instruction that performs "result = a0 op a1".
4771 * This could be a MIPS instruction or a function call. (If the result
4772 * comes back in a register other than a0, you can override "result".)
4774 * If "chkzero" is set to 1, we perform a divide-by-zero check on
4775 * vCC (a1). Useful for integer division and modulus. Note that we
4776 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
4777 * handles it correctly.
4779 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
4780 * xor-int, shl-int, shr-int, ushr-int
4782 /* binop vAA, vBB, vCC */
4783 FETCH(a0, 1) # a0 <- CCBB
4784 GET_OPA(rOBJ) # rOBJ <- AA
4785 srl a3, a0, 8 # a3 <- CC
4786 and a2, a0, 255 # a2 <- BB
4787 GET_VREG(a1, a3) # a1 <- vCC
4788 GET_VREG(a0, a2) # a0 <- vBB
4790 # is second operand zero?
4791 beqz a1, common_errDivideByZero
4794 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
4796 addu a0, a0, a1 # a0 <- op, a0-a3 changed
4797 GET_INST_OPCODE(t0) # extract opcode from rINST
4798 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
4799 /* 11-14 instructions */
4803 /* ------------------------------ */
4805 .L_OP_SUB_INT: /* 0x91 */
4806 /* File: mips/OP_SUB_INT.S */
4807 /* File: mips/binop.S */
4809 * Generic 32-bit binary operation. Provide an "instr" line that
4810 * specifies an instruction that performs "result = a0 op a1".
4811 * This could be a MIPS instruction or a function call. (If the result
4812 * comes back in a register other than a0, you can override "result".)
4814 * If "chkzero" is set to 1, we perform a divide-by-zero check on
4815 * vCC (a1). Useful for integer division and modulus. Note that we
4816 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
4817 * handles it correctly.
4819 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
4820 * xor-int, shl-int, shr-int, ushr-int
4822 /* binop vAA, vBB, vCC */
4823 FETCH(a0, 1) # a0 <- CCBB
4824 GET_OPA(rOBJ) # rOBJ <- AA
4825 srl a3, a0, 8 # a3 <- CC
4826 and a2, a0, 255 # a2 <- BB
4827 GET_VREG(a1, a3) # a1 <- vCC
4828 GET_VREG(a0, a2) # a0 <- vBB
4830 # is second operand zero?
4831 beqz a1, common_errDivideByZero
4834 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
4836 subu a0, a0, a1 # a0 <- op, a0-a3 changed
4837 GET_INST_OPCODE(t0) # extract opcode from rINST
4838 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
4839 /* 11-14 instructions */
4843 /* ------------------------------ */
4845 .L_OP_MUL_INT: /* 0x92 */
4846 /* File: mips/OP_MUL_INT.S */
4847 /* File: mips/binop.S */
4849 * Generic 32-bit binary operation. Provide an "instr" line that
4850 * specifies an instruction that performs "result = a0 op a1".
4851 * This could be a MIPS instruction or a function call. (If the result
4852 * comes back in a register other than a0, you can override "result".)
4854 * If "chkzero" is set to 1, we perform a divide-by-zero check on
4855 * vCC (a1). Useful for integer division and modulus. Note that we
4856 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
4857 * handles it correctly.
4859 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
4860 * xor-int, shl-int, shr-int, ushr-int
4862 /* binop vAA, vBB, vCC */
4863 FETCH(a0, 1) # a0 <- CCBB
4864 GET_OPA(rOBJ) # rOBJ <- AA
4865 srl a3, a0, 8 # a3 <- CC
4866 and a2, a0, 255 # a2 <- BB
4867 GET_VREG(a1, a3) # a1 <- vCC
4868 GET_VREG(a0, a2) # a0 <- vBB
4870 # is second operand zero?
4871 beqz a1, common_errDivideByZero
4874 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
4876 mul a0, a0, a1 # a0 <- op, a0-a3 changed
4877 GET_INST_OPCODE(t0) # extract opcode from rINST
4878 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
4879 /* 11-14 instructions */
4883 /* ------------------------------ */
4885 .L_OP_DIV_INT: /* 0x93 */
4886 /* File: mips/OP_DIV_INT.S */
4887 /* File: mips/binop.S */
4889 * Generic 32-bit binary operation. Provide an "instr" line that
4890 * specifies an instruction that performs "result = a0 op a1".
4891 * This could be a MIPS instruction or a function call. (If the result
4892 * comes back in a register other than a0, you can override "result".)
4894 * If "chkzero" is set to 1, we perform a divide-by-zero check on
4895 * vCC (a1). Useful for integer division and modulus. Note that we
4896 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
4897 * handles it correctly.
4899 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
4900 * xor-int, shl-int, shr-int, ushr-int
4902 /* binop vAA, vBB, vCC */
4903 FETCH(a0, 1) # a0 <- CCBB
4904 GET_OPA(rOBJ) # rOBJ <- AA
4905 srl a3, a0, 8 # a3 <- CC
4906 and a2, a0, 255 # a2 <- BB
4907 GET_VREG(a1, a3) # a1 <- vCC
4908 GET_VREG(a0, a2) # a0 <- vBB
4910 # is second operand zero?
4911 beqz a1, common_errDivideByZero
4914 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
4916 div zero, a0, a1; mflo a0 # a0 <- op, a0-a3 changed
4917 GET_INST_OPCODE(t0) # extract opcode from rINST
4918 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
4919 /* 11-14 instructions */
4923 /* ------------------------------ */
4925 .L_OP_REM_INT: /* 0x94 */
4926 /* File: mips/OP_REM_INT.S */
4927 /* File: mips/binop.S */
4929 * Generic 32-bit binary operation. Provide an "instr" line that
4930 * specifies an instruction that performs "result = a0 op a1".
4931 * This could be a MIPS instruction or a function call. (If the result
4932 * comes back in a register other than a0, you can override "result".)
4934 * If "chkzero" is set to 1, we perform a divide-by-zero check on
4935 * vCC (a1). Useful for integer division and modulus. Note that we
4936 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
4937 * handles it correctly.
4939 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
4940 * xor-int, shl-int, shr-int, ushr-int
4942 /* binop vAA, vBB, vCC */
4943 FETCH(a0, 1) # a0 <- CCBB
4944 GET_OPA(rOBJ) # rOBJ <- AA
4945 srl a3, a0, 8 # a3 <- CC
4946 and a2, a0, 255 # a2 <- BB
4947 GET_VREG(a1, a3) # a1 <- vCC
4948 GET_VREG(a0, a2) # a0 <- vBB
4950 # is second operand zero?
4951 beqz a1, common_errDivideByZero
4954 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
4956 div zero, a0, a1; mfhi a0 # a0 <- op, a0-a3 changed
4957 GET_INST_OPCODE(t0) # extract opcode from rINST
4958 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
4959 /* 11-14 instructions */
4963 /* ------------------------------ */
4965 .L_OP_AND_INT: /* 0x95 */
4966 /* File: mips/OP_AND_INT.S */
4967 /* File: mips/binop.S */
4969 * Generic 32-bit binary operation. Provide an "instr" line that
4970 * specifies an instruction that performs "result = a0 op a1".
4971 * This could be a MIPS instruction or a function call. (If the result
4972 * comes back in a register other than a0, you can override "result".)
4974 * If "chkzero" is set to 1, we perform a divide-by-zero check on
4975 * vCC (a1). Useful for integer division and modulus. Note that we
4976 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
4977 * handles it correctly.
4979 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
4980 * xor-int, shl-int, shr-int, ushr-int
4982 /* binop vAA, vBB, vCC */
4983 FETCH(a0, 1) # a0 <- CCBB
4984 GET_OPA(rOBJ) # rOBJ <- AA
4985 srl a3, a0, 8 # a3 <- CC
4986 and a2, a0, 255 # a2 <- BB
4987 GET_VREG(a1, a3) # a1 <- vCC
4988 GET_VREG(a0, a2) # a0 <- vBB
4990 # is second operand zero?
4991 beqz a1, common_errDivideByZero
4994 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
4996 and a0, a0, a1 # a0 <- op, a0-a3 changed
4997 GET_INST_OPCODE(t0) # extract opcode from rINST
4998 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
4999 /* 11-14 instructions */
5003 /* ------------------------------ */
5005 .L_OP_OR_INT: /* 0x96 */
5006 /* File: mips/OP_OR_INT.S */
5007 /* File: mips/binop.S */
5009 * Generic 32-bit binary operation. Provide an "instr" line that
5010 * specifies an instruction that performs "result = a0 op a1".
5011 * This could be a MIPS instruction or a function call. (If the result
5012 * comes back in a register other than a0, you can override "result".)
5014 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5015 * vCC (a1). Useful for integer division and modulus. Note that we
5016 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
5017 * handles it correctly.
5019 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
5020 * xor-int, shl-int, shr-int, ushr-int
5022 /* binop vAA, vBB, vCC */
5023 FETCH(a0, 1) # a0 <- CCBB
5024 GET_OPA(rOBJ) # rOBJ <- AA
5025 srl a3, a0, 8 # a3 <- CC
5026 and a2, a0, 255 # a2 <- BB
5027 GET_VREG(a1, a3) # a1 <- vCC
5028 GET_VREG(a0, a2) # a0 <- vBB
5030 # is second operand zero?
5031 beqz a1, common_errDivideByZero
5034 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5036 or a0, a0, a1 # a0 <- op, a0-a3 changed
5037 GET_INST_OPCODE(t0) # extract opcode from rINST
5038 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
5039 /* 11-14 instructions */
5043 /* ------------------------------ */
5045 .L_OP_XOR_INT: /* 0x97 */
5046 /* File: mips/OP_XOR_INT.S */
5047 /* File: mips/binop.S */
5049 * Generic 32-bit binary operation. Provide an "instr" line that
5050 * specifies an instruction that performs "result = a0 op a1".
5051 * This could be a MIPS instruction or a function call. (If the result
5052 * comes back in a register other than a0, you can override "result".)
5054 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5055 * vCC (a1). Useful for integer division and modulus. Note that we
5056 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
5057 * handles it correctly.
5059 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
5060 * xor-int, shl-int, shr-int, ushr-int
5062 /* binop vAA, vBB, vCC */
5063 FETCH(a0, 1) # a0 <- CCBB
5064 GET_OPA(rOBJ) # rOBJ <- AA
5065 srl a3, a0, 8 # a3 <- CC
5066 and a2, a0, 255 # a2 <- BB
5067 GET_VREG(a1, a3) # a1 <- vCC
5068 GET_VREG(a0, a2) # a0 <- vBB
5070 # is second operand zero?
5071 beqz a1, common_errDivideByZero
5074 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5076 xor a0, a0, a1 # a0 <- op, a0-a3 changed
5077 GET_INST_OPCODE(t0) # extract opcode from rINST
5078 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
5079 /* 11-14 instructions */
5083 /* ------------------------------ */
5085 .L_OP_SHL_INT: /* 0x98 */
5086 /* File: mips/OP_SHL_INT.S */
5087 /* File: mips/binop.S */
5089 * Generic 32-bit binary operation. Provide an "instr" line that
5090 * specifies an instruction that performs "result = a0 op a1".
5091 * This could be a MIPS instruction or a function call. (If the result
5092 * comes back in a register other than a0, you can override "result".)
5094 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5095 * vCC (a1). Useful for integer division and modulus. Note that we
5096 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
5097 * handles it correctly.
5099 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
5100 * xor-int, shl-int, shr-int, ushr-int
5102 /* binop vAA, vBB, vCC */
5103 FETCH(a0, 1) # a0 <- CCBB
5104 GET_OPA(rOBJ) # rOBJ <- AA
5105 srl a3, a0, 8 # a3 <- CC
5106 and a2, a0, 255 # a2 <- BB
5107 GET_VREG(a1, a3) # a1 <- vCC
5108 GET_VREG(a0, a2) # a0 <- vBB
5110 # is second operand zero?
5111 beqz a1, common_errDivideByZero
5114 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5115 and a1, a1, 31 # optional op
5116 sll a0, a0, a1 # a0 <- op, a0-a3 changed
5117 GET_INST_OPCODE(t0) # extract opcode from rINST
5118 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
5119 /* 11-14 instructions */
5123 /* ------------------------------ */
5125 .L_OP_SHR_INT: /* 0x99 */
5126 /* File: mips/OP_SHR_INT.S */
5127 /* File: mips/binop.S */
5129 * Generic 32-bit binary operation. Provide an "instr" line that
5130 * specifies an instruction that performs "result = a0 op a1".
5131 * This could be a MIPS instruction or a function call. (If the result
5132 * comes back in a register other than a0, you can override "result".)
5134 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5135 * vCC (a1). Useful for integer division and modulus. Note that we
5136 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
5137 * handles it correctly.
5139 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
5140 * xor-int, shl-int, shr-int, ushr-int
5142 /* binop vAA, vBB, vCC */
5143 FETCH(a0, 1) # a0 <- CCBB
5144 GET_OPA(rOBJ) # rOBJ <- AA
5145 srl a3, a0, 8 # a3 <- CC
5146 and a2, a0, 255 # a2 <- BB
5147 GET_VREG(a1, a3) # a1 <- vCC
5148 GET_VREG(a0, a2) # a0 <- vBB
5150 # is second operand zero?
5151 beqz a1, common_errDivideByZero
5154 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5155 and a1, a1, 31 # optional op
5156 sra a0, a0, a1 # a0 <- op, a0-a3 changed
5157 GET_INST_OPCODE(t0) # extract opcode from rINST
5158 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
5159 /* 11-14 instructions */
5163 /* ------------------------------ */
5165 .L_OP_USHR_INT: /* 0x9a */
5166 /* File: mips/OP_USHR_INT.S */
5167 /* File: mips/binop.S */
5169 * Generic 32-bit binary operation. Provide an "instr" line that
5170 * specifies an instruction that performs "result = a0 op a1".
5171 * This could be a MIPS instruction or a function call. (If the result
5172 * comes back in a register other than a0, you can override "result".)
5174 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5175 * vCC (a1). Useful for integer division and modulus. Note that we
5176 * *don't* check for (INT_MIN / -1) here, because the ARM math lib
5177 * handles it correctly.
5179 * For: add-int, sub-int, mul-int, div-int, rem-int, and-int, or-int,
5180 * xor-int, shl-int, shr-int, ushr-int
5182 /* binop vAA, vBB, vCC */
5183 FETCH(a0, 1) # a0 <- CCBB
5184 GET_OPA(rOBJ) # rOBJ <- AA
5185 srl a3, a0, 8 # a3 <- CC
5186 and a2, a0, 255 # a2 <- BB
5187 GET_VREG(a1, a3) # a1 <- vCC
5188 GET_VREG(a0, a2) # a0 <- vBB
5190 # is second operand zero?
5191 beqz a1, common_errDivideByZero
5194 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5195 and a1, a1, 31 # optional op
5196 srl a0, a0, a1 # a0 <- op, a0-a3 changed
5197 GET_INST_OPCODE(t0) # extract opcode from rINST
5198 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
5199 /* 11-14 instructions */
5203 /* ------------------------------ */
5205 .L_OP_ADD_LONG: /* 0x9b */
5206 /* File: mips/OP_ADD_LONG.S */
5208 * The compiler generates the following sequence for
5209 * [v1 v0] = [a1 a0] + [a3 a2];
5215 /* File: mips/binopWide.S */
5217 * Generic 64-bit binary operation. Provide an "instr" line that
5218 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5219 * This could be a MIPS instruction or a function call. (If the result
5220 * comes back in a register other than a0, you can override "result".)
5222 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5223 * vCC (a1). Useful for integer division and modulus.
5225 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5228 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5230 /* binop vAA, vBB, vCC */
5231 FETCH(a0, 1) # a0 <- CCBB
5232 GET_OPA(rOBJ) # rOBJ <- AA
5233 and a2, a0, 255 # a2 <- BB
5234 srl a3, a0, 8 # a3 <- CC
5235 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5236 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5237 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5238 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
5239 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5241 or t0, a2, a3 # second arg (a2-a3) is zero?
5242 beqz t0, common_errDivideByZero
5244 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5246 addu v0, a2, a0 # optional op
5247 addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1 # result <- op, a0-a3 changed
5248 GET_INST_OPCODE(t0) # extract opcode from rINST
5249 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
5250 GOTO_OPCODE(t0) # jump to next instruction
5251 /* 14-17 instructions */
5255 /* ------------------------------ */
5257 .L_OP_SUB_LONG: /* 0x9c */
5258 /* File: mips/OP_SUB_LONG.S */
5260 * For little endian the code sequence looks as follows:
5266 /* File: mips/binopWide.S */
5268 * Generic 64-bit binary operation. Provide an "instr" line that
5269 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5270 * This could be a MIPS instruction or a function call. (If the result
5271 * comes back in a register other than a0, you can override "result".)
5273 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5274 * vCC (a1). Useful for integer division and modulus.
5276 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5279 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5281 /* binop vAA, vBB, vCC */
5282 FETCH(a0, 1) # a0 <- CCBB
5283 GET_OPA(rOBJ) # rOBJ <- AA
5284 and a2, a0, 255 # a2 <- BB
5285 srl a3, a0, 8 # a3 <- CC
5286 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5287 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5288 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5289 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
5290 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5292 or t0, a2, a3 # second arg (a2-a3) is zero?
5293 beqz t0, common_errDivideByZero
5295 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5297 subu v0, a0, a2 # optional op
5298 subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0 # result <- op, a0-a3 changed
5299 GET_INST_OPCODE(t0) # extract opcode from rINST
5300 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
5301 GOTO_OPCODE(t0) # jump to next instruction
5302 /* 14-17 instructions */
5307 /* ------------------------------ */
5309 .L_OP_MUL_LONG: /* 0x9d */
5310 /* File: mips/OP_MUL_LONG.S */
5312 * Signed 64-bit integer multiply.
5322 /* mul-long vAA, vBB, vCC */
5323 FETCH(a0, 1) # a0 <- CCBB
5324 and t0, a0, 255 # a2 <- BB
5325 srl t1, a0, 8 # a3 <- CC
5326 EAS2(t0, rFP, t0) # t0 <- &fp[BB]
5327 LOAD64(a0, a1, t0) # a0/a1 <- vBB/vBB+1
5329 EAS2(t1, rFP, t1) # t0 <- &fp[CC]
5330 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5332 mul v1, a3, a0 # v1= a3a0
5336 mul t0, a2, a1 # t0= a2a1
5337 addu v1, v1, t1 # v1+= hi(a2a0)
5338 addu v1, v1, t0 # v1= a3a0 + a2a1;
5340 GET_OPA(a0) # a0 <- AA
5341 EAS2(a0, rFP, a0) # a0 <- &fp[A]
5342 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5343 b .LOP_MUL_LONG_finish
5345 /* ------------------------------ */
5347 .L_OP_DIV_LONG: /* 0x9e */
5348 /* File: mips/OP_DIV_LONG.S */
5349 #ifdef HAVE_LITTLE_ENDIAN
5350 /* File: mips/binopWide.S */
5352 * Generic 64-bit binary operation. Provide an "instr" line that
5353 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5354 * This could be a MIPS instruction or a function call. (If the result
5355 * comes back in a register other than a0, you can override "result".)
5357 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5358 * vCC (a1). Useful for integer division and modulus.
5360 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5363 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5365 /* binop vAA, vBB, vCC */
5366 FETCH(a0, 1) # a0 <- CCBB
5367 GET_OPA(rOBJ) # rOBJ <- AA
5368 and a2, a0, 255 # a2 <- BB
5369 srl a3, a0, 8 # a3 <- CC
5370 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5371 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5372 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5373 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
5374 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5376 or t0, a2, a3 # second arg (a2-a3) is zero?
5377 beqz t0, common_errDivideByZero
5379 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5382 JAL(__divdi3) # result <- op, a0-a3 changed
5383 GET_INST_OPCODE(t0) # extract opcode from rINST
5384 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
5385 GOTO_OPCODE(t0) # jump to next instruction
5386 /* 14-17 instructions */
5390 /* File: mips/binopWide.S */
5392 * Generic 64-bit binary operation. Provide an "instr" line that
5393 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5394 * This could be a MIPS instruction or a function call. (If the result
5395 * comes back in a register other than a0, you can override "result".)
5397 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5398 * vCC (a1). Useful for integer division and modulus.
5400 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5403 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5405 /* binop vAA, vBB, vCC */
5406 FETCH(a0, 1) # a0 <- CCBB
5407 GET_OPA(rOBJ) # rOBJ <- AA
5408 and a2, a0, 255 # a2 <- BB
5409 srl a3, a0, 8 # a3 <- CC
5410 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5411 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5412 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5413 LOAD64(a1, a0, a2) # a0/a1 <- vBB/vBB+1
5414 LOAD64(a3, a2, t1) # a2/a3 <- vCC/vCC+1
5416 or t0, a3, a2 # second arg (a2-a3) is zero?
5417 beqz t0, common_errDivideByZero
5419 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5422 JAL(__divdi3) # result <- op, a0-a3 changed
5423 GET_INST_OPCODE(t0) # extract opcode from rINST
5424 STORE64(v1, v0, rOBJ) # vAA/vAA+1 <- v1/v0
5425 GOTO_OPCODE(t0) # jump to next instruction
5426 /* 14-17 instructions */
5431 /* ------------------------------ */
5433 .L_OP_REM_LONG: /* 0x9f */
5434 /* File: mips/OP_REM_LONG.S */
5435 /* ldivmod returns quotient in a0/a1 and remainder in a2/a3 */
5436 #ifdef HAVE_LITTLE_ENDIAN
5437 /* File: mips/binopWide.S */
5439 * Generic 64-bit binary operation. Provide an "instr" line that
5440 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5441 * This could be a MIPS instruction or a function call. (If the result
5442 * comes back in a register other than a0, you can override "result".)
5444 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5445 * vCC (a1). Useful for integer division and modulus.
5447 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5450 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5452 /* binop vAA, vBB, vCC */
5453 FETCH(a0, 1) # a0 <- CCBB
5454 GET_OPA(rOBJ) # rOBJ <- AA
5455 and a2, a0, 255 # a2 <- BB
5456 srl a3, a0, 8 # a3 <- CC
5457 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5458 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5459 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5460 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
5461 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5463 or t0, a2, a3 # second arg (a2-a3) is zero?
5464 beqz t0, common_errDivideByZero
5466 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5469 JAL(__moddi3) # result <- op, a0-a3 changed
5470 GET_INST_OPCODE(t0) # extract opcode from rINST
5471 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
5472 GOTO_OPCODE(t0) # jump to next instruction
5473 /* 14-17 instructions */
5477 /* File: mips/binopWide.S */
5479 * Generic 64-bit binary operation. Provide an "instr" line that
5480 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5481 * This could be a MIPS instruction or a function call. (If the result
5482 * comes back in a register other than a0, you can override "result".)
5484 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5485 * vCC (a1). Useful for integer division and modulus.
5487 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5490 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5492 /* binop vAA, vBB, vCC */
5493 FETCH(a0, 1) # a0 <- CCBB
5494 GET_OPA(rOBJ) # rOBJ <- AA
5495 and a2, a0, 255 # a2 <- BB
5496 srl a3, a0, 8 # a3 <- CC
5497 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5498 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5499 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5500 LOAD64(a1, a0, a2) # a0/a1 <- vBB/vBB+1
5501 LOAD64(a3, a2, t1) # a2/a3 <- vCC/vCC+1
5503 or t0, a3, a2 # second arg (a2-a3) is zero?
5504 beqz t0, common_errDivideByZero
5506 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5509 JAL(__moddi3) # result <- op, a0-a3 changed
5510 GET_INST_OPCODE(t0) # extract opcode from rINST
5511 STORE64(v1, v0, rOBJ) # vAA/vAA+1 <- v1/v0
5512 GOTO_OPCODE(t0) # jump to next instruction
5513 /* 14-17 instructions */
5518 /* ------------------------------ */
5520 .L_OP_AND_LONG: /* 0xa0 */
5521 /* File: mips/OP_AND_LONG.S */
5522 /* File: mips/binopWide.S */
5524 * Generic 64-bit binary operation. Provide an "instr" line that
5525 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5526 * This could be a MIPS instruction or a function call. (If the result
5527 * comes back in a register other than a0, you can override "result".)
5529 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5530 * vCC (a1). Useful for integer division and modulus.
5532 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5535 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5537 /* binop vAA, vBB, vCC */
5538 FETCH(a0, 1) # a0 <- CCBB
5539 GET_OPA(rOBJ) # rOBJ <- AA
5540 and a2, a0, 255 # a2 <- BB
5541 srl a3, a0, 8 # a3 <- CC
5542 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5543 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5544 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5545 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
5546 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5548 or t0, a2, a3 # second arg (a2-a3) is zero?
5549 beqz t0, common_errDivideByZero
5551 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5553 and a0, a0, a2 # optional op
5554 and a1, a1, a3 # result <- op, a0-a3 changed
5555 GET_INST_OPCODE(t0) # extract opcode from rINST
5556 STORE64(a0, a1, rOBJ) # vAA/vAA+1 <- a0/a1
5557 GOTO_OPCODE(t0) # jump to next instruction
5558 /* 14-17 instructions */
5562 /* ------------------------------ */
5564 .L_OP_OR_LONG: /* 0xa1 */
5565 /* File: mips/OP_OR_LONG.S */
5566 /* File: mips/binopWide.S */
5568 * Generic 64-bit binary operation. Provide an "instr" line that
5569 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5570 * This could be a MIPS instruction or a function call. (If the result
5571 * comes back in a register other than a0, you can override "result".)
5573 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5574 * vCC (a1). Useful for integer division and modulus.
5576 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5579 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5581 /* binop vAA, vBB, vCC */
5582 FETCH(a0, 1) # a0 <- CCBB
5583 GET_OPA(rOBJ) # rOBJ <- AA
5584 and a2, a0, 255 # a2 <- BB
5585 srl a3, a0, 8 # a3 <- CC
5586 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5587 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5588 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5589 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
5590 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5592 or t0, a2, a3 # second arg (a2-a3) is zero?
5593 beqz t0, common_errDivideByZero
5595 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5597 or a0, a0, a2 # optional op
5598 or a1, a1, a3 # result <- op, a0-a3 changed
5599 GET_INST_OPCODE(t0) # extract opcode from rINST
5600 STORE64(a0, a1, rOBJ) # vAA/vAA+1 <- a0/a1
5601 GOTO_OPCODE(t0) # jump to next instruction
5602 /* 14-17 instructions */
5606 /* ------------------------------ */
5608 .L_OP_XOR_LONG: /* 0xa2 */
5609 /* File: mips/OP_XOR_LONG.S */
5610 /* File: mips/binopWide.S */
5612 * Generic 64-bit binary operation. Provide an "instr" line that
5613 * specifies an instruction that performs "result = a0-a1 op a2-a3".
5614 * This could be a MIPS instruction or a function call. (If the result
5615 * comes back in a register other than a0, you can override "result".)
5617 * If "chkzero" is set to 1, we perform a divide-by-zero check on
5618 * vCC (a1). Useful for integer division and modulus.
5620 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
5623 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
5625 /* binop vAA, vBB, vCC */
5626 FETCH(a0, 1) # a0 <- CCBB
5627 GET_OPA(rOBJ) # rOBJ <- AA
5628 and a2, a0, 255 # a2 <- BB
5629 srl a3, a0, 8 # a3 <- CC
5630 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[AA]
5631 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
5632 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
5633 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
5634 LOAD64(a2, a3, t1) # a2/a3 <- vCC/vCC+1
5636 or t0, a2, a3 # second arg (a2-a3) is zero?
5637 beqz t0, common_errDivideByZero
5639 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5641 xor a0, a0, a2 # optional op
5642 xor a1, a1, a3 # result <- op, a0-a3 changed
5643 GET_INST_OPCODE(t0) # extract opcode from rINST
5644 STORE64(a0, a1, rOBJ) # vAA/vAA+1 <- a0/a1
5645 GOTO_OPCODE(t0) # jump to next instruction
5646 /* 14-17 instructions */
5650 /* ------------------------------ */
5652 .L_OP_SHL_LONG: /* 0xa3 */
5653 /* File: mips/OP_SHL_LONG.S */
5655 * Long integer shift. This is different from the generic 32/64-bit
5656 * binary operations because vAA/vBB are 64-bit but vCC (the shift
5657 * distance) is 32-bit. Also, Dalvik requires us to mask off the low
5658 * 6 bits of the shift distance.
5660 /* shl-long vAA, vBB, vCC */
5661 FETCH(a0, 1) # a0 <- CCBB
5662 GET_OPA(t2) # t2 <- AA
5663 and a3, a0, 255 # a3 <- BB
5664 srl a0, a0, 8 # a0 <- CC
5665 EAS2(a3, rFP, a3) # a3 <- &fp[BB]
5666 GET_VREG(a2, a0) # a2 <- vCC
5667 LOAD64(a0, a1, a3) # a0/a1 <- vBB/vBB+1
5669 EAS2(t2, rFP, t2) # t2 <- &fp[AA]
5670 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5672 sll v0, a0, a2 # rlo<- alo << (shift&31)
5673 not v1, a2 # rhi<- 31-shift (shift is 5b)
5675 srl a0, v1 # alo<- alo >> (32-(shift&31))
5676 sll v1, a1, a2 # rhi<- ahi << (shift&31)
5677 or v1, a0 # rhi<- rhi | alo
5678 andi a2, 0x20 # shift< shift & 0x20
5679 movn v1, v0, a2 # rhi<- rlo (if shift&0x20)
5680 movn v0, zero, a2 # rlo<- 0 (if shift&0x20)
5682 GET_INST_OPCODE(t0) # extract opcode from rINST
5683 STORE64(v0, v1, t2) # vAA/vAA+1 <- a0/a1
5684 GOTO_OPCODE(t0) # jump to next instruction
5687 /* ------------------------------ */
5689 .L_OP_SHR_LONG: /* 0xa4 */
5690 /* File: mips/OP_SHR_LONG.S */
5692 * Long integer shift. This is different from the generic 32/64-bit
5693 * binary operations because vAA/vBB are 64-bit but vCC (the shift
5694 * distance) is 32-bit. Also, Dalvik requires us to mask off the low
5695 * 6 bits of the shift distance.
5697 /* shr-long vAA, vBB, vCC */
5698 FETCH(a0, 1) # a0 <- CCBB
5699 GET_OPA(t3) # t3 <- AA
5700 and a3, a0, 255 # a3 <- BB
5701 srl a0, a0, 8 # a0 <- CC
5702 EAS2(a3, rFP, a3) # a3 <- &fp[BB]
5703 GET_VREG(a2, a0) # a2 <- vCC
5704 LOAD64(a0, a1, a3) # a0/a1 <- vBB/vBB+1
5705 EAS2(t3, rFP, t3) # t3 <- &fp[AA]
5706 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5708 sra v1, a1, a2 # rhi<- ahi >> (shift&31)
5709 srl v0, a0, a2 # rlo<- alo >> (shift&31)
5710 sra a3, a1, 31 # a3<- sign(ah)
5711 not a0, a2 # alo<- 31-shift (shift is 5b)
5713 sll a1, a0 # ahi<- ahi << (32-(shift&31))
5714 or v0, a1 # rlo<- rlo | ahi
5715 andi a2, 0x20 # shift & 0x20
5716 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
5717 movn v1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
5719 STORE64(v0, v1, t3) # vAA/VAA+1 <- v0/v0
5720 GET_INST_OPCODE(t0) # extract opcode from rINST
5721 GOTO_OPCODE(t0) # jump to next instruction
5724 /* ------------------------------ */
5726 .L_OP_USHR_LONG: /* 0xa5 */
5727 /* File: mips/OP_USHR_LONG.S */
5729 * Long integer shift. This is different from the generic 32/64-bit
5730 * binary operations because vAA/vBB are 64-bit but vCC (the shift
5731 * distance) is 32-bit. Also, Dalvik requires us to mask off the low
5732 * 6 bits of the shift distance.
5734 /* ushr-long vAA, vBB, vCC */
5735 FETCH(a0, 1) # a0 <- CCBB
5736 GET_OPA(t0) # t3 <- AA
5737 and a3, a0, 255 # a3 <- BB
5738 srl a0, a0, 8 # a0 <- CC
5739 EAS2(a3, rFP, a3) # a3 <- &fp[BB]
5740 GET_VREG(a2, a0) # a2 <- vCC
5741 LOAD64(a0, a1, a3) # a0/a1 <- vBB/vBB+1
5742 EAS2(rOBJ, rFP, t0) # rOBJ <- &fp[AA]
5744 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5745 srl v1, a1, a2 # rhi<- ahi >> (shift&31)
5746 srl v0, a0, a2 # rlo<- alo >> (shift&31)
5747 not a0, a2 # alo<- 31-n (shift is 5b)
5749 sll a1, a0 # ahi<- ahi << (32-(shift&31))
5750 or v0, a1 # rlo<- rlo | ahi
5751 andi a2, 0x20 # shift & 0x20
5752 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
5753 movn v1, zero, a2 # rhi<- 0 (if shift&0x20)
5755 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
5756 GET_INST_OPCODE(t0) # extract opcode from rINST
5757 GOTO_OPCODE(t0) # jump to next instruction
5760 /* ------------------------------ */
5762 .L_OP_ADD_FLOAT: /* 0xa6 */
5763 /* File: mips/OP_ADD_FLOAT.S */
5764 /* File: mips/binflop.S */
5766 * Generic 32-bit binary float operation.
5768 * For: add-fp, sub-fp, mul-fp, div-fp
5771 /* binop vAA, vBB, vCC */
5772 FETCH(a0, 1) # a0 <- CCBB
5773 GET_OPA(rOBJ) # s5 <- AA
5774 srl a3, a0, 8 # a3 <- CC
5775 and a2, a0, 255 # a2 <- BB
5777 GET_VREG(a1, a3) # a1 <- vCC
5778 GET_VREG(a0, a2) # a0 <- vBB
5780 # is second operand zero?
5781 beqz a1, common_errDivideByZero
5784 GET_VREG_F(fa1, a3) # a1 <- vCC
5785 GET_VREG_F(fa0, a2) # a0 <- vBB
5788 # is second operand zero?
5790 c.eq.s fcc0, ft0, fa1 # condition bit and comparision with 0
5791 bc1t fcc0, common_errDivideByZero
5795 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5798 JAL(__addsf3) # v0 = result
5799 SET_VREG(v0, rOBJ) # vAA <- v0
5801 add.s fv0, fa0, fa1 # f0 = result
5802 SET_VREG_F(fv0, rOBJ) # vAA <- fv0
5804 GET_INST_OPCODE(t0) # extract opcode from rINST
5805 GOTO_OPCODE(t0) # jump to next instruction
5806 /* 11-14 instructions */
5810 /* ------------------------------ */
5812 .L_OP_SUB_FLOAT: /* 0xa7 */
5813 /* File: mips/OP_SUB_FLOAT.S */
5814 /* File: mips/binflop.S */
5816 * Generic 32-bit binary float operation.
5818 * For: add-fp, sub-fp, mul-fp, div-fp
5821 /* binop vAA, vBB, vCC */
5822 FETCH(a0, 1) # a0 <- CCBB
5823 GET_OPA(rOBJ) # s5 <- AA
5824 srl a3, a0, 8 # a3 <- CC
5825 and a2, a0, 255 # a2 <- BB
5827 GET_VREG(a1, a3) # a1 <- vCC
5828 GET_VREG(a0, a2) # a0 <- vBB
5830 # is second operand zero?
5831 beqz a1, common_errDivideByZero
5834 GET_VREG_F(fa1, a3) # a1 <- vCC
5835 GET_VREG_F(fa0, a2) # a0 <- vBB
5838 # is second operand zero?
5840 c.eq.s fcc0, ft0, fa1 # condition bit and comparision with 0
5841 bc1t fcc0, common_errDivideByZero
5845 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5848 JAL(__subsf3) # v0 = result
5849 SET_VREG(v0, rOBJ) # vAA <- v0
5851 sub.s fv0, fa0, fa1 # f0 = result
5852 SET_VREG_F(fv0, rOBJ) # vAA <- fv0
5854 GET_INST_OPCODE(t0) # extract opcode from rINST
5855 GOTO_OPCODE(t0) # jump to next instruction
5856 /* 11-14 instructions */
5860 /* ------------------------------ */
5862 .L_OP_MUL_FLOAT: /* 0xa8 */
5863 /* File: mips/OP_MUL_FLOAT.S */
5864 /* File: mips/binflop.S */
5866 * Generic 32-bit binary float operation.
5868 * For: add-fp, sub-fp, mul-fp, div-fp
5871 /* binop vAA, vBB, vCC */
5872 FETCH(a0, 1) # a0 <- CCBB
5873 GET_OPA(rOBJ) # s5 <- AA
5874 srl a3, a0, 8 # a3 <- CC
5875 and a2, a0, 255 # a2 <- BB
5877 GET_VREG(a1, a3) # a1 <- vCC
5878 GET_VREG(a0, a2) # a0 <- vBB
5880 # is second operand zero?
5881 beqz a1, common_errDivideByZero
5884 GET_VREG_F(fa1, a3) # a1 <- vCC
5885 GET_VREG_F(fa0, a2) # a0 <- vBB
5888 # is second operand zero?
5890 c.eq.s fcc0, ft0, fa1 # condition bit and comparision with 0
5891 bc1t fcc0, common_errDivideByZero
5895 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5898 JAL(__mulsf3) # v0 = result
5899 SET_VREG(v0, rOBJ) # vAA <- v0
5901 mul.s fv0, fa0, fa1 # f0 = result
5902 SET_VREG_F(fv0, rOBJ) # vAA <- fv0
5904 GET_INST_OPCODE(t0) # extract opcode from rINST
5905 GOTO_OPCODE(t0) # jump to next instruction
5906 /* 11-14 instructions */
5910 /* ------------------------------ */
5912 .L_OP_DIV_FLOAT: /* 0xa9 */
5913 /* File: mips/OP_DIV_FLOAT.S */
5914 /* File: mips/binflop.S */
5916 * Generic 32-bit binary float operation.
5918 * For: add-fp, sub-fp, mul-fp, div-fp
5921 /* binop vAA, vBB, vCC */
5922 FETCH(a0, 1) # a0 <- CCBB
5923 GET_OPA(rOBJ) # s5 <- AA
5924 srl a3, a0, 8 # a3 <- CC
5925 and a2, a0, 255 # a2 <- BB
5927 GET_VREG(a1, a3) # a1 <- vCC
5928 GET_VREG(a0, a2) # a0 <- vBB
5930 # is second operand zero?
5931 beqz a1, common_errDivideByZero
5934 GET_VREG_F(fa1, a3) # a1 <- vCC
5935 GET_VREG_F(fa0, a2) # a0 <- vBB
5938 # is second operand zero?
5940 c.eq.s fcc0, ft0, fa1 # condition bit and comparision with 0
5941 bc1t fcc0, common_errDivideByZero
5945 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5948 JAL(__divsf3) # v0 = result
5949 SET_VREG(v0, rOBJ) # vAA <- v0
5951 div.s fv0, fa0, fa1 # f0 = result
5952 SET_VREG_F(fv0, rOBJ) # vAA <- fv0
5954 GET_INST_OPCODE(t0) # extract opcode from rINST
5955 GOTO_OPCODE(t0) # jump to next instruction
5956 /* 11-14 instructions */
5960 /* ------------------------------ */
5962 .L_OP_REM_FLOAT: /* 0xaa */
5963 /* File: mips/OP_REM_FLOAT.S */
5964 /* File: mips/binflop.S */
5966 * Generic 32-bit binary float operation.
5968 * For: add-fp, sub-fp, mul-fp, div-fp
5971 /* binop vAA, vBB, vCC */
5972 FETCH(a0, 1) # a0 <- CCBB
5973 GET_OPA(rOBJ) # s5 <- AA
5974 srl a3, a0, 8 # a3 <- CC
5975 and a2, a0, 255 # a2 <- BB
5977 GET_VREG(a1, a3) # a1 <- vCC
5978 GET_VREG(a0, a2) # a0 <- vBB
5980 # is second operand zero?
5981 beqz a1, common_errDivideByZero
5984 GET_VREG_F(fa1, a3) # a1 <- vCC
5985 GET_VREG_F(fa0, a2) # a0 <- vBB
5988 # is second operand zero?
5990 c.eq.s fcc0, ft0, fa1 # condition bit and comparision with 0
5991 bc1t fcc0, common_errDivideByZero
5995 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
5998 JAL(fmodf) # v0 = result
5999 SET_VREG(v0, rOBJ) # vAA <- v0
6001 JAL(fmodf) # f0 = result
6002 SET_VREG_F(fv0, rOBJ) # vAA <- fv0
6004 GET_INST_OPCODE(t0) # extract opcode from rINST
6005 GOTO_OPCODE(t0) # jump to next instruction
6006 /* 11-14 instructions */
6010 /* ------------------------------ */
6012 .L_OP_ADD_DOUBLE: /* 0xab */
6013 /* File: mips/OP_ADD_DOUBLE.S */
6014 /* File: mips/binflopWide.S */
6016 * Generic 64-bit binary operation. Provide an "instr" line that
6017 * specifies an instruction that performs "result = a0-a1 op a2-a3".
6018 * This could be an MIPS instruction or a function call.
6019 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6020 * vCC (a1). Useful for integer division and modulus.
6022 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
6023 * xor-long, add-double, sub-double, mul-double, div-double,
6026 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
6028 /* binop vAA, vBB, vCC */
6029 FETCH(a0, 1) # a0 <- CCBB
6030 GET_OPA(rOBJ) # s5 <- AA
6031 and a2, a0, 255 # a2 <- BB
6032 srl a3, a0, 8 # a3 <- CC
6033 EAS2(rOBJ, rFP, rOBJ) # s5 <- &fp[AA]
6034 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
6035 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
6037 LOAD64(rARG0, rARG1, a2) # a0/a1 <- vBB/vBB+1
6038 LOAD64(rARG2, rARG3, t1) # a2/a3 <- vCC/vCC+1
6040 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
6041 beqz t0, common_errDivideByZero
6044 LOAD64_F(fa0, fa0f, a2)
6045 LOAD64_F(fa1, fa1f, t1)
6048 c.eq.d fcc0, fa1, ft0
6049 bc1t fcc0, common_errDivideByZero
6053 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
6056 JAL(__adddf3) # result <- op, a0-a3 changed
6057 STORE64(rRESULT0, rRESULT1, rOBJ)
6060 STORE64_F(fv0, fv0f, rOBJ)
6062 GET_INST_OPCODE(t0) # extract opcode from rINST
6063 GOTO_OPCODE(t0) # jump to next instruction
6064 /* 14-17 instructions */
6068 /* ------------------------------ */
6070 .L_OP_SUB_DOUBLE: /* 0xac */
6071 /* File: mips/OP_SUB_DOUBLE.S */
6072 /* File: mips/binflopWide.S */
6074 * Generic 64-bit binary operation. Provide an "instr" line that
6075 * specifies an instruction that performs "result = a0-a1 op a2-a3".
6076 * This could be an MIPS instruction or a function call.
6077 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6078 * vCC (a1). Useful for integer division and modulus.
6080 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
6081 * xor-long, add-double, sub-double, mul-double, div-double,
6084 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
6086 /* binop vAA, vBB, vCC */
6087 FETCH(a0, 1) # a0 <- CCBB
6088 GET_OPA(rOBJ) # s5 <- AA
6089 and a2, a0, 255 # a2 <- BB
6090 srl a3, a0, 8 # a3 <- CC
6091 EAS2(rOBJ, rFP, rOBJ) # s5 <- &fp[AA]
6092 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
6093 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
6095 LOAD64(rARG0, rARG1, a2) # a0/a1 <- vBB/vBB+1
6096 LOAD64(rARG2, rARG3, t1) # a2/a3 <- vCC/vCC+1
6098 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
6099 beqz t0, common_errDivideByZero
6102 LOAD64_F(fa0, fa0f, a2)
6103 LOAD64_F(fa1, fa1f, t1)
6106 c.eq.d fcc0, fa1, ft0
6107 bc1t fcc0, common_errDivideByZero
6111 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
6114 JAL(__subdf3) # result <- op, a0-a3 changed
6115 STORE64(rRESULT0, rRESULT1, rOBJ)
6118 STORE64_F(fv0, fv0f, rOBJ)
6120 GET_INST_OPCODE(t0) # extract opcode from rINST
6121 GOTO_OPCODE(t0) # jump to next instruction
6122 /* 14-17 instructions */
6126 /* ------------------------------ */
6128 .L_OP_MUL_DOUBLE: /* 0xad */
6129 /* File: mips/OP_MUL_DOUBLE.S */
6130 /* File: mips/binflopWide.S */
6132 * Generic 64-bit binary operation. Provide an "instr" line that
6133 * specifies an instruction that performs "result = a0-a1 op a2-a3".
6134 * This could be an MIPS instruction or a function call.
6135 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6136 * vCC (a1). Useful for integer division and modulus.
6138 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
6139 * xor-long, add-double, sub-double, mul-double, div-double,
6142 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
6144 /* binop vAA, vBB, vCC */
6145 FETCH(a0, 1) # a0 <- CCBB
6146 GET_OPA(rOBJ) # s5 <- AA
6147 and a2, a0, 255 # a2 <- BB
6148 srl a3, a0, 8 # a3 <- CC
6149 EAS2(rOBJ, rFP, rOBJ) # s5 <- &fp[AA]
6150 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
6151 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
6153 LOAD64(rARG0, rARG1, a2) # a0/a1 <- vBB/vBB+1
6154 LOAD64(rARG2, rARG3, t1) # a2/a3 <- vCC/vCC+1
6156 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
6157 beqz t0, common_errDivideByZero
6160 LOAD64_F(fa0, fa0f, a2)
6161 LOAD64_F(fa1, fa1f, t1)
6164 c.eq.d fcc0, fa1, ft0
6165 bc1t fcc0, common_errDivideByZero
6169 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
6172 JAL(__muldf3) # result <- op, a0-a3 changed
6173 STORE64(rRESULT0, rRESULT1, rOBJ)
6176 STORE64_F(fv0, fv0f, rOBJ)
6178 GET_INST_OPCODE(t0) # extract opcode from rINST
6179 GOTO_OPCODE(t0) # jump to next instruction
6180 /* 14-17 instructions */
6184 /* ------------------------------ */
6186 .L_OP_DIV_DOUBLE: /* 0xae */
6187 /* File: mips/OP_DIV_DOUBLE.S */
6188 /* File: mips/binflopWide.S */
6190 * Generic 64-bit binary operation. Provide an "instr" line that
6191 * specifies an instruction that performs "result = a0-a1 op a2-a3".
6192 * This could be an MIPS instruction or a function call.
6193 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6194 * vCC (a1). Useful for integer division and modulus.
6196 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
6197 * xor-long, add-double, sub-double, mul-double, div-double,
6200 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
6202 /* binop vAA, vBB, vCC */
6203 FETCH(a0, 1) # a0 <- CCBB
6204 GET_OPA(rOBJ) # s5 <- AA
6205 and a2, a0, 255 # a2 <- BB
6206 srl a3, a0, 8 # a3 <- CC
6207 EAS2(rOBJ, rFP, rOBJ) # s5 <- &fp[AA]
6208 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
6209 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
6211 LOAD64(rARG0, rARG1, a2) # a0/a1 <- vBB/vBB+1
6212 LOAD64(rARG2, rARG3, t1) # a2/a3 <- vCC/vCC+1
6214 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
6215 beqz t0, common_errDivideByZero
6218 LOAD64_F(fa0, fa0f, a2)
6219 LOAD64_F(fa1, fa1f, t1)
6222 c.eq.d fcc0, fa1, ft0
6223 bc1t fcc0, common_errDivideByZero
6227 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
6230 JAL(__divdf3) # result <- op, a0-a3 changed
6231 STORE64(rRESULT0, rRESULT1, rOBJ)
6234 STORE64_F(fv0, fv0f, rOBJ)
6236 GET_INST_OPCODE(t0) # extract opcode from rINST
6237 GOTO_OPCODE(t0) # jump to next instruction
6238 /* 14-17 instructions */
6242 /* ------------------------------ */
6244 .L_OP_REM_DOUBLE: /* 0xaf */
6245 /* File: mips/OP_REM_DOUBLE.S */
6246 /* File: mips/binflopWide.S */
6248 * Generic 64-bit binary operation. Provide an "instr" line that
6249 * specifies an instruction that performs "result = a0-a1 op a2-a3".
6250 * This could be an MIPS instruction or a function call.
6251 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6252 * vCC (a1). Useful for integer division and modulus.
6254 * for: add-long, sub-long, div-long, rem-long, and-long, or-long,
6255 * xor-long, add-double, sub-double, mul-double, div-double,
6258 * IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
6260 /* binop vAA, vBB, vCC */
6261 FETCH(a0, 1) # a0 <- CCBB
6262 GET_OPA(rOBJ) # s5 <- AA
6263 and a2, a0, 255 # a2 <- BB
6264 srl a3, a0, 8 # a3 <- CC
6265 EAS2(rOBJ, rFP, rOBJ) # s5 <- &fp[AA]
6266 EAS2(a2, rFP, a2) # a2 <- &fp[BB]
6267 EAS2(t1, rFP, a3) # a3 <- &fp[CC]
6269 LOAD64(rARG0, rARG1, a2) # a0/a1 <- vBB/vBB+1
6270 LOAD64(rARG2, rARG3, t1) # a2/a3 <- vCC/vCC+1
6272 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
6273 beqz t0, common_errDivideByZero
6276 LOAD64_F(fa0, fa0f, a2)
6277 LOAD64_F(fa1, fa1f, t1)
6280 c.eq.d fcc0, fa1, ft0
6281 bc1t fcc0, common_errDivideByZero
6285 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
6288 JAL(fmod) # result <- op, a0-a3 changed
6289 STORE64(rRESULT0, rRESULT1, rOBJ)
6292 STORE64_F(fv0, fv0f, rOBJ)
6294 GET_INST_OPCODE(t0) # extract opcode from rINST
6295 GOTO_OPCODE(t0) # jump to next instruction
6296 /* 14-17 instructions */
6300 /* ------------------------------ */
6302 .L_OP_ADD_INT_2ADDR: /* 0xb0 */
6303 /* File: mips/OP_ADD_INT_2ADDR.S */
6304 /* File: mips/binop2addr.S */
6306 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6307 * that specifies an instruction that performs "result = a0 op a1".
6308 * This could be an MIPS instruction or a function call.
6310 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6311 * vCC (a1). Useful for integer division and modulus.
6313 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6314 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6315 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6317 /* binop/2addr vA, vB */
6318 GET_OPA4(rOBJ) # rOBJ <- A+
6319 GET_OPB(a3) # a3 <- B
6320 GET_VREG(a0, rOBJ) # a0 <- vA
6321 GET_VREG(a1, a3) # a1 <- vB
6323 # is second operand zero?
6324 beqz a1, common_errDivideByZero
6326 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6329 addu a0, a0, a1 # a0 <- op, a0-a3 changed
6330 GET_INST_OPCODE(t0) # extract opcode from rINST
6331 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6332 /* 10-13 instructions */
6336 /* ------------------------------ */
6338 .L_OP_SUB_INT_2ADDR: /* 0xb1 */
6339 /* File: mips/OP_SUB_INT_2ADDR.S */
6340 /* File: mips/binop2addr.S */
6342 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6343 * that specifies an instruction that performs "result = a0 op a1".
6344 * This could be an MIPS instruction or a function call.
6346 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6347 * vCC (a1). Useful for integer division and modulus.
6349 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6350 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6351 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6353 /* binop/2addr vA, vB */
6354 GET_OPA4(rOBJ) # rOBJ <- A+
6355 GET_OPB(a3) # a3 <- B
6356 GET_VREG(a0, rOBJ) # a0 <- vA
6357 GET_VREG(a1, a3) # a1 <- vB
6359 # is second operand zero?
6360 beqz a1, common_errDivideByZero
6362 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6365 subu a0, a0, a1 # a0 <- op, a0-a3 changed
6366 GET_INST_OPCODE(t0) # extract opcode from rINST
6367 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6368 /* 10-13 instructions */
6372 /* ------------------------------ */
6374 .L_OP_MUL_INT_2ADDR: /* 0xb2 */
6375 /* File: mips/OP_MUL_INT_2ADDR.S */
6376 /* File: mips/binop2addr.S */
6378 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6379 * that specifies an instruction that performs "result = a0 op a1".
6380 * This could be an MIPS instruction or a function call.
6382 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6383 * vCC (a1). Useful for integer division and modulus.
6385 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6386 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6387 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6389 /* binop/2addr vA, vB */
6390 GET_OPA4(rOBJ) # rOBJ <- A+
6391 GET_OPB(a3) # a3 <- B
6392 GET_VREG(a0, rOBJ) # a0 <- vA
6393 GET_VREG(a1, a3) # a1 <- vB
6395 # is second operand zero?
6396 beqz a1, common_errDivideByZero
6398 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6401 mul a0, a0, a1 # a0 <- op, a0-a3 changed
6402 GET_INST_OPCODE(t0) # extract opcode from rINST
6403 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6404 /* 10-13 instructions */
6408 /* ------------------------------ */
6410 .L_OP_DIV_INT_2ADDR: /* 0xb3 */
6411 /* File: mips/OP_DIV_INT_2ADDR.S */
6412 /* File: mips/binop2addr.S */
6414 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6415 * that specifies an instruction that performs "result = a0 op a1".
6416 * This could be an MIPS instruction or a function call.
6418 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6419 * vCC (a1). Useful for integer division and modulus.
6421 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6422 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6423 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6425 /* binop/2addr vA, vB */
6426 GET_OPA4(rOBJ) # rOBJ <- A+
6427 GET_OPB(a3) # a3 <- B
6428 GET_VREG(a0, rOBJ) # a0 <- vA
6429 GET_VREG(a1, a3) # a1 <- vB
6431 # is second operand zero?
6432 beqz a1, common_errDivideByZero
6434 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6437 div zero, a0, a1; mflo a0 # a0 <- op, a0-a3 changed
6438 GET_INST_OPCODE(t0) # extract opcode from rINST
6439 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6440 /* 10-13 instructions */
6444 /* ------------------------------ */
6446 .L_OP_REM_INT_2ADDR: /* 0xb4 */
6447 /* File: mips/OP_REM_INT_2ADDR.S */
6448 /* File: mips/binop2addr.S */
6450 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6451 * that specifies an instruction that performs "result = a0 op a1".
6452 * This could be an MIPS instruction or a function call.
6454 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6455 * vCC (a1). Useful for integer division and modulus.
6457 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6458 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6459 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6461 /* binop/2addr vA, vB */
6462 GET_OPA4(rOBJ) # rOBJ <- A+
6463 GET_OPB(a3) # a3 <- B
6464 GET_VREG(a0, rOBJ) # a0 <- vA
6465 GET_VREG(a1, a3) # a1 <- vB
6467 # is second operand zero?
6468 beqz a1, common_errDivideByZero
6470 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6473 div zero, a0, a1; mfhi a0 # a0 <- op, a0-a3 changed
6474 GET_INST_OPCODE(t0) # extract opcode from rINST
6475 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6476 /* 10-13 instructions */
6480 /* ------------------------------ */
6482 .L_OP_AND_INT_2ADDR: /* 0xb5 */
6483 /* File: mips/OP_AND_INT_2ADDR.S */
6484 /* File: mips/binop2addr.S */
6486 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6487 * that specifies an instruction that performs "result = a0 op a1".
6488 * This could be an MIPS instruction or a function call.
6490 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6491 * vCC (a1). Useful for integer division and modulus.
6493 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6494 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6495 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6497 /* binop/2addr vA, vB */
6498 GET_OPA4(rOBJ) # rOBJ <- A+
6499 GET_OPB(a3) # a3 <- B
6500 GET_VREG(a0, rOBJ) # a0 <- vA
6501 GET_VREG(a1, a3) # a1 <- vB
6503 # is second operand zero?
6504 beqz a1, common_errDivideByZero
6506 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6509 and a0, a0, a1 # a0 <- op, a0-a3 changed
6510 GET_INST_OPCODE(t0) # extract opcode from rINST
6511 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6512 /* 10-13 instructions */
6516 /* ------------------------------ */
6518 .L_OP_OR_INT_2ADDR: /* 0xb6 */
6519 /* File: mips/OP_OR_INT_2ADDR.S */
6520 /* File: mips/binop2addr.S */
6522 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6523 * that specifies an instruction that performs "result = a0 op a1".
6524 * This could be an MIPS instruction or a function call.
6526 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6527 * vCC (a1). Useful for integer division and modulus.
6529 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6530 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6531 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6533 /* binop/2addr vA, vB */
6534 GET_OPA4(rOBJ) # rOBJ <- A+
6535 GET_OPB(a3) # a3 <- B
6536 GET_VREG(a0, rOBJ) # a0 <- vA
6537 GET_VREG(a1, a3) # a1 <- vB
6539 # is second operand zero?
6540 beqz a1, common_errDivideByZero
6542 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6545 or a0, a0, a1 # a0 <- op, a0-a3 changed
6546 GET_INST_OPCODE(t0) # extract opcode from rINST
6547 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6548 /* 10-13 instructions */
6552 /* ------------------------------ */
6554 .L_OP_XOR_INT_2ADDR: /* 0xb7 */
6555 /* File: mips/OP_XOR_INT_2ADDR.S */
6556 /* File: mips/binop2addr.S */
6558 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6559 * that specifies an instruction that performs "result = a0 op a1".
6560 * This could be an MIPS instruction or a function call.
6562 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6563 * vCC (a1). Useful for integer division and modulus.
6565 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6566 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6567 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6569 /* binop/2addr vA, vB */
6570 GET_OPA4(rOBJ) # rOBJ <- A+
6571 GET_OPB(a3) # a3 <- B
6572 GET_VREG(a0, rOBJ) # a0 <- vA
6573 GET_VREG(a1, a3) # a1 <- vB
6575 # is second operand zero?
6576 beqz a1, common_errDivideByZero
6578 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6581 xor a0, a0, a1 # a0 <- op, a0-a3 changed
6582 GET_INST_OPCODE(t0) # extract opcode from rINST
6583 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6584 /* 10-13 instructions */
6588 /* ------------------------------ */
6590 .L_OP_SHL_INT_2ADDR: /* 0xb8 */
6591 /* File: mips/OP_SHL_INT_2ADDR.S */
6592 /* File: mips/binop2addr.S */
6594 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6595 * that specifies an instruction that performs "result = a0 op a1".
6596 * This could be an MIPS instruction or a function call.
6598 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6599 * vCC (a1). Useful for integer division and modulus.
6601 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6602 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6603 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6605 /* binop/2addr vA, vB */
6606 GET_OPA4(rOBJ) # rOBJ <- A+
6607 GET_OPB(a3) # a3 <- B
6608 GET_VREG(a0, rOBJ) # a0 <- vA
6609 GET_VREG(a1, a3) # a1 <- vB
6611 # is second operand zero?
6612 beqz a1, common_errDivideByZero
6614 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6616 and a1, a1, 31 # optional op
6617 sll a0, a0, a1 # a0 <- op, a0-a3 changed
6618 GET_INST_OPCODE(t0) # extract opcode from rINST
6619 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6620 /* 10-13 instructions */
6624 /* ------------------------------ */
6626 .L_OP_SHR_INT_2ADDR: /* 0xb9 */
6627 /* File: mips/OP_SHR_INT_2ADDR.S */
6628 /* File: mips/binop2addr.S */
6630 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6631 * that specifies an instruction that performs "result = a0 op a1".
6632 * This could be an MIPS instruction or a function call.
6634 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6635 * vCC (a1). Useful for integer division and modulus.
6637 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6638 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6639 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6641 /* binop/2addr vA, vB */
6642 GET_OPA4(rOBJ) # rOBJ <- A+
6643 GET_OPB(a3) # a3 <- B
6644 GET_VREG(a0, rOBJ) # a0 <- vA
6645 GET_VREG(a1, a3) # a1 <- vB
6647 # is second operand zero?
6648 beqz a1, common_errDivideByZero
6650 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6652 and a1, a1, 31 # optional op
6653 sra a0, a0, a1 # a0 <- op, a0-a3 changed
6654 GET_INST_OPCODE(t0) # extract opcode from rINST
6655 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6656 /* 10-13 instructions */
6660 /* ------------------------------ */
6662 .L_OP_USHR_INT_2ADDR: /* 0xba */
6663 /* File: mips/OP_USHR_INT_2ADDR.S */
6664 /* File: mips/binop2addr.S */
6666 * Generic 32-bit "/2addr" binary operation. Provide an "instr" line
6667 * that specifies an instruction that performs "result = a0 op a1".
6668 * This could be an MIPS instruction or a function call.
6670 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6671 * vCC (a1). Useful for integer division and modulus.
6673 * For: add-int/2addr, sub-int/2addr, mul-int/2addr, div-int/2addr,
6674 * rem-int/2addr, and-int/2addr, or-int/2addr, xor-int/2addr,
6675 * shl-int/2addr, shr-int/2addr, ushr-int/2addr
6677 /* binop/2addr vA, vB */
6678 GET_OPA4(rOBJ) # rOBJ <- A+
6679 GET_OPB(a3) # a3 <- B
6680 GET_VREG(a0, rOBJ) # a0 <- vA
6681 GET_VREG(a1, a3) # a1 <- vB
6683 # is second operand zero?
6684 beqz a1, common_errDivideByZero
6686 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6688 and a1, a1, 31 # optional op
6689 srl a0, a0, a1 # a0 <- op, a0-a3 changed
6690 GET_INST_OPCODE(t0) # extract opcode from rINST
6691 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
6692 /* 10-13 instructions */
6696 /* ------------------------------ */
6698 .L_OP_ADD_LONG_2ADDR: /* 0xbb */
6699 /* File: mips/OP_ADD_LONG_2ADDR.S */
6701 *See OP_ADD_LONG.S for details
6703 /* File: mips/binopWide2addr.S */
6705 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
6706 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
6707 * This could be a MIPS instruction or a function call. (If the result
6708 * comes back in a register other than a0, you can override "result".)
6710 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6711 * vCC (a1). Useful for integer division and modulus.
6713 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
6714 * and-long/2addr, or-long/2addr, xor-long/2addr
6717 /* binop/2addr vA, vB */
6718 GET_OPA4(rOBJ) # rOBJ <- A+
6719 GET_OPB(a1) # a1 <- B
6720 EAS2(a1, rFP, a1) # a1 <- &fp[B]
6721 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
6722 LOAD64(a2, a3, a1) # a2/a3 <- vBB/vBB+1
6723 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
6725 or t0, a2, a3 # second arg (a2-a3) is zero?
6726 beqz t0, common_errDivideByZero
6728 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6730 addu v0, a2, a0 # optional op
6731 addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1 # result <- op, a0-a3 changed
6732 GET_INST_OPCODE(t0) # extract opcode from rINST
6733 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
6734 GOTO_OPCODE(t0) # jump to next instruction
6735 /* 12-15 instructions */
6739 /* ------------------------------ */
6741 .L_OP_SUB_LONG_2ADDR: /* 0xbc */
6742 /* File: mips/OP_SUB_LONG_2ADDR.S */
6744 * See comments in OP_SUB_LONG.S
6746 /* File: mips/binopWide2addr.S */
6748 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
6749 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
6750 * This could be a MIPS instruction or a function call. (If the result
6751 * comes back in a register other than a0, you can override "result".)
6753 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6754 * vCC (a1). Useful for integer division and modulus.
6756 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
6757 * and-long/2addr, or-long/2addr, xor-long/2addr
6760 /* binop/2addr vA, vB */
6761 GET_OPA4(rOBJ) # rOBJ <- A+
6762 GET_OPB(a1) # a1 <- B
6763 EAS2(a1, rFP, a1) # a1 <- &fp[B]
6764 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
6765 LOAD64(a2, a3, a1) # a2/a3 <- vBB/vBB+1
6766 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
6768 or t0, a2, a3 # second arg (a2-a3) is zero?
6769 beqz t0, common_errDivideByZero
6771 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6773 subu v0, a0, a2 # optional op
6774 subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0 # result <- op, a0-a3 changed
6775 GET_INST_OPCODE(t0) # extract opcode from rINST
6776 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
6777 GOTO_OPCODE(t0) # jump to next instruction
6778 /* 12-15 instructions */
6782 /* ------------------------------ */
6784 .L_OP_MUL_LONG_2ADDR: /* 0xbd */
6785 /* File: mips/OP_MUL_LONG_2ADDR.S */
6787 * See comments in OP_MUL_LONG.S
6789 /* mul-long/2addr vA, vB */
6790 GET_OPA4(t0) # t0 <- A+
6792 EAS2(t0, rFP, t0) # t0 <- &fp[A]
6793 LOAD64(a0, a1, t0) # vAA.low / high
6795 GET_OPB(t1) # t1 <- B
6796 EAS2(t1, rFP, t1) # t1 <- &fp[B]
6797 LOAD64(a2, a3, t1) # vBB.low / high
6799 mul v1, a3, a0 # v1= a3a0
6803 mul t2, a2, a1 # t2= a2a1
6804 addu v1, v1, t1 # v1= a3a0 + hi(a2a0)
6805 addu v1, v1, t2 # v1= v1 + a2a1;
6807 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6808 GET_INST_OPCODE(t1) # extract opcode from rINST
6810 STORE64(v0, v1, t0) # vAA+1 <- v1 (high)
6811 GOTO_OPCODE(t1) # jump to next instruction
6814 /* ------------------------------ */
6816 .L_OP_DIV_LONG_2ADDR: /* 0xbe */
6817 /* File: mips/OP_DIV_LONG_2ADDR.S */
6818 #ifdef HAVE_LITTLE_ENDIAN
6819 /* File: mips/binopWide2addr.S */
6821 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
6822 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
6823 * This could be a MIPS instruction or a function call. (If the result
6824 * comes back in a register other than a0, you can override "result".)
6826 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6827 * vCC (a1). Useful for integer division and modulus.
6829 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
6830 * and-long/2addr, or-long/2addr, xor-long/2addr
6833 /* binop/2addr vA, vB */
6834 GET_OPA4(rOBJ) # rOBJ <- A+
6835 GET_OPB(a1) # a1 <- B
6836 EAS2(a1, rFP, a1) # a1 <- &fp[B]
6837 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
6838 LOAD64(a2, a3, a1) # a2/a3 <- vBB/vBB+1
6839 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
6841 or t0, a2, a3 # second arg (a2-a3) is zero?
6842 beqz t0, common_errDivideByZero
6844 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6847 JAL(__divdi3) # result <- op, a0-a3 changed
6848 GET_INST_OPCODE(t0) # extract opcode from rINST
6849 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
6850 GOTO_OPCODE(t0) # jump to next instruction
6851 /* 12-15 instructions */
6855 /* File: mips/binopWide2addr.S */
6857 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
6858 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
6859 * This could be a MIPS instruction or a function call. (If the result
6860 * comes back in a register other than a0, you can override "result".)
6862 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6863 * vCC (a1). Useful for integer division and modulus.
6865 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
6866 * and-long/2addr, or-long/2addr, xor-long/2addr
6869 /* binop/2addr vA, vB */
6870 GET_OPA4(rOBJ) # rOBJ <- A+
6871 GET_OPB(a1) # a1 <- B
6872 EAS2(a1, rFP, a1) # a1 <- &fp[B]
6873 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
6874 LOAD64(a3, a2, a1) # a2/a3 <- vBB/vBB+1
6875 LOAD64(a1, a0, rOBJ) # a0/a1 <- vAA/vAA+1
6877 or t0, a3, a2 # second arg (a2-a3) is zero?
6878 beqz t0, common_errDivideByZero
6880 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6883 JAL(__divdi3) # result <- op, a0-a3 changed
6884 GET_INST_OPCODE(t0) # extract opcode from rINST
6885 STORE64(v1, v0, rOBJ) # vAA/vAA+1 <- v1/v0
6886 GOTO_OPCODE(t0) # jump to next instruction
6887 /* 12-15 instructions */
6892 /* ------------------------------ */
6894 .L_OP_REM_LONG_2ADDR: /* 0xbf */
6895 /* File: mips/OP_REM_LONG_2ADDR.S */
6896 #ifdef HAVE_LITTLE_ENDIAN
6897 /* File: mips/binopWide2addr.S */
6899 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
6900 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
6901 * This could be a MIPS instruction or a function call. (If the result
6902 * comes back in a register other than a0, you can override "result".)
6904 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6905 * vCC (a1). Useful for integer division and modulus.
6907 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
6908 * and-long/2addr, or-long/2addr, xor-long/2addr
6911 /* binop/2addr vA, vB */
6912 GET_OPA4(rOBJ) # rOBJ <- A+
6913 GET_OPB(a1) # a1 <- B
6914 EAS2(a1, rFP, a1) # a1 <- &fp[B]
6915 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
6916 LOAD64(a2, a3, a1) # a2/a3 <- vBB/vBB+1
6917 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
6919 or t0, a2, a3 # second arg (a2-a3) is zero?
6920 beqz t0, common_errDivideByZero
6922 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6925 JAL(__moddi3) # result <- op, a0-a3 changed
6926 GET_INST_OPCODE(t0) # extract opcode from rINST
6927 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- v0/v1
6928 GOTO_OPCODE(t0) # jump to next instruction
6929 /* 12-15 instructions */
6933 /* File: mips/binopWide2addr.S */
6935 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
6936 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
6937 * This could be a MIPS instruction or a function call. (If the result
6938 * comes back in a register other than a0, you can override "result".)
6940 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6941 * vCC (a1). Useful for integer division and modulus.
6943 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
6944 * and-long/2addr, or-long/2addr, xor-long/2addr
6947 /* binop/2addr vA, vB */
6948 GET_OPA4(rOBJ) # rOBJ <- A+
6949 GET_OPB(a1) # a1 <- B
6950 EAS2(a1, rFP, a1) # a1 <- &fp[B]
6951 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
6952 LOAD64(a3, a2, a1) # a2/a3 <- vBB/vBB+1
6953 LOAD64(a1, a0, rOBJ) # a0/a1 <- vAA/vAA+1
6955 or t0, a3, a2 # second arg (a2-a3) is zero?
6956 beqz t0, common_errDivideByZero
6958 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
6961 JAL(__moddi3) # result <- op, a0-a3 changed
6962 GET_INST_OPCODE(t0) # extract opcode from rINST
6963 STORE64(v1, v0, rOBJ) # vAA/vAA+1 <- v1/v0
6964 GOTO_OPCODE(t0) # jump to next instruction
6965 /* 12-15 instructions */
6970 /* ------------------------------ */
6972 .L_OP_AND_LONG_2ADDR: /* 0xc0 */
6973 /* File: mips/OP_AND_LONG_2ADDR.S */
6974 /* File: mips/binopWide2addr.S */
6976 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
6977 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
6978 * This could be a MIPS instruction or a function call. (If the result
6979 * comes back in a register other than a0, you can override "result".)
6981 * If "chkzero" is set to 1, we perform a divide-by-zero check on
6982 * vCC (a1). Useful for integer division and modulus.
6984 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
6985 * and-long/2addr, or-long/2addr, xor-long/2addr
6988 /* binop/2addr vA, vB */
6989 GET_OPA4(rOBJ) # rOBJ <- A+
6990 GET_OPB(a1) # a1 <- B
6991 EAS2(a1, rFP, a1) # a1 <- &fp[B]
6992 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
6993 LOAD64(a2, a3, a1) # a2/a3 <- vBB/vBB+1
6994 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
6996 or t0, a2, a3 # second arg (a2-a3) is zero?
6997 beqz t0, common_errDivideByZero
6999 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7001 and a0, a0, a2 # optional op
7002 and a1, a1, a3 # result <- op, a0-a3 changed
7003 GET_INST_OPCODE(t0) # extract opcode from rINST
7004 STORE64(a0, a1, rOBJ) # vAA/vAA+1 <- a0/a1
7005 GOTO_OPCODE(t0) # jump to next instruction
7006 /* 12-15 instructions */
7010 /* ------------------------------ */
7012 .L_OP_OR_LONG_2ADDR: /* 0xc1 */
7013 /* File: mips/OP_OR_LONG_2ADDR.S */
7014 /* File: mips/binopWide2addr.S */
7016 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
7017 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
7018 * This could be a MIPS instruction or a function call. (If the result
7019 * comes back in a register other than a0, you can override "result".)
7021 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7022 * vCC (a1). Useful for integer division and modulus.
7024 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
7025 * and-long/2addr, or-long/2addr, xor-long/2addr
7028 /* binop/2addr vA, vB */
7029 GET_OPA4(rOBJ) # rOBJ <- A+
7030 GET_OPB(a1) # a1 <- B
7031 EAS2(a1, rFP, a1) # a1 <- &fp[B]
7032 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
7033 LOAD64(a2, a3, a1) # a2/a3 <- vBB/vBB+1
7034 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
7036 or t0, a2, a3 # second arg (a2-a3) is zero?
7037 beqz t0, common_errDivideByZero
7039 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7041 or a0, a0, a2 # optional op
7042 or a1, a1, a3 # result <- op, a0-a3 changed
7043 GET_INST_OPCODE(t0) # extract opcode from rINST
7044 STORE64(a0, a1, rOBJ) # vAA/vAA+1 <- a0/a1
7045 GOTO_OPCODE(t0) # jump to next instruction
7046 /* 12-15 instructions */
7050 /* ------------------------------ */
7052 .L_OP_XOR_LONG_2ADDR: /* 0xc2 */
7053 /* File: mips/OP_XOR_LONG_2ADDR.S */
7054 /* File: mips/binopWide2addr.S */
7056 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
7057 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
7058 * This could be a MIPS instruction or a function call. (If the result
7059 * comes back in a register other than a0, you can override "result".)
7061 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7062 * vCC (a1). Useful for integer division and modulus.
7064 * For: add-long/2addr, sub-long/2addr, div-long/2addr, rem-long/2addr,
7065 * and-long/2addr, or-long/2addr, xor-long/2addr
7068 /* binop/2addr vA, vB */
7069 GET_OPA4(rOBJ) # rOBJ <- A+
7070 GET_OPB(a1) # a1 <- B
7071 EAS2(a1, rFP, a1) # a1 <- &fp[B]
7072 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
7073 LOAD64(a2, a3, a1) # a2/a3 <- vBB/vBB+1
7074 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
7076 or t0, a2, a3 # second arg (a2-a3) is zero?
7077 beqz t0, common_errDivideByZero
7079 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7081 xor a0, a0, a2 # optional op
7082 xor a1, a1, a3 # result <- op, a0-a3 changed
7083 GET_INST_OPCODE(t0) # extract opcode from rINST
7084 STORE64(a0, a1, rOBJ) # vAA/vAA+1 <- a0/a1
7085 GOTO_OPCODE(t0) # jump to next instruction
7086 /* 12-15 instructions */
7090 /* ------------------------------ */
7092 .L_OP_SHL_LONG_2ADDR: /* 0xc3 */
7093 /* File: mips/OP_SHL_LONG_2ADDR.S */
7095 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is
7096 * 32-bit shift distance.
7098 /* shl-long/2addr vA, vB */
7099 GET_OPA4(t2) # t2 <- A+
7100 GET_OPB(a3) # a3 <- B
7101 GET_VREG(a2, a3) # a2 <- vB
7102 EAS2(rOBJ, rFP, t2) # rOBJ <- &fp[A]
7103 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
7105 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7107 sll v0, a0, a2 # rlo<- alo << (shift&31)
7108 not v1, a2 # rhi<- 31-shift (shift is 5b)
7110 srl a0, v1 # alo<- alo >> (32-(shift&31))
7111 sll v1, a1, a2 # rhi<- ahi << (shift&31)
7112 or v1, a0 # rhi<- rhi | alo
7113 andi a2, 0x20 # shift< shift & 0x20
7114 movn v1, v0, a2 # rhi<- rlo (if shift&0x20)
7115 movn v0, zero, a2 # rlo<- 0 (if shift&0x20)
7117 GET_INST_OPCODE(t0) # extract opcode from rINST
7118 STORE64(v0, v1, rOBJ) # vAA/vAA+1 <- a0/a1
7119 GOTO_OPCODE(t0) # jump to next instruction
7122 /* ------------------------------ */
7124 .L_OP_SHR_LONG_2ADDR: /* 0xc4 */
7125 /* File: mips/OP_SHR_LONG_2ADDR.S */
7127 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is
7128 * 32-bit shift distance.
7130 /* shr-long/2addr vA, vB */
7131 GET_OPA4(t2) # t2 <- A+
7132 GET_OPB(a3) # a3 <- B
7133 GET_VREG(a2, a3) # a2 <- vB
7134 EAS2(t2, rFP, t2) # t2 <- &fp[A]
7135 LOAD64(a0, a1, t2) # a0/a1 <- vAA/vAA+1
7136 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7138 sra v1, a1, a2 # rhi<- ahi >> (shift&31)
7139 srl v0, a0, a2 # rlo<- alo >> (shift&31)
7140 sra a3, a1, 31 # a3<- sign(ah)
7141 not a0, a2 # alo<- 31-shift (shift is 5b)
7143 sll a1, a0 # ahi<- ahi << (32-(shift&31))
7144 or v0, a1 # rlo<- rlo | ahi
7145 andi a2, 0x20 # shift & 0x20
7146 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
7147 movn v1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
7149 GET_INST_OPCODE(t0) # extract opcode from rINST
7150 STORE64(v0, v1, t2) # vAA/vAA+1 <- a0/a1
7151 GOTO_OPCODE(t0) # jump to next instruction
7154 /* ------------------------------ */
7156 .L_OP_USHR_LONG_2ADDR: /* 0xc5 */
7157 /* File: mips/OP_USHR_LONG_2ADDR.S */
7159 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is
7160 * 32-bit shift distance.
7162 /* ushr-long/2addr vA, vB */
7163 GET_OPA4(t3) # t3 <- A+
7164 GET_OPB(a3) # a3 <- B
7165 GET_VREG(a2, a3) # a2 <- vB
7166 EAS2(t3, rFP, t3) # t3 <- &fp[A]
7167 LOAD64(a0, a1, t3) # a0/a1 <- vAA/vAA+1
7169 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7170 srl v1, a1, a2 # rhi<- ahi >> (shift&31)
7171 srl v0, a0, a2 # rlo<- alo >> (shift&31)
7172 not a0, a2 # alo<- 31-n (shift is 5b)
7174 sll a1, a0 # ahi<- ahi << (32-(shift&31))
7175 or v0, a1 # rlo<- rlo | ahi
7176 andi a2, 0x20 # shift & 0x20
7177 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
7178 movn v1, zero, a2 # rhi<- 0 (if shift&0x20)
7180 GET_INST_OPCODE(t0) # extract opcode from rINST
7181 STORE64(v0, v1, t3) # vAA/vAA+1 <- a0/a1
7182 GOTO_OPCODE(t0) # jump to next instruction
7185 /* ------------------------------ */
7187 .L_OP_ADD_FLOAT_2ADDR: /* 0xc6 */
7188 /* File: mips/OP_ADD_FLOAT_2ADDR.S */
7189 /* File: mips/binflop2addr.S */
7191 * Generic 32-bit "/2addr" binary operation. Provide an "instr" and
7193 * that specifies an instruction that performs "result = a0 op a1".
7194 * This could be an MIPS instruction or a function call.
7195 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7196 * vCC (a1). Useful for integer division and modulus.
7198 * For: add-float/2addr, sub-float/2addr, mul-float/2addr,
7199 * div-float/2addr, rem-float/2addr
7201 /* binop/2addr vA, vB */
7202 GET_OPA4(rOBJ) # t1 <- A+
7203 GET_OPB(a3) # a3 <- B
7205 GET_VREG(a0, rOBJ) # a0 <- vA
7206 GET_VREG(a1, a3) # a1 <- vB
7208 # is second operand zero?
7209 beqz a1, common_errDivideByZero
7212 GET_VREG_F(fa0, rOBJ)
7215 # is second operand zero?
7217 c.eq.s fcc0, ft0, fa1
7218 bc1t fcc0, common_errDivideByZero
7221 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7224 JAL(__addsf3) # result <- op, a0-a3 changed
7225 SET_VREG(v0, rOBJ) # vAA <- result
7228 SET_VREG_F(fv0, rOBJ) # vAA <- result
7230 GET_INST_OPCODE(t0) # extract opcode from rINST
7231 GOTO_OPCODE(t0) # jump to next instruction
7232 /* 10-13 instructions */
7236 /* ------------------------------ */
7238 .L_OP_SUB_FLOAT_2ADDR: /* 0xc7 */
7239 /* File: mips/OP_SUB_FLOAT_2ADDR.S */
7240 /* File: mips/binflop2addr.S */
7242 * Generic 32-bit "/2addr" binary operation. Provide an "instr" and
7244 * that specifies an instruction that performs "result = a0 op a1".
7245 * This could be an MIPS instruction or a function call.
7246 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7247 * vCC (a1). Useful for integer division and modulus.
7249 * For: add-float/2addr, sub-float/2addr, mul-float/2addr,
7250 * div-float/2addr, rem-float/2addr
7252 /* binop/2addr vA, vB */
7253 GET_OPA4(rOBJ) # t1 <- A+
7254 GET_OPB(a3) # a3 <- B
7256 GET_VREG(a0, rOBJ) # a0 <- vA
7257 GET_VREG(a1, a3) # a1 <- vB
7259 # is second operand zero?
7260 beqz a1, common_errDivideByZero
7263 GET_VREG_F(fa0, rOBJ)
7266 # is second operand zero?
7268 c.eq.s fcc0, ft0, fa1
7269 bc1t fcc0, common_errDivideByZero
7272 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7275 JAL(__subsf3) # result <- op, a0-a3 changed
7276 SET_VREG(v0, rOBJ) # vAA <- result
7279 SET_VREG_F(fv0, rOBJ) # vAA <- result
7281 GET_INST_OPCODE(t0) # extract opcode from rINST
7282 GOTO_OPCODE(t0) # jump to next instruction
7283 /* 10-13 instructions */
7287 /* ------------------------------ */
7289 .L_OP_MUL_FLOAT_2ADDR: /* 0xc8 */
7290 /* File: mips/OP_MUL_FLOAT_2ADDR.S */
7291 /* File: mips/binflop2addr.S */
7293 * Generic 32-bit "/2addr" binary operation. Provide an "instr" and
7295 * that specifies an instruction that performs "result = a0 op a1".
7296 * This could be an MIPS instruction or a function call.
7297 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7298 * vCC (a1). Useful for integer division and modulus.
7300 * For: add-float/2addr, sub-float/2addr, mul-float/2addr,
7301 * div-float/2addr, rem-float/2addr
7303 /* binop/2addr vA, vB */
7304 GET_OPA4(rOBJ) # t1 <- A+
7305 GET_OPB(a3) # a3 <- B
7307 GET_VREG(a0, rOBJ) # a0 <- vA
7308 GET_VREG(a1, a3) # a1 <- vB
7310 # is second operand zero?
7311 beqz a1, common_errDivideByZero
7314 GET_VREG_F(fa0, rOBJ)
7317 # is second operand zero?
7319 c.eq.s fcc0, ft0, fa1
7320 bc1t fcc0, common_errDivideByZero
7323 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7326 JAL(__mulsf3) # result <- op, a0-a3 changed
7327 SET_VREG(v0, rOBJ) # vAA <- result
7330 SET_VREG_F(fv0, rOBJ) # vAA <- result
7332 GET_INST_OPCODE(t0) # extract opcode from rINST
7333 GOTO_OPCODE(t0) # jump to next instruction
7334 /* 10-13 instructions */
7338 /* ------------------------------ */
7340 .L_OP_DIV_FLOAT_2ADDR: /* 0xc9 */
7341 /* File: mips/OP_DIV_FLOAT_2ADDR.S */
7342 /* File: mips/binflop2addr.S */
7344 * Generic 32-bit "/2addr" binary operation. Provide an "instr" and
7346 * that specifies an instruction that performs "result = a0 op a1".
7347 * This could be an MIPS instruction or a function call.
7348 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7349 * vCC (a1). Useful for integer division and modulus.
7351 * For: add-float/2addr, sub-float/2addr, mul-float/2addr,
7352 * div-float/2addr, rem-float/2addr
7354 /* binop/2addr vA, vB */
7355 GET_OPA4(rOBJ) # t1 <- A+
7356 GET_OPB(a3) # a3 <- B
7358 GET_VREG(a0, rOBJ) # a0 <- vA
7359 GET_VREG(a1, a3) # a1 <- vB
7361 # is second operand zero?
7362 beqz a1, common_errDivideByZero
7365 GET_VREG_F(fa0, rOBJ)
7368 # is second operand zero?
7370 c.eq.s fcc0, ft0, fa1
7371 bc1t fcc0, common_errDivideByZero
7374 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7377 JAL(__divsf3) # result <- op, a0-a3 changed
7378 SET_VREG(v0, rOBJ) # vAA <- result
7381 SET_VREG_F(fv0, rOBJ) # vAA <- result
7383 GET_INST_OPCODE(t0) # extract opcode from rINST
7384 GOTO_OPCODE(t0) # jump to next instruction
7385 /* 10-13 instructions */
7389 /* ------------------------------ */
7391 .L_OP_REM_FLOAT_2ADDR: /* 0xca */
7392 /* File: mips/OP_REM_FLOAT_2ADDR.S */
7393 /* File: mips/binflop2addr.S */
7395 * Generic 32-bit "/2addr" binary operation. Provide an "instr" and
7397 * that specifies an instruction that performs "result = a0 op a1".
7398 * This could be an MIPS instruction or a function call.
7399 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7400 * vCC (a1). Useful for integer division and modulus.
7402 * For: add-float/2addr, sub-float/2addr, mul-float/2addr,
7403 * div-float/2addr, rem-float/2addr
7405 /* binop/2addr vA, vB */
7406 GET_OPA4(rOBJ) # t1 <- A+
7407 GET_OPB(a3) # a3 <- B
7409 GET_VREG(a0, rOBJ) # a0 <- vA
7410 GET_VREG(a1, a3) # a1 <- vB
7412 # is second operand zero?
7413 beqz a1, common_errDivideByZero
7416 GET_VREG_F(fa0, rOBJ)
7419 # is second operand zero?
7421 c.eq.s fcc0, ft0, fa1
7422 bc1t fcc0, common_errDivideByZero
7425 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7428 JAL(fmodf) # result <- op, a0-a3 changed
7429 SET_VREG(v0, rOBJ) # vAA <- result
7432 SET_VREG_F(fv0, rOBJ) # vAA <- result
7434 GET_INST_OPCODE(t0) # extract opcode from rINST
7435 GOTO_OPCODE(t0) # jump to next instruction
7436 /* 10-13 instructions */
7440 /* ------------------------------ */
7442 .L_OP_ADD_DOUBLE_2ADDR: /* 0xcb */
7443 /* File: mips/OP_ADD_DOUBLE_2ADDR.S */
7444 /* File: mips/binflopWide2addr.S */
7446 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
7447 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
7448 * This could be an MIPS instruction or a function call.
7449 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7450 * vCC (a1). Useful for integer division and modulus.
7452 * For: add-double/2addr, sub-double/2addr, mul-double/2addr,
7453 * div-double/2addr, rem-double/2addr
7455 /* binop/2addr vA, vB */
7456 GET_OPA4(rOBJ) # rOBJ <- A+
7457 GET_OPB(a1) # a1 <- B
7458 EAS2(a1, rFP, a1) # a1 <- &fp[B]
7459 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
7461 LOAD64(rARG2, rARG3, a1) # a2/a3 <- vBB/vBB+1
7462 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vAA/vAA+1
7464 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
7465 beqz t0, common_errDivideByZero
7468 LOAD64_F(fa0, fa0f, rOBJ)
7469 LOAD64_F(fa1, fa1f, a1)
7472 c.eq.d fcc0, fa1, ft0
7473 bc1t fcc0, common_errDivideByZero
7477 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7480 JAL(__adddf3) # result <- op, a0-a3 changed
7481 STORE64(rRESULT0, rRESULT1, rOBJ)
7484 STORE64_F(fv0, fv0f, rOBJ)
7486 GET_INST_OPCODE(t0) # extract opcode from rINST
7487 GOTO_OPCODE(t0) # jump to next instruction
7488 /* 12-15 instructions */
7492 /* ------------------------------ */
7494 .L_OP_SUB_DOUBLE_2ADDR: /* 0xcc */
7495 /* File: mips/OP_SUB_DOUBLE_2ADDR.S */
7496 /* File: mips/binflopWide2addr.S */
7498 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
7499 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
7500 * This could be an MIPS instruction or a function call.
7501 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7502 * vCC (a1). Useful for integer division and modulus.
7504 * For: add-double/2addr, sub-double/2addr, mul-double/2addr,
7505 * div-double/2addr, rem-double/2addr
7507 /* binop/2addr vA, vB */
7508 GET_OPA4(rOBJ) # rOBJ <- A+
7509 GET_OPB(a1) # a1 <- B
7510 EAS2(a1, rFP, a1) # a1 <- &fp[B]
7511 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
7513 LOAD64(rARG2, rARG3, a1) # a2/a3 <- vBB/vBB+1
7514 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vAA/vAA+1
7516 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
7517 beqz t0, common_errDivideByZero
7520 LOAD64_F(fa0, fa0f, rOBJ)
7521 LOAD64_F(fa1, fa1f, a1)
7524 c.eq.d fcc0, fa1, ft0
7525 bc1t fcc0, common_errDivideByZero
7529 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7532 JAL(__subdf3) # result <- op, a0-a3 changed
7533 STORE64(rRESULT0, rRESULT1, rOBJ)
7536 STORE64_F(fv0, fv0f, rOBJ)
7538 GET_INST_OPCODE(t0) # extract opcode from rINST
7539 GOTO_OPCODE(t0) # jump to next instruction
7540 /* 12-15 instructions */
7544 /* ------------------------------ */
7546 .L_OP_MUL_DOUBLE_2ADDR: /* 0xcd */
7547 /* File: mips/OP_MUL_DOUBLE_2ADDR.S */
7548 /* File: mips/binflopWide2addr.S */
7550 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
7551 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
7552 * This could be an MIPS instruction or a function call.
7553 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7554 * vCC (a1). Useful for integer division and modulus.
7556 * For: add-double/2addr, sub-double/2addr, mul-double/2addr,
7557 * div-double/2addr, rem-double/2addr
7559 /* binop/2addr vA, vB */
7560 GET_OPA4(rOBJ) # rOBJ <- A+
7561 GET_OPB(a1) # a1 <- B
7562 EAS2(a1, rFP, a1) # a1 <- &fp[B]
7563 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
7565 LOAD64(rARG2, rARG3, a1) # a2/a3 <- vBB/vBB+1
7566 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vAA/vAA+1
7568 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
7569 beqz t0, common_errDivideByZero
7572 LOAD64_F(fa0, fa0f, rOBJ)
7573 LOAD64_F(fa1, fa1f, a1)
7576 c.eq.d fcc0, fa1, ft0
7577 bc1t fcc0, common_errDivideByZero
7581 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7584 JAL(__muldf3) # result <- op, a0-a3 changed
7585 STORE64(rRESULT0, rRESULT1, rOBJ)
7588 STORE64_F(fv0, fv0f, rOBJ)
7590 GET_INST_OPCODE(t0) # extract opcode from rINST
7591 GOTO_OPCODE(t0) # jump to next instruction
7592 /* 12-15 instructions */
7596 /* ------------------------------ */
7598 .L_OP_DIV_DOUBLE_2ADDR: /* 0xce */
7599 /* File: mips/OP_DIV_DOUBLE_2ADDR.S */
7600 /* File: mips/binflopWide2addr.S */
7602 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
7603 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
7604 * This could be an MIPS instruction or a function call.
7605 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7606 * vCC (a1). Useful for integer division and modulus.
7608 * For: add-double/2addr, sub-double/2addr, mul-double/2addr,
7609 * div-double/2addr, rem-double/2addr
7611 /* binop/2addr vA, vB */
7612 GET_OPA4(rOBJ) # rOBJ <- A+
7613 GET_OPB(a1) # a1 <- B
7614 EAS2(a1, rFP, a1) # a1 <- &fp[B]
7615 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
7617 LOAD64(rARG2, rARG3, a1) # a2/a3 <- vBB/vBB+1
7618 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vAA/vAA+1
7620 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
7621 beqz t0, common_errDivideByZero
7624 LOAD64_F(fa0, fa0f, rOBJ)
7625 LOAD64_F(fa1, fa1f, a1)
7628 c.eq.d fcc0, fa1, ft0
7629 bc1t fcc0, common_errDivideByZero
7633 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7636 JAL(__divdf3) # result <- op, a0-a3 changed
7637 STORE64(rRESULT0, rRESULT1, rOBJ)
7640 STORE64_F(fv0, fv0f, rOBJ)
7642 GET_INST_OPCODE(t0) # extract opcode from rINST
7643 GOTO_OPCODE(t0) # jump to next instruction
7644 /* 12-15 instructions */
7648 /* ------------------------------ */
7650 .L_OP_REM_DOUBLE_2ADDR: /* 0xcf */
7651 /* File: mips/OP_REM_DOUBLE_2ADDR.S */
7652 /* File: mips/binflopWide2addr.S */
7654 * Generic 64-bit "/2addr" binary operation. Provide an "instr" line
7655 * that specifies an instruction that performs "result = a0-a1 op a2-a3".
7656 * This could be an MIPS instruction or a function call.
7657 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7658 * vCC (a1). Useful for integer division and modulus.
7660 * For: add-double/2addr, sub-double/2addr, mul-double/2addr,
7661 * div-double/2addr, rem-double/2addr
7663 /* binop/2addr vA, vB */
7664 GET_OPA4(rOBJ) # rOBJ <- A+
7665 GET_OPB(a1) # a1 <- B
7666 EAS2(a1, rFP, a1) # a1 <- &fp[B]
7667 EAS2(rOBJ, rFP, rOBJ) # rOBJ <- &fp[A]
7669 LOAD64(rARG2, rARG3, a1) # a2/a3 <- vBB/vBB+1
7670 LOAD64(rARG0, rARG1, rOBJ) # a0/a1 <- vAA/vAA+1
7672 or t0, rARG2, rARG3 # second arg (a2-a3) is zero?
7673 beqz t0, common_errDivideByZero
7676 LOAD64_F(fa0, fa0f, rOBJ)
7677 LOAD64_F(fa1, fa1f, a1)
7680 c.eq.d fcc0, fa1, ft0
7681 bc1t fcc0, common_errDivideByZero
7685 FETCH_ADVANCE_INST(1) # advance rPC, load rINST
7688 JAL(fmod) # result <- op, a0-a3 changed
7689 STORE64(rRESULT0, rRESULT1, rOBJ)
7692 STORE64_F(fv0, fv0f, rOBJ)
7694 GET_INST_OPCODE(t0) # extract opcode from rINST
7695 GOTO_OPCODE(t0) # jump to next instruction
7696 /* 12-15 instructions */
7700 /* ------------------------------ */
7702 .L_OP_ADD_INT_LIT16: /* 0xd0 */
7703 /* File: mips/OP_ADD_INT_LIT16.S */
7704 /* File: mips/binopLit16.S */
7706 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7707 * that specifies an instruction that performs "result = a0 op a1".
7708 * This could be an MIPS instruction or a function call. (If the result
7709 * comes back in a register other than a0, you can override "result".)
7711 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7712 * vCC (a1). Useful for integer division and modulus.
7714 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7715 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7717 # binop/lit16 vA, vB, /* +CCCC */
7718 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7719 GET_OPB(a2) # a2 <- B
7720 GET_OPA(rOBJ) # rOBJ <- A+
7721 GET_VREG(a0, a2) # a0 <- vB
7724 # cmp a1, 0; is second operand zero?
7725 beqz a1, common_errDivideByZero
7727 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7729 addu a0, a0, a1 # a0 <- op, a0-a3 changed
7730 GET_INST_OPCODE(t0) # extract opcode from rINST
7731 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7732 /* 10-13 instructions */
7736 /* ------------------------------ */
7738 .L_OP_RSUB_INT: /* 0xd1 */
7739 /* File: mips/OP_RSUB_INT.S */
7740 /* this op is "rsub-int", but can be thought of as "rsub-int/lit16" */
7741 /* File: mips/binopLit16.S */
7743 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7744 * that specifies an instruction that performs "result = a0 op a1".
7745 * This could be an MIPS instruction or a function call. (If the result
7746 * comes back in a register other than a0, you can override "result".)
7748 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7749 * vCC (a1). Useful for integer division and modulus.
7751 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7752 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7754 # binop/lit16 vA, vB, /* +CCCC */
7755 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7756 GET_OPB(a2) # a2 <- B
7757 GET_OPA(rOBJ) # rOBJ <- A+
7758 GET_VREG(a0, a2) # a0 <- vB
7761 # cmp a1, 0; is second operand zero?
7762 beqz a1, common_errDivideByZero
7764 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7766 subu a0, a1, a0 # a0 <- op, a0-a3 changed
7767 GET_INST_OPCODE(t0) # extract opcode from rINST
7768 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7769 /* 10-13 instructions */
7773 /* ------------------------------ */
7775 .L_OP_MUL_INT_LIT16: /* 0xd2 */
7776 /* File: mips/OP_MUL_INT_LIT16.S */
7777 /* File: mips/binopLit16.S */
7779 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7780 * that specifies an instruction that performs "result = a0 op a1".
7781 * This could be an MIPS instruction or a function call. (If the result
7782 * comes back in a register other than a0, you can override "result".)
7784 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7785 * vCC (a1). Useful for integer division and modulus.
7787 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7788 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7790 # binop/lit16 vA, vB, /* +CCCC */
7791 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7792 GET_OPB(a2) # a2 <- B
7793 GET_OPA(rOBJ) # rOBJ <- A+
7794 GET_VREG(a0, a2) # a0 <- vB
7797 # cmp a1, 0; is second operand zero?
7798 beqz a1, common_errDivideByZero
7800 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7802 mul a0, a0, a1 # a0 <- op, a0-a3 changed
7803 GET_INST_OPCODE(t0) # extract opcode from rINST
7804 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7805 /* 10-13 instructions */
7809 /* ------------------------------ */
7811 .L_OP_DIV_INT_LIT16: /* 0xd3 */
7812 /* File: mips/OP_DIV_INT_LIT16.S */
7813 /* File: mips/binopLit16.S */
7815 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7816 * that specifies an instruction that performs "result = a0 op a1".
7817 * This could be an MIPS instruction or a function call. (If the result
7818 * comes back in a register other than a0, you can override "result".)
7820 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7821 * vCC (a1). Useful for integer division and modulus.
7823 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7824 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7826 # binop/lit16 vA, vB, /* +CCCC */
7827 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7828 GET_OPB(a2) # a2 <- B
7829 GET_OPA(rOBJ) # rOBJ <- A+
7830 GET_VREG(a0, a2) # a0 <- vB
7833 # cmp a1, 0; is second operand zero?
7834 beqz a1, common_errDivideByZero
7836 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7838 div zero, a0, a1; mflo a0 # a0 <- op, a0-a3 changed
7839 GET_INST_OPCODE(t0) # extract opcode from rINST
7840 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7841 /* 10-13 instructions */
7845 /* ------------------------------ */
7847 .L_OP_REM_INT_LIT16: /* 0xd4 */
7848 /* File: mips/OP_REM_INT_LIT16.S */
7849 /* File: mips/binopLit16.S */
7851 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7852 * that specifies an instruction that performs "result = a0 op a1".
7853 * This could be an MIPS instruction or a function call. (If the result
7854 * comes back in a register other than a0, you can override "result".)
7856 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7857 * vCC (a1). Useful for integer division and modulus.
7859 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7860 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7862 # binop/lit16 vA, vB, /* +CCCC */
7863 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7864 GET_OPB(a2) # a2 <- B
7865 GET_OPA(rOBJ) # rOBJ <- A+
7866 GET_VREG(a0, a2) # a0 <- vB
7869 # cmp a1, 0; is second operand zero?
7870 beqz a1, common_errDivideByZero
7872 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7874 div zero, a0, a1; mfhi a0 # a0 <- op, a0-a3 changed
7875 GET_INST_OPCODE(t0) # extract opcode from rINST
7876 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7877 /* 10-13 instructions */
7881 /* ------------------------------ */
7883 .L_OP_AND_INT_LIT16: /* 0xd5 */
7884 /* File: mips/OP_AND_INT_LIT16.S */
7885 /* File: mips/binopLit16.S */
7887 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7888 * that specifies an instruction that performs "result = a0 op a1".
7889 * This could be an MIPS instruction or a function call. (If the result
7890 * comes back in a register other than a0, you can override "result".)
7892 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7893 * vCC (a1). Useful for integer division and modulus.
7895 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7896 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7898 # binop/lit16 vA, vB, /* +CCCC */
7899 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7900 GET_OPB(a2) # a2 <- B
7901 GET_OPA(rOBJ) # rOBJ <- A+
7902 GET_VREG(a0, a2) # a0 <- vB
7905 # cmp a1, 0; is second operand zero?
7906 beqz a1, common_errDivideByZero
7908 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7910 and a0, a0, a1 # a0 <- op, a0-a3 changed
7911 GET_INST_OPCODE(t0) # extract opcode from rINST
7912 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7913 /* 10-13 instructions */
7917 /* ------------------------------ */
7919 .L_OP_OR_INT_LIT16: /* 0xd6 */
7920 /* File: mips/OP_OR_INT_LIT16.S */
7921 /* File: mips/binopLit16.S */
7923 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7924 * that specifies an instruction that performs "result = a0 op a1".
7925 * This could be an MIPS instruction or a function call. (If the result
7926 * comes back in a register other than a0, you can override "result".)
7928 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7929 * vCC (a1). Useful for integer division and modulus.
7931 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7932 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7934 # binop/lit16 vA, vB, /* +CCCC */
7935 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7936 GET_OPB(a2) # a2 <- B
7937 GET_OPA(rOBJ) # rOBJ <- A+
7938 GET_VREG(a0, a2) # a0 <- vB
7941 # cmp a1, 0; is second operand zero?
7942 beqz a1, common_errDivideByZero
7944 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7946 or a0, a0, a1 # a0 <- op, a0-a3 changed
7947 GET_INST_OPCODE(t0) # extract opcode from rINST
7948 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7949 /* 10-13 instructions */
7953 /* ------------------------------ */
7955 .L_OP_XOR_INT_LIT16: /* 0xd7 */
7956 /* File: mips/OP_XOR_INT_LIT16.S */
7957 /* File: mips/binopLit16.S */
7959 * Generic 32-bit "lit16" binary operation. Provide an "instr" line
7960 * that specifies an instruction that performs "result = a0 op a1".
7961 * This could be an MIPS instruction or a function call. (If the result
7962 * comes back in a register other than a0, you can override "result".)
7964 * If "chkzero" is set to 1, we perform a divide-by-zero check on
7965 * vCC (a1). Useful for integer division and modulus.
7967 * For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
7968 * rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
7970 # binop/lit16 vA, vB, /* +CCCC */
7971 FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
7972 GET_OPB(a2) # a2 <- B
7973 GET_OPA(rOBJ) # rOBJ <- A+
7974 GET_VREG(a0, a2) # a0 <- vB
7977 # cmp a1, 0; is second operand zero?
7978 beqz a1, common_errDivideByZero
7980 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
7982 xor a0, a0, a1 # a0 <- op, a0-a3 changed
7983 GET_INST_OPCODE(t0) # extract opcode from rINST
7984 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
7985 /* 10-13 instructions */
7989 /* ------------------------------ */
7991 .L_OP_ADD_INT_LIT8: /* 0xd8 */
7992 /* File: mips/OP_ADD_INT_LIT8.S */
7993 /* File: mips/binopLit8.S */
7995 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
7996 * that specifies an instruction that performs "result = a0 op a1".
7997 * This could be an MIPS instruction or a function call. (If the result
7998 * comes back in a register other than a0, you can override "result".)
8000 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8001 * vCC (a1). Useful for integer division and modulus.
8003 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8004 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8005 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8007 # binop/lit8 vAA, vBB, /* +CC */
8008 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8009 GET_OPA(rOBJ) # rOBJ <- AA
8010 and a2, a3, 255 # a2 <- BB
8011 GET_VREG(a0, a2) # a0 <- vBB
8012 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8014 # is second operand zero?
8015 beqz a1, common_errDivideByZero
8017 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8020 addu a0, a0, a1 # a0 <- op, a0-a3 changed
8021 GET_INST_OPCODE(t0) # extract opcode from rINST
8022 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8023 /* 10-12 instructions */
8027 /* ------------------------------ */
8029 .L_OP_RSUB_INT_LIT8: /* 0xd9 */
8030 /* File: mips/OP_RSUB_INT_LIT8.S */
8031 /* File: mips/binopLit8.S */
8033 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8034 * that specifies an instruction that performs "result = a0 op a1".
8035 * This could be an MIPS instruction or a function call. (If the result
8036 * comes back in a register other than a0, you can override "result".)
8038 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8039 * vCC (a1). Useful for integer division and modulus.
8041 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8042 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8043 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8045 # binop/lit8 vAA, vBB, /* +CC */
8046 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8047 GET_OPA(rOBJ) # rOBJ <- AA
8048 and a2, a3, 255 # a2 <- BB
8049 GET_VREG(a0, a2) # a0 <- vBB
8050 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8052 # is second operand zero?
8053 beqz a1, common_errDivideByZero
8055 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8058 subu a0, a1, a0 # a0 <- op, a0-a3 changed
8059 GET_INST_OPCODE(t0) # extract opcode from rINST
8060 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8061 /* 10-12 instructions */
8065 /* ------------------------------ */
8067 .L_OP_MUL_INT_LIT8: /* 0xda */
8068 /* File: mips/OP_MUL_INT_LIT8.S */
8069 /* File: mips/binopLit8.S */
8071 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8072 * that specifies an instruction that performs "result = a0 op a1".
8073 * This could be an MIPS instruction or a function call. (If the result
8074 * comes back in a register other than a0, you can override "result".)
8076 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8077 * vCC (a1). Useful for integer division and modulus.
8079 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8080 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8081 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8083 # binop/lit8 vAA, vBB, /* +CC */
8084 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8085 GET_OPA(rOBJ) # rOBJ <- AA
8086 and a2, a3, 255 # a2 <- BB
8087 GET_VREG(a0, a2) # a0 <- vBB
8088 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8090 # is second operand zero?
8091 beqz a1, common_errDivideByZero
8093 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8096 mul a0, a0, a1 # a0 <- op, a0-a3 changed
8097 GET_INST_OPCODE(t0) # extract opcode from rINST
8098 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8099 /* 10-12 instructions */
8103 /* ------------------------------ */
8105 .L_OP_DIV_INT_LIT8: /* 0xdb */
8106 /* File: mips/OP_DIV_INT_LIT8.S */
8107 /* File: mips/binopLit8.S */
8109 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8110 * that specifies an instruction that performs "result = a0 op a1".
8111 * This could be an MIPS instruction or a function call. (If the result
8112 * comes back in a register other than a0, you can override "result".)
8114 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8115 * vCC (a1). Useful for integer division and modulus.
8117 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8118 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8119 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8121 # binop/lit8 vAA, vBB, /* +CC */
8122 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8123 GET_OPA(rOBJ) # rOBJ <- AA
8124 and a2, a3, 255 # a2 <- BB
8125 GET_VREG(a0, a2) # a0 <- vBB
8126 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8128 # is second operand zero?
8129 beqz a1, common_errDivideByZero
8131 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8134 div zero, a0, a1; mflo a0 # a0 <- op, a0-a3 changed
8135 GET_INST_OPCODE(t0) # extract opcode from rINST
8136 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8137 /* 10-12 instructions */
8141 /* ------------------------------ */
8143 .L_OP_REM_INT_LIT8: /* 0xdc */
8144 /* File: mips/OP_REM_INT_LIT8.S */
8145 /* File: mips/binopLit8.S */
8147 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8148 * that specifies an instruction that performs "result = a0 op a1".
8149 * This could be an MIPS instruction or a function call. (If the result
8150 * comes back in a register other than a0, you can override "result".)
8152 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8153 * vCC (a1). Useful for integer division and modulus.
8155 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8156 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8157 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8159 # binop/lit8 vAA, vBB, /* +CC */
8160 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8161 GET_OPA(rOBJ) # rOBJ <- AA
8162 and a2, a3, 255 # a2 <- BB
8163 GET_VREG(a0, a2) # a0 <- vBB
8164 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8166 # is second operand zero?
8167 beqz a1, common_errDivideByZero
8169 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8172 div zero, a0, a1; mfhi a0 # a0 <- op, a0-a3 changed
8173 GET_INST_OPCODE(t0) # extract opcode from rINST
8174 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8175 /* 10-12 instructions */
8179 /* ------------------------------ */
8181 .L_OP_AND_INT_LIT8: /* 0xdd */
8182 /* File: mips/OP_AND_INT_LIT8.S */
8183 /* File: mips/binopLit8.S */
8185 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8186 * that specifies an instruction that performs "result = a0 op a1".
8187 * This could be an MIPS instruction or a function call. (If the result
8188 * comes back in a register other than a0, you can override "result".)
8190 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8191 * vCC (a1). Useful for integer division and modulus.
8193 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8194 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8195 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8197 # binop/lit8 vAA, vBB, /* +CC */
8198 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8199 GET_OPA(rOBJ) # rOBJ <- AA
8200 and a2, a3, 255 # a2 <- BB
8201 GET_VREG(a0, a2) # a0 <- vBB
8202 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8204 # is second operand zero?
8205 beqz a1, common_errDivideByZero
8207 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8210 and a0, a0, a1 # a0 <- op, a0-a3 changed
8211 GET_INST_OPCODE(t0) # extract opcode from rINST
8212 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8213 /* 10-12 instructions */
8217 /* ------------------------------ */
8219 .L_OP_OR_INT_LIT8: /* 0xde */
8220 /* File: mips/OP_OR_INT_LIT8.S */
8221 /* File: mips/binopLit8.S */
8223 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8224 * that specifies an instruction that performs "result = a0 op a1".
8225 * This could be an MIPS instruction or a function call. (If the result
8226 * comes back in a register other than a0, you can override "result".)
8228 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8229 * vCC (a1). Useful for integer division and modulus.
8231 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8232 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8233 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8235 # binop/lit8 vAA, vBB, /* +CC */
8236 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8237 GET_OPA(rOBJ) # rOBJ <- AA
8238 and a2, a3, 255 # a2 <- BB
8239 GET_VREG(a0, a2) # a0 <- vBB
8240 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8242 # is second operand zero?
8243 beqz a1, common_errDivideByZero
8245 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8248 or a0, a0, a1 # a0 <- op, a0-a3 changed
8249 GET_INST_OPCODE(t0) # extract opcode from rINST
8250 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8251 /* 10-12 instructions */
8255 /* ------------------------------ */
8257 .L_OP_XOR_INT_LIT8: /* 0xdf */
8258 /* File: mips/OP_XOR_INT_LIT8.S */
8259 /* File: mips/binopLit8.S */
8261 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8262 * that specifies an instruction that performs "result = a0 op a1".
8263 * This could be an MIPS instruction or a function call. (If the result
8264 * comes back in a register other than a0, you can override "result".)
8266 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8267 * vCC (a1). Useful for integer division and modulus.
8269 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8270 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8271 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8273 # binop/lit8 vAA, vBB, /* +CC */
8274 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8275 GET_OPA(rOBJ) # rOBJ <- AA
8276 and a2, a3, 255 # a2 <- BB
8277 GET_VREG(a0, a2) # a0 <- vBB
8278 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8280 # is second operand zero?
8281 beqz a1, common_errDivideByZero
8283 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8286 xor a0, a0, a1 # a0 <- op, a0-a3 changed
8287 GET_INST_OPCODE(t0) # extract opcode from rINST
8288 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8289 /* 10-12 instructions */
8293 /* ------------------------------ */
8295 .L_OP_SHL_INT_LIT8: /* 0xe0 */
8296 /* File: mips/OP_SHL_INT_LIT8.S */
8297 /* File: mips/binopLit8.S */
8299 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8300 * that specifies an instruction that performs "result = a0 op a1".
8301 * This could be an MIPS instruction or a function call. (If the result
8302 * comes back in a register other than a0, you can override "result".)
8304 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8305 * vCC (a1). Useful for integer division and modulus.
8307 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8308 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8309 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8311 # binop/lit8 vAA, vBB, /* +CC */
8312 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8313 GET_OPA(rOBJ) # rOBJ <- AA
8314 and a2, a3, 255 # a2 <- BB
8315 GET_VREG(a0, a2) # a0 <- vBB
8316 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8318 # is second operand zero?
8319 beqz a1, common_errDivideByZero
8321 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8323 and a1, a1, 31 # optional op
8324 sll a0, a0, a1 # a0 <- op, a0-a3 changed
8325 GET_INST_OPCODE(t0) # extract opcode from rINST
8326 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8327 /* 10-12 instructions */
8331 /* ------------------------------ */
8333 .L_OP_SHR_INT_LIT8: /* 0xe1 */
8334 /* File: mips/OP_SHR_INT_LIT8.S */
8335 /* File: mips/binopLit8.S */
8337 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8338 * that specifies an instruction that performs "result = a0 op a1".
8339 * This could be an MIPS instruction or a function call. (If the result
8340 * comes back in a register other than a0, you can override "result".)
8342 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8343 * vCC (a1). Useful for integer division and modulus.
8345 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8346 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8347 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8349 # binop/lit8 vAA, vBB, /* +CC */
8350 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8351 GET_OPA(rOBJ) # rOBJ <- AA
8352 and a2, a3, 255 # a2 <- BB
8353 GET_VREG(a0, a2) # a0 <- vBB
8354 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8356 # is second operand zero?
8357 beqz a1, common_errDivideByZero
8359 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8361 and a1, a1, 31 # optional op
8362 sra a0, a0, a1 # a0 <- op, a0-a3 changed
8363 GET_INST_OPCODE(t0) # extract opcode from rINST
8364 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8365 /* 10-12 instructions */
8369 /* ------------------------------ */
8371 .L_OP_USHR_INT_LIT8: /* 0xe2 */
8372 /* File: mips/OP_USHR_INT_LIT8.S */
8373 /* File: mips/binopLit8.S */
8375 * Generic 32-bit "lit8" binary operation. Provide an "instr" line
8376 * that specifies an instruction that performs "result = a0 op a1".
8377 * This could be an MIPS instruction or a function call. (If the result
8378 * comes back in a register other than a0, you can override "result".)
8380 * If "chkzero" is set to 1, we perform a divide-by-zero check on
8381 * vCC (a1). Useful for integer division and modulus.
8383 * For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
8384 * rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
8385 * shl-int/lit8, shr-int/lit8, ushr-int/lit8
8387 # binop/lit8 vAA, vBB, /* +CC */
8388 FETCH_S(a3, 1) # a3 <- ssssCCBB (sign-extended for CC)
8389 GET_OPA(rOBJ) # rOBJ <- AA
8390 and a2, a3, 255 # a2 <- BB
8391 GET_VREG(a0, a2) # a0 <- vBB
8392 sra a1, a3, 8 # a1 <- ssssssCC (sign extended)
8394 # is second operand zero?
8395 beqz a1, common_errDivideByZero
8397 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8399 and a1, a1, 31 # optional op
8400 srl a0, a0, a1 # a0 <- op, a0-a3 changed
8401 GET_INST_OPCODE(t0) # extract opcode from rINST
8402 SET_VREG_GOTO(a0, rOBJ, t0) # vAA <- a0
8403 /* 10-12 instructions */
8407 /* ------------------------------ */
8409 .L_OP_IGET_VOLATILE: /* 0xe3 */
8410 /* File: mips/OP_IGET_VOLATILE.S */
8411 /* File: mips/OP_IGET.S */
8413 * General 32-bit instance field get.
8415 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
8417 # op vA, vB, field /* CCCC */
8418 GET_OPB(a0) # a0 <- B
8419 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
8420 FETCH(a1, 1) # a1 <- field ref CCCC
8421 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
8422 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
8423 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
8424 # is resolved entry null?
8425 bnez a0, .LOP_IGET_VOLATILE_finish # no, already resolved
8426 LOAD_rSELF_method(a2) # a2 <- current method
8427 EXPORT_PC() # resolve() could throw
8428 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8429 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
8432 bnez v0, .LOP_IGET_VOLATILE_finish
8433 b common_exceptionThrown
8436 /* ------------------------------ */
8438 .L_OP_IPUT_VOLATILE: /* 0xe4 */
8439 /* File: mips/OP_IPUT_VOLATILE.S */
8440 /* File: mips/OP_IPUT.S */
8442 * General 32-bit instance field put.
8444 * for: iput, iput-object, iput-boolean, iput-byte, iput-char, iput-short
8446 # op vA, vB, field /* CCCC */
8447 GET_OPB(a0) # a0 <- B
8448 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
8449 FETCH(a1, 1) # a1 <- field ref CCCC
8450 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
8451 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
8452 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
8453 # is resolved entry null?
8454 bnez a0, .LOP_IPUT_VOLATILE_finish # no, already resolved
8455 LOAD_rSELF_method(a2) # a2 <- current method
8456 EXPORT_PC() # resolve() could throw
8457 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8458 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
8461 bnez v0, .LOP_IPUT_VOLATILE_finish # yes, finish up
8462 b common_exceptionThrown
8465 /* ------------------------------ */
8467 .L_OP_SGET_VOLATILE: /* 0xe5 */
8468 /* File: mips/OP_SGET_VOLATILE.S */
8469 /* File: mips/OP_SGET.S */
8471 * General 32-bit SGET handler.
8473 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
8475 # op vAA, field /* BBBB */
8476 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
8477 FETCH(a1, 1) # a1 <- field ref BBBB
8478 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
8479 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
8480 # is resolved entry !null?
8481 bnez a0, .LOP_SGET_VOLATILE_finish
8484 * Continuation if the field has not yet been resolved.
8485 * a1: BBBB field ref
8486 * rBIX: dvmDex->pResFields
8488 LOAD_rSELF_method(a2) # a2 <- current method
8489 #if defined(WITH_JIT)
8490 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
8492 EXPORT_PC() # resolve() could throw, so export now
8493 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8494 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
8497 beqz v0, common_exceptionThrown # no, handle exception
8498 #if defined(WITH_JIT)
8500 * If the JIT is actively building a trace we need to make sure
8501 * that the field is fully resolved before including this instruction.
8503 JAL(common_verifyField)
8505 b .LOP_SGET_VOLATILE_finish # resume
8508 /* ------------------------------ */
8510 .L_OP_SPUT_VOLATILE: /* 0xe6 */
8511 /* File: mips/OP_SPUT_VOLATILE.S */
8512 /* File: mips/OP_SPUT.S */
8514 * General 32-bit SPUT handler.
8516 * for: sput, sput-object, sput-boolean, sput-byte, sput-char, sput-short
8518 # op vAA, field /* BBBB */
8519 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
8520 FETCH(a1, 1) # a1 <- field ref BBBB
8521 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
8522 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
8523 bnez a0, .LOP_SPUT_VOLATILE_finish # is resolved entry null?
8525 * Continuation if the field has not yet been resolved.
8526 * a1: BBBB field ref
8527 * rBIX: dvmDex->pResFields
8529 LOAD_rSELF_method(a2) # a2 <- current method
8530 #if defined(WITH_JIT)
8531 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
8533 EXPORT_PC() # resolve() may throw, so export now
8534 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8535 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
8537 beqz v0, common_exceptionThrown # success? no, handle exception
8538 #if defined(WITH_JIT)
8540 * If the JIT is actively building a trace we need to make sure
8541 * that the field is fully resolved before including this instruction.
8543 JAL(common_verifyField)
8545 b .LOP_SPUT_VOLATILE_finish # resume
8548 /* ------------------------------ */
8550 .L_OP_IGET_OBJECT_VOLATILE: /* 0xe7 */
8551 /* File: mips/OP_IGET_OBJECT_VOLATILE.S */
8552 /* File: mips/OP_IGET.S */
8554 * General 32-bit instance field get.
8556 * for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
8558 # op vA, vB, field /* CCCC */
8559 GET_OPB(a0) # a0 <- B
8560 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
8561 FETCH(a1, 1) # a1 <- field ref CCCC
8562 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
8563 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
8564 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
8565 # is resolved entry null?
8566 bnez a0, .LOP_IGET_OBJECT_VOLATILE_finish # no, already resolved
8567 LOAD_rSELF_method(a2) # a2 <- current method
8568 EXPORT_PC() # resolve() could throw
8569 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8570 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
8573 bnez v0, .LOP_IGET_OBJECT_VOLATILE_finish
8574 b common_exceptionThrown
8577 /* ------------------------------ */
8579 .L_OP_IGET_WIDE_VOLATILE: /* 0xe8 */
8580 /* File: mips/OP_IGET_WIDE_VOLATILE.S */
8581 /* File: mips/OP_IGET_WIDE.S */
8583 * Wide 32-bit instance field get.
8585 # iget-wide vA, vB, field /* CCCC */
8586 GET_OPB(a0) # a0 <- B
8587 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
8588 FETCH(a1, 1) # a1 <- field ref CCCC
8589 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
8590 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
8591 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
8592 # is resolved entry null?
8593 bnez a0, .LOP_IGET_WIDE_VOLATILE_finish # no, already resolved
8594 LOAD_rSELF_method(a2) # a2 <- current method
8595 EXPORT_PC() # resolve() could throw
8596 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8597 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
8600 bnez v0, .LOP_IGET_WIDE_VOLATILE_finish
8601 b common_exceptionThrown
8604 /* ------------------------------ */
8606 .L_OP_IPUT_WIDE_VOLATILE: /* 0xe9 */
8607 /* File: mips/OP_IPUT_WIDE_VOLATILE.S */
8608 /* File: mips/OP_IPUT_WIDE.S */
8609 # iput-wide vA, vB, field /* CCCC */
8610 GET_OPB(a0) # a0 <- B
8611 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
8612 FETCH(a1, 1) # a1 <- field ref CCCC
8613 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
8614 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
8615 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
8616 # is resolved entry null?
8617 bnez a0, .LOP_IPUT_WIDE_VOLATILE_finish # no, already resolved
8618 LOAD_rSELF_method(a2) # a2 <- current method
8619 EXPORT_PC() # resolve() could throw
8620 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8621 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
8624 bnez v0, .LOP_IPUT_WIDE_VOLATILE_finish # yes, finish up
8625 b common_exceptionThrown
8628 /* ------------------------------ */
8630 .L_OP_SGET_WIDE_VOLATILE: /* 0xea */
8631 /* File: mips/OP_SGET_WIDE_VOLATILE.S */
8632 /* File: mips/OP_SGET_WIDE.S */
8634 * 64-bit SGET handler.
8636 # sget-wide vAA, field /* BBBB */
8637 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
8638 FETCH(a1, 1) # a1 <- field ref BBBB
8639 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
8640 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
8641 # is resolved entry null?
8642 bnez a0, .LOP_SGET_WIDE_VOLATILE_finish
8645 * Continuation if the field has not yet been resolved.
8646 * a1: BBBB field ref
8647 * rBIX: dvmDex->pResFields
8649 * Returns StaticField pointer in v0.
8651 LOAD_rSELF_method(a2) # a2 <- current method
8652 #if defined(WITH_JIT)
8653 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
8655 EXPORT_PC() # resolve() could throw, so export now
8656 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
8657 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
8660 beqz v0, common_exceptionThrown # no, handle exception
8661 #if defined(WITH_JIT)
8663 * If the JIT is actively building a trace we need to make sure
8664 * that the field is fully resolved before including this instruction.
8666 JAL(common_verifyField)
8669 b .LOP_SGET_WIDE_VOLATILE_finish # resume
8672 /* ------------------------------ */
8674 .L_OP_SPUT_WIDE_VOLATILE: /* 0xeb */
8675 /* File: mips/OP_SPUT_WIDE_VOLATILE.S */
8676 /* File: mips/OP_SPUT_WIDE.S */
8678 * 64-bit SPUT handler.
8680 # sput-wide vAA, field /* BBBB */
8681 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
8682 FETCH(a1, 1) # a1 <- field ref BBBB
8683 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
8684 GET_OPA(t0) # t0 <- AA
8685 LOAD_eas2(a2, rBIX, a1) # a2 <- resolved StaticField ptr
8686 EAS2(rOBJ, rFP, t0) # rOBJ<- &fp[AA]
8687 # is resolved entry null?
8688 beqz a2, .LOP_SPUT_WIDE_VOLATILE_resolve # yes, do resolve
8689 .LOP_SPUT_WIDE_VOLATILE_finish: # field ptr in a2, AA in rOBJ
8690 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8691 LOAD64(a0, a1, rOBJ) # a0/a1 <- vAA/vAA+1
8692 GET_INST_OPCODE(rBIX) # extract opcode from rINST
8694 addu a2, offStaticField_value # a2<- pointer to data
8695 JAL(dvmQuasiAtomicSwap64Sync) # stores a0/a1 into addr a2
8697 STORE64_off(a0, a1, a2, offStaticField_value) # field <- vAA/vAA+1
8699 GOTO_OPCODE(rBIX) # jump to next instruction
8702 /* ------------------------------ */
8704 .L_OP_BREAKPOINT: /* 0xec */
8706 SAVE_PC_TO_SELF() # only need to export PC and FP
8708 move a0, rSELF # self is first arg to function
8709 JAL(dvmMterp_OP_BREAKPOINT) # call
8710 LOAD_PC_FROM_SELF() # retrieve updated values
8712 FETCH_INST() # load next instruction from rPC
8713 GET_INST_OPCODE(t0) # ...trim down to just the opcode
8714 GOTO_OPCODE(t0) # ...and jump to the handler
8715 /* ------------------------------ */
8717 .L_OP_THROW_VERIFICATION_ERROR: /* 0xed */
8718 /* File: mips/OP_THROW_VERIFICATION_ERROR.S */
8720 * Handle a throw-verification-error instruction. This throws an
8721 * exception for an error discovered during verification. The
8722 * exception is indicated by AA, with some detail provided by BBBB.
8724 /* op AA, ref@BBBB */
8726 LOAD_rSELF_method(a0) # a0 <- self->method
8727 FETCH(a2, 1) # a2 <- BBBB
8728 EXPORT_PC() # export the PC
8729 GET_OPA(a1) # a1 <- AA
8730 JAL(dvmThrowVerificationError) # always throws
8731 b common_exceptionThrown # handle exception
8734 /* ------------------------------ */
8736 .L_OP_EXECUTE_INLINE: /* 0xee */
8737 /* File: mips/OP_EXECUTE_INLINE.S */
8739 * Execute a "native inline" instruction.
8741 * We need to call an InlineOp4Func:
8742 * bool (func)(u4 arg0, u4 arg1, u4 arg2, u4 arg3, JValue* pResult)
8744 * The first four args are in a0-a3, pointer to return value storage
8745 * is on the stack. The function's return value is a flag that tells
8746 * us if an exception was thrown.
8748 * TUNING: could maintain two tables, pointer in Thread and
8749 * swap if profiler/debuggger active.
8751 /* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
8752 lhu a2, offThread_subMode(rSELF)
8753 FETCH(rBIX, 1) # rBIX <- BBBB
8754 EXPORT_PC() # can throw
8755 and a2, kSubModeDebugProfile # Any going on?
8756 bnez a2, .LOP_EXECUTE_INLINE_debugmode # yes - take slow path
8757 .LOP_EXECUTE_INLINE_resume:
8758 addu a1, rSELF, offThread_retval # a1 <- &self->retval
8759 GET_OPB(a0) # a0 <- B
8760 # Stack should have 16/20 available
8761 sw a1, STACK_OFFSET_ARG04(sp) # push &self->retval
8762 BAL(.LOP_EXECUTE_INLINE_continue) # make call; will return after
8763 lw gp, STACK_OFFSET_GP(sp) # restore gp
8764 # test boolean result of inline
8765 beqz v0, common_exceptionThrown # returned false, handle exception
8766 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
8767 GET_INST_OPCODE(t0) # extract opcode from rINST
8768 GOTO_OPCODE(t0) # jump to next instruction
8770 /* ------------------------------ */
8772 .L_OP_EXECUTE_INLINE_RANGE: /* 0xef */
8773 /* File: mips/OP_EXECUTE_INLINE_RANGE.S */
8775 * Execute a "native inline" instruction, using "/range" semantics.
8776 * Same idea as execute-inline, but we get the args differently.
8778 * We need to call an InlineOp4Func:
8779 * bool (func)(u4 arg0, u4 arg1, u4 arg2, u4 arg3, JValue* pResult)
8781 * The first four args are in a0-a3, pointer to return value storage
8782 * is on the stack. The function's return value is a flag that tells
8783 * us if an exception was thrown.
8785 /* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */
8786 lhu a2, offThread_subMode(rSELF)
8787 FETCH(rBIX, 1) # rBIX<- BBBB
8788 EXPORT_PC() # can throw
8789 and a2, kSubModeDebugProfile # Any going on?
8790 bnez a2, .LOP_EXECUTE_INLINE_RANGE_debugmode # yes - take slow path
8791 .LOP_EXECUTE_INLINE_RANGE_resume:
8792 addu a1, rSELF, offThread_retval # a1<- &self->retval
8794 sw a1, STACK_OFFSET_ARG04(sp) # push &self->retval
8795 BAL(.LOP_EXECUTE_INLINE_RANGE_continue) # make call; will return after
8796 lw gp, STACK_OFFSET_GP(sp) # restore gp
8797 beqz v0, common_exceptionThrown # returned false, handle exception
8798 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
8799 GET_INST_OPCODE(t0) # extract opcode from rINST
8800 GOTO_OPCODE(t0) # jump to next instruction
8803 /* ------------------------------ */
8805 .L_OP_INVOKE_OBJECT_INIT_RANGE: /* 0xf0 */
8806 /* File: mips/OP_INVOKE_OBJECT_INIT_RANGE.S */
8808 * Invoke Object.<init> on an object. In practice we know that
8809 * Object's nullary constructor doesn't do anything, so we just
8810 * skip it unless a debugger is active.
8812 FETCH(a1, 2) # a1<- CCCC
8813 GET_VREG(a0, a1) # a0<- "this" ptr
8815 beqz a0, common_errNullObject # export PC and throw NPE
8816 LOAD_base_offObject_clazz(a1, a0) # a1<- obj->clazz
8817 LOAD_base_offClassObject_accessFlags(a2, a1) # a2<- clazz->accessFlags
8818 and a2, CLASS_ISFINALIZABLE # is this class finalizable?
8819 beqz a2, .LOP_INVOKE_OBJECT_INIT_RANGE_finish # no, go
8821 .LOP_INVOKE_OBJECT_INIT_RANGE_setFinal:
8822 EXPORT_PC() # can throw
8823 JAL(dvmSetFinalizable) # call dvmSetFinalizable(obj)
8824 LOAD_offThread_exception(a0, rSELF) # a0<- self->exception
8825 # exception pending?
8826 bnez a0, common_exceptionThrown # yes, handle it
8828 .LOP_INVOKE_OBJECT_INIT_RANGE_finish:
8829 lhu a1, offThread_subMode(rSELF)
8830 and a1, kSubModeDebuggerActive # debugger active?
8831 bnez a1, .LOP_INVOKE_OBJECT_INIT_RANGE_debugger # Yes - skip optimization
8832 FETCH_ADVANCE_INST(2+1) # advance to next instr, load rINST
8833 GET_INST_OPCODE(t0) # t0<- opcode from rINST
8834 GOTO_OPCODE(t0) # execute it
8837 /* ------------------------------ */
8839 .L_OP_RETURN_VOID_BARRIER: /* 0xf1 */
8840 /* File: mips/OP_RETURN_VOID_BARRIER.S */
8842 b common_returnFromMethod
8844 /* ------------------------------ */
8846 .L_OP_IGET_QUICK: /* 0xf2 */
8847 /* File: mips/OP_IGET_QUICK.S */
8848 /* For: iget-quick, iget-object-quick */
8849 # op vA, vB, offset /* CCCC */
8850 GET_OPB(a2) # a2 <- B
8851 GET_VREG(a3, a2) # a3 <- object we're operating on
8852 FETCH(a1, 1) # a1 <- field byte offset
8853 GET_OPA4(a2) # a2 <- A(+)
8854 # check object for null
8855 beqz a3, common_errNullObject # object was null
8857 lw a0, 0(t0) # a0 <- obj.field (always 32 bits)
8858 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8859 GET_INST_OPCODE(t0) # extract opcode from rINST
8860 SET_VREG(a0, a2) # fp[A] <- a0
8861 GOTO_OPCODE(t0) # jump to next instruction
8864 /* ------------------------------ */
8866 .L_OP_IGET_WIDE_QUICK: /* 0xf3 */
8867 /* File: mips/OP_IGET_WIDE_QUICK.S */
8868 # iget-wide-quick vA, vB, offset /* CCCC */
8869 GET_OPB(a2) # a2 <- B
8870 GET_VREG(a3, a2) # a3 <- object we're operating on
8871 FETCH(a1, 1) # a1 <- field byte offset
8872 GET_OPA4(a2) # a2 <- A(+)
8873 # check object for null
8874 beqz a3, common_errNullObject # object was null
8875 addu t0, a3, a1 # t0 <- a3 + a1
8876 LOAD64(a0, a1, t0) # a0 <- obj.field (64 bits, aligned)
8877 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8879 GET_INST_OPCODE(t0) # extract opcode from rINST
8880 STORE64(a0, a1, a3) # fp[A] <- a0/a1
8881 GOTO_OPCODE(t0) # jump to next instruction
8884 /* ------------------------------ */
8886 .L_OP_IGET_OBJECT_QUICK: /* 0xf4 */
8887 /* File: mips/OP_IGET_OBJECT_QUICK.S */
8888 /* File: mips/OP_IGET_QUICK.S */
8889 /* For: iget-quick, iget-object-quick */
8890 # op vA, vB, offset /* CCCC */
8891 GET_OPB(a2) # a2 <- B
8892 GET_VREG(a3, a2) # a3 <- object we're operating on
8893 FETCH(a1, 1) # a1 <- field byte offset
8894 GET_OPA4(a2) # a2 <- A(+)
8895 # check object for null
8896 beqz a3, common_errNullObject # object was null
8898 lw a0, 0(t0) # a0 <- obj.field (always 32 bits)
8899 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8900 GET_INST_OPCODE(t0) # extract opcode from rINST
8901 SET_VREG(a0, a2) # fp[A] <- a0
8902 GOTO_OPCODE(t0) # jump to next instruction
8906 /* ------------------------------ */
8908 .L_OP_IPUT_QUICK: /* 0xf5 */
8909 /* File: mips/OP_IPUT_QUICK.S */
8910 /* For: iput-quick, iput-object-quick */
8911 # op vA, vB, offset /* CCCC */
8912 GET_OPB(a2) # a2 <- B
8913 GET_VREG(a3, a2) # a3 <- fp[B], the object pointer
8914 FETCH(a1, 1) # a1 <- field byte offset
8915 GET_OPA4(a2) # a2 <- A(+)
8916 beqz a3, common_errNullObject # object was null
8917 GET_VREG(a0, a2) # a0 <- fp[A]
8918 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8920 sw a0, 0(t0) # obj.field (always 32 bits) <- a0
8921 GET_INST_OPCODE(t0) # extract opcode from rINST
8922 GOTO_OPCODE(t0) # jump to next instruction
8925 /* ------------------------------ */
8927 .L_OP_IPUT_WIDE_QUICK: /* 0xf6 */
8928 /* File: mips/OP_IPUT_WIDE_QUICK.S */
8929 # iput-wide-quick vA, vB, offset /* CCCC */
8930 GET_OPA4(a0) # a0 <- A(+)
8931 GET_OPB(a1) # a1 <- B
8932 GET_VREG(a2, a1) # a2 <- fp[B], the object pointer
8933 EAS2(a3, rFP, a0) # a3 <- &fp[A]
8934 LOAD64(a0, a1, a3) # a0/a1 <- fp[A]
8935 # check object for null
8936 beqz a2, common_errNullObject # object was null
8937 FETCH(a3, 1) # a3 <- field byte offset
8938 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8939 addu a2, a2, a3 # obj.field (64 bits, aligned) <- a0/a1
8940 STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0/a1
8941 GET_INST_OPCODE(t0) # extract opcode from rINST
8942 GOTO_OPCODE(t0) # jump to next instruction
8945 /* ------------------------------ */
8947 .L_OP_IPUT_OBJECT_QUICK: /* 0xf7 */
8948 /* File: mips/OP_IPUT_OBJECT_QUICK.S */
8949 /* For: iput-object-quick */
8950 # op vA, vB, offset /* CCCC */
8951 GET_OPB(a2) # a2 <- B
8952 GET_VREG(a3, a2) # a3 <- fp[B], the object pointer
8953 FETCH(a1, 1) # a1 <- field byte offset
8954 GET_OPA4(a2) # a2 <- A(+)
8955 beqz a3, common_errNullObject # object was null
8956 GET_VREG(a0, a2) # a0 <- fp[A]
8957 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
8959 sw a0, 0(t0) # obj.field (always 32 bits) <- a0
8961 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
8962 srl t1, a3, GC_CARD_SHIFT
8966 GET_INST_OPCODE(t0) # extract opcode from rINST
8967 GOTO_OPCODE(t0) # jump to next instruction
8969 /* ------------------------------ */
8971 .L_OP_INVOKE_VIRTUAL_QUICK: /* 0xf8 */
8972 /* File: mips/OP_INVOKE_VIRTUAL_QUICK.S */
8974 * Handle an optimized virtual method call.
8976 * for: [opt] invoke-virtual-quick, invoke-virtual-quick/range
8978 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
8979 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
8980 FETCH(a3, 2) # a3 <- FEDC or CCCC
8981 FETCH(a1, 1) # a1 <- BBBB
8983 and a3, a3, 15 # a3 <- C (or stays CCCC)
8985 GET_VREG(rOBJ, a3) # rOBJ <- vC ("this" ptr)
8987 beqz rOBJ, common_errNullObject # null "this", throw exception
8988 LOAD_base_offObject_clazz(a2, rOBJ) # a2 <- thisPtr->clazz
8989 LOAD_base_offClassObject_vtable(a2, a2) # a2 <- thisPtr->clazz->vtable
8990 EXPORT_PC() # invoke must export
8991 LOAD_eas2(a0, a2, a1) # a0 <- vtable[BBBB]
8992 b common_invokeMethodNoRange # (a0=method, r9="this")
8994 /* ------------------------------ */
8996 .L_OP_INVOKE_VIRTUAL_QUICK_RANGE: /* 0xf9 */
8997 /* File: mips/OP_INVOKE_VIRTUAL_QUICK_RANGE.S */
8998 /* File: mips/OP_INVOKE_VIRTUAL_QUICK.S */
9000 * Handle an optimized virtual method call.
9002 * for: [opt] invoke-virtual-quick, invoke-virtual-quick/range
9004 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
9005 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
9006 FETCH(a3, 2) # a3 <- FEDC or CCCC
9007 FETCH(a1, 1) # a1 <- BBBB
9009 and a3, a3, 15 # a3 <- C (or stays CCCC)
9011 GET_VREG(rOBJ, a3) # rOBJ <- vC ("this" ptr)
9013 beqz rOBJ, common_errNullObject # null "this", throw exception
9014 LOAD_base_offObject_clazz(a2, rOBJ) # a2 <- thisPtr->clazz
9015 LOAD_base_offClassObject_vtable(a2, a2) # a2 <- thisPtr->clazz->vtable
9016 EXPORT_PC() # invoke must export
9017 LOAD_eas2(a0, a2, a1) # a0 <- vtable[BBBB]
9018 b common_invokeMethodRange # (a0=method, r9="this")
9021 /* ------------------------------ */
9023 .L_OP_INVOKE_SUPER_QUICK: /* 0xfa */
9024 /* File: mips/OP_INVOKE_SUPER_QUICK.S */
9026 * Handle an optimized "super" method call.
9028 * for: [opt] invoke-super-quick, invoke-super-quick/range
9030 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
9031 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
9032 FETCH(t0, 2) # t0 <- GFED or CCCC
9033 LOAD_rSELF_method(a2) # a2 <- current method
9035 and t0, t0, 15 # t0 <- D (or stays CCCC)
9037 FETCH(a1, 1) # a1 <- BBBB
9038 LOAD_base_offMethod_clazz(a2, a2) # a2 <- method->clazz
9039 EXPORT_PC() # must export for invoke
9040 LOAD_base_offClassObject_super(a2, a2) # a2 <- method->clazz->super
9041 GET_VREG(rOBJ, t0) # rOBJ <- "this"
9042 LOAD_base_offClassObject_vtable(a2, a2) # a2 <- ...clazz->super->vtable
9044 LOAD_eas2(a0, a2, a1) # a0 <- super->vtable[BBBB]
9045 beqz rOBJ, common_errNullObject # "this" is null, throw exception
9046 b common_invokeMethodNoRange # (a0=method, rOBJ="this")
9049 /* ------------------------------ */
9051 .L_OP_INVOKE_SUPER_QUICK_RANGE: /* 0xfb */
9052 /* File: mips/OP_INVOKE_SUPER_QUICK_RANGE.S */
9053 /* File: mips/OP_INVOKE_SUPER_QUICK.S */
9055 * Handle an optimized "super" method call.
9057 * for: [opt] invoke-super-quick, invoke-super-quick/range
9059 # op vB, {vD, vE, vF, vG, vA}, class /* CCCC */
9060 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */
9061 FETCH(t0, 2) # t0 <- GFED or CCCC
9062 LOAD_rSELF_method(a2) # a2 <- current method
9064 and t0, t0, 15 # t0 <- D (or stays CCCC)
9066 FETCH(a1, 1) # a1 <- BBBB
9067 LOAD_base_offMethod_clazz(a2, a2) # a2 <- method->clazz
9068 EXPORT_PC() # must export for invoke
9069 LOAD_base_offClassObject_super(a2, a2) # a2 <- method->clazz->super
9070 GET_VREG(rOBJ, t0) # rOBJ <- "this"
9071 LOAD_base_offClassObject_vtable(a2, a2) # a2 <- ...clazz->super->vtable
9073 LOAD_eas2(a0, a2, a1) # a0 <- super->vtable[BBBB]
9074 beqz rOBJ, common_errNullObject # "this" is null, throw exception
9075 b common_invokeMethodRange # (a0=method, rOBJ="this")
9079 /* ------------------------------ */
9081 .L_OP_IPUT_OBJECT_VOLATILE: /* 0xfc */
9082 /* File: mips/OP_IPUT_OBJECT_VOLATILE.S */
9083 /* File: mips/OP_IPUT_OBJECT.S */
9085 * 32-bit instance field put.
9087 * for: iput-object, iput-object-volatile
9089 # op vA, vB, field /* CCCC */
9090 GET_OPB(a0) # a0 <- B
9091 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9092 FETCH(a1, 1) # a1 <- field ref CCCC
9093 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9094 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9095 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9096 # is resolved entry null?
9097 bnez a0, .LOP_IPUT_OBJECT_VOLATILE_finish # no, already resolved
9098 LOAD_rSELF_method(a2) # a2 <- current method
9099 EXPORT_PC() # resolve() could throw
9100 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9101 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9104 bnez v0, .LOP_IPUT_OBJECT_VOLATILE_finish # yes, finish up
9105 b common_exceptionThrown
9108 /* ------------------------------ */
9110 .L_OP_SGET_OBJECT_VOLATILE: /* 0xfd */
9111 /* File: mips/OP_SGET_OBJECT_VOLATILE.S */
9112 /* File: mips/OP_SGET.S */
9114 * General 32-bit SGET handler.
9116 * for: sget, sget-object, sget-boolean, sget-byte, sget-char, sget-short
9118 # op vAA, field /* BBBB */
9119 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
9120 FETCH(a1, 1) # a1 <- field ref BBBB
9121 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
9122 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
9123 # is resolved entry !null?
9124 bnez a0, .LOP_SGET_OBJECT_VOLATILE_finish
9127 * Continuation if the field has not yet been resolved.
9128 * a1: BBBB field ref
9129 * rBIX: dvmDex->pResFields
9131 LOAD_rSELF_method(a2) # a2 <- current method
9132 #if defined(WITH_JIT)
9133 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
9135 EXPORT_PC() # resolve() could throw, so export now
9136 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9137 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
9140 beqz v0, common_exceptionThrown # no, handle exception
9141 #if defined(WITH_JIT)
9143 * If the JIT is actively building a trace we need to make sure
9144 * that the field is fully resolved before including this instruction.
9146 JAL(common_verifyField)
9148 b .LOP_SGET_OBJECT_VOLATILE_finish # resume
9151 /* ------------------------------ */
9153 .L_OP_SPUT_OBJECT_VOLATILE: /* 0xfe */
9154 /* File: mips/OP_SPUT_OBJECT_VOLATILE.S */
9155 /* File: mips/OP_SPUT_OBJECT.S */
9157 * General 32-bit SPUT handler.
9159 * for: sput-object, sput-object-volatile
9161 /* op vAA, field@BBBB */
9162 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
9163 FETCH(a1, 1) # a1 <- field ref BBBB
9164 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
9165 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
9166 bnez a0, .LOP_SPUT_OBJECT_VOLATILE_finish # is resolved entry null?
9168 /* Continuation if the field has not yet been resolved.
9169 * a1: BBBB field ref
9170 * rBIX: dvmDex->pResFields
9172 LOAD_rSELF_method(a2) # a2 <- current method
9173 #if defined(WITH_JIT)
9174 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
9176 EXPORT_PC() # resolve() may throw, so export now
9177 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9178 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
9180 beqz v0, common_exceptionThrown # success? no, handle exception
9181 #if defined(WITH_JIT)
9183 * If the JIT is actively building a trace we need to make sure
9184 * that the field is fully resolved before including this instruction.
9186 JAL(common_verifyField)
9188 b .LOP_SPUT_OBJECT_VOLATILE_finish # resume
9192 /* ------------------------------ */
9194 .L_OP_DISPATCH_FF: /* 0xff */
9196 SAVE_PC_TO_SELF() # only need to export PC and FP
9198 move a0, rSELF # self is first arg to function
9199 JAL(dvmMterp_OP_DISPATCH_FF) # call
9200 LOAD_PC_FROM_SELF() # retrieve updated values
9202 FETCH_INST() # load next instruction from rPC
9203 GET_INST_OPCODE(t0) # ...trim down to just the opcode
9204 GOTO_OPCODE(t0) # ...and jump to the handler
9205 /* ------------------------------ */
9207 .L_OP_CONST_CLASS_JUMBO: /* 0x100 */
9208 /* File: mips/OP_CONST_CLASS_JUMBO.S */
9209 /* const-class/jumbo vBBBB, Class@AAAAAAAA */
9210 FETCH(a0, 1) # a0<- aaaa (lo)
9211 LOAD_rSELF_methodClassDex(a2) # a2 <- self->methodClassDex
9212 FETCH(a1, 2) # a1<- AAAA (hi)
9213 LOAD_base_offDvmDex_pResClasses(a2, a2) # a2 <- dvmDex->pResClasses
9215 or a1, a0, a1 # a1<- AAAAaaaa
9216 FETCH(rOBJ, 3) # rOBJ<- BBBB
9217 LOAD_eas2(v0, a2, a1) # v0 <- pResClasses[BBBB]
9219 bnez v0, .LOP_CONST_CLASS_JUMBO_resolve # v0!=0 => resolved-ok
9221 * Continuation if the Class has not yet been resolved.
9222 * a1: AAAAAAAA (Class ref)
9223 * rOBJ: target register
9226 LOAD_rSELF_method(a0) # a0 <- self->method
9227 li a2, 1 # a2 <- true
9228 LOAD_base_offMethod_clazz(a0, a0) # a0 <- method->clazz
9229 JAL(dvmResolveClass) # v0 <- Class reference
9231 beqz v0, common_exceptionThrown # yup, handle the exception
9233 .LOP_CONST_CLASS_JUMBO_resolve:
9234 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
9235 GET_INST_OPCODE(t0) # extract opcode from rINST
9236 SET_VREG_GOTO(v0, rOBJ, t0) # vBBBB <- v0
9240 /* ------------------------------ */
9242 .L_OP_CHECK_CAST_JUMBO: /* 0x101 */
9243 /* File: mips/OP_CHECK_CAST_JUMBO.S */
9245 * Check to see if a cast from one class to another is allowed.
9247 /* check-cast/ jumbo vBBBB, class #AAAAAAAA */
9248 FETCH(a0, 1) # a0<- aaaa (lo)
9249 FETCH(a2, 2) # a2<- AAAA (hi)
9250 FETCH(a3, 3) # a3<- BBBB
9252 or a2, a0, a2 # a2<- AAAAaaaa
9254 GET_VREG(rOBJ, a3) # rOBJ<- object
9255 LOAD_rSELF_methodClassDex(a0) # a0<- pDvmDex
9256 LOAD_base_offDvmDex_pResClasses(a0, a0) # a0<- pDvmDex->pResClasses
9258 beqz rOBJ, .LOP_CHECK_CAST_JUMBO_okay # null obj, cast always succeeds
9259 LOAD_eas2(a1, a0, a2) # a1<- resolved class
9260 LOAD_base_offObject_clazz(a0, rOBJ) # a0<- obj->clazz
9261 # have we resolved this before?
9262 beqz a1, .LOP_CHECK_CAST_JUMBO_resolve # not resolved, do it now
9263 .LOP_CHECK_CAST_JUMBO_resolved:
9264 # same class (trivial success)?
9265 bne a0, a1, .LOP_CHECK_CAST_JUMBO_fullcheck # no, do full check
9266 b .LOP_CHECK_CAST_JUMBO_okay # yes, finish up
9269 * Trivial test failed, need to perform full check. This is common.
9270 * a0 holds obj->clazz
9271 * a1 holds class resolved from BBBB
9274 .LOP_CHECK_CAST_JUMBO_fullcheck:
9275 move rBIX,a1 # avoid ClassObject getting clobbered
9276 JAL(dvmInstanceofNonTrivial) # v0<- boolean result
9278 bnez v0, .LOP_CHECK_CAST_JUMBO_okay # no, success
9279 b .LOP_CHECK_CAST_JUMBO_castfailure
9282 /* ------------------------------ */
9284 .L_OP_INSTANCE_OF_JUMBO: /* 0x102 */
9285 /* File: mips/OP_INSTANCE_OF_JUMBO.S */
9287 * Check to see if an object reference is an instance of a class.
9289 * Most common situation is a non-null object, being compared against
9290 * an already-resolved class.
9292 * TODO: convert most of this into a common subroutine, shared with
9295 /* instance-of/jumbo vBBBB, vCCCC, class@AAAAAAAA */
9296 FETCH(a3, 4) # a3<- vCCCC
9297 FETCH(rOBJ, 3) # rOBJ<- vBBBB
9298 GET_VREG(a0, a3) # a0 <- vCCCC (object)
9299 LOAD_rSELF_methodClassDex(a2) # a2 <- pDvmDex
9301 beqz a0, .LOP_INSTANCE_OF_JUMBO_store # null obj, not an instance, store a0
9302 FETCH(a1, 1) # r1<- aaaa (lo)
9303 FETCH(a3, 2) # r3<- AAAA (hi)
9304 LOAD_base_offDvmDex_pResClasses(a2, a2) # a2 <- pDvmDex->pResClasses
9306 or a3, a1, a3 # a3<- AAAAaaaa
9308 LOAD_eas2(a1, a2, a3) # a1 <- resolved class
9309 LOAD_base_offObject_clazz(a0, a0) # a0 <- obj->clazz
9310 # have we resolved this before?
9311 beqz a1, .LOP_INSTANCE_OF_JUMBO_resolve # not resolved, do it now
9312 b .LOP_INSTANCE_OF_JUMBO_resolved # resolved, continue
9315 /* ------------------------------ */
9317 .L_OP_NEW_INSTANCE_JUMBO: /* 0x103 */
9318 /* File: mips/OP_NEW_INSTANCE_JUMBO.S */
9320 * Create a new instance of a class.
9322 /* new-instance/jumbo vBBBB, class@AAAAAAAA */
9323 FETCH(a0, 1) # a0<- aaaa (lo)DvmDex
9324 FETCH(a1, 2) # a1<- AAAA (hi)BBB
9325 LOAD_base_offDvmDex_pResClasses(a3, a3) # a3 <- pDvmDex->pResClasses
9327 or a1, a0, a1 # a1<- AAAAaaaa
9328 LOAD_eas2(a0, a3, a1) # a0 <- resolved class
9329 #if defined(WITH_JIT)
9330 EAS2(rBIX, a3, a1) # rBIX <- &resolved_class
9332 EXPORT_PC() # req'd for init, resolve, alloc
9334 beqz a0, .LOP_NEW_INSTANCE_JUMBO_resolve # no, resolve it now
9335 .LOP_NEW_INSTANCE_JUMBO_resolved: # a0=class
9336 lbu a1, offClassObject_status(a0) # a1 <- ClassStatus enum
9337 # has class been initialized?
9338 li t0, CLASS_INITIALIZED
9339 move rOBJ, a0 # save a0
9340 bne a1, t0, .LOP_NEW_INSTANCE_JUMBO_needinit # no, init class now
9342 .LOP_NEW_INSTANCE_JUMBO_initialized: # a0=class
9343 LOAD_base_offClassObject_accessFlags(a3, a0) # a3 <- clazz->accessFlags
9344 li a1, ALLOC_DONT_TRACK # flags for alloc call
9346 JAL(dvmAllocObject) # v0 <- new object
9347 FETCH(a3, 3) # a3<- BBBB
9348 #if defined(WITH_JIT)
9350 * The JIT needs the class to be fully resolved before it can
9351 * include this instruction in a trace.
9353 lhu a1, offThread_subMode(rSELF)
9354 beqz v0, common_exceptionThrown # yes, handle the exception
9355 and a1, kSubModeJitTraceBuild # under construction?
9356 bnez a1, .LOP_NEW_INSTANCE_JUMBO_jitCheck
9359 beqz v0, common_exceptionThrown # yes, handle the exception
9361 b .LOP_NEW_INSTANCE_JUMBO_continue
9364 /* ------------------------------ */
9366 .L_OP_NEW_ARRAY_JUMBO: /* 0x104 */
9367 /* File: mips/OP_NEW_ARRAY_JUMBO.S */
9369 * Allocate an array of objects, specified with the array class
9372 * The verifier guarantees that this is an array class, so we don't
9373 * check for it here.
9375 /* new-array/jumbo vBBBB, vCCCC, class@AAAAAAAA */
9376 FETCH(a2, 1) # a2<- aaaa (lo)
9377 FETCH(a3, 2) # a3<- AAAA (hi)
9378 FETCH(a0, 4) # a0<- vCCCC
9380 or a2, a2, a3 # a2<- AAAAaaaa
9382 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
9383 GET_VREG(a1, a0) # a1 <- vCCCC (array length)
9384 LOAD_base_offDvmDex_pResClasses(a3, a3) # a3 <- pDvmDex->pResClasses
9385 LOAD_eas2(a0, a3, a2) # a0 <- resolved class
9387 bltz a1, common_errNegativeArraySize # negative length, bail - len in a1
9388 EXPORT_PC() # req'd for resolve, alloc
9390 beqz a0, .LOP_NEW_ARRAY_JUMBO_resolve # not resolved,
9391 b .LOP_NEW_ARRAY_JUMBO_finish
9393 /* ------------------------------ */
9395 .L_OP_FILLED_NEW_ARRAY_JUMBO: /* 0x105 */
9396 /* File: mips/OP_FILLED_NEW_ARRAY_JUMBO.S */
9398 * Create a new array with elements filled from registers.
9400 * TODO: convert most of this into a common subroutine, shared with
9401 * OP_FILLED_NEW_ARRAY.S.
9403 /* filled-new-array/jumbo {vCCCC..v(CCCC+BBBB-1)}, type@AAAAAAAA */
9405 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
9406 FETCH(a0, 1) # r0<- aaaa (lo)
9407 FETCH(a1, 2) # r1<- AAAA (hi)
9408 LOAD_base_offDvmDex_pResClasses(a3, a3) # a3 <- pDvmDex->pResClasses
9410 or a1, a0, a1 # a1<- AAAAaaaa
9411 LOAD_eas2(a0, a3, a1) # a0 <- resolved class
9412 GET_OPA(rOBJ) # rOBJ <- AA or BA
9413 EXPORT_PC() # need for resolve and alloc
9415 bnez a0, .LOP_FILLED_NEW_ARRAY_JUMBO_continue # yes, continue on
9416 LOAD_rSELF_method(a3) # a3 <- self->method
9417 li a2, 0 # a2 <- false
9418 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
9419 JAL(dvmResolveClass) # v0 <- call(clazz, ref)
9422 beqz v0, common_exceptionThrown # yes, handle exception
9423 b .LOP_FILLED_NEW_ARRAY_JUMBO_continue
9425 /* ------------------------------ */
9427 .L_OP_IGET_JUMBO: /* 0x106 */
9428 /* File: mips/OP_IGET_JUMBO.S */
9430 * Jumbo 32-bit instance field get.
9432 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
9433 * iget-char/jumbo, iget-short/jumbo
9435 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9436 FETCH(a1, 1) # a1<- aaaa (lo)
9437 FETCH(a2, 2) # a2<- AAAA (hi)
9438 FETCH(a0, 4) # a0<- CCCC
9439 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9441 or a1, a1, a2 # a1<- AAAAaaaa
9442 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9443 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9444 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9445 # is resolved entry null?
9446 bnez a0, .LOP_IGET_JUMBO_finish # no, already resolved
9447 LOAD_rSELF_method(a2) # a2 <- current method
9448 EXPORT_PC() # resolve() could throw
9449 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9450 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9451 b .LOP_IGET_JUMBO_resolved # resolved, continue
9454 /* ------------------------------ */
9456 .L_OP_IGET_WIDE_JUMBO: /* 0x107 */
9457 /* File: mips/OP_IGET_WIDE_JUMBO.S */
9459 * Jumbo 64-bit instance field get.
9461 /* iget-wide/jumbo vBBBB, vCCCC, field@AAAAAAAA */
9462 FETCH(a1, 1) # a1<- aaaa (lo)
9463 FETCH(a2, 2) # a2<- AAAA (hi)
9464 FETCH(a0, 4) # a0<- CCCC
9465 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9467 or a1, a1, a2 # a1<- AAAAaaaa
9468 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
9469 GET_VREG(rOBJ, a0) # rOBJ <- fp[CCCC], the object pointer
9470 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9471 # is resolved entry null?
9472 bnez a0, .LOP_IGET_WIDE_JUMBO_finish # no, already resolved
9473 LOAD_rSELF_method(a2) # a2 <- current method
9474 EXPORT_PC() # resolve() could throw
9475 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9476 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9477 b .LOP_IGET_WIDE_JUMBO_resolved # resolved, continue
9480 /* ------------------------------ */
9482 .L_OP_IGET_OBJECT_JUMBO: /* 0x108 */
9483 /* File: mips/OP_IGET_OBJECT_JUMBO.S */
9484 /* File: mips/OP_IGET_JUMBO.S */
9486 * Jumbo 32-bit instance field get.
9488 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
9489 * iget-char/jumbo, iget-short/jumbo
9491 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9492 FETCH(a1, 1) # a1<- aaaa (lo)
9493 FETCH(a2, 2) # a2<- AAAA (hi)
9494 FETCH(a0, 4) # a0<- CCCC
9495 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9497 or a1, a1, a2 # a1<- AAAAaaaa
9498 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9499 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9500 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9501 # is resolved entry null?
9502 bnez a0, .LOP_IGET_OBJECT_JUMBO_finish # no, already resolved
9503 LOAD_rSELF_method(a2) # a2 <- current method
9504 EXPORT_PC() # resolve() could throw
9505 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9506 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9507 b .LOP_IGET_OBJECT_JUMBO_resolved # resolved, continue
9511 /* ------------------------------ */
9513 .L_OP_IGET_BOOLEAN_JUMBO: /* 0x109 */
9514 /* File: mips/OP_IGET_BOOLEAN_JUMBO.S */
9515 /* File: mips/OP_IGET_JUMBO.S */
9517 * Jumbo 32-bit instance field get.
9519 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
9520 * iget-char/jumbo, iget-short/jumbo
9522 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9523 FETCH(a1, 1) # a1<- aaaa (lo)
9524 FETCH(a2, 2) # a2<- AAAA (hi)
9525 FETCH(a0, 4) # a0<- CCCC
9526 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9528 or a1, a1, a2 # a1<- AAAAaaaa
9529 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9530 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9531 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9532 # is resolved entry null?
9533 bnez a0, .LOP_IGET_BOOLEAN_JUMBO_finish # no, already resolved
9534 LOAD_rSELF_method(a2) # a2 <- current method
9535 EXPORT_PC() # resolve() could throw
9536 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9537 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9538 b .LOP_IGET_BOOLEAN_JUMBO_resolved # resolved, continue
9542 /* ------------------------------ */
9544 .L_OP_IGET_BYTE_JUMBO: /* 0x10a */
9545 /* File: mips/OP_IGET_BYTE_JUMBO.S */
9546 /* File: mips/OP_IGET_JUMBO.S */
9548 * Jumbo 32-bit instance field get.
9550 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
9551 * iget-char/jumbo, iget-short/jumbo
9553 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9554 FETCH(a1, 1) # a1<- aaaa (lo)
9555 FETCH(a2, 2) # a2<- AAAA (hi)
9556 FETCH(a0, 4) # a0<- CCCC
9557 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9559 or a1, a1, a2 # a1<- AAAAaaaa
9560 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9561 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9562 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9563 # is resolved entry null?
9564 bnez a0, .LOP_IGET_BYTE_JUMBO_finish # no, already resolved
9565 LOAD_rSELF_method(a2) # a2 <- current method
9566 EXPORT_PC() # resolve() could throw
9567 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9568 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9569 b .LOP_IGET_BYTE_JUMBO_resolved # resolved, continue
9573 /* ------------------------------ */
9575 .L_OP_IGET_CHAR_JUMBO: /* 0x10b */
9576 /* File: mips/OP_IGET_CHAR_JUMBO.S */
9577 /* File: mips/OP_IGET_JUMBO.S */
9579 * Jumbo 32-bit instance field get.
9581 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
9582 * iget-char/jumbo, iget-short/jumbo
9584 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9585 FETCH(a1, 1) # a1<- aaaa (lo)
9586 FETCH(a2, 2) # a2<- AAAA (hi)
9587 FETCH(a0, 4) # a0<- CCCC
9588 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9590 or a1, a1, a2 # a1<- AAAAaaaa
9591 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9592 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9593 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9594 # is resolved entry null?
9595 bnez a0, .LOP_IGET_CHAR_JUMBO_finish # no, already resolved
9596 LOAD_rSELF_method(a2) # a2 <- current method
9597 EXPORT_PC() # resolve() could throw
9598 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9599 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9600 b .LOP_IGET_CHAR_JUMBO_resolved # resolved, continue
9604 /* ------------------------------ */
9606 .L_OP_IGET_SHORT_JUMBO: /* 0x10c */
9607 /* File: mips/OP_IGET_SHORT_JUMBO.S */
9608 /* File: mips/OP_IGET_JUMBO.S */
9610 * Jumbo 32-bit instance field get.
9612 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
9613 * iget-char/jumbo, iget-short/jumbo
9615 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9616 FETCH(a1, 1) # a1<- aaaa (lo)
9617 FETCH(a2, 2) # a2<- AAAA (hi)
9618 FETCH(a0, 4) # a0<- CCCC
9619 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9621 or a1, a1, a2 # a1<- AAAAaaaa
9622 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9623 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9624 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9625 # is resolved entry null?
9626 bnez a0, .LOP_IGET_SHORT_JUMBO_finish # no, already resolved
9627 LOAD_rSELF_method(a2) # a2 <- current method
9628 EXPORT_PC() # resolve() could throw
9629 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9630 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9631 b .LOP_IGET_SHORT_JUMBO_resolved # resolved, continue
9635 /* ------------------------------ */
9637 .L_OP_IPUT_JUMBO: /* 0x10d */
9638 /* File: mips/OP_IPUT_JUMBO.S */
9640 * Jumbo 32-bit instance field put.
9642 * for: iput/jumbo, iput-boolean/jumbo, iput-byte/jumbo, iput-char/jumbo,
9645 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9646 FETCH(a1, 1) # a1<- aaaa (lo)
9647 FETCH(a2, 2) # a2<- AAAA (hi)
9648 FETCH(a0, 4) # a0<- CCCC
9649 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9651 or a1, a1, a2 # a1<- AAAAaaaa
9652 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9653 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9654 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9655 # is resolved entry null?
9656 bnez a0, .LOP_IPUT_JUMBO_finish # no, already resolved
9657 LOAD_rSELF_method(a2) # a2 <- current method
9658 EXPORT_PC() # resolve() could throw
9659 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9660 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9661 b .LOP_IPUT_JUMBO_resolved # resolved, continue
9664 /* ------------------------------ */
9666 .L_OP_IPUT_WIDE_JUMBO: /* 0x10e */
9667 /* File: mips/OP_IPUT_WIDE_JUMBO.S */
9668 /* iput-wide/jumbo vBBBB, vCCCC, field@AAAAAAAA */
9669 FETCH(a1, 1) # a1<- aaaa (lo)
9670 FETCH(a2, 2) # a2<- AAAA (hi)
9671 FETCH(a0, 4) # a0<- CCCC
9672 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9674 or a1, a1, a2 # a1<- AAAAaaaa
9676 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
9677 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9678 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9679 # is resolved entry null?
9680 bnez a0, .LOP_IPUT_WIDE_JUMBO_finish # no, already resolved
9681 LOAD_rSELF_method(a2) # a2 <- current method
9682 EXPORT_PC() # resolve() could throw
9683 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9684 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9685 b .LOP_IPUT_WIDE_JUMBO_resolved # resolved, continue
9688 /* ------------------------------ */
9690 .L_OP_IPUT_OBJECT_JUMBO: /* 0x10f */
9691 /* File: mips/OP_IPUT_OBJECT_JUMBO.S */
9693 * Jumbo 32-bit instance field put.
9695 /* iput-object/jumbo vBBBB, vCCCC, field@AAAAAAAA */
9696 FETCH(a1, 1) # a1<- aaaa (lo)
9697 FETCH(a2, 2) # a2<- AAAA (hi)
9698 FETCH(a0, 4) # a0<- CCCC
9699 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9701 or a1, a1, a2 # a1<- AAAAaaaa
9702 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9703 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9704 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9705 # is resolved entry null?
9706 bnez a0, .LOP_IPUT_OBJECT_JUMBO_finish # no, already resolved
9707 LOAD_rSELF_method(a2) # a2 <- current method
9708 EXPORT_PC() # resolve() could throw
9709 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9710 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9711 b .LOP_IPUT_OBJECT_JUMBO_resolved
9714 /* ------------------------------ */
9716 .L_OP_IPUT_BOOLEAN_JUMBO: /* 0x110 */
9717 /* File: mips/OP_IPUT_BOOLEAN_JUMBO.S */
9718 /* File: mips/OP_IPUT_JUMBO.S */
9720 * Jumbo 32-bit instance field put.
9722 * for: iput/jumbo, iput-boolean/jumbo, iput-byte/jumbo, iput-char/jumbo,
9725 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9726 FETCH(a1, 1) # a1<- aaaa (lo)
9727 FETCH(a2, 2) # a2<- AAAA (hi)
9728 FETCH(a0, 4) # a0<- CCCC
9729 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9731 or a1, a1, a2 # a1<- AAAAaaaa
9732 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9733 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9734 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9735 # is resolved entry null?
9736 bnez a0, .LOP_IPUT_BOOLEAN_JUMBO_finish # no, already resolved
9737 LOAD_rSELF_method(a2) # a2 <- current method
9738 EXPORT_PC() # resolve() could throw
9739 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9740 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9741 b .LOP_IPUT_BOOLEAN_JUMBO_resolved # resolved, continue
9745 /* ------------------------------ */
9747 .L_OP_IPUT_BYTE_JUMBO: /* 0x111 */
9748 /* File: mips/OP_IPUT_BYTE_JUMBO.S */
9749 /* File: mips/OP_IPUT_JUMBO.S */
9751 * Jumbo 32-bit instance field put.
9753 * for: iput/jumbo, iput-boolean/jumbo, iput-byte/jumbo, iput-char/jumbo,
9756 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9757 FETCH(a1, 1) # a1<- aaaa (lo)
9758 FETCH(a2, 2) # a2<- AAAA (hi)
9759 FETCH(a0, 4) # a0<- CCCC
9760 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9762 or a1, a1, a2 # a1<- AAAAaaaa
9763 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9764 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9765 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9766 # is resolved entry null?
9767 bnez a0, .LOP_IPUT_BYTE_JUMBO_finish # no, already resolved
9768 LOAD_rSELF_method(a2) # a2 <- current method
9769 EXPORT_PC() # resolve() could throw
9770 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9771 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9772 b .LOP_IPUT_BYTE_JUMBO_resolved # resolved, continue
9776 /* ------------------------------ */
9778 .L_OP_IPUT_CHAR_JUMBO: /* 0x112 */
9779 /* File: mips/OP_IPUT_CHAR_JUMBO.S */
9780 /* File: mips/OP_IPUT_JUMBO.S */
9782 * Jumbo 32-bit instance field put.
9784 * for: iput/jumbo, iput-boolean/jumbo, iput-byte/jumbo, iput-char/jumbo,
9787 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9788 FETCH(a1, 1) # a1<- aaaa (lo)
9789 FETCH(a2, 2) # a2<- AAAA (hi)
9790 FETCH(a0, 4) # a0<- CCCC
9791 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9793 or a1, a1, a2 # a1<- AAAAaaaa
9794 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9795 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9796 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9797 # is resolved entry null?
9798 bnez a0, .LOP_IPUT_CHAR_JUMBO_finish # no, already resolved
9799 LOAD_rSELF_method(a2) # a2 <- current method
9800 EXPORT_PC() # resolve() could throw
9801 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9802 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9803 b .LOP_IPUT_CHAR_JUMBO_resolved # resolved, continue
9807 /* ------------------------------ */
9809 .L_OP_IPUT_SHORT_JUMBO: /* 0x113 */
9810 /* File: mips/OP_IPUT_SHORT_JUMBO.S */
9811 /* File: mips/OP_IPUT_JUMBO.S */
9813 * Jumbo 32-bit instance field put.
9815 * for: iput/jumbo, iput-boolean/jumbo, iput-byte/jumbo, iput-char/jumbo,
9818 /* exop vBBBB, vCCCC, field@AAAAAAAA */
9819 FETCH(a1, 1) # a1<- aaaa (lo)
9820 FETCH(a2, 2) # a2<- AAAA (hi)
9821 FETCH(a0, 4) # a0<- CCCC
9822 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
9824 or a1, a1, a2 # a1<- AAAAaaaa
9825 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
9826 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
9827 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
9828 # is resolved entry null?
9829 bnez a0, .LOP_IPUT_SHORT_JUMBO_finish # no, already resolved
9830 LOAD_rSELF_method(a2) # a2 <- current method
9831 EXPORT_PC() # resolve() could throw
9832 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9833 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
9834 b .LOP_IPUT_SHORT_JUMBO_resolved # resolved, continue
9838 /* ------------------------------ */
9840 .L_OP_SGET_JUMBO: /* 0x114 */
9841 /* File: mips/OP_SGET_JUMBO.S */
9843 * Jumbo 32-bit SGET handler.
9845 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
9846 * sget-char/jumbo, sget-short/jumbo
9848 /* exop vBBBB, field@AAAAAAAA */
9849 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
9850 FETCH(a0, 1) # a0<- aaaa (lo)
9851 FETCH(a1, 2) # a1<- AAAA (hi)
9852 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
9854 or a1, a0, a1 # a1<- AAAAaaaa
9855 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
9856 # is resolved entry !null?
9857 bnez a0, .LOP_SGET_JUMBO_finish
9860 * Continuation if the field has not yet been resolved.
9861 * a1: AAAAAAAA field ref
9862 * rBIX: dvmDex->pResFields
9864 LOAD_rSELF_method(a2) # a2 <- current method
9865 #if defined(WITH_JIT)
9866 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
9868 EXPORT_PC() # resolve() could throw, so export now
9869 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9870 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
9873 beqz v0, common_exceptionThrown # no, handle exception
9874 #if defined(WITH_JIT)
9876 * If the JIT is actively building a trace we need to make sure
9877 * that the field is fully resolved before including this instruction.
9879 JAL(common_verifyField)
9881 b .LOP_SGET_JUMBO_finish # resume
9883 /* ------------------------------ */
9885 .L_OP_SGET_WIDE_JUMBO: /* 0x115 */
9886 /* File: mips/OP_SGET_WIDE_JUMBO.S */
9888 * Jumbo 64-bit SGET handler.
9890 /* sget-wide/jumbo vBBBB, field@AAAAAAAA */
9891 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
9892 FETCH(a0, 1) # a0<- aaaa (lo)
9893 FETCH(a1, 2) # a1<- AAAA (hi)
9894 LOAD_base_offDvmDex_pResFields(a2, a2) # a2 <- dvmDex->pResFields
9896 or a1, a0, a1 # a1<- AAAAaaaa
9897 LOAD_eas2(a0, a2, a1) # a0 <- resolved StaticField ptr
9898 # is resolved entry null?
9899 bnez a0, .LOP_SGET_WIDE_JUMBO_finish
9902 * Continuation if the field has not yet been resolved.
9903 * a1: AAAAAAAA field ref
9905 * Returns StaticField pointer in v0.
9907 LOAD_rSELF_method(a2) # a2 <- current method
9908 EXPORT_PC() # resolve() could throw, so export now
9909 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9910 JAL(dvmResolveStaticField) # a0 <- resolved StaticField ptr
9913 beqz v0, common_exceptionThrown # no, handle exception
9914 b .LOP_SGET_WIDE_JUMBO_finish # resume
9916 /* ------------------------------ */
9918 .L_OP_SGET_OBJECT_JUMBO: /* 0x116 */
9919 /* File: mips/OP_SGET_OBJECT_JUMBO.S */
9920 /* File: mips/OP_SGET_JUMBO.S */
9922 * Jumbo 32-bit SGET handler.
9924 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
9925 * sget-char/jumbo, sget-short/jumbo
9927 /* exop vBBBB, field@AAAAAAAA */
9928 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
9929 FETCH(a0, 1) # a0<- aaaa (lo)
9930 FETCH(a1, 2) # a1<- AAAA (hi)
9931 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
9933 or a1, a0, a1 # a1<- AAAAaaaa
9934 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
9935 # is resolved entry !null?
9936 bnez a0, .LOP_SGET_OBJECT_JUMBO_finish
9939 * Continuation if the field has not yet been resolved.
9940 * a1: AAAAAAAA field ref
9941 * rBIX: dvmDex->pResFields
9943 LOAD_rSELF_method(a2) # a2 <- current method
9944 #if defined(WITH_JIT)
9945 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
9947 EXPORT_PC() # resolve() could throw, so export now
9948 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9949 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
9952 beqz v0, common_exceptionThrown # no, handle exception
9953 #if defined(WITH_JIT)
9955 * If the JIT is actively building a trace we need to make sure
9956 * that the field is fully resolved before including this instruction.
9958 JAL(common_verifyField)
9960 b .LOP_SGET_OBJECT_JUMBO_finish # resume
9963 /* ------------------------------ */
9965 .L_OP_SGET_BOOLEAN_JUMBO: /* 0x117 */
9966 /* File: mips/OP_SGET_BOOLEAN_JUMBO.S */
9967 /* File: mips/OP_SGET_JUMBO.S */
9969 * Jumbo 32-bit SGET handler.
9971 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
9972 * sget-char/jumbo, sget-short/jumbo
9974 /* exop vBBBB, field@AAAAAAAA */
9975 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
9976 FETCH(a0, 1) # a0<- aaaa (lo)
9977 FETCH(a1, 2) # a1<- AAAA (hi)
9978 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
9980 or a1, a0, a1 # a1<- AAAAaaaa
9981 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
9982 # is resolved entry !null?
9983 bnez a0, .LOP_SGET_BOOLEAN_JUMBO_finish
9986 * Continuation if the field has not yet been resolved.
9987 * a1: AAAAAAAA field ref
9988 * rBIX: dvmDex->pResFields
9990 LOAD_rSELF_method(a2) # a2 <- current method
9991 #if defined(WITH_JIT)
9992 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
9994 EXPORT_PC() # resolve() could throw, so export now
9995 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
9996 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
9999 beqz v0, common_exceptionThrown # no, handle exception
10000 #if defined(WITH_JIT)
10002 * If the JIT is actively building a trace we need to make sure
10003 * that the field is fully resolved before including this instruction.
10005 JAL(common_verifyField)
10007 b .LOP_SGET_BOOLEAN_JUMBO_finish # resume
10010 /* ------------------------------ */
10012 .L_OP_SGET_BYTE_JUMBO: /* 0x118 */
10013 /* File: mips/OP_SGET_BYTE_JUMBO.S */
10014 /* File: mips/OP_SGET_JUMBO.S */
10016 * Jumbo 32-bit SGET handler.
10018 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
10019 * sget-char/jumbo, sget-short/jumbo
10021 /* exop vBBBB, field@AAAAAAAA */
10022 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10023 FETCH(a0, 1) # a0<- aaaa (lo)
10024 FETCH(a1, 2) # a1<- AAAA (hi)
10025 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10027 or a1, a0, a1 # a1<- AAAAaaaa
10028 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10029 # is resolved entry !null?
10030 bnez a0, .LOP_SGET_BYTE_JUMBO_finish
10033 * Continuation if the field has not yet been resolved.
10034 * a1: AAAAAAAA field ref
10035 * rBIX: dvmDex->pResFields
10037 LOAD_rSELF_method(a2) # a2 <- current method
10038 #if defined(WITH_JIT)
10039 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10041 EXPORT_PC() # resolve() could throw, so export now
10042 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10043 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10046 beqz v0, common_exceptionThrown # no, handle exception
10047 #if defined(WITH_JIT)
10049 * If the JIT is actively building a trace we need to make sure
10050 * that the field is fully resolved before including this instruction.
10052 JAL(common_verifyField)
10054 b .LOP_SGET_BYTE_JUMBO_finish # resume
10057 /* ------------------------------ */
10059 .L_OP_SGET_CHAR_JUMBO: /* 0x119 */
10060 /* File: mips/OP_SGET_CHAR_JUMBO.S */
10061 /* File: mips/OP_SGET_JUMBO.S */
10063 * Jumbo 32-bit SGET handler.
10065 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
10066 * sget-char/jumbo, sget-short/jumbo
10068 /* exop vBBBB, field@AAAAAAAA */
10069 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10070 FETCH(a0, 1) # a0<- aaaa (lo)
10071 FETCH(a1, 2) # a1<- AAAA (hi)
10072 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10074 or a1, a0, a1 # a1<- AAAAaaaa
10075 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10076 # is resolved entry !null?
10077 bnez a0, .LOP_SGET_CHAR_JUMBO_finish
10080 * Continuation if the field has not yet been resolved.
10081 * a1: AAAAAAAA field ref
10082 * rBIX: dvmDex->pResFields
10084 LOAD_rSELF_method(a2) # a2 <- current method
10085 #if defined(WITH_JIT)
10086 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10088 EXPORT_PC() # resolve() could throw, so export now
10089 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10090 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10093 beqz v0, common_exceptionThrown # no, handle exception
10094 #if defined(WITH_JIT)
10096 * If the JIT is actively building a trace we need to make sure
10097 * that the field is fully resolved before including this instruction.
10099 JAL(common_verifyField)
10101 b .LOP_SGET_CHAR_JUMBO_finish # resume
10104 /* ------------------------------ */
10106 .L_OP_SGET_SHORT_JUMBO: /* 0x11a */
10107 /* File: mips/OP_SGET_SHORT_JUMBO.S */
10108 /* File: mips/OP_SGET_JUMBO.S */
10110 * Jumbo 32-bit SGET handler.
10112 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
10113 * sget-char/jumbo, sget-short/jumbo
10115 /* exop vBBBB, field@AAAAAAAA */
10116 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10117 FETCH(a0, 1) # a0<- aaaa (lo)
10118 FETCH(a1, 2) # a1<- AAAA (hi)
10119 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10121 or a1, a0, a1 # a1<- AAAAaaaa
10122 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10123 # is resolved entry !null?
10124 bnez a0, .LOP_SGET_SHORT_JUMBO_finish
10127 * Continuation if the field has not yet been resolved.
10128 * a1: AAAAAAAA field ref
10129 * rBIX: dvmDex->pResFields
10131 LOAD_rSELF_method(a2) # a2 <- current method
10132 #if defined(WITH_JIT)
10133 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10135 EXPORT_PC() # resolve() could throw, so export now
10136 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10137 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10140 beqz v0, common_exceptionThrown # no, handle exception
10141 #if defined(WITH_JIT)
10143 * If the JIT is actively building a trace we need to make sure
10144 * that the field is fully resolved before including this instruction.
10146 JAL(common_verifyField)
10148 b .LOP_SGET_SHORT_JUMBO_finish # resume
10151 /* ------------------------------ */
10153 .L_OP_SPUT_JUMBO: /* 0x11b */
10154 /* File: mips/OP_SPUT_JUMBO.S */
10156 * Jumbo 32-bit SPUT handler.
10158 * for: sput/jumbo, sput-boolean/jumbo, sput-byte/jumbo, sput-char/jumbo,
10161 /* exop vBBBB, field@AAAAAAAA */
10162 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10163 FETCH(a0, 1) # a0<- aaaa (lo)
10164 FETCH(a1, 2) # a1<- AAAA (hi)
10165 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10167 or a1, a0, a1 # a1<- AAAAaaaa
10168 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10169 bnez a0, .LOP_SPUT_JUMBO_finish # is resolved entry null?
10172 * Continuation if the field has not yet been resolved.
10173 * a1: AAAAAAAA field ref
10174 * rBIX: dvmDex->pResFields
10176 LOAD_rSELF_method(a2) # a2 <- current method
10177 #if defined(WITH_JIT)
10178 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10180 EXPORT_PC() # resolve() may throw, so export now
10181 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10182 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10184 beqz v0, common_exceptionThrown # success? no, handle exception
10185 #if defined(WITH_JIT)
10187 * If the JIT is actively building a trace we need to make sure
10188 * that the field is fully resolved before including this instruction.
10190 JAL(common_verifyField)
10192 b .LOP_SPUT_JUMBO_finish # resume
10194 /* ------------------------------ */
10196 .L_OP_SPUT_WIDE_JUMBO: /* 0x11c */
10197 /* File: mips/OP_SPUT_WIDE_JUMBO.S */
10199 * Jumbo 64-bit SPUT handler.
10201 /* sput-wide/jumbo vBBBB, field@AAAAAAAA */
10202 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10203 FETCH(a1, 1) # a1<- aaaa (lo)
10204 FETCH(a2, 2) # a2<- AAAA (hi)
10205 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10207 or a1, a1, a2 # a1<- AAAAaaaa
10208 FETCH(rOBJ, 3) # rOBJ<- BBBB solved StaticField ptr
10209 EAS2(rOBJ, rFP, t0) # rOBJ<- &fp[BBBB]
10210 # is resolved entry null?
10211 beqz a2, .LOP_SPUT_WIDE_JUMBO_resolve # yes, do resolve
10212 .LOP_SPUT_WIDE_JUMBO_finish: # field ptr in a2, BBBB in rOBJ
10213 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
10214 LOAD64(a0, a1, rOBJ) # a0/a1 <- vBBBB/vBBBB+1
10215 GET_INST_OPCODE(rBIX) # extract opcode from rINST
10217 addu a2, offStaticField_value # a2<- pointer to data
10218 JAL(dvmQuasiAtomicSwap64Sync) # stores a0/a1 into addr a2
10220 STORE64_off(a0, a1, a2, offStaticField_value) # field <- vBBBB/vBBBB+1
10222 GOTO_OPCODE(rBIX) # jump to next instruction
10224 /* ------------------------------ */
10226 .L_OP_SPUT_OBJECT_JUMBO: /* 0x11d */
10227 /* File: mips/OP_SPUT_OBJECT_JUMBO.S */
10229 * Jumbo 32-bit SPUT handler for objects
10231 /* sput-object/jumbo vBBBB, field@AAAAAAAA */
10232 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10233 FETCH(a0, 1) # a0<- aaaa (lo)
10234 FETCH(a1, 2) # a1<- AAAA (hi)
10235 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10237 or a1,a0,a1 # a1<- AAAAaaaa
10239 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10240 bnez a0, .LOP_SPUT_OBJECT_JUMBO_finish # is resolved entry null?
10242 /* Continuation if the field has not yet been resolved.
10243 * a1: BBBB field ref
10244 * rBIX: dvmDex->pResFields
10246 LOAD_rSELF_method(a2) # a2 <- current method
10247 #if defined(WITH_JIT)
10248 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10250 EXPORT_PC() # resolve() may throw, so export now
10251 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10252 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10254 beqz v0, common_exceptionThrown # success? no, handle exception
10255 #if defined(WITH_JIT)
10257 * If the JIT is actively building a trace we need to make sure
10258 * that the field is fully resolved before including this instruction.
10260 JAL(common_verifyField)
10262 b .LOP_SPUT_OBJECT_JUMBO_finish # resume
10265 /* ------------------------------ */
10267 .L_OP_SPUT_BOOLEAN_JUMBO: /* 0x11e */
10268 /* File: mips/OP_SPUT_BOOLEAN_JUMBO.S */
10269 /* File: mips/OP_SPUT_JUMBO.S */
10271 * Jumbo 32-bit SPUT handler.
10273 * for: sput/jumbo, sput-boolean/jumbo, sput-byte/jumbo, sput-char/jumbo,
10276 /* exop vBBBB, field@AAAAAAAA */
10277 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10278 FETCH(a0, 1) # a0<- aaaa (lo)
10279 FETCH(a1, 2) # a1<- AAAA (hi)
10280 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10282 or a1, a0, a1 # a1<- AAAAaaaa
10283 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10284 bnez a0, .LOP_SPUT_BOOLEAN_JUMBO_finish # is resolved entry null?
10287 * Continuation if the field has not yet been resolved.
10288 * a1: AAAAAAAA field ref
10289 * rBIX: dvmDex->pResFields
10291 LOAD_rSELF_method(a2) # a2 <- current method
10292 #if defined(WITH_JIT)
10293 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10295 EXPORT_PC() # resolve() may throw, so export now
10296 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10297 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10299 beqz v0, common_exceptionThrown # success? no, handle exception
10300 #if defined(WITH_JIT)
10302 * If the JIT is actively building a trace we need to make sure
10303 * that the field is fully resolved before including this instruction.
10305 JAL(common_verifyField)
10307 b .LOP_SPUT_BOOLEAN_JUMBO_finish # resume
10310 /* ------------------------------ */
10312 .L_OP_SPUT_BYTE_JUMBO: /* 0x11f */
10313 /* File: mips/OP_SPUT_BYTE_JUMBO.S */
10314 /* File: mips/OP_SPUT_JUMBO.S */
10316 * Jumbo 32-bit SPUT handler.
10318 * for: sput/jumbo, sput-boolean/jumbo, sput-byte/jumbo, sput-char/jumbo,
10321 /* exop vBBBB, field@AAAAAAAA */
10322 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10323 FETCH(a0, 1) # a0<- aaaa (lo)
10324 FETCH(a1, 2) # a1<- AAAA (hi)
10325 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10327 or a1, a0, a1 # a1<- AAAAaaaa
10328 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10329 bnez a0, .LOP_SPUT_BYTE_JUMBO_finish # is resolved entry null?
10332 * Continuation if the field has not yet been resolved.
10333 * a1: AAAAAAAA field ref
10334 * rBIX: dvmDex->pResFields
10336 LOAD_rSELF_method(a2) # a2 <- current method
10337 #if defined(WITH_JIT)
10338 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10340 EXPORT_PC() # resolve() may throw, so export now
10341 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10342 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10344 beqz v0, common_exceptionThrown # success? no, handle exception
10345 #if defined(WITH_JIT)
10347 * If the JIT is actively building a trace we need to make sure
10348 * that the field is fully resolved before including this instruction.
10350 JAL(common_verifyField)
10352 b .LOP_SPUT_BYTE_JUMBO_finish # resume
10355 /* ------------------------------ */
10357 .L_OP_SPUT_CHAR_JUMBO: /* 0x120 */
10358 /* File: mips/OP_SPUT_CHAR_JUMBO.S */
10359 /* File: mips/OP_SPUT_JUMBO.S */
10361 * Jumbo 32-bit SPUT handler.
10363 * for: sput/jumbo, sput-boolean/jumbo, sput-byte/jumbo, sput-char/jumbo,
10366 /* exop vBBBB, field@AAAAAAAA */
10367 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10368 FETCH(a0, 1) # a0<- aaaa (lo)
10369 FETCH(a1, 2) # a1<- AAAA (hi)
10370 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10372 or a1, a0, a1 # a1<- AAAAaaaa
10373 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10374 bnez a0, .LOP_SPUT_CHAR_JUMBO_finish # is resolved entry null?
10377 * Continuation if the field has not yet been resolved.
10378 * a1: AAAAAAAA field ref
10379 * rBIX: dvmDex->pResFields
10381 LOAD_rSELF_method(a2) # a2 <- current method
10382 #if defined(WITH_JIT)
10383 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10385 EXPORT_PC() # resolve() may throw, so export now
10386 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10387 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10389 beqz v0, common_exceptionThrown # success? no, handle exception
10390 #if defined(WITH_JIT)
10392 * If the JIT is actively building a trace we need to make sure
10393 * that the field is fully resolved before including this instruction.
10395 JAL(common_verifyField)
10397 b .LOP_SPUT_CHAR_JUMBO_finish # resume
10400 /* ------------------------------ */
10402 .L_OP_SPUT_SHORT_JUMBO: /* 0x121 */
10403 /* File: mips/OP_SPUT_SHORT_JUMBO.S */
10404 /* File: mips/OP_SPUT_JUMBO.S */
10406 * Jumbo 32-bit SPUT handler.
10408 * for: sput/jumbo, sput-boolean/jumbo, sput-byte/jumbo, sput-char/jumbo,
10411 /* exop vBBBB, field@AAAAAAAA */
10412 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
10413 FETCH(a0, 1) # a0<- aaaa (lo)
10414 FETCH(a1, 2) # a1<- AAAA (hi)
10415 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
10417 or a1, a0, a1 # a1<- AAAAaaaa
10418 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
10419 bnez a0, .LOP_SPUT_SHORT_JUMBO_finish # is resolved entry null?
10422 * Continuation if the field has not yet been resolved.
10423 * a1: AAAAAAAA field ref
10424 * rBIX: dvmDex->pResFields
10426 LOAD_rSELF_method(a2) # a2 <- current method
10427 #if defined(WITH_JIT)
10428 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
10430 EXPORT_PC() # resolve() may throw, so export now
10431 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
10432 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
10434 beqz v0, common_exceptionThrown # success? no, handle exception
10435 #if defined(WITH_JIT)
10437 * If the JIT is actively building a trace we need to make sure
10438 * that the field is fully resolved before including this instruction.
10440 JAL(common_verifyField)
10442 b .LOP_SPUT_SHORT_JUMBO_finish # resume
10445 /* ------------------------------ */
10447 .L_OP_INVOKE_VIRTUAL_JUMBO: /* 0x122 */
10448 /* File: mips/OP_INVOKE_VIRTUAL_JUMBO.S */
10450 * Handle a virtual method call.
10452 /* invoke-virtual/jumbo {vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA */
10453 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
10454 FETCH(a0, 1) # a0<- aaaa (lo)
10455 FETCH(a1, 2) # a1<- AAAA (hi)
10456 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
10458 or a1, a0, a1 # a1<- AAAAaaaa
10459 LOAD_eas2(a0, a3, a1) # a0 <- resolved baseMethod
10460 EXPORT_PC() # must export for invoke
10461 # already resolved?
10462 bnez a0, .LOP_INVOKE_VIRTUAL_JUMBO_continue # yes, continue on
10464 LOAD_rSELF_method(a3) # a3 <- self->method
10465 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
10466 li a2, METHOD_VIRTUAL # resolver method type
10467 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
10470 bnez v0, .LOP_INVOKE_VIRTUAL_JUMBO_continue # no, continue
10471 b common_exceptionThrown # yes, handle exception
10473 /* ------------------------------ */
10475 .L_OP_INVOKE_SUPER_JUMBO: /* 0x123 */
10476 /* File: mips/OP_INVOKE_SUPER_JUMBO.S */
10478 * Handle a "super" method call.
10480 /* invoke-super/jumbo {vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA */
10481 FETCH(t0, 4) # t0<- CCCC
10482 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
10483 FETCH(a0, 1) # a0<- aaaa (lo)
10484 FETCH(a1, 2) # a1<- AAAA (hi)
10485 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
10487 or a1, a0, a1 # a1<- AAAAaaaa
10488 GET_VREG(rOBJ, t0) # rOBJ <- "this" ptr
10489 LOAD_eas2(a0, a3, a1) # a0 <- resolved baseMethod
10491 LOAD_rSELF_method(t1) # t1 <- current method
10492 beqz rOBJ, common_errNullObject # null "this", throw exception
10493 # cmp a0, 0; already resolved?
10494 LOAD_base_offMethod_clazz(rBIX, t1) # rBIX <- method->clazz
10495 EXPORT_PC() # must export for invoke
10496 bnez a0, .LOP_INVOKE_SUPER_JUMBO_continue # resolved, continue on
10498 move a0, rBIX # a0 <- method->clazz
10499 li a2, METHOD_VIRTUAL # resolver method type
10500 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
10503 beqz v0, common_exceptionThrown # yes, handle exception
10504 b .LOP_INVOKE_SUPER_JUMBO_continue
10506 /* ------------------------------ */
10508 .L_OP_INVOKE_DIRECT_JUMBO: /* 0x124 */
10509 /* File: mips/OP_INVOKE_DIRECT_JUMBO.S */
10511 * Handle a direct method call.
10513 * (We could defer the "is 'this' pointer null" test to the common
10514 * method invocation code, and use a flag to indicate that static
10515 * calls don't count. If we do this as part of copying the arguments
10516 * out we could avoiding loading the first arg twice.)
10519 /* invoke-direct/jumbo {vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA */
10520 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
10521 FETCH(a0, 1) # a0<- aaaa (lo)
10522 FETCH(a1, 2) # a1<- AAAA (hi)
10523 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
10525 or a1, a0, a1 # a1<- AAAAaaaa
10526 FETCH(rBIX, 4) # rBIX <- GFED or CCCC
10527 LOAD_eas2(a0, a3, a1) # a0 <- resolved methodToCall
10529 and rBIX, rBIX, 15 # rBIX <- D (or stays CCCC)
10531 EXPORT_PC() # must export for invoke
10532 GET_VREG(rOBJ, rBIX) # rOBJ <- "this" ptr
10533 # already resolved?
10534 bnez a0, 1f # resolved, call the function
10536 lw a3, offThread_method(rSELF) # a3 <- self->method
10537 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
10538 li a2, METHOD_DIRECT # resolver method type
10539 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
10542 beqz v0, common_exceptionThrown # yes, handle exception
10545 bnez rOBJ, common_invokeMethodJumbo # a0=method, rOBJ="this"
10546 b common_errNullObject # yes, throw exception
10551 /* ------------------------------ */
10553 .L_OP_INVOKE_STATIC_JUMBO: /* 0x125 */
10554 /* File: mips/OP_INVOKE_STATIC_JUMBO.S */
10556 * Handle a static method call.
10558 /* invoke-static/jumbo {vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA */
10559 LOAD_rSELF_methodClassDex(a3) # a3 <- pDvmDex
10560 FETCH(a0, 1) # a0<- aaaa (lo)
10561 FETCH(a1, 2) # a1<- AAAA (hi)
10562 LOAD_base_offDvmDex_pResMethods(a3, a3) # a3 <- pDvmDex->pResMethods
10564 or a1, a0, a1 # r1<- AAAAaaaa
10565 li rOBJ, 0 # null "this" in delay slot
10566 LOAD_eas2(a0, a3, a1) # a0 <- resolved methodToCall
10567 #if defined(WITH_JIT)
10568 EAS2(rBIX, a3, a1) # rBIX<- &resolved_metherToCall
10570 EXPORT_PC() # must export for invoke
10571 # already resolved?
10572 bnez a0, common_invokeMethodJumboNoThis # (a0 = method)
10573 b .LOP_INVOKE_STATIC_JUMBO_resolve
10575 /* ------------------------------ */
10577 .L_OP_INVOKE_INTERFACE_JUMBO: /* 0x126 */
10578 /* File: mips/OP_INVOKE_INTERFACE_JUMBO.S */
10580 * Handle an interface method call.
10582 /* invoke-interface/jumbo {vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA */
10583 FETCH(a2, 4) # a2<- CCCC
10584 FETCH(a0, 1) # a0<- aaaa (lo)
10585 FETCH(a1, 2) # a1<- AAAA (hi)
10586 EXPORT_PC() # must export for invoke
10588 or a1, a0, a1 # a1<- AAAAaaaa
10589 GET_VREG(rOBJ, a2) # rOBJ <- first arg ("this")
10590 LOAD_rSELF_methodClassDex(a3) # a3 <- methodClassDex
10591 LOAD_rSELF_method(a2) # a2 <- method
10593 beqz rOBJ, common_errNullObject # yes, fail
10594 LOAD_base_offObject_clazz(a0, rOBJ) # a0 <- thisPtr->clazz
10595 JAL(dvmFindInterfaceMethodInCache) # v0 <- call(class, ref, method, dex)
10598 beqz v0, common_exceptionThrown # yes, handle exception
10599 b common_invokeMethodJumbo # (a0=method, rOBJ="this")
10601 /* ------------------------------ */
10603 .L_OP_UNUSED_27FF: /* 0x127 */
10604 /* File: mips/OP_UNUSED_27FF.S */
10605 /* File: mips/unused.S */
10610 /* ------------------------------ */
10612 .L_OP_UNUSED_28FF: /* 0x128 */
10613 /* File: mips/OP_UNUSED_28FF.S */
10614 /* File: mips/unused.S */
10619 /* ------------------------------ */
10621 .L_OP_UNUSED_29FF: /* 0x129 */
10622 /* File: mips/OP_UNUSED_29FF.S */
10623 /* File: mips/unused.S */
10628 /* ------------------------------ */
10630 .L_OP_UNUSED_2AFF: /* 0x12a */
10631 /* File: mips/OP_UNUSED_2AFF.S */
10632 /* File: mips/unused.S */
10637 /* ------------------------------ */
10639 .L_OP_UNUSED_2BFF: /* 0x12b */
10640 /* File: mips/OP_UNUSED_2BFF.S */
10641 /* File: mips/unused.S */
10646 /* ------------------------------ */
10648 .L_OP_UNUSED_2CFF: /* 0x12c */
10649 /* File: mips/OP_UNUSED_2CFF.S */
10650 /* File: mips/unused.S */
10655 /* ------------------------------ */
10657 .L_OP_UNUSED_2DFF: /* 0x12d */
10658 /* File: mips/OP_UNUSED_2DFF.S */
10659 /* File: mips/unused.S */
10664 /* ------------------------------ */
10666 .L_OP_UNUSED_2EFF: /* 0x12e */
10667 /* File: mips/OP_UNUSED_2EFF.S */
10668 /* File: mips/unused.S */
10673 /* ------------------------------ */
10675 .L_OP_UNUSED_2FFF: /* 0x12f */
10676 /* File: mips/OP_UNUSED_2FFF.S */
10677 /* File: mips/unused.S */
10682 /* ------------------------------ */
10684 .L_OP_UNUSED_30FF: /* 0x130 */
10685 /* File: mips/OP_UNUSED_30FF.S */
10686 /* File: mips/unused.S */
10691 /* ------------------------------ */
10693 .L_OP_UNUSED_31FF: /* 0x131 */
10694 /* File: mips/OP_UNUSED_31FF.S */
10695 /* File: mips/unused.S */
10700 /* ------------------------------ */
10702 .L_OP_UNUSED_32FF: /* 0x132 */
10703 /* File: mips/OP_UNUSED_32FF.S */
10704 /* File: mips/unused.S */
10709 /* ------------------------------ */
10711 .L_OP_UNUSED_33FF: /* 0x133 */
10712 /* File: mips/OP_UNUSED_33FF.S */
10713 /* File: mips/unused.S */
10718 /* ------------------------------ */
10720 .L_OP_UNUSED_34FF: /* 0x134 */
10721 /* File: mips/OP_UNUSED_34FF.S */
10722 /* File: mips/unused.S */
10727 /* ------------------------------ */
10729 .L_OP_UNUSED_35FF: /* 0x135 */
10730 /* File: mips/OP_UNUSED_35FF.S */
10731 /* File: mips/unused.S */
10736 /* ------------------------------ */
10738 .L_OP_UNUSED_36FF: /* 0x136 */
10739 /* File: mips/OP_UNUSED_36FF.S */
10740 /* File: mips/unused.S */
10745 /* ------------------------------ */
10747 .L_OP_UNUSED_37FF: /* 0x137 */
10748 /* File: mips/OP_UNUSED_37FF.S */
10749 /* File: mips/unused.S */
10754 /* ------------------------------ */
10756 .L_OP_UNUSED_38FF: /* 0x138 */
10757 /* File: mips/OP_UNUSED_38FF.S */
10758 /* File: mips/unused.S */
10763 /* ------------------------------ */
10765 .L_OP_UNUSED_39FF: /* 0x139 */
10766 /* File: mips/OP_UNUSED_39FF.S */
10767 /* File: mips/unused.S */
10772 /* ------------------------------ */
10774 .L_OP_UNUSED_3AFF: /* 0x13a */
10775 /* File: mips/OP_UNUSED_3AFF.S */
10776 /* File: mips/unused.S */
10781 /* ------------------------------ */
10783 .L_OP_UNUSED_3BFF: /* 0x13b */
10784 /* File: mips/OP_UNUSED_3BFF.S */
10785 /* File: mips/unused.S */
10790 /* ------------------------------ */
10792 .L_OP_UNUSED_3CFF: /* 0x13c */
10793 /* File: mips/OP_UNUSED_3CFF.S */
10794 /* File: mips/unused.S */
10799 /* ------------------------------ */
10801 .L_OP_UNUSED_3DFF: /* 0x13d */
10802 /* File: mips/OP_UNUSED_3DFF.S */
10803 /* File: mips/unused.S */
10808 /* ------------------------------ */
10810 .L_OP_UNUSED_3EFF: /* 0x13e */
10811 /* File: mips/OP_UNUSED_3EFF.S */
10812 /* File: mips/unused.S */
10817 /* ------------------------------ */
10819 .L_OP_UNUSED_3FFF: /* 0x13f */
10820 /* File: mips/OP_UNUSED_3FFF.S */
10821 /* File: mips/unused.S */
10826 /* ------------------------------ */
10828 .L_OP_UNUSED_40FF: /* 0x140 */
10829 /* File: mips/OP_UNUSED_40FF.S */
10830 /* File: mips/unused.S */
10835 /* ------------------------------ */
10837 .L_OP_UNUSED_41FF: /* 0x141 */
10838 /* File: mips/OP_UNUSED_41FF.S */
10839 /* File: mips/unused.S */
10844 /* ------------------------------ */
10846 .L_OP_UNUSED_42FF: /* 0x142 */
10847 /* File: mips/OP_UNUSED_42FF.S */
10848 /* File: mips/unused.S */
10853 /* ------------------------------ */
10855 .L_OP_UNUSED_43FF: /* 0x143 */
10856 /* File: mips/OP_UNUSED_43FF.S */
10857 /* File: mips/unused.S */
10862 /* ------------------------------ */
10864 .L_OP_UNUSED_44FF: /* 0x144 */
10865 /* File: mips/OP_UNUSED_44FF.S */
10866 /* File: mips/unused.S */
10871 /* ------------------------------ */
10873 .L_OP_UNUSED_45FF: /* 0x145 */
10874 /* File: mips/OP_UNUSED_45FF.S */
10875 /* File: mips/unused.S */
10880 /* ------------------------------ */
10882 .L_OP_UNUSED_46FF: /* 0x146 */
10883 /* File: mips/OP_UNUSED_46FF.S */
10884 /* File: mips/unused.S */
10889 /* ------------------------------ */
10891 .L_OP_UNUSED_47FF: /* 0x147 */
10892 /* File: mips/OP_UNUSED_47FF.S */
10893 /* File: mips/unused.S */
10898 /* ------------------------------ */
10900 .L_OP_UNUSED_48FF: /* 0x148 */
10901 /* File: mips/OP_UNUSED_48FF.S */
10902 /* File: mips/unused.S */
10907 /* ------------------------------ */
10909 .L_OP_UNUSED_49FF: /* 0x149 */
10910 /* File: mips/OP_UNUSED_49FF.S */
10911 /* File: mips/unused.S */
10916 /* ------------------------------ */
10918 .L_OP_UNUSED_4AFF: /* 0x14a */
10919 /* File: mips/OP_UNUSED_4AFF.S */
10920 /* File: mips/unused.S */
10925 /* ------------------------------ */
10927 .L_OP_UNUSED_4BFF: /* 0x14b */
10928 /* File: mips/OP_UNUSED_4BFF.S */
10929 /* File: mips/unused.S */
10934 /* ------------------------------ */
10936 .L_OP_UNUSED_4CFF: /* 0x14c */
10937 /* File: mips/OP_UNUSED_4CFF.S */
10938 /* File: mips/unused.S */
10943 /* ------------------------------ */
10945 .L_OP_UNUSED_4DFF: /* 0x14d */
10946 /* File: mips/OP_UNUSED_4DFF.S */
10947 /* File: mips/unused.S */
10952 /* ------------------------------ */
10954 .L_OP_UNUSED_4EFF: /* 0x14e */
10955 /* File: mips/OP_UNUSED_4EFF.S */
10956 /* File: mips/unused.S */
10961 /* ------------------------------ */
10963 .L_OP_UNUSED_4FFF: /* 0x14f */
10964 /* File: mips/OP_UNUSED_4FFF.S */
10965 /* File: mips/unused.S */
10970 /* ------------------------------ */
10972 .L_OP_UNUSED_50FF: /* 0x150 */
10973 /* File: mips/OP_UNUSED_50FF.S */
10974 /* File: mips/unused.S */
10979 /* ------------------------------ */
10981 .L_OP_UNUSED_51FF: /* 0x151 */
10982 /* File: mips/OP_UNUSED_51FF.S */
10983 /* File: mips/unused.S */
10988 /* ------------------------------ */
10990 .L_OP_UNUSED_52FF: /* 0x152 */
10991 /* File: mips/OP_UNUSED_52FF.S */
10992 /* File: mips/unused.S */
10997 /* ------------------------------ */
10999 .L_OP_UNUSED_53FF: /* 0x153 */
11000 /* File: mips/OP_UNUSED_53FF.S */
11001 /* File: mips/unused.S */
11006 /* ------------------------------ */
11008 .L_OP_UNUSED_54FF: /* 0x154 */
11009 /* File: mips/OP_UNUSED_54FF.S */
11010 /* File: mips/unused.S */
11015 /* ------------------------------ */
11017 .L_OP_UNUSED_55FF: /* 0x155 */
11018 /* File: mips/OP_UNUSED_55FF.S */
11019 /* File: mips/unused.S */
11024 /* ------------------------------ */
11026 .L_OP_UNUSED_56FF: /* 0x156 */
11027 /* File: mips/OP_UNUSED_56FF.S */
11028 /* File: mips/unused.S */
11033 /* ------------------------------ */
11035 .L_OP_UNUSED_57FF: /* 0x157 */
11036 /* File: mips/OP_UNUSED_57FF.S */
11037 /* File: mips/unused.S */
11042 /* ------------------------------ */
11044 .L_OP_UNUSED_58FF: /* 0x158 */
11045 /* File: mips/OP_UNUSED_58FF.S */
11046 /* File: mips/unused.S */
11051 /* ------------------------------ */
11053 .L_OP_UNUSED_59FF: /* 0x159 */
11054 /* File: mips/OP_UNUSED_59FF.S */
11055 /* File: mips/unused.S */
11060 /* ------------------------------ */
11062 .L_OP_UNUSED_5AFF: /* 0x15a */
11063 /* File: mips/OP_UNUSED_5AFF.S */
11064 /* File: mips/unused.S */
11069 /* ------------------------------ */
11071 .L_OP_UNUSED_5BFF: /* 0x15b */
11072 /* File: mips/OP_UNUSED_5BFF.S */
11073 /* File: mips/unused.S */
11078 /* ------------------------------ */
11080 .L_OP_UNUSED_5CFF: /* 0x15c */
11081 /* File: mips/OP_UNUSED_5CFF.S */
11082 /* File: mips/unused.S */
11087 /* ------------------------------ */
11089 .L_OP_UNUSED_5DFF: /* 0x15d */
11090 /* File: mips/OP_UNUSED_5DFF.S */
11091 /* File: mips/unused.S */
11096 /* ------------------------------ */
11098 .L_OP_UNUSED_5EFF: /* 0x15e */
11099 /* File: mips/OP_UNUSED_5EFF.S */
11100 /* File: mips/unused.S */
11105 /* ------------------------------ */
11107 .L_OP_UNUSED_5FFF: /* 0x15f */
11108 /* File: mips/OP_UNUSED_5FFF.S */
11109 /* File: mips/unused.S */
11114 /* ------------------------------ */
11116 .L_OP_UNUSED_60FF: /* 0x160 */
11117 /* File: mips/OP_UNUSED_60FF.S */
11118 /* File: mips/unused.S */
11123 /* ------------------------------ */
11125 .L_OP_UNUSED_61FF: /* 0x161 */
11126 /* File: mips/OP_UNUSED_61FF.S */
11127 /* File: mips/unused.S */
11132 /* ------------------------------ */
11134 .L_OP_UNUSED_62FF: /* 0x162 */
11135 /* File: mips/OP_UNUSED_62FF.S */
11136 /* File: mips/unused.S */
11141 /* ------------------------------ */
11143 .L_OP_UNUSED_63FF: /* 0x163 */
11144 /* File: mips/OP_UNUSED_63FF.S */
11145 /* File: mips/unused.S */
11150 /* ------------------------------ */
11152 .L_OP_UNUSED_64FF: /* 0x164 */
11153 /* File: mips/OP_UNUSED_64FF.S */
11154 /* File: mips/unused.S */
11159 /* ------------------------------ */
11161 .L_OP_UNUSED_65FF: /* 0x165 */
11162 /* File: mips/OP_UNUSED_65FF.S */
11163 /* File: mips/unused.S */
11168 /* ------------------------------ */
11170 .L_OP_UNUSED_66FF: /* 0x166 */
11171 /* File: mips/OP_UNUSED_66FF.S */
11172 /* File: mips/unused.S */
11177 /* ------------------------------ */
11179 .L_OP_UNUSED_67FF: /* 0x167 */
11180 /* File: mips/OP_UNUSED_67FF.S */
11181 /* File: mips/unused.S */
11186 /* ------------------------------ */
11188 .L_OP_UNUSED_68FF: /* 0x168 */
11189 /* File: mips/OP_UNUSED_68FF.S */
11190 /* File: mips/unused.S */
11195 /* ------------------------------ */
11197 .L_OP_UNUSED_69FF: /* 0x169 */
11198 /* File: mips/OP_UNUSED_69FF.S */
11199 /* File: mips/unused.S */
11204 /* ------------------------------ */
11206 .L_OP_UNUSED_6AFF: /* 0x16a */
11207 /* File: mips/OP_UNUSED_6AFF.S */
11208 /* File: mips/unused.S */
11213 /* ------------------------------ */
11215 .L_OP_UNUSED_6BFF: /* 0x16b */
11216 /* File: mips/OP_UNUSED_6BFF.S */
11217 /* File: mips/unused.S */
11222 /* ------------------------------ */
11224 .L_OP_UNUSED_6CFF: /* 0x16c */
11225 /* File: mips/OP_UNUSED_6CFF.S */
11226 /* File: mips/unused.S */
11231 /* ------------------------------ */
11233 .L_OP_UNUSED_6DFF: /* 0x16d */
11234 /* File: mips/OP_UNUSED_6DFF.S */
11235 /* File: mips/unused.S */
11240 /* ------------------------------ */
11242 .L_OP_UNUSED_6EFF: /* 0x16e */
11243 /* File: mips/OP_UNUSED_6EFF.S */
11244 /* File: mips/unused.S */
11249 /* ------------------------------ */
11251 .L_OP_UNUSED_6FFF: /* 0x16f */
11252 /* File: mips/OP_UNUSED_6FFF.S */
11253 /* File: mips/unused.S */
11258 /* ------------------------------ */
11260 .L_OP_UNUSED_70FF: /* 0x170 */
11261 /* File: mips/OP_UNUSED_70FF.S */
11262 /* File: mips/unused.S */
11267 /* ------------------------------ */
11269 .L_OP_UNUSED_71FF: /* 0x171 */
11270 /* File: mips/OP_UNUSED_71FF.S */
11271 /* File: mips/unused.S */
11276 /* ------------------------------ */
11278 .L_OP_UNUSED_72FF: /* 0x172 */
11279 /* File: mips/OP_UNUSED_72FF.S */
11280 /* File: mips/unused.S */
11285 /* ------------------------------ */
11287 .L_OP_UNUSED_73FF: /* 0x173 */
11288 /* File: mips/OP_UNUSED_73FF.S */
11289 /* File: mips/unused.S */
11294 /* ------------------------------ */
11296 .L_OP_UNUSED_74FF: /* 0x174 */
11297 /* File: mips/OP_UNUSED_74FF.S */
11298 /* File: mips/unused.S */
11303 /* ------------------------------ */
11305 .L_OP_UNUSED_75FF: /* 0x175 */
11306 /* File: mips/OP_UNUSED_75FF.S */
11307 /* File: mips/unused.S */
11312 /* ------------------------------ */
11314 .L_OP_UNUSED_76FF: /* 0x176 */
11315 /* File: mips/OP_UNUSED_76FF.S */
11316 /* File: mips/unused.S */
11321 /* ------------------------------ */
11323 .L_OP_UNUSED_77FF: /* 0x177 */
11324 /* File: mips/OP_UNUSED_77FF.S */
11325 /* File: mips/unused.S */
11330 /* ------------------------------ */
11332 .L_OP_UNUSED_78FF: /* 0x178 */
11333 /* File: mips/OP_UNUSED_78FF.S */
11334 /* File: mips/unused.S */
11339 /* ------------------------------ */
11341 .L_OP_UNUSED_79FF: /* 0x179 */
11342 /* File: mips/OP_UNUSED_79FF.S */
11343 /* File: mips/unused.S */
11348 /* ------------------------------ */
11350 .L_OP_UNUSED_7AFF: /* 0x17a */
11351 /* File: mips/OP_UNUSED_7AFF.S */
11352 /* File: mips/unused.S */
11357 /* ------------------------------ */
11359 .L_OP_UNUSED_7BFF: /* 0x17b */
11360 /* File: mips/OP_UNUSED_7BFF.S */
11361 /* File: mips/unused.S */
11366 /* ------------------------------ */
11368 .L_OP_UNUSED_7CFF: /* 0x17c */
11369 /* File: mips/OP_UNUSED_7CFF.S */
11370 /* File: mips/unused.S */
11375 /* ------------------------------ */
11377 .L_OP_UNUSED_7DFF: /* 0x17d */
11378 /* File: mips/OP_UNUSED_7DFF.S */
11379 /* File: mips/unused.S */
11384 /* ------------------------------ */
11386 .L_OP_UNUSED_7EFF: /* 0x17e */
11387 /* File: mips/OP_UNUSED_7EFF.S */
11388 /* File: mips/unused.S */
11393 /* ------------------------------ */
11395 .L_OP_UNUSED_7FFF: /* 0x17f */
11396 /* File: mips/OP_UNUSED_7FFF.S */
11397 /* File: mips/unused.S */
11402 /* ------------------------------ */
11404 .L_OP_UNUSED_80FF: /* 0x180 */
11405 /* File: mips/OP_UNUSED_80FF.S */
11406 /* File: mips/unused.S */
11411 /* ------------------------------ */
11413 .L_OP_UNUSED_81FF: /* 0x181 */
11414 /* File: mips/OP_UNUSED_81FF.S */
11415 /* File: mips/unused.S */
11420 /* ------------------------------ */
11422 .L_OP_UNUSED_82FF: /* 0x182 */
11423 /* File: mips/OP_UNUSED_82FF.S */
11424 /* File: mips/unused.S */
11429 /* ------------------------------ */
11431 .L_OP_UNUSED_83FF: /* 0x183 */
11432 /* File: mips/OP_UNUSED_83FF.S */
11433 /* File: mips/unused.S */
11438 /* ------------------------------ */
11440 .L_OP_UNUSED_84FF: /* 0x184 */
11441 /* File: mips/OP_UNUSED_84FF.S */
11442 /* File: mips/unused.S */
11447 /* ------------------------------ */
11449 .L_OP_UNUSED_85FF: /* 0x185 */
11450 /* File: mips/OP_UNUSED_85FF.S */
11451 /* File: mips/unused.S */
11456 /* ------------------------------ */
11458 .L_OP_UNUSED_86FF: /* 0x186 */
11459 /* File: mips/OP_UNUSED_86FF.S */
11460 /* File: mips/unused.S */
11465 /* ------------------------------ */
11467 .L_OP_UNUSED_87FF: /* 0x187 */
11468 /* File: mips/OP_UNUSED_87FF.S */
11469 /* File: mips/unused.S */
11474 /* ------------------------------ */
11476 .L_OP_UNUSED_88FF: /* 0x188 */
11477 /* File: mips/OP_UNUSED_88FF.S */
11478 /* File: mips/unused.S */
11483 /* ------------------------------ */
11485 .L_OP_UNUSED_89FF: /* 0x189 */
11486 /* File: mips/OP_UNUSED_89FF.S */
11487 /* File: mips/unused.S */
11492 /* ------------------------------ */
11494 .L_OP_UNUSED_8AFF: /* 0x18a */
11495 /* File: mips/OP_UNUSED_8AFF.S */
11496 /* File: mips/unused.S */
11501 /* ------------------------------ */
11503 .L_OP_UNUSED_8BFF: /* 0x18b */
11504 /* File: mips/OP_UNUSED_8BFF.S */
11505 /* File: mips/unused.S */
11510 /* ------------------------------ */
11512 .L_OP_UNUSED_8CFF: /* 0x18c */
11513 /* File: mips/OP_UNUSED_8CFF.S */
11514 /* File: mips/unused.S */
11519 /* ------------------------------ */
11521 .L_OP_UNUSED_8DFF: /* 0x18d */
11522 /* File: mips/OP_UNUSED_8DFF.S */
11523 /* File: mips/unused.S */
11528 /* ------------------------------ */
11530 .L_OP_UNUSED_8EFF: /* 0x18e */
11531 /* File: mips/OP_UNUSED_8EFF.S */
11532 /* File: mips/unused.S */
11537 /* ------------------------------ */
11539 .L_OP_UNUSED_8FFF: /* 0x18f */
11540 /* File: mips/OP_UNUSED_8FFF.S */
11541 /* File: mips/unused.S */
11546 /* ------------------------------ */
11548 .L_OP_UNUSED_90FF: /* 0x190 */
11549 /* File: mips/OP_UNUSED_90FF.S */
11550 /* File: mips/unused.S */
11555 /* ------------------------------ */
11557 .L_OP_UNUSED_91FF: /* 0x191 */
11558 /* File: mips/OP_UNUSED_91FF.S */
11559 /* File: mips/unused.S */
11564 /* ------------------------------ */
11566 .L_OP_UNUSED_92FF: /* 0x192 */
11567 /* File: mips/OP_UNUSED_92FF.S */
11568 /* File: mips/unused.S */
11573 /* ------------------------------ */
11575 .L_OP_UNUSED_93FF: /* 0x193 */
11576 /* File: mips/OP_UNUSED_93FF.S */
11577 /* File: mips/unused.S */
11582 /* ------------------------------ */
11584 .L_OP_UNUSED_94FF: /* 0x194 */
11585 /* File: mips/OP_UNUSED_94FF.S */
11586 /* File: mips/unused.S */
11591 /* ------------------------------ */
11593 .L_OP_UNUSED_95FF: /* 0x195 */
11594 /* File: mips/OP_UNUSED_95FF.S */
11595 /* File: mips/unused.S */
11600 /* ------------------------------ */
11602 .L_OP_UNUSED_96FF: /* 0x196 */
11603 /* File: mips/OP_UNUSED_96FF.S */
11604 /* File: mips/unused.S */
11609 /* ------------------------------ */
11611 .L_OP_UNUSED_97FF: /* 0x197 */
11612 /* File: mips/OP_UNUSED_97FF.S */
11613 /* File: mips/unused.S */
11618 /* ------------------------------ */
11620 .L_OP_UNUSED_98FF: /* 0x198 */
11621 /* File: mips/OP_UNUSED_98FF.S */
11622 /* File: mips/unused.S */
11627 /* ------------------------------ */
11629 .L_OP_UNUSED_99FF: /* 0x199 */
11630 /* File: mips/OP_UNUSED_99FF.S */
11631 /* File: mips/unused.S */
11636 /* ------------------------------ */
11638 .L_OP_UNUSED_9AFF: /* 0x19a */
11639 /* File: mips/OP_UNUSED_9AFF.S */
11640 /* File: mips/unused.S */
11645 /* ------------------------------ */
11647 .L_OP_UNUSED_9BFF: /* 0x19b */
11648 /* File: mips/OP_UNUSED_9BFF.S */
11649 /* File: mips/unused.S */
11654 /* ------------------------------ */
11656 .L_OP_UNUSED_9CFF: /* 0x19c */
11657 /* File: mips/OP_UNUSED_9CFF.S */
11658 /* File: mips/unused.S */
11663 /* ------------------------------ */
11665 .L_OP_UNUSED_9DFF: /* 0x19d */
11666 /* File: mips/OP_UNUSED_9DFF.S */
11667 /* File: mips/unused.S */
11672 /* ------------------------------ */
11674 .L_OP_UNUSED_9EFF: /* 0x19e */
11675 /* File: mips/OP_UNUSED_9EFF.S */
11676 /* File: mips/unused.S */
11681 /* ------------------------------ */
11683 .L_OP_UNUSED_9FFF: /* 0x19f */
11684 /* File: mips/OP_UNUSED_9FFF.S */
11685 /* File: mips/unused.S */
11690 /* ------------------------------ */
11692 .L_OP_UNUSED_A0FF: /* 0x1a0 */
11693 /* File: mips/OP_UNUSED_A0FF.S */
11694 /* File: mips/unused.S */
11699 /* ------------------------------ */
11701 .L_OP_UNUSED_A1FF: /* 0x1a1 */
11702 /* File: mips/OP_UNUSED_A1FF.S */
11703 /* File: mips/unused.S */
11708 /* ------------------------------ */
11710 .L_OP_UNUSED_A2FF: /* 0x1a2 */
11711 /* File: mips/OP_UNUSED_A2FF.S */
11712 /* File: mips/unused.S */
11717 /* ------------------------------ */
11719 .L_OP_UNUSED_A3FF: /* 0x1a3 */
11720 /* File: mips/OP_UNUSED_A3FF.S */
11721 /* File: mips/unused.S */
11726 /* ------------------------------ */
11728 .L_OP_UNUSED_A4FF: /* 0x1a4 */
11729 /* File: mips/OP_UNUSED_A4FF.S */
11730 /* File: mips/unused.S */
11735 /* ------------------------------ */
11737 .L_OP_UNUSED_A5FF: /* 0x1a5 */
11738 /* File: mips/OP_UNUSED_A5FF.S */
11739 /* File: mips/unused.S */
11744 /* ------------------------------ */
11746 .L_OP_UNUSED_A6FF: /* 0x1a6 */
11747 /* File: mips/OP_UNUSED_A6FF.S */
11748 /* File: mips/unused.S */
11753 /* ------------------------------ */
11755 .L_OP_UNUSED_A7FF: /* 0x1a7 */
11756 /* File: mips/OP_UNUSED_A7FF.S */
11757 /* File: mips/unused.S */
11762 /* ------------------------------ */
11764 .L_OP_UNUSED_A8FF: /* 0x1a8 */
11765 /* File: mips/OP_UNUSED_A8FF.S */
11766 /* File: mips/unused.S */
11771 /* ------------------------------ */
11773 .L_OP_UNUSED_A9FF: /* 0x1a9 */
11774 /* File: mips/OP_UNUSED_A9FF.S */
11775 /* File: mips/unused.S */
11780 /* ------------------------------ */
11782 .L_OP_UNUSED_AAFF: /* 0x1aa */
11783 /* File: mips/OP_UNUSED_AAFF.S */
11784 /* File: mips/unused.S */
11789 /* ------------------------------ */
11791 .L_OP_UNUSED_ABFF: /* 0x1ab */
11792 /* File: mips/OP_UNUSED_ABFF.S */
11793 /* File: mips/unused.S */
11798 /* ------------------------------ */
11800 .L_OP_UNUSED_ACFF: /* 0x1ac */
11801 /* File: mips/OP_UNUSED_ACFF.S */
11802 /* File: mips/unused.S */
11807 /* ------------------------------ */
11809 .L_OP_UNUSED_ADFF: /* 0x1ad */
11810 /* File: mips/OP_UNUSED_ADFF.S */
11811 /* File: mips/unused.S */
11816 /* ------------------------------ */
11818 .L_OP_UNUSED_AEFF: /* 0x1ae */
11819 /* File: mips/OP_UNUSED_AEFF.S */
11820 /* File: mips/unused.S */
11825 /* ------------------------------ */
11827 .L_OP_UNUSED_AFFF: /* 0x1af */
11828 /* File: mips/OP_UNUSED_AFFF.S */
11829 /* File: mips/unused.S */
11834 /* ------------------------------ */
11836 .L_OP_UNUSED_B0FF: /* 0x1b0 */
11837 /* File: mips/OP_UNUSED_B0FF.S */
11838 /* File: mips/unused.S */
11843 /* ------------------------------ */
11845 .L_OP_UNUSED_B1FF: /* 0x1b1 */
11846 /* File: mips/OP_UNUSED_B1FF.S */
11847 /* File: mips/unused.S */
11852 /* ------------------------------ */
11854 .L_OP_UNUSED_B2FF: /* 0x1b2 */
11855 /* File: mips/OP_UNUSED_B2FF.S */
11856 /* File: mips/unused.S */
11861 /* ------------------------------ */
11863 .L_OP_UNUSED_B3FF: /* 0x1b3 */
11864 /* File: mips/OP_UNUSED_B3FF.S */
11865 /* File: mips/unused.S */
11870 /* ------------------------------ */
11872 .L_OP_UNUSED_B4FF: /* 0x1b4 */
11873 /* File: mips/OP_UNUSED_B4FF.S */
11874 /* File: mips/unused.S */
11879 /* ------------------------------ */
11881 .L_OP_UNUSED_B5FF: /* 0x1b5 */
11882 /* File: mips/OP_UNUSED_B5FF.S */
11883 /* File: mips/unused.S */
11888 /* ------------------------------ */
11890 .L_OP_UNUSED_B6FF: /* 0x1b6 */
11891 /* File: mips/OP_UNUSED_B6FF.S */
11892 /* File: mips/unused.S */
11897 /* ------------------------------ */
11899 .L_OP_UNUSED_B7FF: /* 0x1b7 */
11900 /* File: mips/OP_UNUSED_B7FF.S */
11901 /* File: mips/unused.S */
11906 /* ------------------------------ */
11908 .L_OP_UNUSED_B8FF: /* 0x1b8 */
11909 /* File: mips/OP_UNUSED_B8FF.S */
11910 /* File: mips/unused.S */
11915 /* ------------------------------ */
11917 .L_OP_UNUSED_B9FF: /* 0x1b9 */
11918 /* File: mips/OP_UNUSED_B9FF.S */
11919 /* File: mips/unused.S */
11924 /* ------------------------------ */
11926 .L_OP_UNUSED_BAFF: /* 0x1ba */
11927 /* File: mips/OP_UNUSED_BAFF.S */
11928 /* File: mips/unused.S */
11933 /* ------------------------------ */
11935 .L_OP_UNUSED_BBFF: /* 0x1bb */
11936 /* File: mips/OP_UNUSED_BBFF.S */
11937 /* File: mips/unused.S */
11942 /* ------------------------------ */
11944 .L_OP_UNUSED_BCFF: /* 0x1bc */
11945 /* File: mips/OP_UNUSED_BCFF.S */
11946 /* File: mips/unused.S */
11951 /* ------------------------------ */
11953 .L_OP_UNUSED_BDFF: /* 0x1bd */
11954 /* File: mips/OP_UNUSED_BDFF.S */
11955 /* File: mips/unused.S */
11960 /* ------------------------------ */
11962 .L_OP_UNUSED_BEFF: /* 0x1be */
11963 /* File: mips/OP_UNUSED_BEFF.S */
11964 /* File: mips/unused.S */
11969 /* ------------------------------ */
11971 .L_OP_UNUSED_BFFF: /* 0x1bf */
11972 /* File: mips/OP_UNUSED_BFFF.S */
11973 /* File: mips/unused.S */
11978 /* ------------------------------ */
11980 .L_OP_UNUSED_C0FF: /* 0x1c0 */
11981 /* File: mips/OP_UNUSED_C0FF.S */
11982 /* File: mips/unused.S */
11987 /* ------------------------------ */
11989 .L_OP_UNUSED_C1FF: /* 0x1c1 */
11990 /* File: mips/OP_UNUSED_C1FF.S */
11991 /* File: mips/unused.S */
11996 /* ------------------------------ */
11998 .L_OP_UNUSED_C2FF: /* 0x1c2 */
11999 /* File: mips/OP_UNUSED_C2FF.S */
12000 /* File: mips/unused.S */
12005 /* ------------------------------ */
12007 .L_OP_UNUSED_C3FF: /* 0x1c3 */
12008 /* File: mips/OP_UNUSED_C3FF.S */
12009 /* File: mips/unused.S */
12014 /* ------------------------------ */
12016 .L_OP_UNUSED_C4FF: /* 0x1c4 */
12017 /* File: mips/OP_UNUSED_C4FF.S */
12018 /* File: mips/unused.S */
12023 /* ------------------------------ */
12025 .L_OP_UNUSED_C5FF: /* 0x1c5 */
12026 /* File: mips/OP_UNUSED_C5FF.S */
12027 /* File: mips/unused.S */
12032 /* ------------------------------ */
12034 .L_OP_UNUSED_C6FF: /* 0x1c6 */
12035 /* File: mips/OP_UNUSED_C6FF.S */
12036 /* File: mips/unused.S */
12041 /* ------------------------------ */
12043 .L_OP_UNUSED_C7FF: /* 0x1c7 */
12044 /* File: mips/OP_UNUSED_C7FF.S */
12045 /* File: mips/unused.S */
12050 /* ------------------------------ */
12052 .L_OP_UNUSED_C8FF: /* 0x1c8 */
12053 /* File: mips/OP_UNUSED_C8FF.S */
12054 /* File: mips/unused.S */
12059 /* ------------------------------ */
12061 .L_OP_UNUSED_C9FF: /* 0x1c9 */
12062 /* File: mips/OP_UNUSED_C9FF.S */
12063 /* File: mips/unused.S */
12068 /* ------------------------------ */
12070 .L_OP_UNUSED_CAFF: /* 0x1ca */
12071 /* File: mips/OP_UNUSED_CAFF.S */
12072 /* File: mips/unused.S */
12077 /* ------------------------------ */
12079 .L_OP_UNUSED_CBFF: /* 0x1cb */
12080 /* File: mips/OP_UNUSED_CBFF.S */
12081 /* File: mips/unused.S */
12086 /* ------------------------------ */
12088 .L_OP_UNUSED_CCFF: /* 0x1cc */
12089 /* File: mips/OP_UNUSED_CCFF.S */
12090 /* File: mips/unused.S */
12095 /* ------------------------------ */
12097 .L_OP_UNUSED_CDFF: /* 0x1cd */
12098 /* File: mips/OP_UNUSED_CDFF.S */
12099 /* File: mips/unused.S */
12104 /* ------------------------------ */
12106 .L_OP_UNUSED_CEFF: /* 0x1ce */
12107 /* File: mips/OP_UNUSED_CEFF.S */
12108 /* File: mips/unused.S */
12113 /* ------------------------------ */
12115 .L_OP_UNUSED_CFFF: /* 0x1cf */
12116 /* File: mips/OP_UNUSED_CFFF.S */
12117 /* File: mips/unused.S */
12122 /* ------------------------------ */
12124 .L_OP_UNUSED_D0FF: /* 0x1d0 */
12125 /* File: mips/OP_UNUSED_D0FF.S */
12126 /* File: mips/unused.S */
12131 /* ------------------------------ */
12133 .L_OP_UNUSED_D1FF: /* 0x1d1 */
12134 /* File: mips/OP_UNUSED_D1FF.S */
12135 /* File: mips/unused.S */
12140 /* ------------------------------ */
12142 .L_OP_UNUSED_D2FF: /* 0x1d2 */
12143 /* File: mips/OP_UNUSED_D2FF.S */
12144 /* File: mips/unused.S */
12149 /* ------------------------------ */
12151 .L_OP_UNUSED_D3FF: /* 0x1d3 */
12152 /* File: mips/OP_UNUSED_D3FF.S */
12153 /* File: mips/unused.S */
12158 /* ------------------------------ */
12160 .L_OP_UNUSED_D4FF: /* 0x1d4 */
12161 /* File: mips/OP_UNUSED_D4FF.S */
12162 /* File: mips/unused.S */
12167 /* ------------------------------ */
12169 .L_OP_UNUSED_D5FF: /* 0x1d5 */
12170 /* File: mips/OP_UNUSED_D5FF.S */
12171 /* File: mips/unused.S */
12176 /* ------------------------------ */
12178 .L_OP_UNUSED_D6FF: /* 0x1d6 */
12179 /* File: mips/OP_UNUSED_D6FF.S */
12180 /* File: mips/unused.S */
12185 /* ------------------------------ */
12187 .L_OP_UNUSED_D7FF: /* 0x1d7 */
12188 /* File: mips/OP_UNUSED_D7FF.S */
12189 /* File: mips/unused.S */
12194 /* ------------------------------ */
12196 .L_OP_UNUSED_D8FF: /* 0x1d8 */
12197 /* File: mips/OP_UNUSED_D8FF.S */
12198 /* File: mips/unused.S */
12203 /* ------------------------------ */
12205 .L_OP_UNUSED_D9FF: /* 0x1d9 */
12206 /* File: mips/OP_UNUSED_D9FF.S */
12207 /* File: mips/unused.S */
12212 /* ------------------------------ */
12214 .L_OP_UNUSED_DAFF: /* 0x1da */
12215 /* File: mips/OP_UNUSED_DAFF.S */
12216 /* File: mips/unused.S */
12221 /* ------------------------------ */
12223 .L_OP_UNUSED_DBFF: /* 0x1db */
12224 /* File: mips/OP_UNUSED_DBFF.S */
12225 /* File: mips/unused.S */
12230 /* ------------------------------ */
12232 .L_OP_UNUSED_DCFF: /* 0x1dc */
12233 /* File: mips/OP_UNUSED_DCFF.S */
12234 /* File: mips/unused.S */
12239 /* ------------------------------ */
12241 .L_OP_UNUSED_DDFF: /* 0x1dd */
12242 /* File: mips/OP_UNUSED_DDFF.S */
12243 /* File: mips/unused.S */
12248 /* ------------------------------ */
12250 .L_OP_UNUSED_DEFF: /* 0x1de */
12251 /* File: mips/OP_UNUSED_DEFF.S */
12252 /* File: mips/unused.S */
12257 /* ------------------------------ */
12259 .L_OP_UNUSED_DFFF: /* 0x1df */
12260 /* File: mips/OP_UNUSED_DFFF.S */
12261 /* File: mips/unused.S */
12266 /* ------------------------------ */
12268 .L_OP_UNUSED_E0FF: /* 0x1e0 */
12269 /* File: mips/OP_UNUSED_E0FF.S */
12270 /* File: mips/unused.S */
12275 /* ------------------------------ */
12277 .L_OP_UNUSED_E1FF: /* 0x1e1 */
12278 /* File: mips/OP_UNUSED_E1FF.S */
12279 /* File: mips/unused.S */
12284 /* ------------------------------ */
12286 .L_OP_UNUSED_E2FF: /* 0x1e2 */
12287 /* File: mips/OP_UNUSED_E2FF.S */
12288 /* File: mips/unused.S */
12293 /* ------------------------------ */
12295 .L_OP_UNUSED_E3FF: /* 0x1e3 */
12296 /* File: mips/OP_UNUSED_E3FF.S */
12297 /* File: mips/unused.S */
12302 /* ------------------------------ */
12304 .L_OP_UNUSED_E4FF: /* 0x1e4 */
12305 /* File: mips/OP_UNUSED_E4FF.S */
12306 /* File: mips/unused.S */
12311 /* ------------------------------ */
12313 .L_OP_UNUSED_E5FF: /* 0x1e5 */
12314 /* File: mips/OP_UNUSED_E5FF.S */
12315 /* File: mips/unused.S */
12320 /* ------------------------------ */
12322 .L_OP_UNUSED_E6FF: /* 0x1e6 */
12323 /* File: mips/OP_UNUSED_E6FF.S */
12324 /* File: mips/unused.S */
12329 /* ------------------------------ */
12331 .L_OP_UNUSED_E7FF: /* 0x1e7 */
12332 /* File: mips/OP_UNUSED_E7FF.S */
12333 /* File: mips/unused.S */
12338 /* ------------------------------ */
12340 .L_OP_UNUSED_E8FF: /* 0x1e8 */
12341 /* File: mips/OP_UNUSED_E8FF.S */
12342 /* File: mips/unused.S */
12347 /* ------------------------------ */
12349 .L_OP_UNUSED_E9FF: /* 0x1e9 */
12350 /* File: mips/OP_UNUSED_E9FF.S */
12351 /* File: mips/unused.S */
12356 /* ------------------------------ */
12358 .L_OP_UNUSED_EAFF: /* 0x1ea */
12359 /* File: mips/OP_UNUSED_EAFF.S */
12360 /* File: mips/unused.S */
12365 /* ------------------------------ */
12367 .L_OP_UNUSED_EBFF: /* 0x1eb */
12368 /* File: mips/OP_UNUSED_EBFF.S */
12369 /* File: mips/unused.S */
12374 /* ------------------------------ */
12376 .L_OP_UNUSED_ECFF: /* 0x1ec */
12377 /* File: mips/OP_UNUSED_ECFF.S */
12378 /* File: mips/unused.S */
12383 /* ------------------------------ */
12385 .L_OP_UNUSED_EDFF: /* 0x1ed */
12386 /* File: mips/OP_UNUSED_EDFF.S */
12387 /* File: mips/unused.S */
12392 /* ------------------------------ */
12394 .L_OP_UNUSED_EEFF: /* 0x1ee */
12395 /* File: mips/OP_UNUSED_EEFF.S */
12396 /* File: mips/unused.S */
12401 /* ------------------------------ */
12403 .L_OP_UNUSED_EFFF: /* 0x1ef */
12404 /* File: mips/OP_UNUSED_EFFF.S */
12405 /* File: mips/unused.S */
12410 /* ------------------------------ */
12412 .L_OP_UNUSED_F0FF: /* 0x1f0 */
12413 /* File: mips/OP_UNUSED_F0FF.S */
12414 /* File: mips/unused.S */
12419 /* ------------------------------ */
12421 .L_OP_UNUSED_F1FF: /* 0x1f1 */
12422 /* File: mips/OP_UNUSED_F1FF.S */
12423 /* File: mips/unused.S */
12428 /* ------------------------------ */
12430 .L_OP_INVOKE_OBJECT_INIT_JUMBO: /* 0x1f2 */
12431 /* File: mips/OP_INVOKE_OBJECT_INIT_JUMBO.S */
12432 /* File: mips/OP_INVOKE_OBJECT_INIT_RANGE.S */
12434 * Invoke Object.<init> on an object. In practice we know that
12435 * Object's nullary constructor doesn't do anything, so we just
12436 * skip it unless a debugger is active.
12438 FETCH(a1, 4) # a1<- CCCC
12439 GET_VREG(a0, a1) # a0<- "this" ptr
12441 beqz a0, common_errNullObject # export PC and throw NPE
12442 LOAD_base_offObject_clazz(a1, a0) # a1<- obj->clazz
12443 LOAD_base_offClassObject_accessFlags(a2, a1) # a2<- clazz->accessFlags
12444 and a2, CLASS_ISFINALIZABLE # is this class finalizable?
12445 beqz a2, .LOP_INVOKE_OBJECT_INIT_JUMBO_finish # no, go
12447 .LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal:
12448 EXPORT_PC() # can throw
12449 JAL(dvmSetFinalizable) # call dvmSetFinalizable(obj)
12450 LOAD_offThread_exception(a0, rSELF) # a0<- self->exception
12451 # exception pending?
12452 bnez a0, common_exceptionThrown # yes, handle it
12454 .LOP_INVOKE_OBJECT_INIT_JUMBO_finish:
12455 lhu a1, offThread_subMode(rSELF)
12456 and a1, kSubModeDebuggerActive # debugger active?
12457 bnez a1, .LOP_INVOKE_OBJECT_INIT_JUMBO_debugger # Yes - skip optimization
12458 FETCH_ADVANCE_INST(4+1) # advance to next instr, load rINST
12459 GET_INST_OPCODE(t0) # t0<- opcode from rINST
12460 GOTO_OPCODE(t0) # execute it
12464 /* ------------------------------ */
12466 .L_OP_IGET_VOLATILE_JUMBO: /* 0x1f3 */
12467 /* File: mips/OP_IGET_VOLATILE_JUMBO.S */
12468 /* File: mips/OP_IGET_JUMBO.S */
12470 * Jumbo 32-bit instance field get.
12472 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
12473 * iget-char/jumbo, iget-short/jumbo
12475 /* exop vBBBB, vCCCC, field@AAAAAAAA */
12476 FETCH(a1, 1) # a1<- aaaa (lo)
12477 FETCH(a2, 2) # a2<- AAAA (hi)
12478 FETCH(a0, 4) # a0<- CCCC
12479 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
12481 or a1, a1, a2 # a1<- AAAAaaaa
12482 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
12483 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
12484 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
12485 # is resolved entry null?
12486 bnez a0, .LOP_IGET_VOLATILE_JUMBO_finish # no, already resolved
12487 LOAD_rSELF_method(a2) # a2 <- current method
12488 EXPORT_PC() # resolve() could throw
12489 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12490 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
12491 b .LOP_IGET_VOLATILE_JUMBO_resolved # resolved, continue
12495 /* ------------------------------ */
12497 .L_OP_IGET_WIDE_VOLATILE_JUMBO: /* 0x1f4 */
12498 /* File: mips/OP_IGET_WIDE_VOLATILE_JUMBO.S */
12499 /* File: mips/OP_IGET_WIDE_JUMBO.S */
12501 * Jumbo 64-bit instance field get.
12503 /* iget-wide/jumbo vBBBB, vCCCC, field@AAAAAAAA */
12504 FETCH(a1, 1) # a1<- aaaa (lo)
12505 FETCH(a2, 2) # a2<- AAAA (hi)
12506 FETCH(a0, 4) # a0<- CCCC
12507 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
12509 or a1, a1, a2 # a1<- AAAAaaaa
12510 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
12511 GET_VREG(rOBJ, a0) # rOBJ <- fp[CCCC], the object pointer
12512 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
12513 # is resolved entry null?
12514 bnez a0, .LOP_IGET_WIDE_VOLATILE_JUMBO_finish # no, already resolved
12515 LOAD_rSELF_method(a2) # a2 <- current method
12516 EXPORT_PC() # resolve() could throw
12517 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12518 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
12519 b .LOP_IGET_WIDE_VOLATILE_JUMBO_resolved # resolved, continue
12523 /* ------------------------------ */
12525 .L_OP_IGET_OBJECT_VOLATILE_JUMBO: /* 0x1f5 */
12526 /* File: mips/OP_IGET_OBJECT_VOLATILE_JUMBO.S */
12527 /* File: mips/OP_IGET_OBJECT_JUMBO.S */
12528 /* File: mips/OP_IGET_JUMBO.S */
12530 * Jumbo 32-bit instance field get.
12532 * for: iget/jumbo, iget-object/jumbo, iget-boolean/jumbo, iget-byte/jumbo,
12533 * iget-char/jumbo, iget-short/jumbo
12535 /* exop vBBBB, vCCCC, field@AAAAAAAA */
12536 FETCH(a1, 1) # a1<- aaaa (lo)
12537 FETCH(a2, 2) # a2<- AAAA (hi)
12538 FETCH(a0, 4) # a0<- CCCC
12539 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
12541 or a1, a1, a2 # a1<- AAAAaaaa
12542 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
12543 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
12544 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
12545 # is resolved entry null?
12546 bnez a0, .LOP_IGET_OBJECT_VOLATILE_JUMBO_finish # no, already resolved
12547 LOAD_rSELF_method(a2) # a2 <- current method
12548 EXPORT_PC() # resolve() could throw
12549 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12550 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
12551 b .LOP_IGET_OBJECT_VOLATILE_JUMBO_resolved # resolved, continue
12556 /* ------------------------------ */
12558 .L_OP_IPUT_VOLATILE_JUMBO: /* 0x1f6 */
12559 /* File: mips/OP_IPUT_VOLATILE_JUMBO.S */
12560 /* File: mips/OP_IPUT_JUMBO.S */
12562 * Jumbo 32-bit instance field put.
12564 * for: iput/jumbo, iput-boolean/jumbo, iput-byte/jumbo, iput-char/jumbo,
12567 /* exop vBBBB, vCCCC, field@AAAAAAAA */
12568 FETCH(a1, 1) # a1<- aaaa (lo)
12569 FETCH(a2, 2) # a2<- AAAA (hi)
12570 FETCH(a0, 4) # a0<- CCCC
12571 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
12573 or a1, a1, a2 # a1<- AAAAaaaa
12574 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
12575 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
12576 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
12577 # is resolved entry null?
12578 bnez a0, .LOP_IPUT_VOLATILE_JUMBO_finish # no, already resolved
12579 LOAD_rSELF_method(a2) # a2 <- current method
12580 EXPORT_PC() # resolve() could throw
12581 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12582 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
12583 b .LOP_IPUT_VOLATILE_JUMBO_resolved # resolved, continue
12587 /* ------------------------------ */
12589 .L_OP_IPUT_WIDE_VOLATILE_JUMBO: /* 0x1f7 */
12590 /* File: mips/OP_IPUT_WIDE_VOLATILE_JUMBO.S */
12591 /* File: mips/OP_IPUT_WIDE_JUMBO.S */
12592 /* iput-wide/jumbo vBBBB, vCCCC, field@AAAAAAAA */
12593 FETCH(a1, 1) # a1<- aaaa (lo)
12594 FETCH(a2, 2) # a2<- AAAA (hi)
12595 FETCH(a0, 4) # a0<- CCCC
12596 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
12598 or a1, a1, a2 # a1<- AAAAaaaa
12600 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pResFields
12601 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
12602 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
12603 # is resolved entry null?
12604 bnez a0, .LOP_IPUT_WIDE_VOLATILE_JUMBO_finish # no, already resolved
12605 LOAD_rSELF_method(a2) # a2 <- current method
12606 EXPORT_PC() # resolve() could throw
12607 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12608 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
12609 b .LOP_IPUT_WIDE_VOLATILE_JUMBO_resolved # resolved, continue
12613 /* ------------------------------ */
12615 .L_OP_IPUT_OBJECT_VOLATILE_JUMBO: /* 0x1f8 */
12616 /* File: mips/OP_IPUT_OBJECT_VOLATILE_JUMBO.S */
12617 /* File: mips/OP_IPUT_OBJECT_JUMBO.S */
12619 * Jumbo 32-bit instance field put.
12621 /* iput-object/jumbo vBBBB, vCCCC, field@AAAAAAAA */
12622 FETCH(a1, 1) # a1<- aaaa (lo)
12623 FETCH(a2, 2) # a2<- AAAA (hi)
12624 FETCH(a0, 4) # a0<- CCCC
12625 LOAD_rSELF_methodClassDex(a3) # a3 <- DvmDex
12627 or a1, a1, a2 # a1<- AAAAaaaa
12628 LOAD_base_offDvmDex_pResFields(a2, a3) # a2 <- pDvmDex->pResFields
12629 GET_VREG(rOBJ, a0) # rOBJ <- fp[B], the object pointer
12630 LOAD_eas2(a0, a2, a1) # a0 <- resolved InstField ptr
12631 # is resolved entry null?
12632 bnez a0, .LOP_IPUT_OBJECT_VOLATILE_JUMBO_finish # no, already resolved
12633 LOAD_rSELF_method(a2) # a2 <- current method
12634 EXPORT_PC() # resolve() could throw
12635 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12636 JAL(dvmResolveInstField) # v0 <- resolved InstField ptr
12637 b .LOP_IPUT_OBJECT_VOLATILE_JUMBO_resolved
12641 /* ------------------------------ */
12643 .L_OP_SGET_VOLATILE_JUMBO: /* 0x1f9 */
12644 /* File: mips/OP_SGET_VOLATILE_JUMBO.S */
12645 /* File: mips/OP_SGET_JUMBO.S */
12647 * Jumbo 32-bit SGET handler.
12649 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
12650 * sget-char/jumbo, sget-short/jumbo
12652 /* exop vBBBB, field@AAAAAAAA */
12653 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
12654 FETCH(a0, 1) # a0<- aaaa (lo)
12655 FETCH(a1, 2) # a1<- AAAA (hi)
12656 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
12658 or a1, a0, a1 # a1<- AAAAaaaa
12659 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
12660 # is resolved entry !null?
12661 bnez a0, .LOP_SGET_VOLATILE_JUMBO_finish
12664 * Continuation if the field has not yet been resolved.
12665 * a1: AAAAAAAA field ref
12666 * rBIX: dvmDex->pResFields
12668 LOAD_rSELF_method(a2) # a2 <- current method
12669 #if defined(WITH_JIT)
12670 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
12672 EXPORT_PC() # resolve() could throw, so export now
12673 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12674 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
12677 beqz v0, common_exceptionThrown # no, handle exception
12678 #if defined(WITH_JIT)
12680 * If the JIT is actively building a trace we need to make sure
12681 * that the field is fully resolved before including this instruction.
12683 JAL(common_verifyField)
12685 b .LOP_SGET_VOLATILE_JUMBO_finish # resume
12688 /* ------------------------------ */
12690 .L_OP_SGET_WIDE_VOLATILE_JUMBO: /* 0x1fa */
12691 /* File: mips/OP_SGET_WIDE_VOLATILE_JUMBO.S */
12692 /* File: mips/OP_SGET_WIDE_JUMBO.S */
12694 * Jumbo 64-bit SGET handler.
12696 /* sget-wide/jumbo vBBBB, field@AAAAAAAA */
12697 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
12698 FETCH(a0, 1) # a0<- aaaa (lo)
12699 FETCH(a1, 2) # a1<- AAAA (hi)
12700 LOAD_base_offDvmDex_pResFields(a2, a2) # a2 <- dvmDex->pResFields
12702 or a1, a0, a1 # a1<- AAAAaaaa
12703 LOAD_eas2(a0, a2, a1) # a0 <- resolved StaticField ptr
12704 # is resolved entry null?
12705 bnez a0, .LOP_SGET_WIDE_VOLATILE_JUMBO_finish
12708 * Continuation if the field has not yet been resolved.
12709 * a1: AAAAAAAA field ref
12711 * Returns StaticField pointer in v0.
12713 LOAD_rSELF_method(a2) # a2 <- current method
12714 EXPORT_PC() # resolve() could throw, so export now
12715 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12716 JAL(dvmResolveStaticField) # a0 <- resolved StaticField ptr
12719 beqz v0, common_exceptionThrown # no, handle exception
12720 b .LOP_SGET_WIDE_VOLATILE_JUMBO_finish # resume
12723 /* ------------------------------ */
12725 .L_OP_SGET_OBJECT_VOLATILE_JUMBO: /* 0x1fb */
12726 /* File: mips/OP_SGET_OBJECT_VOLATILE_JUMBO.S */
12727 /* File: mips/OP_SGET_OBJECT_JUMBO.S */
12728 /* File: mips/OP_SGET_JUMBO.S */
12730 * Jumbo 32-bit SGET handler.
12732 * for: sget/jumbo, sget-object/jumbo, sget-boolean/jumbo, sget-byte/jumbo,
12733 * sget-char/jumbo, sget-short/jumbo
12735 /* exop vBBBB, field@AAAAAAAA */
12736 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
12737 FETCH(a0, 1) # a0<- aaaa (lo)
12738 FETCH(a1, 2) # a1<- AAAA (hi)
12739 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
12741 or a1, a0, a1 # a1<- AAAAaaaa
12742 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
12743 # is resolved entry !null?
12744 bnez a0, .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish
12747 * Continuation if the field has not yet been resolved.
12748 * a1: AAAAAAAA field ref
12749 * rBIX: dvmDex->pResFields
12751 LOAD_rSELF_method(a2) # a2 <- current method
12752 #if defined(WITH_JIT)
12753 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
12755 EXPORT_PC() # resolve() could throw, so export now
12756 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12757 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
12760 beqz v0, common_exceptionThrown # no, handle exception
12761 #if defined(WITH_JIT)
12763 * If the JIT is actively building a trace we need to make sure
12764 * that the field is fully resolved before including this instruction.
12766 JAL(common_verifyField)
12768 b .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish # resume
12772 /* ------------------------------ */
12774 .L_OP_SPUT_VOLATILE_JUMBO: /* 0x1fc */
12775 /* File: mips/OP_SPUT_VOLATILE_JUMBO.S */
12776 /* File: mips/OP_SPUT_JUMBO.S */
12778 * Jumbo 32-bit SPUT handler.
12780 * for: sput/jumbo, sput-boolean/jumbo, sput-byte/jumbo, sput-char/jumbo,
12783 /* exop vBBBB, field@AAAAAAAA */
12784 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
12785 FETCH(a0, 1) # a0<- aaaa (lo)
12786 FETCH(a1, 2) # a1<- AAAA (hi)
12787 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
12789 or a1, a0, a1 # a1<- AAAAaaaa
12790 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
12791 bnez a0, .LOP_SPUT_VOLATILE_JUMBO_finish # is resolved entry null?
12794 * Continuation if the field has not yet been resolved.
12795 * a1: AAAAAAAA field ref
12796 * rBIX: dvmDex->pResFields
12798 LOAD_rSELF_method(a2) # a2 <- current method
12799 #if defined(WITH_JIT)
12800 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
12802 EXPORT_PC() # resolve() may throw, so export now
12803 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12804 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
12806 beqz v0, common_exceptionThrown # success? no, handle exception
12807 #if defined(WITH_JIT)
12809 * If the JIT is actively building a trace we need to make sure
12810 * that the field is fully resolved before including this instruction.
12812 JAL(common_verifyField)
12814 b .LOP_SPUT_VOLATILE_JUMBO_finish # resume
12817 /* ------------------------------ */
12819 .L_OP_SPUT_WIDE_VOLATILE_JUMBO: /* 0x1fd */
12820 /* File: mips/OP_SPUT_WIDE_VOLATILE_JUMBO.S */
12821 /* File: mips/OP_SPUT_WIDE_JUMBO.S */
12823 * Jumbo 64-bit SPUT handler.
12825 /* sput-wide/jumbo vBBBB, field@AAAAAAAA */
12826 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
12827 FETCH(a1, 1) # a1<- aaaa (lo)
12828 FETCH(a2, 2) # a2<- AAAA (hi)
12829 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
12831 or a1, a1, a2 # a1<- AAAAaaaa
12832 FETCH(rOBJ, 3) # rOBJ<- BBBB solved StaticField ptr
12833 EAS2(rOBJ, rFP, t0) # rOBJ<- &fp[BBBB]
12834 # is resolved entry null?
12835 beqz a2, .LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve # yes, do resolve
12836 .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish: # field ptr in a2, BBBB in rOBJ
12837 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
12838 LOAD64(a0, a1, rOBJ) # a0/a1 <- vBBBB/vBBBB+1
12839 GET_INST_OPCODE(rBIX) # extract opcode from rINST
12841 addu a2, offStaticField_value # a2<- pointer to data
12842 JAL(dvmQuasiAtomicSwap64Sync) # stores a0/a1 into addr a2
12844 STORE64_off(a0, a1, a2, offStaticField_value) # field <- vBBBB/vBBBB+1
12846 GOTO_OPCODE(rBIX) # jump to next instruction
12849 /* ------------------------------ */
12851 .L_OP_SPUT_OBJECT_VOLATILE_JUMBO: /* 0x1fe */
12852 /* File: mips/OP_SPUT_OBJECT_VOLATILE_JUMBO.S */
12853 /* File: mips/OP_SPUT_OBJECT_JUMBO.S */
12855 * Jumbo 32-bit SPUT handler for objects
12857 /* sput-object/jumbo vBBBB, field@AAAAAAAA */
12858 LOAD_rSELF_methodClassDex(a2) # a2 <- DvmDex
12859 FETCH(a0, 1) # a0<- aaaa (lo)
12860 FETCH(a1, 2) # a1<- AAAA (hi)
12861 LOAD_base_offDvmDex_pResFields(rBIX, a2) # rBIX <- dvmDex->pResFields
12863 or a1,a0,a1 # a1<- AAAAaaaa
12865 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
12866 bnez a0, .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish # is resolved entry null?
12868 /* Continuation if the field has not yet been resolved.
12869 * a1: BBBB field ref
12870 * rBIX: dvmDex->pResFields
12872 LOAD_rSELF_method(a2) # a2 <- current method
12873 #if defined(WITH_JIT)
12874 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
12876 EXPORT_PC() # resolve() may throw, so export now
12877 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
12878 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
12880 beqz v0, common_exceptionThrown # success? no, handle exception
12881 #if defined(WITH_JIT)
12883 * If the JIT is actively building a trace we need to make sure
12884 * that the field is fully resolved before including this instruction.
12886 JAL(common_verifyField)
12888 b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish # resume
12892 /* ------------------------------ */
12894 .L_OP_THROW_VERIFICATION_ERROR_JUMBO: /* 0x1ff */
12895 /* File: mips/OP_THROW_VERIFICATION_ERROR_JUMBO.S */
12897 * Handle a jumbo throw-verification-error instruction. This throws an
12898 * exception for an error discovered during verification. The
12899 * exception is indicated by BBBB, with some detail provided by AAAAAAAA.
12901 /* exop BBBB, Class@AAAAAAAA */
12902 FETCH(a1, 1) # a1<- aaaa (lo)
12903 FETCH(a2, 2) # a2<- AAAA (hi)
12904 LOAD_rSELF_method(a0) # a0 <- self->method
12906 or a2, a1, a2 # a2<- AAAAaaaa
12907 EXPORT_PC() # export the PC
12908 FETCH(a1, 3) # a1<- BBBB
12909 JAL(dvmThrowVerificationError) # always throws
12910 b common_exceptionThrown # handle exception
12914 .size dvmAsmInstructionStart, .-dvmAsmInstructionStart
12915 .global dvmAsmInstructionEnd
12916 dvmAsmInstructionEnd:
12919 * ===========================================================================
12920 * Sister implementations
12921 * ===========================================================================
12923 .global dvmAsmSisterStart
12924 .type dvmAsmSisterStart, %function
12929 /* continuation for OP_CHECK_CAST */
12931 .LOP_CHECK_CAST_castfailure:
12932 # A cast has failed. We need to throw a ClassCastException with the
12933 # class of the object that failed to be cast.
12934 EXPORT_PC() # about to throw
12935 LOAD_base_offObject_clazz(a0, rOBJ) # a0 <- obj->clazz
12936 move a1,rBIX # r1<- desired class
12937 JAL(dvmThrowClassCastException)
12938 b common_exceptionThrown
12941 * Resolution required. This is the least-likely path.
12944 * rOBJ holds object
12946 .LOP_CHECK_CAST_resolve:
12947 EXPORT_PC() # resolve() could throw
12948 LOAD_rSELF_method(a3) # a3 <- self->method
12949 move a1, a2 # a1 <- BBBB
12950 li a2, 0 # a2 <- false
12951 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
12952 JAL(dvmResolveClass) # v0 <- resolved ClassObject ptr
12954 beqz v0, common_exceptionThrown # yes, handle exception
12955 move a1, v0 # a1 <- class resolved from BBB
12956 LOAD_base_offObject_clazz(a0, rOBJ) # a0 <- obj->clazz
12957 b .LOP_CHECK_CAST_resolved # pick up where we left off
12959 /* continuation for OP_INSTANCE_OF */
12962 * Trivial test failed, need to perform full check. This is common.
12963 * a0 holds obj->clazz
12964 * a1 holds class resolved from BBBB
12967 .LOP_INSTANCE_OF_fullcheck:
12968 JAL(dvmInstanceofNonTrivial) # v0 <- boolean result
12969 move a0, v0 # fall through to OP_INSTANCE_OF_store
12970 b .LOP_INSTANCE_OF_store
12973 * Resolution required. This is the least-likely path.
12978 .LOP_INSTANCE_OF_resolve:
12979 EXPORT_PC() # resolve() could throw
12980 LOAD_rSELF_method(a0) # a0 <- self->method
12981 move a1, a3 # a1 <- BBBB
12982 li a2, 1 # a2 <- true
12983 LOAD_base_offMethod_clazz(a0, a0) # a0 <- method->clazz
12984 JAL(dvmResolveClass) # v0 <- resolved ClassObject ptr
12986 move a1, v0 # a1 <- class resolved from BBB
12987 beqz v0, common_exceptionThrown # yes, handle exception
12988 GET_OPB(a3) # a3 <- B
12989 GET_VREG(a0, a3) # a0 <- vB (object)
12990 LOAD_base_offObject_clazz(a0, a0) # a0 <- obj->clazz
12991 b .LOP_INSTANCE_OF_resolved # pick up where we left off
12994 /* continuation for OP_NEW_INSTANCE */
12996 .LOP_NEW_INSTANCE_continue:
12997 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
12998 GET_INST_OPCODE(t0) # extract opcode from rINST
12999 SET_VREG(v0, a3) # vAA <- v0
13000 GOTO_OPCODE(t0) # jump to next instruction
13002 #if defined(WITH_JIT)
13004 * Check to see if we need to stop the trace building early.
13008 .LOP_NEW_INSTANCE_jitCheck:
13009 lw a1, 0(rBIX) # reload resolved class
13011 bnez a1, .LOP_NEW_INSTANCE_continue # yes, finish
13012 move rOBJ, v0 # preserve new object
13013 move rBIX, a3 # preserve vAA
13016 JAL(dvmJitEndTraceSelect) # (self, pc)
13017 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13018 GET_INST_OPCODE(t0) # extract opcode from rINST
13019 SET_VREG(rOBJ, rBIX) # vAA <- new object
13020 GOTO_OPCODE(t0) # jump to next instruction
13024 * Class initialization required.
13026 * a0 holds class object
13028 .LOP_NEW_INSTANCE_needinit:
13029 JAL(dvmInitClass) # initialize class
13030 move a0, rOBJ # restore a0
13031 # check boolean result
13032 bnez v0, .LOP_NEW_INSTANCE_initialized # success, continue
13033 b common_exceptionThrown # failed, deal with init exception
13037 * Resolution required. This is the least-likely path.
13041 .LOP_NEW_INSTANCE_resolve:
13042 LOAD_rSELF_method(a3) # a3 <- self->method
13043 li a2, 0 # a2 <- false
13044 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
13045 JAL(dvmResolveClass) # v0 <- resolved ClassObject ptr
13048 bnez v0, .LOP_NEW_INSTANCE_resolved # no, continue
13049 b common_exceptionThrown # yes, handle exception
13051 /* continuation for OP_NEW_ARRAY */
13054 * Resolve class. (This is an uncommon case.)
13056 * a1 holds array length
13057 * a2 holds class ref CCCC
13059 .LOP_NEW_ARRAY_resolve:
13060 LOAD_rSELF_method(a3) # a3 <- self->method
13061 move rOBJ, a1 # rOBJ <- length (save)
13062 move a1, a2 # a1 <- CCCC
13063 li a2, 0 # a2 <- false
13064 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
13065 JAL(dvmResolveClass) # v0 <- call(clazz, ref)
13066 move a1, rOBJ # a1 <- length (restore)
13068 beqz v0, common_exceptionThrown # yes, handle exception
13070 b .LOP_NEW_ARRAY_finish # continue with OP_NEW_ARRAY_finish
13074 /* continuation for OP_FILLED_NEW_ARRAY */
13078 * a0 holds array class
13079 * rOBJ holds AA or BA
13081 .LOP_FILLED_NEW_ARRAY_continue:
13082 LOAD_base_offClassObject_descriptor(a3, a0) # a3 <- arrayClass->descriptor
13083 li a2, ALLOC_DONT_TRACK # a2 <- alloc flags
13084 lbu rINST, 1(a3) # rINST <- descriptor[1]
13086 move a1, rOBJ # a1 <- AA (length)
13088 srl a1, rOBJ, 4 # rOBJ <- B (length)
13090 seq t0, rINST, 'I' # array of ints?
13091 seq t1, rINST, 'L' # array of objects?
13093 seq t1, rINST, '[' # array of arrays?
13095 move rBIX, a1 # save length in rBIX
13096 beqz t0, .LOP_FILLED_NEW_ARRAY_notimpl # no, not handled yet
13097 JAL(dvmAllocArrayByClass) # v0 <- call(arClass, length, flags)
13099 beqz v0, common_exceptionThrown # alloc failed, handle exception
13101 FETCH(a1, 2) # a1 <- FEDC or CCCC
13102 sw v0, offThread_retval(rSELF) # retval.l <- new array
13103 sw rINST, (offThread_retval+4)(rSELF) # retval.h <- type
13104 addu a0, v0, offArrayObject_contents # a0 <- newArray->contents
13105 subu rBIX, rBIX, 1 # length--, check for neg
13106 FETCH_ADVANCE_INST(3) # advance to next instr, load rINST
13107 bltz rBIX, 2f # was zero, bail
13109 # copy values from registers into the array
13110 # a0=array, a1=CCCC/FEDC, t0=length (from AA or B), rOBJ=AA/BA
13113 EAS2(a2, rFP, a1) # a2 <- &fp[CCCC]
13115 lw a3, 0(a2) # a3 <- *a2++
13117 subu t0, t0, 1 # count--
13118 sw a3, (a0) # *contents++ = vX
13124 slt t1, t0, 4 # length was initially 5?
13125 and a2, rOBJ, 15 # a2 <- A
13126 bnez t1, 1f # <= 4 args, branch
13127 GET_VREG(a3, a2) # a3 <- vA
13128 subu t0, t0, 1 # count--
13129 sw a3, 16(a0) # contents[4] = vA
13131 and a2, a1, 15 # a2 <- F/E/D/C
13132 GET_VREG(a3, a2) # a3 <- vF/vE/vD/vC
13133 srl a1, a1, 4 # a1 <- next reg in low 4
13134 subu t0, t0, 1 # count--
13135 sw a3, 0(a0) # *contents++ = vX
13142 lw a0, offThread_retval(rSELF) # a0 <- object
13143 lw a1, (offThread_retval+4)(rSELF) # a1 <- type
13144 seq t1, a1, 'I' # Is int array?
13146 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
13147 srl t3, a0, GC_CARD_SHIFT
13151 GET_INST_OPCODE(t0) # ip <- opcode from rINST
13152 GOTO_OPCODE(t0) # execute it
13156 * Throw an exception indicating that we have not implemented this
13157 * mode of filled-new-array.
13159 .LOP_FILLED_NEW_ARRAY_notimpl:
13160 la a0, .LstrFilledNewArrayNotImpl
13161 JAL(dvmThrowInternalError)
13162 b common_exceptionThrown
13165 * Ideally we'd only define this once, but depending on layout we can
13166 * exceed the range of the load above.
13169 /* continuation for OP_FILLED_NEW_ARRAY_RANGE */
13173 * a0 holds array class
13174 * rOBJ holds AA or BA
13176 .LOP_FILLED_NEW_ARRAY_RANGE_continue:
13177 LOAD_base_offClassObject_descriptor(a3, a0) # a3 <- arrayClass->descriptor
13178 li a2, ALLOC_DONT_TRACK # a2 <- alloc flags
13179 lbu rINST, 1(a3) # rINST <- descriptor[1]
13181 move a1, rOBJ # a1 <- AA (length)
13183 srl a1, rOBJ, 4 # rOBJ <- B (length)
13185 seq t0, rINST, 'I' # array of ints?
13186 seq t1, rINST, 'L' # array of objects?
13188 seq t1, rINST, '[' # array of arrays?
13190 move rBIX, a1 # save length in rBIX
13191 beqz t0, .LOP_FILLED_NEW_ARRAY_RANGE_notimpl # no, not handled yet
13192 JAL(dvmAllocArrayByClass) # v0 <- call(arClass, length, flags)
13194 beqz v0, common_exceptionThrown # alloc failed, handle exception
13196 FETCH(a1, 2) # a1 <- FEDC or CCCC
13197 sw v0, offThread_retval(rSELF) # retval.l <- new array
13198 sw rINST, (offThread_retval+4)(rSELF) # retval.h <- type
13199 addu a0, v0, offArrayObject_contents # a0 <- newArray->contents
13200 subu rBIX, rBIX, 1 # length--, check for neg
13201 FETCH_ADVANCE_INST(3) # advance to next instr, load rINST
13202 bltz rBIX, 2f # was zero, bail
13204 # copy values from registers into the array
13205 # a0=array, a1=CCCC/FEDC, t0=length (from AA or B), rOBJ=AA/BA
13208 EAS2(a2, rFP, a1) # a2 <- &fp[CCCC]
13210 lw a3, 0(a2) # a3 <- *a2++
13212 subu t0, t0, 1 # count--
13213 sw a3, (a0) # *contents++ = vX
13219 slt t1, t0, 4 # length was initially 5?
13220 and a2, rOBJ, 15 # a2 <- A
13221 bnez t1, 1f # <= 4 args, branch
13222 GET_VREG(a3, a2) # a3 <- vA
13223 subu t0, t0, 1 # count--
13224 sw a3, 16(a0) # contents[4] = vA
13226 and a2, a1, 15 # a2 <- F/E/D/C
13227 GET_VREG(a3, a2) # a3 <- vF/vE/vD/vC
13228 srl a1, a1, 4 # a1 <- next reg in low 4
13229 subu t0, t0, 1 # count--
13230 sw a3, 0(a0) # *contents++ = vX
13237 lw a0, offThread_retval(rSELF) # a0 <- object
13238 lw a1, (offThread_retval+4)(rSELF) # a1 <- type
13239 seq t1, a1, 'I' # Is int array?
13241 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
13242 srl t3, a0, GC_CARD_SHIFT
13246 GET_INST_OPCODE(t0) # ip <- opcode from rINST
13247 GOTO_OPCODE(t0) # execute it
13251 * Throw an exception indicating that we have not implemented this
13252 * mode of filled-new-array.
13254 .LOP_FILLED_NEW_ARRAY_RANGE_notimpl:
13255 la a0, .LstrFilledNewArrayNotImpl
13256 JAL(dvmThrowInternalError)
13257 b common_exceptionThrown
13260 * Ideally we'd only define this once, but depending on layout we can
13261 * exceed the range of the load above.
13264 /* continuation for OP_CMPL_FLOAT */
13268 b OP_CMPL_FLOAT_finish
13271 OP_CMPL_FLOAT_continue:
13272 JAL(__gtsf2) # v0 <- (vBB > vCC)
13273 li rTEMP, 1 # rTEMP = 1 if v0 != 0
13274 bgtz v0, OP_CMPL_FLOAT_finish
13275 b OP_CMPL_FLOAT_nan
13278 OP_CMPL_FLOAT_finish:
13280 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13281 SET_VREG(rTEMP, t0) # vAA <- rTEMP
13282 GET_INST_OPCODE(t0) # extract opcode from rINST
13285 /* continuation for OP_CMPG_FLOAT */
13289 b OP_CMPG_FLOAT_finish
13292 OP_CMPG_FLOAT_continue:
13293 JAL(__gtsf2) # v0 <- (vBB > vCC)
13294 li rTEMP, 1 # rTEMP = 1 if v0 != 0
13295 bgtz v0, OP_CMPG_FLOAT_finish
13296 b OP_CMPG_FLOAT_nan
13299 OP_CMPG_FLOAT_finish:
13301 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13302 SET_VREG(rTEMP, t0) # vAA <- rTEMP
13303 GET_INST_OPCODE(t0) # extract opcode from rINST
13306 /* continuation for OP_CMPL_DOUBLE */
13308 OP_CMPL_DOUBLE_nan:
13310 b OP_CMPL_DOUBLE_finish
13313 OP_CMPL_DOUBLE_continue:
13314 LOAD64(rARG2, rARG3, rBIX) # a2/a3 <- vCC/vCC+1
13315 JAL(__gtdf2) # fallthru
13316 li rTEMP, 1 # rTEMP = 1 if v0 != 0
13317 blez v0, OP_CMPL_DOUBLE_nan # fall thru for finish
13320 OP_CMPL_DOUBLE_finish:
13322 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13323 GET_INST_OPCODE(t0) # extract opcode from rINST
13324 SET_VREG_GOTO(rTEMP, rOBJ, t0) # vAA <- rTEMP
13326 /* continuation for OP_CMPG_DOUBLE */
13328 OP_CMPG_DOUBLE_nan:
13330 b OP_CMPG_DOUBLE_finish
13333 OP_CMPG_DOUBLE_continue:
13334 LOAD64(rARG2, rARG3, rBIX) # a2/a3 <- vCC/vCC+1
13335 JAL(__gtdf2) # fallthru
13336 li rTEMP, 1 # rTEMP = 1 if v0 != 0
13337 blez v0, OP_CMPG_DOUBLE_nan # fall thru for finish
13340 OP_CMPG_DOUBLE_finish:
13342 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13343 GET_INST_OPCODE(t0) # extract opcode from rINST
13344 SET_VREG_GOTO(rTEMP, rOBJ, t0) # vAA <- rTEMP
13346 /* continuation for OP_APUT_OBJECT */
13347 .LOP_APUT_OBJECT_checks:
13348 LOAD_base_offObject_clazz(a0, rBIX) # a0 <- obj->clazz
13349 LOAD_base_offObject_clazz(a1, rINST) # a1 <- arrayObj->clazz
13350 JAL(dvmCanPutArrayElement) # test object type vs. array type
13351 beqz v0, .LOP_APUT_OBJECT_throw # okay ?
13352 lw a2, offThread_cardTable(rSELF)
13353 srl t1, rINST, GC_CARD_SHIFT
13356 b .LOP_APUT_OBJECT_finish # yes, skip type checks
13357 .LOP_APUT_OBJECT_throw:
13358 LOAD_base_offObject_clazz(a0, rBIX) # a0 <- obj->clazz
13359 LOAD_base_offObject_clazz(a1, rINST) # a1 <- arrayObj->clazz
13361 JAL(dvmThrowArrayStoreExceptionIncompatibleElement)
13362 b common_exceptionThrown
13364 /* continuation for OP_IGET */
13368 * v0 holds resolved field
13369 * rOBJ holds object (caller saved)
13372 #BAL(common_squeak0)
13373 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13374 # check object for null
13375 beqz rOBJ, common_errNullObject # object was null
13376 addu a3, a3, rOBJ # form address
13377 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
13378 # noop # acquiring load
13379 GET_OPA4(a2) # a2 <- A+
13380 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13381 GET_INST_OPCODE(t0) # extract opcode from rINST
13382 SET_VREG(a0, a2) # fp[A] <- a0
13383 GOTO_OPCODE(t0) # jump to next instruction
13386 /* continuation for OP_IGET_WIDE */
13390 * a0 holds resolved field
13391 * rOBJ holds object
13393 .LOP_IGET_WIDE_finish:
13394 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13395 beqz rOBJ, common_errNullObject # object was null
13396 GET_OPA4(a2) # a2 <- A+
13397 addu rOBJ, rOBJ, a3 # form address
13399 vLOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
13401 LOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
13403 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13404 EAS2(a3, rFP, a2) # a3 <- &fp[A]
13405 GET_INST_OPCODE(t0) # extract opcode from rINST
13406 STORE64(a0, a1, a3) # fp[A] <- a0/a1
13407 GOTO_OPCODE(t0) # jump to next instruction
13410 /* continuation for OP_IGET_OBJECT */
13414 * v0 holds resolved field
13415 * rOBJ holds object (caller saved)
13417 .LOP_IGET_OBJECT_finish:
13418 #BAL(common_squeak0)
13419 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13420 # check object for null
13421 beqz rOBJ, common_errNullObject # object was null
13422 addu a3, a3, rOBJ # form address
13423 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
13424 # noop # acquiring load
13425 GET_OPA4(a2) # a2 <- A+
13426 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13427 GET_INST_OPCODE(t0) # extract opcode from rINST
13428 SET_VREG(a0, a2) # fp[A] <- a0
13429 GOTO_OPCODE(t0) # jump to next instruction
13432 /* continuation for OP_IGET_BOOLEAN */
13436 * v0 holds resolved field
13437 * rOBJ holds object (caller saved)
13439 .LOP_IGET_BOOLEAN_finish:
13440 #BAL(common_squeak0)
13441 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13442 # check object for null
13443 beqz rOBJ, common_errNullObject # object was null
13444 addu a3, a3, rOBJ # form address
13445 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
13446 # noop # acquiring load
13447 GET_OPA4(a2) # a2 <- A+
13448 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13449 GET_INST_OPCODE(t0) # extract opcode from rINST
13450 SET_VREG(a0, a2) # fp[A] <- a0
13451 GOTO_OPCODE(t0) # jump to next instruction
13454 /* continuation for OP_IGET_BYTE */
13458 * v0 holds resolved field
13459 * rOBJ holds object (caller saved)
13461 .LOP_IGET_BYTE_finish:
13462 #BAL(common_squeak0)
13463 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13464 # check object for null
13465 beqz rOBJ, common_errNullObject # object was null
13466 addu a3, a3, rOBJ # form address
13467 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
13468 # noop # acquiring load
13469 GET_OPA4(a2) # a2 <- A+
13470 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13471 GET_INST_OPCODE(t0) # extract opcode from rINST
13472 SET_VREG(a0, a2) # fp[A] <- a0
13473 GOTO_OPCODE(t0) # jump to next instruction
13476 /* continuation for OP_IGET_CHAR */
13480 * v0 holds resolved field
13481 * rOBJ holds object (caller saved)
13483 .LOP_IGET_CHAR_finish:
13484 #BAL(common_squeak0)
13485 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13486 # check object for null
13487 beqz rOBJ, common_errNullObject # object was null
13488 addu a3, a3, rOBJ # form address
13489 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
13490 # noop # acquiring load
13491 GET_OPA4(a2) # a2 <- A+
13492 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13493 GET_INST_OPCODE(t0) # extract opcode from rINST
13494 SET_VREG(a0, a2) # fp[A] <- a0
13495 GOTO_OPCODE(t0) # jump to next instruction
13498 /* continuation for OP_IGET_SHORT */
13502 * v0 holds resolved field
13503 * rOBJ holds object (caller saved)
13505 .LOP_IGET_SHORT_finish:
13506 #BAL(common_squeak0)
13507 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13508 # check object for null
13509 beqz rOBJ, common_errNullObject # object was null
13510 addu a3, a3, rOBJ # form address
13511 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
13512 # noop # acquiring load
13513 GET_OPA4(a2) # a2 <- A+
13514 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13515 GET_INST_OPCODE(t0) # extract opcode from rINST
13516 SET_VREG(a0, a2) # fp[A] <- a0
13517 GOTO_OPCODE(t0) # jump to next instruction
13520 /* continuation for OP_IPUT */
13524 * a0 holds resolved field
13525 * rOBJ holds object
13528 #BAL(common_squeak0)
13529 GET_OPA4(a1) # a1 <- A+
13530 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13531 GET_VREG(a0, a1) # a0 <- fp[A]
13532 # check object for null
13533 beqz rOBJ, common_errNullObject # object was null
13534 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13535 GET_INST_OPCODE(t0) # extract opcode from rINST
13536 addu rOBJ, rOBJ, a3 # form address
13537 # noop # releasing store
13538 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
13540 GOTO_OPCODE(t0) # jump to next instruction
13543 /* continuation for OP_IPUT_WIDE */
13547 * a0 holds resolved field
13548 * rOBJ holds object
13550 .LOP_IPUT_WIDE_finish:
13551 GET_OPA4(a2) # a2 <- A+
13552 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13553 EAS2(a2, rFP, a2) # a2 <- &fp[A]
13554 # check object for null
13555 beqz rOBJ, common_errNullObject # object was null
13556 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13557 LOAD64(a0, a1, a2) # a0/a1 <- fp[A]
13558 GET_INST_OPCODE(rBIX) # extract opcode from rINST
13559 addu a2, rOBJ, a3 # form address
13561 JAL(dvmQuasiAtomicSwap64Sync) # stores r0/r1 into addr r2
13562 # STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
13564 STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
13566 GOTO_OPCODE(rBIX) # jump to next instruction
13569 /* continuation for OP_IPUT_OBJECT */
13573 * a0 holds resolved field
13574 * rOBJ holds object
13576 .LOP_IPUT_OBJECT_finish:
13577 #BAL(common_squeak0)
13578 GET_OPA4(a1) # a1 <- A+
13579 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13580 GET_VREG(a0, a1) # a0 <- fp[A]
13581 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
13582 # check object for null
13583 beqz rOBJ, common_errNullObject # object was null
13584 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13585 GET_INST_OPCODE(t0) # extract opcode from rINST
13586 addu t2, rOBJ, a3 # form address
13587 # noop # releasing store
13588 sw a0, (t2) # obj.field (32 bits) <- a0
13590 beqz a0, 1f # stored a null reference?
13591 srl t1, rOBJ, GC_CARD_SHIFT
13593 sb a2, (t2) # mark card if not
13595 GOTO_OPCODE(t0) # jump to next instruction
13598 /* continuation for OP_IPUT_BOOLEAN */
13602 * a0 holds resolved field
13603 * rOBJ holds object
13605 .LOP_IPUT_BOOLEAN_finish:
13606 #BAL(common_squeak0)
13607 GET_OPA4(a1) # a1 <- A+
13608 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13609 GET_VREG(a0, a1) # a0 <- fp[A]
13610 # check object for null
13611 beqz rOBJ, common_errNullObject # object was null
13612 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13613 GET_INST_OPCODE(t0) # extract opcode from rINST
13614 addu rOBJ, rOBJ, a3 # form address
13615 # noop # releasing store
13616 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
13618 GOTO_OPCODE(t0) # jump to next instruction
13621 /* continuation for OP_IPUT_BYTE */
13625 * a0 holds resolved field
13626 * rOBJ holds object
13628 .LOP_IPUT_BYTE_finish:
13629 #BAL(common_squeak0)
13630 GET_OPA4(a1) # a1 <- A+
13631 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13632 GET_VREG(a0, a1) # a0 <- fp[A]
13633 # check object for null
13634 beqz rOBJ, common_errNullObject # object was null
13635 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13636 GET_INST_OPCODE(t0) # extract opcode from rINST
13637 addu rOBJ, rOBJ, a3 # form address
13638 # noop # releasing store
13639 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
13641 GOTO_OPCODE(t0) # jump to next instruction
13644 /* continuation for OP_IPUT_CHAR */
13648 * a0 holds resolved field
13649 * rOBJ holds object
13651 .LOP_IPUT_CHAR_finish:
13652 #BAL(common_squeak0)
13653 GET_OPA4(a1) # a1 <- A+
13654 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13655 GET_VREG(a0, a1) # a0 <- fp[A]
13656 # check object for null
13657 beqz rOBJ, common_errNullObject # object was null
13658 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13659 GET_INST_OPCODE(t0) # extract opcode from rINST
13660 addu rOBJ, rOBJ, a3 # form address
13661 # noop # releasing store
13662 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
13664 GOTO_OPCODE(t0) # jump to next instruction
13667 /* continuation for OP_IPUT_SHORT */
13671 * a0 holds resolved field
13672 * rOBJ holds object
13674 .LOP_IPUT_SHORT_finish:
13675 #BAL(common_squeak0)
13676 GET_OPA4(a1) # a1 <- A+
13677 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
13678 GET_VREG(a0, a1) # a0 <- fp[A]
13679 # check object for null
13680 beqz rOBJ, common_errNullObject # object was null
13681 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13682 GET_INST_OPCODE(t0) # extract opcode from rINST
13683 addu rOBJ, rOBJ, a3 # form address
13684 # noop # releasing store
13685 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
13687 GOTO_OPCODE(t0) # jump to next instruction
13690 /* continuation for OP_SGET */
13693 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
13694 # no-op # acquiring load
13695 GET_OPA(a2) # a2 <- AA
13696 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13697 GET_INST_OPCODE(t0) # extract opcode from rINST
13698 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
13700 /* continuation for OP_SGET_WIDE */
13702 .LOP_SGET_WIDE_finish:
13703 GET_OPA(a1) # a1 <- AA
13705 vLOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
13707 LOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
13709 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13710 EAS2(a1, rFP, a1) # a1 <- &fp[AA]
13711 STORE64(a2, a3, a1) # vAA/vAA+1 <- a2/a3
13712 GET_INST_OPCODE(t0) # extract opcode from rINST
13713 GOTO_OPCODE(t0) # jump to next instruction
13717 /* continuation for OP_SGET_OBJECT */
13719 .LOP_SGET_OBJECT_finish:
13720 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
13721 # no-op # acquiring load
13722 GET_OPA(a2) # a2 <- AA
13723 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13724 GET_INST_OPCODE(t0) # extract opcode from rINST
13725 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
13727 /* continuation for OP_SGET_BOOLEAN */
13729 .LOP_SGET_BOOLEAN_finish:
13730 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
13731 # no-op # acquiring load
13732 GET_OPA(a2) # a2 <- AA
13733 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13734 GET_INST_OPCODE(t0) # extract opcode from rINST
13735 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
13737 /* continuation for OP_SGET_BYTE */
13739 .LOP_SGET_BYTE_finish:
13740 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
13741 # no-op # acquiring load
13742 GET_OPA(a2) # a2 <- AA
13743 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13744 GET_INST_OPCODE(t0) # extract opcode from rINST
13745 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
13747 /* continuation for OP_SGET_CHAR */
13749 .LOP_SGET_CHAR_finish:
13750 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
13751 # no-op # acquiring load
13752 GET_OPA(a2) # a2 <- AA
13753 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13754 GET_INST_OPCODE(t0) # extract opcode from rINST
13755 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
13757 /* continuation for OP_SGET_SHORT */
13759 .LOP_SGET_SHORT_finish:
13760 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
13761 # no-op # acquiring load
13762 GET_OPA(a2) # a2 <- AA
13763 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13764 GET_INST_OPCODE(t0) # extract opcode from rINST
13765 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
13767 /* continuation for OP_SPUT */
13771 GET_OPA(a2) # a2 <- AA
13772 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13773 GET_VREG(a1, a2) # a1 <- fp[AA]
13774 GET_INST_OPCODE(t0) # extract opcode from rINST
13775 # no-op # releasing store
13776 sw a1, offStaticField_value(a0) # field <- vAA
13778 GOTO_OPCODE(t0) # jump to next instruction
13780 /* continuation for OP_SPUT_WIDE */
13783 * Continuation if the field has not yet been resolved.
13784 * a1: BBBB field ref
13786 * rBIX: dvmDex->pResFields
13788 * Returns StaticField pointer in a2.
13790 .LOP_SPUT_WIDE_resolve:
13791 LOAD_rSELF_method(a2) # a2 <- current method
13792 #if defined(WITH_JIT)
13793 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
13795 EXPORT_PC() # resolve() could throw, so export now
13796 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
13797 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
13800 beqz v0, common_exceptionThrown # no, handle exception
13801 #if defined(WITH_JIT)
13803 * If the JIT is actively building a trace we need to make sure
13804 * that the field is fully resolved before including this instruction.
13806 JAL(common_verifyField)
13809 b .LOP_SPUT_WIDE_finish # resume
13811 /* continuation for OP_SPUT_OBJECT */
13812 .LOP_SPUT_OBJECT_finish: # field ptr in a0
13813 GET_OPA(a2) # a2 <- AA
13814 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13815 GET_VREG(a1, a2) # a1 <- fp[AA]
13816 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
13817 lw t1, offField_clazz(a0) # t1 <- field->clazz
13818 GET_INST_OPCODE(t0) # extract opcode from rINST
13819 # no-op # releasing store
13820 sw a1, offStaticField_value(a0) # field <- vAA
13823 srl t2, t1, GC_CARD_SHIFT
13827 GOTO_OPCODE(t0) # jump to next instruction
13829 /* continuation for OP_SPUT_BOOLEAN */
13831 .LOP_SPUT_BOOLEAN_finish:
13833 GET_OPA(a2) # a2 <- AA
13834 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13835 GET_VREG(a1, a2) # a1 <- fp[AA]
13836 GET_INST_OPCODE(t0) # extract opcode from rINST
13837 # no-op # releasing store
13838 sw a1, offStaticField_value(a0) # field <- vAA
13840 GOTO_OPCODE(t0) # jump to next instruction
13842 /* continuation for OP_SPUT_BYTE */
13844 .LOP_SPUT_BYTE_finish:
13846 GET_OPA(a2) # a2 <- AA
13847 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13848 GET_VREG(a1, a2) # a1 <- fp[AA]
13849 GET_INST_OPCODE(t0) # extract opcode from rINST
13850 # no-op # releasing store
13851 sw a1, offStaticField_value(a0) # field <- vAA
13853 GOTO_OPCODE(t0) # jump to next instruction
13855 /* continuation for OP_SPUT_CHAR */
13857 .LOP_SPUT_CHAR_finish:
13859 GET_OPA(a2) # a2 <- AA
13860 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13861 GET_VREG(a1, a2) # a1 <- fp[AA]
13862 GET_INST_OPCODE(t0) # extract opcode from rINST
13863 # no-op # releasing store
13864 sw a1, offStaticField_value(a0) # field <- vAA
13866 GOTO_OPCODE(t0) # jump to next instruction
13868 /* continuation for OP_SPUT_SHORT */
13870 .LOP_SPUT_SHORT_finish:
13872 GET_OPA(a2) # a2 <- AA
13873 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
13874 GET_VREG(a1, a2) # a1 <- fp[AA]
13875 GET_INST_OPCODE(t0) # extract opcode from rINST
13876 # no-op # releasing store
13877 sw a1, offStaticField_value(a0) # field <- vAA
13879 GOTO_OPCODE(t0) # jump to next instruction
13881 /* continuation for OP_INVOKE_VIRTUAL */
13885 * a0 = resolved base method
13886 * rBIX= C or CCCC (index of first arg, which is the "this" ptr)
13888 .LOP_INVOKE_VIRTUAL_continue:
13889 GET_VREG(rOBJ, rBIX) # rOBJ <- "this" ptr
13890 LOADu2_offMethod_methodIndex(a2, a0) # a2 <- baseMethod->methodIndex
13892 beqz rOBJ, common_errNullObject # null "this", throw exception
13893 LOAD_base_offObject_clazz(a3, rOBJ) # a3 <- thisPtr->clazz
13894 LOAD_base_offClassObject_vtable(a3, a3) # a3 <- thisPtr->clazz->vtable
13895 LOAD_eas2(a0, a3, a2) # a0 <- vtable[methodIndex]
13896 b common_invokeMethodNoRange # (a0=method, rOBJ="this")
13899 /* continuation for OP_INVOKE_SUPER */
13903 * a0 = resolved base method
13904 * rBIX = method->clazz
13906 .LOP_INVOKE_SUPER_continue:
13907 LOAD_base_offClassObject_super(a1, rBIX) # a1 <- method->clazz->super
13908 LOADu2_offMethod_methodIndex(a2, a0) # a2 <- baseMethod->methodIndex
13909 LOAD_base_offClassObject_vtableCount(a3, a1) # a3 <- super->vtableCount
13910 EXPORT_PC() # must export for invoke
13911 # compare (methodIndex, vtableCount)
13912 bgeu a2, a3, .LOP_INVOKE_SUPER_nsm # method not present in superclass
13913 LOAD_base_offClassObject_vtable(a1, a1) # a1 <- ...clazz->super->vtable
13914 LOAD_eas2(a0, a1, a2) # a0 <- vtable[methodIndex]
13915 b common_invokeMethodNoRange # continue on
13918 * Throw a NoSuchMethodError with the method name as the message.
13919 * a0 = resolved base method
13921 .LOP_INVOKE_SUPER_nsm:
13922 LOAD_base_offMethod_name(a1, a0) # a1 <- method name
13923 b common_errNoSuchMethod
13926 /* continuation for OP_INVOKE_STATIC */
13928 .LOP_INVOKE_STATIC_resolve:
13929 LOAD_rSELF_method(a3) # a3 <- self->method
13930 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
13931 li a2, METHOD_STATIC # resolver method type
13932 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
13934 #if defined(WITH_JIT)
13936 * Check to see if we're actively building a trace. If so,
13937 * we need to keep this instruction out of it.
13938 * rBIX: &resolved_methodToCall
13940 lhu a2, offThread_subMode(rSELF)
13941 beqz v0, common_exceptionThrown # null, handle exception
13942 and a2, kSubModeJitTraceBuild # trace under construction?
13943 beqz a2, common_invokeMethodNoRange # no, (a0=method, rOBJ="this")
13944 lw a1, 0(rBIX) # reload resolved method
13945 # finished resloving?
13946 bnez a1, common_invokeMethodNoRange # yes, (a0=method, rOBJ="this")
13947 move rBIX, a0 # preserve method
13950 JAL(dvmJitEndTraceSelect) # (self, pc)
13952 b common_invokeMethodNoRange # whew, finally!
13955 bnez v0, common_invokeMethodNoRange # (a0=method, rOBJ="this")
13956 b common_exceptionThrown # yes, handle exception
13959 /* continuation for OP_INVOKE_VIRTUAL_RANGE */
13963 * a0 = resolved base method
13964 * rBIX= C or CCCC (index of first arg, which is the "this" ptr)
13966 .LOP_INVOKE_VIRTUAL_RANGE_continue:
13967 GET_VREG(rOBJ, rBIX) # rOBJ <- "this" ptr
13968 LOADu2_offMethod_methodIndex(a2, a0) # a2 <- baseMethod->methodIndex
13970 beqz rOBJ, common_errNullObject # null "this", throw exception
13971 LOAD_base_offObject_clazz(a3, rOBJ) # a3 <- thisPtr->clazz
13972 LOAD_base_offClassObject_vtable(a3, a3) # a3 <- thisPtr->clazz->vtable
13973 LOAD_eas2(a0, a3, a2) # a0 <- vtable[methodIndex]
13974 b common_invokeMethodRange # (a0=method, rOBJ="this")
13977 /* continuation for OP_INVOKE_SUPER_RANGE */
13981 * a0 = resolved base method
13982 * rBIX = method->clazz
13984 .LOP_INVOKE_SUPER_RANGE_continue:
13985 LOAD_base_offClassObject_super(a1, rBIX) # a1 <- method->clazz->super
13986 LOADu2_offMethod_methodIndex(a2, a0) # a2 <- baseMethod->methodIndex
13987 LOAD_base_offClassObject_vtableCount(a3, a1) # a3 <- super->vtableCount
13988 EXPORT_PC() # must export for invoke
13989 # compare (methodIndex, vtableCount)
13990 bgeu a2, a3, .LOP_INVOKE_SUPER_RANGE_nsm # method not present in superclass
13991 LOAD_base_offClassObject_vtable(a1, a1) # a1 <- ...clazz->super->vtable
13992 LOAD_eas2(a0, a1, a2) # a0 <- vtable[methodIndex]
13993 b common_invokeMethodRange # continue on
13996 * Throw a NoSuchMethodError with the method name as the message.
13997 * a0 = resolved base method
13999 .LOP_INVOKE_SUPER_RANGE_nsm:
14000 LOAD_base_offMethod_name(a1, a0) # a1 <- method name
14001 b common_errNoSuchMethod
14004 /* continuation for OP_INVOKE_STATIC_RANGE */
14006 .LOP_INVOKE_STATIC_RANGE_resolve:
14007 LOAD_rSELF_method(a3) # a3 <- self->method
14008 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
14009 li a2, METHOD_STATIC # resolver method type
14010 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
14012 #if defined(WITH_JIT)
14014 * Check to see if we're actively building a trace. If so,
14015 * we need to keep this instruction out of it.
14016 * rBIX: &resolved_methodToCall
14018 lhu a2, offThread_subMode(rSELF)
14019 beqz v0, common_exceptionThrown # null, handle exception
14020 and a2, kSubModeJitTraceBuild # trace under construction?
14021 beqz a2, common_invokeMethodRange # no, (a0=method, rOBJ="this")
14022 lw a1, 0(rBIX) # reload resolved method
14023 # finished resloving?
14024 bnez a1, common_invokeMethodRange # yes, (a0=method, rOBJ="this")
14025 move rBIX, a0 # preserve method
14028 JAL(dvmJitEndTraceSelect) # (self, pc)
14030 b common_invokeMethodRange # whew, finally!
14033 bnez v0, common_invokeMethodRange # (a0=method, rOBJ="this")
14034 b common_exceptionThrown # yes, handle exception
14037 /* continuation for OP_FLOAT_TO_INT */
14040 * Not an entry point as it is used only once !!
14044 li a1, 0x4f000000 # (float)maxint
14046 JAL(__gesf2) # is arg >= maxint?
14048 li v0, ~0x80000000 # return maxint (7fffffff)
14049 bgez t0, .LOP_FLOAT_TO_INT_set_vreg
14051 move a0, rBIX # recover arg
14052 li a1, 0xcf000000 # (float)minint
14056 li v0, 0x80000000 # return minint (80000000)
14057 blez t0, .LOP_FLOAT_TO_INT_set_vreg
14063 li v0, 0 # return zero for NaN
14064 bnez t0, .LOP_FLOAT_TO_INT_set_vreg
14068 b .LOP_FLOAT_TO_INT_set_vreg
14070 l.s fa1, .LFLOAT_TO_INT_max
14071 c.ole.s fcc0, fa1, fa0
14072 l.s fv0, .LFLOAT_TO_INT_ret_max
14073 bc1t .LOP_FLOAT_TO_INT_set_vreg_f
14075 l.s fa1, .LFLOAT_TO_INT_min
14076 c.ole.s fcc0, fa0, fa1
14077 l.s fv0, .LFLOAT_TO_INT_ret_min
14078 bc1t .LOP_FLOAT_TO_INT_set_vreg_f
14081 c.un.s fcc0, fa0, fa1
14083 bc1t .LOP_FLOAT_TO_INT_set_vreg_f
14086 b .LOP_FLOAT_TO_INT_set_vreg_f
14089 .LFLOAT_TO_INT_max:
14091 .LFLOAT_TO_INT_min:
14093 .LFLOAT_TO_INT_ret_max:
14095 .LFLOAT_TO_INT_ret_min:
14099 /* continuation for OP_FLOAT_TO_LONG */
14109 li rRESULT1, ~0x80000000
14110 bgez t0, .LOP_FLOAT_TO_LONG_set_vreg
14118 li rRESULT1, 0x80000000
14119 blez t0, .LOP_FLOAT_TO_LONG_set_vreg
14128 bnez t0, .LOP_FLOAT_TO_LONG_set_vreg
14134 l.s fa1, .LLONG_TO_max
14135 c.ole.s fcc0, fa1, fa0
14137 li rRESULT1, ~0x80000000
14138 bc1t .LOP_FLOAT_TO_LONG_set_vreg
14140 l.s fa1, .LLONG_TO_min
14141 c.ole.s fcc0, fa0, fa1
14143 li rRESULT1, 0x80000000
14144 bc1t .LOP_FLOAT_TO_LONG_set_vreg
14147 c.un.s fcc0, fa0, fa1
14150 bc1t .LOP_FLOAT_TO_LONG_set_vreg
14155 b .LOP_FLOAT_TO_LONG_set_vreg
14163 /* continuation for OP_DOUBLE_TO_INT */
14168 la t0, .LDOUBLE_TO_INT_max
14169 LOAD64(rARG2, rARG3, t0)
14170 move rBIX, rARG0 # save a0
14171 move rTEMP, rARG1 # and a1
14172 JAL(__gedf2) # is arg >= maxint?
14175 li v0, ~0x80000000 # return maxint (7fffffff)
14176 bgez t0, .LOP_DOUBLE_TO_INT_set_vreg # nonzero == yes
14178 move rARG0, rBIX # recover arg
14180 la t0, .LDOUBLE_TO_INT_min
14181 LOAD64(rARG2, rARG3, t0)
14182 JAL(__ledf2) # is arg <= minint?
14185 li v0, 0x80000000 # return minint (80000000)
14186 blez t0, .LOP_DOUBLE_TO_INT_set_vreg # nonzero == yes
14188 move rARG0, rBIX # recover arg
14190 move rARG2, rBIX # compare against self
14192 JAL(__nedf2) # is arg == self?
14194 move t0, v0 # zero == no
14196 bnez t0, .LOP_DOUBLE_TO_INT_set_vreg # return zero for NaN
14198 move rARG0, rBIX # recover arg
14200 JAL(__fixdfsi) # convert double to int
14201 b .LOP_DOUBLE_TO_INT_set_vreg
14203 la t0, .LDOUBLE_TO_INT_max
14204 LOAD64_F(fa1, fa1f, t0)
14205 c.ole.d fcc0, fa1, fa0
14206 l.s fv0, .LDOUBLE_TO_INT_maxret
14207 bc1t .LOP_DOUBLE_TO_INT_set_vreg_f
14209 la t0, .LDOUBLE_TO_INT_min
14210 LOAD64_F(fa1, fa1f, t0)
14211 c.ole.d fcc0, fa0, fa1
14212 l.s fv0, .LDOUBLE_TO_INT_minret
14213 bc1t .LOP_DOUBLE_TO_INT_set_vreg_f
14216 c.un.d fcc0, fa0, fa1
14218 bc1t .LOP_DOUBLE_TO_INT_set_vreg_f
14221 b .LOP_DOUBLE_TO_INT_set_vreg_f
14225 .LDOUBLE_TO_INT_max:
14226 .dword 0x41dfffffffc00000
14227 .LDOUBLE_TO_INT_min:
14228 .dword 0xc1e0000000000000 # minint, as a double (high word)
14229 .LDOUBLE_TO_INT_maxret:
14231 .LDOUBLE_TO_INT_minret:
14234 /* continuation for OP_DOUBLE_TO_LONG */
14238 la t0, .LDOUBLE_TO_LONG_max
14239 LOAD64(rARG2, rARG3, t0)
14240 move rBIX, rARG0 # save a0
14241 move rTEMP, rARG1 # and a1
14245 la t0, .LDOUBLE_TO_LONG_ret_max
14246 LOAD64(rRESULT0, rRESULT1, t0)
14247 bgez t1, .LOP_DOUBLE_TO_LONG_set_vreg
14251 la t0, .LDOUBLE_TO_LONG_min
14252 LOAD64(rARG2, rARG3, t0)
14256 la t0, .LDOUBLE_TO_LONG_ret_min
14257 LOAD64(rRESULT0, rRESULT1, t0)
14258 blez t1, .LOP_DOUBLE_TO_LONG_set_vreg
14269 bnez t0, .LOP_DOUBLE_TO_LONG_set_vreg
14276 la t0, .LDOUBLE_TO_LONG_max
14277 LOAD64_F(fa1, fa1f, t0)
14278 c.ole.d fcc0, fa1, fa0
14279 la t0, .LDOUBLE_TO_LONG_ret_max
14280 LOAD64(rRESULT0, rRESULT1, t0)
14281 bc1t .LOP_DOUBLE_TO_LONG_set_vreg
14283 la t0, .LDOUBLE_TO_LONG_min
14284 LOAD64_F(fa1, fa1f, t0)
14285 c.ole.d fcc0, fa0, fa1
14286 la t0, .LDOUBLE_TO_LONG_ret_min
14287 LOAD64(rRESULT0, rRESULT1, t0)
14288 bc1t .LOP_DOUBLE_TO_LONG_set_vreg
14291 c.un.d fcc0, fa0, fa1
14294 bc1t .LOP_DOUBLE_TO_LONG_set_vreg
14297 b .LOP_DOUBLE_TO_LONG_set_vreg
14300 .LDOUBLE_TO_LONG_max:
14301 .dword 0x43e0000000000000 # maxlong, as a double (high word)
14302 .LDOUBLE_TO_LONG_min:
14303 .dword 0xc3e0000000000000 # minlong, as a double (high word)
14304 .LDOUBLE_TO_LONG_ret_max:
14305 .dword 0x7fffffffffffffff
14306 .LDOUBLE_TO_LONG_ret_min:
14307 .dword 0x8000000000000000
14309 /* continuation for OP_MUL_LONG */
14311 .LOP_MUL_LONG_finish:
14312 GET_INST_OPCODE(t0) # extract opcode from rINST
14313 STORE64(v0, v1, a0) # vAA::vAA+1 <- v0(low) :: v1(high)
14314 GOTO_OPCODE(t0) # jump to next instruction
14317 /* continuation for OP_IGET_VOLATILE */
14321 * v0 holds resolved field
14322 * rOBJ holds object (caller saved)
14324 .LOP_IGET_VOLATILE_finish:
14325 #BAL(common_squeak0)
14326 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
14327 # check object for null
14328 beqz rOBJ, common_errNullObject # object was null
14329 addu a3, a3, rOBJ # form address
14330 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
14331 SMP_DMB # acquiring load
14332 GET_OPA4(a2) # a2 <- A+
14333 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14334 GET_INST_OPCODE(t0) # extract opcode from rINST
14335 SET_VREG(a0, a2) # fp[A] <- a0
14336 GOTO_OPCODE(t0) # jump to next instruction
14339 /* continuation for OP_IPUT_VOLATILE */
14343 * a0 holds resolved field
14344 * rOBJ holds object
14346 .LOP_IPUT_VOLATILE_finish:
14347 #BAL(common_squeak0)
14348 GET_OPA4(a1) # a1 <- A+
14349 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
14350 GET_VREG(a0, a1) # a0 <- fp[A]
14351 # check object for null
14352 beqz rOBJ, common_errNullObject # object was null
14353 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14354 GET_INST_OPCODE(t0) # extract opcode from rINST
14355 addu rOBJ, rOBJ, a3 # form address
14356 SMP_DMB_ST # releasing store
14357 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
14359 GOTO_OPCODE(t0) # jump to next instruction
14362 /* continuation for OP_SGET_VOLATILE */
14364 .LOP_SGET_VOLATILE_finish:
14365 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
14366 SMP_DMB # acquiring load
14367 GET_OPA(a2) # a2 <- AA
14368 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14369 GET_INST_OPCODE(t0) # extract opcode from rINST
14370 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
14372 /* continuation for OP_SPUT_VOLATILE */
14374 .LOP_SPUT_VOLATILE_finish:
14376 GET_OPA(a2) # a2 <- AA
14377 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14378 GET_VREG(a1, a2) # a1 <- fp[AA]
14379 GET_INST_OPCODE(t0) # extract opcode from rINST
14380 SMP_DMB_ST # releasing store
14381 sw a1, offStaticField_value(a0) # field <- vAA
14383 GOTO_OPCODE(t0) # jump to next instruction
14385 /* continuation for OP_IGET_OBJECT_VOLATILE */
14389 * v0 holds resolved field
14390 * rOBJ holds object (caller saved)
14392 .LOP_IGET_OBJECT_VOLATILE_finish:
14393 #BAL(common_squeak0)
14394 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
14395 # check object for null
14396 beqz rOBJ, common_errNullObject # object was null
14397 addu a3, a3, rOBJ # form address
14398 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
14399 SMP_DMB # acquiring load
14400 GET_OPA4(a2) # a2 <- A+
14401 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14402 GET_INST_OPCODE(t0) # extract opcode from rINST
14403 SET_VREG(a0, a2) # fp[A] <- a0
14404 GOTO_OPCODE(t0) # jump to next instruction
14407 /* continuation for OP_IGET_WIDE_VOLATILE */
14411 * a0 holds resolved field
14412 * rOBJ holds object
14414 .LOP_IGET_WIDE_VOLATILE_finish:
14415 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
14416 beqz rOBJ, common_errNullObject # object was null
14417 GET_OPA4(a2) # a2 <- A+
14418 addu rOBJ, rOBJ, a3 # form address
14420 vLOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
14422 LOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
14424 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14425 EAS2(a3, rFP, a2) # a3 <- &fp[A]
14426 GET_INST_OPCODE(t0) # extract opcode from rINST
14427 STORE64(a0, a1, a3) # fp[A] <- a0/a1
14428 GOTO_OPCODE(t0) # jump to next instruction
14431 /* continuation for OP_IPUT_WIDE_VOLATILE */
14435 * a0 holds resolved field
14436 * rOBJ holds object
14438 .LOP_IPUT_WIDE_VOLATILE_finish:
14439 GET_OPA4(a2) # a2 <- A+
14440 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
14441 EAS2(a2, rFP, a2) # a2 <- &fp[A]
14442 # check object for null
14443 beqz rOBJ, common_errNullObject # object was null
14444 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14445 LOAD64(a0, a1, a2) # a0/a1 <- fp[A]
14446 GET_INST_OPCODE(rBIX) # extract opcode from rINST
14447 addu a2, rOBJ, a3 # form address
14449 JAL(dvmQuasiAtomicSwap64Sync) # stores r0/r1 into addr r2
14450 # STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
14452 STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
14454 GOTO_OPCODE(rBIX) # jump to next instruction
14457 /* continuation for OP_SGET_WIDE_VOLATILE */
14459 .LOP_SGET_WIDE_VOLATILE_finish:
14460 GET_OPA(a1) # a1 <- AA
14462 vLOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
14464 LOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
14466 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14467 EAS2(a1, rFP, a1) # a1 <- &fp[AA]
14468 STORE64(a2, a3, a1) # vAA/vAA+1 <- a2/a3
14469 GET_INST_OPCODE(t0) # extract opcode from rINST
14470 GOTO_OPCODE(t0) # jump to next instruction
14474 /* continuation for OP_SPUT_WIDE_VOLATILE */
14477 * Continuation if the field has not yet been resolved.
14478 * a1: BBBB field ref
14480 * rBIX: dvmDex->pResFields
14482 * Returns StaticField pointer in a2.
14484 .LOP_SPUT_WIDE_VOLATILE_resolve:
14485 LOAD_rSELF_method(a2) # a2 <- current method
14486 #if defined(WITH_JIT)
14487 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
14489 EXPORT_PC() # resolve() could throw, so export now
14490 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
14491 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
14494 beqz v0, common_exceptionThrown # no, handle exception
14495 #if defined(WITH_JIT)
14497 * If the JIT is actively building a trace we need to make sure
14498 * that the field is fully resolved before including this instruction.
14500 JAL(common_verifyField)
14503 b .LOP_SPUT_WIDE_VOLATILE_finish # resume
14505 /* continuation for OP_EXECUTE_INLINE */
14508 * Extract args, call function.
14509 * a0 = #of args (0-4)
14510 * rBIX = call index
14513 * - Use a jump table from the main piece to jump directly into the
14514 * AND/LW pairs. Costs a data load, saves a branch.
14515 * - Have five separate pieces that do the loading, so we can work the
14516 * interleave a little better. Increases code size.
14518 .LOP_EXECUTE_INLINE_continue:
14519 FETCH(rINST, 2) # rINST <- FEDC
14525 JAL(common_abort) # too many arguments
14528 and t0, rINST, 0xf000 # isolate F
14529 ESRN(t1, rFP, t0, 10)
14530 lw a3, 0(t1) # a3 <- vF (shift right 12, left 2)
14532 and t0, rINST, 0x0f00 # isolate E
14533 ESRN(t1, rFP, t0, 6)
14534 lw a2, 0(t1) # a2 <- vE
14536 and t0, rINST, 0x00f0 # isolate D
14537 ESRN(t1, rFP, t0, 2)
14538 lw a1, 0(t1) # a1 <- vD
14540 and t0, rINST, 0x000f # isolate C
14541 EASN(t1, rFP, t0, 2)
14542 lw a0, 0(t1) # a0 <- vC
14544 la rINST, gDvmInlineOpsTable # table of InlineOperation
14545 EAS4(t1, rINST, rBIX) # t1 <- rINST + rBIX<<4
14547 jr t9 # sizeof=16, "func" is first entry
14551 * We're debugging or profiling.
14554 .LOP_EXECUTE_INLINE_debugmode:
14556 JAL(dvmResolveInlineNative)
14557 beqz v0, .LOP_EXECUTE_INLINE_resume # did it resolve? no, just move on
14558 move rOBJ, v0 # remember method
14561 JAL(dvmFastMethodTraceEnter) # (method, self)
14562 addu a1, rSELF, offThread_retval # a1<- &self->retval
14563 GET_OPB(a0) # a0 <- B
14564 # Stack should have 16/20 available
14565 sw a1, 16(sp) # push &self->retval
14566 BAL(.LOP_EXECUTE_INLINE_continue) # make call; will return after
14567 lw gp, STACK_OFFSET_GP(sp) # restore gp
14568 move rINST, v0 # save result of inline
14569 move a0, rOBJ # a0<- method
14570 move a1, rSELF # a1<- self
14571 JAL(dvmFastMethodTraceExit) # (method, self)
14572 beqz v0, common_exceptionThrown # returned false, handle exception
14573 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
14574 GET_INST_OPCODE(t0) # extract opcode from rINST
14575 GOTO_OPCODE(t0) # jump to next instruction
14577 /* continuation for OP_EXECUTE_INLINE_RANGE */
14580 * Extract args, call function.
14581 * a0 = #of args (0-4)
14582 * rBIX = call index
14583 * ra = return addr, above [DO NOT JAL out of here w/o preserving ra]
14585 .LOP_EXECUTE_INLINE_RANGE_continue:
14586 FETCH(rOBJ, 2) # rOBJ <- CCCC
14592 JAL(common_abort) # too many arguments
14606 la rOBJ, gDvmInlineOpsTable # table of InlineOperation
14607 EAS4(t1, rOBJ, rBIX) # t1 <- rINST + rBIX<<4
14609 jr t9 # sizeof=16, "func" is first entry
14613 * We're debugging or profiling.
14616 .LOP_EXECUTE_INLINE_RANGE_debugmode:
14618 JAL(dvmResolveInlineNative)
14619 beqz v0, .LOP_EXECUTE_INLINE_RANGE_resume # did it resolve? no, just move on
14620 move rOBJ, v0 # remember method
14623 JAL(dvmFastMethodTraceEnter) # (method, self)
14624 addu a1, rSELF, offThread_retval # a1<- &self->retval
14625 GET_OPA(a0) # a0 <- A
14626 # Stack should have 16/20 available
14627 sw a1, 16(sp) # push &self->retval
14628 move rINST, rOBJ # rINST<- method
14629 BAL(.LOP_EXECUTE_INLINE_RANGE_continue) # make call; will return after
14630 lw gp, STACK_OFFSET_GP(sp) # restore gp
14631 move rOBJ, v0 # save result of inline
14632 move a0, rINST # a0<- method
14633 move a1, rSELF # a1<- self
14634 JAL(dvmFastNativeMethodTraceExit) # (method, self)
14635 beqz rOBJ, common_exceptionThrown # returned false, handle exception
14636 FETCH_ADVANCE_INST(3) # advance rPC, load rINST
14637 GET_INST_OPCODE(t0) # extract opcode from rINST
14638 GOTO_OPCODE(t0) # jump to next instruction
14640 /* continuation for OP_INVOKE_OBJECT_INIT_RANGE */
14642 * A debugger is attached, so we need to go ahead and do
14643 * this. For simplicity, we'll just jump directly to the
14644 * corresponding handler. Note that we can't use
14645 * rIBASE here because it may be in single-step mode.
14646 * Load the primary table base directly.
14648 .LOP_INVOKE_OBJECT_INIT_RANGE_debugger:
14649 lw a1, offThread_mainHandlerTable(rSELF)
14651 li t0, OP_INVOKE_DIRECT_JUMBO
14653 li t0, OP_INVOKE_DIRECT_RANGE
14655 GOTO_OPCODE_BASE(a1, t0) # execute it
14657 /* continuation for OP_IPUT_OBJECT_VOLATILE */
14661 * a0 holds resolved field
14662 * rOBJ holds object
14664 .LOP_IPUT_OBJECT_VOLATILE_finish:
14665 #BAL(common_squeak0)
14666 GET_OPA4(a1) # a1 <- A+
14667 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
14668 GET_VREG(a0, a1) # a0 <- fp[A]
14669 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
14670 # check object for null
14671 beqz rOBJ, common_errNullObject # object was null
14672 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14673 GET_INST_OPCODE(t0) # extract opcode from rINST
14674 addu t2, rOBJ, a3 # form address
14675 SMP_DMB_ST # releasing store
14676 sw a0, (t2) # obj.field (32 bits) <- a0
14678 beqz a0, 1f # stored a null reference?
14679 srl t1, rOBJ, GC_CARD_SHIFT
14681 sb a2, (t2) # mark card if not
14683 GOTO_OPCODE(t0) # jump to next instruction
14686 /* continuation for OP_SGET_OBJECT_VOLATILE */
14688 .LOP_SGET_OBJECT_VOLATILE_finish:
14689 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
14690 SMP_DMB # acquiring load
14691 GET_OPA(a2) # a2 <- AA
14692 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14693 GET_INST_OPCODE(t0) # extract opcode from rINST
14694 SET_VREG_GOTO(a1, a2, t0) # fp[AA] <- a1
14696 /* continuation for OP_SPUT_OBJECT_VOLATILE */
14697 .LOP_SPUT_OBJECT_VOLATILE_finish: # field ptr in a0
14698 GET_OPA(a2) # a2 <- AA
14699 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14700 GET_VREG(a1, a2) # a1 <- fp[AA]
14701 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
14702 lw t1, offField_clazz(a0) # t1 <- field->clazz
14703 GET_INST_OPCODE(t0) # extract opcode from rINST
14704 SMP_DMB_ST # releasing store
14705 sw a1, offStaticField_value(a0) # field <- vAA
14708 srl t2, t1, GC_CARD_SHIFT
14712 GOTO_OPCODE(t0) # jump to next instruction
14714 /* continuation for OP_CHECK_CAST_JUMBO */
14717 .LOP_CHECK_CAST_JUMBO_castfailure:
14718 # A cast has failed. We need to throw a ClassCastException with the
14719 # class of the object that failed to be cast.
14720 EXPORT_PC() # about to throw
14721 LOAD_base_offObject_clazz(a0, rOBJ) # a0<- obj->clazz
14722 move a1,rBIX # r1<- desired class
14723 JAL(dvmThrowClassCastException)
14724 b common_exceptionThrown
14727 * Advance PC and get next opcode
14730 .LOP_CHECK_CAST_JUMBO_okay:
14731 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
14732 GET_INST_OPCODE(t0) # extract opcode from rINST
14733 GOTO_OPCODE(t0) # jump to next instruction
14735 * Resolution required. This is the least-likely path.
14737 * a2 holds AAAAAAAA
14738 * rOBJ holds object
14740 .LOP_CHECK_CAST_JUMBO_resolve:
14741 EXPORT_PC() # resolve() could throw
14742 LOAD_rSELF_method(a3) # a3<- self->method
14743 move a1, a2 # a1<- AAAAAAAA
14744 li a2, 0 # a2<- false
14745 LOAD_base_offMethod_clazz(a0, a3) # a0<- method->clazz
14746 JAL(dvmResolveClass) # v0<- resolved ClassObject ptr
14748 beqz v0, common_exceptionThrown # yes, handle exception
14749 move a1, v0 # a1<- class resolved from AAAAAAAA
14750 LOAD_base_offObject_clazz(a0, rOBJ) # a0<- obj->clazz
14751 b .LOP_CHECK_CAST_JUMBO_resolved # pick up where we left off
14755 /* continuation for OP_INSTANCE_OF_JUMBO */
14758 * Class resolved, determine type of check necessary. This is common.
14759 * r0 holds obj->clazz
14760 * r1 holds class resolved from AAAAAAAA
14764 .LOP_INSTANCE_OF_JUMBO_resolved: # a0=obj->clazz, a1=resolved class
14765 # same class (trivial success)?
14766 beq a0, a1, .LOP_INSTANCE_OF_JUMBO_trivial # yes, trivial finish
14767 # fall through to OP_INSTANCE_OF_JUMBO_fullcheck
14770 * Trivial test failed, need to perform full check. This is common.
14771 * a0 holds obj->clazz
14772 * a1 holds class resolved from AAAAAAAA
14775 .LOP_INSTANCE_OF_JUMBO_fullcheck:
14776 JAL(dvmInstanceofNonTrivial) # v0 <- boolean result
14778 b .LOP_INSTANCE_OF_JUMBO_store # go to OP_INSTANCE_OF_JUMBO_store
14780 .LOP_INSTANCE_OF_JUMBO_trivial:
14781 li a0, 1 # indicate success
14784 * a0 holds boolean result
14787 .LOP_INSTANCE_OF_JUMBO_store:
14788 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
14789 SET_VREG(a0, rOBJ) # vBBBB <- a0
14790 GET_INST_OPCODE(t0) # extract opcode from rINST
14791 GOTO_OPCODE(t0) # jump to next instruction
14794 * Resolution required. This is the least-likely path.
14796 * a3 holds AAAAAAAA
14799 .LOP_INSTANCE_OF_JUMBO_resolve:
14800 EXPORT_PC() # resolve() could throw
14801 LOAD_rSELF_method(a0) # a0 <- self->method
14802 move a1, a3 # a1 <- AAAAAAAA
14803 li a2, 1 # a2 <- true
14804 LOAD_base_offMethod_clazz(a0, a0) # a0 <- method->clazz
14805 JAL(dvmResolveClass) # v0 <- resolved ClassObject ptr
14807 move a1, v0 # a1 <- class resolved from BBB
14808 beqz v0, common_exceptionThrown # yes, handle exception
14809 FETCH(ra, 4) # a3<- vCCCC
14810 move a1, a0 # a1<- class resolved from AAAAAAAA
14812 GET_VREG(a0, a3) # a0 <- vCCCC (object)
14813 LOAD_base_offObject_clazz(a0, a0) # a0 <- obj->clazz
14814 b .LOP_INSTANCE_OF_JUMBO_resolved # pick up where we left off
14817 /* continuation for OP_NEW_INSTANCE_JUMBO */
14819 .LOP_NEW_INSTANCE_JUMBO_continue:
14820 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
14821 GET_INST_OPCODE(t0) # extract opcode from rINST
14822 SET_VREG(v0, a3) # vBBBB <- v0
14823 GOTO_OPCODE(t0) # jump to next instruction
14825 #if defined(WITH_JIT)
14827 * Check to see if we need to stop the trace building early.
14831 .LOP_NEW_INSTANCE_JUMBO_jitCheck:
14832 lw a1, 0(rBIX) # reload resolved class
14834 bnez a1, .LOP_NEW_INSTANCE_JUMBO_continue # yes, finish
14835 move rOBJ, v0 # preserve new object
14836 move rBIX, a3 # preserve vAA
14839 JAL(dvmJitEndTraceSelect) # (self, pc)
14840 FETCH_ADVANCE_INST(2) # advance rPC, load rINST
14841 GET_INST_OPCODE(t0) # extract opcode from rINST
14842 SET_VREG(rOBJ, rBIX) # vAA <- new object
14843 GOTO_OPCODE(t0) # jump to next instruction
14847 * Class initialization required.
14849 * a0 holds class object
14851 .LOP_NEW_INSTANCE_JUMBO_needinit:
14852 JAL(dvmInitClass) # initialize class
14853 move a0, rOBJ # restore a0
14854 # check boolean result
14855 bnez v0, .LOP_NEW_INSTANCE_JUMBO_initialized # success, continue
14856 b common_exceptionThrown # failed, deal with init exception
14860 * Resolution required. This is the least-likely path.
14862 * a1 holds AAAAAAAA
14864 .LOP_NEW_INSTANCE_JUMBO_resolve:
14865 LOAD_rSELF_method(a3) # a3 <- self->method
14866 li a2, 0 # a2 <- false
14867 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
14868 JAL(dvmResolveClass) # v0 <- resolved ClassObject ptr
14871 bnez v0, .LOP_NEW_INSTANCE_JUMBO_resolved # no, continue
14872 b common_exceptionThrown # yes, handle exception
14874 /* continuation for OP_NEW_ARRAY_JUMBO */
14877 * Finish allocation.
14880 * a1 holds array length
14882 .LOP_NEW_ARRAY_JUMBO_finish:
14883 li a2, ALLOC_DONT_TRACK # don't track in local refs table
14884 JAL(dvmAllocArrayByClass) # v0 <- call(clazz, length, flags)
14885 FETCH(a2, 3) # r2<- vBBBB
14887 beqz v0, common_exceptionThrown # yes, handle the exception
14888 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
14889 GET_INST_OPCODE(t0) # extract opcode from rINST
14890 SET_VREG(v0, a2) # vBBBB <- v0
14891 GOTO_OPCODE(t0) # jump to next instruction
14897 * Resolve class. (This is an uncommon case.)
14899 * a1 holds array length
14900 * a2 holds class ref AAAAAAAA
14902 .LOP_NEW_ARRAY_JUMBO_resolve:
14903 LOAD_rSELF_method(a3) # a3 <- self->method
14904 move rOBJ, a1 # rOBJ <- length (save)
14905 move a1, a2 # a1 <- AAAAAAAA
14906 li a2, 0 # a2 <- false
14907 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
14908 JAL(dvmResolveClass) # v0 <- call(clazz, ref)
14909 move a1, rOBJ # a1 <- length (restore)
14911 beqz v0, common_exceptionThrown # yes, handle exception
14913 b .LOP_NEW_ARRAY_JUMBO_finish # continue with to OP_NEW_ARRAY_JUMBO_finish
14917 /* continuation for OP_FILLED_NEW_ARRAY_JUMBO */
14921 * a0 holds array class
14922 * rOBJ holds AA or BA
14924 .LOP_FILLED_NEW_ARRAY_JUMBO_continue:
14925 LOAD_base_offClassObject_descriptor(a3, a0) # a3 <- arrayClass->descriptor
14926 li a2, ALLOC_DONT_TRACK # a2 <- alloc flags
14927 lbu rINST, 1(a3) # rINST <- descriptor[1]
14928 FETCH(a1, 3) # a1<- BBBB (length)
14929 seq t0, rINST, 'I' # array of ints?
14930 seq t1, rINST, 'L' # array of objects?
14932 seq t1, rINST, '[' # array of arrays?
14934 move rBIX, a1 # save length in rBIX
14935 beqz t0, .LOP_FILLED_NEW_ARRAY_JUMBO_notimpl # no, not handled yet
14936 JAL(dvmAllocArrayByClass) # v0 <- call(arClass, length, flags)
14938 beqz v0, common_exceptionThrown # alloc failed, handle exception
14940 FETCH(a1, 4) # a1 CCCC
14941 sw v0, offThread_retval(rSELF) # retval.l <- new array
14942 sw rINST, (offThread_retval+4)(rSELF) # retval.h <- type
14943 addu a0, v0, offArrayObject_contents # a0 <- newArray->contents
14944 subu rBIX, rBIX, 1 # length--, check for neg
14945 FETCH_ADVANCE_INST(5) # advance to next instr, load rINST
14946 bltz rBIX, 2f # was zero, bail
14948 # copy values from registers into the array
14949 # a0=array, a1=CCCC, t0=BBBB(length)
14951 EAS2(a2, rFP, a1) # a2 <- &fp[CCCC]
14953 lw a3, 0(a2) # a3 <- *a2++
14955 subu t0, t0, 1 # count--
14956 sw a3, (a0) # *contents++ = vX
14961 lw a0, offThread_retval(rSELF) # a0 <- object
14962 lw a1, (offThread_retval+4)(rSELF) # a1 <- type
14963 seq t1, a1, 'I' # Is int array?
14965 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
14966 srl t3, a0, GC_CARD_SHIFT
14970 GET_INST_OPCODE(t0) # ip <- opcode from rINST
14971 GOTO_OPCODE(t0) # execute it
14975 * Throw an exception indicating that we have not implemented this
14976 * mode of filled-new-array.
14978 .LOP_FILLED_NEW_ARRAY_JUMBO_notimpl:
14979 la a0, .LstrFilledNewArrayNotImpl
14980 JAL(dvmThrowInternalError)
14981 b common_exceptionThrown
14983 /* continuation for OP_IGET_JUMBO */
14985 .LOP_IGET_JUMBO_resolved:
14988 beqz a0,common_exceptionThrown
14991 * v0 holds resolved field
14992 * rOBJ holds object (caller saved)
14994 .LOP_IGET_JUMBO_finish:
14995 #BAL(common_squeak0)
14996 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
14997 # check object for null
14998 beqz rOBJ, common_errNullObject # object was null
14999 addu a3, a3, rOBJ # form address
15000 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15001 # noop # acquiring load
15002 FETCH(a2, 3) # a2<- BBBB
15003 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15004 SET_VREG(a0, a2) # fp[BBBB]<- a0
15005 GET_INST_OPCODE(t0) # extract opcode from rINST
15006 GOTO_OPCODE(t0) # jump to next instruction
15009 /* continuation for OP_IGET_WIDE_JUMBO */
15011 .LOP_IGET_WIDE_JUMBO_resolved:
15014 bnez v0, .LOP_IGET_WIDE_JUMBO_finish
15015 b common_exceptionThrown
15019 * a0 holds resolved field
15020 * rOBJ holds object
15022 .LOP_IGET_WIDE_JUMBO_finish:
15023 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15024 beqz rOBJ, common_errNullObject # object was null
15025 GET_OPA4(a2) # a2 <- A+
15026 addu rOBJ, rOBJ, a3 # form address
15028 vLOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
15030 LOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
15032 FETCH(a2, 3) # r2<- BBBB
15033 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15034 EAS2(a3, rFP, a2) # a3 <- &fp[BBBB]
15035 GET_INST_OPCODE(t0) # extract opcode from rINST
15036 STORE64(a0, a1, a3) # fp[BBBB] <- a0/a1
15037 GOTO_OPCODE(t0) # jump to next instruction
15040 /* continuation for OP_IGET_OBJECT_JUMBO */
15042 .LOP_IGET_OBJECT_JUMBO_resolved:
15045 beqz a0,common_exceptionThrown
15048 * v0 holds resolved field
15049 * rOBJ holds object (caller saved)
15051 .LOP_IGET_OBJECT_JUMBO_finish:
15052 #BAL(common_squeak0)
15053 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15054 # check object for null
15055 beqz rOBJ, common_errNullObject # object was null
15056 addu a3, a3, rOBJ # form address
15057 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15058 # noop # acquiring load
15059 FETCH(a2, 3) # a2<- BBBB
15060 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15061 SET_VREG(a0, a2) # fp[BBBB]<- a0
15062 GET_INST_OPCODE(t0) # extract opcode from rINST
15063 GOTO_OPCODE(t0) # jump to next instruction
15066 /* continuation for OP_IGET_BOOLEAN_JUMBO */
15068 .LOP_IGET_BOOLEAN_JUMBO_resolved:
15071 beqz a0,common_exceptionThrown
15074 * v0 holds resolved field
15075 * rOBJ holds object (caller saved)
15077 .LOP_IGET_BOOLEAN_JUMBO_finish:
15078 #BAL(common_squeak0)
15079 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15080 # check object for null
15081 beqz rOBJ, common_errNullObject # object was null
15082 addu a3, a3, rOBJ # form address
15083 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15084 # noop # acquiring load
15085 FETCH(a2, 3) # a2<- BBBB
15086 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15087 SET_VREG(a0, a2) # fp[BBBB]<- a0
15088 GET_INST_OPCODE(t0) # extract opcode from rINST
15089 GOTO_OPCODE(t0) # jump to next instruction
15092 /* continuation for OP_IGET_BYTE_JUMBO */
15094 .LOP_IGET_BYTE_JUMBO_resolved:
15097 beqz a0,common_exceptionThrown
15100 * v0 holds resolved field
15101 * rOBJ holds object (caller saved)
15103 .LOP_IGET_BYTE_JUMBO_finish:
15104 #BAL(common_squeak0)
15105 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15106 # check object for null
15107 beqz rOBJ, common_errNullObject # object was null
15108 addu a3, a3, rOBJ # form address
15109 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15110 # noop # acquiring load
15111 FETCH(a2, 3) # a2<- BBBB
15112 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15113 SET_VREG(a0, a2) # fp[BBBB]<- a0
15114 GET_INST_OPCODE(t0) # extract opcode from rINST
15115 GOTO_OPCODE(t0) # jump to next instruction
15118 /* continuation for OP_IGET_CHAR_JUMBO */
15120 .LOP_IGET_CHAR_JUMBO_resolved:
15123 beqz a0,common_exceptionThrown
15126 * v0 holds resolved field
15127 * rOBJ holds object (caller saved)
15129 .LOP_IGET_CHAR_JUMBO_finish:
15130 #BAL(common_squeak0)
15131 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15132 # check object for null
15133 beqz rOBJ, common_errNullObject # object was null
15134 addu a3, a3, rOBJ # form address
15135 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15136 # noop # acquiring load
15137 FETCH(a2, 3) # a2<- BBBB
15138 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15139 SET_VREG(a0, a2) # fp[BBBB]<- a0
15140 GET_INST_OPCODE(t0) # extract opcode from rINST
15141 GOTO_OPCODE(t0) # jump to next instruction
15144 /* continuation for OP_IGET_SHORT_JUMBO */
15146 .LOP_IGET_SHORT_JUMBO_resolved:
15149 beqz a0,common_exceptionThrown
15152 * v0 holds resolved field
15153 * rOBJ holds object (caller saved)
15155 .LOP_IGET_SHORT_JUMBO_finish:
15156 #BAL(common_squeak0)
15157 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15158 # check object for null
15159 beqz rOBJ, common_errNullObject # object was null
15160 addu a3, a3, rOBJ # form address
15161 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15162 # noop # acquiring load
15163 FETCH(a2, 3) # a2<- BBBB
15164 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15165 SET_VREG(a0, a2) # fp[BBBB]<- a0
15166 GET_INST_OPCODE(t0) # extract opcode from rINST
15167 GOTO_OPCODE(t0) # jump to next instruction
15170 /* continuation for OP_IPUT_JUMBO */
15172 .LOP_IPUT_JUMBO_resolved:
15174 beqz a0, common_exceptionThrown
15175 # fall through to OP_IPUT_JUMBO_finish
15180 * a0 holds resolved field
15181 * rOBJ holds object
15183 .LOP_IPUT_JUMBO_finish:
15184 #BAL(common_squeak0)
15185 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15186 FETCH(a1, 3) # a1<- BBBB
15187 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15188 # check object for null
15189 beqz rOBJ, common_errNullObject # object was null
15190 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15191 GET_INST_OPCODE(t0) # extract opcode from rINST
15192 addu rOBJ, rOBJ, a3 # form address
15193 # noop # releasing store
15194 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
15196 GOTO_OPCODE(t0) # jump to next instruction
15199 /* continuation for OP_IPUT_WIDE_JUMBO */
15201 .LOP_IPUT_WIDE_JUMBO_resolved:
15203 beqz a0, common_exceptionThrown
15204 # fall through to OP_IPUT_WIDE_JUMBO_finish
15207 * a0 holds resolved field
15208 * rOBJ holds object
15210 .LOP_IPUT_WIDE_JUMBO_finish:
15211 FETCH(a2, 3) # a1<- BBBB
15212 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15213 EAS2(a2, rFP, a2) # a2 <- &fp[BBBB]
15214 # check object for null
15215 beqz rOBJ, common_errNullObject # object was null
15216 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15217 LOAD64(a0, a1, a2) # a0/a1 <- fp[BBBB]
15218 GET_INST_OPCODE(rBIX) # extract opcode from rINST
15219 addu a2, rOBJ, a3 # form address
15221 JAL(dvmQuasiAtomicSwap64Sync) # stores r0/r1 into addr r2
15222 # STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
15224 STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
15226 GOTO_OPCODE(rBIX) # jump to next instruction
15230 /* continuation for OP_IPUT_OBJECT_JUMBO */
15234 * a0 holds resolved field
15235 * rOBJ holds object
15237 .LOP_IPUT_OBJECT_JUMBO_resolved:
15239 beqz a0, common_exceptionThrown
15240 # fall through to OP_IPUT_OBJECT_JUMBO_finish
15242 .LOP_IPUT_OBJECT_JUMBO_finish:
15243 #BAL(common_squeak0)
15244 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15245 FETCH(a1, 3) # a1<- BBBB
15246 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15247 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
15248 # check object for null
15249 beqz rOBJ, common_errNullObject # object was null
15250 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15251 GET_INST_OPCODE(t0) # extract opcode from rINST
15252 addu t2, rOBJ, a3 # form address
15253 # noop # releasing store
15254 sw a0, (t2) # obj.field (32 bits) <- a0
15256 beqz a0, 1f # stored a null reference?
15257 srl t1, rOBJ, GC_CARD_SHIFT
15259 sb a2, (t2) # mark card if not
15261 GOTO_OPCODE(t0) # jump to next instruction
15264 /* continuation for OP_IPUT_BOOLEAN_JUMBO */
15266 .LOP_IPUT_BOOLEAN_JUMBO_resolved:
15268 beqz a0, common_exceptionThrown
15269 # fall through to OP_IPUT_BOOLEAN_JUMBO_finish
15274 * a0 holds resolved field
15275 * rOBJ holds object
15277 .LOP_IPUT_BOOLEAN_JUMBO_finish:
15278 #BAL(common_squeak0)
15279 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15280 FETCH(a1, 3) # a1<- BBBB
15281 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15282 # check object for null
15283 beqz rOBJ, common_errNullObject # object was null
15284 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15285 GET_INST_OPCODE(t0) # extract opcode from rINST
15286 addu rOBJ, rOBJ, a3 # form address
15287 # noop # releasing store
15288 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
15290 GOTO_OPCODE(t0) # jump to next instruction
15293 /* continuation for OP_IPUT_BYTE_JUMBO */
15295 .LOP_IPUT_BYTE_JUMBO_resolved:
15297 beqz a0, common_exceptionThrown
15298 # fall through to OP_IPUT_BYTE_JUMBO_finish
15303 * a0 holds resolved field
15304 * rOBJ holds object
15306 .LOP_IPUT_BYTE_JUMBO_finish:
15307 #BAL(common_squeak0)
15308 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15309 FETCH(a1, 3) # a1<- BBBB
15310 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15311 # check object for null
15312 beqz rOBJ, common_errNullObject # object was null
15313 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15314 GET_INST_OPCODE(t0) # extract opcode from rINST
15315 addu rOBJ, rOBJ, a3 # form address
15316 # noop # releasing store
15317 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
15319 GOTO_OPCODE(t0) # jump to next instruction
15322 /* continuation for OP_IPUT_CHAR_JUMBO */
15324 .LOP_IPUT_CHAR_JUMBO_resolved:
15326 beqz a0, common_exceptionThrown
15327 # fall through to OP_IPUT_CHAR_JUMBO_finish
15332 * a0 holds resolved field
15333 * rOBJ holds object
15335 .LOP_IPUT_CHAR_JUMBO_finish:
15336 #BAL(common_squeak0)
15337 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15338 FETCH(a1, 3) # a1<- BBBB
15339 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15340 # check object for null
15341 beqz rOBJ, common_errNullObject # object was null
15342 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15343 GET_INST_OPCODE(t0) # extract opcode from rINST
15344 addu rOBJ, rOBJ, a3 # form address
15345 # noop # releasing store
15346 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
15348 GOTO_OPCODE(t0) # jump to next instruction
15351 /* continuation for OP_IPUT_SHORT_JUMBO */
15353 .LOP_IPUT_SHORT_JUMBO_resolved:
15355 beqz a0, common_exceptionThrown
15356 # fall through to OP_IPUT_SHORT_JUMBO_finish
15361 * a0 holds resolved field
15362 * rOBJ holds object
15364 .LOP_IPUT_SHORT_JUMBO_finish:
15365 #BAL(common_squeak0)
15366 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15367 FETCH(a1, 3) # a1<- BBBB
15368 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15369 # check object for null
15370 beqz rOBJ, common_errNullObject # object was null
15371 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15372 GET_INST_OPCODE(t0) # extract opcode from rINST
15373 addu rOBJ, rOBJ, a3 # form address
15374 # noop # releasing store
15375 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
15377 GOTO_OPCODE(t0) # jump to next instruction
15380 /* continuation for OP_SGET_JUMBO */
15382 .LOP_SGET_JUMBO_finish:
15383 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15384 # no-op # acquiring load
15385 FETCH(a2, 3) # r2<- BBBB
15386 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15387 GET_INST_OPCODE(t0) # extract opcode from rINST
15388 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15390 /* continuation for OP_SGET_WIDE_JUMBO */
15392 .LOP_SGET_WIDE_JUMBO_finish:
15393 FETCH(a1, 3) # a1<- BBBB
15395 vLOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
15397 LOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
15399 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15400 EAS2(a1, rFP, a1) # a1 <- &fp[BBBB]
15401 STORE64(a2, a3, a1) # vBBBB/vBBBB+1 <- a2/a3
15402 GET_INST_OPCODE(t0) # extract opcode from rINST
15403 GOTO_OPCODE(t0) # jump to next instruction
15405 /* continuation for OP_SGET_OBJECT_JUMBO */
15407 .LOP_SGET_OBJECT_JUMBO_finish:
15408 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15409 # no-op # acquiring load
15410 FETCH(a2, 3) # r2<- BBBB
15411 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15412 GET_INST_OPCODE(t0) # extract opcode from rINST
15413 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15415 /* continuation for OP_SGET_BOOLEAN_JUMBO */
15417 .LOP_SGET_BOOLEAN_JUMBO_finish:
15418 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15419 # no-op # acquiring load
15420 FETCH(a2, 3) # r2<- BBBB
15421 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15422 GET_INST_OPCODE(t0) # extract opcode from rINST
15423 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15425 /* continuation for OP_SGET_BYTE_JUMBO */
15427 .LOP_SGET_BYTE_JUMBO_finish:
15428 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15429 # no-op # acquiring load
15430 FETCH(a2, 3) # r2<- BBBB
15431 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15432 GET_INST_OPCODE(t0) # extract opcode from rINST
15433 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15435 /* continuation for OP_SGET_CHAR_JUMBO */
15437 .LOP_SGET_CHAR_JUMBO_finish:
15438 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15439 # no-op # acquiring load
15440 FETCH(a2, 3) # r2<- BBBB
15441 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15442 GET_INST_OPCODE(t0) # extract opcode from rINST
15443 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15445 /* continuation for OP_SGET_SHORT_JUMBO */
15447 .LOP_SGET_SHORT_JUMBO_finish:
15448 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15449 # no-op # acquiring load
15450 FETCH(a2, 3) # r2<- BBBB
15451 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15452 GET_INST_OPCODE(t0) # extract opcode from rINST
15453 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15455 /* continuation for OP_SPUT_JUMBO */
15457 .LOP_SPUT_JUMBO_finish:
15459 FETCH(a2, 3) # a2<- BBBB
15460 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15461 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15462 GET_INST_OPCODE(t0) # extract opcode from rINST
15463 # no-op # releasing store
15464 sw a1, offStaticField_value(a0) # field <- vBBBB
15466 GOTO_OPCODE(t0) # jump to next instruction
15468 /* continuation for OP_SPUT_WIDE_JUMBO */
15471 * Continuation if the field has not yet been resolved.
15472 * a1: AAAAAAAA field ref
15474 * rBIX: dvmDex->pResFields
15476 * Returns StaticField pointer in a2.
15478 .LOP_SPUT_WIDE_JUMBO_resolve:
15479 LOAD_rSELF_method(a2) # a2 <- current method
15480 #if defined(WITH_JIT)
15481 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
15483 EXPORT_PC() # resolve() could throw, so export now
15484 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
15485 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
15488 beqz v0, common_exceptionThrown # no, handle exception
15489 #if defined(WITH_JIT)
15491 * If the JIT is actively building a trace we need to make sure
15492 * that the field is fully resolved before including this instruction.
15494 JAL(common_verifyField)
15497 b .LOP_SPUT_WIDE_JUMBO_finish # resume
15499 /* continuation for OP_SPUT_OBJECT_JUMBO */
15500 .LOP_SPUT_OBJECT_JUMBO_finish: # field ptr in a0
15501 FETCH(a2, 3) # a2<- BBBB
15502 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15503 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15504 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
15505 lw t1, offField_clazz(a0) # t1 <- field->clazz
15506 GET_INST_OPCODE(t0) # extract opcode from rINST
15507 # no-op # releasing store
15508 sw a1, offStaticField_value(a0) # field <- vBBBB
15511 srl t2, t1, GC_CARD_SHIFT
15515 GOTO_OPCODE(t0) # jump to next instruction
15517 /* continuation for OP_SPUT_BOOLEAN_JUMBO */
15519 .LOP_SPUT_BOOLEAN_JUMBO_finish:
15521 FETCH(a2, 3) # a2<- BBBB
15522 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15523 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15524 GET_INST_OPCODE(t0) # extract opcode from rINST
15525 # no-op # releasing store
15526 sw a1, offStaticField_value(a0) # field <- vBBBB
15528 GOTO_OPCODE(t0) # jump to next instruction
15530 /* continuation for OP_SPUT_BYTE_JUMBO */
15532 .LOP_SPUT_BYTE_JUMBO_finish:
15534 FETCH(a2, 3) # a2<- BBBB
15535 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15536 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15537 GET_INST_OPCODE(t0) # extract opcode from rINST
15538 # no-op # releasing store
15539 sw a1, offStaticField_value(a0) # field <- vBBBB
15541 GOTO_OPCODE(t0) # jump to next instruction
15543 /* continuation for OP_SPUT_CHAR_JUMBO */
15545 .LOP_SPUT_CHAR_JUMBO_finish:
15547 FETCH(a2, 3) # a2<- BBBB
15548 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15549 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15550 GET_INST_OPCODE(t0) # extract opcode from rINST
15551 # no-op # releasing store
15552 sw a1, offStaticField_value(a0) # field <- vBBBB
15554 GOTO_OPCODE(t0) # jump to next instruction
15556 /* continuation for OP_SPUT_SHORT_JUMBO */
15558 .LOP_SPUT_SHORT_JUMBO_finish:
15560 FETCH(a2, 3) # a2<- BBBB
15561 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15562 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15563 GET_INST_OPCODE(t0) # extract opcode from rINST
15564 # no-op # releasing store
15565 sw a1, offStaticField_value(a0) # field <- vBBBB
15567 GOTO_OPCODE(t0) # jump to next instruction
15569 /* continuation for OP_INVOKE_VIRTUAL_JUMBO */
15573 * a0 = resolved base method
15574 * rBIX= C or CCCC (index of first arg, which is the "this" ptr)
15576 .LOP_INVOKE_VIRTUAL_JUMBO_continue:
15577 FETCH(rBIX,4) # rBIX <- CCCC
15578 GET_VREG(rOBJ, rBIX) # rOBJ <- "this" ptr
15579 LOADu2_offMethod_methodIndex(a2, a0) # a2 <- baseMethod->methodIndex
15581 beqz rOBJ, common_errNullObject # null "this", throw exception
15582 LOAD_base_offObject_clazz(a3, rOBJ) # a3 <- thisPtr->clazz
15583 LOAD_base_offClassObject_vtable(a3, a3) # a3 <- thisPtr->clazz->vtable
15584 LOAD_eas2(a0, a3, a2) # a0 <- vtable[methodIndex]
15585 b common_invokeMethodJumbo # (a0=method, rOBJ="this")
15588 /* continuation for OP_INVOKE_SUPER_JUMBO */
15592 * a0 = resolved base method
15593 * rBIX = method->clazz
15595 .LOP_INVOKE_SUPER_JUMBO_continue:
15596 LOAD_base_offClassObject_super(a1, rBIX) # a1 <- method->clazz->super
15597 LOADu2_offMethod_methodIndex(a2, a0) # a2 <- baseMethod->methodIndex
15598 LOAD_base_offClassObject_vtableCount(a3, a1) # a3 <- super->vtableCount
15599 EXPORT_PC() # must export for invoke
15600 # compare (methodIndex, vtableCount)
15601 bgeu a2, a3, .LOP_INVOKE_SUPER_JUMBO_nsm # method not present in superclass
15602 LOAD_base_offClassObject_vtable(a1, a1) # a1 <- ...clazz->super->vtable
15603 LOAD_eas2(a0, a1, a2) # a0 <- vtable[methodIndex]
15604 b common_invokeMethodJumbo # a0=method rOBJ="this"
15607 * Throw a NoSuchMethodError with the method name as the message.
15608 * a0 = resolved base method
15610 .LOP_INVOKE_SUPER_JUMBO_nsm:
15611 LOAD_base_offMethod_name(a1, a0) # a1 <- method name
15612 b common_errNoSuchMethod
15615 /* continuation for OP_INVOKE_STATIC_JUMBO */
15617 .LOP_INVOKE_STATIC_JUMBO_resolve:
15618 LOAD_rSELF_method(a3) # a3 <- self->method
15619 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
15620 li a2, METHOD_STATIC # resolver method type
15621 JAL(dvmResolveMethod) # v0 <- call(clazz, ref, flags)
15623 #if defined(WITH_JIT)
15625 * Check to see if we're actively building a trace. If so,
15626 * we need to keep this instruction out of it.
15627 * rBIX: &resolved_methodToCall
15629 lhu a2, offThread_subMode(rSELF)
15630 beqz v0, common_exceptionThrown # null, handle exception
15631 and a2, kSubModeJitTraceBuild # trace under construction?
15632 beqz a2, common_invokeMethodJumboNoThis # no, (a0=method, rOBJ="this")
15633 lw a1, 0(rBIX) # reload resolved method
15634 # finished resloving?
15635 bnez a1, common_invokeMethodJumboNoThis # yes, (a0=method, rOBJ="this")
15636 move rBIX, a0 # preserve method
15639 JAL(dvmJitEndTraceSelect) # (self, pc)
15641 b common_invokeMethodJumboNoThis # whew, finally!
15644 bnez v0, common_invokeMethodJumboNoThis # (a0=method, rOBJ="this")
15645 b common_exceptionThrown # yes, handle exception
15648 /* continuation for OP_INVOKE_OBJECT_INIT_JUMBO */
15650 * A debugger is attached, so we need to go ahead and do
15651 * this. For simplicity, we'll just jump directly to the
15652 * corresponding handler. Note that we can't use
15653 * rIBASE here because it may be in single-step mode.
15654 * Load the primary table base directly.
15656 .LOP_INVOKE_OBJECT_INIT_JUMBO_debugger:
15657 lw a1, offThread_mainHandlerTable(rSELF)
15659 li t0, OP_INVOKE_DIRECT_JUMBO
15661 li t0, OP_INVOKE_DIRECT_RANGE
15663 GOTO_OPCODE_BASE(a1, t0) # execute it
15665 /* continuation for OP_IGET_VOLATILE_JUMBO */
15667 .LOP_IGET_VOLATILE_JUMBO_resolved:
15670 beqz a0,common_exceptionThrown
15673 * v0 holds resolved field
15674 * rOBJ holds object (caller saved)
15676 .LOP_IGET_VOLATILE_JUMBO_finish:
15677 #BAL(common_squeak0)
15678 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15679 # check object for null
15680 beqz rOBJ, common_errNullObject # object was null
15681 addu a3, a3, rOBJ # form address
15682 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15683 SMP_DMB # acquiring load
15684 FETCH(a2, 3) # a2<- BBBB
15685 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15686 SET_VREG(a0, a2) # fp[BBBB]<- a0
15687 GET_INST_OPCODE(t0) # extract opcode from rINST
15688 GOTO_OPCODE(t0) # jump to next instruction
15691 /* continuation for OP_IGET_WIDE_VOLATILE_JUMBO */
15693 .LOP_IGET_WIDE_VOLATILE_JUMBO_resolved:
15696 bnez v0, .LOP_IGET_WIDE_VOLATILE_JUMBO_finish
15697 b common_exceptionThrown
15701 * a0 holds resolved field
15702 * rOBJ holds object
15704 .LOP_IGET_WIDE_VOLATILE_JUMBO_finish:
15705 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15706 beqz rOBJ, common_errNullObject # object was null
15707 GET_OPA4(a2) # a2 <- A+
15708 addu rOBJ, rOBJ, a3 # form address
15710 vLOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
15712 LOAD64(a0, a1, rOBJ) # a0/a1 <- obj.field (64-bit align ok)
15714 FETCH(a2, 3) # r2<- BBBB
15715 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15716 EAS2(a3, rFP, a2) # a3 <- &fp[BBBB]
15717 GET_INST_OPCODE(t0) # extract opcode from rINST
15718 STORE64(a0, a1, a3) # fp[BBBB] <- a0/a1
15719 GOTO_OPCODE(t0) # jump to next instruction
15722 /* continuation for OP_IGET_OBJECT_VOLATILE_JUMBO */
15724 .LOP_IGET_OBJECT_VOLATILE_JUMBO_resolved:
15727 beqz a0,common_exceptionThrown
15730 * v0 holds resolved field
15731 * rOBJ holds object (caller saved)
15733 .LOP_IGET_OBJECT_VOLATILE_JUMBO_finish:
15734 #BAL(common_squeak0)
15735 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15736 # check object for null
15737 beqz rOBJ, common_errNullObject # object was null
15738 addu a3, a3, rOBJ # form address
15739 lw a0, (a3) # a0 <- obj.field (8/16/32 bits)
15740 SMP_DMB # acquiring load
15741 FETCH(a2, 3) # a2<- BBBB
15742 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15743 SET_VREG(a0, a2) # fp[BBBB]<- a0
15744 GET_INST_OPCODE(t0) # extract opcode from rINST
15745 GOTO_OPCODE(t0) # jump to next instruction
15748 /* continuation for OP_IPUT_VOLATILE_JUMBO */
15750 .LOP_IPUT_VOLATILE_JUMBO_resolved:
15752 beqz a0, common_exceptionThrown
15753 # fall through to OP_IPUT_VOLATILE_JUMBO_finish
15758 * a0 holds resolved field
15759 * rOBJ holds object
15761 .LOP_IPUT_VOLATILE_JUMBO_finish:
15762 #BAL(common_squeak0)
15763 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15764 FETCH(a1, 3) # a1<- BBBB
15765 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15766 # check object for null
15767 beqz rOBJ, common_errNullObject # object was null
15768 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15769 GET_INST_OPCODE(t0) # extract opcode from rINST
15770 addu rOBJ, rOBJ, a3 # form address
15771 SMP_DMB_ST # releasing store
15772 sw a0, (rOBJ) # obj.field (8/16/32 bits) <- a0
15774 GOTO_OPCODE(t0) # jump to next instruction
15777 /* continuation for OP_IPUT_WIDE_VOLATILE_JUMBO */
15779 .LOP_IPUT_WIDE_VOLATILE_JUMBO_resolved:
15781 beqz a0, common_exceptionThrown
15782 # fall through to OP_IPUT_WIDE_VOLATILE_JUMBO_finish
15785 * a0 holds resolved field
15786 * rOBJ holds object
15788 .LOP_IPUT_WIDE_VOLATILE_JUMBO_finish:
15789 FETCH(a2, 3) # a1<- BBBB
15790 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15791 EAS2(a2, rFP, a2) # a2 <- &fp[BBBB]
15792 # check object for null
15793 beqz rOBJ, common_errNullObject # object was null
15794 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15795 LOAD64(a0, a1, a2) # a0/a1 <- fp[BBBB]
15796 GET_INST_OPCODE(rBIX) # extract opcode from rINST
15797 addu a2, rOBJ, a3 # form address
15799 JAL(dvmQuasiAtomicSwap64Sync) # stores r0/r1 into addr r2
15800 # STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
15802 STORE64(a0, a1, a2) # obj.field (64 bits, aligned) <- a0 a1
15804 GOTO_OPCODE(rBIX) # jump to next instruction
15808 /* continuation for OP_IPUT_OBJECT_VOLATILE_JUMBO */
15812 * a0 holds resolved field
15813 * rOBJ holds object
15815 .LOP_IPUT_OBJECT_VOLATILE_JUMBO_resolved:
15817 beqz a0, common_exceptionThrown
15818 # fall through to OP_IPUT_OBJECT_VOLATILE_JUMBO_finish
15820 .LOP_IPUT_OBJECT_VOLATILE_JUMBO_finish:
15821 #BAL(common_squeak0)
15822 LOAD_base_offInstField_byteOffset(a3, a0) # a3 <- byte offset of field
15823 FETCH(a1, 3) # a1<- BBBB
15824 GET_VREG(a0, a1) # a0 <- fp[BBBB]
15825 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
15826 # check object for null
15827 beqz rOBJ, common_errNullObject # object was null
15828 FETCH_ADVANCE_INST(5) # advance rPC, load rINST
15829 GET_INST_OPCODE(t0) # extract opcode from rINST
15830 addu t2, rOBJ, a3 # form address
15831 SMP_DMB_ST # releasing store
15832 sw a0, (t2) # obj.field (32 bits) <- a0
15834 beqz a0, 1f # stored a null reference?
15835 srl t1, rOBJ, GC_CARD_SHIFT
15837 sb a2, (t2) # mark card if not
15839 GOTO_OPCODE(t0) # jump to next instruction
15842 /* continuation for OP_SGET_VOLATILE_JUMBO */
15844 .LOP_SGET_VOLATILE_JUMBO_finish:
15845 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15846 SMP_DMB # acquiring load
15847 FETCH(a2, 3) # r2<- BBBB
15848 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15849 GET_INST_OPCODE(t0) # extract opcode from rINST
15850 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15852 /* continuation for OP_SGET_WIDE_VOLATILE_JUMBO */
15854 .LOP_SGET_WIDE_VOLATILE_JUMBO_finish:
15855 FETCH(a1, 3) # a1<- BBBB
15857 vLOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
15859 LOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
15861 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15862 EAS2(a1, rFP, a1) # a1 <- &fp[BBBB]
15863 STORE64(a2, a3, a1) # vBBBB/vBBBB+1 <- a2/a3
15864 GET_INST_OPCODE(t0) # extract opcode from rINST
15865 GOTO_OPCODE(t0) # jump to next instruction
15867 /* continuation for OP_SGET_OBJECT_VOLATILE_JUMBO */
15869 .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish:
15870 LOAD_base_offStaticField_value(a1, a0) # a1 <- field value
15871 SMP_DMB # acquiring load
15872 FETCH(a2, 3) # r2<- BBBB
15873 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15874 GET_INST_OPCODE(t0) # extract opcode from rINST
15875 SET_VREG_GOTO(a1, a2, t0) # fp[BBBB] <- a1
15877 /* continuation for OP_SPUT_VOLATILE_JUMBO */
15879 .LOP_SPUT_VOLATILE_JUMBO_finish:
15881 FETCH(a2, 3) # a2<- BBBB
15882 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15883 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15884 GET_INST_OPCODE(t0) # extract opcode from rINST
15885 SMP_DMB_ST # releasing store
15886 sw a1, offStaticField_value(a0) # field <- vBBBB
15888 GOTO_OPCODE(t0) # jump to next instruction
15890 /* continuation for OP_SPUT_WIDE_VOLATILE_JUMBO */
15893 * Continuation if the field has not yet been resolved.
15894 * a1: AAAAAAAA field ref
15896 * rBIX: dvmDex->pResFields
15898 * Returns StaticField pointer in a2.
15900 .LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve:
15901 LOAD_rSELF_method(a2) # a2 <- current method
15902 #if defined(WITH_JIT)
15903 EAS2(rBIX, rBIX, a1) # rBIX<- &dvmDex->pResFields[field]
15905 EXPORT_PC() # resolve() could throw, so export now
15906 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
15907 JAL(dvmResolveStaticField) # v0 <- resolved StaticField ptr
15910 beqz v0, common_exceptionThrown # no, handle exception
15911 #if defined(WITH_JIT)
15913 * If the JIT is actively building a trace we need to make sure
15914 * that the field is fully resolved before including this instruction.
15916 JAL(common_verifyField)
15919 b .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish # resume
15921 /* continuation for OP_SPUT_OBJECT_VOLATILE_JUMBO */
15922 .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: # field ptr in a0
15923 FETCH(a2, 3) # a2<- BBBB
15924 FETCH_ADVANCE_INST(4) # advance rPC, load rINST
15925 GET_VREG(a1, a2) # a1 <- fp[BBBB]
15926 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
15927 lw t1, offField_clazz(a0) # t1 <- field->clazz
15928 GET_INST_OPCODE(t0) # extract opcode from rINST
15929 SMP_DMB_ST # releasing store
15930 sw a1, offStaticField_value(a0) # field <- vBBBB
15933 srl t2, t1, GC_CARD_SHIFT
15937 GOTO_OPCODE(t0) # jump to next instruction
15939 .size dvmAsmSisterStart, .-dvmAsmSisterStart
15940 .global dvmAsmSisterEnd
15943 /* File: mips/footer.S */
15945 * ===========================================================================
15946 * Common subroutines and data
15947 * ===========================================================================
15953 #if defined(WITH_JIT)
15954 #if defined(WITH_SELF_VERIFICATION)
15957 * "longjmp" to a translation after single-stepping. Before returning
15958 * to translation, must save state for self-verification.
15960 .global dvmJitResumeTranslation # (Thread* self, u4* dFP)
15961 dvmJitResumeTranslation:
15962 move rSELF, a0 # restore self
15963 move rPC, a1 # restore Dalvik pc
15964 move rFP, a2 # restore Dalvik fp
15965 lw rBIX, offThread_jitResumeNPC(rSELF)
15966 sw zero, offThread_jitResumeNPC(rSELF) # reset resume address
15967 lw sp, offThread_jitResumeNSP(rSELF) # cut back native stack
15968 b jitSVShadowRunStart # resume as if cache hit
15969 # expects resume addr in rBIX
15971 .global dvmJitToInterpPunt
15972 dvmJitToInterpPunt:
15973 li a2, kSVSPunt # a2 <- interpreter entry point
15974 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
15975 b jitSVShadowRunEnd # doesn't return
15977 .global dvmJitToInterpSingleStep
15978 dvmJitToInterpSingleStep:
15979 move rPC, a0 # set up dalvik pc
15981 sw ra, offThread_jitResumeNPC(rSELF)
15982 sw a1, offThread_jitResumeDPC(rSELF)
15983 li a2, kSVSSingleStep # a2 <- interpreter entry point
15984 b jitSVShadowRunEnd # doesn't return
15986 .global dvmJitToInterpNoChainNoProfile
15987 dvmJitToInterpNoChainNoProfile:
15988 move a0, rPC # pass our target PC
15989 li a2, kSVSNoProfile # a2 <- interpreter entry point
15990 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
15991 b jitSVShadowRunEnd # doesn't return
15993 .global dvmJitToInterpTraceSelectNoChain
15994 dvmJitToInterpTraceSelectNoChain:
15995 move a0, rPC # pass our target PC
15996 li a2, kSVSTraceSelect # a2 <- interpreter entry point
15997 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
15998 b jitSVShadowRunEnd # doesn't return
16000 .global dvmJitToInterpTraceSelect
16001 dvmJitToInterpTraceSelect:
16002 lw a0, 0(ra) # pass our target PC
16003 li a2, kSVSTraceSelect # a2 <- interpreter entry point
16004 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
16005 b jitSVShadowRunEnd # doesn't return
16007 .global dvmJitToInterpBackwardBranch
16008 dvmJitToInterpBackwardBranch:
16009 lw a0, 0(ra) # pass our target PC
16010 li a2, kSVSBackwardBranch # a2 <- interpreter entry point
16011 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
16012 b jitSVShadowRunEnd # doesn't return
16014 .global dvmJitToInterpNormal
16015 dvmJitToInterpNormal:
16016 lw a0, 0(ra) # pass our target PC
16017 li a2, kSVSNormal # a2 <- interpreter entry point
16018 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
16019 b jitSVShadowRunEnd # doesn't return
16021 .global dvmJitToInterpNoChain
16022 dvmJitToInterpNoChain:
16023 move a0, rPC # pass our target PC
16024 li a2, kSVSNoChain # a2 <- interpreter entry point
16025 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
16026 b jitSVShadowRunEnd # doesn't return
16027 #else /* WITH_SELF_VERIFICATION */
16031 * "longjmp" to a translation after single-stepping.
16033 .global dvmJitResumeTranslation # (Thread* self, u4* dFP)
16034 dvmJitResumeTranslation:
16035 move rSELF, a0 # restore self
16036 move rPC, a1 # restore Dalvik pc
16037 move rFP, a2 # restore Dalvik fp
16038 lw a0, offThread_jitResumeNPC(rSELF)
16039 sw zero, offThread_jitResumeNPC(rSELF) # reset resume address
16040 lw sp, offThread_jitResumeNSP(rSELF) # cut back native stack
16041 jr a0 # resume translation
16045 * Return from the translation cache to the interpreter when the compiler is
16046 * having issues translating/executing a Dalvik instruction. We have to skip
16047 * the code cache lookup otherwise it is possible to indefinitely bouce
16048 * between the interpreter and the code cache if the instruction that fails
16049 * to be compiled happens to be at a trace start.
16051 .global dvmJitToInterpPunt
16052 dvmJitToInterpPunt:
16053 lw gp, STACK_OFFSET_GP(sp)
16055 #if defined(WITH_JIT_TUNING)
16060 sw zero, offThread_inJitCodeCache(rSELF) # Back to the interp land
16061 lw rIBASE, offThread_curHandlerTable(rSELF)
16063 GET_INST_OPCODE(t0)
16067 * Return to the interpreter to handle a single instruction.
16069 * rPC <= Dalvik PC of instrucion to interpret
16070 * a1 <= Dalvik PC of resume instruction
16071 * ra <= resume point in translation
16074 .global dvmJitToInterpSingleStep
16075 dvmJitToInterpSingleStep:
16076 lw gp, STACK_OFFSET_GP(sp)
16077 move rPC, a0 # set up dalvik pc
16079 sw ra, offThread_jitResumeNPC(rSELF)
16080 sw sp, offThread_jitResumeNSP(rSELF)
16081 sw a1, offThread_jitResumeDPC(rSELF)
16083 sw a1, offThread_singleStepCount(rSELF) # just step once
16085 li a1, kSubModeCountedStep
16086 JAL(dvmEnableSubMode) # (self, subMode)
16087 lw rIBASE, offThread_curHandlerTable(rSELF)
16089 GET_INST_OPCODE(t0)
16092 * Return from the translation cache and immediately request
16093 * a translation for the exit target. Commonly used for callees.
16095 .global dvmJitToInterpTraceSelectNoChain
16096 dvmJitToInterpTraceSelectNoChain:
16097 lw gp, STACK_OFFSET_GP(sp)
16098 #if defined(WITH_JIT_TUNING)
16099 JAL(dvmBumpNoChain)
16103 JAL(dvmJitGetTraceAddrThread) # (pc, self)
16105 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag
16106 move a1, rPC # arg1 of translation may need this
16107 move ra, zero # in case target is HANDLER_INTERPRET
16108 beqz a0, 2f # 0 means translation does not exist
16112 * Return from the translation cache and immediately request
16113 * a translation for the exit target. Commonly used following
16116 .global dvmJitToInterpTraceSelect
16117 dvmJitToInterpTraceSelect:
16118 lw gp, STACK_OFFSET_GP(sp)
16119 lw rPC, (ra) # get our target PC
16120 subu rINST, ra, 8 # save start of chain branch
16123 JAL(dvmJitGetTraceAddrThread) # @ (pc, self)
16124 sw v0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag
16128 JAL(dvmJitChain) # v0 <- dvmJitChain(codeAddr, chainAddr)
16129 move a1, rPC # arg1 of translation may need this
16130 move ra, zero # in case target is HANDLER_INTERPRET
16132 beqz a0, toInterpreter # didn't chain - resume with interpreter
16134 jr a0 # continue native execution
16136 /* No translation, so request one if profiling isn't disabled */
16138 lw rIBASE, offThread_curHandlerTable(rSELF)
16139 lw a0, offThread_pJitProfTable(rSELF)
16141 li t0, kJitTSelectRequestHot
16142 movn a2, t0, a0 # ask for trace selection
16143 bnez a0, common_selectTrace
16144 GET_INST_OPCODE(t0)
16148 * Return from the translation cache to the interpreter.
16149 * The return was done with a BLX from thumb mode, and
16150 * the following 32-bit word contains the target rPC value.
16151 * Note that lr (r14) will have its low-order bit set to denote
16152 * its thumb-mode origin.
16154 * We'll need to stash our lr origin away, recover the new
16155 * target and then check to see if there is a translation available
16156 * for our new target. If so, we do a translation chain and
16157 * go back to native execution. Otherwise, it's back to the
16158 * interpreter (after treating this entry as a potential
16161 .global dvmJitToInterpNormal
16162 dvmJitToInterpNormal:
16163 lw gp, STACK_OFFSET_GP(sp)
16164 lw rPC, (ra) # get our target PC
16165 subu rINST, ra, 8 # save start of chain branch
16166 #if defined(WITH_JIT_TUNING)
16171 JAL(dvmJitGetTraceAddrThread) # @ (pc, self)
16173 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag
16174 beqz a0, toInterpreter # go if not, otherwise do chain
16176 JAL(dvmJitChain) # v0 <- dvmJitChain(codeAddr, chainAddr)
16177 move a1, rPC # arg1 of translation may need this
16178 move ra, zero # in case target is HANDLER_INTERPRET
16180 beqz a0, toInterpreter # didn't chain - resume with interpreter
16182 jr a0 # continue native execution
16185 * Return from the translation cache to the interpreter to do method invocation.
16186 * Check if translation exists for the callee, but don't chain to it.
16188 .global dvmJitToInterpNoChainNoProfile
16189 dvmJitToInterpNoChainNoProfile:
16190 #if defined(WITH_JIT_TUNING)
16191 JAL(dvmBumpNoChain)
16195 JAL(dvmJitGetTraceAddrThread) # (pc, self)
16197 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag
16198 move a1, rPC # arg1 of translation may need this
16199 move ra, zero # in case target is HANDLER_INTERPRET
16202 jr a0 # continue native execution if so
16205 lw rIBASE, offThread_curHandlerTable(rSELF)
16207 GET_INST_OPCODE(t0) # extract opcode from rINST
16208 GOTO_OPCODE(t0) # jump to next instruction
16211 * Return from the translation cache to the interpreter to do method invocation.
16212 * Check if translation exists for the callee, but don't chain to it.
16215 .global dvmJitToInterpNoChain
16216 dvmJitToInterpNoChain:
16217 lw gp, STACK_OFFSET_GP(sp)
16218 #if defined(WITH_JIT_TUNING)
16219 JAL(dvmBumpNoChain)
16223 JAL(dvmJitGetTraceAddrThread) # (pc, self)
16225 sw a0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag
16226 move a1, rPC # arg1 of translation may need this
16227 move ra, zero # in case target is HANDLER_INTERPRET
16229 jr a0 # continue native execution if so
16231 #endif /* WITH_SELF_VERIFICATION */
16234 * No translation, restore interpreter regs and start interpreting.
16235 * rSELF & rFP were preserved in the translated code, and rPC has
16236 * already been restored by the time we get here. We'll need to set
16237 * up rIBASE & rINST, and load the address of the JitTable into r0.
16242 lw rIBASE, offThread_curHandlerTable(rSELF)
16244 lw a0, offThread_pJitProfTable(rSELF)
16245 lw rIBASE, offThread_curHandlerTable(rSELF)
16246 # NOTE: intended fallthrough
16249 * Similar to common_updateProfile, but tests for null pJitProfTable
16250 * r0 holds pJifProfTAble, rINST is loaded, rPC is current and
16251 * rIBASE has been recently refreshed.
16254 common_testUpdateProfile:
16259 * Common code to update potential trace start counter, and initiate
16260 * a trace-build if appropriate.
16262 * r0 <= pJitProfTable (verified non-NULL)
16264 * rINST <= next instruction
16266 common_updateProfile:
16267 srl a3, rPC, 12 # cheap, but fast hash function
16269 andi a3, a3, JIT_PROF_SIZE-1 # eliminate excess bits
16271 lbu a1, (t1) # get counter
16272 GET_INST_OPCODE(t0)
16273 subu a1, a1, 1 # decrement counter
16274 sb a1, (t1) # and store it
16276 GOTO_OPCODE(t0) # if not threshold, fallthrough otherwise
16278 /* Looks good, reset the counter */
16279 lw a1, offThread_jitThreshold(rSELF)
16284 JAL(dvmJitGetTraceAddrThread) # (pc, self)
16286 sw v0, offThread_inJitCodeCache(rSELF) # set the inJitCodeCache flag
16287 move a1, rPC # arg1 of translation may need this
16288 move ra, zero # in case target is HANDLER_INTERPRET
16290 #if !defined(WITH_SELF_VERIFICATION)
16291 li t0, kJitTSelectRequest # ask for trace selection
16293 beqz a0, common_selectTrace
16294 jr a0 # jump to the translation
16297 bne a0, zero, skip_ask_for_trace_selection
16298 li a2, kJitTSelectRequest # ask for trace selection
16299 j common_selectTrace
16301 skip_ask_for_trace_selection:
16303 * At this point, we have a target translation. However, if
16304 * that translation is actually the interpret-only pseudo-translation
16305 * we want to treat it the same as no translation.
16307 move rBIX, a0 # save target
16308 jal dvmCompilerGetInterpretTemplate
16310 bne v0, rBIX, jitSVShadowRunStart # set up self verification shadow space
16311 # Need to clear the inJitCodeCache flag
16312 sw zero, offThread_inJitCodeCache(rSELF) # back to the interp land
16313 GET_INST_OPCODE(t0)
16323 common_selectTrace:
16324 lhu a0, offThread_subMode(rSELF)
16325 andi a0, (kSubModeJitTraceBuild | kSubModeJitSV)
16326 bnez a0, 3f # already doing JIT work, continue
16327 sw a2, offThread_jitState(rSELF)
16331 * Call out to validate trace-building request. If successful,
16332 * rIBASE will be swapped to to send us into single-stepping trace
16333 * building mode, so we need to refresh before we continue.
16339 JAL(dvmJitCheckTraceRequest)
16342 lw rIBASE, offThread_curHandlerTable(rSELF)
16344 GET_INST_OPCODE(t0) # extract opcode from rINST
16349 #if defined(WITH_SELF_VERIFICATION)
16352 * Save PC and registers to shadow memory for self verification mode
16353 * before jumping to native translation.
16355 * rPC, rFP, rSELF: the values that they should contain
16356 * r10: the address of the target translation.
16358 jitSVShadowRunStart:
16359 move a0, rPC # r0 <- program counter
16360 move a1, rFP # r1 <- frame pointer
16361 move a2, rSELF # r2 <- InterpState pointer
16362 move a3, rBIX # r3 <- target translation
16363 jal dvmSelfVerificationSaveState # save registers to shadow space
16364 lw rFP, offShadowSpace_shadowFP(v0) # rFP <- fp in shadow space
16365 jr rBIX # jump to the translation
16368 * Restore PC, registers, and interpState to original values
16369 * before jumping back to the interpreter.
16372 move a1, rFP # pass ending fp
16373 move a3, rSELF # pass self ptr for convenience
16374 jal dvmSelfVerificationRestoreState # restore pc and fp values
16375 LOAD_PC_FP_FROM_SELF() # restore pc, fp
16376 lw a1, offShadowSpace_svState(a0) # get self verification state
16377 beq a1, zero, 1f # check for punt condition
16379 # Setup SV single-stepping
16381 li a1, kSubModeJitSV
16382 JAL(dvmEnableSubMode) # (self, subMode)
16383 li a2, kJitSelfVerification # ask for self verification
16384 sw a2, offThread_jitState(rSELF)
16385 # Intentional fallthrough
16388 # exit to interpreter without check
16390 lw rIBASE, offThread_curHandlerTable(rSELF)
16392 GET_INST_OPCODE(t0)
16397 * The equivalent of "goto bail", this calls through the "bail handler".
16398 * It will end this interpreter activation, and return to the caller
16399 * of dvmMterpStdRun.
16401 * State registers will be saved to the "thread" area before bailing
16402 * debugging purposes
16404 .ent common_gotoBail
16406 SAVE_PC_FP_TO_SELF() # export state to "thread"
16407 move a0, rSELF # a0 <- self ptr
16408 b dvmMterpStdBail # call(self, changeInterp)
16409 .end common_gotoBail
16412 * The JIT's invoke method needs to remember the callsite class and
16413 * target pair. Save them here so that they are available to
16414 * dvmCheckJit following the interpretation of this invoke.
16416 #if defined(WITH_JIT)
16419 lw rOBJ, offObject_clazz(rOBJ)
16421 sw a0, offThread_methodToCall(rSELF)
16422 sw rOBJ, offThread_callsiteClass(rSELF)
16427 * Common code for jumbo method invocation.
16428 * NOTE: this adjusts rPC to account for the difference in instruction width.
16429 * As a result, the savedPc in the stack frame will not be wholly accurate. So
16430 * long as that is only used for source file line number calculations, we're
16433 common_invokeMethodJumboNoThis:
16434 #if defined(WITH_JIT)
16435 /* On entry: a0 is "Method* methodToCall */
16436 li rOBJ, 0 # clear "this"
16438 common_invokeMethodJumbo:
16439 /* On entry: a0 is "Method* methodToCall, rOBJ is "this" */
16441 #if defined(WITH_JIT)
16442 lhu a1, offThread_subMode(rSELF)
16443 andi a1, kSubModeJitTraceBuild
16445 JAL(save_callsiteinfo)
16447 /* prepare to copy args to "outs" area of current frame */
16449 add rPC, rPC, 4 # adjust pc to make return consistent
16451 SAVEAREA_FROM_FP(rBIX, rFP) # rBIX <- stack save area
16452 beqz a2, .LinvokeArgsDone # if no args, skip the rest
16453 FETCH(a1, 2) # a1 <- CCCC
16454 b .LinvokeRangeArgs # handle args like invoke range
16458 * Common code for method invocation with range.
16461 * a0 is "Method* methodToCall", the method we're trying to call
16463 common_invokeMethodRange:
16465 #if defined(WITH_JIT)
16466 lhu a1, offThread_subMode(rSELF)
16467 andi a1, kSubModeJitTraceBuild
16469 JAL(save_callsiteinfo)
16471 # prepare to copy args to "outs" area of current frame
16474 SAVEAREA_FROM_FP(rBIX, rFP) # rBIX <- stack save area
16475 beqz a2, .LinvokeArgsDone
16476 FETCH(a1, 2) # a1 <- CCCC
16478 # a0=methodToCall, a1=CCCC, a2=count, rBIX=outs
16479 # (very few methods have > 10 args; could unroll for common cases)
16482 subu rBIX, rBIX, t0
16494 * Common code for method invocation without range.
16497 * a0 is "Method* methodToCall", "rOBJ is this"
16499 common_invokeMethodNoRange:
16500 .LinvokeNewNoRange:
16501 #if defined(WITH_JIT)
16502 lhu a1, offThread_subMode(rSELF)
16503 andi a1, kSubModeJitTraceBuild
16505 JAL(save_callsiteinfo)
16508 # prepare to copy args to "outs" area of current frame
16511 SAVEAREA_FROM_FP(rBIX, rFP)
16512 beqz a2, .LinvokeArgsDone
16515 # a0=methodToCall, a1=GFED, a2=count,
16525 and t0, rINST, 0x0f00
16526 ESRN(t2, rFP, t0, 6)
16533 ESRN(t2, rFP, t0, 10)
16540 ESRN(t2, rFP, t0, 6)
16547 ESRN(t2, rFP, t0, 2)
16554 EASN(t2, rFP, t0, 2)
16560 #fall through .LinvokeArgsDone
16563 .LinvokeArgsDone: # a0=methodToCall
16564 lhu rOBJ, offMethod_registersSize(a0)
16565 lhu a3, offMethod_outsSize(a0)
16566 lw a2, offMethod_insns(a0)
16567 lw rINST, offMethod_clazz(a0)
16568 # find space for the new stack frame, check for overflow
16569 SAVEAREA_FROM_FP(a1, rFP) # a1 <- stack save area
16570 sll t0, rOBJ, 2 # a1 <- newFp (old savearea - regsSize)
16572 SAVEAREA_FROM_FP(rBIX, a1)
16573 lw rOBJ, offThread_interpStackEnd(rSELF) # t3 <- interpStackEnd
16576 lhu ra, offThread_subMode(rSELF)
16577 lw a3, offMethod_accessFlags(a0) # a3 <- methodToCall->accessFlags
16578 bltu t0, rOBJ, .LstackOverflow # yes, this frame will overflow stack
16581 # set up newSaveArea
16583 SAVEAREA_FROM_FP(t0, rFP)
16584 sw t0, offStackSaveArea_prevSave(rBIX)
16586 sw rFP, (offStackSaveArea_prevFrame)(rBIX)
16587 sw rPC, (offStackSaveArea_savedPc)(rBIX)
16588 #if defined(WITH_JIT)
16589 sw zero, (offStackSaveArea_returnAddr)(rBIX)
16591 sw a0, (offStackSaveArea_method)(rBIX)
16595 and t2, a3, ACC_NATIVE
16596 bnez t2, .LinvokeNative
16597 lhu rOBJ, (a2) # rOBJ -< load Inst from New PC
16598 lw a3, offClassObject_pDvmDex(rINST)
16599 move rPC, a2 # Publish new rPC
16600 # Update state values for the new method
16601 # a0=methodToCall, a1=newFp, a3=newMethodClass, rOBJ=newINST
16602 sw a0, offThread_method(rSELF)
16603 sw a3, offThread_methodClassDex(rSELF)
16605 sw a2, offThread_debugIsMethodEntry(rSELF)
16607 #if defined(WITH_JIT)
16608 lw a0, offThread_pJitProfTable(rSELF)
16609 move rFP, a1 # fp = newFp
16610 GET_PREFETCHED_OPCODE(t0, rOBJ) # extract prefetched opcode from rOBJ
16611 move rINST, rOBJ # publish new rINST
16612 sw a1, offThread_curFrame(rSELF)
16613 bnez a0, common_updateProfile
16617 GET_PREFETCHED_OPCODE(t0, rOBJ)
16619 sw a1, offThread_curFrame(rSELF)
16624 # Profiling - record method entry. a0: methodToCall
16628 STACK_STORE(a3, 12)
16629 sw rPC, offThread_pc(rSELF) # update interpSave.pc
16632 JAL(dvmReportInvoke)
16633 STACK_LOAD(a3, 12) # restore a0-a3
16639 # Prep for the native call
16640 # a0=methodToCall, a1=newFp, rBIX=newSaveArea
16641 lhu ra, offThread_subMode(rSELF)
16642 lw t3, offThread_jniLocal_topCookie(rSELF)
16643 sw a1, offThread_curFrame(rSELF)
16644 sw t3, offStackSaveArea_localRefCookie(rBIX) # newFp->localRefCookie=top
16647 addu a1, rSELF, offThread_retval
16649 #ifdef ASSIST_DEBUGGER
16650 /* insert fake function header to help gdb find the stack frame */
16657 bnez ra, 11f # Any special SubModes active?
16658 lw t9, offMethod_nativeFunc(a2)
16660 lw gp, STACK_OFFSET_GP(sp)
16662 # native return; rBIX=newSaveArea
16663 # equivalent to dvmPopJniLocals
16664 lw a0, offStackSaveArea_localRefCookie(rBIX)
16665 lw a1, offThread_exception(rSELF)
16666 sw rFP, offThread_curFrame(rSELF)
16667 sw a0, offThread_jniLocal_topCookie(rSELF) # new top <- old top
16668 bnez a1, common_exceptionThrown
16670 FETCH_ADVANCE_INST(3)
16671 GET_INST_OPCODE(t0)
16674 # a0=newFp, a1=&retval, a2=methodToCall, a3=self, ra=subModes
16675 SCRATCH_STORE(a0, 0)
16676 SCRATCH_STORE(a1, 4)
16677 SCRATCH_STORE(a2, 8)
16678 SCRATCH_STORE(a3, 12)
16679 move a0, a2 # a0 <- methodToCall
16682 JAL(dvmReportPreNativeInvoke) # (methodToCall, self, fp)
16683 SCRATCH_LOAD(a3, 12) # restore a0-a3
16684 SCRATCH_LOAD(a2, 8)
16685 SCRATCH_LOAD(a1, 4)
16686 SCRATCH_LOAD(a0, 0)
16688 # Call the native method
16689 lw t9, offMethod_nativeFunc(a2) # t9<-methodToCall->nativeFunc
16691 lw gp, STACK_OFFSET_GP(sp)
16693 # Restore the pre-call arguments
16694 SCRATCH_LOAD(a3, 12) # restore a0-a3
16695 SCRATCH_LOAD(a2, 8)
16696 SCRATCH_LOAD(a1, 4)
16697 SCRATCH_LOAD(a0, 0)
16699 # Finish up any post-invoke subMode requirements
16703 JAL(dvmReportPostNativeInvoke) # (methodToCall, self, fp)
16707 .LstackOverflow: # a0=methodToCall
16708 move a1, a0 # a1 <- methodToCall
16709 move a0, rSELF # a0 <- self
16710 JAL(dvmHandleStackOverflow) # dvmHandleStackOverflow(self, methodToCall)
16711 b common_exceptionThrown
16712 #ifdef ASSIST_DEBUGGER
16717 * Common code for method invocation, calling through "glue code".
16719 * TODO: now that we have range and non-range invoke handlers, this
16720 * needs to be split into two. Maybe just create entry points
16721 * that set r9 and jump here?
16724 * r0 is "Method* methodToCall", the method we're trying to call
16725 * r9 is "bool methodCallRange", indicating if this is a /range variant
16729 * Common code for handling a return instruction.
16731 * This does not return.
16733 common_returnFromMethod:
16735 lhu t0, offThread_subMode(rSELF)
16736 SAVEAREA_FROM_FP(a0, rFP)
16737 lw rOBJ, offStackSaveArea_savedPc(a0) # rOBJ = saveArea->savedPc
16740 lw rFP, offStackSaveArea_prevFrame(a0) # fp = saveArea->prevFrame
16741 lw a2, (offStackSaveArea_method - sizeofStackSaveArea)(rFP)
16742 # a2<- method we're returning to
16743 # is this a break frame?
16744 beqz a2, common_gotoBail # break frame, bail out completely
16746 lw rBIX, offMethod_clazz(a2) # rBIX<- method->clazz
16747 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh rIBASE
16748 PREFETCH_ADVANCE_INST(rINST, rOBJ, 3) # advance rOBJ, update new rINST
16749 sw a2, offThread_method(rSELF) # self->method = newSave->method
16750 lw a1, offClassObject_pDvmDex(rBIX) # r1<- method->clazz->pDvmDex
16751 sw rFP, offThread_curFrame(rSELF) # curFrame = fp
16752 #if defined(WITH_JIT)
16753 lw rBIX, offStackSaveArea_returnAddr(a0)
16754 move rPC, rOBJ # publish new rPC
16755 sw a1, offThread_methodClassDex(rSELF)
16756 sw rBIX, offThread_inJitCodeCache(rSELF) # may return to JIT'ed land
16757 beqz rBIX, 15f # caller is compiled code
16760 lw gp, STACK_OFFSET_GP(sp)
16762 GET_INST_OPCODE(t0) # extract opcode from rINST
16763 GOTO_OPCODE(t0) # jump to next instruction
16765 GET_INST_OPCODE(t0) # extract opcode from rINST
16766 move rPC, rOBJ # publish new rPC
16767 sw a1, offThread_methodClassDex(rSELF)
16772 # Handle special actions
16773 # On entry, a0: StackSaveArea
16774 lw a1, offStackSaveArea_prevFrame(a0) # a1<- prevFP
16775 sw rPC, offThread_pc(rSELF) # update interpSave.pc
16776 sw a1, offThread_curFrame(rSELF) # update interpSave.curFrame
16778 JAL(dvmReportReturn)
16779 SAVEAREA_FROM_FP(a0, rFP) # restore StackSaveArea
16784 * Return handling, calls through "glue code".
16787 SAVE_PC_FP_TO_SELF() # export state
16788 move a0, rSELF # arg to function
16789 JAL(dvmMterp_returnFromMethod)
16790 b common_resumeAfterGlueCall
16794 * Somebody has thrown an exception. Handle it.
16796 * If the exception processing code returns to us (instead of falling
16797 * out of the interpreter), continue with whatever the next instruction
16798 * now happens to be.
16800 * This does not return.
16802 .global dvmMterpCommonExceptionThrown
16803 dvmMterpCommonExceptionThrown:
16804 common_exceptionThrown:
16809 JAL(dvmCheckSuspendPending)
16810 lw rOBJ, offThread_exception(rSELF)
16813 JAL(dvmAddTrackedAlloc)
16814 lhu a2, offThread_subMode(rSELF)
16815 sw zero, offThread_exception(rSELF)
16818 bnez a2, 7f # any special subMode handling needed?
16820 /* set up args and a local for "&fp" */
16821 sw rFP, 20(sp) # store rFP => tmp
16822 addu t0, sp, 20 # compute &tmp
16823 sw t0, STACK_OFFSET_ARG04(sp) # save it in arg4 as per ABI
16824 li a3, 0 # a3 <- false
16825 lw a1, offThread_method(rSELF)
16827 lw a1, offMethod_insns(a1)
16828 lhu ra, offThread_subMode(rSELF)
16833 /* call, r0 gets catchRelPc (a code-unit offset) */
16834 JAL(dvmFindCatchBlock) # call(self, relPc, exc, scan?, &fp)
16835 lw rFP, 20(sp) # retrieve the updated rFP
16837 /* update frame pointer and check result from dvmFindCatchBlock */
16839 bltz v0, .LnotCaughtLocally
16841 /* fix earlier stack overflow if necessary; Preserve a0 */
16842 lbu a1, offThread_stackOverflowed(rSELF)
16847 JAL(dvmCleanupStackOverflow)
16852 /* adjust locals to match self->interpSave.curFrame and updated PC */
16853 SAVEAREA_FROM_FP(a1, rFP) # a1<- new save area
16854 lw a1, offStackSaveArea_method(a1)
16855 sw a1, offThread_method(rSELF)
16856 lw a2, offMethod_clazz(a1)
16857 lw a3, offMethod_insns(a1)
16858 lw a2, offClassObject_pDvmDex(a2)
16860 sw a2, offThread_methodClassDex(rSELF)
16862 /* release the tracked alloc on the exception */
16865 JAL(dvmReleaseTrackedAlloc)
16867 /* restore the exception if the handler wants it */
16868 lw rIBASE, offThread_curHandlerTable(rSELF)
16870 GET_INST_OPCODE(t0)
16871 bne t0, OP_MOVE_EXCEPTION, 2f
16872 sw rOBJ, offThread_exception(rSELF)
16876 # Manage debugger bookkeeping
16878 sw rPC, offThread_pc(rSELF)
16879 sw rFP, offThread_curFrame(rSELF)
16882 JAL(dvmReportExceptionThrow)
16885 .LnotCaughtLocally: # rOBJ = exception
16886 /* fix stack overflow if necessary */
16887 lbu a1, offThread_stackOverflowed(rSELF)
16891 JAL(dvmCleanupStackOverflow) # dvmCleanupStackOverflow(self, exception)
16894 # may want to show "not caught locally" debug messages here
16895 #if DVM_SHOW_EXCEPTION >= 2
16896 /* call __android_log_print(prio, tag, format, ...) */
16897 /* "Exception %s from %s:%d not caught locally" */
16898 lw a0, offThread_method(rSELF)
16899 lw a1, offMethod_insns(a0)
16902 JAL(dvmLineNumFromPC)
16904 # dvmGetMethodSourceFile(method)
16905 lw a0, offThread_method(rSELF)
16906 JAL(dvmGetMethodSourceFile)
16908 # exception->clazz->descriptor
16909 lw a3, offObject_clazz(rOBJ)
16910 lw a3, offClassObject_descriptor(a3)
16911 la a2, .LstrExceptionNotCaughtLocally
16914 JAL(__android_log_print)
16916 sw rOBJ, offThread_exception(rSELF)
16919 JAL(dvmReleaseTrackedAlloc)
16923 * Exception handling, calls through "glue code".
16927 SAVE_PC_TO_SELF() # export state
16929 move a0, rSELF # arg to function
16930 JAL(dvmMterp_exceptionThrown)
16931 b common_resumeAfterGlueCall
16934 #if defined(WITH_JIT)
16936 * If the JIT is actively building a trace we need to make sure
16937 * that the field is fully resolved before including the current
16941 * rBIX: &dvmDex->pResFields[field]
16942 * a0: field pointer (must preserve)
16944 common_verifyField:
16945 lhu a3, offThread_subMode(rSELF)
16946 andi a3, kSubModeJitTraceBuild
16947 bnez a3, 1f # Not building trace, continue
16951 beqz a1, 2f # resolution complete ?
16954 SCRATCH_STORE(a0, 0)
16955 SCRATCH_STORE(a1, 4)
16956 SCRATCH_STORE(a2, 8)
16957 SCRATCH_STORE(a3, 12)
16958 SCRATCH_STORE(ra, 16)
16961 JAL(dvmJitEndTraceSelect) #(self,pc) end trace before this inst)
16962 SCRATCH_LOAD(a0, 0)
16963 SCRATCH_LOAD(a1, 4)
16964 SCRATCH_LOAD(a2, 8)
16965 SCRATCH_LOAD(a3, 12)
16966 SCRATCH_LOAD(ra, 16)
16971 * After returning from a "glued" function, pull out the updated
16972 * values and start executing at the next instruction.
16974 common_resumeAfterGlueCall:
16975 LOAD_PC_FP_FROM_SELF() # pull rPC and rFP out of thread
16976 lw rIBASE, offThread_curHandlerTable(rSELF) # refresh
16977 FETCH_INST() # load rINST from rPC
16978 GET_INST_OPCODE(t0) # extract opcode from rINST
16979 GOTO_OPCODE(t0) # jump to next instruction
16982 * Invalid array index. Note that our calling convention is strange; we use a1
16983 * and a3 because those just happen to be the registers all our callers are
16984 * using. We move a3 before calling the C function, but a1 happens to match.
16988 common_errArrayIndex:
16991 JAL(dvmThrowArrayIndexOutOfBoundsException)
16992 b common_exceptionThrown
16995 * Integer divide or mod by zero.
16997 common_errDivideByZero:
16999 la a0, .LstrDivideByZero
17000 JAL(dvmThrowArithmeticException)
17001 b common_exceptionThrown
17004 * Attempt to allocate an array with a negative size.
17005 * On entry: length in a1
17007 common_errNegativeArraySize:
17009 move a0, a1 # arg0 <- len
17010 JAL(dvmThrowNegativeArraySizeException) # (len)
17011 b common_exceptionThrown
17014 * Invocation of a non-existent method.
17015 * On entry: method name in a1
17017 common_errNoSuchMethod:
17020 JAL(dvmThrowNoSuchMethodError)
17021 b common_exceptionThrown
17024 * We encountered a null object when we weren't expecting one. We
17025 * export the PC, throw a NullPointerException, and goto the exception
17028 common_errNullObject:
17031 JAL(dvmThrowNullPointerException)
17032 b common_exceptionThrown
17035 * For debugging, cause an immediate fault. The source address will be in ra. Use a jal to jump here.
17038 lw zero,-4(zero) # generate SIGSEGV
17041 * Spit out a "we were here", preserving all registers.
17047 LOAD_IMM(a1, \num);
17061 * Spit out the number in a0, preserving registers.
17072 * Print a newline, preserving registers.
17074 common_printNewline:
17076 la a0, .LstrNewline
17082 * Print the 32-bit quantity in a0 as a hex value, preserving registers.
17087 la a0, .LstrPrintHex
17093 * Print the 64-bit quantity in a0-a1, preserving registers.
17099 la a0, .LstrPrintLong
17105 * Print full method info. Pass the Method* in a0. Preserves regs.
17107 common_printMethod:
17109 JAL(dvmMterpPrintMethod)
17114 * Call a C helper function that dumps regs and possibly some
17115 * additional info. Requires the C function to be compiled in.
17120 JAL(dvmMterpDumpMipsRegs)
17126 * Zero-terminated ASCII string data.
17130 .LstrBadEntryPoint:
17131 .asciiz "Bad entry point %d\n"
17133 .asciiz "divide by zero"
17134 .LstrFilledNewArrayNotImpl:
17135 .asciiz "filled-new-array only implemented for 'int'"
17138 .LstrExceptionNotCaughtLocally:
17139 .asciiz "Exception %s from %s:%d not caught locally\n"
17151 .global dvmAsmAltInstructionStart
17152 .type dvmAsmAltInstructionStart, %function
17155 dvmAsmAltInstructionStart = .L_ALT_OP_NOP
17156 /* ------------------------------ */
17158 .L_ALT_OP_NOP: /* 0x00 */
17159 /* File: mips/alt_stub.S */
17161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17162 * any interesting requests and then jump to the real instruction
17163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17166 * bail to the real handler if breakFlags==0.
17168 lbu a3, offThread_breakFlags(rSELF)
17169 la rBIX, dvmAsmInstructionStart + (0 * 128)
17170 lw rIBASE, offThread_curHandlerTable(rSELF)
17172 jr rBIX # nothing to do - jump to real handler
17175 move a0, rPC # arg0
17176 move a1, rFP # arg1
17177 move a2, rSELF # arg2
17178 JAL(dvmCheckBefore)
17181 /* ------------------------------ */
17183 .L_ALT_OP_MOVE: /* 0x01 */
17184 /* File: mips/alt_stub.S */
17186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17187 * any interesting requests and then jump to the real instruction
17188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17191 * bail to the real handler if breakFlags==0.
17193 lbu a3, offThread_breakFlags(rSELF)
17194 la rBIX, dvmAsmInstructionStart + (1 * 128)
17195 lw rIBASE, offThread_curHandlerTable(rSELF)
17197 jr rBIX # nothing to do - jump to real handler
17200 move a0, rPC # arg0
17201 move a1, rFP # arg1
17202 move a2, rSELF # arg2
17203 JAL(dvmCheckBefore)
17206 /* ------------------------------ */
17208 .L_ALT_OP_MOVE_FROM16: /* 0x02 */
17209 /* File: mips/alt_stub.S */
17211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17212 * any interesting requests and then jump to the real instruction
17213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17216 * bail to the real handler if breakFlags==0.
17218 lbu a3, offThread_breakFlags(rSELF)
17219 la rBIX, dvmAsmInstructionStart + (2 * 128)
17220 lw rIBASE, offThread_curHandlerTable(rSELF)
17222 jr rBIX # nothing to do - jump to real handler
17225 move a0, rPC # arg0
17226 move a1, rFP # arg1
17227 move a2, rSELF # arg2
17228 JAL(dvmCheckBefore)
17231 /* ------------------------------ */
17233 .L_ALT_OP_MOVE_16: /* 0x03 */
17234 /* File: mips/alt_stub.S */
17236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17237 * any interesting requests and then jump to the real instruction
17238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17241 * bail to the real handler if breakFlags==0.
17243 lbu a3, offThread_breakFlags(rSELF)
17244 la rBIX, dvmAsmInstructionStart + (3 * 128)
17245 lw rIBASE, offThread_curHandlerTable(rSELF)
17247 jr rBIX # nothing to do - jump to real handler
17250 move a0, rPC # arg0
17251 move a1, rFP # arg1
17252 move a2, rSELF # arg2
17253 JAL(dvmCheckBefore)
17256 /* ------------------------------ */
17258 .L_ALT_OP_MOVE_WIDE: /* 0x04 */
17259 /* File: mips/alt_stub.S */
17261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17262 * any interesting requests and then jump to the real instruction
17263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17266 * bail to the real handler if breakFlags==0.
17268 lbu a3, offThread_breakFlags(rSELF)
17269 la rBIX, dvmAsmInstructionStart + (4 * 128)
17270 lw rIBASE, offThread_curHandlerTable(rSELF)
17272 jr rBIX # nothing to do - jump to real handler
17275 move a0, rPC # arg0
17276 move a1, rFP # arg1
17277 move a2, rSELF # arg2
17278 JAL(dvmCheckBefore)
17281 /* ------------------------------ */
17283 .L_ALT_OP_MOVE_WIDE_FROM16: /* 0x05 */
17284 /* File: mips/alt_stub.S */
17286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17287 * any interesting requests and then jump to the real instruction
17288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17291 * bail to the real handler if breakFlags==0.
17293 lbu a3, offThread_breakFlags(rSELF)
17294 la rBIX, dvmAsmInstructionStart + (5 * 128)
17295 lw rIBASE, offThread_curHandlerTable(rSELF)
17297 jr rBIX # nothing to do - jump to real handler
17300 move a0, rPC # arg0
17301 move a1, rFP # arg1
17302 move a2, rSELF # arg2
17303 JAL(dvmCheckBefore)
17306 /* ------------------------------ */
17308 .L_ALT_OP_MOVE_WIDE_16: /* 0x06 */
17309 /* File: mips/alt_stub.S */
17311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17312 * any interesting requests and then jump to the real instruction
17313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17316 * bail to the real handler if breakFlags==0.
17318 lbu a3, offThread_breakFlags(rSELF)
17319 la rBIX, dvmAsmInstructionStart + (6 * 128)
17320 lw rIBASE, offThread_curHandlerTable(rSELF)
17322 jr rBIX # nothing to do - jump to real handler
17325 move a0, rPC # arg0
17326 move a1, rFP # arg1
17327 move a2, rSELF # arg2
17328 JAL(dvmCheckBefore)
17331 /* ------------------------------ */
17333 .L_ALT_OP_MOVE_OBJECT: /* 0x07 */
17334 /* File: mips/alt_stub.S */
17336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17337 * any interesting requests and then jump to the real instruction
17338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17341 * bail to the real handler if breakFlags==0.
17343 lbu a3, offThread_breakFlags(rSELF)
17344 la rBIX, dvmAsmInstructionStart + (7 * 128)
17345 lw rIBASE, offThread_curHandlerTable(rSELF)
17347 jr rBIX # nothing to do - jump to real handler
17350 move a0, rPC # arg0
17351 move a1, rFP # arg1
17352 move a2, rSELF # arg2
17353 JAL(dvmCheckBefore)
17356 /* ------------------------------ */
17358 .L_ALT_OP_MOVE_OBJECT_FROM16: /* 0x08 */
17359 /* File: mips/alt_stub.S */
17361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17362 * any interesting requests and then jump to the real instruction
17363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17366 * bail to the real handler if breakFlags==0.
17368 lbu a3, offThread_breakFlags(rSELF)
17369 la rBIX, dvmAsmInstructionStart + (8 * 128)
17370 lw rIBASE, offThread_curHandlerTable(rSELF)
17372 jr rBIX # nothing to do - jump to real handler
17375 move a0, rPC # arg0
17376 move a1, rFP # arg1
17377 move a2, rSELF # arg2
17378 JAL(dvmCheckBefore)
17381 /* ------------------------------ */
17383 .L_ALT_OP_MOVE_OBJECT_16: /* 0x09 */
17384 /* File: mips/alt_stub.S */
17386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17387 * any interesting requests and then jump to the real instruction
17388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17391 * bail to the real handler if breakFlags==0.
17393 lbu a3, offThread_breakFlags(rSELF)
17394 la rBIX, dvmAsmInstructionStart + (9 * 128)
17395 lw rIBASE, offThread_curHandlerTable(rSELF)
17397 jr rBIX # nothing to do - jump to real handler
17400 move a0, rPC # arg0
17401 move a1, rFP # arg1
17402 move a2, rSELF # arg2
17403 JAL(dvmCheckBefore)
17406 /* ------------------------------ */
17408 .L_ALT_OP_MOVE_RESULT: /* 0x0a */
17409 /* File: mips/alt_stub.S */
17411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17412 * any interesting requests and then jump to the real instruction
17413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17416 * bail to the real handler if breakFlags==0.
17418 lbu a3, offThread_breakFlags(rSELF)
17419 la rBIX, dvmAsmInstructionStart + (10 * 128)
17420 lw rIBASE, offThread_curHandlerTable(rSELF)
17422 jr rBIX # nothing to do - jump to real handler
17425 move a0, rPC # arg0
17426 move a1, rFP # arg1
17427 move a2, rSELF # arg2
17428 JAL(dvmCheckBefore)
17431 /* ------------------------------ */
17433 .L_ALT_OP_MOVE_RESULT_WIDE: /* 0x0b */
17434 /* File: mips/alt_stub.S */
17436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17437 * any interesting requests and then jump to the real instruction
17438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17441 * bail to the real handler if breakFlags==0.
17443 lbu a3, offThread_breakFlags(rSELF)
17444 la rBIX, dvmAsmInstructionStart + (11 * 128)
17445 lw rIBASE, offThread_curHandlerTable(rSELF)
17447 jr rBIX # nothing to do - jump to real handler
17450 move a0, rPC # arg0
17451 move a1, rFP # arg1
17452 move a2, rSELF # arg2
17453 JAL(dvmCheckBefore)
17456 /* ------------------------------ */
17458 .L_ALT_OP_MOVE_RESULT_OBJECT: /* 0x0c */
17459 /* File: mips/alt_stub.S */
17461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17462 * any interesting requests and then jump to the real instruction
17463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17466 * bail to the real handler if breakFlags==0.
17468 lbu a3, offThread_breakFlags(rSELF)
17469 la rBIX, dvmAsmInstructionStart + (12 * 128)
17470 lw rIBASE, offThread_curHandlerTable(rSELF)
17472 jr rBIX # nothing to do - jump to real handler
17475 move a0, rPC # arg0
17476 move a1, rFP # arg1
17477 move a2, rSELF # arg2
17478 JAL(dvmCheckBefore)
17481 /* ------------------------------ */
17483 .L_ALT_OP_MOVE_EXCEPTION: /* 0x0d */
17484 /* File: mips/alt_stub.S */
17486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17487 * any interesting requests and then jump to the real instruction
17488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17491 * bail to the real handler if breakFlags==0.
17493 lbu a3, offThread_breakFlags(rSELF)
17494 la rBIX, dvmAsmInstructionStart + (13 * 128)
17495 lw rIBASE, offThread_curHandlerTable(rSELF)
17497 jr rBIX # nothing to do - jump to real handler
17500 move a0, rPC # arg0
17501 move a1, rFP # arg1
17502 move a2, rSELF # arg2
17503 JAL(dvmCheckBefore)
17506 /* ------------------------------ */
17508 .L_ALT_OP_RETURN_VOID: /* 0x0e */
17509 /* File: mips/alt_stub.S */
17511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17512 * any interesting requests and then jump to the real instruction
17513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17516 * bail to the real handler if breakFlags==0.
17518 lbu a3, offThread_breakFlags(rSELF)
17519 la rBIX, dvmAsmInstructionStart + (14 * 128)
17520 lw rIBASE, offThread_curHandlerTable(rSELF)
17522 jr rBIX # nothing to do - jump to real handler
17525 move a0, rPC # arg0
17526 move a1, rFP # arg1
17527 move a2, rSELF # arg2
17528 JAL(dvmCheckBefore)
17531 /* ------------------------------ */
17533 .L_ALT_OP_RETURN: /* 0x0f */
17534 /* File: mips/alt_stub.S */
17536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17537 * any interesting requests and then jump to the real instruction
17538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17541 * bail to the real handler if breakFlags==0.
17543 lbu a3, offThread_breakFlags(rSELF)
17544 la rBIX, dvmAsmInstructionStart + (15 * 128)
17545 lw rIBASE, offThread_curHandlerTable(rSELF)
17547 jr rBIX # nothing to do - jump to real handler
17550 move a0, rPC # arg0
17551 move a1, rFP # arg1
17552 move a2, rSELF # arg2
17553 JAL(dvmCheckBefore)
17556 /* ------------------------------ */
17558 .L_ALT_OP_RETURN_WIDE: /* 0x10 */
17559 /* File: mips/alt_stub.S */
17561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17562 * any interesting requests and then jump to the real instruction
17563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17566 * bail to the real handler if breakFlags==0.
17568 lbu a3, offThread_breakFlags(rSELF)
17569 la rBIX, dvmAsmInstructionStart + (16 * 128)
17570 lw rIBASE, offThread_curHandlerTable(rSELF)
17572 jr rBIX # nothing to do - jump to real handler
17575 move a0, rPC # arg0
17576 move a1, rFP # arg1
17577 move a2, rSELF # arg2
17578 JAL(dvmCheckBefore)
17581 /* ------------------------------ */
17583 .L_ALT_OP_RETURN_OBJECT: /* 0x11 */
17584 /* File: mips/alt_stub.S */
17586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17587 * any interesting requests and then jump to the real instruction
17588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17591 * bail to the real handler if breakFlags==0.
17593 lbu a3, offThread_breakFlags(rSELF)
17594 la rBIX, dvmAsmInstructionStart + (17 * 128)
17595 lw rIBASE, offThread_curHandlerTable(rSELF)
17597 jr rBIX # nothing to do - jump to real handler
17600 move a0, rPC # arg0
17601 move a1, rFP # arg1
17602 move a2, rSELF # arg2
17603 JAL(dvmCheckBefore)
17606 /* ------------------------------ */
17608 .L_ALT_OP_CONST_4: /* 0x12 */
17609 /* File: mips/alt_stub.S */
17611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17612 * any interesting requests and then jump to the real instruction
17613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17616 * bail to the real handler if breakFlags==0.
17618 lbu a3, offThread_breakFlags(rSELF)
17619 la rBIX, dvmAsmInstructionStart + (18 * 128)
17620 lw rIBASE, offThread_curHandlerTable(rSELF)
17622 jr rBIX # nothing to do - jump to real handler
17625 move a0, rPC # arg0
17626 move a1, rFP # arg1
17627 move a2, rSELF # arg2
17628 JAL(dvmCheckBefore)
17631 /* ------------------------------ */
17633 .L_ALT_OP_CONST_16: /* 0x13 */
17634 /* File: mips/alt_stub.S */
17636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17637 * any interesting requests and then jump to the real instruction
17638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17641 * bail to the real handler if breakFlags==0.
17643 lbu a3, offThread_breakFlags(rSELF)
17644 la rBIX, dvmAsmInstructionStart + (19 * 128)
17645 lw rIBASE, offThread_curHandlerTable(rSELF)
17647 jr rBIX # nothing to do - jump to real handler
17650 move a0, rPC # arg0
17651 move a1, rFP # arg1
17652 move a2, rSELF # arg2
17653 JAL(dvmCheckBefore)
17656 /* ------------------------------ */
17658 .L_ALT_OP_CONST: /* 0x14 */
17659 /* File: mips/alt_stub.S */
17661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17662 * any interesting requests and then jump to the real instruction
17663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17666 * bail to the real handler if breakFlags==0.
17668 lbu a3, offThread_breakFlags(rSELF)
17669 la rBIX, dvmAsmInstructionStart + (20 * 128)
17670 lw rIBASE, offThread_curHandlerTable(rSELF)
17672 jr rBIX # nothing to do - jump to real handler
17675 move a0, rPC # arg0
17676 move a1, rFP # arg1
17677 move a2, rSELF # arg2
17678 JAL(dvmCheckBefore)
17681 /* ------------------------------ */
17683 .L_ALT_OP_CONST_HIGH16: /* 0x15 */
17684 /* File: mips/alt_stub.S */
17686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17687 * any interesting requests and then jump to the real instruction
17688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17691 * bail to the real handler if breakFlags==0.
17693 lbu a3, offThread_breakFlags(rSELF)
17694 la rBIX, dvmAsmInstructionStart + (21 * 128)
17695 lw rIBASE, offThread_curHandlerTable(rSELF)
17697 jr rBIX # nothing to do - jump to real handler
17700 move a0, rPC # arg0
17701 move a1, rFP # arg1
17702 move a2, rSELF # arg2
17703 JAL(dvmCheckBefore)
17706 /* ------------------------------ */
17708 .L_ALT_OP_CONST_WIDE_16: /* 0x16 */
17709 /* File: mips/alt_stub.S */
17711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17712 * any interesting requests and then jump to the real instruction
17713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17716 * bail to the real handler if breakFlags==0.
17718 lbu a3, offThread_breakFlags(rSELF)
17719 la rBIX, dvmAsmInstructionStart + (22 * 128)
17720 lw rIBASE, offThread_curHandlerTable(rSELF)
17722 jr rBIX # nothing to do - jump to real handler
17725 move a0, rPC # arg0
17726 move a1, rFP # arg1
17727 move a2, rSELF # arg2
17728 JAL(dvmCheckBefore)
17731 /* ------------------------------ */
17733 .L_ALT_OP_CONST_WIDE_32: /* 0x17 */
17734 /* File: mips/alt_stub.S */
17736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17737 * any interesting requests and then jump to the real instruction
17738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17741 * bail to the real handler if breakFlags==0.
17743 lbu a3, offThread_breakFlags(rSELF)
17744 la rBIX, dvmAsmInstructionStart + (23 * 128)
17745 lw rIBASE, offThread_curHandlerTable(rSELF)
17747 jr rBIX # nothing to do - jump to real handler
17750 move a0, rPC # arg0
17751 move a1, rFP # arg1
17752 move a2, rSELF # arg2
17753 JAL(dvmCheckBefore)
17756 /* ------------------------------ */
17758 .L_ALT_OP_CONST_WIDE: /* 0x18 */
17759 /* File: mips/alt_stub.S */
17761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17762 * any interesting requests and then jump to the real instruction
17763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17766 * bail to the real handler if breakFlags==0.
17768 lbu a3, offThread_breakFlags(rSELF)
17769 la rBIX, dvmAsmInstructionStart + (24 * 128)
17770 lw rIBASE, offThread_curHandlerTable(rSELF)
17772 jr rBIX # nothing to do - jump to real handler
17775 move a0, rPC # arg0
17776 move a1, rFP # arg1
17777 move a2, rSELF # arg2
17778 JAL(dvmCheckBefore)
17781 /* ------------------------------ */
17783 .L_ALT_OP_CONST_WIDE_HIGH16: /* 0x19 */
17784 /* File: mips/alt_stub.S */
17786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17787 * any interesting requests and then jump to the real instruction
17788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17791 * bail to the real handler if breakFlags==0.
17793 lbu a3, offThread_breakFlags(rSELF)
17794 la rBIX, dvmAsmInstructionStart + (25 * 128)
17795 lw rIBASE, offThread_curHandlerTable(rSELF)
17797 jr rBIX # nothing to do - jump to real handler
17800 move a0, rPC # arg0
17801 move a1, rFP # arg1
17802 move a2, rSELF # arg2
17803 JAL(dvmCheckBefore)
17806 /* ------------------------------ */
17808 .L_ALT_OP_CONST_STRING: /* 0x1a */
17809 /* File: mips/alt_stub.S */
17811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17812 * any interesting requests and then jump to the real instruction
17813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17816 * bail to the real handler if breakFlags==0.
17818 lbu a3, offThread_breakFlags(rSELF)
17819 la rBIX, dvmAsmInstructionStart + (26 * 128)
17820 lw rIBASE, offThread_curHandlerTable(rSELF)
17822 jr rBIX # nothing to do - jump to real handler
17825 move a0, rPC # arg0
17826 move a1, rFP # arg1
17827 move a2, rSELF # arg2
17828 JAL(dvmCheckBefore)
17831 /* ------------------------------ */
17833 .L_ALT_OP_CONST_STRING_JUMBO: /* 0x1b */
17834 /* File: mips/alt_stub.S */
17836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17837 * any interesting requests and then jump to the real instruction
17838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17841 * bail to the real handler if breakFlags==0.
17843 lbu a3, offThread_breakFlags(rSELF)
17844 la rBIX, dvmAsmInstructionStart + (27 * 128)
17845 lw rIBASE, offThread_curHandlerTable(rSELF)
17847 jr rBIX # nothing to do - jump to real handler
17850 move a0, rPC # arg0
17851 move a1, rFP # arg1
17852 move a2, rSELF # arg2
17853 JAL(dvmCheckBefore)
17856 /* ------------------------------ */
17858 .L_ALT_OP_CONST_CLASS: /* 0x1c */
17859 /* File: mips/alt_stub.S */
17861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17862 * any interesting requests and then jump to the real instruction
17863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17866 * bail to the real handler if breakFlags==0.
17868 lbu a3, offThread_breakFlags(rSELF)
17869 la rBIX, dvmAsmInstructionStart + (28 * 128)
17870 lw rIBASE, offThread_curHandlerTable(rSELF)
17872 jr rBIX # nothing to do - jump to real handler
17875 move a0, rPC # arg0
17876 move a1, rFP # arg1
17877 move a2, rSELF # arg2
17878 JAL(dvmCheckBefore)
17881 /* ------------------------------ */
17883 .L_ALT_OP_MONITOR_ENTER: /* 0x1d */
17884 /* File: mips/alt_stub.S */
17886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17887 * any interesting requests and then jump to the real instruction
17888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17891 * bail to the real handler if breakFlags==0.
17893 lbu a3, offThread_breakFlags(rSELF)
17894 la rBIX, dvmAsmInstructionStart + (29 * 128)
17895 lw rIBASE, offThread_curHandlerTable(rSELF)
17897 jr rBIX # nothing to do - jump to real handler
17900 move a0, rPC # arg0
17901 move a1, rFP # arg1
17902 move a2, rSELF # arg2
17903 JAL(dvmCheckBefore)
17906 /* ------------------------------ */
17908 .L_ALT_OP_MONITOR_EXIT: /* 0x1e */
17909 /* File: mips/alt_stub.S */
17911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17912 * any interesting requests and then jump to the real instruction
17913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17916 * bail to the real handler if breakFlags==0.
17918 lbu a3, offThread_breakFlags(rSELF)
17919 la rBIX, dvmAsmInstructionStart + (30 * 128)
17920 lw rIBASE, offThread_curHandlerTable(rSELF)
17922 jr rBIX # nothing to do - jump to real handler
17925 move a0, rPC # arg0
17926 move a1, rFP # arg1
17927 move a2, rSELF # arg2
17928 JAL(dvmCheckBefore)
17931 /* ------------------------------ */
17933 .L_ALT_OP_CHECK_CAST: /* 0x1f */
17934 /* File: mips/alt_stub.S */
17936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17937 * any interesting requests and then jump to the real instruction
17938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17941 * bail to the real handler if breakFlags==0.
17943 lbu a3, offThread_breakFlags(rSELF)
17944 la rBIX, dvmAsmInstructionStart + (31 * 128)
17945 lw rIBASE, offThread_curHandlerTable(rSELF)
17947 jr rBIX # nothing to do - jump to real handler
17950 move a0, rPC # arg0
17951 move a1, rFP # arg1
17952 move a2, rSELF # arg2
17953 JAL(dvmCheckBefore)
17956 /* ------------------------------ */
17958 .L_ALT_OP_INSTANCE_OF: /* 0x20 */
17959 /* File: mips/alt_stub.S */
17961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17962 * any interesting requests and then jump to the real instruction
17963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17966 * bail to the real handler if breakFlags==0.
17968 lbu a3, offThread_breakFlags(rSELF)
17969 la rBIX, dvmAsmInstructionStart + (32 * 128)
17970 lw rIBASE, offThread_curHandlerTable(rSELF)
17972 jr rBIX # nothing to do - jump to real handler
17975 move a0, rPC # arg0
17976 move a1, rFP # arg1
17977 move a2, rSELF # arg2
17978 JAL(dvmCheckBefore)
17981 /* ------------------------------ */
17983 .L_ALT_OP_ARRAY_LENGTH: /* 0x21 */
17984 /* File: mips/alt_stub.S */
17986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
17987 * any interesting requests and then jump to the real instruction
17988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
17989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
17990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
17991 * bail to the real handler if breakFlags==0.
17993 lbu a3, offThread_breakFlags(rSELF)
17994 la rBIX, dvmAsmInstructionStart + (33 * 128)
17995 lw rIBASE, offThread_curHandlerTable(rSELF)
17997 jr rBIX # nothing to do - jump to real handler
18000 move a0, rPC # arg0
18001 move a1, rFP # arg1
18002 move a2, rSELF # arg2
18003 JAL(dvmCheckBefore)
18006 /* ------------------------------ */
18008 .L_ALT_OP_NEW_INSTANCE: /* 0x22 */
18009 /* File: mips/alt_stub.S */
18011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18012 * any interesting requests and then jump to the real instruction
18013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18016 * bail to the real handler if breakFlags==0.
18018 lbu a3, offThread_breakFlags(rSELF)
18019 la rBIX, dvmAsmInstructionStart + (34 * 128)
18020 lw rIBASE, offThread_curHandlerTable(rSELF)
18022 jr rBIX # nothing to do - jump to real handler
18025 move a0, rPC # arg0
18026 move a1, rFP # arg1
18027 move a2, rSELF # arg2
18028 JAL(dvmCheckBefore)
18031 /* ------------------------------ */
18033 .L_ALT_OP_NEW_ARRAY: /* 0x23 */
18034 /* File: mips/alt_stub.S */
18036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18037 * any interesting requests and then jump to the real instruction
18038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18041 * bail to the real handler if breakFlags==0.
18043 lbu a3, offThread_breakFlags(rSELF)
18044 la rBIX, dvmAsmInstructionStart + (35 * 128)
18045 lw rIBASE, offThread_curHandlerTable(rSELF)
18047 jr rBIX # nothing to do - jump to real handler
18050 move a0, rPC # arg0
18051 move a1, rFP # arg1
18052 move a2, rSELF # arg2
18053 JAL(dvmCheckBefore)
18056 /* ------------------------------ */
18058 .L_ALT_OP_FILLED_NEW_ARRAY: /* 0x24 */
18059 /* File: mips/alt_stub.S */
18061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18062 * any interesting requests and then jump to the real instruction
18063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18066 * bail to the real handler if breakFlags==0.
18068 lbu a3, offThread_breakFlags(rSELF)
18069 la rBIX, dvmAsmInstructionStart + (36 * 128)
18070 lw rIBASE, offThread_curHandlerTable(rSELF)
18072 jr rBIX # nothing to do - jump to real handler
18075 move a0, rPC # arg0
18076 move a1, rFP # arg1
18077 move a2, rSELF # arg2
18078 JAL(dvmCheckBefore)
18081 /* ------------------------------ */
18083 .L_ALT_OP_FILLED_NEW_ARRAY_RANGE: /* 0x25 */
18084 /* File: mips/alt_stub.S */
18086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18087 * any interesting requests and then jump to the real instruction
18088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18091 * bail to the real handler if breakFlags==0.
18093 lbu a3, offThread_breakFlags(rSELF)
18094 la rBIX, dvmAsmInstructionStart + (37 * 128)
18095 lw rIBASE, offThread_curHandlerTable(rSELF)
18097 jr rBIX # nothing to do - jump to real handler
18100 move a0, rPC # arg0
18101 move a1, rFP # arg1
18102 move a2, rSELF # arg2
18103 JAL(dvmCheckBefore)
18106 /* ------------------------------ */
18108 .L_ALT_OP_FILL_ARRAY_DATA: /* 0x26 */
18109 /* File: mips/alt_stub.S */
18111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18112 * any interesting requests and then jump to the real instruction
18113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18116 * bail to the real handler if breakFlags==0.
18118 lbu a3, offThread_breakFlags(rSELF)
18119 la rBIX, dvmAsmInstructionStart + (38 * 128)
18120 lw rIBASE, offThread_curHandlerTable(rSELF)
18122 jr rBIX # nothing to do - jump to real handler
18125 move a0, rPC # arg0
18126 move a1, rFP # arg1
18127 move a2, rSELF # arg2
18128 JAL(dvmCheckBefore)
18131 /* ------------------------------ */
18133 .L_ALT_OP_THROW: /* 0x27 */
18134 /* File: mips/alt_stub.S */
18136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18137 * any interesting requests and then jump to the real instruction
18138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18141 * bail to the real handler if breakFlags==0.
18143 lbu a3, offThread_breakFlags(rSELF)
18144 la rBIX, dvmAsmInstructionStart + (39 * 128)
18145 lw rIBASE, offThread_curHandlerTable(rSELF)
18147 jr rBIX # nothing to do - jump to real handler
18150 move a0, rPC # arg0
18151 move a1, rFP # arg1
18152 move a2, rSELF # arg2
18153 JAL(dvmCheckBefore)
18156 /* ------------------------------ */
18158 .L_ALT_OP_GOTO: /* 0x28 */
18159 /* File: mips/alt_stub.S */
18161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18162 * any interesting requests and then jump to the real instruction
18163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18166 * bail to the real handler if breakFlags==0.
18168 lbu a3, offThread_breakFlags(rSELF)
18169 la rBIX, dvmAsmInstructionStart + (40 * 128)
18170 lw rIBASE, offThread_curHandlerTable(rSELF)
18172 jr rBIX # nothing to do - jump to real handler
18175 move a0, rPC # arg0
18176 move a1, rFP # arg1
18177 move a2, rSELF # arg2
18178 JAL(dvmCheckBefore)
18181 /* ------------------------------ */
18183 .L_ALT_OP_GOTO_16: /* 0x29 */
18184 /* File: mips/alt_stub.S */
18186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18187 * any interesting requests and then jump to the real instruction
18188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18191 * bail to the real handler if breakFlags==0.
18193 lbu a3, offThread_breakFlags(rSELF)
18194 la rBIX, dvmAsmInstructionStart + (41 * 128)
18195 lw rIBASE, offThread_curHandlerTable(rSELF)
18197 jr rBIX # nothing to do - jump to real handler
18200 move a0, rPC # arg0
18201 move a1, rFP # arg1
18202 move a2, rSELF # arg2
18203 JAL(dvmCheckBefore)
18206 /* ------------------------------ */
18208 .L_ALT_OP_GOTO_32: /* 0x2a */
18209 /* File: mips/alt_stub.S */
18211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18212 * any interesting requests and then jump to the real instruction
18213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18216 * bail to the real handler if breakFlags==0.
18218 lbu a3, offThread_breakFlags(rSELF)
18219 la rBIX, dvmAsmInstructionStart + (42 * 128)
18220 lw rIBASE, offThread_curHandlerTable(rSELF)
18222 jr rBIX # nothing to do - jump to real handler
18225 move a0, rPC # arg0
18226 move a1, rFP # arg1
18227 move a2, rSELF # arg2
18228 JAL(dvmCheckBefore)
18231 /* ------------------------------ */
18233 .L_ALT_OP_PACKED_SWITCH: /* 0x2b */
18234 /* File: mips/alt_stub.S */
18236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18237 * any interesting requests and then jump to the real instruction
18238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18241 * bail to the real handler if breakFlags==0.
18243 lbu a3, offThread_breakFlags(rSELF)
18244 la rBIX, dvmAsmInstructionStart + (43 * 128)
18245 lw rIBASE, offThread_curHandlerTable(rSELF)
18247 jr rBIX # nothing to do - jump to real handler
18250 move a0, rPC # arg0
18251 move a1, rFP # arg1
18252 move a2, rSELF # arg2
18253 JAL(dvmCheckBefore)
18256 /* ------------------------------ */
18258 .L_ALT_OP_SPARSE_SWITCH: /* 0x2c */
18259 /* File: mips/alt_stub.S */
18261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18262 * any interesting requests and then jump to the real instruction
18263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18266 * bail to the real handler if breakFlags==0.
18268 lbu a3, offThread_breakFlags(rSELF)
18269 la rBIX, dvmAsmInstructionStart + (44 * 128)
18270 lw rIBASE, offThread_curHandlerTable(rSELF)
18272 jr rBIX # nothing to do - jump to real handler
18275 move a0, rPC # arg0
18276 move a1, rFP # arg1
18277 move a2, rSELF # arg2
18278 JAL(dvmCheckBefore)
18281 /* ------------------------------ */
18283 .L_ALT_OP_CMPL_FLOAT: /* 0x2d */
18284 /* File: mips/alt_stub.S */
18286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18287 * any interesting requests and then jump to the real instruction
18288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18291 * bail to the real handler if breakFlags==0.
18293 lbu a3, offThread_breakFlags(rSELF)
18294 la rBIX, dvmAsmInstructionStart + (45 * 128)
18295 lw rIBASE, offThread_curHandlerTable(rSELF)
18297 jr rBIX # nothing to do - jump to real handler
18300 move a0, rPC # arg0
18301 move a1, rFP # arg1
18302 move a2, rSELF # arg2
18303 JAL(dvmCheckBefore)
18306 /* ------------------------------ */
18308 .L_ALT_OP_CMPG_FLOAT: /* 0x2e */
18309 /* File: mips/alt_stub.S */
18311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18312 * any interesting requests and then jump to the real instruction
18313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18316 * bail to the real handler if breakFlags==0.
18318 lbu a3, offThread_breakFlags(rSELF)
18319 la rBIX, dvmAsmInstructionStart + (46 * 128)
18320 lw rIBASE, offThread_curHandlerTable(rSELF)
18322 jr rBIX # nothing to do - jump to real handler
18325 move a0, rPC # arg0
18326 move a1, rFP # arg1
18327 move a2, rSELF # arg2
18328 JAL(dvmCheckBefore)
18331 /* ------------------------------ */
18333 .L_ALT_OP_CMPL_DOUBLE: /* 0x2f */
18334 /* File: mips/alt_stub.S */
18336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18337 * any interesting requests and then jump to the real instruction
18338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18341 * bail to the real handler if breakFlags==0.
18343 lbu a3, offThread_breakFlags(rSELF)
18344 la rBIX, dvmAsmInstructionStart + (47 * 128)
18345 lw rIBASE, offThread_curHandlerTable(rSELF)
18347 jr rBIX # nothing to do - jump to real handler
18350 move a0, rPC # arg0
18351 move a1, rFP # arg1
18352 move a2, rSELF # arg2
18353 JAL(dvmCheckBefore)
18356 /* ------------------------------ */
18358 .L_ALT_OP_CMPG_DOUBLE: /* 0x30 */
18359 /* File: mips/alt_stub.S */
18361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18362 * any interesting requests and then jump to the real instruction
18363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18366 * bail to the real handler if breakFlags==0.
18368 lbu a3, offThread_breakFlags(rSELF)
18369 la rBIX, dvmAsmInstructionStart + (48 * 128)
18370 lw rIBASE, offThread_curHandlerTable(rSELF)
18372 jr rBIX # nothing to do - jump to real handler
18375 move a0, rPC # arg0
18376 move a1, rFP # arg1
18377 move a2, rSELF # arg2
18378 JAL(dvmCheckBefore)
18381 /* ------------------------------ */
18383 .L_ALT_OP_CMP_LONG: /* 0x31 */
18384 /* File: mips/alt_stub.S */
18386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18387 * any interesting requests and then jump to the real instruction
18388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18391 * bail to the real handler if breakFlags==0.
18393 lbu a3, offThread_breakFlags(rSELF)
18394 la rBIX, dvmAsmInstructionStart + (49 * 128)
18395 lw rIBASE, offThread_curHandlerTable(rSELF)
18397 jr rBIX # nothing to do - jump to real handler
18400 move a0, rPC # arg0
18401 move a1, rFP # arg1
18402 move a2, rSELF # arg2
18403 JAL(dvmCheckBefore)
18406 /* ------------------------------ */
18408 .L_ALT_OP_IF_EQ: /* 0x32 */
18409 /* File: mips/alt_stub.S */
18411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18412 * any interesting requests and then jump to the real instruction
18413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18416 * bail to the real handler if breakFlags==0.
18418 lbu a3, offThread_breakFlags(rSELF)
18419 la rBIX, dvmAsmInstructionStart + (50 * 128)
18420 lw rIBASE, offThread_curHandlerTable(rSELF)
18422 jr rBIX # nothing to do - jump to real handler
18425 move a0, rPC # arg0
18426 move a1, rFP # arg1
18427 move a2, rSELF # arg2
18428 JAL(dvmCheckBefore)
18431 /* ------------------------------ */
18433 .L_ALT_OP_IF_NE: /* 0x33 */
18434 /* File: mips/alt_stub.S */
18436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18437 * any interesting requests and then jump to the real instruction
18438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18441 * bail to the real handler if breakFlags==0.
18443 lbu a3, offThread_breakFlags(rSELF)
18444 la rBIX, dvmAsmInstructionStart + (51 * 128)
18445 lw rIBASE, offThread_curHandlerTable(rSELF)
18447 jr rBIX # nothing to do - jump to real handler
18450 move a0, rPC # arg0
18451 move a1, rFP # arg1
18452 move a2, rSELF # arg2
18453 JAL(dvmCheckBefore)
18456 /* ------------------------------ */
18458 .L_ALT_OP_IF_LT: /* 0x34 */
18459 /* File: mips/alt_stub.S */
18461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18462 * any interesting requests and then jump to the real instruction
18463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18466 * bail to the real handler if breakFlags==0.
18468 lbu a3, offThread_breakFlags(rSELF)
18469 la rBIX, dvmAsmInstructionStart + (52 * 128)
18470 lw rIBASE, offThread_curHandlerTable(rSELF)
18472 jr rBIX # nothing to do - jump to real handler
18475 move a0, rPC # arg0
18476 move a1, rFP # arg1
18477 move a2, rSELF # arg2
18478 JAL(dvmCheckBefore)
18481 /* ------------------------------ */
18483 .L_ALT_OP_IF_GE: /* 0x35 */
18484 /* File: mips/alt_stub.S */
18486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18487 * any interesting requests and then jump to the real instruction
18488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18491 * bail to the real handler if breakFlags==0.
18493 lbu a3, offThread_breakFlags(rSELF)
18494 la rBIX, dvmAsmInstructionStart + (53 * 128)
18495 lw rIBASE, offThread_curHandlerTable(rSELF)
18497 jr rBIX # nothing to do - jump to real handler
18500 move a0, rPC # arg0
18501 move a1, rFP # arg1
18502 move a2, rSELF # arg2
18503 JAL(dvmCheckBefore)
18506 /* ------------------------------ */
18508 .L_ALT_OP_IF_GT: /* 0x36 */
18509 /* File: mips/alt_stub.S */
18511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18512 * any interesting requests and then jump to the real instruction
18513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18516 * bail to the real handler if breakFlags==0.
18518 lbu a3, offThread_breakFlags(rSELF)
18519 la rBIX, dvmAsmInstructionStart + (54 * 128)
18520 lw rIBASE, offThread_curHandlerTable(rSELF)
18522 jr rBIX # nothing to do - jump to real handler
18525 move a0, rPC # arg0
18526 move a1, rFP # arg1
18527 move a2, rSELF # arg2
18528 JAL(dvmCheckBefore)
18531 /* ------------------------------ */
18533 .L_ALT_OP_IF_LE: /* 0x37 */
18534 /* File: mips/alt_stub.S */
18536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18537 * any interesting requests and then jump to the real instruction
18538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18541 * bail to the real handler if breakFlags==0.
18543 lbu a3, offThread_breakFlags(rSELF)
18544 la rBIX, dvmAsmInstructionStart + (55 * 128)
18545 lw rIBASE, offThread_curHandlerTable(rSELF)
18547 jr rBIX # nothing to do - jump to real handler
18550 move a0, rPC # arg0
18551 move a1, rFP # arg1
18552 move a2, rSELF # arg2
18553 JAL(dvmCheckBefore)
18556 /* ------------------------------ */
18558 .L_ALT_OP_IF_EQZ: /* 0x38 */
18559 /* File: mips/alt_stub.S */
18561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18562 * any interesting requests and then jump to the real instruction
18563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18566 * bail to the real handler if breakFlags==0.
18568 lbu a3, offThread_breakFlags(rSELF)
18569 la rBIX, dvmAsmInstructionStart + (56 * 128)
18570 lw rIBASE, offThread_curHandlerTable(rSELF)
18572 jr rBIX # nothing to do - jump to real handler
18575 move a0, rPC # arg0
18576 move a1, rFP # arg1
18577 move a2, rSELF # arg2
18578 JAL(dvmCheckBefore)
18581 /* ------------------------------ */
18583 .L_ALT_OP_IF_NEZ: /* 0x39 */
18584 /* File: mips/alt_stub.S */
18586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18587 * any interesting requests and then jump to the real instruction
18588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18591 * bail to the real handler if breakFlags==0.
18593 lbu a3, offThread_breakFlags(rSELF)
18594 la rBIX, dvmAsmInstructionStart + (57 * 128)
18595 lw rIBASE, offThread_curHandlerTable(rSELF)
18597 jr rBIX # nothing to do - jump to real handler
18600 move a0, rPC # arg0
18601 move a1, rFP # arg1
18602 move a2, rSELF # arg2
18603 JAL(dvmCheckBefore)
18606 /* ------------------------------ */
18608 .L_ALT_OP_IF_LTZ: /* 0x3a */
18609 /* File: mips/alt_stub.S */
18611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18612 * any interesting requests and then jump to the real instruction
18613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18616 * bail to the real handler if breakFlags==0.
18618 lbu a3, offThread_breakFlags(rSELF)
18619 la rBIX, dvmAsmInstructionStart + (58 * 128)
18620 lw rIBASE, offThread_curHandlerTable(rSELF)
18622 jr rBIX # nothing to do - jump to real handler
18625 move a0, rPC # arg0
18626 move a1, rFP # arg1
18627 move a2, rSELF # arg2
18628 JAL(dvmCheckBefore)
18631 /* ------------------------------ */
18633 .L_ALT_OP_IF_GEZ: /* 0x3b */
18634 /* File: mips/alt_stub.S */
18636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18637 * any interesting requests and then jump to the real instruction
18638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18641 * bail to the real handler if breakFlags==0.
18643 lbu a3, offThread_breakFlags(rSELF)
18644 la rBIX, dvmAsmInstructionStart + (59 * 128)
18645 lw rIBASE, offThread_curHandlerTable(rSELF)
18647 jr rBIX # nothing to do - jump to real handler
18650 move a0, rPC # arg0
18651 move a1, rFP # arg1
18652 move a2, rSELF # arg2
18653 JAL(dvmCheckBefore)
18656 /* ------------------------------ */
18658 .L_ALT_OP_IF_GTZ: /* 0x3c */
18659 /* File: mips/alt_stub.S */
18661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18662 * any interesting requests and then jump to the real instruction
18663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18666 * bail to the real handler if breakFlags==0.
18668 lbu a3, offThread_breakFlags(rSELF)
18669 la rBIX, dvmAsmInstructionStart + (60 * 128)
18670 lw rIBASE, offThread_curHandlerTable(rSELF)
18672 jr rBIX # nothing to do - jump to real handler
18675 move a0, rPC # arg0
18676 move a1, rFP # arg1
18677 move a2, rSELF # arg2
18678 JAL(dvmCheckBefore)
18681 /* ------------------------------ */
18683 .L_ALT_OP_IF_LEZ: /* 0x3d */
18684 /* File: mips/alt_stub.S */
18686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18687 * any interesting requests and then jump to the real instruction
18688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18691 * bail to the real handler if breakFlags==0.
18693 lbu a3, offThread_breakFlags(rSELF)
18694 la rBIX, dvmAsmInstructionStart + (61 * 128)
18695 lw rIBASE, offThread_curHandlerTable(rSELF)
18697 jr rBIX # nothing to do - jump to real handler
18700 move a0, rPC # arg0
18701 move a1, rFP # arg1
18702 move a2, rSELF # arg2
18703 JAL(dvmCheckBefore)
18706 /* ------------------------------ */
18708 .L_ALT_OP_UNUSED_3E: /* 0x3e */
18709 /* File: mips/alt_stub.S */
18711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18712 * any interesting requests and then jump to the real instruction
18713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18716 * bail to the real handler if breakFlags==0.
18718 lbu a3, offThread_breakFlags(rSELF)
18719 la rBIX, dvmAsmInstructionStart + (62 * 128)
18720 lw rIBASE, offThread_curHandlerTable(rSELF)
18722 jr rBIX # nothing to do - jump to real handler
18725 move a0, rPC # arg0
18726 move a1, rFP # arg1
18727 move a2, rSELF # arg2
18728 JAL(dvmCheckBefore)
18731 /* ------------------------------ */
18733 .L_ALT_OP_UNUSED_3F: /* 0x3f */
18734 /* File: mips/alt_stub.S */
18736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18737 * any interesting requests and then jump to the real instruction
18738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18741 * bail to the real handler if breakFlags==0.
18743 lbu a3, offThread_breakFlags(rSELF)
18744 la rBIX, dvmAsmInstructionStart + (63 * 128)
18745 lw rIBASE, offThread_curHandlerTable(rSELF)
18747 jr rBIX # nothing to do - jump to real handler
18750 move a0, rPC # arg0
18751 move a1, rFP # arg1
18752 move a2, rSELF # arg2
18753 JAL(dvmCheckBefore)
18756 /* ------------------------------ */
18758 .L_ALT_OP_UNUSED_40: /* 0x40 */
18759 /* File: mips/alt_stub.S */
18761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18762 * any interesting requests and then jump to the real instruction
18763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18766 * bail to the real handler if breakFlags==0.
18768 lbu a3, offThread_breakFlags(rSELF)
18769 la rBIX, dvmAsmInstructionStart + (64 * 128)
18770 lw rIBASE, offThread_curHandlerTable(rSELF)
18772 jr rBIX # nothing to do - jump to real handler
18775 move a0, rPC # arg0
18776 move a1, rFP # arg1
18777 move a2, rSELF # arg2
18778 JAL(dvmCheckBefore)
18781 /* ------------------------------ */
18783 .L_ALT_OP_UNUSED_41: /* 0x41 */
18784 /* File: mips/alt_stub.S */
18786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18787 * any interesting requests and then jump to the real instruction
18788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18791 * bail to the real handler if breakFlags==0.
18793 lbu a3, offThread_breakFlags(rSELF)
18794 la rBIX, dvmAsmInstructionStart + (65 * 128)
18795 lw rIBASE, offThread_curHandlerTable(rSELF)
18797 jr rBIX # nothing to do - jump to real handler
18800 move a0, rPC # arg0
18801 move a1, rFP # arg1
18802 move a2, rSELF # arg2
18803 JAL(dvmCheckBefore)
18806 /* ------------------------------ */
18808 .L_ALT_OP_UNUSED_42: /* 0x42 */
18809 /* File: mips/alt_stub.S */
18811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18812 * any interesting requests and then jump to the real instruction
18813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18816 * bail to the real handler if breakFlags==0.
18818 lbu a3, offThread_breakFlags(rSELF)
18819 la rBIX, dvmAsmInstructionStart + (66 * 128)
18820 lw rIBASE, offThread_curHandlerTable(rSELF)
18822 jr rBIX # nothing to do - jump to real handler
18825 move a0, rPC # arg0
18826 move a1, rFP # arg1
18827 move a2, rSELF # arg2
18828 JAL(dvmCheckBefore)
18831 /* ------------------------------ */
18833 .L_ALT_OP_UNUSED_43: /* 0x43 */
18834 /* File: mips/alt_stub.S */
18836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18837 * any interesting requests and then jump to the real instruction
18838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18841 * bail to the real handler if breakFlags==0.
18843 lbu a3, offThread_breakFlags(rSELF)
18844 la rBIX, dvmAsmInstructionStart + (67 * 128)
18845 lw rIBASE, offThread_curHandlerTable(rSELF)
18847 jr rBIX # nothing to do - jump to real handler
18850 move a0, rPC # arg0
18851 move a1, rFP # arg1
18852 move a2, rSELF # arg2
18853 JAL(dvmCheckBefore)
18856 /* ------------------------------ */
18858 .L_ALT_OP_AGET: /* 0x44 */
18859 /* File: mips/alt_stub.S */
18861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18862 * any interesting requests and then jump to the real instruction
18863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18866 * bail to the real handler if breakFlags==0.
18868 lbu a3, offThread_breakFlags(rSELF)
18869 la rBIX, dvmAsmInstructionStart + (68 * 128)
18870 lw rIBASE, offThread_curHandlerTable(rSELF)
18872 jr rBIX # nothing to do - jump to real handler
18875 move a0, rPC # arg0
18876 move a1, rFP # arg1
18877 move a2, rSELF # arg2
18878 JAL(dvmCheckBefore)
18881 /* ------------------------------ */
18883 .L_ALT_OP_AGET_WIDE: /* 0x45 */
18884 /* File: mips/alt_stub.S */
18886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18887 * any interesting requests and then jump to the real instruction
18888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18891 * bail to the real handler if breakFlags==0.
18893 lbu a3, offThread_breakFlags(rSELF)
18894 la rBIX, dvmAsmInstructionStart + (69 * 128)
18895 lw rIBASE, offThread_curHandlerTable(rSELF)
18897 jr rBIX # nothing to do - jump to real handler
18900 move a0, rPC # arg0
18901 move a1, rFP # arg1
18902 move a2, rSELF # arg2
18903 JAL(dvmCheckBefore)
18906 /* ------------------------------ */
18908 .L_ALT_OP_AGET_OBJECT: /* 0x46 */
18909 /* File: mips/alt_stub.S */
18911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18912 * any interesting requests and then jump to the real instruction
18913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18916 * bail to the real handler if breakFlags==0.
18918 lbu a3, offThread_breakFlags(rSELF)
18919 la rBIX, dvmAsmInstructionStart + (70 * 128)
18920 lw rIBASE, offThread_curHandlerTable(rSELF)
18922 jr rBIX # nothing to do - jump to real handler
18925 move a0, rPC # arg0
18926 move a1, rFP # arg1
18927 move a2, rSELF # arg2
18928 JAL(dvmCheckBefore)
18931 /* ------------------------------ */
18933 .L_ALT_OP_AGET_BOOLEAN: /* 0x47 */
18934 /* File: mips/alt_stub.S */
18936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18937 * any interesting requests and then jump to the real instruction
18938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18941 * bail to the real handler if breakFlags==0.
18943 lbu a3, offThread_breakFlags(rSELF)
18944 la rBIX, dvmAsmInstructionStart + (71 * 128)
18945 lw rIBASE, offThread_curHandlerTable(rSELF)
18947 jr rBIX # nothing to do - jump to real handler
18950 move a0, rPC # arg0
18951 move a1, rFP # arg1
18952 move a2, rSELF # arg2
18953 JAL(dvmCheckBefore)
18956 /* ------------------------------ */
18958 .L_ALT_OP_AGET_BYTE: /* 0x48 */
18959 /* File: mips/alt_stub.S */
18961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18962 * any interesting requests and then jump to the real instruction
18963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18966 * bail to the real handler if breakFlags==0.
18968 lbu a3, offThread_breakFlags(rSELF)
18969 la rBIX, dvmAsmInstructionStart + (72 * 128)
18970 lw rIBASE, offThread_curHandlerTable(rSELF)
18972 jr rBIX # nothing to do - jump to real handler
18975 move a0, rPC # arg0
18976 move a1, rFP # arg1
18977 move a2, rSELF # arg2
18978 JAL(dvmCheckBefore)
18981 /* ------------------------------ */
18983 .L_ALT_OP_AGET_CHAR: /* 0x49 */
18984 /* File: mips/alt_stub.S */
18986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
18987 * any interesting requests and then jump to the real instruction
18988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
18989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
18990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
18991 * bail to the real handler if breakFlags==0.
18993 lbu a3, offThread_breakFlags(rSELF)
18994 la rBIX, dvmAsmInstructionStart + (73 * 128)
18995 lw rIBASE, offThread_curHandlerTable(rSELF)
18997 jr rBIX # nothing to do - jump to real handler
19000 move a0, rPC # arg0
19001 move a1, rFP # arg1
19002 move a2, rSELF # arg2
19003 JAL(dvmCheckBefore)
19006 /* ------------------------------ */
19008 .L_ALT_OP_AGET_SHORT: /* 0x4a */
19009 /* File: mips/alt_stub.S */
19011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19012 * any interesting requests and then jump to the real instruction
19013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19016 * bail to the real handler if breakFlags==0.
19018 lbu a3, offThread_breakFlags(rSELF)
19019 la rBIX, dvmAsmInstructionStart + (74 * 128)
19020 lw rIBASE, offThread_curHandlerTable(rSELF)
19022 jr rBIX # nothing to do - jump to real handler
19025 move a0, rPC # arg0
19026 move a1, rFP # arg1
19027 move a2, rSELF # arg2
19028 JAL(dvmCheckBefore)
19031 /* ------------------------------ */
19033 .L_ALT_OP_APUT: /* 0x4b */
19034 /* File: mips/alt_stub.S */
19036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19037 * any interesting requests and then jump to the real instruction
19038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19041 * bail to the real handler if breakFlags==0.
19043 lbu a3, offThread_breakFlags(rSELF)
19044 la rBIX, dvmAsmInstructionStart + (75 * 128)
19045 lw rIBASE, offThread_curHandlerTable(rSELF)
19047 jr rBIX # nothing to do - jump to real handler
19050 move a0, rPC # arg0
19051 move a1, rFP # arg1
19052 move a2, rSELF # arg2
19053 JAL(dvmCheckBefore)
19056 /* ------------------------------ */
19058 .L_ALT_OP_APUT_WIDE: /* 0x4c */
19059 /* File: mips/alt_stub.S */
19061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19062 * any interesting requests and then jump to the real instruction
19063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19066 * bail to the real handler if breakFlags==0.
19068 lbu a3, offThread_breakFlags(rSELF)
19069 la rBIX, dvmAsmInstructionStart + (76 * 128)
19070 lw rIBASE, offThread_curHandlerTable(rSELF)
19072 jr rBIX # nothing to do - jump to real handler
19075 move a0, rPC # arg0
19076 move a1, rFP # arg1
19077 move a2, rSELF # arg2
19078 JAL(dvmCheckBefore)
19081 /* ------------------------------ */
19083 .L_ALT_OP_APUT_OBJECT: /* 0x4d */
19084 /* File: mips/alt_stub.S */
19086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19087 * any interesting requests and then jump to the real instruction
19088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19091 * bail to the real handler if breakFlags==0.
19093 lbu a3, offThread_breakFlags(rSELF)
19094 la rBIX, dvmAsmInstructionStart + (77 * 128)
19095 lw rIBASE, offThread_curHandlerTable(rSELF)
19097 jr rBIX # nothing to do - jump to real handler
19100 move a0, rPC # arg0
19101 move a1, rFP # arg1
19102 move a2, rSELF # arg2
19103 JAL(dvmCheckBefore)
19106 /* ------------------------------ */
19108 .L_ALT_OP_APUT_BOOLEAN: /* 0x4e */
19109 /* File: mips/alt_stub.S */
19111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19112 * any interesting requests and then jump to the real instruction
19113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19116 * bail to the real handler if breakFlags==0.
19118 lbu a3, offThread_breakFlags(rSELF)
19119 la rBIX, dvmAsmInstructionStart + (78 * 128)
19120 lw rIBASE, offThread_curHandlerTable(rSELF)
19122 jr rBIX # nothing to do - jump to real handler
19125 move a0, rPC # arg0
19126 move a1, rFP # arg1
19127 move a2, rSELF # arg2
19128 JAL(dvmCheckBefore)
19131 /* ------------------------------ */
19133 .L_ALT_OP_APUT_BYTE: /* 0x4f */
19134 /* File: mips/alt_stub.S */
19136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19137 * any interesting requests and then jump to the real instruction
19138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19141 * bail to the real handler if breakFlags==0.
19143 lbu a3, offThread_breakFlags(rSELF)
19144 la rBIX, dvmAsmInstructionStart + (79 * 128)
19145 lw rIBASE, offThread_curHandlerTable(rSELF)
19147 jr rBIX # nothing to do - jump to real handler
19150 move a0, rPC # arg0
19151 move a1, rFP # arg1
19152 move a2, rSELF # arg2
19153 JAL(dvmCheckBefore)
19156 /* ------------------------------ */
19158 .L_ALT_OP_APUT_CHAR: /* 0x50 */
19159 /* File: mips/alt_stub.S */
19161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19162 * any interesting requests and then jump to the real instruction
19163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19166 * bail to the real handler if breakFlags==0.
19168 lbu a3, offThread_breakFlags(rSELF)
19169 la rBIX, dvmAsmInstructionStart + (80 * 128)
19170 lw rIBASE, offThread_curHandlerTable(rSELF)
19172 jr rBIX # nothing to do - jump to real handler
19175 move a0, rPC # arg0
19176 move a1, rFP # arg1
19177 move a2, rSELF # arg2
19178 JAL(dvmCheckBefore)
19181 /* ------------------------------ */
19183 .L_ALT_OP_APUT_SHORT: /* 0x51 */
19184 /* File: mips/alt_stub.S */
19186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19187 * any interesting requests and then jump to the real instruction
19188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19191 * bail to the real handler if breakFlags==0.
19193 lbu a3, offThread_breakFlags(rSELF)
19194 la rBIX, dvmAsmInstructionStart + (81 * 128)
19195 lw rIBASE, offThread_curHandlerTable(rSELF)
19197 jr rBIX # nothing to do - jump to real handler
19200 move a0, rPC # arg0
19201 move a1, rFP # arg1
19202 move a2, rSELF # arg2
19203 JAL(dvmCheckBefore)
19206 /* ------------------------------ */
19208 .L_ALT_OP_IGET: /* 0x52 */
19209 /* File: mips/alt_stub.S */
19211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19212 * any interesting requests and then jump to the real instruction
19213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19216 * bail to the real handler if breakFlags==0.
19218 lbu a3, offThread_breakFlags(rSELF)
19219 la rBIX, dvmAsmInstructionStart + (82 * 128)
19220 lw rIBASE, offThread_curHandlerTable(rSELF)
19222 jr rBIX # nothing to do - jump to real handler
19225 move a0, rPC # arg0
19226 move a1, rFP # arg1
19227 move a2, rSELF # arg2
19228 JAL(dvmCheckBefore)
19231 /* ------------------------------ */
19233 .L_ALT_OP_IGET_WIDE: /* 0x53 */
19234 /* File: mips/alt_stub.S */
19236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19237 * any interesting requests and then jump to the real instruction
19238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19241 * bail to the real handler if breakFlags==0.
19243 lbu a3, offThread_breakFlags(rSELF)
19244 la rBIX, dvmAsmInstructionStart + (83 * 128)
19245 lw rIBASE, offThread_curHandlerTable(rSELF)
19247 jr rBIX # nothing to do - jump to real handler
19250 move a0, rPC # arg0
19251 move a1, rFP # arg1
19252 move a2, rSELF # arg2
19253 JAL(dvmCheckBefore)
19256 /* ------------------------------ */
19258 .L_ALT_OP_IGET_OBJECT: /* 0x54 */
19259 /* File: mips/alt_stub.S */
19261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19262 * any interesting requests and then jump to the real instruction
19263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19266 * bail to the real handler if breakFlags==0.
19268 lbu a3, offThread_breakFlags(rSELF)
19269 la rBIX, dvmAsmInstructionStart + (84 * 128)
19270 lw rIBASE, offThread_curHandlerTable(rSELF)
19272 jr rBIX # nothing to do - jump to real handler
19275 move a0, rPC # arg0
19276 move a1, rFP # arg1
19277 move a2, rSELF # arg2
19278 JAL(dvmCheckBefore)
19281 /* ------------------------------ */
19283 .L_ALT_OP_IGET_BOOLEAN: /* 0x55 */
19284 /* File: mips/alt_stub.S */
19286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19287 * any interesting requests and then jump to the real instruction
19288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19291 * bail to the real handler if breakFlags==0.
19293 lbu a3, offThread_breakFlags(rSELF)
19294 la rBIX, dvmAsmInstructionStart + (85 * 128)
19295 lw rIBASE, offThread_curHandlerTable(rSELF)
19297 jr rBIX # nothing to do - jump to real handler
19300 move a0, rPC # arg0
19301 move a1, rFP # arg1
19302 move a2, rSELF # arg2
19303 JAL(dvmCheckBefore)
19306 /* ------------------------------ */
19308 .L_ALT_OP_IGET_BYTE: /* 0x56 */
19309 /* File: mips/alt_stub.S */
19311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19312 * any interesting requests and then jump to the real instruction
19313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19316 * bail to the real handler if breakFlags==0.
19318 lbu a3, offThread_breakFlags(rSELF)
19319 la rBIX, dvmAsmInstructionStart + (86 * 128)
19320 lw rIBASE, offThread_curHandlerTable(rSELF)
19322 jr rBIX # nothing to do - jump to real handler
19325 move a0, rPC # arg0
19326 move a1, rFP # arg1
19327 move a2, rSELF # arg2
19328 JAL(dvmCheckBefore)
19331 /* ------------------------------ */
19333 .L_ALT_OP_IGET_CHAR: /* 0x57 */
19334 /* File: mips/alt_stub.S */
19336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19337 * any interesting requests and then jump to the real instruction
19338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19341 * bail to the real handler if breakFlags==0.
19343 lbu a3, offThread_breakFlags(rSELF)
19344 la rBIX, dvmAsmInstructionStart + (87 * 128)
19345 lw rIBASE, offThread_curHandlerTable(rSELF)
19347 jr rBIX # nothing to do - jump to real handler
19350 move a0, rPC # arg0
19351 move a1, rFP # arg1
19352 move a2, rSELF # arg2
19353 JAL(dvmCheckBefore)
19356 /* ------------------------------ */
19358 .L_ALT_OP_IGET_SHORT: /* 0x58 */
19359 /* File: mips/alt_stub.S */
19361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19362 * any interesting requests and then jump to the real instruction
19363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19366 * bail to the real handler if breakFlags==0.
19368 lbu a3, offThread_breakFlags(rSELF)
19369 la rBIX, dvmAsmInstructionStart + (88 * 128)
19370 lw rIBASE, offThread_curHandlerTable(rSELF)
19372 jr rBIX # nothing to do - jump to real handler
19375 move a0, rPC # arg0
19376 move a1, rFP # arg1
19377 move a2, rSELF # arg2
19378 JAL(dvmCheckBefore)
19381 /* ------------------------------ */
19383 .L_ALT_OP_IPUT: /* 0x59 */
19384 /* File: mips/alt_stub.S */
19386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19387 * any interesting requests and then jump to the real instruction
19388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19391 * bail to the real handler if breakFlags==0.
19393 lbu a3, offThread_breakFlags(rSELF)
19394 la rBIX, dvmAsmInstructionStart + (89 * 128)
19395 lw rIBASE, offThread_curHandlerTable(rSELF)
19397 jr rBIX # nothing to do - jump to real handler
19400 move a0, rPC # arg0
19401 move a1, rFP # arg1
19402 move a2, rSELF # arg2
19403 JAL(dvmCheckBefore)
19406 /* ------------------------------ */
19408 .L_ALT_OP_IPUT_WIDE: /* 0x5a */
19409 /* File: mips/alt_stub.S */
19411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19412 * any interesting requests and then jump to the real instruction
19413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19416 * bail to the real handler if breakFlags==0.
19418 lbu a3, offThread_breakFlags(rSELF)
19419 la rBIX, dvmAsmInstructionStart + (90 * 128)
19420 lw rIBASE, offThread_curHandlerTable(rSELF)
19422 jr rBIX # nothing to do - jump to real handler
19425 move a0, rPC # arg0
19426 move a1, rFP # arg1
19427 move a2, rSELF # arg2
19428 JAL(dvmCheckBefore)
19431 /* ------------------------------ */
19433 .L_ALT_OP_IPUT_OBJECT: /* 0x5b */
19434 /* File: mips/alt_stub.S */
19436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19437 * any interesting requests and then jump to the real instruction
19438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19441 * bail to the real handler if breakFlags==0.
19443 lbu a3, offThread_breakFlags(rSELF)
19444 la rBIX, dvmAsmInstructionStart + (91 * 128)
19445 lw rIBASE, offThread_curHandlerTable(rSELF)
19447 jr rBIX # nothing to do - jump to real handler
19450 move a0, rPC # arg0
19451 move a1, rFP # arg1
19452 move a2, rSELF # arg2
19453 JAL(dvmCheckBefore)
19456 /* ------------------------------ */
19458 .L_ALT_OP_IPUT_BOOLEAN: /* 0x5c */
19459 /* File: mips/alt_stub.S */
19461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19462 * any interesting requests and then jump to the real instruction
19463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19466 * bail to the real handler if breakFlags==0.
19468 lbu a3, offThread_breakFlags(rSELF)
19469 la rBIX, dvmAsmInstructionStart + (92 * 128)
19470 lw rIBASE, offThread_curHandlerTable(rSELF)
19472 jr rBIX # nothing to do - jump to real handler
19475 move a0, rPC # arg0
19476 move a1, rFP # arg1
19477 move a2, rSELF # arg2
19478 JAL(dvmCheckBefore)
19481 /* ------------------------------ */
19483 .L_ALT_OP_IPUT_BYTE: /* 0x5d */
19484 /* File: mips/alt_stub.S */
19486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19487 * any interesting requests and then jump to the real instruction
19488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19491 * bail to the real handler if breakFlags==0.
19493 lbu a3, offThread_breakFlags(rSELF)
19494 la rBIX, dvmAsmInstructionStart + (93 * 128)
19495 lw rIBASE, offThread_curHandlerTable(rSELF)
19497 jr rBIX # nothing to do - jump to real handler
19500 move a0, rPC # arg0
19501 move a1, rFP # arg1
19502 move a2, rSELF # arg2
19503 JAL(dvmCheckBefore)
19506 /* ------------------------------ */
19508 .L_ALT_OP_IPUT_CHAR: /* 0x5e */
19509 /* File: mips/alt_stub.S */
19511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19512 * any interesting requests and then jump to the real instruction
19513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19516 * bail to the real handler if breakFlags==0.
19518 lbu a3, offThread_breakFlags(rSELF)
19519 la rBIX, dvmAsmInstructionStart + (94 * 128)
19520 lw rIBASE, offThread_curHandlerTable(rSELF)
19522 jr rBIX # nothing to do - jump to real handler
19525 move a0, rPC # arg0
19526 move a1, rFP # arg1
19527 move a2, rSELF # arg2
19528 JAL(dvmCheckBefore)
19531 /* ------------------------------ */
19533 .L_ALT_OP_IPUT_SHORT: /* 0x5f */
19534 /* File: mips/alt_stub.S */
19536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19537 * any interesting requests and then jump to the real instruction
19538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19541 * bail to the real handler if breakFlags==0.
19543 lbu a3, offThread_breakFlags(rSELF)
19544 la rBIX, dvmAsmInstructionStart + (95 * 128)
19545 lw rIBASE, offThread_curHandlerTable(rSELF)
19547 jr rBIX # nothing to do - jump to real handler
19550 move a0, rPC # arg0
19551 move a1, rFP # arg1
19552 move a2, rSELF # arg2
19553 JAL(dvmCheckBefore)
19556 /* ------------------------------ */
19558 .L_ALT_OP_SGET: /* 0x60 */
19559 /* File: mips/alt_stub.S */
19561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19562 * any interesting requests and then jump to the real instruction
19563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19566 * bail to the real handler if breakFlags==0.
19568 lbu a3, offThread_breakFlags(rSELF)
19569 la rBIX, dvmAsmInstructionStart + (96 * 128)
19570 lw rIBASE, offThread_curHandlerTable(rSELF)
19572 jr rBIX # nothing to do - jump to real handler
19575 move a0, rPC # arg0
19576 move a1, rFP # arg1
19577 move a2, rSELF # arg2
19578 JAL(dvmCheckBefore)
19581 /* ------------------------------ */
19583 .L_ALT_OP_SGET_WIDE: /* 0x61 */
19584 /* File: mips/alt_stub.S */
19586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19587 * any interesting requests and then jump to the real instruction
19588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19591 * bail to the real handler if breakFlags==0.
19593 lbu a3, offThread_breakFlags(rSELF)
19594 la rBIX, dvmAsmInstructionStart + (97 * 128)
19595 lw rIBASE, offThread_curHandlerTable(rSELF)
19597 jr rBIX # nothing to do - jump to real handler
19600 move a0, rPC # arg0
19601 move a1, rFP # arg1
19602 move a2, rSELF # arg2
19603 JAL(dvmCheckBefore)
19606 /* ------------------------------ */
19608 .L_ALT_OP_SGET_OBJECT: /* 0x62 */
19609 /* File: mips/alt_stub.S */
19611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19612 * any interesting requests and then jump to the real instruction
19613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19616 * bail to the real handler if breakFlags==0.
19618 lbu a3, offThread_breakFlags(rSELF)
19619 la rBIX, dvmAsmInstructionStart + (98 * 128)
19620 lw rIBASE, offThread_curHandlerTable(rSELF)
19622 jr rBIX # nothing to do - jump to real handler
19625 move a0, rPC # arg0
19626 move a1, rFP # arg1
19627 move a2, rSELF # arg2
19628 JAL(dvmCheckBefore)
19631 /* ------------------------------ */
19633 .L_ALT_OP_SGET_BOOLEAN: /* 0x63 */
19634 /* File: mips/alt_stub.S */
19636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19637 * any interesting requests and then jump to the real instruction
19638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19641 * bail to the real handler if breakFlags==0.
19643 lbu a3, offThread_breakFlags(rSELF)
19644 la rBIX, dvmAsmInstructionStart + (99 * 128)
19645 lw rIBASE, offThread_curHandlerTable(rSELF)
19647 jr rBIX # nothing to do - jump to real handler
19650 move a0, rPC # arg0
19651 move a1, rFP # arg1
19652 move a2, rSELF # arg2
19653 JAL(dvmCheckBefore)
19656 /* ------------------------------ */
19658 .L_ALT_OP_SGET_BYTE: /* 0x64 */
19659 /* File: mips/alt_stub.S */
19661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19662 * any interesting requests and then jump to the real instruction
19663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19666 * bail to the real handler if breakFlags==0.
19668 lbu a3, offThread_breakFlags(rSELF)
19669 la rBIX, dvmAsmInstructionStart + (100 * 128)
19670 lw rIBASE, offThread_curHandlerTable(rSELF)
19672 jr rBIX # nothing to do - jump to real handler
19675 move a0, rPC # arg0
19676 move a1, rFP # arg1
19677 move a2, rSELF # arg2
19678 JAL(dvmCheckBefore)
19681 /* ------------------------------ */
19683 .L_ALT_OP_SGET_CHAR: /* 0x65 */
19684 /* File: mips/alt_stub.S */
19686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19687 * any interesting requests and then jump to the real instruction
19688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19691 * bail to the real handler if breakFlags==0.
19693 lbu a3, offThread_breakFlags(rSELF)
19694 la rBIX, dvmAsmInstructionStart + (101 * 128)
19695 lw rIBASE, offThread_curHandlerTable(rSELF)
19697 jr rBIX # nothing to do - jump to real handler
19700 move a0, rPC # arg0
19701 move a1, rFP # arg1
19702 move a2, rSELF # arg2
19703 JAL(dvmCheckBefore)
19706 /* ------------------------------ */
19708 .L_ALT_OP_SGET_SHORT: /* 0x66 */
19709 /* File: mips/alt_stub.S */
19711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19712 * any interesting requests and then jump to the real instruction
19713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19716 * bail to the real handler if breakFlags==0.
19718 lbu a3, offThread_breakFlags(rSELF)
19719 la rBIX, dvmAsmInstructionStart + (102 * 128)
19720 lw rIBASE, offThread_curHandlerTable(rSELF)
19722 jr rBIX # nothing to do - jump to real handler
19725 move a0, rPC # arg0
19726 move a1, rFP # arg1
19727 move a2, rSELF # arg2
19728 JAL(dvmCheckBefore)
19731 /* ------------------------------ */
19733 .L_ALT_OP_SPUT: /* 0x67 */
19734 /* File: mips/alt_stub.S */
19736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19737 * any interesting requests and then jump to the real instruction
19738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19741 * bail to the real handler if breakFlags==0.
19743 lbu a3, offThread_breakFlags(rSELF)
19744 la rBIX, dvmAsmInstructionStart + (103 * 128)
19745 lw rIBASE, offThread_curHandlerTable(rSELF)
19747 jr rBIX # nothing to do - jump to real handler
19750 move a0, rPC # arg0
19751 move a1, rFP # arg1
19752 move a2, rSELF # arg2
19753 JAL(dvmCheckBefore)
19756 /* ------------------------------ */
19758 .L_ALT_OP_SPUT_WIDE: /* 0x68 */
19759 /* File: mips/alt_stub.S */
19761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19762 * any interesting requests and then jump to the real instruction
19763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19766 * bail to the real handler if breakFlags==0.
19768 lbu a3, offThread_breakFlags(rSELF)
19769 la rBIX, dvmAsmInstructionStart + (104 * 128)
19770 lw rIBASE, offThread_curHandlerTable(rSELF)
19772 jr rBIX # nothing to do - jump to real handler
19775 move a0, rPC # arg0
19776 move a1, rFP # arg1
19777 move a2, rSELF # arg2
19778 JAL(dvmCheckBefore)
19781 /* ------------------------------ */
19783 .L_ALT_OP_SPUT_OBJECT: /* 0x69 */
19784 /* File: mips/alt_stub.S */
19786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19787 * any interesting requests and then jump to the real instruction
19788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19791 * bail to the real handler if breakFlags==0.
19793 lbu a3, offThread_breakFlags(rSELF)
19794 la rBIX, dvmAsmInstructionStart + (105 * 128)
19795 lw rIBASE, offThread_curHandlerTable(rSELF)
19797 jr rBIX # nothing to do - jump to real handler
19800 move a0, rPC # arg0
19801 move a1, rFP # arg1
19802 move a2, rSELF # arg2
19803 JAL(dvmCheckBefore)
19806 /* ------------------------------ */
19808 .L_ALT_OP_SPUT_BOOLEAN: /* 0x6a */
19809 /* File: mips/alt_stub.S */
19811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19812 * any interesting requests and then jump to the real instruction
19813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19816 * bail to the real handler if breakFlags==0.
19818 lbu a3, offThread_breakFlags(rSELF)
19819 la rBIX, dvmAsmInstructionStart + (106 * 128)
19820 lw rIBASE, offThread_curHandlerTable(rSELF)
19822 jr rBIX # nothing to do - jump to real handler
19825 move a0, rPC # arg0
19826 move a1, rFP # arg1
19827 move a2, rSELF # arg2
19828 JAL(dvmCheckBefore)
19831 /* ------------------------------ */
19833 .L_ALT_OP_SPUT_BYTE: /* 0x6b */
19834 /* File: mips/alt_stub.S */
19836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19837 * any interesting requests and then jump to the real instruction
19838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19841 * bail to the real handler if breakFlags==0.
19843 lbu a3, offThread_breakFlags(rSELF)
19844 la rBIX, dvmAsmInstructionStart + (107 * 128)
19845 lw rIBASE, offThread_curHandlerTable(rSELF)
19847 jr rBIX # nothing to do - jump to real handler
19850 move a0, rPC # arg0
19851 move a1, rFP # arg1
19852 move a2, rSELF # arg2
19853 JAL(dvmCheckBefore)
19856 /* ------------------------------ */
19858 .L_ALT_OP_SPUT_CHAR: /* 0x6c */
19859 /* File: mips/alt_stub.S */
19861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19862 * any interesting requests and then jump to the real instruction
19863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19866 * bail to the real handler if breakFlags==0.
19868 lbu a3, offThread_breakFlags(rSELF)
19869 la rBIX, dvmAsmInstructionStart + (108 * 128)
19870 lw rIBASE, offThread_curHandlerTable(rSELF)
19872 jr rBIX # nothing to do - jump to real handler
19875 move a0, rPC # arg0
19876 move a1, rFP # arg1
19877 move a2, rSELF # arg2
19878 JAL(dvmCheckBefore)
19881 /* ------------------------------ */
19883 .L_ALT_OP_SPUT_SHORT: /* 0x6d */
19884 /* File: mips/alt_stub.S */
19886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19887 * any interesting requests and then jump to the real instruction
19888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19891 * bail to the real handler if breakFlags==0.
19893 lbu a3, offThread_breakFlags(rSELF)
19894 la rBIX, dvmAsmInstructionStart + (109 * 128)
19895 lw rIBASE, offThread_curHandlerTable(rSELF)
19897 jr rBIX # nothing to do - jump to real handler
19900 move a0, rPC # arg0
19901 move a1, rFP # arg1
19902 move a2, rSELF # arg2
19903 JAL(dvmCheckBefore)
19906 /* ------------------------------ */
19908 .L_ALT_OP_INVOKE_VIRTUAL: /* 0x6e */
19909 /* File: mips/alt_stub.S */
19911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19912 * any interesting requests and then jump to the real instruction
19913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19916 * bail to the real handler if breakFlags==0.
19918 lbu a3, offThread_breakFlags(rSELF)
19919 la rBIX, dvmAsmInstructionStart + (110 * 128)
19920 lw rIBASE, offThread_curHandlerTable(rSELF)
19922 jr rBIX # nothing to do - jump to real handler
19925 move a0, rPC # arg0
19926 move a1, rFP # arg1
19927 move a2, rSELF # arg2
19928 JAL(dvmCheckBefore)
19931 /* ------------------------------ */
19933 .L_ALT_OP_INVOKE_SUPER: /* 0x6f */
19934 /* File: mips/alt_stub.S */
19936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19937 * any interesting requests and then jump to the real instruction
19938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19941 * bail to the real handler if breakFlags==0.
19943 lbu a3, offThread_breakFlags(rSELF)
19944 la rBIX, dvmAsmInstructionStart + (111 * 128)
19945 lw rIBASE, offThread_curHandlerTable(rSELF)
19947 jr rBIX # nothing to do - jump to real handler
19950 move a0, rPC # arg0
19951 move a1, rFP # arg1
19952 move a2, rSELF # arg2
19953 JAL(dvmCheckBefore)
19956 /* ------------------------------ */
19958 .L_ALT_OP_INVOKE_DIRECT: /* 0x70 */
19959 /* File: mips/alt_stub.S */
19961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19962 * any interesting requests and then jump to the real instruction
19963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19966 * bail to the real handler if breakFlags==0.
19968 lbu a3, offThread_breakFlags(rSELF)
19969 la rBIX, dvmAsmInstructionStart + (112 * 128)
19970 lw rIBASE, offThread_curHandlerTable(rSELF)
19972 jr rBIX # nothing to do - jump to real handler
19975 move a0, rPC # arg0
19976 move a1, rFP # arg1
19977 move a2, rSELF # arg2
19978 JAL(dvmCheckBefore)
19981 /* ------------------------------ */
19983 .L_ALT_OP_INVOKE_STATIC: /* 0x71 */
19984 /* File: mips/alt_stub.S */
19986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
19987 * any interesting requests and then jump to the real instruction
19988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
19989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
19990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
19991 * bail to the real handler if breakFlags==0.
19993 lbu a3, offThread_breakFlags(rSELF)
19994 la rBIX, dvmAsmInstructionStart + (113 * 128)
19995 lw rIBASE, offThread_curHandlerTable(rSELF)
19997 jr rBIX # nothing to do - jump to real handler
20000 move a0, rPC # arg0
20001 move a1, rFP # arg1
20002 move a2, rSELF # arg2
20003 JAL(dvmCheckBefore)
20006 /* ------------------------------ */
20008 .L_ALT_OP_INVOKE_INTERFACE: /* 0x72 */
20009 /* File: mips/alt_stub.S */
20011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20012 * any interesting requests and then jump to the real instruction
20013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20016 * bail to the real handler if breakFlags==0.
20018 lbu a3, offThread_breakFlags(rSELF)
20019 la rBIX, dvmAsmInstructionStart + (114 * 128)
20020 lw rIBASE, offThread_curHandlerTable(rSELF)
20022 jr rBIX # nothing to do - jump to real handler
20025 move a0, rPC # arg0
20026 move a1, rFP # arg1
20027 move a2, rSELF # arg2
20028 JAL(dvmCheckBefore)
20031 /* ------------------------------ */
20033 .L_ALT_OP_UNUSED_73: /* 0x73 */
20034 /* File: mips/alt_stub.S */
20036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20037 * any interesting requests and then jump to the real instruction
20038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20041 * bail to the real handler if breakFlags==0.
20043 lbu a3, offThread_breakFlags(rSELF)
20044 la rBIX, dvmAsmInstructionStart + (115 * 128)
20045 lw rIBASE, offThread_curHandlerTable(rSELF)
20047 jr rBIX # nothing to do - jump to real handler
20050 move a0, rPC # arg0
20051 move a1, rFP # arg1
20052 move a2, rSELF # arg2
20053 JAL(dvmCheckBefore)
20056 /* ------------------------------ */
20058 .L_ALT_OP_INVOKE_VIRTUAL_RANGE: /* 0x74 */
20059 /* File: mips/alt_stub.S */
20061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20062 * any interesting requests and then jump to the real instruction
20063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20066 * bail to the real handler if breakFlags==0.
20068 lbu a3, offThread_breakFlags(rSELF)
20069 la rBIX, dvmAsmInstructionStart + (116 * 128)
20070 lw rIBASE, offThread_curHandlerTable(rSELF)
20072 jr rBIX # nothing to do - jump to real handler
20075 move a0, rPC # arg0
20076 move a1, rFP # arg1
20077 move a2, rSELF # arg2
20078 JAL(dvmCheckBefore)
20081 /* ------------------------------ */
20083 .L_ALT_OP_INVOKE_SUPER_RANGE: /* 0x75 */
20084 /* File: mips/alt_stub.S */
20086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20087 * any interesting requests and then jump to the real instruction
20088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20091 * bail to the real handler if breakFlags==0.
20093 lbu a3, offThread_breakFlags(rSELF)
20094 la rBIX, dvmAsmInstructionStart + (117 * 128)
20095 lw rIBASE, offThread_curHandlerTable(rSELF)
20097 jr rBIX # nothing to do - jump to real handler
20100 move a0, rPC # arg0
20101 move a1, rFP # arg1
20102 move a2, rSELF # arg2
20103 JAL(dvmCheckBefore)
20106 /* ------------------------------ */
20108 .L_ALT_OP_INVOKE_DIRECT_RANGE: /* 0x76 */
20109 /* File: mips/alt_stub.S */
20111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20112 * any interesting requests and then jump to the real instruction
20113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20116 * bail to the real handler if breakFlags==0.
20118 lbu a3, offThread_breakFlags(rSELF)
20119 la rBIX, dvmAsmInstructionStart + (118 * 128)
20120 lw rIBASE, offThread_curHandlerTable(rSELF)
20122 jr rBIX # nothing to do - jump to real handler
20125 move a0, rPC # arg0
20126 move a1, rFP # arg1
20127 move a2, rSELF # arg2
20128 JAL(dvmCheckBefore)
20131 /* ------------------------------ */
20133 .L_ALT_OP_INVOKE_STATIC_RANGE: /* 0x77 */
20134 /* File: mips/alt_stub.S */
20136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20137 * any interesting requests and then jump to the real instruction
20138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20141 * bail to the real handler if breakFlags==0.
20143 lbu a3, offThread_breakFlags(rSELF)
20144 la rBIX, dvmAsmInstructionStart + (119 * 128)
20145 lw rIBASE, offThread_curHandlerTable(rSELF)
20147 jr rBIX # nothing to do - jump to real handler
20150 move a0, rPC # arg0
20151 move a1, rFP # arg1
20152 move a2, rSELF # arg2
20153 JAL(dvmCheckBefore)
20156 /* ------------------------------ */
20158 .L_ALT_OP_INVOKE_INTERFACE_RANGE: /* 0x78 */
20159 /* File: mips/alt_stub.S */
20161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20162 * any interesting requests and then jump to the real instruction
20163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20166 * bail to the real handler if breakFlags==0.
20168 lbu a3, offThread_breakFlags(rSELF)
20169 la rBIX, dvmAsmInstructionStart + (120 * 128)
20170 lw rIBASE, offThread_curHandlerTable(rSELF)
20172 jr rBIX # nothing to do - jump to real handler
20175 move a0, rPC # arg0
20176 move a1, rFP # arg1
20177 move a2, rSELF # arg2
20178 JAL(dvmCheckBefore)
20181 /* ------------------------------ */
20183 .L_ALT_OP_UNUSED_79: /* 0x79 */
20184 /* File: mips/alt_stub.S */
20186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20187 * any interesting requests and then jump to the real instruction
20188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20191 * bail to the real handler if breakFlags==0.
20193 lbu a3, offThread_breakFlags(rSELF)
20194 la rBIX, dvmAsmInstructionStart + (121 * 128)
20195 lw rIBASE, offThread_curHandlerTable(rSELF)
20197 jr rBIX # nothing to do - jump to real handler
20200 move a0, rPC # arg0
20201 move a1, rFP # arg1
20202 move a2, rSELF # arg2
20203 JAL(dvmCheckBefore)
20206 /* ------------------------------ */
20208 .L_ALT_OP_UNUSED_7A: /* 0x7a */
20209 /* File: mips/alt_stub.S */
20211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20212 * any interesting requests and then jump to the real instruction
20213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20216 * bail to the real handler if breakFlags==0.
20218 lbu a3, offThread_breakFlags(rSELF)
20219 la rBIX, dvmAsmInstructionStart + (122 * 128)
20220 lw rIBASE, offThread_curHandlerTable(rSELF)
20222 jr rBIX # nothing to do - jump to real handler
20225 move a0, rPC # arg0
20226 move a1, rFP # arg1
20227 move a2, rSELF # arg2
20228 JAL(dvmCheckBefore)
20231 /* ------------------------------ */
20233 .L_ALT_OP_NEG_INT: /* 0x7b */
20234 /* File: mips/alt_stub.S */
20236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20237 * any interesting requests and then jump to the real instruction
20238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20241 * bail to the real handler if breakFlags==0.
20243 lbu a3, offThread_breakFlags(rSELF)
20244 la rBIX, dvmAsmInstructionStart + (123 * 128)
20245 lw rIBASE, offThread_curHandlerTable(rSELF)
20247 jr rBIX # nothing to do - jump to real handler
20250 move a0, rPC # arg0
20251 move a1, rFP # arg1
20252 move a2, rSELF # arg2
20253 JAL(dvmCheckBefore)
20256 /* ------------------------------ */
20258 .L_ALT_OP_NOT_INT: /* 0x7c */
20259 /* File: mips/alt_stub.S */
20261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20262 * any interesting requests and then jump to the real instruction
20263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20266 * bail to the real handler if breakFlags==0.
20268 lbu a3, offThread_breakFlags(rSELF)
20269 la rBIX, dvmAsmInstructionStart + (124 * 128)
20270 lw rIBASE, offThread_curHandlerTable(rSELF)
20272 jr rBIX # nothing to do - jump to real handler
20275 move a0, rPC # arg0
20276 move a1, rFP # arg1
20277 move a2, rSELF # arg2
20278 JAL(dvmCheckBefore)
20281 /* ------------------------------ */
20283 .L_ALT_OP_NEG_LONG: /* 0x7d */
20284 /* File: mips/alt_stub.S */
20286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20287 * any interesting requests and then jump to the real instruction
20288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20291 * bail to the real handler if breakFlags==0.
20293 lbu a3, offThread_breakFlags(rSELF)
20294 la rBIX, dvmAsmInstructionStart + (125 * 128)
20295 lw rIBASE, offThread_curHandlerTable(rSELF)
20297 jr rBIX # nothing to do - jump to real handler
20300 move a0, rPC # arg0
20301 move a1, rFP # arg1
20302 move a2, rSELF # arg2
20303 JAL(dvmCheckBefore)
20306 /* ------------------------------ */
20308 .L_ALT_OP_NOT_LONG: /* 0x7e */
20309 /* File: mips/alt_stub.S */
20311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20312 * any interesting requests and then jump to the real instruction
20313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20316 * bail to the real handler if breakFlags==0.
20318 lbu a3, offThread_breakFlags(rSELF)
20319 la rBIX, dvmAsmInstructionStart + (126 * 128)
20320 lw rIBASE, offThread_curHandlerTable(rSELF)
20322 jr rBIX # nothing to do - jump to real handler
20325 move a0, rPC # arg0
20326 move a1, rFP # arg1
20327 move a2, rSELF # arg2
20328 JAL(dvmCheckBefore)
20331 /* ------------------------------ */
20333 .L_ALT_OP_NEG_FLOAT: /* 0x7f */
20334 /* File: mips/alt_stub.S */
20336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20337 * any interesting requests and then jump to the real instruction
20338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20341 * bail to the real handler if breakFlags==0.
20343 lbu a3, offThread_breakFlags(rSELF)
20344 la rBIX, dvmAsmInstructionStart + (127 * 128)
20345 lw rIBASE, offThread_curHandlerTable(rSELF)
20347 jr rBIX # nothing to do - jump to real handler
20350 move a0, rPC # arg0
20351 move a1, rFP # arg1
20352 move a2, rSELF # arg2
20353 JAL(dvmCheckBefore)
20356 /* ------------------------------ */
20358 .L_ALT_OP_NEG_DOUBLE: /* 0x80 */
20359 /* File: mips/alt_stub.S */
20361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20362 * any interesting requests and then jump to the real instruction
20363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20366 * bail to the real handler if breakFlags==0.
20368 lbu a3, offThread_breakFlags(rSELF)
20369 la rBIX, dvmAsmInstructionStart + (128 * 128)
20370 lw rIBASE, offThread_curHandlerTable(rSELF)
20372 jr rBIX # nothing to do - jump to real handler
20375 move a0, rPC # arg0
20376 move a1, rFP # arg1
20377 move a2, rSELF # arg2
20378 JAL(dvmCheckBefore)
20381 /* ------------------------------ */
20383 .L_ALT_OP_INT_TO_LONG: /* 0x81 */
20384 /* File: mips/alt_stub.S */
20386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20387 * any interesting requests and then jump to the real instruction
20388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20391 * bail to the real handler if breakFlags==0.
20393 lbu a3, offThread_breakFlags(rSELF)
20394 la rBIX, dvmAsmInstructionStart + (129 * 128)
20395 lw rIBASE, offThread_curHandlerTable(rSELF)
20397 jr rBIX # nothing to do - jump to real handler
20400 move a0, rPC # arg0
20401 move a1, rFP # arg1
20402 move a2, rSELF # arg2
20403 JAL(dvmCheckBefore)
20406 /* ------------------------------ */
20408 .L_ALT_OP_INT_TO_FLOAT: /* 0x82 */
20409 /* File: mips/alt_stub.S */
20411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20412 * any interesting requests and then jump to the real instruction
20413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20416 * bail to the real handler if breakFlags==0.
20418 lbu a3, offThread_breakFlags(rSELF)
20419 la rBIX, dvmAsmInstructionStart + (130 * 128)
20420 lw rIBASE, offThread_curHandlerTable(rSELF)
20422 jr rBIX # nothing to do - jump to real handler
20425 move a0, rPC # arg0
20426 move a1, rFP # arg1
20427 move a2, rSELF # arg2
20428 JAL(dvmCheckBefore)
20431 /* ------------------------------ */
20433 .L_ALT_OP_INT_TO_DOUBLE: /* 0x83 */
20434 /* File: mips/alt_stub.S */
20436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20437 * any interesting requests and then jump to the real instruction
20438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20441 * bail to the real handler if breakFlags==0.
20443 lbu a3, offThread_breakFlags(rSELF)
20444 la rBIX, dvmAsmInstructionStart + (131 * 128)
20445 lw rIBASE, offThread_curHandlerTable(rSELF)
20447 jr rBIX # nothing to do - jump to real handler
20450 move a0, rPC # arg0
20451 move a1, rFP # arg1
20452 move a2, rSELF # arg2
20453 JAL(dvmCheckBefore)
20456 /* ------------------------------ */
20458 .L_ALT_OP_LONG_TO_INT: /* 0x84 */
20459 /* File: mips/alt_stub.S */
20461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20462 * any interesting requests and then jump to the real instruction
20463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20466 * bail to the real handler if breakFlags==0.
20468 lbu a3, offThread_breakFlags(rSELF)
20469 la rBIX, dvmAsmInstructionStart + (132 * 128)
20470 lw rIBASE, offThread_curHandlerTable(rSELF)
20472 jr rBIX # nothing to do - jump to real handler
20475 move a0, rPC # arg0
20476 move a1, rFP # arg1
20477 move a2, rSELF # arg2
20478 JAL(dvmCheckBefore)
20481 /* ------------------------------ */
20483 .L_ALT_OP_LONG_TO_FLOAT: /* 0x85 */
20484 /* File: mips/alt_stub.S */
20486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20487 * any interesting requests and then jump to the real instruction
20488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20491 * bail to the real handler if breakFlags==0.
20493 lbu a3, offThread_breakFlags(rSELF)
20494 la rBIX, dvmAsmInstructionStart + (133 * 128)
20495 lw rIBASE, offThread_curHandlerTable(rSELF)
20497 jr rBIX # nothing to do - jump to real handler
20500 move a0, rPC # arg0
20501 move a1, rFP # arg1
20502 move a2, rSELF # arg2
20503 JAL(dvmCheckBefore)
20506 /* ------------------------------ */
20508 .L_ALT_OP_LONG_TO_DOUBLE: /* 0x86 */
20509 /* File: mips/alt_stub.S */
20511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20512 * any interesting requests and then jump to the real instruction
20513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20516 * bail to the real handler if breakFlags==0.
20518 lbu a3, offThread_breakFlags(rSELF)
20519 la rBIX, dvmAsmInstructionStart + (134 * 128)
20520 lw rIBASE, offThread_curHandlerTable(rSELF)
20522 jr rBIX # nothing to do - jump to real handler
20525 move a0, rPC # arg0
20526 move a1, rFP # arg1
20527 move a2, rSELF # arg2
20528 JAL(dvmCheckBefore)
20531 /* ------------------------------ */
20533 .L_ALT_OP_FLOAT_TO_INT: /* 0x87 */
20534 /* File: mips/alt_stub.S */
20536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20537 * any interesting requests and then jump to the real instruction
20538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20541 * bail to the real handler if breakFlags==0.
20543 lbu a3, offThread_breakFlags(rSELF)
20544 la rBIX, dvmAsmInstructionStart + (135 * 128)
20545 lw rIBASE, offThread_curHandlerTable(rSELF)
20547 jr rBIX # nothing to do - jump to real handler
20550 move a0, rPC # arg0
20551 move a1, rFP # arg1
20552 move a2, rSELF # arg2
20553 JAL(dvmCheckBefore)
20556 /* ------------------------------ */
20558 .L_ALT_OP_FLOAT_TO_LONG: /* 0x88 */
20559 /* File: mips/alt_stub.S */
20561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20562 * any interesting requests and then jump to the real instruction
20563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20566 * bail to the real handler if breakFlags==0.
20568 lbu a3, offThread_breakFlags(rSELF)
20569 la rBIX, dvmAsmInstructionStart + (136 * 128)
20570 lw rIBASE, offThread_curHandlerTable(rSELF)
20572 jr rBIX # nothing to do - jump to real handler
20575 move a0, rPC # arg0
20576 move a1, rFP # arg1
20577 move a2, rSELF # arg2
20578 JAL(dvmCheckBefore)
20581 /* ------------------------------ */
20583 .L_ALT_OP_FLOAT_TO_DOUBLE: /* 0x89 */
20584 /* File: mips/alt_stub.S */
20586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20587 * any interesting requests and then jump to the real instruction
20588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20591 * bail to the real handler if breakFlags==0.
20593 lbu a3, offThread_breakFlags(rSELF)
20594 la rBIX, dvmAsmInstructionStart + (137 * 128)
20595 lw rIBASE, offThread_curHandlerTable(rSELF)
20597 jr rBIX # nothing to do - jump to real handler
20600 move a0, rPC # arg0
20601 move a1, rFP # arg1
20602 move a2, rSELF # arg2
20603 JAL(dvmCheckBefore)
20606 /* ------------------------------ */
20608 .L_ALT_OP_DOUBLE_TO_INT: /* 0x8a */
20609 /* File: mips/alt_stub.S */
20611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20612 * any interesting requests and then jump to the real instruction
20613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20616 * bail to the real handler if breakFlags==0.
20618 lbu a3, offThread_breakFlags(rSELF)
20619 la rBIX, dvmAsmInstructionStart + (138 * 128)
20620 lw rIBASE, offThread_curHandlerTable(rSELF)
20622 jr rBIX # nothing to do - jump to real handler
20625 move a0, rPC # arg0
20626 move a1, rFP # arg1
20627 move a2, rSELF # arg2
20628 JAL(dvmCheckBefore)
20631 /* ------------------------------ */
20633 .L_ALT_OP_DOUBLE_TO_LONG: /* 0x8b */
20634 /* File: mips/alt_stub.S */
20636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20637 * any interesting requests and then jump to the real instruction
20638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20641 * bail to the real handler if breakFlags==0.
20643 lbu a3, offThread_breakFlags(rSELF)
20644 la rBIX, dvmAsmInstructionStart + (139 * 128)
20645 lw rIBASE, offThread_curHandlerTable(rSELF)
20647 jr rBIX # nothing to do - jump to real handler
20650 move a0, rPC # arg0
20651 move a1, rFP # arg1
20652 move a2, rSELF # arg2
20653 JAL(dvmCheckBefore)
20656 /* ------------------------------ */
20658 .L_ALT_OP_DOUBLE_TO_FLOAT: /* 0x8c */
20659 /* File: mips/alt_stub.S */
20661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20662 * any interesting requests and then jump to the real instruction
20663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20666 * bail to the real handler if breakFlags==0.
20668 lbu a3, offThread_breakFlags(rSELF)
20669 la rBIX, dvmAsmInstructionStart + (140 * 128)
20670 lw rIBASE, offThread_curHandlerTable(rSELF)
20672 jr rBIX # nothing to do - jump to real handler
20675 move a0, rPC # arg0
20676 move a1, rFP # arg1
20677 move a2, rSELF # arg2
20678 JAL(dvmCheckBefore)
20681 /* ------------------------------ */
20683 .L_ALT_OP_INT_TO_BYTE: /* 0x8d */
20684 /* File: mips/alt_stub.S */
20686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20687 * any interesting requests and then jump to the real instruction
20688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20691 * bail to the real handler if breakFlags==0.
20693 lbu a3, offThread_breakFlags(rSELF)
20694 la rBIX, dvmAsmInstructionStart + (141 * 128)
20695 lw rIBASE, offThread_curHandlerTable(rSELF)
20697 jr rBIX # nothing to do - jump to real handler
20700 move a0, rPC # arg0
20701 move a1, rFP # arg1
20702 move a2, rSELF # arg2
20703 JAL(dvmCheckBefore)
20706 /* ------------------------------ */
20708 .L_ALT_OP_INT_TO_CHAR: /* 0x8e */
20709 /* File: mips/alt_stub.S */
20711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20712 * any interesting requests and then jump to the real instruction
20713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20716 * bail to the real handler if breakFlags==0.
20718 lbu a3, offThread_breakFlags(rSELF)
20719 la rBIX, dvmAsmInstructionStart + (142 * 128)
20720 lw rIBASE, offThread_curHandlerTable(rSELF)
20722 jr rBIX # nothing to do - jump to real handler
20725 move a0, rPC # arg0
20726 move a1, rFP # arg1
20727 move a2, rSELF # arg2
20728 JAL(dvmCheckBefore)
20731 /* ------------------------------ */
20733 .L_ALT_OP_INT_TO_SHORT: /* 0x8f */
20734 /* File: mips/alt_stub.S */
20736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20737 * any interesting requests and then jump to the real instruction
20738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20741 * bail to the real handler if breakFlags==0.
20743 lbu a3, offThread_breakFlags(rSELF)
20744 la rBIX, dvmAsmInstructionStart + (143 * 128)
20745 lw rIBASE, offThread_curHandlerTable(rSELF)
20747 jr rBIX # nothing to do - jump to real handler
20750 move a0, rPC # arg0
20751 move a1, rFP # arg1
20752 move a2, rSELF # arg2
20753 JAL(dvmCheckBefore)
20756 /* ------------------------------ */
20758 .L_ALT_OP_ADD_INT: /* 0x90 */
20759 /* File: mips/alt_stub.S */
20761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20762 * any interesting requests and then jump to the real instruction
20763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20766 * bail to the real handler if breakFlags==0.
20768 lbu a3, offThread_breakFlags(rSELF)
20769 la rBIX, dvmAsmInstructionStart + (144 * 128)
20770 lw rIBASE, offThread_curHandlerTable(rSELF)
20772 jr rBIX # nothing to do - jump to real handler
20775 move a0, rPC # arg0
20776 move a1, rFP # arg1
20777 move a2, rSELF # arg2
20778 JAL(dvmCheckBefore)
20781 /* ------------------------------ */
20783 .L_ALT_OP_SUB_INT: /* 0x91 */
20784 /* File: mips/alt_stub.S */
20786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20787 * any interesting requests and then jump to the real instruction
20788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20791 * bail to the real handler if breakFlags==0.
20793 lbu a3, offThread_breakFlags(rSELF)
20794 la rBIX, dvmAsmInstructionStart + (145 * 128)
20795 lw rIBASE, offThread_curHandlerTable(rSELF)
20797 jr rBIX # nothing to do - jump to real handler
20800 move a0, rPC # arg0
20801 move a1, rFP # arg1
20802 move a2, rSELF # arg2
20803 JAL(dvmCheckBefore)
20806 /* ------------------------------ */
20808 .L_ALT_OP_MUL_INT: /* 0x92 */
20809 /* File: mips/alt_stub.S */
20811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20812 * any interesting requests and then jump to the real instruction
20813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20816 * bail to the real handler if breakFlags==0.
20818 lbu a3, offThread_breakFlags(rSELF)
20819 la rBIX, dvmAsmInstructionStart + (146 * 128)
20820 lw rIBASE, offThread_curHandlerTable(rSELF)
20822 jr rBIX # nothing to do - jump to real handler
20825 move a0, rPC # arg0
20826 move a1, rFP # arg1
20827 move a2, rSELF # arg2
20828 JAL(dvmCheckBefore)
20831 /* ------------------------------ */
20833 .L_ALT_OP_DIV_INT: /* 0x93 */
20834 /* File: mips/alt_stub.S */
20836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20837 * any interesting requests and then jump to the real instruction
20838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20841 * bail to the real handler if breakFlags==0.
20843 lbu a3, offThread_breakFlags(rSELF)
20844 la rBIX, dvmAsmInstructionStart + (147 * 128)
20845 lw rIBASE, offThread_curHandlerTable(rSELF)
20847 jr rBIX # nothing to do - jump to real handler
20850 move a0, rPC # arg0
20851 move a1, rFP # arg1
20852 move a2, rSELF # arg2
20853 JAL(dvmCheckBefore)
20856 /* ------------------------------ */
20858 .L_ALT_OP_REM_INT: /* 0x94 */
20859 /* File: mips/alt_stub.S */
20861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20862 * any interesting requests and then jump to the real instruction
20863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20866 * bail to the real handler if breakFlags==0.
20868 lbu a3, offThread_breakFlags(rSELF)
20869 la rBIX, dvmAsmInstructionStart + (148 * 128)
20870 lw rIBASE, offThread_curHandlerTable(rSELF)
20872 jr rBIX # nothing to do - jump to real handler
20875 move a0, rPC # arg0
20876 move a1, rFP # arg1
20877 move a2, rSELF # arg2
20878 JAL(dvmCheckBefore)
20881 /* ------------------------------ */
20883 .L_ALT_OP_AND_INT: /* 0x95 */
20884 /* File: mips/alt_stub.S */
20886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20887 * any interesting requests and then jump to the real instruction
20888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20891 * bail to the real handler if breakFlags==0.
20893 lbu a3, offThread_breakFlags(rSELF)
20894 la rBIX, dvmAsmInstructionStart + (149 * 128)
20895 lw rIBASE, offThread_curHandlerTable(rSELF)
20897 jr rBIX # nothing to do - jump to real handler
20900 move a0, rPC # arg0
20901 move a1, rFP # arg1
20902 move a2, rSELF # arg2
20903 JAL(dvmCheckBefore)
20906 /* ------------------------------ */
20908 .L_ALT_OP_OR_INT: /* 0x96 */
20909 /* File: mips/alt_stub.S */
20911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20912 * any interesting requests and then jump to the real instruction
20913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20916 * bail to the real handler if breakFlags==0.
20918 lbu a3, offThread_breakFlags(rSELF)
20919 la rBIX, dvmAsmInstructionStart + (150 * 128)
20920 lw rIBASE, offThread_curHandlerTable(rSELF)
20922 jr rBIX # nothing to do - jump to real handler
20925 move a0, rPC # arg0
20926 move a1, rFP # arg1
20927 move a2, rSELF # arg2
20928 JAL(dvmCheckBefore)
20931 /* ------------------------------ */
20933 .L_ALT_OP_XOR_INT: /* 0x97 */
20934 /* File: mips/alt_stub.S */
20936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20937 * any interesting requests and then jump to the real instruction
20938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20941 * bail to the real handler if breakFlags==0.
20943 lbu a3, offThread_breakFlags(rSELF)
20944 la rBIX, dvmAsmInstructionStart + (151 * 128)
20945 lw rIBASE, offThread_curHandlerTable(rSELF)
20947 jr rBIX # nothing to do - jump to real handler
20950 move a0, rPC # arg0
20951 move a1, rFP # arg1
20952 move a2, rSELF # arg2
20953 JAL(dvmCheckBefore)
20956 /* ------------------------------ */
20958 .L_ALT_OP_SHL_INT: /* 0x98 */
20959 /* File: mips/alt_stub.S */
20961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20962 * any interesting requests and then jump to the real instruction
20963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20966 * bail to the real handler if breakFlags==0.
20968 lbu a3, offThread_breakFlags(rSELF)
20969 la rBIX, dvmAsmInstructionStart + (152 * 128)
20970 lw rIBASE, offThread_curHandlerTable(rSELF)
20972 jr rBIX # nothing to do - jump to real handler
20975 move a0, rPC # arg0
20976 move a1, rFP # arg1
20977 move a2, rSELF # arg2
20978 JAL(dvmCheckBefore)
20981 /* ------------------------------ */
20983 .L_ALT_OP_SHR_INT: /* 0x99 */
20984 /* File: mips/alt_stub.S */
20986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
20987 * any interesting requests and then jump to the real instruction
20988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
20989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
20990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
20991 * bail to the real handler if breakFlags==0.
20993 lbu a3, offThread_breakFlags(rSELF)
20994 la rBIX, dvmAsmInstructionStart + (153 * 128)
20995 lw rIBASE, offThread_curHandlerTable(rSELF)
20997 jr rBIX # nothing to do - jump to real handler
21000 move a0, rPC # arg0
21001 move a1, rFP # arg1
21002 move a2, rSELF # arg2
21003 JAL(dvmCheckBefore)
21006 /* ------------------------------ */
21008 .L_ALT_OP_USHR_INT: /* 0x9a */
21009 /* File: mips/alt_stub.S */
21011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21012 * any interesting requests and then jump to the real instruction
21013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21016 * bail to the real handler if breakFlags==0.
21018 lbu a3, offThread_breakFlags(rSELF)
21019 la rBIX, dvmAsmInstructionStart + (154 * 128)
21020 lw rIBASE, offThread_curHandlerTable(rSELF)
21022 jr rBIX # nothing to do - jump to real handler
21025 move a0, rPC # arg0
21026 move a1, rFP # arg1
21027 move a2, rSELF # arg2
21028 JAL(dvmCheckBefore)
21031 /* ------------------------------ */
21033 .L_ALT_OP_ADD_LONG: /* 0x9b */
21034 /* File: mips/alt_stub.S */
21036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21037 * any interesting requests and then jump to the real instruction
21038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21041 * bail to the real handler if breakFlags==0.
21043 lbu a3, offThread_breakFlags(rSELF)
21044 la rBIX, dvmAsmInstructionStart + (155 * 128)
21045 lw rIBASE, offThread_curHandlerTable(rSELF)
21047 jr rBIX # nothing to do - jump to real handler
21050 move a0, rPC # arg0
21051 move a1, rFP # arg1
21052 move a2, rSELF # arg2
21053 JAL(dvmCheckBefore)
21056 /* ------------------------------ */
21058 .L_ALT_OP_SUB_LONG: /* 0x9c */
21059 /* File: mips/alt_stub.S */
21061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21062 * any interesting requests and then jump to the real instruction
21063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21066 * bail to the real handler if breakFlags==0.
21068 lbu a3, offThread_breakFlags(rSELF)
21069 la rBIX, dvmAsmInstructionStart + (156 * 128)
21070 lw rIBASE, offThread_curHandlerTable(rSELF)
21072 jr rBIX # nothing to do - jump to real handler
21075 move a0, rPC # arg0
21076 move a1, rFP # arg1
21077 move a2, rSELF # arg2
21078 JAL(dvmCheckBefore)
21081 /* ------------------------------ */
21083 .L_ALT_OP_MUL_LONG: /* 0x9d */
21084 /* File: mips/alt_stub.S */
21086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21087 * any interesting requests and then jump to the real instruction
21088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21091 * bail to the real handler if breakFlags==0.
21093 lbu a3, offThread_breakFlags(rSELF)
21094 la rBIX, dvmAsmInstructionStart + (157 * 128)
21095 lw rIBASE, offThread_curHandlerTable(rSELF)
21097 jr rBIX # nothing to do - jump to real handler
21100 move a0, rPC # arg0
21101 move a1, rFP # arg1
21102 move a2, rSELF # arg2
21103 JAL(dvmCheckBefore)
21106 /* ------------------------------ */
21108 .L_ALT_OP_DIV_LONG: /* 0x9e */
21109 /* File: mips/alt_stub.S */
21111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21112 * any interesting requests and then jump to the real instruction
21113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21116 * bail to the real handler if breakFlags==0.
21118 lbu a3, offThread_breakFlags(rSELF)
21119 la rBIX, dvmAsmInstructionStart + (158 * 128)
21120 lw rIBASE, offThread_curHandlerTable(rSELF)
21122 jr rBIX # nothing to do - jump to real handler
21125 move a0, rPC # arg0
21126 move a1, rFP # arg1
21127 move a2, rSELF # arg2
21128 JAL(dvmCheckBefore)
21131 /* ------------------------------ */
21133 .L_ALT_OP_REM_LONG: /* 0x9f */
21134 /* File: mips/alt_stub.S */
21136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21137 * any interesting requests and then jump to the real instruction
21138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21141 * bail to the real handler if breakFlags==0.
21143 lbu a3, offThread_breakFlags(rSELF)
21144 la rBIX, dvmAsmInstructionStart + (159 * 128)
21145 lw rIBASE, offThread_curHandlerTable(rSELF)
21147 jr rBIX # nothing to do - jump to real handler
21150 move a0, rPC # arg0
21151 move a1, rFP # arg1
21152 move a2, rSELF # arg2
21153 JAL(dvmCheckBefore)
21156 /* ------------------------------ */
21158 .L_ALT_OP_AND_LONG: /* 0xa0 */
21159 /* File: mips/alt_stub.S */
21161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21162 * any interesting requests and then jump to the real instruction
21163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21166 * bail to the real handler if breakFlags==0.
21168 lbu a3, offThread_breakFlags(rSELF)
21169 la rBIX, dvmAsmInstructionStart + (160 * 128)
21170 lw rIBASE, offThread_curHandlerTable(rSELF)
21172 jr rBIX # nothing to do - jump to real handler
21175 move a0, rPC # arg0
21176 move a1, rFP # arg1
21177 move a2, rSELF # arg2
21178 JAL(dvmCheckBefore)
21181 /* ------------------------------ */
21183 .L_ALT_OP_OR_LONG: /* 0xa1 */
21184 /* File: mips/alt_stub.S */
21186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21187 * any interesting requests and then jump to the real instruction
21188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21191 * bail to the real handler if breakFlags==0.
21193 lbu a3, offThread_breakFlags(rSELF)
21194 la rBIX, dvmAsmInstructionStart + (161 * 128)
21195 lw rIBASE, offThread_curHandlerTable(rSELF)
21197 jr rBIX # nothing to do - jump to real handler
21200 move a0, rPC # arg0
21201 move a1, rFP # arg1
21202 move a2, rSELF # arg2
21203 JAL(dvmCheckBefore)
21206 /* ------------------------------ */
21208 .L_ALT_OP_XOR_LONG: /* 0xa2 */
21209 /* File: mips/alt_stub.S */
21211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21212 * any interesting requests and then jump to the real instruction
21213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21216 * bail to the real handler if breakFlags==0.
21218 lbu a3, offThread_breakFlags(rSELF)
21219 la rBIX, dvmAsmInstructionStart + (162 * 128)
21220 lw rIBASE, offThread_curHandlerTable(rSELF)
21222 jr rBIX # nothing to do - jump to real handler
21225 move a0, rPC # arg0
21226 move a1, rFP # arg1
21227 move a2, rSELF # arg2
21228 JAL(dvmCheckBefore)
21231 /* ------------------------------ */
21233 .L_ALT_OP_SHL_LONG: /* 0xa3 */
21234 /* File: mips/alt_stub.S */
21236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21237 * any interesting requests and then jump to the real instruction
21238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21241 * bail to the real handler if breakFlags==0.
21243 lbu a3, offThread_breakFlags(rSELF)
21244 la rBIX, dvmAsmInstructionStart + (163 * 128)
21245 lw rIBASE, offThread_curHandlerTable(rSELF)
21247 jr rBIX # nothing to do - jump to real handler
21250 move a0, rPC # arg0
21251 move a1, rFP # arg1
21252 move a2, rSELF # arg2
21253 JAL(dvmCheckBefore)
21256 /* ------------------------------ */
21258 .L_ALT_OP_SHR_LONG: /* 0xa4 */
21259 /* File: mips/alt_stub.S */
21261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21262 * any interesting requests and then jump to the real instruction
21263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21266 * bail to the real handler if breakFlags==0.
21268 lbu a3, offThread_breakFlags(rSELF)
21269 la rBIX, dvmAsmInstructionStart + (164 * 128)
21270 lw rIBASE, offThread_curHandlerTable(rSELF)
21272 jr rBIX # nothing to do - jump to real handler
21275 move a0, rPC # arg0
21276 move a1, rFP # arg1
21277 move a2, rSELF # arg2
21278 JAL(dvmCheckBefore)
21281 /* ------------------------------ */
21283 .L_ALT_OP_USHR_LONG: /* 0xa5 */
21284 /* File: mips/alt_stub.S */
21286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21287 * any interesting requests and then jump to the real instruction
21288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21291 * bail to the real handler if breakFlags==0.
21293 lbu a3, offThread_breakFlags(rSELF)
21294 la rBIX, dvmAsmInstructionStart + (165 * 128)
21295 lw rIBASE, offThread_curHandlerTable(rSELF)
21297 jr rBIX # nothing to do - jump to real handler
21300 move a0, rPC # arg0
21301 move a1, rFP # arg1
21302 move a2, rSELF # arg2
21303 JAL(dvmCheckBefore)
21306 /* ------------------------------ */
21308 .L_ALT_OP_ADD_FLOAT: /* 0xa6 */
21309 /* File: mips/alt_stub.S */
21311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21312 * any interesting requests and then jump to the real instruction
21313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21316 * bail to the real handler if breakFlags==0.
21318 lbu a3, offThread_breakFlags(rSELF)
21319 la rBIX, dvmAsmInstructionStart + (166 * 128)
21320 lw rIBASE, offThread_curHandlerTable(rSELF)
21322 jr rBIX # nothing to do - jump to real handler
21325 move a0, rPC # arg0
21326 move a1, rFP # arg1
21327 move a2, rSELF # arg2
21328 JAL(dvmCheckBefore)
21331 /* ------------------------------ */
21333 .L_ALT_OP_SUB_FLOAT: /* 0xa7 */
21334 /* File: mips/alt_stub.S */
21336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21337 * any interesting requests and then jump to the real instruction
21338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21341 * bail to the real handler if breakFlags==0.
21343 lbu a3, offThread_breakFlags(rSELF)
21344 la rBIX, dvmAsmInstructionStart + (167 * 128)
21345 lw rIBASE, offThread_curHandlerTable(rSELF)
21347 jr rBIX # nothing to do - jump to real handler
21350 move a0, rPC # arg0
21351 move a1, rFP # arg1
21352 move a2, rSELF # arg2
21353 JAL(dvmCheckBefore)
21356 /* ------------------------------ */
21358 .L_ALT_OP_MUL_FLOAT: /* 0xa8 */
21359 /* File: mips/alt_stub.S */
21361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21362 * any interesting requests and then jump to the real instruction
21363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21366 * bail to the real handler if breakFlags==0.
21368 lbu a3, offThread_breakFlags(rSELF)
21369 la rBIX, dvmAsmInstructionStart + (168 * 128)
21370 lw rIBASE, offThread_curHandlerTable(rSELF)
21372 jr rBIX # nothing to do - jump to real handler
21375 move a0, rPC # arg0
21376 move a1, rFP # arg1
21377 move a2, rSELF # arg2
21378 JAL(dvmCheckBefore)
21381 /* ------------------------------ */
21383 .L_ALT_OP_DIV_FLOAT: /* 0xa9 */
21384 /* File: mips/alt_stub.S */
21386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21387 * any interesting requests and then jump to the real instruction
21388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21391 * bail to the real handler if breakFlags==0.
21393 lbu a3, offThread_breakFlags(rSELF)
21394 la rBIX, dvmAsmInstructionStart + (169 * 128)
21395 lw rIBASE, offThread_curHandlerTable(rSELF)
21397 jr rBIX # nothing to do - jump to real handler
21400 move a0, rPC # arg0
21401 move a1, rFP # arg1
21402 move a2, rSELF # arg2
21403 JAL(dvmCheckBefore)
21406 /* ------------------------------ */
21408 .L_ALT_OP_REM_FLOAT: /* 0xaa */
21409 /* File: mips/alt_stub.S */
21411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21412 * any interesting requests and then jump to the real instruction
21413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21416 * bail to the real handler if breakFlags==0.
21418 lbu a3, offThread_breakFlags(rSELF)
21419 la rBIX, dvmAsmInstructionStart + (170 * 128)
21420 lw rIBASE, offThread_curHandlerTable(rSELF)
21422 jr rBIX # nothing to do - jump to real handler
21425 move a0, rPC # arg0
21426 move a1, rFP # arg1
21427 move a2, rSELF # arg2
21428 JAL(dvmCheckBefore)
21431 /* ------------------------------ */
21433 .L_ALT_OP_ADD_DOUBLE: /* 0xab */
21434 /* File: mips/alt_stub.S */
21436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21437 * any interesting requests and then jump to the real instruction
21438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21441 * bail to the real handler if breakFlags==0.
21443 lbu a3, offThread_breakFlags(rSELF)
21444 la rBIX, dvmAsmInstructionStart + (171 * 128)
21445 lw rIBASE, offThread_curHandlerTable(rSELF)
21447 jr rBIX # nothing to do - jump to real handler
21450 move a0, rPC # arg0
21451 move a1, rFP # arg1
21452 move a2, rSELF # arg2
21453 JAL(dvmCheckBefore)
21456 /* ------------------------------ */
21458 .L_ALT_OP_SUB_DOUBLE: /* 0xac */
21459 /* File: mips/alt_stub.S */
21461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21462 * any interesting requests and then jump to the real instruction
21463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21466 * bail to the real handler if breakFlags==0.
21468 lbu a3, offThread_breakFlags(rSELF)
21469 la rBIX, dvmAsmInstructionStart + (172 * 128)
21470 lw rIBASE, offThread_curHandlerTable(rSELF)
21472 jr rBIX # nothing to do - jump to real handler
21475 move a0, rPC # arg0
21476 move a1, rFP # arg1
21477 move a2, rSELF # arg2
21478 JAL(dvmCheckBefore)
21481 /* ------------------------------ */
21483 .L_ALT_OP_MUL_DOUBLE: /* 0xad */
21484 /* File: mips/alt_stub.S */
21486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21487 * any interesting requests and then jump to the real instruction
21488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21491 * bail to the real handler if breakFlags==0.
21493 lbu a3, offThread_breakFlags(rSELF)
21494 la rBIX, dvmAsmInstructionStart + (173 * 128)
21495 lw rIBASE, offThread_curHandlerTable(rSELF)
21497 jr rBIX # nothing to do - jump to real handler
21500 move a0, rPC # arg0
21501 move a1, rFP # arg1
21502 move a2, rSELF # arg2
21503 JAL(dvmCheckBefore)
21506 /* ------------------------------ */
21508 .L_ALT_OP_DIV_DOUBLE: /* 0xae */
21509 /* File: mips/alt_stub.S */
21511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21512 * any interesting requests and then jump to the real instruction
21513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21516 * bail to the real handler if breakFlags==0.
21518 lbu a3, offThread_breakFlags(rSELF)
21519 la rBIX, dvmAsmInstructionStart + (174 * 128)
21520 lw rIBASE, offThread_curHandlerTable(rSELF)
21522 jr rBIX # nothing to do - jump to real handler
21525 move a0, rPC # arg0
21526 move a1, rFP # arg1
21527 move a2, rSELF # arg2
21528 JAL(dvmCheckBefore)
21531 /* ------------------------------ */
21533 .L_ALT_OP_REM_DOUBLE: /* 0xaf */
21534 /* File: mips/alt_stub.S */
21536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21537 * any interesting requests and then jump to the real instruction
21538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21541 * bail to the real handler if breakFlags==0.
21543 lbu a3, offThread_breakFlags(rSELF)
21544 la rBIX, dvmAsmInstructionStart + (175 * 128)
21545 lw rIBASE, offThread_curHandlerTable(rSELF)
21547 jr rBIX # nothing to do - jump to real handler
21550 move a0, rPC # arg0
21551 move a1, rFP # arg1
21552 move a2, rSELF # arg2
21553 JAL(dvmCheckBefore)
21556 /* ------------------------------ */
21558 .L_ALT_OP_ADD_INT_2ADDR: /* 0xb0 */
21559 /* File: mips/alt_stub.S */
21561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21562 * any interesting requests and then jump to the real instruction
21563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21566 * bail to the real handler if breakFlags==0.
21568 lbu a3, offThread_breakFlags(rSELF)
21569 la rBIX, dvmAsmInstructionStart + (176 * 128)
21570 lw rIBASE, offThread_curHandlerTable(rSELF)
21572 jr rBIX # nothing to do - jump to real handler
21575 move a0, rPC # arg0
21576 move a1, rFP # arg1
21577 move a2, rSELF # arg2
21578 JAL(dvmCheckBefore)
21581 /* ------------------------------ */
21583 .L_ALT_OP_SUB_INT_2ADDR: /* 0xb1 */
21584 /* File: mips/alt_stub.S */
21586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21587 * any interesting requests and then jump to the real instruction
21588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21591 * bail to the real handler if breakFlags==0.
21593 lbu a3, offThread_breakFlags(rSELF)
21594 la rBIX, dvmAsmInstructionStart + (177 * 128)
21595 lw rIBASE, offThread_curHandlerTable(rSELF)
21597 jr rBIX # nothing to do - jump to real handler
21600 move a0, rPC # arg0
21601 move a1, rFP # arg1
21602 move a2, rSELF # arg2
21603 JAL(dvmCheckBefore)
21606 /* ------------------------------ */
21608 .L_ALT_OP_MUL_INT_2ADDR: /* 0xb2 */
21609 /* File: mips/alt_stub.S */
21611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21612 * any interesting requests and then jump to the real instruction
21613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21616 * bail to the real handler if breakFlags==0.
21618 lbu a3, offThread_breakFlags(rSELF)
21619 la rBIX, dvmAsmInstructionStart + (178 * 128)
21620 lw rIBASE, offThread_curHandlerTable(rSELF)
21622 jr rBIX # nothing to do - jump to real handler
21625 move a0, rPC # arg0
21626 move a1, rFP # arg1
21627 move a2, rSELF # arg2
21628 JAL(dvmCheckBefore)
21631 /* ------------------------------ */
21633 .L_ALT_OP_DIV_INT_2ADDR: /* 0xb3 */
21634 /* File: mips/alt_stub.S */
21636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21637 * any interesting requests and then jump to the real instruction
21638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21641 * bail to the real handler if breakFlags==0.
21643 lbu a3, offThread_breakFlags(rSELF)
21644 la rBIX, dvmAsmInstructionStart + (179 * 128)
21645 lw rIBASE, offThread_curHandlerTable(rSELF)
21647 jr rBIX # nothing to do - jump to real handler
21650 move a0, rPC # arg0
21651 move a1, rFP # arg1
21652 move a2, rSELF # arg2
21653 JAL(dvmCheckBefore)
21656 /* ------------------------------ */
21658 .L_ALT_OP_REM_INT_2ADDR: /* 0xb4 */
21659 /* File: mips/alt_stub.S */
21661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21662 * any interesting requests and then jump to the real instruction
21663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21666 * bail to the real handler if breakFlags==0.
21668 lbu a3, offThread_breakFlags(rSELF)
21669 la rBIX, dvmAsmInstructionStart + (180 * 128)
21670 lw rIBASE, offThread_curHandlerTable(rSELF)
21672 jr rBIX # nothing to do - jump to real handler
21675 move a0, rPC # arg0
21676 move a1, rFP # arg1
21677 move a2, rSELF # arg2
21678 JAL(dvmCheckBefore)
21681 /* ------------------------------ */
21683 .L_ALT_OP_AND_INT_2ADDR: /* 0xb5 */
21684 /* File: mips/alt_stub.S */
21686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21687 * any interesting requests and then jump to the real instruction
21688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21691 * bail to the real handler if breakFlags==0.
21693 lbu a3, offThread_breakFlags(rSELF)
21694 la rBIX, dvmAsmInstructionStart + (181 * 128)
21695 lw rIBASE, offThread_curHandlerTable(rSELF)
21697 jr rBIX # nothing to do - jump to real handler
21700 move a0, rPC # arg0
21701 move a1, rFP # arg1
21702 move a2, rSELF # arg2
21703 JAL(dvmCheckBefore)
21706 /* ------------------------------ */
21708 .L_ALT_OP_OR_INT_2ADDR: /* 0xb6 */
21709 /* File: mips/alt_stub.S */
21711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21712 * any interesting requests and then jump to the real instruction
21713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21716 * bail to the real handler if breakFlags==0.
21718 lbu a3, offThread_breakFlags(rSELF)
21719 la rBIX, dvmAsmInstructionStart + (182 * 128)
21720 lw rIBASE, offThread_curHandlerTable(rSELF)
21722 jr rBIX # nothing to do - jump to real handler
21725 move a0, rPC # arg0
21726 move a1, rFP # arg1
21727 move a2, rSELF # arg2
21728 JAL(dvmCheckBefore)
21731 /* ------------------------------ */
21733 .L_ALT_OP_XOR_INT_2ADDR: /* 0xb7 */
21734 /* File: mips/alt_stub.S */
21736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21737 * any interesting requests and then jump to the real instruction
21738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21741 * bail to the real handler if breakFlags==0.
21743 lbu a3, offThread_breakFlags(rSELF)
21744 la rBIX, dvmAsmInstructionStart + (183 * 128)
21745 lw rIBASE, offThread_curHandlerTable(rSELF)
21747 jr rBIX # nothing to do - jump to real handler
21750 move a0, rPC # arg0
21751 move a1, rFP # arg1
21752 move a2, rSELF # arg2
21753 JAL(dvmCheckBefore)
21756 /* ------------------------------ */
21758 .L_ALT_OP_SHL_INT_2ADDR: /* 0xb8 */
21759 /* File: mips/alt_stub.S */
21761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21762 * any interesting requests and then jump to the real instruction
21763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21766 * bail to the real handler if breakFlags==0.
21768 lbu a3, offThread_breakFlags(rSELF)
21769 la rBIX, dvmAsmInstructionStart + (184 * 128)
21770 lw rIBASE, offThread_curHandlerTable(rSELF)
21772 jr rBIX # nothing to do - jump to real handler
21775 move a0, rPC # arg0
21776 move a1, rFP # arg1
21777 move a2, rSELF # arg2
21778 JAL(dvmCheckBefore)
21781 /* ------------------------------ */
21783 .L_ALT_OP_SHR_INT_2ADDR: /* 0xb9 */
21784 /* File: mips/alt_stub.S */
21786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21787 * any interesting requests and then jump to the real instruction
21788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21791 * bail to the real handler if breakFlags==0.
21793 lbu a3, offThread_breakFlags(rSELF)
21794 la rBIX, dvmAsmInstructionStart + (185 * 128)
21795 lw rIBASE, offThread_curHandlerTable(rSELF)
21797 jr rBIX # nothing to do - jump to real handler
21800 move a0, rPC # arg0
21801 move a1, rFP # arg1
21802 move a2, rSELF # arg2
21803 JAL(dvmCheckBefore)
21806 /* ------------------------------ */
21808 .L_ALT_OP_USHR_INT_2ADDR: /* 0xba */
21809 /* File: mips/alt_stub.S */
21811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21812 * any interesting requests and then jump to the real instruction
21813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21816 * bail to the real handler if breakFlags==0.
21818 lbu a3, offThread_breakFlags(rSELF)
21819 la rBIX, dvmAsmInstructionStart + (186 * 128)
21820 lw rIBASE, offThread_curHandlerTable(rSELF)
21822 jr rBIX # nothing to do - jump to real handler
21825 move a0, rPC # arg0
21826 move a1, rFP # arg1
21827 move a2, rSELF # arg2
21828 JAL(dvmCheckBefore)
21831 /* ------------------------------ */
21833 .L_ALT_OP_ADD_LONG_2ADDR: /* 0xbb */
21834 /* File: mips/alt_stub.S */
21836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21837 * any interesting requests and then jump to the real instruction
21838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21841 * bail to the real handler if breakFlags==0.
21843 lbu a3, offThread_breakFlags(rSELF)
21844 la rBIX, dvmAsmInstructionStart + (187 * 128)
21845 lw rIBASE, offThread_curHandlerTable(rSELF)
21847 jr rBIX # nothing to do - jump to real handler
21850 move a0, rPC # arg0
21851 move a1, rFP # arg1
21852 move a2, rSELF # arg2
21853 JAL(dvmCheckBefore)
21856 /* ------------------------------ */
21858 .L_ALT_OP_SUB_LONG_2ADDR: /* 0xbc */
21859 /* File: mips/alt_stub.S */
21861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21862 * any interesting requests and then jump to the real instruction
21863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21866 * bail to the real handler if breakFlags==0.
21868 lbu a3, offThread_breakFlags(rSELF)
21869 la rBIX, dvmAsmInstructionStart + (188 * 128)
21870 lw rIBASE, offThread_curHandlerTable(rSELF)
21872 jr rBIX # nothing to do - jump to real handler
21875 move a0, rPC # arg0
21876 move a1, rFP # arg1
21877 move a2, rSELF # arg2
21878 JAL(dvmCheckBefore)
21881 /* ------------------------------ */
21883 .L_ALT_OP_MUL_LONG_2ADDR: /* 0xbd */
21884 /* File: mips/alt_stub.S */
21886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21887 * any interesting requests and then jump to the real instruction
21888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21891 * bail to the real handler if breakFlags==0.
21893 lbu a3, offThread_breakFlags(rSELF)
21894 la rBIX, dvmAsmInstructionStart + (189 * 128)
21895 lw rIBASE, offThread_curHandlerTable(rSELF)
21897 jr rBIX # nothing to do - jump to real handler
21900 move a0, rPC # arg0
21901 move a1, rFP # arg1
21902 move a2, rSELF # arg2
21903 JAL(dvmCheckBefore)
21906 /* ------------------------------ */
21908 .L_ALT_OP_DIV_LONG_2ADDR: /* 0xbe */
21909 /* File: mips/alt_stub.S */
21911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21912 * any interesting requests and then jump to the real instruction
21913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21916 * bail to the real handler if breakFlags==0.
21918 lbu a3, offThread_breakFlags(rSELF)
21919 la rBIX, dvmAsmInstructionStart + (190 * 128)
21920 lw rIBASE, offThread_curHandlerTable(rSELF)
21922 jr rBIX # nothing to do - jump to real handler
21925 move a0, rPC # arg0
21926 move a1, rFP # arg1
21927 move a2, rSELF # arg2
21928 JAL(dvmCheckBefore)
21931 /* ------------------------------ */
21933 .L_ALT_OP_REM_LONG_2ADDR: /* 0xbf */
21934 /* File: mips/alt_stub.S */
21936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21937 * any interesting requests and then jump to the real instruction
21938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21941 * bail to the real handler if breakFlags==0.
21943 lbu a3, offThread_breakFlags(rSELF)
21944 la rBIX, dvmAsmInstructionStart + (191 * 128)
21945 lw rIBASE, offThread_curHandlerTable(rSELF)
21947 jr rBIX # nothing to do - jump to real handler
21950 move a0, rPC # arg0
21951 move a1, rFP # arg1
21952 move a2, rSELF # arg2
21953 JAL(dvmCheckBefore)
21956 /* ------------------------------ */
21958 .L_ALT_OP_AND_LONG_2ADDR: /* 0xc0 */
21959 /* File: mips/alt_stub.S */
21961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21962 * any interesting requests and then jump to the real instruction
21963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21966 * bail to the real handler if breakFlags==0.
21968 lbu a3, offThread_breakFlags(rSELF)
21969 la rBIX, dvmAsmInstructionStart + (192 * 128)
21970 lw rIBASE, offThread_curHandlerTable(rSELF)
21972 jr rBIX # nothing to do - jump to real handler
21975 move a0, rPC # arg0
21976 move a1, rFP # arg1
21977 move a2, rSELF # arg2
21978 JAL(dvmCheckBefore)
21981 /* ------------------------------ */
21983 .L_ALT_OP_OR_LONG_2ADDR: /* 0xc1 */
21984 /* File: mips/alt_stub.S */
21986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
21987 * any interesting requests and then jump to the real instruction
21988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
21989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
21990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
21991 * bail to the real handler if breakFlags==0.
21993 lbu a3, offThread_breakFlags(rSELF)
21994 la rBIX, dvmAsmInstructionStart + (193 * 128)
21995 lw rIBASE, offThread_curHandlerTable(rSELF)
21997 jr rBIX # nothing to do - jump to real handler
22000 move a0, rPC # arg0
22001 move a1, rFP # arg1
22002 move a2, rSELF # arg2
22003 JAL(dvmCheckBefore)
22006 /* ------------------------------ */
22008 .L_ALT_OP_XOR_LONG_2ADDR: /* 0xc2 */
22009 /* File: mips/alt_stub.S */
22011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22012 * any interesting requests and then jump to the real instruction
22013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22016 * bail to the real handler if breakFlags==0.
22018 lbu a3, offThread_breakFlags(rSELF)
22019 la rBIX, dvmAsmInstructionStart + (194 * 128)
22020 lw rIBASE, offThread_curHandlerTable(rSELF)
22022 jr rBIX # nothing to do - jump to real handler
22025 move a0, rPC # arg0
22026 move a1, rFP # arg1
22027 move a2, rSELF # arg2
22028 JAL(dvmCheckBefore)
22031 /* ------------------------------ */
22033 .L_ALT_OP_SHL_LONG_2ADDR: /* 0xc3 */
22034 /* File: mips/alt_stub.S */
22036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22037 * any interesting requests and then jump to the real instruction
22038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22041 * bail to the real handler if breakFlags==0.
22043 lbu a3, offThread_breakFlags(rSELF)
22044 la rBIX, dvmAsmInstructionStart + (195 * 128)
22045 lw rIBASE, offThread_curHandlerTable(rSELF)
22047 jr rBIX # nothing to do - jump to real handler
22050 move a0, rPC # arg0
22051 move a1, rFP # arg1
22052 move a2, rSELF # arg2
22053 JAL(dvmCheckBefore)
22056 /* ------------------------------ */
22058 .L_ALT_OP_SHR_LONG_2ADDR: /* 0xc4 */
22059 /* File: mips/alt_stub.S */
22061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22062 * any interesting requests and then jump to the real instruction
22063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22066 * bail to the real handler if breakFlags==0.
22068 lbu a3, offThread_breakFlags(rSELF)
22069 la rBIX, dvmAsmInstructionStart + (196 * 128)
22070 lw rIBASE, offThread_curHandlerTable(rSELF)
22072 jr rBIX # nothing to do - jump to real handler
22075 move a0, rPC # arg0
22076 move a1, rFP # arg1
22077 move a2, rSELF # arg2
22078 JAL(dvmCheckBefore)
22081 /* ------------------------------ */
22083 .L_ALT_OP_USHR_LONG_2ADDR: /* 0xc5 */
22084 /* File: mips/alt_stub.S */
22086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22087 * any interesting requests and then jump to the real instruction
22088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22091 * bail to the real handler if breakFlags==0.
22093 lbu a3, offThread_breakFlags(rSELF)
22094 la rBIX, dvmAsmInstructionStart + (197 * 128)
22095 lw rIBASE, offThread_curHandlerTable(rSELF)
22097 jr rBIX # nothing to do - jump to real handler
22100 move a0, rPC # arg0
22101 move a1, rFP # arg1
22102 move a2, rSELF # arg2
22103 JAL(dvmCheckBefore)
22106 /* ------------------------------ */
22108 .L_ALT_OP_ADD_FLOAT_2ADDR: /* 0xc6 */
22109 /* File: mips/alt_stub.S */
22111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22112 * any interesting requests and then jump to the real instruction
22113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22116 * bail to the real handler if breakFlags==0.
22118 lbu a3, offThread_breakFlags(rSELF)
22119 la rBIX, dvmAsmInstructionStart + (198 * 128)
22120 lw rIBASE, offThread_curHandlerTable(rSELF)
22122 jr rBIX # nothing to do - jump to real handler
22125 move a0, rPC # arg0
22126 move a1, rFP # arg1
22127 move a2, rSELF # arg2
22128 JAL(dvmCheckBefore)
22131 /* ------------------------------ */
22133 .L_ALT_OP_SUB_FLOAT_2ADDR: /* 0xc7 */
22134 /* File: mips/alt_stub.S */
22136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22137 * any interesting requests and then jump to the real instruction
22138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22141 * bail to the real handler if breakFlags==0.
22143 lbu a3, offThread_breakFlags(rSELF)
22144 la rBIX, dvmAsmInstructionStart + (199 * 128)
22145 lw rIBASE, offThread_curHandlerTable(rSELF)
22147 jr rBIX # nothing to do - jump to real handler
22150 move a0, rPC # arg0
22151 move a1, rFP # arg1
22152 move a2, rSELF # arg2
22153 JAL(dvmCheckBefore)
22156 /* ------------------------------ */
22158 .L_ALT_OP_MUL_FLOAT_2ADDR: /* 0xc8 */
22159 /* File: mips/alt_stub.S */
22161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22162 * any interesting requests and then jump to the real instruction
22163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22166 * bail to the real handler if breakFlags==0.
22168 lbu a3, offThread_breakFlags(rSELF)
22169 la rBIX, dvmAsmInstructionStart + (200 * 128)
22170 lw rIBASE, offThread_curHandlerTable(rSELF)
22172 jr rBIX # nothing to do - jump to real handler
22175 move a0, rPC # arg0
22176 move a1, rFP # arg1
22177 move a2, rSELF # arg2
22178 JAL(dvmCheckBefore)
22181 /* ------------------------------ */
22183 .L_ALT_OP_DIV_FLOAT_2ADDR: /* 0xc9 */
22184 /* File: mips/alt_stub.S */
22186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22187 * any interesting requests and then jump to the real instruction
22188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22191 * bail to the real handler if breakFlags==0.
22193 lbu a3, offThread_breakFlags(rSELF)
22194 la rBIX, dvmAsmInstructionStart + (201 * 128)
22195 lw rIBASE, offThread_curHandlerTable(rSELF)
22197 jr rBIX # nothing to do - jump to real handler
22200 move a0, rPC # arg0
22201 move a1, rFP # arg1
22202 move a2, rSELF # arg2
22203 JAL(dvmCheckBefore)
22206 /* ------------------------------ */
22208 .L_ALT_OP_REM_FLOAT_2ADDR: /* 0xca */
22209 /* File: mips/alt_stub.S */
22211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22212 * any interesting requests and then jump to the real instruction
22213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22216 * bail to the real handler if breakFlags==0.
22218 lbu a3, offThread_breakFlags(rSELF)
22219 la rBIX, dvmAsmInstructionStart + (202 * 128)
22220 lw rIBASE, offThread_curHandlerTable(rSELF)
22222 jr rBIX # nothing to do - jump to real handler
22225 move a0, rPC # arg0
22226 move a1, rFP # arg1
22227 move a2, rSELF # arg2
22228 JAL(dvmCheckBefore)
22231 /* ------------------------------ */
22233 .L_ALT_OP_ADD_DOUBLE_2ADDR: /* 0xcb */
22234 /* File: mips/alt_stub.S */
22236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22237 * any interesting requests and then jump to the real instruction
22238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22241 * bail to the real handler if breakFlags==0.
22243 lbu a3, offThread_breakFlags(rSELF)
22244 la rBIX, dvmAsmInstructionStart + (203 * 128)
22245 lw rIBASE, offThread_curHandlerTable(rSELF)
22247 jr rBIX # nothing to do - jump to real handler
22250 move a0, rPC # arg0
22251 move a1, rFP # arg1
22252 move a2, rSELF # arg2
22253 JAL(dvmCheckBefore)
22256 /* ------------------------------ */
22258 .L_ALT_OP_SUB_DOUBLE_2ADDR: /* 0xcc */
22259 /* File: mips/alt_stub.S */
22261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22262 * any interesting requests and then jump to the real instruction
22263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22266 * bail to the real handler if breakFlags==0.
22268 lbu a3, offThread_breakFlags(rSELF)
22269 la rBIX, dvmAsmInstructionStart + (204 * 128)
22270 lw rIBASE, offThread_curHandlerTable(rSELF)
22272 jr rBIX # nothing to do - jump to real handler
22275 move a0, rPC # arg0
22276 move a1, rFP # arg1
22277 move a2, rSELF # arg2
22278 JAL(dvmCheckBefore)
22281 /* ------------------------------ */
22283 .L_ALT_OP_MUL_DOUBLE_2ADDR: /* 0xcd */
22284 /* File: mips/alt_stub.S */
22286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22287 * any interesting requests and then jump to the real instruction
22288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22291 * bail to the real handler if breakFlags==0.
22293 lbu a3, offThread_breakFlags(rSELF)
22294 la rBIX, dvmAsmInstructionStart + (205 * 128)
22295 lw rIBASE, offThread_curHandlerTable(rSELF)
22297 jr rBIX # nothing to do - jump to real handler
22300 move a0, rPC # arg0
22301 move a1, rFP # arg1
22302 move a2, rSELF # arg2
22303 JAL(dvmCheckBefore)
22306 /* ------------------------------ */
22308 .L_ALT_OP_DIV_DOUBLE_2ADDR: /* 0xce */
22309 /* File: mips/alt_stub.S */
22311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22312 * any interesting requests and then jump to the real instruction
22313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22316 * bail to the real handler if breakFlags==0.
22318 lbu a3, offThread_breakFlags(rSELF)
22319 la rBIX, dvmAsmInstructionStart + (206 * 128)
22320 lw rIBASE, offThread_curHandlerTable(rSELF)
22322 jr rBIX # nothing to do - jump to real handler
22325 move a0, rPC # arg0
22326 move a1, rFP # arg1
22327 move a2, rSELF # arg2
22328 JAL(dvmCheckBefore)
22331 /* ------------------------------ */
22333 .L_ALT_OP_REM_DOUBLE_2ADDR: /* 0xcf */
22334 /* File: mips/alt_stub.S */
22336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22337 * any interesting requests and then jump to the real instruction
22338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22341 * bail to the real handler if breakFlags==0.
22343 lbu a3, offThread_breakFlags(rSELF)
22344 la rBIX, dvmAsmInstructionStart + (207 * 128)
22345 lw rIBASE, offThread_curHandlerTable(rSELF)
22347 jr rBIX # nothing to do - jump to real handler
22350 move a0, rPC # arg0
22351 move a1, rFP # arg1
22352 move a2, rSELF # arg2
22353 JAL(dvmCheckBefore)
22356 /* ------------------------------ */
22358 .L_ALT_OP_ADD_INT_LIT16: /* 0xd0 */
22359 /* File: mips/alt_stub.S */
22361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22362 * any interesting requests and then jump to the real instruction
22363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22366 * bail to the real handler if breakFlags==0.
22368 lbu a3, offThread_breakFlags(rSELF)
22369 la rBIX, dvmAsmInstructionStart + (208 * 128)
22370 lw rIBASE, offThread_curHandlerTable(rSELF)
22372 jr rBIX # nothing to do - jump to real handler
22375 move a0, rPC # arg0
22376 move a1, rFP # arg1
22377 move a2, rSELF # arg2
22378 JAL(dvmCheckBefore)
22381 /* ------------------------------ */
22383 .L_ALT_OP_RSUB_INT: /* 0xd1 */
22384 /* File: mips/alt_stub.S */
22386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22387 * any interesting requests and then jump to the real instruction
22388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22391 * bail to the real handler if breakFlags==0.
22393 lbu a3, offThread_breakFlags(rSELF)
22394 la rBIX, dvmAsmInstructionStart + (209 * 128)
22395 lw rIBASE, offThread_curHandlerTable(rSELF)
22397 jr rBIX # nothing to do - jump to real handler
22400 move a0, rPC # arg0
22401 move a1, rFP # arg1
22402 move a2, rSELF # arg2
22403 JAL(dvmCheckBefore)
22406 /* ------------------------------ */
22408 .L_ALT_OP_MUL_INT_LIT16: /* 0xd2 */
22409 /* File: mips/alt_stub.S */
22411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22412 * any interesting requests and then jump to the real instruction
22413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22416 * bail to the real handler if breakFlags==0.
22418 lbu a3, offThread_breakFlags(rSELF)
22419 la rBIX, dvmAsmInstructionStart + (210 * 128)
22420 lw rIBASE, offThread_curHandlerTable(rSELF)
22422 jr rBIX # nothing to do - jump to real handler
22425 move a0, rPC # arg0
22426 move a1, rFP # arg1
22427 move a2, rSELF # arg2
22428 JAL(dvmCheckBefore)
22431 /* ------------------------------ */
22433 .L_ALT_OP_DIV_INT_LIT16: /* 0xd3 */
22434 /* File: mips/alt_stub.S */
22436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22437 * any interesting requests and then jump to the real instruction
22438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22441 * bail to the real handler if breakFlags==0.
22443 lbu a3, offThread_breakFlags(rSELF)
22444 la rBIX, dvmAsmInstructionStart + (211 * 128)
22445 lw rIBASE, offThread_curHandlerTable(rSELF)
22447 jr rBIX # nothing to do - jump to real handler
22450 move a0, rPC # arg0
22451 move a1, rFP # arg1
22452 move a2, rSELF # arg2
22453 JAL(dvmCheckBefore)
22456 /* ------------------------------ */
22458 .L_ALT_OP_REM_INT_LIT16: /* 0xd4 */
22459 /* File: mips/alt_stub.S */
22461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22462 * any interesting requests and then jump to the real instruction
22463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22466 * bail to the real handler if breakFlags==0.
22468 lbu a3, offThread_breakFlags(rSELF)
22469 la rBIX, dvmAsmInstructionStart + (212 * 128)
22470 lw rIBASE, offThread_curHandlerTable(rSELF)
22472 jr rBIX # nothing to do - jump to real handler
22475 move a0, rPC # arg0
22476 move a1, rFP # arg1
22477 move a2, rSELF # arg2
22478 JAL(dvmCheckBefore)
22481 /* ------------------------------ */
22483 .L_ALT_OP_AND_INT_LIT16: /* 0xd5 */
22484 /* File: mips/alt_stub.S */
22486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22487 * any interesting requests and then jump to the real instruction
22488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22491 * bail to the real handler if breakFlags==0.
22493 lbu a3, offThread_breakFlags(rSELF)
22494 la rBIX, dvmAsmInstructionStart + (213 * 128)
22495 lw rIBASE, offThread_curHandlerTable(rSELF)
22497 jr rBIX # nothing to do - jump to real handler
22500 move a0, rPC # arg0
22501 move a1, rFP # arg1
22502 move a2, rSELF # arg2
22503 JAL(dvmCheckBefore)
22506 /* ------------------------------ */
22508 .L_ALT_OP_OR_INT_LIT16: /* 0xd6 */
22509 /* File: mips/alt_stub.S */
22511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22512 * any interesting requests and then jump to the real instruction
22513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22516 * bail to the real handler if breakFlags==0.
22518 lbu a3, offThread_breakFlags(rSELF)
22519 la rBIX, dvmAsmInstructionStart + (214 * 128)
22520 lw rIBASE, offThread_curHandlerTable(rSELF)
22522 jr rBIX # nothing to do - jump to real handler
22525 move a0, rPC # arg0
22526 move a1, rFP # arg1
22527 move a2, rSELF # arg2
22528 JAL(dvmCheckBefore)
22531 /* ------------------------------ */
22533 .L_ALT_OP_XOR_INT_LIT16: /* 0xd7 */
22534 /* File: mips/alt_stub.S */
22536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22537 * any interesting requests and then jump to the real instruction
22538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22541 * bail to the real handler if breakFlags==0.
22543 lbu a3, offThread_breakFlags(rSELF)
22544 la rBIX, dvmAsmInstructionStart + (215 * 128)
22545 lw rIBASE, offThread_curHandlerTable(rSELF)
22547 jr rBIX # nothing to do - jump to real handler
22550 move a0, rPC # arg0
22551 move a1, rFP # arg1
22552 move a2, rSELF # arg2
22553 JAL(dvmCheckBefore)
22556 /* ------------------------------ */
22558 .L_ALT_OP_ADD_INT_LIT8: /* 0xd8 */
22559 /* File: mips/alt_stub.S */
22561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22562 * any interesting requests and then jump to the real instruction
22563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22566 * bail to the real handler if breakFlags==0.
22568 lbu a3, offThread_breakFlags(rSELF)
22569 la rBIX, dvmAsmInstructionStart + (216 * 128)
22570 lw rIBASE, offThread_curHandlerTable(rSELF)
22572 jr rBIX # nothing to do - jump to real handler
22575 move a0, rPC # arg0
22576 move a1, rFP # arg1
22577 move a2, rSELF # arg2
22578 JAL(dvmCheckBefore)
22581 /* ------------------------------ */
22583 .L_ALT_OP_RSUB_INT_LIT8: /* 0xd9 */
22584 /* File: mips/alt_stub.S */
22586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22587 * any interesting requests and then jump to the real instruction
22588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22591 * bail to the real handler if breakFlags==0.
22593 lbu a3, offThread_breakFlags(rSELF)
22594 la rBIX, dvmAsmInstructionStart + (217 * 128)
22595 lw rIBASE, offThread_curHandlerTable(rSELF)
22597 jr rBIX # nothing to do - jump to real handler
22600 move a0, rPC # arg0
22601 move a1, rFP # arg1
22602 move a2, rSELF # arg2
22603 JAL(dvmCheckBefore)
22606 /* ------------------------------ */
22608 .L_ALT_OP_MUL_INT_LIT8: /* 0xda */
22609 /* File: mips/alt_stub.S */
22611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22612 * any interesting requests and then jump to the real instruction
22613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22616 * bail to the real handler if breakFlags==0.
22618 lbu a3, offThread_breakFlags(rSELF)
22619 la rBIX, dvmAsmInstructionStart + (218 * 128)
22620 lw rIBASE, offThread_curHandlerTable(rSELF)
22622 jr rBIX # nothing to do - jump to real handler
22625 move a0, rPC # arg0
22626 move a1, rFP # arg1
22627 move a2, rSELF # arg2
22628 JAL(dvmCheckBefore)
22631 /* ------------------------------ */
22633 .L_ALT_OP_DIV_INT_LIT8: /* 0xdb */
22634 /* File: mips/alt_stub.S */
22636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22637 * any interesting requests and then jump to the real instruction
22638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22641 * bail to the real handler if breakFlags==0.
22643 lbu a3, offThread_breakFlags(rSELF)
22644 la rBIX, dvmAsmInstructionStart + (219 * 128)
22645 lw rIBASE, offThread_curHandlerTable(rSELF)
22647 jr rBIX # nothing to do - jump to real handler
22650 move a0, rPC # arg0
22651 move a1, rFP # arg1
22652 move a2, rSELF # arg2
22653 JAL(dvmCheckBefore)
22656 /* ------------------------------ */
22658 .L_ALT_OP_REM_INT_LIT8: /* 0xdc */
22659 /* File: mips/alt_stub.S */
22661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22662 * any interesting requests and then jump to the real instruction
22663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22666 * bail to the real handler if breakFlags==0.
22668 lbu a3, offThread_breakFlags(rSELF)
22669 la rBIX, dvmAsmInstructionStart + (220 * 128)
22670 lw rIBASE, offThread_curHandlerTable(rSELF)
22672 jr rBIX # nothing to do - jump to real handler
22675 move a0, rPC # arg0
22676 move a1, rFP # arg1
22677 move a2, rSELF # arg2
22678 JAL(dvmCheckBefore)
22681 /* ------------------------------ */
22683 .L_ALT_OP_AND_INT_LIT8: /* 0xdd */
22684 /* File: mips/alt_stub.S */
22686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22687 * any interesting requests and then jump to the real instruction
22688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22691 * bail to the real handler if breakFlags==0.
22693 lbu a3, offThread_breakFlags(rSELF)
22694 la rBIX, dvmAsmInstructionStart + (221 * 128)
22695 lw rIBASE, offThread_curHandlerTable(rSELF)
22697 jr rBIX # nothing to do - jump to real handler
22700 move a0, rPC # arg0
22701 move a1, rFP # arg1
22702 move a2, rSELF # arg2
22703 JAL(dvmCheckBefore)
22706 /* ------------------------------ */
22708 .L_ALT_OP_OR_INT_LIT8: /* 0xde */
22709 /* File: mips/alt_stub.S */
22711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22712 * any interesting requests and then jump to the real instruction
22713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22716 * bail to the real handler if breakFlags==0.
22718 lbu a3, offThread_breakFlags(rSELF)
22719 la rBIX, dvmAsmInstructionStart + (222 * 128)
22720 lw rIBASE, offThread_curHandlerTable(rSELF)
22722 jr rBIX # nothing to do - jump to real handler
22725 move a0, rPC # arg0
22726 move a1, rFP # arg1
22727 move a2, rSELF # arg2
22728 JAL(dvmCheckBefore)
22731 /* ------------------------------ */
22733 .L_ALT_OP_XOR_INT_LIT8: /* 0xdf */
22734 /* File: mips/alt_stub.S */
22736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22737 * any interesting requests and then jump to the real instruction
22738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22741 * bail to the real handler if breakFlags==0.
22743 lbu a3, offThread_breakFlags(rSELF)
22744 la rBIX, dvmAsmInstructionStart + (223 * 128)
22745 lw rIBASE, offThread_curHandlerTable(rSELF)
22747 jr rBIX # nothing to do - jump to real handler
22750 move a0, rPC # arg0
22751 move a1, rFP # arg1
22752 move a2, rSELF # arg2
22753 JAL(dvmCheckBefore)
22756 /* ------------------------------ */
22758 .L_ALT_OP_SHL_INT_LIT8: /* 0xe0 */
22759 /* File: mips/alt_stub.S */
22761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22762 * any interesting requests and then jump to the real instruction
22763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22766 * bail to the real handler if breakFlags==0.
22768 lbu a3, offThread_breakFlags(rSELF)
22769 la rBIX, dvmAsmInstructionStart + (224 * 128)
22770 lw rIBASE, offThread_curHandlerTable(rSELF)
22772 jr rBIX # nothing to do - jump to real handler
22775 move a0, rPC # arg0
22776 move a1, rFP # arg1
22777 move a2, rSELF # arg2
22778 JAL(dvmCheckBefore)
22781 /* ------------------------------ */
22783 .L_ALT_OP_SHR_INT_LIT8: /* 0xe1 */
22784 /* File: mips/alt_stub.S */
22786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22787 * any interesting requests and then jump to the real instruction
22788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22791 * bail to the real handler if breakFlags==0.
22793 lbu a3, offThread_breakFlags(rSELF)
22794 la rBIX, dvmAsmInstructionStart + (225 * 128)
22795 lw rIBASE, offThread_curHandlerTable(rSELF)
22797 jr rBIX # nothing to do - jump to real handler
22800 move a0, rPC # arg0
22801 move a1, rFP # arg1
22802 move a2, rSELF # arg2
22803 JAL(dvmCheckBefore)
22806 /* ------------------------------ */
22808 .L_ALT_OP_USHR_INT_LIT8: /* 0xe2 */
22809 /* File: mips/alt_stub.S */
22811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22812 * any interesting requests and then jump to the real instruction
22813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22816 * bail to the real handler if breakFlags==0.
22818 lbu a3, offThread_breakFlags(rSELF)
22819 la rBIX, dvmAsmInstructionStart + (226 * 128)
22820 lw rIBASE, offThread_curHandlerTable(rSELF)
22822 jr rBIX # nothing to do - jump to real handler
22825 move a0, rPC # arg0
22826 move a1, rFP # arg1
22827 move a2, rSELF # arg2
22828 JAL(dvmCheckBefore)
22831 /* ------------------------------ */
22833 .L_ALT_OP_IGET_VOLATILE: /* 0xe3 */
22834 /* File: mips/alt_stub.S */
22836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22837 * any interesting requests and then jump to the real instruction
22838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22841 * bail to the real handler if breakFlags==0.
22843 lbu a3, offThread_breakFlags(rSELF)
22844 la rBIX, dvmAsmInstructionStart + (227 * 128)
22845 lw rIBASE, offThread_curHandlerTable(rSELF)
22847 jr rBIX # nothing to do - jump to real handler
22850 move a0, rPC # arg0
22851 move a1, rFP # arg1
22852 move a2, rSELF # arg2
22853 JAL(dvmCheckBefore)
22856 /* ------------------------------ */
22858 .L_ALT_OP_IPUT_VOLATILE: /* 0xe4 */
22859 /* File: mips/alt_stub.S */
22861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22862 * any interesting requests and then jump to the real instruction
22863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22866 * bail to the real handler if breakFlags==0.
22868 lbu a3, offThread_breakFlags(rSELF)
22869 la rBIX, dvmAsmInstructionStart + (228 * 128)
22870 lw rIBASE, offThread_curHandlerTable(rSELF)
22872 jr rBIX # nothing to do - jump to real handler
22875 move a0, rPC # arg0
22876 move a1, rFP # arg1
22877 move a2, rSELF # arg2
22878 JAL(dvmCheckBefore)
22881 /* ------------------------------ */
22883 .L_ALT_OP_SGET_VOLATILE: /* 0xe5 */
22884 /* File: mips/alt_stub.S */
22886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22887 * any interesting requests and then jump to the real instruction
22888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22891 * bail to the real handler if breakFlags==0.
22893 lbu a3, offThread_breakFlags(rSELF)
22894 la rBIX, dvmAsmInstructionStart + (229 * 128)
22895 lw rIBASE, offThread_curHandlerTable(rSELF)
22897 jr rBIX # nothing to do - jump to real handler
22900 move a0, rPC # arg0
22901 move a1, rFP # arg1
22902 move a2, rSELF # arg2
22903 JAL(dvmCheckBefore)
22906 /* ------------------------------ */
22908 .L_ALT_OP_SPUT_VOLATILE: /* 0xe6 */
22909 /* File: mips/alt_stub.S */
22911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22912 * any interesting requests and then jump to the real instruction
22913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22916 * bail to the real handler if breakFlags==0.
22918 lbu a3, offThread_breakFlags(rSELF)
22919 la rBIX, dvmAsmInstructionStart + (230 * 128)
22920 lw rIBASE, offThread_curHandlerTable(rSELF)
22922 jr rBIX # nothing to do - jump to real handler
22925 move a0, rPC # arg0
22926 move a1, rFP # arg1
22927 move a2, rSELF # arg2
22928 JAL(dvmCheckBefore)
22931 /* ------------------------------ */
22933 .L_ALT_OP_IGET_OBJECT_VOLATILE: /* 0xe7 */
22934 /* File: mips/alt_stub.S */
22936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22937 * any interesting requests and then jump to the real instruction
22938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22941 * bail to the real handler if breakFlags==0.
22943 lbu a3, offThread_breakFlags(rSELF)
22944 la rBIX, dvmAsmInstructionStart + (231 * 128)
22945 lw rIBASE, offThread_curHandlerTable(rSELF)
22947 jr rBIX # nothing to do - jump to real handler
22950 move a0, rPC # arg0
22951 move a1, rFP # arg1
22952 move a2, rSELF # arg2
22953 JAL(dvmCheckBefore)
22956 /* ------------------------------ */
22958 .L_ALT_OP_IGET_WIDE_VOLATILE: /* 0xe8 */
22959 /* File: mips/alt_stub.S */
22961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22962 * any interesting requests and then jump to the real instruction
22963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22966 * bail to the real handler if breakFlags==0.
22968 lbu a3, offThread_breakFlags(rSELF)
22969 la rBIX, dvmAsmInstructionStart + (232 * 128)
22970 lw rIBASE, offThread_curHandlerTable(rSELF)
22972 jr rBIX # nothing to do - jump to real handler
22975 move a0, rPC # arg0
22976 move a1, rFP # arg1
22977 move a2, rSELF # arg2
22978 JAL(dvmCheckBefore)
22981 /* ------------------------------ */
22983 .L_ALT_OP_IPUT_WIDE_VOLATILE: /* 0xe9 */
22984 /* File: mips/alt_stub.S */
22986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
22987 * any interesting requests and then jump to the real instruction
22988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
22989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
22990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
22991 * bail to the real handler if breakFlags==0.
22993 lbu a3, offThread_breakFlags(rSELF)
22994 la rBIX, dvmAsmInstructionStart + (233 * 128)
22995 lw rIBASE, offThread_curHandlerTable(rSELF)
22997 jr rBIX # nothing to do - jump to real handler
23000 move a0, rPC # arg0
23001 move a1, rFP # arg1
23002 move a2, rSELF # arg2
23003 JAL(dvmCheckBefore)
23006 /* ------------------------------ */
23008 .L_ALT_OP_SGET_WIDE_VOLATILE: /* 0xea */
23009 /* File: mips/alt_stub.S */
23011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23012 * any interesting requests and then jump to the real instruction
23013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23016 * bail to the real handler if breakFlags==0.
23018 lbu a3, offThread_breakFlags(rSELF)
23019 la rBIX, dvmAsmInstructionStart + (234 * 128)
23020 lw rIBASE, offThread_curHandlerTable(rSELF)
23022 jr rBIX # nothing to do - jump to real handler
23025 move a0, rPC # arg0
23026 move a1, rFP # arg1
23027 move a2, rSELF # arg2
23028 JAL(dvmCheckBefore)
23031 /* ------------------------------ */
23033 .L_ALT_OP_SPUT_WIDE_VOLATILE: /* 0xeb */
23034 /* File: mips/alt_stub.S */
23036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23037 * any interesting requests and then jump to the real instruction
23038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23041 * bail to the real handler if breakFlags==0.
23043 lbu a3, offThread_breakFlags(rSELF)
23044 la rBIX, dvmAsmInstructionStart + (235 * 128)
23045 lw rIBASE, offThread_curHandlerTable(rSELF)
23047 jr rBIX # nothing to do - jump to real handler
23050 move a0, rPC # arg0
23051 move a1, rFP # arg1
23052 move a2, rSELF # arg2
23053 JAL(dvmCheckBefore)
23056 /* ------------------------------ */
23058 .L_ALT_OP_BREAKPOINT: /* 0xec */
23059 /* File: mips/alt_stub.S */
23061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23062 * any interesting requests and then jump to the real instruction
23063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23066 * bail to the real handler if breakFlags==0.
23068 lbu a3, offThread_breakFlags(rSELF)
23069 la rBIX, dvmAsmInstructionStart + (236 * 128)
23070 lw rIBASE, offThread_curHandlerTable(rSELF)
23072 jr rBIX # nothing to do - jump to real handler
23075 move a0, rPC # arg0
23076 move a1, rFP # arg1
23077 move a2, rSELF # arg2
23078 JAL(dvmCheckBefore)
23081 /* ------------------------------ */
23083 .L_ALT_OP_THROW_VERIFICATION_ERROR: /* 0xed */
23084 /* File: mips/alt_stub.S */
23086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23087 * any interesting requests and then jump to the real instruction
23088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23091 * bail to the real handler if breakFlags==0.
23093 lbu a3, offThread_breakFlags(rSELF)
23094 la rBIX, dvmAsmInstructionStart + (237 * 128)
23095 lw rIBASE, offThread_curHandlerTable(rSELF)
23097 jr rBIX # nothing to do - jump to real handler
23100 move a0, rPC # arg0
23101 move a1, rFP # arg1
23102 move a2, rSELF # arg2
23103 JAL(dvmCheckBefore)
23106 /* ------------------------------ */
23108 .L_ALT_OP_EXECUTE_INLINE: /* 0xee */
23109 /* File: mips/alt_stub.S */
23111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23112 * any interesting requests and then jump to the real instruction
23113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23116 * bail to the real handler if breakFlags==0.
23118 lbu a3, offThread_breakFlags(rSELF)
23119 la rBIX, dvmAsmInstructionStart + (238 * 128)
23120 lw rIBASE, offThread_curHandlerTable(rSELF)
23122 jr rBIX # nothing to do - jump to real handler
23125 move a0, rPC # arg0
23126 move a1, rFP # arg1
23127 move a2, rSELF # arg2
23128 JAL(dvmCheckBefore)
23131 /* ------------------------------ */
23133 .L_ALT_OP_EXECUTE_INLINE_RANGE: /* 0xef */
23134 /* File: mips/alt_stub.S */
23136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23137 * any interesting requests and then jump to the real instruction
23138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23141 * bail to the real handler if breakFlags==0.
23143 lbu a3, offThread_breakFlags(rSELF)
23144 la rBIX, dvmAsmInstructionStart + (239 * 128)
23145 lw rIBASE, offThread_curHandlerTable(rSELF)
23147 jr rBIX # nothing to do - jump to real handler
23150 move a0, rPC # arg0
23151 move a1, rFP # arg1
23152 move a2, rSELF # arg2
23153 JAL(dvmCheckBefore)
23156 /* ------------------------------ */
23158 .L_ALT_OP_INVOKE_OBJECT_INIT_RANGE: /* 0xf0 */
23159 /* File: mips/alt_stub.S */
23161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23162 * any interesting requests and then jump to the real instruction
23163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23166 * bail to the real handler if breakFlags==0.
23168 lbu a3, offThread_breakFlags(rSELF)
23169 la rBIX, dvmAsmInstructionStart + (240 * 128)
23170 lw rIBASE, offThread_curHandlerTable(rSELF)
23172 jr rBIX # nothing to do - jump to real handler
23175 move a0, rPC # arg0
23176 move a1, rFP # arg1
23177 move a2, rSELF # arg2
23178 JAL(dvmCheckBefore)
23181 /* ------------------------------ */
23183 .L_ALT_OP_RETURN_VOID_BARRIER: /* 0xf1 */
23184 /* File: mips/alt_stub.S */
23186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23187 * any interesting requests and then jump to the real instruction
23188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23191 * bail to the real handler if breakFlags==0.
23193 lbu a3, offThread_breakFlags(rSELF)
23194 la rBIX, dvmAsmInstructionStart + (241 * 128)
23195 lw rIBASE, offThread_curHandlerTable(rSELF)
23197 jr rBIX # nothing to do - jump to real handler
23200 move a0, rPC # arg0
23201 move a1, rFP # arg1
23202 move a2, rSELF # arg2
23203 JAL(dvmCheckBefore)
23206 /* ------------------------------ */
23208 .L_ALT_OP_IGET_QUICK: /* 0xf2 */
23209 /* File: mips/alt_stub.S */
23211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23212 * any interesting requests and then jump to the real instruction
23213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23216 * bail to the real handler if breakFlags==0.
23218 lbu a3, offThread_breakFlags(rSELF)
23219 la rBIX, dvmAsmInstructionStart + (242 * 128)
23220 lw rIBASE, offThread_curHandlerTable(rSELF)
23222 jr rBIX # nothing to do - jump to real handler
23225 move a0, rPC # arg0
23226 move a1, rFP # arg1
23227 move a2, rSELF # arg2
23228 JAL(dvmCheckBefore)
23231 /* ------------------------------ */
23233 .L_ALT_OP_IGET_WIDE_QUICK: /* 0xf3 */
23234 /* File: mips/alt_stub.S */
23236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23237 * any interesting requests and then jump to the real instruction
23238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23241 * bail to the real handler if breakFlags==0.
23243 lbu a3, offThread_breakFlags(rSELF)
23244 la rBIX, dvmAsmInstructionStart + (243 * 128)
23245 lw rIBASE, offThread_curHandlerTable(rSELF)
23247 jr rBIX # nothing to do - jump to real handler
23250 move a0, rPC # arg0
23251 move a1, rFP # arg1
23252 move a2, rSELF # arg2
23253 JAL(dvmCheckBefore)
23256 /* ------------------------------ */
23258 .L_ALT_OP_IGET_OBJECT_QUICK: /* 0xf4 */
23259 /* File: mips/alt_stub.S */
23261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23262 * any interesting requests and then jump to the real instruction
23263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23266 * bail to the real handler if breakFlags==0.
23268 lbu a3, offThread_breakFlags(rSELF)
23269 la rBIX, dvmAsmInstructionStart + (244 * 128)
23270 lw rIBASE, offThread_curHandlerTable(rSELF)
23272 jr rBIX # nothing to do - jump to real handler
23275 move a0, rPC # arg0
23276 move a1, rFP # arg1
23277 move a2, rSELF # arg2
23278 JAL(dvmCheckBefore)
23281 /* ------------------------------ */
23283 .L_ALT_OP_IPUT_QUICK: /* 0xf5 */
23284 /* File: mips/alt_stub.S */
23286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23287 * any interesting requests and then jump to the real instruction
23288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23291 * bail to the real handler if breakFlags==0.
23293 lbu a3, offThread_breakFlags(rSELF)
23294 la rBIX, dvmAsmInstructionStart + (245 * 128)
23295 lw rIBASE, offThread_curHandlerTable(rSELF)
23297 jr rBIX # nothing to do - jump to real handler
23300 move a0, rPC # arg0
23301 move a1, rFP # arg1
23302 move a2, rSELF # arg2
23303 JAL(dvmCheckBefore)
23306 /* ------------------------------ */
23308 .L_ALT_OP_IPUT_WIDE_QUICK: /* 0xf6 */
23309 /* File: mips/alt_stub.S */
23311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23312 * any interesting requests and then jump to the real instruction
23313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23316 * bail to the real handler if breakFlags==0.
23318 lbu a3, offThread_breakFlags(rSELF)
23319 la rBIX, dvmAsmInstructionStart + (246 * 128)
23320 lw rIBASE, offThread_curHandlerTable(rSELF)
23322 jr rBIX # nothing to do - jump to real handler
23325 move a0, rPC # arg0
23326 move a1, rFP # arg1
23327 move a2, rSELF # arg2
23328 JAL(dvmCheckBefore)
23331 /* ------------------------------ */
23333 .L_ALT_OP_IPUT_OBJECT_QUICK: /* 0xf7 */
23334 /* File: mips/alt_stub.S */
23336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23337 * any interesting requests and then jump to the real instruction
23338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23341 * bail to the real handler if breakFlags==0.
23343 lbu a3, offThread_breakFlags(rSELF)
23344 la rBIX, dvmAsmInstructionStart + (247 * 128)
23345 lw rIBASE, offThread_curHandlerTable(rSELF)
23347 jr rBIX # nothing to do - jump to real handler
23350 move a0, rPC # arg0
23351 move a1, rFP # arg1
23352 move a2, rSELF # arg2
23353 JAL(dvmCheckBefore)
23356 /* ------------------------------ */
23358 .L_ALT_OP_INVOKE_VIRTUAL_QUICK: /* 0xf8 */
23359 /* File: mips/alt_stub.S */
23361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23362 * any interesting requests and then jump to the real instruction
23363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23366 * bail to the real handler if breakFlags==0.
23368 lbu a3, offThread_breakFlags(rSELF)
23369 la rBIX, dvmAsmInstructionStart + (248 * 128)
23370 lw rIBASE, offThread_curHandlerTable(rSELF)
23372 jr rBIX # nothing to do - jump to real handler
23375 move a0, rPC # arg0
23376 move a1, rFP # arg1
23377 move a2, rSELF # arg2
23378 JAL(dvmCheckBefore)
23381 /* ------------------------------ */
23383 .L_ALT_OP_INVOKE_VIRTUAL_QUICK_RANGE: /* 0xf9 */
23384 /* File: mips/alt_stub.S */
23386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23387 * any interesting requests and then jump to the real instruction
23388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23391 * bail to the real handler if breakFlags==0.
23393 lbu a3, offThread_breakFlags(rSELF)
23394 la rBIX, dvmAsmInstructionStart + (249 * 128)
23395 lw rIBASE, offThread_curHandlerTable(rSELF)
23397 jr rBIX # nothing to do - jump to real handler
23400 move a0, rPC # arg0
23401 move a1, rFP # arg1
23402 move a2, rSELF # arg2
23403 JAL(dvmCheckBefore)
23406 /* ------------------------------ */
23408 .L_ALT_OP_INVOKE_SUPER_QUICK: /* 0xfa */
23409 /* File: mips/alt_stub.S */
23411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23412 * any interesting requests and then jump to the real instruction
23413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23416 * bail to the real handler if breakFlags==0.
23418 lbu a3, offThread_breakFlags(rSELF)
23419 la rBIX, dvmAsmInstructionStart + (250 * 128)
23420 lw rIBASE, offThread_curHandlerTable(rSELF)
23422 jr rBIX # nothing to do - jump to real handler
23425 move a0, rPC # arg0
23426 move a1, rFP # arg1
23427 move a2, rSELF # arg2
23428 JAL(dvmCheckBefore)
23431 /* ------------------------------ */
23433 .L_ALT_OP_INVOKE_SUPER_QUICK_RANGE: /* 0xfb */
23434 /* File: mips/alt_stub.S */
23436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23437 * any interesting requests and then jump to the real instruction
23438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23441 * bail to the real handler if breakFlags==0.
23443 lbu a3, offThread_breakFlags(rSELF)
23444 la rBIX, dvmAsmInstructionStart + (251 * 128)
23445 lw rIBASE, offThread_curHandlerTable(rSELF)
23447 jr rBIX # nothing to do - jump to real handler
23450 move a0, rPC # arg0
23451 move a1, rFP # arg1
23452 move a2, rSELF # arg2
23453 JAL(dvmCheckBefore)
23456 /* ------------------------------ */
23458 .L_ALT_OP_IPUT_OBJECT_VOLATILE: /* 0xfc */
23459 /* File: mips/alt_stub.S */
23461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23462 * any interesting requests and then jump to the real instruction
23463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23466 * bail to the real handler if breakFlags==0.
23468 lbu a3, offThread_breakFlags(rSELF)
23469 la rBIX, dvmAsmInstructionStart + (252 * 128)
23470 lw rIBASE, offThread_curHandlerTable(rSELF)
23472 jr rBIX # nothing to do - jump to real handler
23475 move a0, rPC # arg0
23476 move a1, rFP # arg1
23477 move a2, rSELF # arg2
23478 JAL(dvmCheckBefore)
23481 /* ------------------------------ */
23483 .L_ALT_OP_SGET_OBJECT_VOLATILE: /* 0xfd */
23484 /* File: mips/alt_stub.S */
23486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23487 * any interesting requests and then jump to the real instruction
23488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23491 * bail to the real handler if breakFlags==0.
23493 lbu a3, offThread_breakFlags(rSELF)
23494 la rBIX, dvmAsmInstructionStart + (253 * 128)
23495 lw rIBASE, offThread_curHandlerTable(rSELF)
23497 jr rBIX # nothing to do - jump to real handler
23500 move a0, rPC # arg0
23501 move a1, rFP # arg1
23502 move a2, rSELF # arg2
23503 JAL(dvmCheckBefore)
23506 /* ------------------------------ */
23508 .L_ALT_OP_SPUT_OBJECT_VOLATILE: /* 0xfe */
23509 /* File: mips/alt_stub.S */
23511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23512 * any interesting requests and then jump to the real instruction
23513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23516 * bail to the real handler if breakFlags==0.
23518 lbu a3, offThread_breakFlags(rSELF)
23519 la rBIX, dvmAsmInstructionStart + (254 * 128)
23520 lw rIBASE, offThread_curHandlerTable(rSELF)
23522 jr rBIX # nothing to do - jump to real handler
23525 move a0, rPC # arg0
23526 move a1, rFP # arg1
23527 move a2, rSELF # arg2
23528 JAL(dvmCheckBefore)
23531 /* ------------------------------ */
23533 .L_ALT_OP_DISPATCH_FF: /* 0xff */
23534 /* File: mips/alt_stub.S */
23536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23537 * any interesting requests and then jump to the real instruction
23538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23541 * bail to the real handler if breakFlags==0.
23543 lbu a3, offThread_breakFlags(rSELF)
23544 la rBIX, dvmAsmInstructionStart + (255 * 128)
23545 lw rIBASE, offThread_curHandlerTable(rSELF)
23547 jr rBIX # nothing to do - jump to real handler
23550 move a0, rPC # arg0
23551 move a1, rFP # arg1
23552 move a2, rSELF # arg2
23553 JAL(dvmCheckBefore)
23556 /* ------------------------------ */
23558 .L_ALT_OP_CONST_CLASS_JUMBO: /* 0x100 */
23559 /* File: mips/alt_stub.S */
23561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23562 * any interesting requests and then jump to the real instruction
23563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23566 * bail to the real handler if breakFlags==0.
23568 lbu a3, offThread_breakFlags(rSELF)
23569 la rBIX, dvmAsmInstructionStart + (256 * 128)
23570 lw rIBASE, offThread_curHandlerTable(rSELF)
23572 jr rBIX # nothing to do - jump to real handler
23575 move a0, rPC # arg0
23576 move a1, rFP # arg1
23577 move a2, rSELF # arg2
23578 JAL(dvmCheckBefore)
23581 /* ------------------------------ */
23583 .L_ALT_OP_CHECK_CAST_JUMBO: /* 0x101 */
23584 /* File: mips/alt_stub.S */
23586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23587 * any interesting requests and then jump to the real instruction
23588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23591 * bail to the real handler if breakFlags==0.
23593 lbu a3, offThread_breakFlags(rSELF)
23594 la rBIX, dvmAsmInstructionStart + (257 * 128)
23595 lw rIBASE, offThread_curHandlerTable(rSELF)
23597 jr rBIX # nothing to do - jump to real handler
23600 move a0, rPC # arg0
23601 move a1, rFP # arg1
23602 move a2, rSELF # arg2
23603 JAL(dvmCheckBefore)
23606 /* ------------------------------ */
23608 .L_ALT_OP_INSTANCE_OF_JUMBO: /* 0x102 */
23609 /* File: mips/alt_stub.S */
23611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23612 * any interesting requests and then jump to the real instruction
23613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23616 * bail to the real handler if breakFlags==0.
23618 lbu a3, offThread_breakFlags(rSELF)
23619 la rBIX, dvmAsmInstructionStart + (258 * 128)
23620 lw rIBASE, offThread_curHandlerTable(rSELF)
23622 jr rBIX # nothing to do - jump to real handler
23625 move a0, rPC # arg0
23626 move a1, rFP # arg1
23627 move a2, rSELF # arg2
23628 JAL(dvmCheckBefore)
23631 /* ------------------------------ */
23633 .L_ALT_OP_NEW_INSTANCE_JUMBO: /* 0x103 */
23634 /* File: mips/alt_stub.S */
23636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23637 * any interesting requests and then jump to the real instruction
23638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23641 * bail to the real handler if breakFlags==0.
23643 lbu a3, offThread_breakFlags(rSELF)
23644 la rBIX, dvmAsmInstructionStart + (259 * 128)
23645 lw rIBASE, offThread_curHandlerTable(rSELF)
23647 jr rBIX # nothing to do - jump to real handler
23650 move a0, rPC # arg0
23651 move a1, rFP # arg1
23652 move a2, rSELF # arg2
23653 JAL(dvmCheckBefore)
23656 /* ------------------------------ */
23658 .L_ALT_OP_NEW_ARRAY_JUMBO: /* 0x104 */
23659 /* File: mips/alt_stub.S */
23661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23662 * any interesting requests and then jump to the real instruction
23663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23666 * bail to the real handler if breakFlags==0.
23668 lbu a3, offThread_breakFlags(rSELF)
23669 la rBIX, dvmAsmInstructionStart + (260 * 128)
23670 lw rIBASE, offThread_curHandlerTable(rSELF)
23672 jr rBIX # nothing to do - jump to real handler
23675 move a0, rPC # arg0
23676 move a1, rFP # arg1
23677 move a2, rSELF # arg2
23678 JAL(dvmCheckBefore)
23681 /* ------------------------------ */
23683 .L_ALT_OP_FILLED_NEW_ARRAY_JUMBO: /* 0x105 */
23684 /* File: mips/alt_stub.S */
23686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23687 * any interesting requests and then jump to the real instruction
23688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23691 * bail to the real handler if breakFlags==0.
23693 lbu a3, offThread_breakFlags(rSELF)
23694 la rBIX, dvmAsmInstructionStart + (261 * 128)
23695 lw rIBASE, offThread_curHandlerTable(rSELF)
23697 jr rBIX # nothing to do - jump to real handler
23700 move a0, rPC # arg0
23701 move a1, rFP # arg1
23702 move a2, rSELF # arg2
23703 JAL(dvmCheckBefore)
23706 /* ------------------------------ */
23708 .L_ALT_OP_IGET_JUMBO: /* 0x106 */
23709 /* File: mips/alt_stub.S */
23711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23712 * any interesting requests and then jump to the real instruction
23713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23716 * bail to the real handler if breakFlags==0.
23718 lbu a3, offThread_breakFlags(rSELF)
23719 la rBIX, dvmAsmInstructionStart + (262 * 128)
23720 lw rIBASE, offThread_curHandlerTable(rSELF)
23722 jr rBIX # nothing to do - jump to real handler
23725 move a0, rPC # arg0
23726 move a1, rFP # arg1
23727 move a2, rSELF # arg2
23728 JAL(dvmCheckBefore)
23731 /* ------------------------------ */
23733 .L_ALT_OP_IGET_WIDE_JUMBO: /* 0x107 */
23734 /* File: mips/alt_stub.S */
23736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23737 * any interesting requests and then jump to the real instruction
23738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23741 * bail to the real handler if breakFlags==0.
23743 lbu a3, offThread_breakFlags(rSELF)
23744 la rBIX, dvmAsmInstructionStart + (263 * 128)
23745 lw rIBASE, offThread_curHandlerTable(rSELF)
23747 jr rBIX # nothing to do - jump to real handler
23750 move a0, rPC # arg0
23751 move a1, rFP # arg1
23752 move a2, rSELF # arg2
23753 JAL(dvmCheckBefore)
23756 /* ------------------------------ */
23758 .L_ALT_OP_IGET_OBJECT_JUMBO: /* 0x108 */
23759 /* File: mips/alt_stub.S */
23761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23762 * any interesting requests and then jump to the real instruction
23763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23766 * bail to the real handler if breakFlags==0.
23768 lbu a3, offThread_breakFlags(rSELF)
23769 la rBIX, dvmAsmInstructionStart + (264 * 128)
23770 lw rIBASE, offThread_curHandlerTable(rSELF)
23772 jr rBIX # nothing to do - jump to real handler
23775 move a0, rPC # arg0
23776 move a1, rFP # arg1
23777 move a2, rSELF # arg2
23778 JAL(dvmCheckBefore)
23781 /* ------------------------------ */
23783 .L_ALT_OP_IGET_BOOLEAN_JUMBO: /* 0x109 */
23784 /* File: mips/alt_stub.S */
23786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23787 * any interesting requests and then jump to the real instruction
23788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23791 * bail to the real handler if breakFlags==0.
23793 lbu a3, offThread_breakFlags(rSELF)
23794 la rBIX, dvmAsmInstructionStart + (265 * 128)
23795 lw rIBASE, offThread_curHandlerTable(rSELF)
23797 jr rBIX # nothing to do - jump to real handler
23800 move a0, rPC # arg0
23801 move a1, rFP # arg1
23802 move a2, rSELF # arg2
23803 JAL(dvmCheckBefore)
23806 /* ------------------------------ */
23808 .L_ALT_OP_IGET_BYTE_JUMBO: /* 0x10a */
23809 /* File: mips/alt_stub.S */
23811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23812 * any interesting requests and then jump to the real instruction
23813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23816 * bail to the real handler if breakFlags==0.
23818 lbu a3, offThread_breakFlags(rSELF)
23819 la rBIX, dvmAsmInstructionStart + (266 * 128)
23820 lw rIBASE, offThread_curHandlerTable(rSELF)
23822 jr rBIX # nothing to do - jump to real handler
23825 move a0, rPC # arg0
23826 move a1, rFP # arg1
23827 move a2, rSELF # arg2
23828 JAL(dvmCheckBefore)
23831 /* ------------------------------ */
23833 .L_ALT_OP_IGET_CHAR_JUMBO: /* 0x10b */
23834 /* File: mips/alt_stub.S */
23836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23837 * any interesting requests and then jump to the real instruction
23838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23841 * bail to the real handler if breakFlags==0.
23843 lbu a3, offThread_breakFlags(rSELF)
23844 la rBIX, dvmAsmInstructionStart + (267 * 128)
23845 lw rIBASE, offThread_curHandlerTable(rSELF)
23847 jr rBIX # nothing to do - jump to real handler
23850 move a0, rPC # arg0
23851 move a1, rFP # arg1
23852 move a2, rSELF # arg2
23853 JAL(dvmCheckBefore)
23856 /* ------------------------------ */
23858 .L_ALT_OP_IGET_SHORT_JUMBO: /* 0x10c */
23859 /* File: mips/alt_stub.S */
23861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23862 * any interesting requests and then jump to the real instruction
23863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23866 * bail to the real handler if breakFlags==0.
23868 lbu a3, offThread_breakFlags(rSELF)
23869 la rBIX, dvmAsmInstructionStart + (268 * 128)
23870 lw rIBASE, offThread_curHandlerTable(rSELF)
23872 jr rBIX # nothing to do - jump to real handler
23875 move a0, rPC # arg0
23876 move a1, rFP # arg1
23877 move a2, rSELF # arg2
23878 JAL(dvmCheckBefore)
23881 /* ------------------------------ */
23883 .L_ALT_OP_IPUT_JUMBO: /* 0x10d */
23884 /* File: mips/alt_stub.S */
23886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23887 * any interesting requests and then jump to the real instruction
23888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23891 * bail to the real handler if breakFlags==0.
23893 lbu a3, offThread_breakFlags(rSELF)
23894 la rBIX, dvmAsmInstructionStart + (269 * 128)
23895 lw rIBASE, offThread_curHandlerTable(rSELF)
23897 jr rBIX # nothing to do - jump to real handler
23900 move a0, rPC # arg0
23901 move a1, rFP # arg1
23902 move a2, rSELF # arg2
23903 JAL(dvmCheckBefore)
23906 /* ------------------------------ */
23908 .L_ALT_OP_IPUT_WIDE_JUMBO: /* 0x10e */
23909 /* File: mips/alt_stub.S */
23911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23912 * any interesting requests and then jump to the real instruction
23913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23916 * bail to the real handler if breakFlags==0.
23918 lbu a3, offThread_breakFlags(rSELF)
23919 la rBIX, dvmAsmInstructionStart + (270 * 128)
23920 lw rIBASE, offThread_curHandlerTable(rSELF)
23922 jr rBIX # nothing to do - jump to real handler
23925 move a0, rPC # arg0
23926 move a1, rFP # arg1
23927 move a2, rSELF # arg2
23928 JAL(dvmCheckBefore)
23931 /* ------------------------------ */
23933 .L_ALT_OP_IPUT_OBJECT_JUMBO: /* 0x10f */
23934 /* File: mips/alt_stub.S */
23936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23937 * any interesting requests and then jump to the real instruction
23938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23941 * bail to the real handler if breakFlags==0.
23943 lbu a3, offThread_breakFlags(rSELF)
23944 la rBIX, dvmAsmInstructionStart + (271 * 128)
23945 lw rIBASE, offThread_curHandlerTable(rSELF)
23947 jr rBIX # nothing to do - jump to real handler
23950 move a0, rPC # arg0
23951 move a1, rFP # arg1
23952 move a2, rSELF # arg2
23953 JAL(dvmCheckBefore)
23956 /* ------------------------------ */
23958 .L_ALT_OP_IPUT_BOOLEAN_JUMBO: /* 0x110 */
23959 /* File: mips/alt_stub.S */
23961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23962 * any interesting requests and then jump to the real instruction
23963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23966 * bail to the real handler if breakFlags==0.
23968 lbu a3, offThread_breakFlags(rSELF)
23969 la rBIX, dvmAsmInstructionStart + (272 * 128)
23970 lw rIBASE, offThread_curHandlerTable(rSELF)
23972 jr rBIX # nothing to do - jump to real handler
23975 move a0, rPC # arg0
23976 move a1, rFP # arg1
23977 move a2, rSELF # arg2
23978 JAL(dvmCheckBefore)
23981 /* ------------------------------ */
23983 .L_ALT_OP_IPUT_BYTE_JUMBO: /* 0x111 */
23984 /* File: mips/alt_stub.S */
23986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
23987 * any interesting requests and then jump to the real instruction
23988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
23989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
23990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
23991 * bail to the real handler if breakFlags==0.
23993 lbu a3, offThread_breakFlags(rSELF)
23994 la rBIX, dvmAsmInstructionStart + (273 * 128)
23995 lw rIBASE, offThread_curHandlerTable(rSELF)
23997 jr rBIX # nothing to do - jump to real handler
24000 move a0, rPC # arg0
24001 move a1, rFP # arg1
24002 move a2, rSELF # arg2
24003 JAL(dvmCheckBefore)
24006 /* ------------------------------ */
24008 .L_ALT_OP_IPUT_CHAR_JUMBO: /* 0x112 */
24009 /* File: mips/alt_stub.S */
24011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24012 * any interesting requests and then jump to the real instruction
24013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24016 * bail to the real handler if breakFlags==0.
24018 lbu a3, offThread_breakFlags(rSELF)
24019 la rBIX, dvmAsmInstructionStart + (274 * 128)
24020 lw rIBASE, offThread_curHandlerTable(rSELF)
24022 jr rBIX # nothing to do - jump to real handler
24025 move a0, rPC # arg0
24026 move a1, rFP # arg1
24027 move a2, rSELF # arg2
24028 JAL(dvmCheckBefore)
24031 /* ------------------------------ */
24033 .L_ALT_OP_IPUT_SHORT_JUMBO: /* 0x113 */
24034 /* File: mips/alt_stub.S */
24036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24037 * any interesting requests and then jump to the real instruction
24038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24041 * bail to the real handler if breakFlags==0.
24043 lbu a3, offThread_breakFlags(rSELF)
24044 la rBIX, dvmAsmInstructionStart + (275 * 128)
24045 lw rIBASE, offThread_curHandlerTable(rSELF)
24047 jr rBIX # nothing to do - jump to real handler
24050 move a0, rPC # arg0
24051 move a1, rFP # arg1
24052 move a2, rSELF # arg2
24053 JAL(dvmCheckBefore)
24056 /* ------------------------------ */
24058 .L_ALT_OP_SGET_JUMBO: /* 0x114 */
24059 /* File: mips/alt_stub.S */
24061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24062 * any interesting requests and then jump to the real instruction
24063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24066 * bail to the real handler if breakFlags==0.
24068 lbu a3, offThread_breakFlags(rSELF)
24069 la rBIX, dvmAsmInstructionStart + (276 * 128)
24070 lw rIBASE, offThread_curHandlerTable(rSELF)
24072 jr rBIX # nothing to do - jump to real handler
24075 move a0, rPC # arg0
24076 move a1, rFP # arg1
24077 move a2, rSELF # arg2
24078 JAL(dvmCheckBefore)
24081 /* ------------------------------ */
24083 .L_ALT_OP_SGET_WIDE_JUMBO: /* 0x115 */
24084 /* File: mips/alt_stub.S */
24086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24087 * any interesting requests and then jump to the real instruction
24088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24091 * bail to the real handler if breakFlags==0.
24093 lbu a3, offThread_breakFlags(rSELF)
24094 la rBIX, dvmAsmInstructionStart + (277 * 128)
24095 lw rIBASE, offThread_curHandlerTable(rSELF)
24097 jr rBIX # nothing to do - jump to real handler
24100 move a0, rPC # arg0
24101 move a1, rFP # arg1
24102 move a2, rSELF # arg2
24103 JAL(dvmCheckBefore)
24106 /* ------------------------------ */
24108 .L_ALT_OP_SGET_OBJECT_JUMBO: /* 0x116 */
24109 /* File: mips/alt_stub.S */
24111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24112 * any interesting requests and then jump to the real instruction
24113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24116 * bail to the real handler if breakFlags==0.
24118 lbu a3, offThread_breakFlags(rSELF)
24119 la rBIX, dvmAsmInstructionStart + (278 * 128)
24120 lw rIBASE, offThread_curHandlerTable(rSELF)
24122 jr rBIX # nothing to do - jump to real handler
24125 move a0, rPC # arg0
24126 move a1, rFP # arg1
24127 move a2, rSELF # arg2
24128 JAL(dvmCheckBefore)
24131 /* ------------------------------ */
24133 .L_ALT_OP_SGET_BOOLEAN_JUMBO: /* 0x117 */
24134 /* File: mips/alt_stub.S */
24136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24137 * any interesting requests and then jump to the real instruction
24138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24141 * bail to the real handler if breakFlags==0.
24143 lbu a3, offThread_breakFlags(rSELF)
24144 la rBIX, dvmAsmInstructionStart + (279 * 128)
24145 lw rIBASE, offThread_curHandlerTable(rSELF)
24147 jr rBIX # nothing to do - jump to real handler
24150 move a0, rPC # arg0
24151 move a1, rFP # arg1
24152 move a2, rSELF # arg2
24153 JAL(dvmCheckBefore)
24156 /* ------------------------------ */
24158 .L_ALT_OP_SGET_BYTE_JUMBO: /* 0x118 */
24159 /* File: mips/alt_stub.S */
24161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24162 * any interesting requests and then jump to the real instruction
24163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24166 * bail to the real handler if breakFlags==0.
24168 lbu a3, offThread_breakFlags(rSELF)
24169 la rBIX, dvmAsmInstructionStart + (280 * 128)
24170 lw rIBASE, offThread_curHandlerTable(rSELF)
24172 jr rBIX # nothing to do - jump to real handler
24175 move a0, rPC # arg0
24176 move a1, rFP # arg1
24177 move a2, rSELF # arg2
24178 JAL(dvmCheckBefore)
24181 /* ------------------------------ */
24183 .L_ALT_OP_SGET_CHAR_JUMBO: /* 0x119 */
24184 /* File: mips/alt_stub.S */
24186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24187 * any interesting requests and then jump to the real instruction
24188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24191 * bail to the real handler if breakFlags==0.
24193 lbu a3, offThread_breakFlags(rSELF)
24194 la rBIX, dvmAsmInstructionStart + (281 * 128)
24195 lw rIBASE, offThread_curHandlerTable(rSELF)
24197 jr rBIX # nothing to do - jump to real handler
24200 move a0, rPC # arg0
24201 move a1, rFP # arg1
24202 move a2, rSELF # arg2
24203 JAL(dvmCheckBefore)
24206 /* ------------------------------ */
24208 .L_ALT_OP_SGET_SHORT_JUMBO: /* 0x11a */
24209 /* File: mips/alt_stub.S */
24211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24212 * any interesting requests and then jump to the real instruction
24213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24216 * bail to the real handler if breakFlags==0.
24218 lbu a3, offThread_breakFlags(rSELF)
24219 la rBIX, dvmAsmInstructionStart + (282 * 128)
24220 lw rIBASE, offThread_curHandlerTable(rSELF)
24222 jr rBIX # nothing to do - jump to real handler
24225 move a0, rPC # arg0
24226 move a1, rFP # arg1
24227 move a2, rSELF # arg2
24228 JAL(dvmCheckBefore)
24231 /* ------------------------------ */
24233 .L_ALT_OP_SPUT_JUMBO: /* 0x11b */
24234 /* File: mips/alt_stub.S */
24236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24237 * any interesting requests and then jump to the real instruction
24238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24241 * bail to the real handler if breakFlags==0.
24243 lbu a3, offThread_breakFlags(rSELF)
24244 la rBIX, dvmAsmInstructionStart + (283 * 128)
24245 lw rIBASE, offThread_curHandlerTable(rSELF)
24247 jr rBIX # nothing to do - jump to real handler
24250 move a0, rPC # arg0
24251 move a1, rFP # arg1
24252 move a2, rSELF # arg2
24253 JAL(dvmCheckBefore)
24256 /* ------------------------------ */
24258 .L_ALT_OP_SPUT_WIDE_JUMBO: /* 0x11c */
24259 /* File: mips/alt_stub.S */
24261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24262 * any interesting requests and then jump to the real instruction
24263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24266 * bail to the real handler if breakFlags==0.
24268 lbu a3, offThread_breakFlags(rSELF)
24269 la rBIX, dvmAsmInstructionStart + (284 * 128)
24270 lw rIBASE, offThread_curHandlerTable(rSELF)
24272 jr rBIX # nothing to do - jump to real handler
24275 move a0, rPC # arg0
24276 move a1, rFP # arg1
24277 move a2, rSELF # arg2
24278 JAL(dvmCheckBefore)
24281 /* ------------------------------ */
24283 .L_ALT_OP_SPUT_OBJECT_JUMBO: /* 0x11d */
24284 /* File: mips/alt_stub.S */
24286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24287 * any interesting requests and then jump to the real instruction
24288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24291 * bail to the real handler if breakFlags==0.
24293 lbu a3, offThread_breakFlags(rSELF)
24294 la rBIX, dvmAsmInstructionStart + (285 * 128)
24295 lw rIBASE, offThread_curHandlerTable(rSELF)
24297 jr rBIX # nothing to do - jump to real handler
24300 move a0, rPC # arg0
24301 move a1, rFP # arg1
24302 move a2, rSELF # arg2
24303 JAL(dvmCheckBefore)
24306 /* ------------------------------ */
24308 .L_ALT_OP_SPUT_BOOLEAN_JUMBO: /* 0x11e */
24309 /* File: mips/alt_stub.S */
24311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24312 * any interesting requests and then jump to the real instruction
24313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24316 * bail to the real handler if breakFlags==0.
24318 lbu a3, offThread_breakFlags(rSELF)
24319 la rBIX, dvmAsmInstructionStart + (286 * 128)
24320 lw rIBASE, offThread_curHandlerTable(rSELF)
24322 jr rBIX # nothing to do - jump to real handler
24325 move a0, rPC # arg0
24326 move a1, rFP # arg1
24327 move a2, rSELF # arg2
24328 JAL(dvmCheckBefore)
24331 /* ------------------------------ */
24333 .L_ALT_OP_SPUT_BYTE_JUMBO: /* 0x11f */
24334 /* File: mips/alt_stub.S */
24336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24337 * any interesting requests and then jump to the real instruction
24338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24341 * bail to the real handler if breakFlags==0.
24343 lbu a3, offThread_breakFlags(rSELF)
24344 la rBIX, dvmAsmInstructionStart + (287 * 128)
24345 lw rIBASE, offThread_curHandlerTable(rSELF)
24347 jr rBIX # nothing to do - jump to real handler
24350 move a0, rPC # arg0
24351 move a1, rFP # arg1
24352 move a2, rSELF # arg2
24353 JAL(dvmCheckBefore)
24356 /* ------------------------------ */
24358 .L_ALT_OP_SPUT_CHAR_JUMBO: /* 0x120 */
24359 /* File: mips/alt_stub.S */
24361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24362 * any interesting requests and then jump to the real instruction
24363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24366 * bail to the real handler if breakFlags==0.
24368 lbu a3, offThread_breakFlags(rSELF)
24369 la rBIX, dvmAsmInstructionStart + (288 * 128)
24370 lw rIBASE, offThread_curHandlerTable(rSELF)
24372 jr rBIX # nothing to do - jump to real handler
24375 move a0, rPC # arg0
24376 move a1, rFP # arg1
24377 move a2, rSELF # arg2
24378 JAL(dvmCheckBefore)
24381 /* ------------------------------ */
24383 .L_ALT_OP_SPUT_SHORT_JUMBO: /* 0x121 */
24384 /* File: mips/alt_stub.S */
24386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24387 * any interesting requests and then jump to the real instruction
24388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24391 * bail to the real handler if breakFlags==0.
24393 lbu a3, offThread_breakFlags(rSELF)
24394 la rBIX, dvmAsmInstructionStart + (289 * 128)
24395 lw rIBASE, offThread_curHandlerTable(rSELF)
24397 jr rBIX # nothing to do - jump to real handler
24400 move a0, rPC # arg0
24401 move a1, rFP # arg1
24402 move a2, rSELF # arg2
24403 JAL(dvmCheckBefore)
24406 /* ------------------------------ */
24408 .L_ALT_OP_INVOKE_VIRTUAL_JUMBO: /* 0x122 */
24409 /* File: mips/alt_stub.S */
24411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24412 * any interesting requests and then jump to the real instruction
24413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24416 * bail to the real handler if breakFlags==0.
24418 lbu a3, offThread_breakFlags(rSELF)
24419 la rBIX, dvmAsmInstructionStart + (290 * 128)
24420 lw rIBASE, offThread_curHandlerTable(rSELF)
24422 jr rBIX # nothing to do - jump to real handler
24425 move a0, rPC # arg0
24426 move a1, rFP # arg1
24427 move a2, rSELF # arg2
24428 JAL(dvmCheckBefore)
24431 /* ------------------------------ */
24433 .L_ALT_OP_INVOKE_SUPER_JUMBO: /* 0x123 */
24434 /* File: mips/alt_stub.S */
24436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24437 * any interesting requests and then jump to the real instruction
24438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24441 * bail to the real handler if breakFlags==0.
24443 lbu a3, offThread_breakFlags(rSELF)
24444 la rBIX, dvmAsmInstructionStart + (291 * 128)
24445 lw rIBASE, offThread_curHandlerTable(rSELF)
24447 jr rBIX # nothing to do - jump to real handler
24450 move a0, rPC # arg0
24451 move a1, rFP # arg1
24452 move a2, rSELF # arg2
24453 JAL(dvmCheckBefore)
24456 /* ------------------------------ */
24458 .L_ALT_OP_INVOKE_DIRECT_JUMBO: /* 0x124 */
24459 /* File: mips/alt_stub.S */
24461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24462 * any interesting requests and then jump to the real instruction
24463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24466 * bail to the real handler if breakFlags==0.
24468 lbu a3, offThread_breakFlags(rSELF)
24469 la rBIX, dvmAsmInstructionStart + (292 * 128)
24470 lw rIBASE, offThread_curHandlerTable(rSELF)
24472 jr rBIX # nothing to do - jump to real handler
24475 move a0, rPC # arg0
24476 move a1, rFP # arg1
24477 move a2, rSELF # arg2
24478 JAL(dvmCheckBefore)
24481 /* ------------------------------ */
24483 .L_ALT_OP_INVOKE_STATIC_JUMBO: /* 0x125 */
24484 /* File: mips/alt_stub.S */
24486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24487 * any interesting requests and then jump to the real instruction
24488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24491 * bail to the real handler if breakFlags==0.
24493 lbu a3, offThread_breakFlags(rSELF)
24494 la rBIX, dvmAsmInstructionStart + (293 * 128)
24495 lw rIBASE, offThread_curHandlerTable(rSELF)
24497 jr rBIX # nothing to do - jump to real handler
24500 move a0, rPC # arg0
24501 move a1, rFP # arg1
24502 move a2, rSELF # arg2
24503 JAL(dvmCheckBefore)
24506 /* ------------------------------ */
24508 .L_ALT_OP_INVOKE_INTERFACE_JUMBO: /* 0x126 */
24509 /* File: mips/alt_stub.S */
24511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24512 * any interesting requests and then jump to the real instruction
24513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24516 * bail to the real handler if breakFlags==0.
24518 lbu a3, offThread_breakFlags(rSELF)
24519 la rBIX, dvmAsmInstructionStart + (294 * 128)
24520 lw rIBASE, offThread_curHandlerTable(rSELF)
24522 jr rBIX # nothing to do - jump to real handler
24525 move a0, rPC # arg0
24526 move a1, rFP # arg1
24527 move a2, rSELF # arg2
24528 JAL(dvmCheckBefore)
24531 /* ------------------------------ */
24533 .L_ALT_OP_UNUSED_27FF: /* 0x127 */
24534 /* File: mips/alt_stub.S */
24536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24537 * any interesting requests and then jump to the real instruction
24538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24541 * bail to the real handler if breakFlags==0.
24543 lbu a3, offThread_breakFlags(rSELF)
24544 la rBIX, dvmAsmInstructionStart + (295 * 128)
24545 lw rIBASE, offThread_curHandlerTable(rSELF)
24547 jr rBIX # nothing to do - jump to real handler
24550 move a0, rPC # arg0
24551 move a1, rFP # arg1
24552 move a2, rSELF # arg2
24553 JAL(dvmCheckBefore)
24556 /* ------------------------------ */
24558 .L_ALT_OP_UNUSED_28FF: /* 0x128 */
24559 /* File: mips/alt_stub.S */
24561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24562 * any interesting requests and then jump to the real instruction
24563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24566 * bail to the real handler if breakFlags==0.
24568 lbu a3, offThread_breakFlags(rSELF)
24569 la rBIX, dvmAsmInstructionStart + (296 * 128)
24570 lw rIBASE, offThread_curHandlerTable(rSELF)
24572 jr rBIX # nothing to do - jump to real handler
24575 move a0, rPC # arg0
24576 move a1, rFP # arg1
24577 move a2, rSELF # arg2
24578 JAL(dvmCheckBefore)
24581 /* ------------------------------ */
24583 .L_ALT_OP_UNUSED_29FF: /* 0x129 */
24584 /* File: mips/alt_stub.S */
24586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24587 * any interesting requests and then jump to the real instruction
24588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24591 * bail to the real handler if breakFlags==0.
24593 lbu a3, offThread_breakFlags(rSELF)
24594 la rBIX, dvmAsmInstructionStart + (297 * 128)
24595 lw rIBASE, offThread_curHandlerTable(rSELF)
24597 jr rBIX # nothing to do - jump to real handler
24600 move a0, rPC # arg0
24601 move a1, rFP # arg1
24602 move a2, rSELF # arg2
24603 JAL(dvmCheckBefore)
24606 /* ------------------------------ */
24608 .L_ALT_OP_UNUSED_2AFF: /* 0x12a */
24609 /* File: mips/alt_stub.S */
24611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24612 * any interesting requests and then jump to the real instruction
24613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24616 * bail to the real handler if breakFlags==0.
24618 lbu a3, offThread_breakFlags(rSELF)
24619 la rBIX, dvmAsmInstructionStart + (298 * 128)
24620 lw rIBASE, offThread_curHandlerTable(rSELF)
24622 jr rBIX # nothing to do - jump to real handler
24625 move a0, rPC # arg0
24626 move a1, rFP # arg1
24627 move a2, rSELF # arg2
24628 JAL(dvmCheckBefore)
24631 /* ------------------------------ */
24633 .L_ALT_OP_UNUSED_2BFF: /* 0x12b */
24634 /* File: mips/alt_stub.S */
24636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24637 * any interesting requests and then jump to the real instruction
24638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24641 * bail to the real handler if breakFlags==0.
24643 lbu a3, offThread_breakFlags(rSELF)
24644 la rBIX, dvmAsmInstructionStart + (299 * 128)
24645 lw rIBASE, offThread_curHandlerTable(rSELF)
24647 jr rBIX # nothing to do - jump to real handler
24650 move a0, rPC # arg0
24651 move a1, rFP # arg1
24652 move a2, rSELF # arg2
24653 JAL(dvmCheckBefore)
24656 /* ------------------------------ */
24658 .L_ALT_OP_UNUSED_2CFF: /* 0x12c */
24659 /* File: mips/alt_stub.S */
24661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24662 * any interesting requests and then jump to the real instruction
24663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24666 * bail to the real handler if breakFlags==0.
24668 lbu a3, offThread_breakFlags(rSELF)
24669 la rBIX, dvmAsmInstructionStart + (300 * 128)
24670 lw rIBASE, offThread_curHandlerTable(rSELF)
24672 jr rBIX # nothing to do - jump to real handler
24675 move a0, rPC # arg0
24676 move a1, rFP # arg1
24677 move a2, rSELF # arg2
24678 JAL(dvmCheckBefore)
24681 /* ------------------------------ */
24683 .L_ALT_OP_UNUSED_2DFF: /* 0x12d */
24684 /* File: mips/alt_stub.S */
24686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24687 * any interesting requests and then jump to the real instruction
24688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24691 * bail to the real handler if breakFlags==0.
24693 lbu a3, offThread_breakFlags(rSELF)
24694 la rBIX, dvmAsmInstructionStart + (301 * 128)
24695 lw rIBASE, offThread_curHandlerTable(rSELF)
24697 jr rBIX # nothing to do - jump to real handler
24700 move a0, rPC # arg0
24701 move a1, rFP # arg1
24702 move a2, rSELF # arg2
24703 JAL(dvmCheckBefore)
24706 /* ------------------------------ */
24708 .L_ALT_OP_UNUSED_2EFF: /* 0x12e */
24709 /* File: mips/alt_stub.S */
24711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24712 * any interesting requests and then jump to the real instruction
24713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24716 * bail to the real handler if breakFlags==0.
24718 lbu a3, offThread_breakFlags(rSELF)
24719 la rBIX, dvmAsmInstructionStart + (302 * 128)
24720 lw rIBASE, offThread_curHandlerTable(rSELF)
24722 jr rBIX # nothing to do - jump to real handler
24725 move a0, rPC # arg0
24726 move a1, rFP # arg1
24727 move a2, rSELF # arg2
24728 JAL(dvmCheckBefore)
24731 /* ------------------------------ */
24733 .L_ALT_OP_UNUSED_2FFF: /* 0x12f */
24734 /* File: mips/alt_stub.S */
24736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24737 * any interesting requests and then jump to the real instruction
24738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24741 * bail to the real handler if breakFlags==0.
24743 lbu a3, offThread_breakFlags(rSELF)
24744 la rBIX, dvmAsmInstructionStart + (303 * 128)
24745 lw rIBASE, offThread_curHandlerTable(rSELF)
24747 jr rBIX # nothing to do - jump to real handler
24750 move a0, rPC # arg0
24751 move a1, rFP # arg1
24752 move a2, rSELF # arg2
24753 JAL(dvmCheckBefore)
24756 /* ------------------------------ */
24758 .L_ALT_OP_UNUSED_30FF: /* 0x130 */
24759 /* File: mips/alt_stub.S */
24761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24762 * any interesting requests and then jump to the real instruction
24763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24766 * bail to the real handler if breakFlags==0.
24768 lbu a3, offThread_breakFlags(rSELF)
24769 la rBIX, dvmAsmInstructionStart + (304 * 128)
24770 lw rIBASE, offThread_curHandlerTable(rSELF)
24772 jr rBIX # nothing to do - jump to real handler
24775 move a0, rPC # arg0
24776 move a1, rFP # arg1
24777 move a2, rSELF # arg2
24778 JAL(dvmCheckBefore)
24781 /* ------------------------------ */
24783 .L_ALT_OP_UNUSED_31FF: /* 0x131 */
24784 /* File: mips/alt_stub.S */
24786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24787 * any interesting requests and then jump to the real instruction
24788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24791 * bail to the real handler if breakFlags==0.
24793 lbu a3, offThread_breakFlags(rSELF)
24794 la rBIX, dvmAsmInstructionStart + (305 * 128)
24795 lw rIBASE, offThread_curHandlerTable(rSELF)
24797 jr rBIX # nothing to do - jump to real handler
24800 move a0, rPC # arg0
24801 move a1, rFP # arg1
24802 move a2, rSELF # arg2
24803 JAL(dvmCheckBefore)
24806 /* ------------------------------ */
24808 .L_ALT_OP_UNUSED_32FF: /* 0x132 */
24809 /* File: mips/alt_stub.S */
24811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24812 * any interesting requests and then jump to the real instruction
24813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24816 * bail to the real handler if breakFlags==0.
24818 lbu a3, offThread_breakFlags(rSELF)
24819 la rBIX, dvmAsmInstructionStart + (306 * 128)
24820 lw rIBASE, offThread_curHandlerTable(rSELF)
24822 jr rBIX # nothing to do - jump to real handler
24825 move a0, rPC # arg0
24826 move a1, rFP # arg1
24827 move a2, rSELF # arg2
24828 JAL(dvmCheckBefore)
24831 /* ------------------------------ */
24833 .L_ALT_OP_UNUSED_33FF: /* 0x133 */
24834 /* File: mips/alt_stub.S */
24836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24837 * any interesting requests and then jump to the real instruction
24838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24841 * bail to the real handler if breakFlags==0.
24843 lbu a3, offThread_breakFlags(rSELF)
24844 la rBIX, dvmAsmInstructionStart + (307 * 128)
24845 lw rIBASE, offThread_curHandlerTable(rSELF)
24847 jr rBIX # nothing to do - jump to real handler
24850 move a0, rPC # arg0
24851 move a1, rFP # arg1
24852 move a2, rSELF # arg2
24853 JAL(dvmCheckBefore)
24856 /* ------------------------------ */
24858 .L_ALT_OP_UNUSED_34FF: /* 0x134 */
24859 /* File: mips/alt_stub.S */
24861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24862 * any interesting requests and then jump to the real instruction
24863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24866 * bail to the real handler if breakFlags==0.
24868 lbu a3, offThread_breakFlags(rSELF)
24869 la rBIX, dvmAsmInstructionStart + (308 * 128)
24870 lw rIBASE, offThread_curHandlerTable(rSELF)
24872 jr rBIX # nothing to do - jump to real handler
24875 move a0, rPC # arg0
24876 move a1, rFP # arg1
24877 move a2, rSELF # arg2
24878 JAL(dvmCheckBefore)
24881 /* ------------------------------ */
24883 .L_ALT_OP_UNUSED_35FF: /* 0x135 */
24884 /* File: mips/alt_stub.S */
24886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24887 * any interesting requests and then jump to the real instruction
24888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24891 * bail to the real handler if breakFlags==0.
24893 lbu a3, offThread_breakFlags(rSELF)
24894 la rBIX, dvmAsmInstructionStart + (309 * 128)
24895 lw rIBASE, offThread_curHandlerTable(rSELF)
24897 jr rBIX # nothing to do - jump to real handler
24900 move a0, rPC # arg0
24901 move a1, rFP # arg1
24902 move a2, rSELF # arg2
24903 JAL(dvmCheckBefore)
24906 /* ------------------------------ */
24908 .L_ALT_OP_UNUSED_36FF: /* 0x136 */
24909 /* File: mips/alt_stub.S */
24911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24912 * any interesting requests and then jump to the real instruction
24913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24916 * bail to the real handler if breakFlags==0.
24918 lbu a3, offThread_breakFlags(rSELF)
24919 la rBIX, dvmAsmInstructionStart + (310 * 128)
24920 lw rIBASE, offThread_curHandlerTable(rSELF)
24922 jr rBIX # nothing to do - jump to real handler
24925 move a0, rPC # arg0
24926 move a1, rFP # arg1
24927 move a2, rSELF # arg2
24928 JAL(dvmCheckBefore)
24931 /* ------------------------------ */
24933 .L_ALT_OP_UNUSED_37FF: /* 0x137 */
24934 /* File: mips/alt_stub.S */
24936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24937 * any interesting requests and then jump to the real instruction
24938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24941 * bail to the real handler if breakFlags==0.
24943 lbu a3, offThread_breakFlags(rSELF)
24944 la rBIX, dvmAsmInstructionStart + (311 * 128)
24945 lw rIBASE, offThread_curHandlerTable(rSELF)
24947 jr rBIX # nothing to do - jump to real handler
24950 move a0, rPC # arg0
24951 move a1, rFP # arg1
24952 move a2, rSELF # arg2
24953 JAL(dvmCheckBefore)
24956 /* ------------------------------ */
24958 .L_ALT_OP_UNUSED_38FF: /* 0x138 */
24959 /* File: mips/alt_stub.S */
24961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24962 * any interesting requests and then jump to the real instruction
24963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24966 * bail to the real handler if breakFlags==0.
24968 lbu a3, offThread_breakFlags(rSELF)
24969 la rBIX, dvmAsmInstructionStart + (312 * 128)
24970 lw rIBASE, offThread_curHandlerTable(rSELF)
24972 jr rBIX # nothing to do - jump to real handler
24975 move a0, rPC # arg0
24976 move a1, rFP # arg1
24977 move a2, rSELF # arg2
24978 JAL(dvmCheckBefore)
24981 /* ------------------------------ */
24983 .L_ALT_OP_UNUSED_39FF: /* 0x139 */
24984 /* File: mips/alt_stub.S */
24986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
24987 * any interesting requests and then jump to the real instruction
24988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
24989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
24990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
24991 * bail to the real handler if breakFlags==0.
24993 lbu a3, offThread_breakFlags(rSELF)
24994 la rBIX, dvmAsmInstructionStart + (313 * 128)
24995 lw rIBASE, offThread_curHandlerTable(rSELF)
24997 jr rBIX # nothing to do - jump to real handler
25000 move a0, rPC # arg0
25001 move a1, rFP # arg1
25002 move a2, rSELF # arg2
25003 JAL(dvmCheckBefore)
25006 /* ------------------------------ */
25008 .L_ALT_OP_UNUSED_3AFF: /* 0x13a */
25009 /* File: mips/alt_stub.S */
25011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25012 * any interesting requests and then jump to the real instruction
25013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25016 * bail to the real handler if breakFlags==0.
25018 lbu a3, offThread_breakFlags(rSELF)
25019 la rBIX, dvmAsmInstructionStart + (314 * 128)
25020 lw rIBASE, offThread_curHandlerTable(rSELF)
25022 jr rBIX # nothing to do - jump to real handler
25025 move a0, rPC # arg0
25026 move a1, rFP # arg1
25027 move a2, rSELF # arg2
25028 JAL(dvmCheckBefore)
25031 /* ------------------------------ */
25033 .L_ALT_OP_UNUSED_3BFF: /* 0x13b */
25034 /* File: mips/alt_stub.S */
25036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25037 * any interesting requests and then jump to the real instruction
25038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25041 * bail to the real handler if breakFlags==0.
25043 lbu a3, offThread_breakFlags(rSELF)
25044 la rBIX, dvmAsmInstructionStart + (315 * 128)
25045 lw rIBASE, offThread_curHandlerTable(rSELF)
25047 jr rBIX # nothing to do - jump to real handler
25050 move a0, rPC # arg0
25051 move a1, rFP # arg1
25052 move a2, rSELF # arg2
25053 JAL(dvmCheckBefore)
25056 /* ------------------------------ */
25058 .L_ALT_OP_UNUSED_3CFF: /* 0x13c */
25059 /* File: mips/alt_stub.S */
25061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25062 * any interesting requests and then jump to the real instruction
25063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25066 * bail to the real handler if breakFlags==0.
25068 lbu a3, offThread_breakFlags(rSELF)
25069 la rBIX, dvmAsmInstructionStart + (316 * 128)
25070 lw rIBASE, offThread_curHandlerTable(rSELF)
25072 jr rBIX # nothing to do - jump to real handler
25075 move a0, rPC # arg0
25076 move a1, rFP # arg1
25077 move a2, rSELF # arg2
25078 JAL(dvmCheckBefore)
25081 /* ------------------------------ */
25083 .L_ALT_OP_UNUSED_3DFF: /* 0x13d */
25084 /* File: mips/alt_stub.S */
25086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25087 * any interesting requests and then jump to the real instruction
25088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25091 * bail to the real handler if breakFlags==0.
25093 lbu a3, offThread_breakFlags(rSELF)
25094 la rBIX, dvmAsmInstructionStart + (317 * 128)
25095 lw rIBASE, offThread_curHandlerTable(rSELF)
25097 jr rBIX # nothing to do - jump to real handler
25100 move a0, rPC # arg0
25101 move a1, rFP # arg1
25102 move a2, rSELF # arg2
25103 JAL(dvmCheckBefore)
25106 /* ------------------------------ */
25108 .L_ALT_OP_UNUSED_3EFF: /* 0x13e */
25109 /* File: mips/alt_stub.S */
25111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25112 * any interesting requests and then jump to the real instruction
25113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25116 * bail to the real handler if breakFlags==0.
25118 lbu a3, offThread_breakFlags(rSELF)
25119 la rBIX, dvmAsmInstructionStart + (318 * 128)
25120 lw rIBASE, offThread_curHandlerTable(rSELF)
25122 jr rBIX # nothing to do - jump to real handler
25125 move a0, rPC # arg0
25126 move a1, rFP # arg1
25127 move a2, rSELF # arg2
25128 JAL(dvmCheckBefore)
25131 /* ------------------------------ */
25133 .L_ALT_OP_UNUSED_3FFF: /* 0x13f */
25134 /* File: mips/alt_stub.S */
25136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25137 * any interesting requests and then jump to the real instruction
25138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25141 * bail to the real handler if breakFlags==0.
25143 lbu a3, offThread_breakFlags(rSELF)
25144 la rBIX, dvmAsmInstructionStart + (319 * 128)
25145 lw rIBASE, offThread_curHandlerTable(rSELF)
25147 jr rBIX # nothing to do - jump to real handler
25150 move a0, rPC # arg0
25151 move a1, rFP # arg1
25152 move a2, rSELF # arg2
25153 JAL(dvmCheckBefore)
25156 /* ------------------------------ */
25158 .L_ALT_OP_UNUSED_40FF: /* 0x140 */
25159 /* File: mips/alt_stub.S */
25161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25162 * any interesting requests and then jump to the real instruction
25163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25166 * bail to the real handler if breakFlags==0.
25168 lbu a3, offThread_breakFlags(rSELF)
25169 la rBIX, dvmAsmInstructionStart + (320 * 128)
25170 lw rIBASE, offThread_curHandlerTable(rSELF)
25172 jr rBIX # nothing to do - jump to real handler
25175 move a0, rPC # arg0
25176 move a1, rFP # arg1
25177 move a2, rSELF # arg2
25178 JAL(dvmCheckBefore)
25181 /* ------------------------------ */
25183 .L_ALT_OP_UNUSED_41FF: /* 0x141 */
25184 /* File: mips/alt_stub.S */
25186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25187 * any interesting requests and then jump to the real instruction
25188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25191 * bail to the real handler if breakFlags==0.
25193 lbu a3, offThread_breakFlags(rSELF)
25194 la rBIX, dvmAsmInstructionStart + (321 * 128)
25195 lw rIBASE, offThread_curHandlerTable(rSELF)
25197 jr rBIX # nothing to do - jump to real handler
25200 move a0, rPC # arg0
25201 move a1, rFP # arg1
25202 move a2, rSELF # arg2
25203 JAL(dvmCheckBefore)
25206 /* ------------------------------ */
25208 .L_ALT_OP_UNUSED_42FF: /* 0x142 */
25209 /* File: mips/alt_stub.S */
25211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25212 * any interesting requests and then jump to the real instruction
25213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25216 * bail to the real handler if breakFlags==0.
25218 lbu a3, offThread_breakFlags(rSELF)
25219 la rBIX, dvmAsmInstructionStart + (322 * 128)
25220 lw rIBASE, offThread_curHandlerTable(rSELF)
25222 jr rBIX # nothing to do - jump to real handler
25225 move a0, rPC # arg0
25226 move a1, rFP # arg1
25227 move a2, rSELF # arg2
25228 JAL(dvmCheckBefore)
25231 /* ------------------------------ */
25233 .L_ALT_OP_UNUSED_43FF: /* 0x143 */
25234 /* File: mips/alt_stub.S */
25236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25237 * any interesting requests and then jump to the real instruction
25238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25241 * bail to the real handler if breakFlags==0.
25243 lbu a3, offThread_breakFlags(rSELF)
25244 la rBIX, dvmAsmInstructionStart + (323 * 128)
25245 lw rIBASE, offThread_curHandlerTable(rSELF)
25247 jr rBIX # nothing to do - jump to real handler
25250 move a0, rPC # arg0
25251 move a1, rFP # arg1
25252 move a2, rSELF # arg2
25253 JAL(dvmCheckBefore)
25256 /* ------------------------------ */
25258 .L_ALT_OP_UNUSED_44FF: /* 0x144 */
25259 /* File: mips/alt_stub.S */
25261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25262 * any interesting requests and then jump to the real instruction
25263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25266 * bail to the real handler if breakFlags==0.
25268 lbu a3, offThread_breakFlags(rSELF)
25269 la rBIX, dvmAsmInstructionStart + (324 * 128)
25270 lw rIBASE, offThread_curHandlerTable(rSELF)
25272 jr rBIX # nothing to do - jump to real handler
25275 move a0, rPC # arg0
25276 move a1, rFP # arg1
25277 move a2, rSELF # arg2
25278 JAL(dvmCheckBefore)
25281 /* ------------------------------ */
25283 .L_ALT_OP_UNUSED_45FF: /* 0x145 */
25284 /* File: mips/alt_stub.S */
25286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25287 * any interesting requests and then jump to the real instruction
25288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25291 * bail to the real handler if breakFlags==0.
25293 lbu a3, offThread_breakFlags(rSELF)
25294 la rBIX, dvmAsmInstructionStart + (325 * 128)
25295 lw rIBASE, offThread_curHandlerTable(rSELF)
25297 jr rBIX # nothing to do - jump to real handler
25300 move a0, rPC # arg0
25301 move a1, rFP # arg1
25302 move a2, rSELF # arg2
25303 JAL(dvmCheckBefore)
25306 /* ------------------------------ */
25308 .L_ALT_OP_UNUSED_46FF: /* 0x146 */
25309 /* File: mips/alt_stub.S */
25311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25312 * any interesting requests and then jump to the real instruction
25313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25316 * bail to the real handler if breakFlags==0.
25318 lbu a3, offThread_breakFlags(rSELF)
25319 la rBIX, dvmAsmInstructionStart + (326 * 128)
25320 lw rIBASE, offThread_curHandlerTable(rSELF)
25322 jr rBIX # nothing to do - jump to real handler
25325 move a0, rPC # arg0
25326 move a1, rFP # arg1
25327 move a2, rSELF # arg2
25328 JAL(dvmCheckBefore)
25331 /* ------------------------------ */
25333 .L_ALT_OP_UNUSED_47FF: /* 0x147 */
25334 /* File: mips/alt_stub.S */
25336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25337 * any interesting requests and then jump to the real instruction
25338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25341 * bail to the real handler if breakFlags==0.
25343 lbu a3, offThread_breakFlags(rSELF)
25344 la rBIX, dvmAsmInstructionStart + (327 * 128)
25345 lw rIBASE, offThread_curHandlerTable(rSELF)
25347 jr rBIX # nothing to do - jump to real handler
25350 move a0, rPC # arg0
25351 move a1, rFP # arg1
25352 move a2, rSELF # arg2
25353 JAL(dvmCheckBefore)
25356 /* ------------------------------ */
25358 .L_ALT_OP_UNUSED_48FF: /* 0x148 */
25359 /* File: mips/alt_stub.S */
25361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25362 * any interesting requests and then jump to the real instruction
25363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25366 * bail to the real handler if breakFlags==0.
25368 lbu a3, offThread_breakFlags(rSELF)
25369 la rBIX, dvmAsmInstructionStart + (328 * 128)
25370 lw rIBASE, offThread_curHandlerTable(rSELF)
25372 jr rBIX # nothing to do - jump to real handler
25375 move a0, rPC # arg0
25376 move a1, rFP # arg1
25377 move a2, rSELF # arg2
25378 JAL(dvmCheckBefore)
25381 /* ------------------------------ */
25383 .L_ALT_OP_UNUSED_49FF: /* 0x149 */
25384 /* File: mips/alt_stub.S */
25386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25387 * any interesting requests and then jump to the real instruction
25388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25391 * bail to the real handler if breakFlags==0.
25393 lbu a3, offThread_breakFlags(rSELF)
25394 la rBIX, dvmAsmInstructionStart + (329 * 128)
25395 lw rIBASE, offThread_curHandlerTable(rSELF)
25397 jr rBIX # nothing to do - jump to real handler
25400 move a0, rPC # arg0
25401 move a1, rFP # arg1
25402 move a2, rSELF # arg2
25403 JAL(dvmCheckBefore)
25406 /* ------------------------------ */
25408 .L_ALT_OP_UNUSED_4AFF: /* 0x14a */
25409 /* File: mips/alt_stub.S */
25411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25412 * any interesting requests and then jump to the real instruction
25413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25416 * bail to the real handler if breakFlags==0.
25418 lbu a3, offThread_breakFlags(rSELF)
25419 la rBIX, dvmAsmInstructionStart + (330 * 128)
25420 lw rIBASE, offThread_curHandlerTable(rSELF)
25422 jr rBIX # nothing to do - jump to real handler
25425 move a0, rPC # arg0
25426 move a1, rFP # arg1
25427 move a2, rSELF # arg2
25428 JAL(dvmCheckBefore)
25431 /* ------------------------------ */
25433 .L_ALT_OP_UNUSED_4BFF: /* 0x14b */
25434 /* File: mips/alt_stub.S */
25436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25437 * any interesting requests and then jump to the real instruction
25438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25441 * bail to the real handler if breakFlags==0.
25443 lbu a3, offThread_breakFlags(rSELF)
25444 la rBIX, dvmAsmInstructionStart + (331 * 128)
25445 lw rIBASE, offThread_curHandlerTable(rSELF)
25447 jr rBIX # nothing to do - jump to real handler
25450 move a0, rPC # arg0
25451 move a1, rFP # arg1
25452 move a2, rSELF # arg2
25453 JAL(dvmCheckBefore)
25456 /* ------------------------------ */
25458 .L_ALT_OP_UNUSED_4CFF: /* 0x14c */
25459 /* File: mips/alt_stub.S */
25461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25462 * any interesting requests and then jump to the real instruction
25463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25466 * bail to the real handler if breakFlags==0.
25468 lbu a3, offThread_breakFlags(rSELF)
25469 la rBIX, dvmAsmInstructionStart + (332 * 128)
25470 lw rIBASE, offThread_curHandlerTable(rSELF)
25472 jr rBIX # nothing to do - jump to real handler
25475 move a0, rPC # arg0
25476 move a1, rFP # arg1
25477 move a2, rSELF # arg2
25478 JAL(dvmCheckBefore)
25481 /* ------------------------------ */
25483 .L_ALT_OP_UNUSED_4DFF: /* 0x14d */
25484 /* File: mips/alt_stub.S */
25486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25487 * any interesting requests and then jump to the real instruction
25488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25491 * bail to the real handler if breakFlags==0.
25493 lbu a3, offThread_breakFlags(rSELF)
25494 la rBIX, dvmAsmInstructionStart + (333 * 128)
25495 lw rIBASE, offThread_curHandlerTable(rSELF)
25497 jr rBIX # nothing to do - jump to real handler
25500 move a0, rPC # arg0
25501 move a1, rFP # arg1
25502 move a2, rSELF # arg2
25503 JAL(dvmCheckBefore)
25506 /* ------------------------------ */
25508 .L_ALT_OP_UNUSED_4EFF: /* 0x14e */
25509 /* File: mips/alt_stub.S */
25511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25512 * any interesting requests and then jump to the real instruction
25513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25516 * bail to the real handler if breakFlags==0.
25518 lbu a3, offThread_breakFlags(rSELF)
25519 la rBIX, dvmAsmInstructionStart + (334 * 128)
25520 lw rIBASE, offThread_curHandlerTable(rSELF)
25522 jr rBIX # nothing to do - jump to real handler
25525 move a0, rPC # arg0
25526 move a1, rFP # arg1
25527 move a2, rSELF # arg2
25528 JAL(dvmCheckBefore)
25531 /* ------------------------------ */
25533 .L_ALT_OP_UNUSED_4FFF: /* 0x14f */
25534 /* File: mips/alt_stub.S */
25536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25537 * any interesting requests and then jump to the real instruction
25538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25541 * bail to the real handler if breakFlags==0.
25543 lbu a3, offThread_breakFlags(rSELF)
25544 la rBIX, dvmAsmInstructionStart + (335 * 128)
25545 lw rIBASE, offThread_curHandlerTable(rSELF)
25547 jr rBIX # nothing to do - jump to real handler
25550 move a0, rPC # arg0
25551 move a1, rFP # arg1
25552 move a2, rSELF # arg2
25553 JAL(dvmCheckBefore)
25556 /* ------------------------------ */
25558 .L_ALT_OP_UNUSED_50FF: /* 0x150 */
25559 /* File: mips/alt_stub.S */
25561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25562 * any interesting requests and then jump to the real instruction
25563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25566 * bail to the real handler if breakFlags==0.
25568 lbu a3, offThread_breakFlags(rSELF)
25569 la rBIX, dvmAsmInstructionStart + (336 * 128)
25570 lw rIBASE, offThread_curHandlerTable(rSELF)
25572 jr rBIX # nothing to do - jump to real handler
25575 move a0, rPC # arg0
25576 move a1, rFP # arg1
25577 move a2, rSELF # arg2
25578 JAL(dvmCheckBefore)
25581 /* ------------------------------ */
25583 .L_ALT_OP_UNUSED_51FF: /* 0x151 */
25584 /* File: mips/alt_stub.S */
25586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25587 * any interesting requests and then jump to the real instruction
25588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25591 * bail to the real handler if breakFlags==0.
25593 lbu a3, offThread_breakFlags(rSELF)
25594 la rBIX, dvmAsmInstructionStart + (337 * 128)
25595 lw rIBASE, offThread_curHandlerTable(rSELF)
25597 jr rBIX # nothing to do - jump to real handler
25600 move a0, rPC # arg0
25601 move a1, rFP # arg1
25602 move a2, rSELF # arg2
25603 JAL(dvmCheckBefore)
25606 /* ------------------------------ */
25608 .L_ALT_OP_UNUSED_52FF: /* 0x152 */
25609 /* File: mips/alt_stub.S */
25611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25612 * any interesting requests and then jump to the real instruction
25613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25616 * bail to the real handler if breakFlags==0.
25618 lbu a3, offThread_breakFlags(rSELF)
25619 la rBIX, dvmAsmInstructionStart + (338 * 128)
25620 lw rIBASE, offThread_curHandlerTable(rSELF)
25622 jr rBIX # nothing to do - jump to real handler
25625 move a0, rPC # arg0
25626 move a1, rFP # arg1
25627 move a2, rSELF # arg2
25628 JAL(dvmCheckBefore)
25631 /* ------------------------------ */
25633 .L_ALT_OP_UNUSED_53FF: /* 0x153 */
25634 /* File: mips/alt_stub.S */
25636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25637 * any interesting requests and then jump to the real instruction
25638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25641 * bail to the real handler if breakFlags==0.
25643 lbu a3, offThread_breakFlags(rSELF)
25644 la rBIX, dvmAsmInstructionStart + (339 * 128)
25645 lw rIBASE, offThread_curHandlerTable(rSELF)
25647 jr rBIX # nothing to do - jump to real handler
25650 move a0, rPC # arg0
25651 move a1, rFP # arg1
25652 move a2, rSELF # arg2
25653 JAL(dvmCheckBefore)
25656 /* ------------------------------ */
25658 .L_ALT_OP_UNUSED_54FF: /* 0x154 */
25659 /* File: mips/alt_stub.S */
25661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25662 * any interesting requests and then jump to the real instruction
25663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25666 * bail to the real handler if breakFlags==0.
25668 lbu a3, offThread_breakFlags(rSELF)
25669 la rBIX, dvmAsmInstructionStart + (340 * 128)
25670 lw rIBASE, offThread_curHandlerTable(rSELF)
25672 jr rBIX # nothing to do - jump to real handler
25675 move a0, rPC # arg0
25676 move a1, rFP # arg1
25677 move a2, rSELF # arg2
25678 JAL(dvmCheckBefore)
25681 /* ------------------------------ */
25683 .L_ALT_OP_UNUSED_55FF: /* 0x155 */
25684 /* File: mips/alt_stub.S */
25686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25687 * any interesting requests and then jump to the real instruction
25688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25691 * bail to the real handler if breakFlags==0.
25693 lbu a3, offThread_breakFlags(rSELF)
25694 la rBIX, dvmAsmInstructionStart + (341 * 128)
25695 lw rIBASE, offThread_curHandlerTable(rSELF)
25697 jr rBIX # nothing to do - jump to real handler
25700 move a0, rPC # arg0
25701 move a1, rFP # arg1
25702 move a2, rSELF # arg2
25703 JAL(dvmCheckBefore)
25706 /* ------------------------------ */
25708 .L_ALT_OP_UNUSED_56FF: /* 0x156 */
25709 /* File: mips/alt_stub.S */
25711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25712 * any interesting requests and then jump to the real instruction
25713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25716 * bail to the real handler if breakFlags==0.
25718 lbu a3, offThread_breakFlags(rSELF)
25719 la rBIX, dvmAsmInstructionStart + (342 * 128)
25720 lw rIBASE, offThread_curHandlerTable(rSELF)
25722 jr rBIX # nothing to do - jump to real handler
25725 move a0, rPC # arg0
25726 move a1, rFP # arg1
25727 move a2, rSELF # arg2
25728 JAL(dvmCheckBefore)
25731 /* ------------------------------ */
25733 .L_ALT_OP_UNUSED_57FF: /* 0x157 */
25734 /* File: mips/alt_stub.S */
25736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25737 * any interesting requests and then jump to the real instruction
25738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25741 * bail to the real handler if breakFlags==0.
25743 lbu a3, offThread_breakFlags(rSELF)
25744 la rBIX, dvmAsmInstructionStart + (343 * 128)
25745 lw rIBASE, offThread_curHandlerTable(rSELF)
25747 jr rBIX # nothing to do - jump to real handler
25750 move a0, rPC # arg0
25751 move a1, rFP # arg1
25752 move a2, rSELF # arg2
25753 JAL(dvmCheckBefore)
25756 /* ------------------------------ */
25758 .L_ALT_OP_UNUSED_58FF: /* 0x158 */
25759 /* File: mips/alt_stub.S */
25761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25762 * any interesting requests and then jump to the real instruction
25763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25766 * bail to the real handler if breakFlags==0.
25768 lbu a3, offThread_breakFlags(rSELF)
25769 la rBIX, dvmAsmInstructionStart + (344 * 128)
25770 lw rIBASE, offThread_curHandlerTable(rSELF)
25772 jr rBIX # nothing to do - jump to real handler
25775 move a0, rPC # arg0
25776 move a1, rFP # arg1
25777 move a2, rSELF # arg2
25778 JAL(dvmCheckBefore)
25781 /* ------------------------------ */
25783 .L_ALT_OP_UNUSED_59FF: /* 0x159 */
25784 /* File: mips/alt_stub.S */
25786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25787 * any interesting requests and then jump to the real instruction
25788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25791 * bail to the real handler if breakFlags==0.
25793 lbu a3, offThread_breakFlags(rSELF)
25794 la rBIX, dvmAsmInstructionStart + (345 * 128)
25795 lw rIBASE, offThread_curHandlerTable(rSELF)
25797 jr rBIX # nothing to do - jump to real handler
25800 move a0, rPC # arg0
25801 move a1, rFP # arg1
25802 move a2, rSELF # arg2
25803 JAL(dvmCheckBefore)
25806 /* ------------------------------ */
25808 .L_ALT_OP_UNUSED_5AFF: /* 0x15a */
25809 /* File: mips/alt_stub.S */
25811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25812 * any interesting requests and then jump to the real instruction
25813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25816 * bail to the real handler if breakFlags==0.
25818 lbu a3, offThread_breakFlags(rSELF)
25819 la rBIX, dvmAsmInstructionStart + (346 * 128)
25820 lw rIBASE, offThread_curHandlerTable(rSELF)
25822 jr rBIX # nothing to do - jump to real handler
25825 move a0, rPC # arg0
25826 move a1, rFP # arg1
25827 move a2, rSELF # arg2
25828 JAL(dvmCheckBefore)
25831 /* ------------------------------ */
25833 .L_ALT_OP_UNUSED_5BFF: /* 0x15b */
25834 /* File: mips/alt_stub.S */
25836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25837 * any interesting requests and then jump to the real instruction
25838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25841 * bail to the real handler if breakFlags==0.
25843 lbu a3, offThread_breakFlags(rSELF)
25844 la rBIX, dvmAsmInstructionStart + (347 * 128)
25845 lw rIBASE, offThread_curHandlerTable(rSELF)
25847 jr rBIX # nothing to do - jump to real handler
25850 move a0, rPC # arg0
25851 move a1, rFP # arg1
25852 move a2, rSELF # arg2
25853 JAL(dvmCheckBefore)
25856 /* ------------------------------ */
25858 .L_ALT_OP_UNUSED_5CFF: /* 0x15c */
25859 /* File: mips/alt_stub.S */
25861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25862 * any interesting requests and then jump to the real instruction
25863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25866 * bail to the real handler if breakFlags==0.
25868 lbu a3, offThread_breakFlags(rSELF)
25869 la rBIX, dvmAsmInstructionStart + (348 * 128)
25870 lw rIBASE, offThread_curHandlerTable(rSELF)
25872 jr rBIX # nothing to do - jump to real handler
25875 move a0, rPC # arg0
25876 move a1, rFP # arg1
25877 move a2, rSELF # arg2
25878 JAL(dvmCheckBefore)
25881 /* ------------------------------ */
25883 .L_ALT_OP_UNUSED_5DFF: /* 0x15d */
25884 /* File: mips/alt_stub.S */
25886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25887 * any interesting requests and then jump to the real instruction
25888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25891 * bail to the real handler if breakFlags==0.
25893 lbu a3, offThread_breakFlags(rSELF)
25894 la rBIX, dvmAsmInstructionStart + (349 * 128)
25895 lw rIBASE, offThread_curHandlerTable(rSELF)
25897 jr rBIX # nothing to do - jump to real handler
25900 move a0, rPC # arg0
25901 move a1, rFP # arg1
25902 move a2, rSELF # arg2
25903 JAL(dvmCheckBefore)
25906 /* ------------------------------ */
25908 .L_ALT_OP_UNUSED_5EFF: /* 0x15e */
25909 /* File: mips/alt_stub.S */
25911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25912 * any interesting requests and then jump to the real instruction
25913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25916 * bail to the real handler if breakFlags==0.
25918 lbu a3, offThread_breakFlags(rSELF)
25919 la rBIX, dvmAsmInstructionStart + (350 * 128)
25920 lw rIBASE, offThread_curHandlerTable(rSELF)
25922 jr rBIX # nothing to do - jump to real handler
25925 move a0, rPC # arg0
25926 move a1, rFP # arg1
25927 move a2, rSELF # arg2
25928 JAL(dvmCheckBefore)
25931 /* ------------------------------ */
25933 .L_ALT_OP_UNUSED_5FFF: /* 0x15f */
25934 /* File: mips/alt_stub.S */
25936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25937 * any interesting requests and then jump to the real instruction
25938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25941 * bail to the real handler if breakFlags==0.
25943 lbu a3, offThread_breakFlags(rSELF)
25944 la rBIX, dvmAsmInstructionStart + (351 * 128)
25945 lw rIBASE, offThread_curHandlerTable(rSELF)
25947 jr rBIX # nothing to do - jump to real handler
25950 move a0, rPC # arg0
25951 move a1, rFP # arg1
25952 move a2, rSELF # arg2
25953 JAL(dvmCheckBefore)
25956 /* ------------------------------ */
25958 .L_ALT_OP_UNUSED_60FF: /* 0x160 */
25959 /* File: mips/alt_stub.S */
25961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25962 * any interesting requests and then jump to the real instruction
25963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25966 * bail to the real handler if breakFlags==0.
25968 lbu a3, offThread_breakFlags(rSELF)
25969 la rBIX, dvmAsmInstructionStart + (352 * 128)
25970 lw rIBASE, offThread_curHandlerTable(rSELF)
25972 jr rBIX # nothing to do - jump to real handler
25975 move a0, rPC # arg0
25976 move a1, rFP # arg1
25977 move a2, rSELF # arg2
25978 JAL(dvmCheckBefore)
25981 /* ------------------------------ */
25983 .L_ALT_OP_UNUSED_61FF: /* 0x161 */
25984 /* File: mips/alt_stub.S */
25986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
25987 * any interesting requests and then jump to the real instruction
25988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
25989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
25990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
25991 * bail to the real handler if breakFlags==0.
25993 lbu a3, offThread_breakFlags(rSELF)
25994 la rBIX, dvmAsmInstructionStart + (353 * 128)
25995 lw rIBASE, offThread_curHandlerTable(rSELF)
25997 jr rBIX # nothing to do - jump to real handler
26000 move a0, rPC # arg0
26001 move a1, rFP # arg1
26002 move a2, rSELF # arg2
26003 JAL(dvmCheckBefore)
26006 /* ------------------------------ */
26008 .L_ALT_OP_UNUSED_62FF: /* 0x162 */
26009 /* File: mips/alt_stub.S */
26011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26012 * any interesting requests and then jump to the real instruction
26013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26016 * bail to the real handler if breakFlags==0.
26018 lbu a3, offThread_breakFlags(rSELF)
26019 la rBIX, dvmAsmInstructionStart + (354 * 128)
26020 lw rIBASE, offThread_curHandlerTable(rSELF)
26022 jr rBIX # nothing to do - jump to real handler
26025 move a0, rPC # arg0
26026 move a1, rFP # arg1
26027 move a2, rSELF # arg2
26028 JAL(dvmCheckBefore)
26031 /* ------------------------------ */
26033 .L_ALT_OP_UNUSED_63FF: /* 0x163 */
26034 /* File: mips/alt_stub.S */
26036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26037 * any interesting requests and then jump to the real instruction
26038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26041 * bail to the real handler if breakFlags==0.
26043 lbu a3, offThread_breakFlags(rSELF)
26044 la rBIX, dvmAsmInstructionStart + (355 * 128)
26045 lw rIBASE, offThread_curHandlerTable(rSELF)
26047 jr rBIX # nothing to do - jump to real handler
26050 move a0, rPC # arg0
26051 move a1, rFP # arg1
26052 move a2, rSELF # arg2
26053 JAL(dvmCheckBefore)
26056 /* ------------------------------ */
26058 .L_ALT_OP_UNUSED_64FF: /* 0x164 */
26059 /* File: mips/alt_stub.S */
26061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26062 * any interesting requests and then jump to the real instruction
26063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26066 * bail to the real handler if breakFlags==0.
26068 lbu a3, offThread_breakFlags(rSELF)
26069 la rBIX, dvmAsmInstructionStart + (356 * 128)
26070 lw rIBASE, offThread_curHandlerTable(rSELF)
26072 jr rBIX # nothing to do - jump to real handler
26075 move a0, rPC # arg0
26076 move a1, rFP # arg1
26077 move a2, rSELF # arg2
26078 JAL(dvmCheckBefore)
26081 /* ------------------------------ */
26083 .L_ALT_OP_UNUSED_65FF: /* 0x165 */
26084 /* File: mips/alt_stub.S */
26086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26087 * any interesting requests and then jump to the real instruction
26088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26091 * bail to the real handler if breakFlags==0.
26093 lbu a3, offThread_breakFlags(rSELF)
26094 la rBIX, dvmAsmInstructionStart + (357 * 128)
26095 lw rIBASE, offThread_curHandlerTable(rSELF)
26097 jr rBIX # nothing to do - jump to real handler
26100 move a0, rPC # arg0
26101 move a1, rFP # arg1
26102 move a2, rSELF # arg2
26103 JAL(dvmCheckBefore)
26106 /* ------------------------------ */
26108 .L_ALT_OP_UNUSED_66FF: /* 0x166 */
26109 /* File: mips/alt_stub.S */
26111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26112 * any interesting requests and then jump to the real instruction
26113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26116 * bail to the real handler if breakFlags==0.
26118 lbu a3, offThread_breakFlags(rSELF)
26119 la rBIX, dvmAsmInstructionStart + (358 * 128)
26120 lw rIBASE, offThread_curHandlerTable(rSELF)
26122 jr rBIX # nothing to do - jump to real handler
26125 move a0, rPC # arg0
26126 move a1, rFP # arg1
26127 move a2, rSELF # arg2
26128 JAL(dvmCheckBefore)
26131 /* ------------------------------ */
26133 .L_ALT_OP_UNUSED_67FF: /* 0x167 */
26134 /* File: mips/alt_stub.S */
26136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26137 * any interesting requests and then jump to the real instruction
26138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26141 * bail to the real handler if breakFlags==0.
26143 lbu a3, offThread_breakFlags(rSELF)
26144 la rBIX, dvmAsmInstructionStart + (359 * 128)
26145 lw rIBASE, offThread_curHandlerTable(rSELF)
26147 jr rBIX # nothing to do - jump to real handler
26150 move a0, rPC # arg0
26151 move a1, rFP # arg1
26152 move a2, rSELF # arg2
26153 JAL(dvmCheckBefore)
26156 /* ------------------------------ */
26158 .L_ALT_OP_UNUSED_68FF: /* 0x168 */
26159 /* File: mips/alt_stub.S */
26161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26162 * any interesting requests and then jump to the real instruction
26163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26166 * bail to the real handler if breakFlags==0.
26168 lbu a3, offThread_breakFlags(rSELF)
26169 la rBIX, dvmAsmInstructionStart + (360 * 128)
26170 lw rIBASE, offThread_curHandlerTable(rSELF)
26172 jr rBIX # nothing to do - jump to real handler
26175 move a0, rPC # arg0
26176 move a1, rFP # arg1
26177 move a2, rSELF # arg2
26178 JAL(dvmCheckBefore)
26181 /* ------------------------------ */
26183 .L_ALT_OP_UNUSED_69FF: /* 0x169 */
26184 /* File: mips/alt_stub.S */
26186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26187 * any interesting requests and then jump to the real instruction
26188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26191 * bail to the real handler if breakFlags==0.
26193 lbu a3, offThread_breakFlags(rSELF)
26194 la rBIX, dvmAsmInstructionStart + (361 * 128)
26195 lw rIBASE, offThread_curHandlerTable(rSELF)
26197 jr rBIX # nothing to do - jump to real handler
26200 move a0, rPC # arg0
26201 move a1, rFP # arg1
26202 move a2, rSELF # arg2
26203 JAL(dvmCheckBefore)
26206 /* ------------------------------ */
26208 .L_ALT_OP_UNUSED_6AFF: /* 0x16a */
26209 /* File: mips/alt_stub.S */
26211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26212 * any interesting requests and then jump to the real instruction
26213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26216 * bail to the real handler if breakFlags==0.
26218 lbu a3, offThread_breakFlags(rSELF)
26219 la rBIX, dvmAsmInstructionStart + (362 * 128)
26220 lw rIBASE, offThread_curHandlerTable(rSELF)
26222 jr rBIX # nothing to do - jump to real handler
26225 move a0, rPC # arg0
26226 move a1, rFP # arg1
26227 move a2, rSELF # arg2
26228 JAL(dvmCheckBefore)
26231 /* ------------------------------ */
26233 .L_ALT_OP_UNUSED_6BFF: /* 0x16b */
26234 /* File: mips/alt_stub.S */
26236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26237 * any interesting requests and then jump to the real instruction
26238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26241 * bail to the real handler if breakFlags==0.
26243 lbu a3, offThread_breakFlags(rSELF)
26244 la rBIX, dvmAsmInstructionStart + (363 * 128)
26245 lw rIBASE, offThread_curHandlerTable(rSELF)
26247 jr rBIX # nothing to do - jump to real handler
26250 move a0, rPC # arg0
26251 move a1, rFP # arg1
26252 move a2, rSELF # arg2
26253 JAL(dvmCheckBefore)
26256 /* ------------------------------ */
26258 .L_ALT_OP_UNUSED_6CFF: /* 0x16c */
26259 /* File: mips/alt_stub.S */
26261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26262 * any interesting requests and then jump to the real instruction
26263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26266 * bail to the real handler if breakFlags==0.
26268 lbu a3, offThread_breakFlags(rSELF)
26269 la rBIX, dvmAsmInstructionStart + (364 * 128)
26270 lw rIBASE, offThread_curHandlerTable(rSELF)
26272 jr rBIX # nothing to do - jump to real handler
26275 move a0, rPC # arg0
26276 move a1, rFP # arg1
26277 move a2, rSELF # arg2
26278 JAL(dvmCheckBefore)
26281 /* ------------------------------ */
26283 .L_ALT_OP_UNUSED_6DFF: /* 0x16d */
26284 /* File: mips/alt_stub.S */
26286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26287 * any interesting requests and then jump to the real instruction
26288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26291 * bail to the real handler if breakFlags==0.
26293 lbu a3, offThread_breakFlags(rSELF)
26294 la rBIX, dvmAsmInstructionStart + (365 * 128)
26295 lw rIBASE, offThread_curHandlerTable(rSELF)
26297 jr rBIX # nothing to do - jump to real handler
26300 move a0, rPC # arg0
26301 move a1, rFP # arg1
26302 move a2, rSELF # arg2
26303 JAL(dvmCheckBefore)
26306 /* ------------------------------ */
26308 .L_ALT_OP_UNUSED_6EFF: /* 0x16e */
26309 /* File: mips/alt_stub.S */
26311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26312 * any interesting requests and then jump to the real instruction
26313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26316 * bail to the real handler if breakFlags==0.
26318 lbu a3, offThread_breakFlags(rSELF)
26319 la rBIX, dvmAsmInstructionStart + (366 * 128)
26320 lw rIBASE, offThread_curHandlerTable(rSELF)
26322 jr rBIX # nothing to do - jump to real handler
26325 move a0, rPC # arg0
26326 move a1, rFP # arg1
26327 move a2, rSELF # arg2
26328 JAL(dvmCheckBefore)
26331 /* ------------------------------ */
26333 .L_ALT_OP_UNUSED_6FFF: /* 0x16f */
26334 /* File: mips/alt_stub.S */
26336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26337 * any interesting requests and then jump to the real instruction
26338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26341 * bail to the real handler if breakFlags==0.
26343 lbu a3, offThread_breakFlags(rSELF)
26344 la rBIX, dvmAsmInstructionStart + (367 * 128)
26345 lw rIBASE, offThread_curHandlerTable(rSELF)
26347 jr rBIX # nothing to do - jump to real handler
26350 move a0, rPC # arg0
26351 move a1, rFP # arg1
26352 move a2, rSELF # arg2
26353 JAL(dvmCheckBefore)
26356 /* ------------------------------ */
26358 .L_ALT_OP_UNUSED_70FF: /* 0x170 */
26359 /* File: mips/alt_stub.S */
26361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26362 * any interesting requests and then jump to the real instruction
26363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26366 * bail to the real handler if breakFlags==0.
26368 lbu a3, offThread_breakFlags(rSELF)
26369 la rBIX, dvmAsmInstructionStart + (368 * 128)
26370 lw rIBASE, offThread_curHandlerTable(rSELF)
26372 jr rBIX # nothing to do - jump to real handler
26375 move a0, rPC # arg0
26376 move a1, rFP # arg1
26377 move a2, rSELF # arg2
26378 JAL(dvmCheckBefore)
26381 /* ------------------------------ */
26383 .L_ALT_OP_UNUSED_71FF: /* 0x171 */
26384 /* File: mips/alt_stub.S */
26386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26387 * any interesting requests and then jump to the real instruction
26388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26391 * bail to the real handler if breakFlags==0.
26393 lbu a3, offThread_breakFlags(rSELF)
26394 la rBIX, dvmAsmInstructionStart + (369 * 128)
26395 lw rIBASE, offThread_curHandlerTable(rSELF)
26397 jr rBIX # nothing to do - jump to real handler
26400 move a0, rPC # arg0
26401 move a1, rFP # arg1
26402 move a2, rSELF # arg2
26403 JAL(dvmCheckBefore)
26406 /* ------------------------------ */
26408 .L_ALT_OP_UNUSED_72FF: /* 0x172 */
26409 /* File: mips/alt_stub.S */
26411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26412 * any interesting requests and then jump to the real instruction
26413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26416 * bail to the real handler if breakFlags==0.
26418 lbu a3, offThread_breakFlags(rSELF)
26419 la rBIX, dvmAsmInstructionStart + (370 * 128)
26420 lw rIBASE, offThread_curHandlerTable(rSELF)
26422 jr rBIX # nothing to do - jump to real handler
26425 move a0, rPC # arg0
26426 move a1, rFP # arg1
26427 move a2, rSELF # arg2
26428 JAL(dvmCheckBefore)
26431 /* ------------------------------ */
26433 .L_ALT_OP_UNUSED_73FF: /* 0x173 */
26434 /* File: mips/alt_stub.S */
26436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26437 * any interesting requests and then jump to the real instruction
26438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26441 * bail to the real handler if breakFlags==0.
26443 lbu a3, offThread_breakFlags(rSELF)
26444 la rBIX, dvmAsmInstructionStart + (371 * 128)
26445 lw rIBASE, offThread_curHandlerTable(rSELF)
26447 jr rBIX # nothing to do - jump to real handler
26450 move a0, rPC # arg0
26451 move a1, rFP # arg1
26452 move a2, rSELF # arg2
26453 JAL(dvmCheckBefore)
26456 /* ------------------------------ */
26458 .L_ALT_OP_UNUSED_74FF: /* 0x174 */
26459 /* File: mips/alt_stub.S */
26461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26462 * any interesting requests and then jump to the real instruction
26463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26466 * bail to the real handler if breakFlags==0.
26468 lbu a3, offThread_breakFlags(rSELF)
26469 la rBIX, dvmAsmInstructionStart + (372 * 128)
26470 lw rIBASE, offThread_curHandlerTable(rSELF)
26472 jr rBIX # nothing to do - jump to real handler
26475 move a0, rPC # arg0
26476 move a1, rFP # arg1
26477 move a2, rSELF # arg2
26478 JAL(dvmCheckBefore)
26481 /* ------------------------------ */
26483 .L_ALT_OP_UNUSED_75FF: /* 0x175 */
26484 /* File: mips/alt_stub.S */
26486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26487 * any interesting requests and then jump to the real instruction
26488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26491 * bail to the real handler if breakFlags==0.
26493 lbu a3, offThread_breakFlags(rSELF)
26494 la rBIX, dvmAsmInstructionStart + (373 * 128)
26495 lw rIBASE, offThread_curHandlerTable(rSELF)
26497 jr rBIX # nothing to do - jump to real handler
26500 move a0, rPC # arg0
26501 move a1, rFP # arg1
26502 move a2, rSELF # arg2
26503 JAL(dvmCheckBefore)
26506 /* ------------------------------ */
26508 .L_ALT_OP_UNUSED_76FF: /* 0x176 */
26509 /* File: mips/alt_stub.S */
26511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26512 * any interesting requests and then jump to the real instruction
26513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26516 * bail to the real handler if breakFlags==0.
26518 lbu a3, offThread_breakFlags(rSELF)
26519 la rBIX, dvmAsmInstructionStart + (374 * 128)
26520 lw rIBASE, offThread_curHandlerTable(rSELF)
26522 jr rBIX # nothing to do - jump to real handler
26525 move a0, rPC # arg0
26526 move a1, rFP # arg1
26527 move a2, rSELF # arg2
26528 JAL(dvmCheckBefore)
26531 /* ------------------------------ */
26533 .L_ALT_OP_UNUSED_77FF: /* 0x177 */
26534 /* File: mips/alt_stub.S */
26536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26537 * any interesting requests and then jump to the real instruction
26538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26541 * bail to the real handler if breakFlags==0.
26543 lbu a3, offThread_breakFlags(rSELF)
26544 la rBIX, dvmAsmInstructionStart + (375 * 128)
26545 lw rIBASE, offThread_curHandlerTable(rSELF)
26547 jr rBIX # nothing to do - jump to real handler
26550 move a0, rPC # arg0
26551 move a1, rFP # arg1
26552 move a2, rSELF # arg2
26553 JAL(dvmCheckBefore)
26556 /* ------------------------------ */
26558 .L_ALT_OP_UNUSED_78FF: /* 0x178 */
26559 /* File: mips/alt_stub.S */
26561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26562 * any interesting requests and then jump to the real instruction
26563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26566 * bail to the real handler if breakFlags==0.
26568 lbu a3, offThread_breakFlags(rSELF)
26569 la rBIX, dvmAsmInstructionStart + (376 * 128)
26570 lw rIBASE, offThread_curHandlerTable(rSELF)
26572 jr rBIX # nothing to do - jump to real handler
26575 move a0, rPC # arg0
26576 move a1, rFP # arg1
26577 move a2, rSELF # arg2
26578 JAL(dvmCheckBefore)
26581 /* ------------------------------ */
26583 .L_ALT_OP_UNUSED_79FF: /* 0x179 */
26584 /* File: mips/alt_stub.S */
26586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26587 * any interesting requests and then jump to the real instruction
26588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26591 * bail to the real handler if breakFlags==0.
26593 lbu a3, offThread_breakFlags(rSELF)
26594 la rBIX, dvmAsmInstructionStart + (377 * 128)
26595 lw rIBASE, offThread_curHandlerTable(rSELF)
26597 jr rBIX # nothing to do - jump to real handler
26600 move a0, rPC # arg0
26601 move a1, rFP # arg1
26602 move a2, rSELF # arg2
26603 JAL(dvmCheckBefore)
26606 /* ------------------------------ */
26608 .L_ALT_OP_UNUSED_7AFF: /* 0x17a */
26609 /* File: mips/alt_stub.S */
26611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26612 * any interesting requests and then jump to the real instruction
26613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26616 * bail to the real handler if breakFlags==0.
26618 lbu a3, offThread_breakFlags(rSELF)
26619 la rBIX, dvmAsmInstructionStart + (378 * 128)
26620 lw rIBASE, offThread_curHandlerTable(rSELF)
26622 jr rBIX # nothing to do - jump to real handler
26625 move a0, rPC # arg0
26626 move a1, rFP # arg1
26627 move a2, rSELF # arg2
26628 JAL(dvmCheckBefore)
26631 /* ------------------------------ */
26633 .L_ALT_OP_UNUSED_7BFF: /* 0x17b */
26634 /* File: mips/alt_stub.S */
26636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26637 * any interesting requests and then jump to the real instruction
26638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26641 * bail to the real handler if breakFlags==0.
26643 lbu a3, offThread_breakFlags(rSELF)
26644 la rBIX, dvmAsmInstructionStart + (379 * 128)
26645 lw rIBASE, offThread_curHandlerTable(rSELF)
26647 jr rBIX # nothing to do - jump to real handler
26650 move a0, rPC # arg0
26651 move a1, rFP # arg1
26652 move a2, rSELF # arg2
26653 JAL(dvmCheckBefore)
26656 /* ------------------------------ */
26658 .L_ALT_OP_UNUSED_7CFF: /* 0x17c */
26659 /* File: mips/alt_stub.S */
26661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26662 * any interesting requests and then jump to the real instruction
26663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26666 * bail to the real handler if breakFlags==0.
26668 lbu a3, offThread_breakFlags(rSELF)
26669 la rBIX, dvmAsmInstructionStart + (380 * 128)
26670 lw rIBASE, offThread_curHandlerTable(rSELF)
26672 jr rBIX # nothing to do - jump to real handler
26675 move a0, rPC # arg0
26676 move a1, rFP # arg1
26677 move a2, rSELF # arg2
26678 JAL(dvmCheckBefore)
26681 /* ------------------------------ */
26683 .L_ALT_OP_UNUSED_7DFF: /* 0x17d */
26684 /* File: mips/alt_stub.S */
26686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26687 * any interesting requests and then jump to the real instruction
26688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26691 * bail to the real handler if breakFlags==0.
26693 lbu a3, offThread_breakFlags(rSELF)
26694 la rBIX, dvmAsmInstructionStart + (381 * 128)
26695 lw rIBASE, offThread_curHandlerTable(rSELF)
26697 jr rBIX # nothing to do - jump to real handler
26700 move a0, rPC # arg0
26701 move a1, rFP # arg1
26702 move a2, rSELF # arg2
26703 JAL(dvmCheckBefore)
26706 /* ------------------------------ */
26708 .L_ALT_OP_UNUSED_7EFF: /* 0x17e */
26709 /* File: mips/alt_stub.S */
26711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26712 * any interesting requests and then jump to the real instruction
26713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26716 * bail to the real handler if breakFlags==0.
26718 lbu a3, offThread_breakFlags(rSELF)
26719 la rBIX, dvmAsmInstructionStart + (382 * 128)
26720 lw rIBASE, offThread_curHandlerTable(rSELF)
26722 jr rBIX # nothing to do - jump to real handler
26725 move a0, rPC # arg0
26726 move a1, rFP # arg1
26727 move a2, rSELF # arg2
26728 JAL(dvmCheckBefore)
26731 /* ------------------------------ */
26733 .L_ALT_OP_UNUSED_7FFF: /* 0x17f */
26734 /* File: mips/alt_stub.S */
26736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26737 * any interesting requests and then jump to the real instruction
26738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26741 * bail to the real handler if breakFlags==0.
26743 lbu a3, offThread_breakFlags(rSELF)
26744 la rBIX, dvmAsmInstructionStart + (383 * 128)
26745 lw rIBASE, offThread_curHandlerTable(rSELF)
26747 jr rBIX # nothing to do - jump to real handler
26750 move a0, rPC # arg0
26751 move a1, rFP # arg1
26752 move a2, rSELF # arg2
26753 JAL(dvmCheckBefore)
26756 /* ------------------------------ */
26758 .L_ALT_OP_UNUSED_80FF: /* 0x180 */
26759 /* File: mips/alt_stub.S */
26761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26762 * any interesting requests and then jump to the real instruction
26763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26766 * bail to the real handler if breakFlags==0.
26768 lbu a3, offThread_breakFlags(rSELF)
26769 la rBIX, dvmAsmInstructionStart + (384 * 128)
26770 lw rIBASE, offThread_curHandlerTable(rSELF)
26772 jr rBIX # nothing to do - jump to real handler
26775 move a0, rPC # arg0
26776 move a1, rFP # arg1
26777 move a2, rSELF # arg2
26778 JAL(dvmCheckBefore)
26781 /* ------------------------------ */
26783 .L_ALT_OP_UNUSED_81FF: /* 0x181 */
26784 /* File: mips/alt_stub.S */
26786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26787 * any interesting requests and then jump to the real instruction
26788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26791 * bail to the real handler if breakFlags==0.
26793 lbu a3, offThread_breakFlags(rSELF)
26794 la rBIX, dvmAsmInstructionStart + (385 * 128)
26795 lw rIBASE, offThread_curHandlerTable(rSELF)
26797 jr rBIX # nothing to do - jump to real handler
26800 move a0, rPC # arg0
26801 move a1, rFP # arg1
26802 move a2, rSELF # arg2
26803 JAL(dvmCheckBefore)
26806 /* ------------------------------ */
26808 .L_ALT_OP_UNUSED_82FF: /* 0x182 */
26809 /* File: mips/alt_stub.S */
26811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26812 * any interesting requests and then jump to the real instruction
26813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26816 * bail to the real handler if breakFlags==0.
26818 lbu a3, offThread_breakFlags(rSELF)
26819 la rBIX, dvmAsmInstructionStart + (386 * 128)
26820 lw rIBASE, offThread_curHandlerTable(rSELF)
26822 jr rBIX # nothing to do - jump to real handler
26825 move a0, rPC # arg0
26826 move a1, rFP # arg1
26827 move a2, rSELF # arg2
26828 JAL(dvmCheckBefore)
26831 /* ------------------------------ */
26833 .L_ALT_OP_UNUSED_83FF: /* 0x183 */
26834 /* File: mips/alt_stub.S */
26836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26837 * any interesting requests and then jump to the real instruction
26838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26841 * bail to the real handler if breakFlags==0.
26843 lbu a3, offThread_breakFlags(rSELF)
26844 la rBIX, dvmAsmInstructionStart + (387 * 128)
26845 lw rIBASE, offThread_curHandlerTable(rSELF)
26847 jr rBIX # nothing to do - jump to real handler
26850 move a0, rPC # arg0
26851 move a1, rFP # arg1
26852 move a2, rSELF # arg2
26853 JAL(dvmCheckBefore)
26856 /* ------------------------------ */
26858 .L_ALT_OP_UNUSED_84FF: /* 0x184 */
26859 /* File: mips/alt_stub.S */
26861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26862 * any interesting requests and then jump to the real instruction
26863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26866 * bail to the real handler if breakFlags==0.
26868 lbu a3, offThread_breakFlags(rSELF)
26869 la rBIX, dvmAsmInstructionStart + (388 * 128)
26870 lw rIBASE, offThread_curHandlerTable(rSELF)
26872 jr rBIX # nothing to do - jump to real handler
26875 move a0, rPC # arg0
26876 move a1, rFP # arg1
26877 move a2, rSELF # arg2
26878 JAL(dvmCheckBefore)
26881 /* ------------------------------ */
26883 .L_ALT_OP_UNUSED_85FF: /* 0x185 */
26884 /* File: mips/alt_stub.S */
26886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26887 * any interesting requests and then jump to the real instruction
26888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26891 * bail to the real handler if breakFlags==0.
26893 lbu a3, offThread_breakFlags(rSELF)
26894 la rBIX, dvmAsmInstructionStart + (389 * 128)
26895 lw rIBASE, offThread_curHandlerTable(rSELF)
26897 jr rBIX # nothing to do - jump to real handler
26900 move a0, rPC # arg0
26901 move a1, rFP # arg1
26902 move a2, rSELF # arg2
26903 JAL(dvmCheckBefore)
26906 /* ------------------------------ */
26908 .L_ALT_OP_UNUSED_86FF: /* 0x186 */
26909 /* File: mips/alt_stub.S */
26911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26912 * any interesting requests and then jump to the real instruction
26913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26916 * bail to the real handler if breakFlags==0.
26918 lbu a3, offThread_breakFlags(rSELF)
26919 la rBIX, dvmAsmInstructionStart + (390 * 128)
26920 lw rIBASE, offThread_curHandlerTable(rSELF)
26922 jr rBIX # nothing to do - jump to real handler
26925 move a0, rPC # arg0
26926 move a1, rFP # arg1
26927 move a2, rSELF # arg2
26928 JAL(dvmCheckBefore)
26931 /* ------------------------------ */
26933 .L_ALT_OP_UNUSED_87FF: /* 0x187 */
26934 /* File: mips/alt_stub.S */
26936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26937 * any interesting requests and then jump to the real instruction
26938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26941 * bail to the real handler if breakFlags==0.
26943 lbu a3, offThread_breakFlags(rSELF)
26944 la rBIX, dvmAsmInstructionStart + (391 * 128)
26945 lw rIBASE, offThread_curHandlerTable(rSELF)
26947 jr rBIX # nothing to do - jump to real handler
26950 move a0, rPC # arg0
26951 move a1, rFP # arg1
26952 move a2, rSELF # arg2
26953 JAL(dvmCheckBefore)
26956 /* ------------------------------ */
26958 .L_ALT_OP_UNUSED_88FF: /* 0x188 */
26959 /* File: mips/alt_stub.S */
26961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26962 * any interesting requests and then jump to the real instruction
26963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26966 * bail to the real handler if breakFlags==0.
26968 lbu a3, offThread_breakFlags(rSELF)
26969 la rBIX, dvmAsmInstructionStart + (392 * 128)
26970 lw rIBASE, offThread_curHandlerTable(rSELF)
26972 jr rBIX # nothing to do - jump to real handler
26975 move a0, rPC # arg0
26976 move a1, rFP # arg1
26977 move a2, rSELF # arg2
26978 JAL(dvmCheckBefore)
26981 /* ------------------------------ */
26983 .L_ALT_OP_UNUSED_89FF: /* 0x189 */
26984 /* File: mips/alt_stub.S */
26986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
26987 * any interesting requests and then jump to the real instruction
26988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
26989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
26990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
26991 * bail to the real handler if breakFlags==0.
26993 lbu a3, offThread_breakFlags(rSELF)
26994 la rBIX, dvmAsmInstructionStart + (393 * 128)
26995 lw rIBASE, offThread_curHandlerTable(rSELF)
26997 jr rBIX # nothing to do - jump to real handler
27000 move a0, rPC # arg0
27001 move a1, rFP # arg1
27002 move a2, rSELF # arg2
27003 JAL(dvmCheckBefore)
27006 /* ------------------------------ */
27008 .L_ALT_OP_UNUSED_8AFF: /* 0x18a */
27009 /* File: mips/alt_stub.S */
27011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27012 * any interesting requests and then jump to the real instruction
27013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27016 * bail to the real handler if breakFlags==0.
27018 lbu a3, offThread_breakFlags(rSELF)
27019 la rBIX, dvmAsmInstructionStart + (394 * 128)
27020 lw rIBASE, offThread_curHandlerTable(rSELF)
27022 jr rBIX # nothing to do - jump to real handler
27025 move a0, rPC # arg0
27026 move a1, rFP # arg1
27027 move a2, rSELF # arg2
27028 JAL(dvmCheckBefore)
27031 /* ------------------------------ */
27033 .L_ALT_OP_UNUSED_8BFF: /* 0x18b */
27034 /* File: mips/alt_stub.S */
27036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27037 * any interesting requests and then jump to the real instruction
27038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27041 * bail to the real handler if breakFlags==0.
27043 lbu a3, offThread_breakFlags(rSELF)
27044 la rBIX, dvmAsmInstructionStart + (395 * 128)
27045 lw rIBASE, offThread_curHandlerTable(rSELF)
27047 jr rBIX # nothing to do - jump to real handler
27050 move a0, rPC # arg0
27051 move a1, rFP # arg1
27052 move a2, rSELF # arg2
27053 JAL(dvmCheckBefore)
27056 /* ------------------------------ */
27058 .L_ALT_OP_UNUSED_8CFF: /* 0x18c */
27059 /* File: mips/alt_stub.S */
27061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27062 * any interesting requests and then jump to the real instruction
27063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27066 * bail to the real handler if breakFlags==0.
27068 lbu a3, offThread_breakFlags(rSELF)
27069 la rBIX, dvmAsmInstructionStart + (396 * 128)
27070 lw rIBASE, offThread_curHandlerTable(rSELF)
27072 jr rBIX # nothing to do - jump to real handler
27075 move a0, rPC # arg0
27076 move a1, rFP # arg1
27077 move a2, rSELF # arg2
27078 JAL(dvmCheckBefore)
27081 /* ------------------------------ */
27083 .L_ALT_OP_UNUSED_8DFF: /* 0x18d */
27084 /* File: mips/alt_stub.S */
27086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27087 * any interesting requests and then jump to the real instruction
27088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27091 * bail to the real handler if breakFlags==0.
27093 lbu a3, offThread_breakFlags(rSELF)
27094 la rBIX, dvmAsmInstructionStart + (397 * 128)
27095 lw rIBASE, offThread_curHandlerTable(rSELF)
27097 jr rBIX # nothing to do - jump to real handler
27100 move a0, rPC # arg0
27101 move a1, rFP # arg1
27102 move a2, rSELF # arg2
27103 JAL(dvmCheckBefore)
27106 /* ------------------------------ */
27108 .L_ALT_OP_UNUSED_8EFF: /* 0x18e */
27109 /* File: mips/alt_stub.S */
27111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27112 * any interesting requests and then jump to the real instruction
27113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27116 * bail to the real handler if breakFlags==0.
27118 lbu a3, offThread_breakFlags(rSELF)
27119 la rBIX, dvmAsmInstructionStart + (398 * 128)
27120 lw rIBASE, offThread_curHandlerTable(rSELF)
27122 jr rBIX # nothing to do - jump to real handler
27125 move a0, rPC # arg0
27126 move a1, rFP # arg1
27127 move a2, rSELF # arg2
27128 JAL(dvmCheckBefore)
27131 /* ------------------------------ */
27133 .L_ALT_OP_UNUSED_8FFF: /* 0x18f */
27134 /* File: mips/alt_stub.S */
27136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27137 * any interesting requests and then jump to the real instruction
27138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27141 * bail to the real handler if breakFlags==0.
27143 lbu a3, offThread_breakFlags(rSELF)
27144 la rBIX, dvmAsmInstructionStart + (399 * 128)
27145 lw rIBASE, offThread_curHandlerTable(rSELF)
27147 jr rBIX # nothing to do - jump to real handler
27150 move a0, rPC # arg0
27151 move a1, rFP # arg1
27152 move a2, rSELF # arg2
27153 JAL(dvmCheckBefore)
27156 /* ------------------------------ */
27158 .L_ALT_OP_UNUSED_90FF: /* 0x190 */
27159 /* File: mips/alt_stub.S */
27161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27162 * any interesting requests and then jump to the real instruction
27163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27166 * bail to the real handler if breakFlags==0.
27168 lbu a3, offThread_breakFlags(rSELF)
27169 la rBIX, dvmAsmInstructionStart + (400 * 128)
27170 lw rIBASE, offThread_curHandlerTable(rSELF)
27172 jr rBIX # nothing to do - jump to real handler
27175 move a0, rPC # arg0
27176 move a1, rFP # arg1
27177 move a2, rSELF # arg2
27178 JAL(dvmCheckBefore)
27181 /* ------------------------------ */
27183 .L_ALT_OP_UNUSED_91FF: /* 0x191 */
27184 /* File: mips/alt_stub.S */
27186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27187 * any interesting requests and then jump to the real instruction
27188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27191 * bail to the real handler if breakFlags==0.
27193 lbu a3, offThread_breakFlags(rSELF)
27194 la rBIX, dvmAsmInstructionStart + (401 * 128)
27195 lw rIBASE, offThread_curHandlerTable(rSELF)
27197 jr rBIX # nothing to do - jump to real handler
27200 move a0, rPC # arg0
27201 move a1, rFP # arg1
27202 move a2, rSELF # arg2
27203 JAL(dvmCheckBefore)
27206 /* ------------------------------ */
27208 .L_ALT_OP_UNUSED_92FF: /* 0x192 */
27209 /* File: mips/alt_stub.S */
27211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27212 * any interesting requests and then jump to the real instruction
27213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27216 * bail to the real handler if breakFlags==0.
27218 lbu a3, offThread_breakFlags(rSELF)
27219 la rBIX, dvmAsmInstructionStart + (402 * 128)
27220 lw rIBASE, offThread_curHandlerTable(rSELF)
27222 jr rBIX # nothing to do - jump to real handler
27225 move a0, rPC # arg0
27226 move a1, rFP # arg1
27227 move a2, rSELF # arg2
27228 JAL(dvmCheckBefore)
27231 /* ------------------------------ */
27233 .L_ALT_OP_UNUSED_93FF: /* 0x193 */
27234 /* File: mips/alt_stub.S */
27236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27237 * any interesting requests and then jump to the real instruction
27238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27241 * bail to the real handler if breakFlags==0.
27243 lbu a3, offThread_breakFlags(rSELF)
27244 la rBIX, dvmAsmInstructionStart + (403 * 128)
27245 lw rIBASE, offThread_curHandlerTable(rSELF)
27247 jr rBIX # nothing to do - jump to real handler
27250 move a0, rPC # arg0
27251 move a1, rFP # arg1
27252 move a2, rSELF # arg2
27253 JAL(dvmCheckBefore)
27256 /* ------------------------------ */
27258 .L_ALT_OP_UNUSED_94FF: /* 0x194 */
27259 /* File: mips/alt_stub.S */
27261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27262 * any interesting requests and then jump to the real instruction
27263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27266 * bail to the real handler if breakFlags==0.
27268 lbu a3, offThread_breakFlags(rSELF)
27269 la rBIX, dvmAsmInstructionStart + (404 * 128)
27270 lw rIBASE, offThread_curHandlerTable(rSELF)
27272 jr rBIX # nothing to do - jump to real handler
27275 move a0, rPC # arg0
27276 move a1, rFP # arg1
27277 move a2, rSELF # arg2
27278 JAL(dvmCheckBefore)
27281 /* ------------------------------ */
27283 .L_ALT_OP_UNUSED_95FF: /* 0x195 */
27284 /* File: mips/alt_stub.S */
27286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27287 * any interesting requests and then jump to the real instruction
27288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27291 * bail to the real handler if breakFlags==0.
27293 lbu a3, offThread_breakFlags(rSELF)
27294 la rBIX, dvmAsmInstructionStart + (405 * 128)
27295 lw rIBASE, offThread_curHandlerTable(rSELF)
27297 jr rBIX # nothing to do - jump to real handler
27300 move a0, rPC # arg0
27301 move a1, rFP # arg1
27302 move a2, rSELF # arg2
27303 JAL(dvmCheckBefore)
27306 /* ------------------------------ */
27308 .L_ALT_OP_UNUSED_96FF: /* 0x196 */
27309 /* File: mips/alt_stub.S */
27311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27312 * any interesting requests and then jump to the real instruction
27313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27316 * bail to the real handler if breakFlags==0.
27318 lbu a3, offThread_breakFlags(rSELF)
27319 la rBIX, dvmAsmInstructionStart + (406 * 128)
27320 lw rIBASE, offThread_curHandlerTable(rSELF)
27322 jr rBIX # nothing to do - jump to real handler
27325 move a0, rPC # arg0
27326 move a1, rFP # arg1
27327 move a2, rSELF # arg2
27328 JAL(dvmCheckBefore)
27331 /* ------------------------------ */
27333 .L_ALT_OP_UNUSED_97FF: /* 0x197 */
27334 /* File: mips/alt_stub.S */
27336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27337 * any interesting requests and then jump to the real instruction
27338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27341 * bail to the real handler if breakFlags==0.
27343 lbu a3, offThread_breakFlags(rSELF)
27344 la rBIX, dvmAsmInstructionStart + (407 * 128)
27345 lw rIBASE, offThread_curHandlerTable(rSELF)
27347 jr rBIX # nothing to do - jump to real handler
27350 move a0, rPC # arg0
27351 move a1, rFP # arg1
27352 move a2, rSELF # arg2
27353 JAL(dvmCheckBefore)
27356 /* ------------------------------ */
27358 .L_ALT_OP_UNUSED_98FF: /* 0x198 */
27359 /* File: mips/alt_stub.S */
27361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27362 * any interesting requests and then jump to the real instruction
27363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27366 * bail to the real handler if breakFlags==0.
27368 lbu a3, offThread_breakFlags(rSELF)
27369 la rBIX, dvmAsmInstructionStart + (408 * 128)
27370 lw rIBASE, offThread_curHandlerTable(rSELF)
27372 jr rBIX # nothing to do - jump to real handler
27375 move a0, rPC # arg0
27376 move a1, rFP # arg1
27377 move a2, rSELF # arg2
27378 JAL(dvmCheckBefore)
27381 /* ------------------------------ */
27383 .L_ALT_OP_UNUSED_99FF: /* 0x199 */
27384 /* File: mips/alt_stub.S */
27386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27387 * any interesting requests and then jump to the real instruction
27388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27391 * bail to the real handler if breakFlags==0.
27393 lbu a3, offThread_breakFlags(rSELF)
27394 la rBIX, dvmAsmInstructionStart + (409 * 128)
27395 lw rIBASE, offThread_curHandlerTable(rSELF)
27397 jr rBIX # nothing to do - jump to real handler
27400 move a0, rPC # arg0
27401 move a1, rFP # arg1
27402 move a2, rSELF # arg2
27403 JAL(dvmCheckBefore)
27406 /* ------------------------------ */
27408 .L_ALT_OP_UNUSED_9AFF: /* 0x19a */
27409 /* File: mips/alt_stub.S */
27411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27412 * any interesting requests and then jump to the real instruction
27413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27416 * bail to the real handler if breakFlags==0.
27418 lbu a3, offThread_breakFlags(rSELF)
27419 la rBIX, dvmAsmInstructionStart + (410 * 128)
27420 lw rIBASE, offThread_curHandlerTable(rSELF)
27422 jr rBIX # nothing to do - jump to real handler
27425 move a0, rPC # arg0
27426 move a1, rFP # arg1
27427 move a2, rSELF # arg2
27428 JAL(dvmCheckBefore)
27431 /* ------------------------------ */
27433 .L_ALT_OP_UNUSED_9BFF: /* 0x19b */
27434 /* File: mips/alt_stub.S */
27436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27437 * any interesting requests and then jump to the real instruction
27438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27441 * bail to the real handler if breakFlags==0.
27443 lbu a3, offThread_breakFlags(rSELF)
27444 la rBIX, dvmAsmInstructionStart + (411 * 128)
27445 lw rIBASE, offThread_curHandlerTable(rSELF)
27447 jr rBIX # nothing to do - jump to real handler
27450 move a0, rPC # arg0
27451 move a1, rFP # arg1
27452 move a2, rSELF # arg2
27453 JAL(dvmCheckBefore)
27456 /* ------------------------------ */
27458 .L_ALT_OP_UNUSED_9CFF: /* 0x19c */
27459 /* File: mips/alt_stub.S */
27461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27462 * any interesting requests and then jump to the real instruction
27463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27466 * bail to the real handler if breakFlags==0.
27468 lbu a3, offThread_breakFlags(rSELF)
27469 la rBIX, dvmAsmInstructionStart + (412 * 128)
27470 lw rIBASE, offThread_curHandlerTable(rSELF)
27472 jr rBIX # nothing to do - jump to real handler
27475 move a0, rPC # arg0
27476 move a1, rFP # arg1
27477 move a2, rSELF # arg2
27478 JAL(dvmCheckBefore)
27481 /* ------------------------------ */
27483 .L_ALT_OP_UNUSED_9DFF: /* 0x19d */
27484 /* File: mips/alt_stub.S */
27486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27487 * any interesting requests and then jump to the real instruction
27488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27491 * bail to the real handler if breakFlags==0.
27493 lbu a3, offThread_breakFlags(rSELF)
27494 la rBIX, dvmAsmInstructionStart + (413 * 128)
27495 lw rIBASE, offThread_curHandlerTable(rSELF)
27497 jr rBIX # nothing to do - jump to real handler
27500 move a0, rPC # arg0
27501 move a1, rFP # arg1
27502 move a2, rSELF # arg2
27503 JAL(dvmCheckBefore)
27506 /* ------------------------------ */
27508 .L_ALT_OP_UNUSED_9EFF: /* 0x19e */
27509 /* File: mips/alt_stub.S */
27511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27512 * any interesting requests and then jump to the real instruction
27513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27516 * bail to the real handler if breakFlags==0.
27518 lbu a3, offThread_breakFlags(rSELF)
27519 la rBIX, dvmAsmInstructionStart + (414 * 128)
27520 lw rIBASE, offThread_curHandlerTable(rSELF)
27522 jr rBIX # nothing to do - jump to real handler
27525 move a0, rPC # arg0
27526 move a1, rFP # arg1
27527 move a2, rSELF # arg2
27528 JAL(dvmCheckBefore)
27531 /* ------------------------------ */
27533 .L_ALT_OP_UNUSED_9FFF: /* 0x19f */
27534 /* File: mips/alt_stub.S */
27536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27537 * any interesting requests and then jump to the real instruction
27538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27541 * bail to the real handler if breakFlags==0.
27543 lbu a3, offThread_breakFlags(rSELF)
27544 la rBIX, dvmAsmInstructionStart + (415 * 128)
27545 lw rIBASE, offThread_curHandlerTable(rSELF)
27547 jr rBIX # nothing to do - jump to real handler
27550 move a0, rPC # arg0
27551 move a1, rFP # arg1
27552 move a2, rSELF # arg2
27553 JAL(dvmCheckBefore)
27556 /* ------------------------------ */
27558 .L_ALT_OP_UNUSED_A0FF: /* 0x1a0 */
27559 /* File: mips/alt_stub.S */
27561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27562 * any interesting requests and then jump to the real instruction
27563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27566 * bail to the real handler if breakFlags==0.
27568 lbu a3, offThread_breakFlags(rSELF)
27569 la rBIX, dvmAsmInstructionStart + (416 * 128)
27570 lw rIBASE, offThread_curHandlerTable(rSELF)
27572 jr rBIX # nothing to do - jump to real handler
27575 move a0, rPC # arg0
27576 move a1, rFP # arg1
27577 move a2, rSELF # arg2
27578 JAL(dvmCheckBefore)
27581 /* ------------------------------ */
27583 .L_ALT_OP_UNUSED_A1FF: /* 0x1a1 */
27584 /* File: mips/alt_stub.S */
27586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27587 * any interesting requests and then jump to the real instruction
27588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27591 * bail to the real handler if breakFlags==0.
27593 lbu a3, offThread_breakFlags(rSELF)
27594 la rBIX, dvmAsmInstructionStart + (417 * 128)
27595 lw rIBASE, offThread_curHandlerTable(rSELF)
27597 jr rBIX # nothing to do - jump to real handler
27600 move a0, rPC # arg0
27601 move a1, rFP # arg1
27602 move a2, rSELF # arg2
27603 JAL(dvmCheckBefore)
27606 /* ------------------------------ */
27608 .L_ALT_OP_UNUSED_A2FF: /* 0x1a2 */
27609 /* File: mips/alt_stub.S */
27611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27612 * any interesting requests and then jump to the real instruction
27613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27616 * bail to the real handler if breakFlags==0.
27618 lbu a3, offThread_breakFlags(rSELF)
27619 la rBIX, dvmAsmInstructionStart + (418 * 128)
27620 lw rIBASE, offThread_curHandlerTable(rSELF)
27622 jr rBIX # nothing to do - jump to real handler
27625 move a0, rPC # arg0
27626 move a1, rFP # arg1
27627 move a2, rSELF # arg2
27628 JAL(dvmCheckBefore)
27631 /* ------------------------------ */
27633 .L_ALT_OP_UNUSED_A3FF: /* 0x1a3 */
27634 /* File: mips/alt_stub.S */
27636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27637 * any interesting requests and then jump to the real instruction
27638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27641 * bail to the real handler if breakFlags==0.
27643 lbu a3, offThread_breakFlags(rSELF)
27644 la rBIX, dvmAsmInstructionStart + (419 * 128)
27645 lw rIBASE, offThread_curHandlerTable(rSELF)
27647 jr rBIX # nothing to do - jump to real handler
27650 move a0, rPC # arg0
27651 move a1, rFP # arg1
27652 move a2, rSELF # arg2
27653 JAL(dvmCheckBefore)
27656 /* ------------------------------ */
27658 .L_ALT_OP_UNUSED_A4FF: /* 0x1a4 */
27659 /* File: mips/alt_stub.S */
27661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27662 * any interesting requests and then jump to the real instruction
27663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27666 * bail to the real handler if breakFlags==0.
27668 lbu a3, offThread_breakFlags(rSELF)
27669 la rBIX, dvmAsmInstructionStart + (420 * 128)
27670 lw rIBASE, offThread_curHandlerTable(rSELF)
27672 jr rBIX # nothing to do - jump to real handler
27675 move a0, rPC # arg0
27676 move a1, rFP # arg1
27677 move a2, rSELF # arg2
27678 JAL(dvmCheckBefore)
27681 /* ------------------------------ */
27683 .L_ALT_OP_UNUSED_A5FF: /* 0x1a5 */
27684 /* File: mips/alt_stub.S */
27686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27687 * any interesting requests and then jump to the real instruction
27688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27691 * bail to the real handler if breakFlags==0.
27693 lbu a3, offThread_breakFlags(rSELF)
27694 la rBIX, dvmAsmInstructionStart + (421 * 128)
27695 lw rIBASE, offThread_curHandlerTable(rSELF)
27697 jr rBIX # nothing to do - jump to real handler
27700 move a0, rPC # arg0
27701 move a1, rFP # arg1
27702 move a2, rSELF # arg2
27703 JAL(dvmCheckBefore)
27706 /* ------------------------------ */
27708 .L_ALT_OP_UNUSED_A6FF: /* 0x1a6 */
27709 /* File: mips/alt_stub.S */
27711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27712 * any interesting requests and then jump to the real instruction
27713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27716 * bail to the real handler if breakFlags==0.
27718 lbu a3, offThread_breakFlags(rSELF)
27719 la rBIX, dvmAsmInstructionStart + (422 * 128)
27720 lw rIBASE, offThread_curHandlerTable(rSELF)
27722 jr rBIX # nothing to do - jump to real handler
27725 move a0, rPC # arg0
27726 move a1, rFP # arg1
27727 move a2, rSELF # arg2
27728 JAL(dvmCheckBefore)
27731 /* ------------------------------ */
27733 .L_ALT_OP_UNUSED_A7FF: /* 0x1a7 */
27734 /* File: mips/alt_stub.S */
27736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27737 * any interesting requests and then jump to the real instruction
27738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27741 * bail to the real handler if breakFlags==0.
27743 lbu a3, offThread_breakFlags(rSELF)
27744 la rBIX, dvmAsmInstructionStart + (423 * 128)
27745 lw rIBASE, offThread_curHandlerTable(rSELF)
27747 jr rBIX # nothing to do - jump to real handler
27750 move a0, rPC # arg0
27751 move a1, rFP # arg1
27752 move a2, rSELF # arg2
27753 JAL(dvmCheckBefore)
27756 /* ------------------------------ */
27758 .L_ALT_OP_UNUSED_A8FF: /* 0x1a8 */
27759 /* File: mips/alt_stub.S */
27761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27762 * any interesting requests and then jump to the real instruction
27763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27766 * bail to the real handler if breakFlags==0.
27768 lbu a3, offThread_breakFlags(rSELF)
27769 la rBIX, dvmAsmInstructionStart + (424 * 128)
27770 lw rIBASE, offThread_curHandlerTable(rSELF)
27772 jr rBIX # nothing to do - jump to real handler
27775 move a0, rPC # arg0
27776 move a1, rFP # arg1
27777 move a2, rSELF # arg2
27778 JAL(dvmCheckBefore)
27781 /* ------------------------------ */
27783 .L_ALT_OP_UNUSED_A9FF: /* 0x1a9 */
27784 /* File: mips/alt_stub.S */
27786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27787 * any interesting requests and then jump to the real instruction
27788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27791 * bail to the real handler if breakFlags==0.
27793 lbu a3, offThread_breakFlags(rSELF)
27794 la rBIX, dvmAsmInstructionStart + (425 * 128)
27795 lw rIBASE, offThread_curHandlerTable(rSELF)
27797 jr rBIX # nothing to do - jump to real handler
27800 move a0, rPC # arg0
27801 move a1, rFP # arg1
27802 move a2, rSELF # arg2
27803 JAL(dvmCheckBefore)
27806 /* ------------------------------ */
27808 .L_ALT_OP_UNUSED_AAFF: /* 0x1aa */
27809 /* File: mips/alt_stub.S */
27811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27812 * any interesting requests and then jump to the real instruction
27813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27816 * bail to the real handler if breakFlags==0.
27818 lbu a3, offThread_breakFlags(rSELF)
27819 la rBIX, dvmAsmInstructionStart + (426 * 128)
27820 lw rIBASE, offThread_curHandlerTable(rSELF)
27822 jr rBIX # nothing to do - jump to real handler
27825 move a0, rPC # arg0
27826 move a1, rFP # arg1
27827 move a2, rSELF # arg2
27828 JAL(dvmCheckBefore)
27831 /* ------------------------------ */
27833 .L_ALT_OP_UNUSED_ABFF: /* 0x1ab */
27834 /* File: mips/alt_stub.S */
27836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27837 * any interesting requests and then jump to the real instruction
27838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27841 * bail to the real handler if breakFlags==0.
27843 lbu a3, offThread_breakFlags(rSELF)
27844 la rBIX, dvmAsmInstructionStart + (427 * 128)
27845 lw rIBASE, offThread_curHandlerTable(rSELF)
27847 jr rBIX # nothing to do - jump to real handler
27850 move a0, rPC # arg0
27851 move a1, rFP # arg1
27852 move a2, rSELF # arg2
27853 JAL(dvmCheckBefore)
27856 /* ------------------------------ */
27858 .L_ALT_OP_UNUSED_ACFF: /* 0x1ac */
27859 /* File: mips/alt_stub.S */
27861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27862 * any interesting requests and then jump to the real instruction
27863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27866 * bail to the real handler if breakFlags==0.
27868 lbu a3, offThread_breakFlags(rSELF)
27869 la rBIX, dvmAsmInstructionStart + (428 * 128)
27870 lw rIBASE, offThread_curHandlerTable(rSELF)
27872 jr rBIX # nothing to do - jump to real handler
27875 move a0, rPC # arg0
27876 move a1, rFP # arg1
27877 move a2, rSELF # arg2
27878 JAL(dvmCheckBefore)
27881 /* ------------------------------ */
27883 .L_ALT_OP_UNUSED_ADFF: /* 0x1ad */
27884 /* File: mips/alt_stub.S */
27886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27887 * any interesting requests and then jump to the real instruction
27888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27891 * bail to the real handler if breakFlags==0.
27893 lbu a3, offThread_breakFlags(rSELF)
27894 la rBIX, dvmAsmInstructionStart + (429 * 128)
27895 lw rIBASE, offThread_curHandlerTable(rSELF)
27897 jr rBIX # nothing to do - jump to real handler
27900 move a0, rPC # arg0
27901 move a1, rFP # arg1
27902 move a2, rSELF # arg2
27903 JAL(dvmCheckBefore)
27906 /* ------------------------------ */
27908 .L_ALT_OP_UNUSED_AEFF: /* 0x1ae */
27909 /* File: mips/alt_stub.S */
27911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27912 * any interesting requests and then jump to the real instruction
27913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27916 * bail to the real handler if breakFlags==0.
27918 lbu a3, offThread_breakFlags(rSELF)
27919 la rBIX, dvmAsmInstructionStart + (430 * 128)
27920 lw rIBASE, offThread_curHandlerTable(rSELF)
27922 jr rBIX # nothing to do - jump to real handler
27925 move a0, rPC # arg0
27926 move a1, rFP # arg1
27927 move a2, rSELF # arg2
27928 JAL(dvmCheckBefore)
27931 /* ------------------------------ */
27933 .L_ALT_OP_UNUSED_AFFF: /* 0x1af */
27934 /* File: mips/alt_stub.S */
27936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27937 * any interesting requests and then jump to the real instruction
27938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27941 * bail to the real handler if breakFlags==0.
27943 lbu a3, offThread_breakFlags(rSELF)
27944 la rBIX, dvmAsmInstructionStart + (431 * 128)
27945 lw rIBASE, offThread_curHandlerTable(rSELF)
27947 jr rBIX # nothing to do - jump to real handler
27950 move a0, rPC # arg0
27951 move a1, rFP # arg1
27952 move a2, rSELF # arg2
27953 JAL(dvmCheckBefore)
27956 /* ------------------------------ */
27958 .L_ALT_OP_UNUSED_B0FF: /* 0x1b0 */
27959 /* File: mips/alt_stub.S */
27961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27962 * any interesting requests and then jump to the real instruction
27963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27966 * bail to the real handler if breakFlags==0.
27968 lbu a3, offThread_breakFlags(rSELF)
27969 la rBIX, dvmAsmInstructionStart + (432 * 128)
27970 lw rIBASE, offThread_curHandlerTable(rSELF)
27972 jr rBIX # nothing to do - jump to real handler
27975 move a0, rPC # arg0
27976 move a1, rFP # arg1
27977 move a2, rSELF # arg2
27978 JAL(dvmCheckBefore)
27981 /* ------------------------------ */
27983 .L_ALT_OP_UNUSED_B1FF: /* 0x1b1 */
27984 /* File: mips/alt_stub.S */
27986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
27987 * any interesting requests and then jump to the real instruction
27988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
27989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
27990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
27991 * bail to the real handler if breakFlags==0.
27993 lbu a3, offThread_breakFlags(rSELF)
27994 la rBIX, dvmAsmInstructionStart + (433 * 128)
27995 lw rIBASE, offThread_curHandlerTable(rSELF)
27997 jr rBIX # nothing to do - jump to real handler
28000 move a0, rPC # arg0
28001 move a1, rFP # arg1
28002 move a2, rSELF # arg2
28003 JAL(dvmCheckBefore)
28006 /* ------------------------------ */
28008 .L_ALT_OP_UNUSED_B2FF: /* 0x1b2 */
28009 /* File: mips/alt_stub.S */
28011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28012 * any interesting requests and then jump to the real instruction
28013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28016 * bail to the real handler if breakFlags==0.
28018 lbu a3, offThread_breakFlags(rSELF)
28019 la rBIX, dvmAsmInstructionStart + (434 * 128)
28020 lw rIBASE, offThread_curHandlerTable(rSELF)
28022 jr rBIX # nothing to do - jump to real handler
28025 move a0, rPC # arg0
28026 move a1, rFP # arg1
28027 move a2, rSELF # arg2
28028 JAL(dvmCheckBefore)
28031 /* ------------------------------ */
28033 .L_ALT_OP_UNUSED_B3FF: /* 0x1b3 */
28034 /* File: mips/alt_stub.S */
28036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28037 * any interesting requests and then jump to the real instruction
28038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28041 * bail to the real handler if breakFlags==0.
28043 lbu a3, offThread_breakFlags(rSELF)
28044 la rBIX, dvmAsmInstructionStart + (435 * 128)
28045 lw rIBASE, offThread_curHandlerTable(rSELF)
28047 jr rBIX # nothing to do - jump to real handler
28050 move a0, rPC # arg0
28051 move a1, rFP # arg1
28052 move a2, rSELF # arg2
28053 JAL(dvmCheckBefore)
28056 /* ------------------------------ */
28058 .L_ALT_OP_UNUSED_B4FF: /* 0x1b4 */
28059 /* File: mips/alt_stub.S */
28061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28062 * any interesting requests and then jump to the real instruction
28063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28066 * bail to the real handler if breakFlags==0.
28068 lbu a3, offThread_breakFlags(rSELF)
28069 la rBIX, dvmAsmInstructionStart + (436 * 128)
28070 lw rIBASE, offThread_curHandlerTable(rSELF)
28072 jr rBIX # nothing to do - jump to real handler
28075 move a0, rPC # arg0
28076 move a1, rFP # arg1
28077 move a2, rSELF # arg2
28078 JAL(dvmCheckBefore)
28081 /* ------------------------------ */
28083 .L_ALT_OP_UNUSED_B5FF: /* 0x1b5 */
28084 /* File: mips/alt_stub.S */
28086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28087 * any interesting requests and then jump to the real instruction
28088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28091 * bail to the real handler if breakFlags==0.
28093 lbu a3, offThread_breakFlags(rSELF)
28094 la rBIX, dvmAsmInstructionStart + (437 * 128)
28095 lw rIBASE, offThread_curHandlerTable(rSELF)
28097 jr rBIX # nothing to do - jump to real handler
28100 move a0, rPC # arg0
28101 move a1, rFP # arg1
28102 move a2, rSELF # arg2
28103 JAL(dvmCheckBefore)
28106 /* ------------------------------ */
28108 .L_ALT_OP_UNUSED_B6FF: /* 0x1b6 */
28109 /* File: mips/alt_stub.S */
28111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28112 * any interesting requests and then jump to the real instruction
28113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28116 * bail to the real handler if breakFlags==0.
28118 lbu a3, offThread_breakFlags(rSELF)
28119 la rBIX, dvmAsmInstructionStart + (438 * 128)
28120 lw rIBASE, offThread_curHandlerTable(rSELF)
28122 jr rBIX # nothing to do - jump to real handler
28125 move a0, rPC # arg0
28126 move a1, rFP # arg1
28127 move a2, rSELF # arg2
28128 JAL(dvmCheckBefore)
28131 /* ------------------------------ */
28133 .L_ALT_OP_UNUSED_B7FF: /* 0x1b7 */
28134 /* File: mips/alt_stub.S */
28136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28137 * any interesting requests and then jump to the real instruction
28138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28141 * bail to the real handler if breakFlags==0.
28143 lbu a3, offThread_breakFlags(rSELF)
28144 la rBIX, dvmAsmInstructionStart + (439 * 128)
28145 lw rIBASE, offThread_curHandlerTable(rSELF)
28147 jr rBIX # nothing to do - jump to real handler
28150 move a0, rPC # arg0
28151 move a1, rFP # arg1
28152 move a2, rSELF # arg2
28153 JAL(dvmCheckBefore)
28156 /* ------------------------------ */
28158 .L_ALT_OP_UNUSED_B8FF: /* 0x1b8 */
28159 /* File: mips/alt_stub.S */
28161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28162 * any interesting requests and then jump to the real instruction
28163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28166 * bail to the real handler if breakFlags==0.
28168 lbu a3, offThread_breakFlags(rSELF)
28169 la rBIX, dvmAsmInstructionStart + (440 * 128)
28170 lw rIBASE, offThread_curHandlerTable(rSELF)
28172 jr rBIX # nothing to do - jump to real handler
28175 move a0, rPC # arg0
28176 move a1, rFP # arg1
28177 move a2, rSELF # arg2
28178 JAL(dvmCheckBefore)
28181 /* ------------------------------ */
28183 .L_ALT_OP_UNUSED_B9FF: /* 0x1b9 */
28184 /* File: mips/alt_stub.S */
28186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28187 * any interesting requests and then jump to the real instruction
28188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28191 * bail to the real handler if breakFlags==0.
28193 lbu a3, offThread_breakFlags(rSELF)
28194 la rBIX, dvmAsmInstructionStart + (441 * 128)
28195 lw rIBASE, offThread_curHandlerTable(rSELF)
28197 jr rBIX # nothing to do - jump to real handler
28200 move a0, rPC # arg0
28201 move a1, rFP # arg1
28202 move a2, rSELF # arg2
28203 JAL(dvmCheckBefore)
28206 /* ------------------------------ */
28208 .L_ALT_OP_UNUSED_BAFF: /* 0x1ba */
28209 /* File: mips/alt_stub.S */
28211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28212 * any interesting requests and then jump to the real instruction
28213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28216 * bail to the real handler if breakFlags==0.
28218 lbu a3, offThread_breakFlags(rSELF)
28219 la rBIX, dvmAsmInstructionStart + (442 * 128)
28220 lw rIBASE, offThread_curHandlerTable(rSELF)
28222 jr rBIX # nothing to do - jump to real handler
28225 move a0, rPC # arg0
28226 move a1, rFP # arg1
28227 move a2, rSELF # arg2
28228 JAL(dvmCheckBefore)
28231 /* ------------------------------ */
28233 .L_ALT_OP_UNUSED_BBFF: /* 0x1bb */
28234 /* File: mips/alt_stub.S */
28236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28237 * any interesting requests and then jump to the real instruction
28238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28241 * bail to the real handler if breakFlags==0.
28243 lbu a3, offThread_breakFlags(rSELF)
28244 la rBIX, dvmAsmInstructionStart + (443 * 128)
28245 lw rIBASE, offThread_curHandlerTable(rSELF)
28247 jr rBIX # nothing to do - jump to real handler
28250 move a0, rPC # arg0
28251 move a1, rFP # arg1
28252 move a2, rSELF # arg2
28253 JAL(dvmCheckBefore)
28256 /* ------------------------------ */
28258 .L_ALT_OP_UNUSED_BCFF: /* 0x1bc */
28259 /* File: mips/alt_stub.S */
28261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28262 * any interesting requests and then jump to the real instruction
28263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28266 * bail to the real handler if breakFlags==0.
28268 lbu a3, offThread_breakFlags(rSELF)
28269 la rBIX, dvmAsmInstructionStart + (444 * 128)
28270 lw rIBASE, offThread_curHandlerTable(rSELF)
28272 jr rBIX # nothing to do - jump to real handler
28275 move a0, rPC # arg0
28276 move a1, rFP # arg1
28277 move a2, rSELF # arg2
28278 JAL(dvmCheckBefore)
28281 /* ------------------------------ */
28283 .L_ALT_OP_UNUSED_BDFF: /* 0x1bd */
28284 /* File: mips/alt_stub.S */
28286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28287 * any interesting requests and then jump to the real instruction
28288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28291 * bail to the real handler if breakFlags==0.
28293 lbu a3, offThread_breakFlags(rSELF)
28294 la rBIX, dvmAsmInstructionStart + (445 * 128)
28295 lw rIBASE, offThread_curHandlerTable(rSELF)
28297 jr rBIX # nothing to do - jump to real handler
28300 move a0, rPC # arg0
28301 move a1, rFP # arg1
28302 move a2, rSELF # arg2
28303 JAL(dvmCheckBefore)
28306 /* ------------------------------ */
28308 .L_ALT_OP_UNUSED_BEFF: /* 0x1be */
28309 /* File: mips/alt_stub.S */
28311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28312 * any interesting requests and then jump to the real instruction
28313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28316 * bail to the real handler if breakFlags==0.
28318 lbu a3, offThread_breakFlags(rSELF)
28319 la rBIX, dvmAsmInstructionStart + (446 * 128)
28320 lw rIBASE, offThread_curHandlerTable(rSELF)
28322 jr rBIX # nothing to do - jump to real handler
28325 move a0, rPC # arg0
28326 move a1, rFP # arg1
28327 move a2, rSELF # arg2
28328 JAL(dvmCheckBefore)
28331 /* ------------------------------ */
28333 .L_ALT_OP_UNUSED_BFFF: /* 0x1bf */
28334 /* File: mips/alt_stub.S */
28336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28337 * any interesting requests and then jump to the real instruction
28338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28341 * bail to the real handler if breakFlags==0.
28343 lbu a3, offThread_breakFlags(rSELF)
28344 la rBIX, dvmAsmInstructionStart + (447 * 128)
28345 lw rIBASE, offThread_curHandlerTable(rSELF)
28347 jr rBIX # nothing to do - jump to real handler
28350 move a0, rPC # arg0
28351 move a1, rFP # arg1
28352 move a2, rSELF # arg2
28353 JAL(dvmCheckBefore)
28356 /* ------------------------------ */
28358 .L_ALT_OP_UNUSED_C0FF: /* 0x1c0 */
28359 /* File: mips/alt_stub.S */
28361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28362 * any interesting requests and then jump to the real instruction
28363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28366 * bail to the real handler if breakFlags==0.
28368 lbu a3, offThread_breakFlags(rSELF)
28369 la rBIX, dvmAsmInstructionStart + (448 * 128)
28370 lw rIBASE, offThread_curHandlerTable(rSELF)
28372 jr rBIX # nothing to do - jump to real handler
28375 move a0, rPC # arg0
28376 move a1, rFP # arg1
28377 move a2, rSELF # arg2
28378 JAL(dvmCheckBefore)
28381 /* ------------------------------ */
28383 .L_ALT_OP_UNUSED_C1FF: /* 0x1c1 */
28384 /* File: mips/alt_stub.S */
28386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28387 * any interesting requests and then jump to the real instruction
28388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28391 * bail to the real handler if breakFlags==0.
28393 lbu a3, offThread_breakFlags(rSELF)
28394 la rBIX, dvmAsmInstructionStart + (449 * 128)
28395 lw rIBASE, offThread_curHandlerTable(rSELF)
28397 jr rBIX # nothing to do - jump to real handler
28400 move a0, rPC # arg0
28401 move a1, rFP # arg1
28402 move a2, rSELF # arg2
28403 JAL(dvmCheckBefore)
28406 /* ------------------------------ */
28408 .L_ALT_OP_UNUSED_C2FF: /* 0x1c2 */
28409 /* File: mips/alt_stub.S */
28411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28412 * any interesting requests and then jump to the real instruction
28413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28416 * bail to the real handler if breakFlags==0.
28418 lbu a3, offThread_breakFlags(rSELF)
28419 la rBIX, dvmAsmInstructionStart + (450 * 128)
28420 lw rIBASE, offThread_curHandlerTable(rSELF)
28422 jr rBIX # nothing to do - jump to real handler
28425 move a0, rPC # arg0
28426 move a1, rFP # arg1
28427 move a2, rSELF # arg2
28428 JAL(dvmCheckBefore)
28431 /* ------------------------------ */
28433 .L_ALT_OP_UNUSED_C3FF: /* 0x1c3 */
28434 /* File: mips/alt_stub.S */
28436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28437 * any interesting requests and then jump to the real instruction
28438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28441 * bail to the real handler if breakFlags==0.
28443 lbu a3, offThread_breakFlags(rSELF)
28444 la rBIX, dvmAsmInstructionStart + (451 * 128)
28445 lw rIBASE, offThread_curHandlerTable(rSELF)
28447 jr rBIX # nothing to do - jump to real handler
28450 move a0, rPC # arg0
28451 move a1, rFP # arg1
28452 move a2, rSELF # arg2
28453 JAL(dvmCheckBefore)
28456 /* ------------------------------ */
28458 .L_ALT_OP_UNUSED_C4FF: /* 0x1c4 */
28459 /* File: mips/alt_stub.S */
28461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28462 * any interesting requests and then jump to the real instruction
28463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28466 * bail to the real handler if breakFlags==0.
28468 lbu a3, offThread_breakFlags(rSELF)
28469 la rBIX, dvmAsmInstructionStart + (452 * 128)
28470 lw rIBASE, offThread_curHandlerTable(rSELF)
28472 jr rBIX # nothing to do - jump to real handler
28475 move a0, rPC # arg0
28476 move a1, rFP # arg1
28477 move a2, rSELF # arg2
28478 JAL(dvmCheckBefore)
28481 /* ------------------------------ */
28483 .L_ALT_OP_UNUSED_C5FF: /* 0x1c5 */
28484 /* File: mips/alt_stub.S */
28486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28487 * any interesting requests and then jump to the real instruction
28488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28491 * bail to the real handler if breakFlags==0.
28493 lbu a3, offThread_breakFlags(rSELF)
28494 la rBIX, dvmAsmInstructionStart + (453 * 128)
28495 lw rIBASE, offThread_curHandlerTable(rSELF)
28497 jr rBIX # nothing to do - jump to real handler
28500 move a0, rPC # arg0
28501 move a1, rFP # arg1
28502 move a2, rSELF # arg2
28503 JAL(dvmCheckBefore)
28506 /* ------------------------------ */
28508 .L_ALT_OP_UNUSED_C6FF: /* 0x1c6 */
28509 /* File: mips/alt_stub.S */
28511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28512 * any interesting requests and then jump to the real instruction
28513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28516 * bail to the real handler if breakFlags==0.
28518 lbu a3, offThread_breakFlags(rSELF)
28519 la rBIX, dvmAsmInstructionStart + (454 * 128)
28520 lw rIBASE, offThread_curHandlerTable(rSELF)
28522 jr rBIX # nothing to do - jump to real handler
28525 move a0, rPC # arg0
28526 move a1, rFP # arg1
28527 move a2, rSELF # arg2
28528 JAL(dvmCheckBefore)
28531 /* ------------------------------ */
28533 .L_ALT_OP_UNUSED_C7FF: /* 0x1c7 */
28534 /* File: mips/alt_stub.S */
28536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28537 * any interesting requests and then jump to the real instruction
28538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28541 * bail to the real handler if breakFlags==0.
28543 lbu a3, offThread_breakFlags(rSELF)
28544 la rBIX, dvmAsmInstructionStart + (455 * 128)
28545 lw rIBASE, offThread_curHandlerTable(rSELF)
28547 jr rBIX # nothing to do - jump to real handler
28550 move a0, rPC # arg0
28551 move a1, rFP # arg1
28552 move a2, rSELF # arg2
28553 JAL(dvmCheckBefore)
28556 /* ------------------------------ */
28558 .L_ALT_OP_UNUSED_C8FF: /* 0x1c8 */
28559 /* File: mips/alt_stub.S */
28561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28562 * any interesting requests and then jump to the real instruction
28563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28566 * bail to the real handler if breakFlags==0.
28568 lbu a3, offThread_breakFlags(rSELF)
28569 la rBIX, dvmAsmInstructionStart + (456 * 128)
28570 lw rIBASE, offThread_curHandlerTable(rSELF)
28572 jr rBIX # nothing to do - jump to real handler
28575 move a0, rPC # arg0
28576 move a1, rFP # arg1
28577 move a2, rSELF # arg2
28578 JAL(dvmCheckBefore)
28581 /* ------------------------------ */
28583 .L_ALT_OP_UNUSED_C9FF: /* 0x1c9 */
28584 /* File: mips/alt_stub.S */
28586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28587 * any interesting requests and then jump to the real instruction
28588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28591 * bail to the real handler if breakFlags==0.
28593 lbu a3, offThread_breakFlags(rSELF)
28594 la rBIX, dvmAsmInstructionStart + (457 * 128)
28595 lw rIBASE, offThread_curHandlerTable(rSELF)
28597 jr rBIX # nothing to do - jump to real handler
28600 move a0, rPC # arg0
28601 move a1, rFP # arg1
28602 move a2, rSELF # arg2
28603 JAL(dvmCheckBefore)
28606 /* ------------------------------ */
28608 .L_ALT_OP_UNUSED_CAFF: /* 0x1ca */
28609 /* File: mips/alt_stub.S */
28611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28612 * any interesting requests and then jump to the real instruction
28613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28616 * bail to the real handler if breakFlags==0.
28618 lbu a3, offThread_breakFlags(rSELF)
28619 la rBIX, dvmAsmInstructionStart + (458 * 128)
28620 lw rIBASE, offThread_curHandlerTable(rSELF)
28622 jr rBIX # nothing to do - jump to real handler
28625 move a0, rPC # arg0
28626 move a1, rFP # arg1
28627 move a2, rSELF # arg2
28628 JAL(dvmCheckBefore)
28631 /* ------------------------------ */
28633 .L_ALT_OP_UNUSED_CBFF: /* 0x1cb */
28634 /* File: mips/alt_stub.S */
28636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28637 * any interesting requests and then jump to the real instruction
28638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28641 * bail to the real handler if breakFlags==0.
28643 lbu a3, offThread_breakFlags(rSELF)
28644 la rBIX, dvmAsmInstructionStart + (459 * 128)
28645 lw rIBASE, offThread_curHandlerTable(rSELF)
28647 jr rBIX # nothing to do - jump to real handler
28650 move a0, rPC # arg0
28651 move a1, rFP # arg1
28652 move a2, rSELF # arg2
28653 JAL(dvmCheckBefore)
28656 /* ------------------------------ */
28658 .L_ALT_OP_UNUSED_CCFF: /* 0x1cc */
28659 /* File: mips/alt_stub.S */
28661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28662 * any interesting requests and then jump to the real instruction
28663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28666 * bail to the real handler if breakFlags==0.
28668 lbu a3, offThread_breakFlags(rSELF)
28669 la rBIX, dvmAsmInstructionStart + (460 * 128)
28670 lw rIBASE, offThread_curHandlerTable(rSELF)
28672 jr rBIX # nothing to do - jump to real handler
28675 move a0, rPC # arg0
28676 move a1, rFP # arg1
28677 move a2, rSELF # arg2
28678 JAL(dvmCheckBefore)
28681 /* ------------------------------ */
28683 .L_ALT_OP_UNUSED_CDFF: /* 0x1cd */
28684 /* File: mips/alt_stub.S */
28686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28687 * any interesting requests and then jump to the real instruction
28688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28691 * bail to the real handler if breakFlags==0.
28693 lbu a3, offThread_breakFlags(rSELF)
28694 la rBIX, dvmAsmInstructionStart + (461 * 128)
28695 lw rIBASE, offThread_curHandlerTable(rSELF)
28697 jr rBIX # nothing to do - jump to real handler
28700 move a0, rPC # arg0
28701 move a1, rFP # arg1
28702 move a2, rSELF # arg2
28703 JAL(dvmCheckBefore)
28706 /* ------------------------------ */
28708 .L_ALT_OP_UNUSED_CEFF: /* 0x1ce */
28709 /* File: mips/alt_stub.S */
28711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28712 * any interesting requests and then jump to the real instruction
28713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28716 * bail to the real handler if breakFlags==0.
28718 lbu a3, offThread_breakFlags(rSELF)
28719 la rBIX, dvmAsmInstructionStart + (462 * 128)
28720 lw rIBASE, offThread_curHandlerTable(rSELF)
28722 jr rBIX # nothing to do - jump to real handler
28725 move a0, rPC # arg0
28726 move a1, rFP # arg1
28727 move a2, rSELF # arg2
28728 JAL(dvmCheckBefore)
28731 /* ------------------------------ */
28733 .L_ALT_OP_UNUSED_CFFF: /* 0x1cf */
28734 /* File: mips/alt_stub.S */
28736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28737 * any interesting requests and then jump to the real instruction
28738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28741 * bail to the real handler if breakFlags==0.
28743 lbu a3, offThread_breakFlags(rSELF)
28744 la rBIX, dvmAsmInstructionStart + (463 * 128)
28745 lw rIBASE, offThread_curHandlerTable(rSELF)
28747 jr rBIX # nothing to do - jump to real handler
28750 move a0, rPC # arg0
28751 move a1, rFP # arg1
28752 move a2, rSELF # arg2
28753 JAL(dvmCheckBefore)
28756 /* ------------------------------ */
28758 .L_ALT_OP_UNUSED_D0FF: /* 0x1d0 */
28759 /* File: mips/alt_stub.S */
28761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28762 * any interesting requests and then jump to the real instruction
28763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28766 * bail to the real handler if breakFlags==0.
28768 lbu a3, offThread_breakFlags(rSELF)
28769 la rBIX, dvmAsmInstructionStart + (464 * 128)
28770 lw rIBASE, offThread_curHandlerTable(rSELF)
28772 jr rBIX # nothing to do - jump to real handler
28775 move a0, rPC # arg0
28776 move a1, rFP # arg1
28777 move a2, rSELF # arg2
28778 JAL(dvmCheckBefore)
28781 /* ------------------------------ */
28783 .L_ALT_OP_UNUSED_D1FF: /* 0x1d1 */
28784 /* File: mips/alt_stub.S */
28786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28787 * any interesting requests and then jump to the real instruction
28788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28791 * bail to the real handler if breakFlags==0.
28793 lbu a3, offThread_breakFlags(rSELF)
28794 la rBIX, dvmAsmInstructionStart + (465 * 128)
28795 lw rIBASE, offThread_curHandlerTable(rSELF)
28797 jr rBIX # nothing to do - jump to real handler
28800 move a0, rPC # arg0
28801 move a1, rFP # arg1
28802 move a2, rSELF # arg2
28803 JAL(dvmCheckBefore)
28806 /* ------------------------------ */
28808 .L_ALT_OP_UNUSED_D2FF: /* 0x1d2 */
28809 /* File: mips/alt_stub.S */
28811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28812 * any interesting requests and then jump to the real instruction
28813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28816 * bail to the real handler if breakFlags==0.
28818 lbu a3, offThread_breakFlags(rSELF)
28819 la rBIX, dvmAsmInstructionStart + (466 * 128)
28820 lw rIBASE, offThread_curHandlerTable(rSELF)
28822 jr rBIX # nothing to do - jump to real handler
28825 move a0, rPC # arg0
28826 move a1, rFP # arg1
28827 move a2, rSELF # arg2
28828 JAL(dvmCheckBefore)
28831 /* ------------------------------ */
28833 .L_ALT_OP_UNUSED_D3FF: /* 0x1d3 */
28834 /* File: mips/alt_stub.S */
28836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28837 * any interesting requests and then jump to the real instruction
28838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28841 * bail to the real handler if breakFlags==0.
28843 lbu a3, offThread_breakFlags(rSELF)
28844 la rBIX, dvmAsmInstructionStart + (467 * 128)
28845 lw rIBASE, offThread_curHandlerTable(rSELF)
28847 jr rBIX # nothing to do - jump to real handler
28850 move a0, rPC # arg0
28851 move a1, rFP # arg1
28852 move a2, rSELF # arg2
28853 JAL(dvmCheckBefore)
28856 /* ------------------------------ */
28858 .L_ALT_OP_UNUSED_D4FF: /* 0x1d4 */
28859 /* File: mips/alt_stub.S */
28861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28862 * any interesting requests and then jump to the real instruction
28863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28866 * bail to the real handler if breakFlags==0.
28868 lbu a3, offThread_breakFlags(rSELF)
28869 la rBIX, dvmAsmInstructionStart + (468 * 128)
28870 lw rIBASE, offThread_curHandlerTable(rSELF)
28872 jr rBIX # nothing to do - jump to real handler
28875 move a0, rPC # arg0
28876 move a1, rFP # arg1
28877 move a2, rSELF # arg2
28878 JAL(dvmCheckBefore)
28881 /* ------------------------------ */
28883 .L_ALT_OP_UNUSED_D5FF: /* 0x1d5 */
28884 /* File: mips/alt_stub.S */
28886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28887 * any interesting requests and then jump to the real instruction
28888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28891 * bail to the real handler if breakFlags==0.
28893 lbu a3, offThread_breakFlags(rSELF)
28894 la rBIX, dvmAsmInstructionStart + (469 * 128)
28895 lw rIBASE, offThread_curHandlerTable(rSELF)
28897 jr rBIX # nothing to do - jump to real handler
28900 move a0, rPC # arg0
28901 move a1, rFP # arg1
28902 move a2, rSELF # arg2
28903 JAL(dvmCheckBefore)
28906 /* ------------------------------ */
28908 .L_ALT_OP_UNUSED_D6FF: /* 0x1d6 */
28909 /* File: mips/alt_stub.S */
28911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28912 * any interesting requests and then jump to the real instruction
28913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28916 * bail to the real handler if breakFlags==0.
28918 lbu a3, offThread_breakFlags(rSELF)
28919 la rBIX, dvmAsmInstructionStart + (470 * 128)
28920 lw rIBASE, offThread_curHandlerTable(rSELF)
28922 jr rBIX # nothing to do - jump to real handler
28925 move a0, rPC # arg0
28926 move a1, rFP # arg1
28927 move a2, rSELF # arg2
28928 JAL(dvmCheckBefore)
28931 /* ------------------------------ */
28933 .L_ALT_OP_UNUSED_D7FF: /* 0x1d7 */
28934 /* File: mips/alt_stub.S */
28936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28937 * any interesting requests and then jump to the real instruction
28938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28941 * bail to the real handler if breakFlags==0.
28943 lbu a3, offThread_breakFlags(rSELF)
28944 la rBIX, dvmAsmInstructionStart + (471 * 128)
28945 lw rIBASE, offThread_curHandlerTable(rSELF)
28947 jr rBIX # nothing to do - jump to real handler
28950 move a0, rPC # arg0
28951 move a1, rFP # arg1
28952 move a2, rSELF # arg2
28953 JAL(dvmCheckBefore)
28956 /* ------------------------------ */
28958 .L_ALT_OP_UNUSED_D8FF: /* 0x1d8 */
28959 /* File: mips/alt_stub.S */
28961 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28962 * any interesting requests and then jump to the real instruction
28963 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28964 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28965 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28966 * bail to the real handler if breakFlags==0.
28968 lbu a3, offThread_breakFlags(rSELF)
28969 la rBIX, dvmAsmInstructionStart + (472 * 128)
28970 lw rIBASE, offThread_curHandlerTable(rSELF)
28972 jr rBIX # nothing to do - jump to real handler
28975 move a0, rPC # arg0
28976 move a1, rFP # arg1
28977 move a2, rSELF # arg2
28978 JAL(dvmCheckBefore)
28981 /* ------------------------------ */
28983 .L_ALT_OP_UNUSED_D9FF: /* 0x1d9 */
28984 /* File: mips/alt_stub.S */
28986 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
28987 * any interesting requests and then jump to the real instruction
28988 * handler. Note that the call to dvmCheckBefore is done as a tail call.
28989 * rIBASE updates won't be seen until a refresh, and we can tell we have a
28990 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
28991 * bail to the real handler if breakFlags==0.
28993 lbu a3, offThread_breakFlags(rSELF)
28994 la rBIX, dvmAsmInstructionStart + (473 * 128)
28995 lw rIBASE, offThread_curHandlerTable(rSELF)
28997 jr rBIX # nothing to do - jump to real handler
29000 move a0, rPC # arg0
29001 move a1, rFP # arg1
29002 move a2, rSELF # arg2
29003 JAL(dvmCheckBefore)
29006 /* ------------------------------ */
29008 .L_ALT_OP_UNUSED_DAFF: /* 0x1da */
29009 /* File: mips/alt_stub.S */
29011 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29012 * any interesting requests and then jump to the real instruction
29013 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29014 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29015 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29016 * bail to the real handler if breakFlags==0.
29018 lbu a3, offThread_breakFlags(rSELF)
29019 la rBIX, dvmAsmInstructionStart + (474 * 128)
29020 lw rIBASE, offThread_curHandlerTable(rSELF)
29022 jr rBIX # nothing to do - jump to real handler
29025 move a0, rPC # arg0
29026 move a1, rFP # arg1
29027 move a2, rSELF # arg2
29028 JAL(dvmCheckBefore)
29031 /* ------------------------------ */
29033 .L_ALT_OP_UNUSED_DBFF: /* 0x1db */
29034 /* File: mips/alt_stub.S */
29036 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29037 * any interesting requests and then jump to the real instruction
29038 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29039 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29040 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29041 * bail to the real handler if breakFlags==0.
29043 lbu a3, offThread_breakFlags(rSELF)
29044 la rBIX, dvmAsmInstructionStart + (475 * 128)
29045 lw rIBASE, offThread_curHandlerTable(rSELF)
29047 jr rBIX # nothing to do - jump to real handler
29050 move a0, rPC # arg0
29051 move a1, rFP # arg1
29052 move a2, rSELF # arg2
29053 JAL(dvmCheckBefore)
29056 /* ------------------------------ */
29058 .L_ALT_OP_UNUSED_DCFF: /* 0x1dc */
29059 /* File: mips/alt_stub.S */
29061 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29062 * any interesting requests and then jump to the real instruction
29063 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29064 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29065 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29066 * bail to the real handler if breakFlags==0.
29068 lbu a3, offThread_breakFlags(rSELF)
29069 la rBIX, dvmAsmInstructionStart + (476 * 128)
29070 lw rIBASE, offThread_curHandlerTable(rSELF)
29072 jr rBIX # nothing to do - jump to real handler
29075 move a0, rPC # arg0
29076 move a1, rFP # arg1
29077 move a2, rSELF # arg2
29078 JAL(dvmCheckBefore)
29081 /* ------------------------------ */
29083 .L_ALT_OP_UNUSED_DDFF: /* 0x1dd */
29084 /* File: mips/alt_stub.S */
29086 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29087 * any interesting requests and then jump to the real instruction
29088 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29089 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29090 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29091 * bail to the real handler if breakFlags==0.
29093 lbu a3, offThread_breakFlags(rSELF)
29094 la rBIX, dvmAsmInstructionStart + (477 * 128)
29095 lw rIBASE, offThread_curHandlerTable(rSELF)
29097 jr rBIX # nothing to do - jump to real handler
29100 move a0, rPC # arg0
29101 move a1, rFP # arg1
29102 move a2, rSELF # arg2
29103 JAL(dvmCheckBefore)
29106 /* ------------------------------ */
29108 .L_ALT_OP_UNUSED_DEFF: /* 0x1de */
29109 /* File: mips/alt_stub.S */
29111 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29112 * any interesting requests and then jump to the real instruction
29113 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29114 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29115 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29116 * bail to the real handler if breakFlags==0.
29118 lbu a3, offThread_breakFlags(rSELF)
29119 la rBIX, dvmAsmInstructionStart + (478 * 128)
29120 lw rIBASE, offThread_curHandlerTable(rSELF)
29122 jr rBIX # nothing to do - jump to real handler
29125 move a0, rPC # arg0
29126 move a1, rFP # arg1
29127 move a2, rSELF # arg2
29128 JAL(dvmCheckBefore)
29131 /* ------------------------------ */
29133 .L_ALT_OP_UNUSED_DFFF: /* 0x1df */
29134 /* File: mips/alt_stub.S */
29136 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29137 * any interesting requests and then jump to the real instruction
29138 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29139 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29140 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29141 * bail to the real handler if breakFlags==0.
29143 lbu a3, offThread_breakFlags(rSELF)
29144 la rBIX, dvmAsmInstructionStart + (479 * 128)
29145 lw rIBASE, offThread_curHandlerTable(rSELF)
29147 jr rBIX # nothing to do - jump to real handler
29150 move a0, rPC # arg0
29151 move a1, rFP # arg1
29152 move a2, rSELF # arg2
29153 JAL(dvmCheckBefore)
29156 /* ------------------------------ */
29158 .L_ALT_OP_UNUSED_E0FF: /* 0x1e0 */
29159 /* File: mips/alt_stub.S */
29161 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29162 * any interesting requests and then jump to the real instruction
29163 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29164 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29165 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29166 * bail to the real handler if breakFlags==0.
29168 lbu a3, offThread_breakFlags(rSELF)
29169 la rBIX, dvmAsmInstructionStart + (480 * 128)
29170 lw rIBASE, offThread_curHandlerTable(rSELF)
29172 jr rBIX # nothing to do - jump to real handler
29175 move a0, rPC # arg0
29176 move a1, rFP # arg1
29177 move a2, rSELF # arg2
29178 JAL(dvmCheckBefore)
29181 /* ------------------------------ */
29183 .L_ALT_OP_UNUSED_E1FF: /* 0x1e1 */
29184 /* File: mips/alt_stub.S */
29186 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29187 * any interesting requests and then jump to the real instruction
29188 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29189 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29190 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29191 * bail to the real handler if breakFlags==0.
29193 lbu a3, offThread_breakFlags(rSELF)
29194 la rBIX, dvmAsmInstructionStart + (481 * 128)
29195 lw rIBASE, offThread_curHandlerTable(rSELF)
29197 jr rBIX # nothing to do - jump to real handler
29200 move a0, rPC # arg0
29201 move a1, rFP # arg1
29202 move a2, rSELF # arg2
29203 JAL(dvmCheckBefore)
29206 /* ------------------------------ */
29208 .L_ALT_OP_UNUSED_E2FF: /* 0x1e2 */
29209 /* File: mips/alt_stub.S */
29211 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29212 * any interesting requests and then jump to the real instruction
29213 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29214 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29215 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29216 * bail to the real handler if breakFlags==0.
29218 lbu a3, offThread_breakFlags(rSELF)
29219 la rBIX, dvmAsmInstructionStart + (482 * 128)
29220 lw rIBASE, offThread_curHandlerTable(rSELF)
29222 jr rBIX # nothing to do - jump to real handler
29225 move a0, rPC # arg0
29226 move a1, rFP # arg1
29227 move a2, rSELF # arg2
29228 JAL(dvmCheckBefore)
29231 /* ------------------------------ */
29233 .L_ALT_OP_UNUSED_E3FF: /* 0x1e3 */
29234 /* File: mips/alt_stub.S */
29236 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29237 * any interesting requests and then jump to the real instruction
29238 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29239 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29240 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29241 * bail to the real handler if breakFlags==0.
29243 lbu a3, offThread_breakFlags(rSELF)
29244 la rBIX, dvmAsmInstructionStart + (483 * 128)
29245 lw rIBASE, offThread_curHandlerTable(rSELF)
29247 jr rBIX # nothing to do - jump to real handler
29250 move a0, rPC # arg0
29251 move a1, rFP # arg1
29252 move a2, rSELF # arg2
29253 JAL(dvmCheckBefore)
29256 /* ------------------------------ */
29258 .L_ALT_OP_UNUSED_E4FF: /* 0x1e4 */
29259 /* File: mips/alt_stub.S */
29261 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29262 * any interesting requests and then jump to the real instruction
29263 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29264 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29265 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29266 * bail to the real handler if breakFlags==0.
29268 lbu a3, offThread_breakFlags(rSELF)
29269 la rBIX, dvmAsmInstructionStart + (484 * 128)
29270 lw rIBASE, offThread_curHandlerTable(rSELF)
29272 jr rBIX # nothing to do - jump to real handler
29275 move a0, rPC # arg0
29276 move a1, rFP # arg1
29277 move a2, rSELF # arg2
29278 JAL(dvmCheckBefore)
29281 /* ------------------------------ */
29283 .L_ALT_OP_UNUSED_E5FF: /* 0x1e5 */
29284 /* File: mips/alt_stub.S */
29286 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29287 * any interesting requests and then jump to the real instruction
29288 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29289 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29290 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29291 * bail to the real handler if breakFlags==0.
29293 lbu a3, offThread_breakFlags(rSELF)
29294 la rBIX, dvmAsmInstructionStart + (485 * 128)
29295 lw rIBASE, offThread_curHandlerTable(rSELF)
29297 jr rBIX # nothing to do - jump to real handler
29300 move a0, rPC # arg0
29301 move a1, rFP # arg1
29302 move a2, rSELF # arg2
29303 JAL(dvmCheckBefore)
29306 /* ------------------------------ */
29308 .L_ALT_OP_UNUSED_E6FF: /* 0x1e6 */
29309 /* File: mips/alt_stub.S */
29311 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29312 * any interesting requests and then jump to the real instruction
29313 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29314 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29315 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29316 * bail to the real handler if breakFlags==0.
29318 lbu a3, offThread_breakFlags(rSELF)
29319 la rBIX, dvmAsmInstructionStart + (486 * 128)
29320 lw rIBASE, offThread_curHandlerTable(rSELF)
29322 jr rBIX # nothing to do - jump to real handler
29325 move a0, rPC # arg0
29326 move a1, rFP # arg1
29327 move a2, rSELF # arg2
29328 JAL(dvmCheckBefore)
29331 /* ------------------------------ */
29333 .L_ALT_OP_UNUSED_E7FF: /* 0x1e7 */
29334 /* File: mips/alt_stub.S */
29336 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29337 * any interesting requests and then jump to the real instruction
29338 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29339 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29340 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29341 * bail to the real handler if breakFlags==0.
29343 lbu a3, offThread_breakFlags(rSELF)
29344 la rBIX, dvmAsmInstructionStart + (487 * 128)
29345 lw rIBASE, offThread_curHandlerTable(rSELF)
29347 jr rBIX # nothing to do - jump to real handler
29350 move a0, rPC # arg0
29351 move a1, rFP # arg1
29352 move a2, rSELF # arg2
29353 JAL(dvmCheckBefore)
29356 /* ------------------------------ */
29358 .L_ALT_OP_UNUSED_E8FF: /* 0x1e8 */
29359 /* File: mips/alt_stub.S */
29361 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29362 * any interesting requests and then jump to the real instruction
29363 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29364 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29365 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29366 * bail to the real handler if breakFlags==0.
29368 lbu a3, offThread_breakFlags(rSELF)
29369 la rBIX, dvmAsmInstructionStart + (488 * 128)
29370 lw rIBASE, offThread_curHandlerTable(rSELF)
29372 jr rBIX # nothing to do - jump to real handler
29375 move a0, rPC # arg0
29376 move a1, rFP # arg1
29377 move a2, rSELF # arg2
29378 JAL(dvmCheckBefore)
29381 /* ------------------------------ */
29383 .L_ALT_OP_UNUSED_E9FF: /* 0x1e9 */
29384 /* File: mips/alt_stub.S */
29386 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29387 * any interesting requests and then jump to the real instruction
29388 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29389 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29390 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29391 * bail to the real handler if breakFlags==0.
29393 lbu a3, offThread_breakFlags(rSELF)
29394 la rBIX, dvmAsmInstructionStart + (489 * 128)
29395 lw rIBASE, offThread_curHandlerTable(rSELF)
29397 jr rBIX # nothing to do - jump to real handler
29400 move a0, rPC # arg0
29401 move a1, rFP # arg1
29402 move a2, rSELF # arg2
29403 JAL(dvmCheckBefore)
29406 /* ------------------------------ */
29408 .L_ALT_OP_UNUSED_EAFF: /* 0x1ea */
29409 /* File: mips/alt_stub.S */
29411 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29412 * any interesting requests and then jump to the real instruction
29413 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29414 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29415 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29416 * bail to the real handler if breakFlags==0.
29418 lbu a3, offThread_breakFlags(rSELF)
29419 la rBIX, dvmAsmInstructionStart + (490 * 128)
29420 lw rIBASE, offThread_curHandlerTable(rSELF)
29422 jr rBIX # nothing to do - jump to real handler
29425 move a0, rPC # arg0
29426 move a1, rFP # arg1
29427 move a2, rSELF # arg2
29428 JAL(dvmCheckBefore)
29431 /* ------------------------------ */
29433 .L_ALT_OP_UNUSED_EBFF: /* 0x1eb */
29434 /* File: mips/alt_stub.S */
29436 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29437 * any interesting requests and then jump to the real instruction
29438 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29439 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29440 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29441 * bail to the real handler if breakFlags==0.
29443 lbu a3, offThread_breakFlags(rSELF)
29444 la rBIX, dvmAsmInstructionStart + (491 * 128)
29445 lw rIBASE, offThread_curHandlerTable(rSELF)
29447 jr rBIX # nothing to do - jump to real handler
29450 move a0, rPC # arg0
29451 move a1, rFP # arg1
29452 move a2, rSELF # arg2
29453 JAL(dvmCheckBefore)
29456 /* ------------------------------ */
29458 .L_ALT_OP_UNUSED_ECFF: /* 0x1ec */
29459 /* File: mips/alt_stub.S */
29461 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29462 * any interesting requests and then jump to the real instruction
29463 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29464 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29465 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29466 * bail to the real handler if breakFlags==0.
29468 lbu a3, offThread_breakFlags(rSELF)
29469 la rBIX, dvmAsmInstructionStart + (492 * 128)
29470 lw rIBASE, offThread_curHandlerTable(rSELF)
29472 jr rBIX # nothing to do - jump to real handler
29475 move a0, rPC # arg0
29476 move a1, rFP # arg1
29477 move a2, rSELF # arg2
29478 JAL(dvmCheckBefore)
29481 /* ------------------------------ */
29483 .L_ALT_OP_UNUSED_EDFF: /* 0x1ed */
29484 /* File: mips/alt_stub.S */
29486 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29487 * any interesting requests and then jump to the real instruction
29488 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29489 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29490 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29491 * bail to the real handler if breakFlags==0.
29493 lbu a3, offThread_breakFlags(rSELF)
29494 la rBIX, dvmAsmInstructionStart + (493 * 128)
29495 lw rIBASE, offThread_curHandlerTable(rSELF)
29497 jr rBIX # nothing to do - jump to real handler
29500 move a0, rPC # arg0
29501 move a1, rFP # arg1
29502 move a2, rSELF # arg2
29503 JAL(dvmCheckBefore)
29506 /* ------------------------------ */
29508 .L_ALT_OP_UNUSED_EEFF: /* 0x1ee */
29509 /* File: mips/alt_stub.S */
29511 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29512 * any interesting requests and then jump to the real instruction
29513 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29514 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29515 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29516 * bail to the real handler if breakFlags==0.
29518 lbu a3, offThread_breakFlags(rSELF)
29519 la rBIX, dvmAsmInstructionStart + (494 * 128)
29520 lw rIBASE, offThread_curHandlerTable(rSELF)
29522 jr rBIX # nothing to do - jump to real handler
29525 move a0, rPC # arg0
29526 move a1, rFP # arg1
29527 move a2, rSELF # arg2
29528 JAL(dvmCheckBefore)
29531 /* ------------------------------ */
29533 .L_ALT_OP_UNUSED_EFFF: /* 0x1ef */
29534 /* File: mips/alt_stub.S */
29536 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29537 * any interesting requests and then jump to the real instruction
29538 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29539 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29540 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29541 * bail to the real handler if breakFlags==0.
29543 lbu a3, offThread_breakFlags(rSELF)
29544 la rBIX, dvmAsmInstructionStart + (495 * 128)
29545 lw rIBASE, offThread_curHandlerTable(rSELF)
29547 jr rBIX # nothing to do - jump to real handler
29550 move a0, rPC # arg0
29551 move a1, rFP # arg1
29552 move a2, rSELF # arg2
29553 JAL(dvmCheckBefore)
29556 /* ------------------------------ */
29558 .L_ALT_OP_UNUSED_F0FF: /* 0x1f0 */
29559 /* File: mips/alt_stub.S */
29561 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29562 * any interesting requests and then jump to the real instruction
29563 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29564 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29565 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29566 * bail to the real handler if breakFlags==0.
29568 lbu a3, offThread_breakFlags(rSELF)
29569 la rBIX, dvmAsmInstructionStart + (496 * 128)
29570 lw rIBASE, offThread_curHandlerTable(rSELF)
29572 jr rBIX # nothing to do - jump to real handler
29575 move a0, rPC # arg0
29576 move a1, rFP # arg1
29577 move a2, rSELF # arg2
29578 JAL(dvmCheckBefore)
29581 /* ------------------------------ */
29583 .L_ALT_OP_UNUSED_F1FF: /* 0x1f1 */
29584 /* File: mips/alt_stub.S */
29586 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29587 * any interesting requests and then jump to the real instruction
29588 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29589 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29590 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29591 * bail to the real handler if breakFlags==0.
29593 lbu a3, offThread_breakFlags(rSELF)
29594 la rBIX, dvmAsmInstructionStart + (497 * 128)
29595 lw rIBASE, offThread_curHandlerTable(rSELF)
29597 jr rBIX # nothing to do - jump to real handler
29600 move a0, rPC # arg0
29601 move a1, rFP # arg1
29602 move a2, rSELF # arg2
29603 JAL(dvmCheckBefore)
29606 /* ------------------------------ */
29608 .L_ALT_OP_INVOKE_OBJECT_INIT_JUMBO: /* 0x1f2 */
29609 /* File: mips/alt_stub.S */
29611 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29612 * any interesting requests and then jump to the real instruction
29613 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29614 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29615 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29616 * bail to the real handler if breakFlags==0.
29618 lbu a3, offThread_breakFlags(rSELF)
29619 la rBIX, dvmAsmInstructionStart + (498 * 128)
29620 lw rIBASE, offThread_curHandlerTable(rSELF)
29622 jr rBIX # nothing to do - jump to real handler
29625 move a0, rPC # arg0
29626 move a1, rFP # arg1
29627 move a2, rSELF # arg2
29628 JAL(dvmCheckBefore)
29631 /* ------------------------------ */
29633 .L_ALT_OP_IGET_VOLATILE_JUMBO: /* 0x1f3 */
29634 /* File: mips/alt_stub.S */
29636 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29637 * any interesting requests and then jump to the real instruction
29638 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29639 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29640 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29641 * bail to the real handler if breakFlags==0.
29643 lbu a3, offThread_breakFlags(rSELF)
29644 la rBIX, dvmAsmInstructionStart + (499 * 128)
29645 lw rIBASE, offThread_curHandlerTable(rSELF)
29647 jr rBIX # nothing to do - jump to real handler
29650 move a0, rPC # arg0
29651 move a1, rFP # arg1
29652 move a2, rSELF # arg2
29653 JAL(dvmCheckBefore)
29656 /* ------------------------------ */
29658 .L_ALT_OP_IGET_WIDE_VOLATILE_JUMBO: /* 0x1f4 */
29659 /* File: mips/alt_stub.S */
29661 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29662 * any interesting requests and then jump to the real instruction
29663 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29664 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29665 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29666 * bail to the real handler if breakFlags==0.
29668 lbu a3, offThread_breakFlags(rSELF)
29669 la rBIX, dvmAsmInstructionStart + (500 * 128)
29670 lw rIBASE, offThread_curHandlerTable(rSELF)
29672 jr rBIX # nothing to do - jump to real handler
29675 move a0, rPC # arg0
29676 move a1, rFP # arg1
29677 move a2, rSELF # arg2
29678 JAL(dvmCheckBefore)
29681 /* ------------------------------ */
29683 .L_ALT_OP_IGET_OBJECT_VOLATILE_JUMBO: /* 0x1f5 */
29684 /* File: mips/alt_stub.S */
29686 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29687 * any interesting requests and then jump to the real instruction
29688 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29689 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29690 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29691 * bail to the real handler if breakFlags==0.
29693 lbu a3, offThread_breakFlags(rSELF)
29694 la rBIX, dvmAsmInstructionStart + (501 * 128)
29695 lw rIBASE, offThread_curHandlerTable(rSELF)
29697 jr rBIX # nothing to do - jump to real handler
29700 move a0, rPC # arg0
29701 move a1, rFP # arg1
29702 move a2, rSELF # arg2
29703 JAL(dvmCheckBefore)
29706 /* ------------------------------ */
29708 .L_ALT_OP_IPUT_VOLATILE_JUMBO: /* 0x1f6 */
29709 /* File: mips/alt_stub.S */
29711 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29712 * any interesting requests and then jump to the real instruction
29713 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29714 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29715 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29716 * bail to the real handler if breakFlags==0.
29718 lbu a3, offThread_breakFlags(rSELF)
29719 la rBIX, dvmAsmInstructionStart + (502 * 128)
29720 lw rIBASE, offThread_curHandlerTable(rSELF)
29722 jr rBIX # nothing to do - jump to real handler
29725 move a0, rPC # arg0
29726 move a1, rFP # arg1
29727 move a2, rSELF # arg2
29728 JAL(dvmCheckBefore)
29731 /* ------------------------------ */
29733 .L_ALT_OP_IPUT_WIDE_VOLATILE_JUMBO: /* 0x1f7 */
29734 /* File: mips/alt_stub.S */
29736 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29737 * any interesting requests and then jump to the real instruction
29738 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29739 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29740 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29741 * bail to the real handler if breakFlags==0.
29743 lbu a3, offThread_breakFlags(rSELF)
29744 la rBIX, dvmAsmInstructionStart + (503 * 128)
29745 lw rIBASE, offThread_curHandlerTable(rSELF)
29747 jr rBIX # nothing to do - jump to real handler
29750 move a0, rPC # arg0
29751 move a1, rFP # arg1
29752 move a2, rSELF # arg2
29753 JAL(dvmCheckBefore)
29756 /* ------------------------------ */
29758 .L_ALT_OP_IPUT_OBJECT_VOLATILE_JUMBO: /* 0x1f8 */
29759 /* File: mips/alt_stub.S */
29761 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29762 * any interesting requests and then jump to the real instruction
29763 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29764 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29765 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29766 * bail to the real handler if breakFlags==0.
29768 lbu a3, offThread_breakFlags(rSELF)
29769 la rBIX, dvmAsmInstructionStart + (504 * 128)
29770 lw rIBASE, offThread_curHandlerTable(rSELF)
29772 jr rBIX # nothing to do - jump to real handler
29775 move a0, rPC # arg0
29776 move a1, rFP # arg1
29777 move a2, rSELF # arg2
29778 JAL(dvmCheckBefore)
29781 /* ------------------------------ */
29783 .L_ALT_OP_SGET_VOLATILE_JUMBO: /* 0x1f9 */
29784 /* File: mips/alt_stub.S */
29786 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29787 * any interesting requests and then jump to the real instruction
29788 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29789 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29790 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29791 * bail to the real handler if breakFlags==0.
29793 lbu a3, offThread_breakFlags(rSELF)
29794 la rBIX, dvmAsmInstructionStart + (505 * 128)
29795 lw rIBASE, offThread_curHandlerTable(rSELF)
29797 jr rBIX # nothing to do - jump to real handler
29800 move a0, rPC # arg0
29801 move a1, rFP # arg1
29802 move a2, rSELF # arg2
29803 JAL(dvmCheckBefore)
29806 /* ------------------------------ */
29808 .L_ALT_OP_SGET_WIDE_VOLATILE_JUMBO: /* 0x1fa */
29809 /* File: mips/alt_stub.S */
29811 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29812 * any interesting requests and then jump to the real instruction
29813 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29814 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29815 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29816 * bail to the real handler if breakFlags==0.
29818 lbu a3, offThread_breakFlags(rSELF)
29819 la rBIX, dvmAsmInstructionStart + (506 * 128)
29820 lw rIBASE, offThread_curHandlerTable(rSELF)
29822 jr rBIX # nothing to do - jump to real handler
29825 move a0, rPC # arg0
29826 move a1, rFP # arg1
29827 move a2, rSELF # arg2
29828 JAL(dvmCheckBefore)
29831 /* ------------------------------ */
29833 .L_ALT_OP_SGET_OBJECT_VOLATILE_JUMBO: /* 0x1fb */
29834 /* File: mips/alt_stub.S */
29836 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29837 * any interesting requests and then jump to the real instruction
29838 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29839 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29840 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29841 * bail to the real handler if breakFlags==0.
29843 lbu a3, offThread_breakFlags(rSELF)
29844 la rBIX, dvmAsmInstructionStart + (507 * 128)
29845 lw rIBASE, offThread_curHandlerTable(rSELF)
29847 jr rBIX # nothing to do - jump to real handler
29850 move a0, rPC # arg0
29851 move a1, rFP # arg1
29852 move a2, rSELF # arg2
29853 JAL(dvmCheckBefore)
29856 /* ------------------------------ */
29858 .L_ALT_OP_SPUT_VOLATILE_JUMBO: /* 0x1fc */
29859 /* File: mips/alt_stub.S */
29861 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29862 * any interesting requests and then jump to the real instruction
29863 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29864 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29865 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29866 * bail to the real handler if breakFlags==0.
29868 lbu a3, offThread_breakFlags(rSELF)
29869 la rBIX, dvmAsmInstructionStart + (508 * 128)
29870 lw rIBASE, offThread_curHandlerTable(rSELF)
29872 jr rBIX # nothing to do - jump to real handler
29875 move a0, rPC # arg0
29876 move a1, rFP # arg1
29877 move a2, rSELF # arg2
29878 JAL(dvmCheckBefore)
29881 /* ------------------------------ */
29883 .L_ALT_OP_SPUT_WIDE_VOLATILE_JUMBO: /* 0x1fd */
29884 /* File: mips/alt_stub.S */
29886 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29887 * any interesting requests and then jump to the real instruction
29888 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29889 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29890 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29891 * bail to the real handler if breakFlags==0.
29893 lbu a3, offThread_breakFlags(rSELF)
29894 la rBIX, dvmAsmInstructionStart + (509 * 128)
29895 lw rIBASE, offThread_curHandlerTable(rSELF)
29897 jr rBIX # nothing to do - jump to real handler
29900 move a0, rPC # arg0
29901 move a1, rFP # arg1
29902 move a2, rSELF # arg2
29903 JAL(dvmCheckBefore)
29906 /* ------------------------------ */
29908 .L_ALT_OP_SPUT_OBJECT_VOLATILE_JUMBO: /* 0x1fe */
29909 /* File: mips/alt_stub.S */
29911 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29912 * any interesting requests and then jump to the real instruction
29913 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29914 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29915 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29916 * bail to the real handler if breakFlags==0.
29918 lbu a3, offThread_breakFlags(rSELF)
29919 la rBIX, dvmAsmInstructionStart + (510 * 128)
29920 lw rIBASE, offThread_curHandlerTable(rSELF)
29922 jr rBIX # nothing to do - jump to real handler
29925 move a0, rPC # arg0
29926 move a1, rFP # arg1
29927 move a2, rSELF # arg2
29928 JAL(dvmCheckBefore)
29931 /* ------------------------------ */
29933 .L_ALT_OP_THROW_VERIFICATION_ERROR_JUMBO: /* 0x1ff */
29934 /* File: mips/alt_stub.S */
29936 * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
29937 * any interesting requests and then jump to the real instruction
29938 * handler. Note that the call to dvmCheckBefore is done as a tail call.
29939 * rIBASE updates won't be seen until a refresh, and we can tell we have a
29940 * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
29941 * bail to the real handler if breakFlags==0.
29943 lbu a3, offThread_breakFlags(rSELF)
29944 la rBIX, dvmAsmInstructionStart + (511 * 128)
29945 lw rIBASE, offThread_curHandlerTable(rSELF)
29947 jr rBIX # nothing to do - jump to real handler
29950 move a0, rPC # arg0
29951 move a1, rFP # arg1
29952 move a2, rSELF # arg2
29953 JAL(dvmCheckBefore)
29957 .size dvmAsmAltInstructionStart, .-dvmAsmAltInstructionStart
29958 .global dvmAsmAltInstructionEnd
29959 dvmAsmAltInstructionEnd: