Fix a memory disambiguation and a SFP/DFP assembling bug in the JIT.

diff --git a/vm/compiler/codegen/arm/Assemble.c b/vm/compiler/codegen/arm/Assemble.c
index 6147fd6..5426b3c 100644 (file)
--- a/vm/compiler/codegen/arm/Assemble.c
+++ b/vm/compiler/codegen/arm/Assemble.c
@@ -934,7 +934,7 @@ static bool assembleInstructions(CompilationUnit *cUnit, intptr_t startAddr)
                             ((1 << (encoder->fieldLoc[i].end + 1)) - 1);
                     bits |= value;
                     break;
-                case DFP:
+                case SFP:
                     /* Snag the 1-bit slice and position it */
                     value = ((operand & 0x10) >> 4) <<
                             encoder->fieldLoc[i].end;
@@ -943,7 +943,7 @@ static bool assembleInstructions(CompilationUnit *cUnit, intptr_t startAddr)
                             encoder->fieldLoc[i].start;
                     bits |= value;
                     break;
-                case SFP:
+                case DFP:
                     /* Snag the 1-bit slice and position it */
                     value = (operand & 0x1) <<
                             encoder->fieldLoc[i].end;

diff --git a/vm/compiler/codegen/arm/LocalOptimizations.c b/vm/compiler/codegen/arm/LocalOptimizations.c
index 71fc014..86f692f 100644 (file)
--- a/vm/compiler/codegen/arm/LocalOptimizations.c
+++ b/vm/compiler/codegen/arm/LocalOptimizations.c
@@ -33,15 +33,14 @@ static inline bool isDalvikStore(ArmLIR *lir)
     return (lir->defMask != ~0ULL) && (lir->defMask & ENCODE_DALVIK_REG);
 }
 
-static inline bool isDalvikRegisterPartiallyClobbered(ArmLIR *lir1,
-                                                      ArmLIR *lir2)
+static inline bool isDalvikRegisterClobbered(ArmLIR *lir1, ArmLIR *lir2)
 {
   int reg1Lo = DECODE_ALIAS_INFO_REG(lir1->aliasInfo);
   int reg1Hi = reg1Lo + DECODE_ALIAS_INFO_WIDE(lir1->aliasInfo);
   int reg2Lo = DECODE_ALIAS_INFO_REG(lir2->aliasInfo);
   int reg2Hi = reg2Lo + DECODE_ALIAS_INFO_WIDE(lir2->aliasInfo);
 
-  return (reg1Lo == reg2Hi) || (reg1Hi == reg2Lo);
+  return (reg1Lo == reg2Lo) || (reg1Lo == reg2Hi) || (reg1Hi == reg2Lo);
 }
 
 static void dumpDependentInsnPair(ArmLIR *thisLIR, ArmLIR *checkLIR,
@@ -129,8 +128,7 @@ static void applyLoadStoreElimination(CompilationUnit *cUnit,
                     if (stopHere == false &&
                         ((checkLIR->useMask | checkLIR->defMask) &
                          ENCODE_DALVIK_REG)) {
-                        stopHere = isDalvikRegisterPartiallyClobbered(thisLIR,
-                                                                      checkLIR);
+                        stopHere = isDalvikRegisterClobbered(thisLIR, checkLIR);
                     }
 
                     /* Found a new place to put the store - move it here */
@@ -227,7 +225,7 @@ static void applyLoadHoisting(CompilationUnit *cUnit,
 
                 /* Store data partially clobbers the Dalvik register */
                 if (isDalvikStore(checkLIR) &&
-                    isDalvikRegisterPartiallyClobbered(thisLIR, checkLIR)) {
+                    isDalvikRegisterClobbered(thisLIR, checkLIR)) {
                     break;
                 }
             }
@@ -279,8 +277,7 @@ static void applyLoadHoisting(CompilationUnit *cUnit,
                     /* Store data partially clobbers the Dalvik register */
                     if (stopHere == false &&
                         (checkLIR->defMask & ENCODE_DALVIK_REG)) {
-                        stopHere = isDalvikRegisterPartiallyClobbered(thisLIR,
-                                                                      checkLIR);
+                        stopHere = isDalvikRegisterClobbered(thisLIR, checkLIR);
                     }
 
                     /*