1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
22 The purpose of rtw_io.c
26 b. provides the protocol engine
28 c. provides the software interface between caller and the hardware interface
34 a. USE_SYNC_IRP: Only sync operations are provided.
35 b. USE_ASYNC_IRP:Both sync/async operations are provided.
38 a. USE_ASYNC_IRP: Both sync/async operations are provided.
41 b. USE_SYNC_IRP: Only sync operations are provided.
44 Only sync read/rtw_write_mem operations are provided.
46 jackson@realtek.com.tw
52 #include <drv_types.h>
55 #if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
56 #error "Shall be Linux or Windows, but not both!\n"
59 #ifdef CONFIG_SDIO_HCI
60 #define rtw_le16_to_cpu(val) val
61 #define rtw_le32_to_cpu(val) val
62 #define rtw_cpu_to_le16(val) val
63 #define rtw_cpu_to_le32(val) val
65 #define rtw_le16_to_cpu(val) le16_to_cpu(val)
66 #define rtw_le32_to_cpu(val) le32_to_cpu(val)
67 #define rtw_cpu_to_le16(val) cpu_to_le16(val)
68 #define rtw_cpu_to_le32(val) cpu_to_le32(val)
72 u8 _rtw_read8(_adapter *adapter, u32 addr)
75 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
76 struct io_priv *pio_priv = &adapter->iopriv;
77 struct intf_hdl *pintfhdl = &(pio_priv->intf);
78 u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
80 _read8 = pintfhdl->io_ops._read8;
82 r_val = _read8(pintfhdl, addr);
87 u16 _rtw_read16(_adapter *adapter, u32 addr)
90 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
91 struct io_priv *pio_priv = &adapter->iopriv;
92 struct intf_hdl *pintfhdl = &(pio_priv->intf);
93 u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
95 _read16 = pintfhdl->io_ops._read16;
97 r_val = _read16(pintfhdl, addr);
99 return rtw_le16_to_cpu(r_val);
102 u32 _rtw_read32(_adapter *adapter, u32 addr)
105 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
106 struct io_priv *pio_priv = &adapter->iopriv;
107 struct intf_hdl *pintfhdl = &(pio_priv->intf);
108 u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
110 _read32 = pintfhdl->io_ops._read32;
112 r_val = _read32(pintfhdl, addr);
114 return rtw_le32_to_cpu(r_val);
118 int _rtw_write8(_adapter *adapter, u32 addr, u8 val)
120 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
121 struct io_priv *pio_priv = &adapter->iopriv;
122 struct intf_hdl *pintfhdl = &(pio_priv->intf);
123 int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
126 _write8 = pintfhdl->io_ops._write8;
128 ret = _write8(pintfhdl, addr, val);
131 return RTW_STATUS_CODE(ret);
133 int _rtw_write16(_adapter *adapter, u32 addr, u16 val)
135 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
136 struct io_priv *pio_priv = &adapter->iopriv;
137 struct intf_hdl *pintfhdl = &(pio_priv->intf);
138 int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
141 _write16 = pintfhdl->io_ops._write16;
143 val = rtw_cpu_to_le16(val);
144 ret = _write16(pintfhdl, addr, val);
147 return RTW_STATUS_CODE(ret);
149 int _rtw_write32(_adapter *adapter, u32 addr, u32 val)
151 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
152 struct io_priv *pio_priv = &adapter->iopriv;
153 struct intf_hdl *pintfhdl = &(pio_priv->intf);
154 int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
157 _write32 = pintfhdl->io_ops._write32;
159 val = rtw_cpu_to_le32(val);
160 ret = _write32(pintfhdl, addr, val);
163 return RTW_STATUS_CODE(ret);
166 int _rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata)
168 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
169 struct io_priv *pio_priv = &adapter->iopriv;
170 struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf));
171 int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata);
174 _writeN = pintfhdl->io_ops._writeN;
176 ret = _writeN(pintfhdl, addr,length,pdata);
179 return RTW_STATUS_CODE(ret);
182 #ifdef CONFIG_SDIO_HCI
183 u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr)
186 struct io_priv *pio_priv = &adapter->iopriv;
187 struct intf_hdl *pintfhdl = &(pio_priv->intf);
188 u8 (*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr);
191 _sd_f0_read8 = pintfhdl->io_ops._sd_f0_read8;
194 r_val = _sd_f0_read8(pintfhdl, addr);
196 DBG_871X_LEVEL(_drv_warning_, FUNC_ADPT_FMT" _sd_f0_read8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
202 #ifdef CONFIG_SDIO_INDIRECT_ACCESS
203 u8 _rtw_sd_iread8(_adapter *adapter, u32 addr)
206 struct io_priv *pio_priv = &adapter->iopriv;
207 struct intf_hdl *pintfhdl = &(pio_priv->intf);
208 u8 (*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr);
210 _sd_iread8 = pintfhdl->io_ops._sd_iread8;
213 r_val = _sd_iread8(pintfhdl, addr);
215 DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iread8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
220 u16 _rtw_sd_iread16(_adapter *adapter, u32 addr)
223 struct io_priv *pio_priv = &adapter->iopriv;
224 struct intf_hdl *pintfhdl = &(pio_priv->intf);
225 u16 (*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr);
227 _sd_iread16 = pintfhdl->io_ops._sd_iread16;
230 r_val = _sd_iread16(pintfhdl, addr);
232 DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iread16 callback is NULL\n", FUNC_ADPT_ARG(adapter));
237 u32 _rtw_sd_iread32(_adapter *adapter, u32 addr)
240 struct io_priv *pio_priv = &adapter->iopriv;
241 struct intf_hdl *pintfhdl = &(pio_priv->intf);
242 u32 (*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr);
244 _sd_iread32 = pintfhdl->io_ops._sd_iread32;
247 r_val = _sd_iread32(pintfhdl, addr);
249 DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iread32 callback is NULL\n", FUNC_ADPT_ARG(adapter));
254 int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val)
256 struct io_priv *pio_priv = &adapter->iopriv;
257 struct intf_hdl *pintfhdl = &(pio_priv->intf);
258 int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
261 _sd_iwrite8 = pintfhdl->io_ops._sd_iwrite8;
264 ret = _sd_iwrite8(pintfhdl, addr, val);
266 DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iwrite8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
268 return RTW_STATUS_CODE(ret);
271 int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val)
273 struct io_priv *pio_priv = &adapter->iopriv;
274 struct intf_hdl *pintfhdl = &(pio_priv->intf);
275 int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
278 _sd_iwrite16 = pintfhdl->io_ops._sd_iwrite16;
281 ret = _sd_iwrite16(pintfhdl, addr, val);
283 DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iwrite16 callback is NULL\n", FUNC_ADPT_ARG(adapter));
285 return RTW_STATUS_CODE(ret);
287 int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val)
289 struct io_priv *pio_priv = &adapter->iopriv;
290 struct intf_hdl *pintfhdl = &(pio_priv->intf);
291 int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
294 _sd_iwrite32 = pintfhdl->io_ops._sd_iwrite32;
297 ret = _sd_iwrite32(pintfhdl, addr, val);
299 DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" _sd_iwrite32 callback is NULL\n", FUNC_ADPT_ARG(adapter));
301 return RTW_STATUS_CODE(ret);
304 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */
306 #endif /* CONFIG_SDIO_HCI */
308 int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
310 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
311 struct io_priv *pio_priv = &adapter->iopriv;
312 struct intf_hdl *pintfhdl = &(pio_priv->intf);
313 int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
316 _write8_async = pintfhdl->io_ops._write8_async;
318 ret = _write8_async(pintfhdl, addr, val);
321 return RTW_STATUS_CODE(ret);
323 int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
325 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
326 struct io_priv *pio_priv = &adapter->iopriv;
327 struct intf_hdl *pintfhdl = &(pio_priv->intf);
328 int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
331 _write16_async = pintfhdl->io_ops._write16_async;
332 val = rtw_cpu_to_le16(val);
333 ret = _write16_async(pintfhdl, addr, val);
336 return RTW_STATUS_CODE(ret);
338 int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
340 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
341 struct io_priv *pio_priv = &adapter->iopriv;
342 struct intf_hdl *pintfhdl = &(pio_priv->intf);
343 int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
346 _write32_async = pintfhdl->io_ops._write32_async;
347 val = rtw_cpu_to_le32(val);
348 ret = _write32_async(pintfhdl, addr, val);
351 return RTW_STATUS_CODE(ret);
354 void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
356 void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
357 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
358 struct io_priv *pio_priv = &adapter->iopriv;
359 struct intf_hdl *pintfhdl = &(pio_priv->intf);
363 if (RTW_CANNOT_RUN(adapter)) {
364 RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%s) OR bSurpriseRemoved(%s)"
365 , rtw_is_drv_stopped(adapter)?"True":"False"
366 , rtw_is_surprise_removed(adapter)?"True":"False"));
370 _read_mem = pintfhdl->io_ops._read_mem;
372 _read_mem(pintfhdl, addr, cnt, pmem);
378 void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
380 void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
381 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
382 struct io_priv *pio_priv = &adapter->iopriv;
383 struct intf_hdl *pintfhdl = &(pio_priv->intf);
387 _write_mem = pintfhdl->io_ops._write_mem;
389 _write_mem(pintfhdl, addr, cnt, pmem);
395 void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
397 u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
398 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
399 struct io_priv *pio_priv = &adapter->iopriv;
400 struct intf_hdl *pintfhdl = &(pio_priv->intf);
404 if (RTW_CANNOT_RUN(adapter)) {
405 RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%s) OR bSurpriseRemoved(%s)"
406 , rtw_is_drv_stopped(adapter)?"True":"False"
407 , rtw_is_surprise_removed(adapter)?"True":"False"));
411 _read_port = pintfhdl->io_ops._read_port;
413 _read_port(pintfhdl, addr, cnt, pmem);
419 void _rtw_read_port_cancel(_adapter *adapter)
421 void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
422 struct io_priv *pio_priv = &adapter->iopriv;
423 struct intf_hdl *pintfhdl = &(pio_priv->intf);
425 _read_port_cancel = pintfhdl->io_ops._read_port_cancel;
427 RTW_DISABLE_FUNC(adapter, DF_RX_BIT);
429 if(_read_port_cancel)
430 _read_port_cancel(pintfhdl);
433 u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
435 u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
436 //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue;
437 struct io_priv *pio_priv = &adapter->iopriv;
438 struct intf_hdl *pintfhdl = &(pio_priv->intf);
443 _write_port = pintfhdl->io_ops._write_port;
445 ret = _write_port(pintfhdl, addr, cnt, pmem);
452 u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
455 struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
456 struct submit_ctx sctx;
458 rtw_sctx_init(&sctx, timeout_ms);
459 pxmitbuf->sctx = &sctx;
461 ret = _rtw_write_port(adapter, addr, cnt, pmem);
464 ret = rtw_sctx_wait(&sctx, __func__);
469 void _rtw_write_port_cancel(_adapter *adapter)
471 void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
472 struct io_priv *pio_priv = &adapter->iopriv;
473 struct intf_hdl *pintfhdl = &(pio_priv->intf);
475 _write_port_cancel = pintfhdl->io_ops._write_port_cancel;
477 RTW_DISABLE_FUNC(adapter, DF_TX_BIT);
479 if(_write_port_cancel)
480 _write_port_cancel(pintfhdl);
482 int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter,struct _io_ops *pops))
484 struct io_priv *piopriv = &padapter->iopriv;
485 struct intf_hdl *pintf = &piopriv->intf;
487 if (set_intf_ops == NULL)
490 piopriv->padapter = padapter;
491 pintf->padapter = padapter;
492 pintf->pintf_dev = adapter_to_dvobj(padapter);
494 set_intf_ops(padapter,&pintf->io_ops);
500 * Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR
504 int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj)
508 if( (value=ATOMIC_INC_RETURN(&dvobj->continual_io_error)) > MAX_CONTINUAL_IO_ERR) {
509 DBG_871X("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR);
512 //DBG_871X("[dvobj:%p] continual_io_error:%d\n", dvobj, value);
518 * Set the continual_io_error of this @param dvobjprive to 0
520 void rtw_reset_continual_io_error(struct dvobj_priv *dvobj)
522 ATOMIC_SET(&dvobj->continual_io_error, 0);
527 u32 read_sniff_ranges[][2] = {
531 u32 write_sniff_ranges[][2] = {
536 int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u32)/2;
537 int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u32)/2;
539 bool match_read_sniff_ranges(u32 addr, u16 len)
542 for (i = 0; i<read_sniff_num; i++) {
543 if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1])
550 bool match_write_sniff_ranges(u32 addr, u16 len)
553 for (i = 0; i<write_sniff_num; i++) {
554 if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1])
561 struct rf_sniff_ent {
567 struct rf_sniff_ent rf_read_sniff_ranges[] = {
568 /* example for all path addr 0x55 with all RF Reg mask */
569 /* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
572 struct rf_sniff_ent rf_write_sniff_ranges[] = {
573 /* example for all path addr 0x55 with all RF Reg mask */
574 /* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
577 int rf_read_sniff_num = sizeof(rf_read_sniff_ranges)/sizeof(struct rf_sniff_ent);
578 int rf_write_sniff_num = sizeof(rf_write_sniff_ranges)/sizeof(struct rf_sniff_ent);
580 bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask)
584 for (i = 0; i < rf_read_sniff_num; i++) {
585 if (rf_read_sniff_ranges[i].path == MAX_RF_PATH || rf_read_sniff_ranges[i].path == path)
586 if (addr == rf_read_sniff_ranges[i].reg && (mask & rf_read_sniff_ranges[i].mask))
593 bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask)
597 for (i = 0; i < rf_write_sniff_num; i++) {
598 if (rf_write_sniff_ranges[i].path == MAX_RF_PATH || rf_write_sniff_ranges[i].path == path)
599 if (addr == rf_write_sniff_ranges[i].reg && (mask & rf_write_sniff_ranges[i].mask))
606 u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
608 u8 val = _rtw_read8(adapter, addr);
610 if (match_read_sniff_ranges(addr, 1))
611 DBG_871X("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
616 u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line)
618 u16 val = _rtw_read16(adapter, addr);
620 if (match_read_sniff_ranges(addr, 2))
621 DBG_871X("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val);
626 u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line)
628 u32 val = _rtw_read32(adapter, addr);
630 if (match_read_sniff_ranges(addr, 4))
631 DBG_871X("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val);
636 int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
638 if (match_write_sniff_ranges(addr, 1))
639 DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
641 return _rtw_write8(adapter, addr, val);
643 int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
645 if (match_write_sniff_ranges(addr, 2))
646 DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
648 return _rtw_write16(adapter, addr, val);
650 int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
652 if (match_write_sniff_ranges(addr, 4))
653 DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
655 return _rtw_write32(adapter, addr, val);
657 int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line)
659 if (match_write_sniff_ranges(addr, length))
660 DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
662 return _rtw_writeN(adapter, addr, length, data);
665 #ifdef CONFIG_SDIO_HCI
666 u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
668 u8 val = _rtw_sd_f0_read8(adapter, addr);
671 if (match_read_sniff_ranges(addr, 1))
672 DBG_871X("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
678 #ifdef CONFIG_SDIO_INDIRECT_ACCESS
679 u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line)
681 u8 val = rtw_sd_iread8(adapter, addr);
683 if (match_read_sniff_ranges(addr, 1))
684 DBG_871X("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x\n", caller, line, addr, val);
689 u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line)
691 u16 val = _rtw_sd_iread16(adapter, addr);
693 if (match_read_sniff_ranges(addr, 2))
694 DBG_871X("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x\n", caller, line, addr, val);
699 u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line)
701 u32 val = _rtw_sd_iread32(adapter, addr);
703 if (match_read_sniff_ranges(addr, 4))
704 DBG_871X("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x\n", caller, line, addr, val);
709 int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
711 if (match_write_sniff_ranges(addr, 1))
712 DBG_871X("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x)\n", caller, line, addr, val);
714 return _rtw_sd_iwrite8(adapter, addr, val);
716 int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
718 if (match_write_sniff_ranges(addr, 2))
719 DBG_871X("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x)\n", caller, line, addr, val);
721 return _rtw_sd_iwrite16(adapter, addr, val);
723 int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
725 if (match_write_sniff_ranges(addr, 4))
726 DBG_871X("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x)\n", caller, line, addr, val);
728 return _rtw_sd_iwrite32(adapter, addr, val);
731 #endif /* CONFIG_SDIO_INDIRECT_ACCESS */
733 #endif /* CONFIG_SDIO_HCI */