1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
21 //============================================================
23 //============================================================
24 #include "mp_precomp.h"
25 #include "phydm_precomp.h"
27 #if (defined(CONFIG_RA_DBG_CMD))
29 ODM_C2HRaParaReportHandler(
35 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
36 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
38 u1Byte para_idx = CmdBuf[0]; //Retry Penalty, NH, NL
39 u1Byte RateTypeStart = CmdBuf[1];
40 u1Byte RateTypeLength = CmdLen - 2;
43 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[ From FW C2H RA Para ] CmdBuf[0]= (( %d ))\n", CmdBuf[0]));
45 if (para_idx == RADBG_RTY_PENALTY) {
46 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |RTY Penality Index| \n"));
48 for (i = 0 ; i < (RateTypeLength) ; i++) {
49 if (pRA_Table->is_ra_dbg_init)
50 pRA_Table->RTY_P_default[RateTypeStart + i] = CmdBuf[2 + i];
52 pRA_Table->RTY_P[RateTypeStart + i] = CmdBuf[2 + i];
53 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RTY_P[RateTypeStart + i]));
56 } else if (para_idx == RADBG_N_HIGH) {
57 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-High| \n"));
60 } else if (para_idx == RADBG_N_LOW){
61 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |N-Low| \n"));
64 else if (para_idx == RADBG_RATE_UP_RTY_RATIO) {
65 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Up RTY Ratio| \n"));
67 for (i = 0 ; i < (RateTypeLength) ; i++) {
68 if (pRA_Table->is_ra_dbg_init)
69 pRA_Table->RATE_UP_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
71 pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
72 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i]));
74 } else if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
75 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index| |Rate Down RTY Ratio| \n"));
77 for (i = 0 ; i < (RateTypeLength) ; i++) {
78 if (pRA_Table->is_ra_dbg_init)
79 pRA_Table->RATE_DOWN_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
81 pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
82 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d %15d \n", (RateTypeStart + i), pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i]));
84 } else if (para_idx == RADBG_DEBUG_MONITOR1) {
85 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
86 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
88 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1]));
89 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Rate =", CmdBuf[2] & 0x7f));
90 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI =", (CmdBuf[2] & 0x80) >> 7));
91 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW =", CmdBuf[3]));
92 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "BW_max =", CmdBuf[4]));
93 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate0 =", CmdBuf[5]));
94 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "multi_rate1 =", CmdBuf[6]));
95 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[7]));
96 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[8]));
97 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "SGI_support =", CmdBuf[9]));
98 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "try_ness =", CmdBuf[10]));
99 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "pre_rate =", CmdBuf[11]));
101 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RSSI =", CmdBuf[1]));
102 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x \n", "BW =", CmdBuf[2]));
103 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "DISRA =", CmdBuf[3]));
104 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "VHT_EN =", CmdBuf[4]));
105 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Hightest Rate =", CmdBuf[5]));
106 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "Lowest Rate =", CmdBuf[6]));
107 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "SGI_support =", CmdBuf[7]));
108 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "Rate_ID =", CmdBuf[8]));;
110 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
111 } else if (para_idx == RADBG_DEBUG_MONITOR2) {
112 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
113 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
114 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %d \n", "RateID =", CmdBuf[1]));
115 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "highest_rate =", CmdBuf[2]));
116 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s 0x%x \n", "lowest_rate =", CmdBuf[3]));
118 for (i = 4 ; i <= 11 ; i++)
119 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("RAMASK = 0x%x \n", CmdBuf[i]));
121 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s %x%x %x%x %x%x %x%x \n", "RA Mask:",
122 CmdBuf[8], CmdBuf[7], CmdBuf[6], CmdBuf[5], CmdBuf[4], CmdBuf[3], CmdBuf[2], CmdBuf[1]));
124 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
125 } else if (para_idx == RADBG_DEBUG_MONITOR3) {
127 for (i = 0 ; i < (CmdLen - 1) ; i++)
128 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("content[%d] = %d \n", i, CmdBuf[1 + i]));
129 } else if (para_idx == RADBG_DEBUG_MONITOR4)
130 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s {%d.%d} \n", "RA Version =", CmdBuf[1], CmdBuf[2]));
135 odm_RA_ParaAdjust_Send_H2C(
140 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
141 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
142 u1Byte H2C_Parameter[6] = {0};
144 H2C_Parameter[0] = RA_FIRST_MACID;
146 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("RA_Para_feedback_req= (( %d )) \n",pRA_Table->RA_Para_feedback_req ));
147 if (pRA_Table->RA_Para_feedback_req) { //H2C_Parameter[5]=1 ; ask FW for all RA parameters
148 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Ask FW for RA parameter \n"));
149 H2C_Parameter[5] |= BIT1; //ask FW to report RA parameters
150 H2C_Parameter[1] = pRA_Table->para_idx; //pRA_Table->para_idx;
151 pRA_Table->RA_Para_feedback_req = 0;
153 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Send H2C to FW for modifying RA parameter \n"));
155 H2C_Parameter[1] = pRA_Table->para_idx;
156 H2C_Parameter[2] = pRA_Table->rate_idx;
158 if (pRA_Table->para_idx == RADBG_RTY_PENALTY || pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO || pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
159 H2C_Parameter[3] = pRA_Table->value;
160 H2C_Parameter[4] = 0;
163 else { //if ((pRA_Table->rate_idx==RADBG_N_HIGH)||(pRA_Table->rate_idx==RADBG_N_LOW))
164 H2C_Parameter[3] = (u1Byte)(((pRA_Table->value_16) & 0xf0) >> 4); //byte1
165 H2C_Parameter[4] = (u1Byte)((pRA_Table->value_16) & 0x0f); //byte0
168 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[1] = 0x%x \n", H2C_Parameter[1]));
169 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[2] = 0x%x \n", H2C_Parameter[2]));
170 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[3] = 0x%x \n", H2C_Parameter[3]));
171 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[4] = 0x%x \n", H2C_Parameter[4]));
172 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[5] = 0x%x \n", H2C_Parameter[5]));
174 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RA_PARA_ADJUST, 6, H2C_Parameter);
184 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
185 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
186 u1Byte para_idx = pRA_Table->para_idx;
187 u1Byte rate_idx = pRA_Table->rate_idx;
188 u1Byte value = pRA_Table->value;
189 u1Byte Pre_value = 0xff;
193 if (pRA_Table->para_idx == RADBG_RTY_PENALTY) {
194 Pre_value = pRA_Table->RTY_P[rate_idx];
195 pRA_Table->RTY_P[rate_idx] = value;
196 pRA_Table->RTY_P_modify_note[rate_idx] = 1;
197 } else if (pRA_Table->para_idx == RADBG_N_HIGH) {
199 } else if (pRA_Table->para_idx == RADBG_N_LOW) {
201 } else if (pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO) {
202 Pre_value = pRA_Table->RATE_UP_RTY_RATIO[rate_idx];
203 pRA_Table->RATE_UP_RTY_RATIO[rate_idx] = value;
204 pRA_Table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1;
205 } else if (pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
206 Pre_value = pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx];
207 pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx] = value;
208 pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1;
210 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" Change RA Papa[%d], Rate[ %d ], ((%d)) -> ((%d)) \n", pRA_Table->para_idx, rate_idx, Pre_value, value));
211 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
219 IN u1Byte *value_default,
220 IN u1Byte *modify_note
223 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
224 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
227 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate index| |Current-value| |Default-value| |Modify?| \n"));
228 for (i = 0 ; i <= (pRA_Table->rate_length); i++) {
229 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
230 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %20d %25d %20s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")));
232 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [ %d ] %10d %14d %14s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " . ")));
241 IN u4Byte *const dm_value
244 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
245 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
247 pRA_Table->is_ra_dbg_init = FALSE;
249 if (dm_value[0] == 100) { /*1 Print RA Parameters*/
250 u1Byte default_pointer_value;
252 u1Byte *pvalue_default;
253 u1Byte *pmodify_note;
255 pvalue = pvalue_default = pmodify_note = &default_pointer_value;
257 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n"));
259 if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/
260 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [1] RTY_PENALTY\n"));
261 pvalue = &(pRA_Table->RTY_P[0]);
262 pvalue_default = &(pRA_Table->RTY_P_default[0]);
263 pmodify_note = (u1Byte *)&(pRA_Table->RTY_P_modify_note[0]);
264 } else if (dm_value[1] == RADBG_N_HIGH) { /* [2]*/
265 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [2] N_HIGH\n"));
267 } else if (dm_value[1] == RADBG_N_LOW) { /*[3]*/
268 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [3] N_LOW\n"));
270 } else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/
271 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [8] RATE_UP_RTY_RATIO\n"));
272 pvalue = &(pRA_Table->RATE_UP_RTY_RATIO[0]);
273 pvalue_default = &(pRA_Table->RATE_UP_RTY_RATIO_default[0]);
274 pmodify_note = (u1Byte *)&(pRA_Table->RATE_UP_RTY_RATIO_modify_note[0]);
275 } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/
276 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [9] RATE_DOWN_RTY_RATIO\n"));
277 pvalue = &(pRA_Table->RATE_DOWN_RTY_RATIO[0]);
278 pvalue_default = &(pRA_Table->RATE_DOWN_RTY_RATIO_default[0]);
279 pmodify_note = (u1Byte *)&(pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[0]);
282 phydm_ra_print_msg(pDM_Odm, pvalue, pvalue_default, pmodify_note);
283 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n\n"));
285 } else if (dm_value[0] == 101) {
286 pRA_Table->para_idx = (u1Byte)dm_value[1];
288 pRA_Table->RA_Para_feedback_req = 1;
289 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
291 pRA_Table->para_idx = (u1Byte)dm_value[0];
292 pRA_Table->rate_idx = (u1Byte)dm_value[1];
293 pRA_Table->value = (u1Byte)dm_value[2];
295 odm_RA_ParaAdjust(pDM_Odm);
301 odm_RA_ParaAdjust_init(
305 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
306 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
308 u1Byte ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO};
310 RTY_PENALTY = 1, //u8
315 TRYING_NECESSARY = 6,
316 DROPING_NECESSARY = 7,
317 RATE_UP_RTY_RATIO = 8, //u8
318 RATE_DOWN_RTY_RATIO= 9, //u8
322 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_RA_ParaAdjust_init \n"));
324 pRA_Table->is_ra_dbg_init = TRUE;
325 for (i = 0; i < 3; i++) {
326 pRA_Table->RA_Para_feedback_req = 1;
327 pRA_Table->para_idx = ra_para_pool_u8[i];
328 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
331 if (pDM_Odm->SupportICType == ODM_RTL8192E)
332 pRA_Table->rate_length = ODM_RATEMCS15;
333 else if ((pDM_Odm->SupportICType == ODM_RTL8723B) || (pDM_Odm->SupportICType == ODM_RTL8188E))
334 pRA_Table->rate_length = ODM_RATEMCS7;
335 else if ((pDM_Odm->SupportICType == ODM_RTL8821) || (pDM_Odm->SupportICType == ODM_RTL8881A))
336 pRA_Table->rate_length = ODM_RATEVHTSS1MCS9;
337 else if (pDM_Odm->SupportICType == ODM_RTL8812)
338 pRA_Table->rate_length = ODM_RATEVHTSS2MCS9;
339 else if (pDM_Odm->SupportICType == ODM_RTL8814A)
340 pRA_Table->rate_length = ODM_RATEVHTSS3MCS9;
342 pRA_Table->rate_length = ODM_RATEVHTSS4MCS9;
349 ODM_C2HRaParaReportHandler(
360 IN u4Byte *const dm_value
366 odm_RA_ParaAdjust_init(
373 #endif //#if (defined(CONFIG_RA_DBG_CMD))
376 phydm_ra_dynamic_retry_count(
380 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
381 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
383 u1Byte i, retry_offset;
385 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pDM_Odm->pre_b_noisy = %d\n", pDM_Odm->pre_b_noisy ));*/
386 if (pDM_Odm->pre_b_noisy != pDM_Odm->NoisyDecision) {
388 if (pDM_Odm->NoisyDecision) {
389 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Noisy Env. RA fallback value\n"));
390 ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x0);
391 ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x04030201);
393 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Clean Env. RA fallback value\n"));
394 ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x02010000);
395 ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x06050403);
397 pDM_Odm->pre_b_noisy = pDM_Odm->NoisyDecision;
401 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
404 phydm_retry_limit_table_bound(
406 IN u1Byte *retry_limit,
410 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
411 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
413 if (*retry_limit > offset) {
415 *retry_limit -= offset;
417 if (*retry_limit < pRA_Table->retrylimit_low)
418 *retry_limit = pRA_Table->retrylimit_low;
419 else if (*retry_limit > pRA_Table->retrylimit_high)
420 *retry_limit = pRA_Table->retrylimit_high;
422 *retry_limit = pRA_Table->retrylimit_low;
426 phydm_reset_retry_limit_table(
430 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
431 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
434 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*support all IC platform*/
437 #if ((RTL8192E_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1))
438 u1Byte per_rate_retrylimit_table_20M[ODM_RATEMCS15+1] = {
440 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
441 2, 4, 6, 8, 12, 18, 20, 22, /*20M HT-1SS*/
442 2, 4, 6, 8, 12, 18, 20, 22 /*20M HT-2SS*/
444 u1Byte per_rate_retrylimit_table_40M[ODM_RATEMCS15+1] = {
446 2, 2, 4, 6, 8, 12, 16, 18, /*OFDM*/
447 4, 8, 12, 16, 24, 32, 32, 32, /*40M HT-1SS*/
448 4, 8, 12, 16, 24, 32, 32, 32 /*40M HT-2SS*/
451 #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)
453 #elif (RTL8812A_SUPPORT == 1)
455 #elif(RTL8814A_SUPPORT == 1)
462 memcpy(&(pRA_Table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX);
463 memcpy(&(pRA_Table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX);
465 for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
466 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), 0);
467 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), 0);
472 phydm_ra_dynamic_retry_limit(
476 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
477 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
479 u1Byte i, retry_offset;
483 if (pDM_Odm->pre_number_active_client == pDM_Odm->number_active_client) {
485 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" pre_number_active_client == number_active_client\n"));
489 if (pDM_Odm->number_active_client == 1) {
490 phydm_reset_retry_limit_table(pDM_Odm);
491 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("one client only->reset to default value\n"));
494 retry_offset = pDM_Odm->number_active_client * pRA_Table->retry_descend_num;
496 for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
498 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), retry_offset);
499 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), retry_offset);
506 phydm_ra_dynamic_retry_limit_init(
510 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
511 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
513 pRA_Table->retry_descend_num = RA_RETRY_DESCEND_NUM;
514 pRA_Table->retrylimit_low = RA_RETRY_LIMIT_LOW;
515 pRA_Table->retrylimit_high = RA_RETRY_LIMIT_HIGH;
517 phydm_reset_retry_limit_table(pDM_Odm);
522 phydm_ra_dynamic_retry_limit(
529 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
531 phydm_ra_dynamic_rate_id_on_assoc(
533 IN u1Byte wireless_mode,
534 IN u1Byte init_rate_id
537 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
539 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", pDM_Odm->RFType, wireless_mode, init_rate_id));
541 if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) {
543 if ((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) &&
544 (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))
546 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set N-2SS ARFR5 table\n"));
547 ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
548 ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
549 } else if ((pDM_Odm->SupportICType & (ODM_RTL8812)) &&
550 (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))
552 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set AC-2SS ARFR0 table\n"));
553 ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/
554 ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/
561 phydm_ra_dynamic_rate_id_init(
565 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
567 if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) {
569 ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff); /*N-2SS, ARFR5, rate_id = 0xe*/
570 ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0); /*N-2SS, ARFR5, rate_id = 0xe*/
572 ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff); /*AC-2SS, ARFR0, rate_id = 0x9*/
573 ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000); /*AC-2SS, ARFR0, rate_id = 0x9*/
578 phydm_update_rate_id(
581 IN u1Byte platform_macid
584 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
585 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
586 u1Byte current_tx_ss;
587 u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/
588 u1Byte wireless_mode;
592 if (rate_idx >= ODM_RATEVHTSS2MCS0) {
593 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS2MCS0)));
594 /*dummy for SD4 check patch*/
595 } else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
596 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS1MCS0)));
597 /*dummy for SD4 check patch*/
598 } else if (rate_idx >= ODM_RATEMCS0) {
599 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEMCS0)));
600 /*dummy for SD4 check patch*/
602 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx));
603 /*dummy for SD4 check patch*/
606 phydm_macid = pDM_Odm->platform2phydm_macid_table[platform_macid];
607 pEntry = pDM_Odm->pODM_StaInfo[phydm_macid];
609 if (IS_STA_VALID(pEntry)) {
610 wireless_mode = pEntry->WirelessMode;
612 if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) {
614 pEntry->ratr_idx = pEntry->ratr_idx_init;
615 if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/
616 if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/
618 pEntry->ratr_idx = ARFR_5_RATE_ID;
619 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_5\n"));
621 } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/
622 if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/
624 pEntry->ratr_idx = ARFR_0_RATE_ID;
625 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_0\n"));
628 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, pEntry->ratr_idx));
636 phydm_c2h_ra_report_handler(
642 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
643 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
644 u1Byte legacy_table[12] = {1,2,5,11,6,9,12,18,24,36,48,54};
645 u1Byte macid = CmdBuf[1];
647 u1Byte rate = CmdBuf[0];
648 u1Byte rate_idx = rate & 0x7f; /*remove bit7 SGI*/
649 u1Byte vht_en=(rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0;
650 u1Byte b_sgi = (rate & 0x80)>>7;
652 u1Byte pre_rate = pRA_Table->link_tx_rate[macid];
653 u1Byte pre_rate_idx = pre_rate & 0x7f; /*remove bit7 SGI*/
654 u1Byte pre_vht_en=(pre_rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0;
655 u1Byte pre_b_sgi = (pre_rate & 0x80)>>7;
657 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
658 PADAPTER Adapter = pDM_Odm->Adapter;
660 GET_HAL_DATA(Adapter)->CurrentRARate = HwRateToMRate(rate_idx);
662 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
663 ODM_UpdateInitRate(pDM_Odm, rate_idx);
666 /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,("RA: rate_idx=0x%x , sgi = %d\n", rate_idx, b_sgi));*/
667 /*if (pDM_Odm->SupportICType & (ODM_RTL8703B))*/
670 if (CmdBuf[3] == 0) {
671 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Init-Rate Update\n"));
673 } else if (CmdBuf[3] == 0xff) {
674 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("FW Level: Fix rate\n"));
676 } else if (CmdBuf[3] == 1) {
677 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Success\n"));
679 } else if (CmdBuf[3] == 2) {
680 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Fail & Try Again\n"));
682 } else if (CmdBuf[3] == 3) {
683 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Rate Back\n"));
685 } else if (CmdBuf[3] == 4) {
686 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("start rate by RSSI\n"));
688 } else if (CmdBuf[3] == 5) {
689 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try rate\n"));
695 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Tx Rate Update, MACID[%d] ( %s%s%s%s%d%s%s ) -> ( %s%s%s%s%d%s%s)\n",
697 ((pre_rate_idx >= ODM_RATEVHTSS1MCS0) && (pre_rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "",
698 ((pre_rate_idx >= ODM_RATEVHTSS2MCS0) && (pre_rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
699 ((pre_rate_idx >= ODM_RATEVHTSS3MCS0) && (pre_rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
700 (pre_rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
701 (pre_vht_en) ? ((pre_rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((pre_rate_idx >= ODM_RATEMCS0)? (pre_rate_idx - ODM_RATEMCS0) : ((pre_rate_idx <= ODM_RATE54M)?legacy_table[pre_rate_idx]:0)),
702 (pre_b_sgi) ? "-S" : " ",
703 (pre_rate_idx >= ODM_RATEMCS0) ? "" : "M",
704 ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss " : "",
705 ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
706 ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
707 (rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
708 (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((rate_idx >= ODM_RATEMCS0)? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M)?legacy_table[rate_idx]:0)),
709 (b_sgi) ? "-S" : " ",
710 (rate_idx >= ODM_RATEMCS0) ? "" : "M" ));
712 pRA_Table->link_tx_rate[macid] = rate;
715 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
716 if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E))
717 phydm_update_rate_id(pDM_Odm, rate, macid);
727 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
728 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
729 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
730 pRA_Table->firstconnect = FALSE;
732 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
733 pRA_Table->PT_collision_pre = TRUE; //used in ODM_DynamicARFBSelect(WIN only)
739 ODM_RAPostActionOnAssoc(
743 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
745 pDM_Odm->H2C_RARpt_connect = 1;
746 odm_RSSIMonitorCheck(pDM_Odm);
747 pDM_Odm->H2C_RARpt_connect = 0;
751 odm_RSSIMonitorCheck(
756 // For AP/ADSL use prtl8192cd_priv
757 // For CE/NIC use PADAPTER
759 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
760 if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
764 // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
765 // at the same time. In the stage2/3, we need to prive universal interface and merge all
766 // HW dynamic mechanism.
768 switch (pDM_Odm->SupportPlatform) {
770 odm_RSSIMonitorCheckMP(pDM_Odm);
774 odm_RSSIMonitorCheckCE(pDM_Odm);
778 odm_RSSIMonitorCheckAP(pDM_Odm);
782 //odm_DIGAP(pDM_Odm);
786 } // odm_RSSIMonitorCheck
788 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
790 phydm_FindMinimumRSSI(
791 IN PDM_ODM_T pDM_Odm,
792 IN PADAPTER pAdapter,
793 IN OUT BOOLEAN *pbLink_temp
797 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
798 PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo);
799 BOOLEAN act_as_ap = ACTING_AS_AP(pAdapter);
801 /*DbgPrint("bMediaConnect = %d, ACTING_AS_AP = %d , EntryMinUndecoratedSmoothedPWDB = %d\n",
802 pMgntInfo->bMediaConnect,act_as_ap,pHalData->EntryMinUndecoratedSmoothedPWDB);*/
805 /* 1.Determine the minimum RSSI */
806 if ((!pMgntInfo->bMediaConnect) ||
807 (act_as_ap && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/
809 pHalData->MinUndecoratedPWDBForDM = 0;
810 *pbLink_temp = FALSE;
816 if (pMgntInfo->bMediaConnect) { /* Default port*/
818 if (act_as_ap || pMgntInfo->mIbss) {
819 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
822 pHalData->MinUndecoratedPWDBForDM = pHalData->UndecoratedSmoothedPWDB;
825 } else { /* associated entry pwdb*/
826 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
830 return pHalData->MinUndecoratedPWDBForDM;
836 odm_RSSIMonitorCheckMP(
840 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
841 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
842 u1Byte H2C_Parameter[4] = {0};
844 BOOLEAN bExtRAInfo = FALSE;
846 u1Byte TxBF_EN = 0, stbc_en = 0;
848 PADAPTER Adapter = pDM_Odm->Adapter;
849 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
850 PRT_WLAN_STA pEntry = NULL;
851 s4Byte tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
852 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
853 PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo;
854 u8Byte curTxOkCnt = 0, curRxOkCnt = 0;
855 //BOOLEAN FirstConnect = 0;
856 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
857 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
859 PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter);
861 if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) {
866 //FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE);
867 //pRA_Table->firstconnect = pHalData->bLinked;
871 if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP))
873 if(curRxOkCnt >(curTxOkCnt*6))
874 PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015);
876 PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015);
880 if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821 ||
881 pDM_Odm->SupportICType == ODM_RTL8814A|| pDM_Odm->SupportICType == ODM_RTL8822B)
883 if(curRxOkCnt >(curTxOkCnt*6))
884 H2C_Parameter[3]|=RAINFO_BE_RX_STATE;
888 while (pLoopAdapter) {
890 if (pLoopAdapter != NULL) {
891 pMgntInfo = &pLoopAdapter->MgntInfo;
892 curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt;
893 curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt;
894 pMgntInfo->lastTxOkCnt = curTxOkCnt;
895 pMgntInfo->lastRxOkCnt = curRxOkCnt;
898 for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
900 if (IsAPModeExist(pLoopAdapter)) {
901 if (GetFirstExtAdapter(pLoopAdapter) != NULL &&
902 GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter)
903 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
904 else if (GetFirstGOPort(pLoopAdapter) != NULL &&
905 IsFirstGoAdapter(pLoopAdapter))
906 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
908 if (GetDefaultAdapter(pLoopAdapter) == pLoopAdapter)
909 pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
912 if (pEntry != NULL) {
913 if (pEntry->bAssociated) {
915 RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr);
916 RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n",
917 pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB));
921 if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) ||
922 TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX))
925 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
926 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
927 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
928 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
931 if (curRxOkCnt > (curTxOkCnt * 6))
932 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
935 H2C_Parameter[3] |= RAINFO_BF_STATE;
938 H2C_Parameter[3] |= RAINFO_STBC_STATE;
941 if ( pDM_Odm->NoisyDecision )
943 H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2
946 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
948 if (pDM_Odm->H2C_RARpt_connect)
949 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
952 H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF);
953 //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
954 H2C_Parameter[0] = (pEntry->AssociatedMacId);
956 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
962 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
965 if (tmpEntryMaxPWDB != 0) { // If associated entry is found
966 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
967 RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB));
969 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
971 if (tmpEntryMinPWDB != 0xff) { // If associated entry is found
972 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
973 RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB));
976 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
978 // Indicate Rx signal strength to FW.
979 if (pHalData->bUseRAMask) {
980 PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo);
981 PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo);
986 if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX)) ||
987 TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX))
992 H2C_Parameter[3] |= RAINFO_BF_STATE;
995 H2C_Parameter[3] |= RAINFO_STBC_STATE;
998 if (pDM_Odm->H2C_RARpt_connect)
999 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1001 if ( pDM_Odm->NoisyDecision==1 )
1003 H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2
1004 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] Send H2C to FW\n"));
1007 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1009 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] H2C_Parameter=%x\n", H2C_Parameter[3]));
1012 H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF);
1013 //H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
1014 H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
1016 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1018 // BT 3.0 HS mode Rssi
1019 if (pDM_Odm->bBtHsOperation) {
1020 H2C_Parameter[2] = pDM_Odm->btHsRssi;
1021 //H2C_Parameter[1] = 0x0;
1022 H2C_Parameter[0] = 2;
1024 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1027 PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB);
1029 if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8192E))
1030 odm_RSSIDumpToRegister(pDM_Odm);
1034 PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter);
1035 BOOLEAN default_pointer_value, *pbLink_temp = &default_pointer_value;
1036 s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min;
1037 BOOLEAN bLink = FALSE;
1039 while (pLoopAdapter) {
1040 LocalRSSI_Min = phydm_FindMinimumRSSI(pDM_Odm, pLoopAdapter, pbLink_temp);
1041 //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min);
1042 if ((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0))
1043 GlobalRSSI_min = LocalRSSI_Min;
1048 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1051 pHalData->bLinked = bLink;
1052 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc , ODM_CMNINFO_LINK, (u8Byte)bLink);
1055 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min);
1057 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0);
1061 #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1064 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1066 s8 phydm_rssi_report(PDM_ODM_T pDM_Odm, u8 mac_id)
1068 PADAPTER Adapter = pDM_Odm->Adapter;
1069 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
1070 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1071 u8 H2C_Parameter[4] = {0};
1072 u8 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0;
1073 u8 cmdlen = 4, first_connect = _FALSE;
1074 u64 curTxOkCnt = 0, curRxOkCnt = 0;
1075 PSTA_INFO_T pEntry = pDM_Odm->pODM_StaInfo[mac_id];
1077 if (!IS_STA_VALID(pEntry))
1080 if (mac_id != pEntry->mac_id) {
1081 DBG_871X("%s mac_id:%u:%u invalid\n", __func__, mac_id, pEntry->mac_id);
1086 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1089 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) {
1090 DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, pEntry->mac_id, MAC_ARG(pEntry->hwaddr));
1094 curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes;
1095 curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes;
1096 if (curRxOkCnt > (curTxOkCnt * 6))
1104 STBC_TX = TEST_FLAG(pEntry->htpriv.stbc_cap, STBC_HT_ENABLE_TX);
1107 H2C_Parameter[0] = (u8)(pEntry->mac_id & 0xFF);
1108 H2C_Parameter[2] = pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F;
1111 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1114 H2C_Parameter[3] |= RAINFO_BF_STATE;
1116 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1117 if (pDM_Odm->NoisyDecision)
1118 H2C_Parameter[3] |= RAINFO_NOISY_STATE;
1120 if (pEntry->ra_rpt_linked == _FALSE) {
1121 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1122 pEntry->ra_rpt_linked = _TRUE;
1123 first_connect = _TRUE;
1127 if (first_connect) {
1128 DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__,
1129 pEntry->mac_id, MAC_ARG(pEntry->hwaddr), pEntry->rssi_stat.UndecoratedSmoothedPWDB);
1131 DBG_871X("%s RAINFO - TP:%s, TxBF:%s, STBC:%s, Noisy:%s, Firstcont:%s\n", __func__,
1132 (UL_DL_STATE) ? "DL" : "UL", (TxBF_EN) ? "EN" : "DIS", (STBC_TX) ? "EN" : "DIS",
1133 (pDM_Odm->NoisyDecision) ? "True" : "False", (first_connect) ? "True" : "False");
1137 if (pHalData->fw_ractrl == _TRUE) {
1138 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1144 void phydm_ra_rssi_rpt_wk_hdl(PVOID pContext)
1146 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext;
1149 PSTA_INFO_T pEntry = NULL;
1151 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1152 pEntry = pDM_Odm->pODM_StaInfo[i];
1153 if (IS_STA_VALID(pEntry)) {
1154 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1156 if (pEntry->ra_rpt_linked == _FALSE) {
1163 phydm_rssi_report(pDM_Odm, mac_id);
1165 void phydm_ra_rssi_rpt_wk(PVOID pContext)
1167 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pContext;
1169 rtw_run_in_thread_cmd(pDM_Odm->Adapter, phydm_ra_rssi_rpt_wk_hdl, pDM_Odm);
1174 odm_RSSIMonitorCheckCE(
1178 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1179 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1180 PADAPTER Adapter = pDM_Odm->Adapter;
1181 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1184 int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
1187 if (pDM_Odm->bLinked != _TRUE)
1190 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1191 pEntry = pDM_Odm->pODM_StaInfo[i];
1192 if (IS_STA_VALID(pEntry)) {
1193 if (IS_MCAST(pEntry->hwaddr)) /*if(psta->mac_id ==1)*/
1196 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1))
1199 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
1200 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1202 if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
1203 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1205 if (phydm_rssi_report(pDM_Odm, i))
1209 /*DBG_871X("%s==> sta_cnt(%d)\n", __func__, sta_cnt);*/
1211 if (tmpEntryMaxPWDB != 0) // If associated entry is found
1212 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
1214 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
1216 if (tmpEntryMinPWDB != 0xff) // If associated entry is found
1217 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
1219 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
1221 FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM
1223 pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM;
1224 //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
1225 #endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1230 odm_RSSIMonitorCheckAP(
1234 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1235 #if (RTL8812A_SUPPORT||RTL8881A_SUPPORT||RTL8192E_SUPPORT||RTL8814A_SUPPORT)
1237 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1238 u1Byte H2C_Parameter[4] = {0};
1240 BOOLEAN bExtRAInfo = FALSE;
1242 u1Byte TxBF_EN = 0, stbc_en = 0;
1244 prtl8192cd_priv priv = pDM_Odm->priv;
1246 BOOLEAN act_bfer = FALSE;
1248 if (pDM_Odm->H2C_RARpt_connect) {
1249 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] First Connected\n"));
1251 } else if (priv->up_time % 2)
1254 if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) {
1259 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1260 pstat = pDM_Odm->pODM_StaInfo[i];
1262 if (IS_STA_VALID(pstat)) {
1263 if (pstat->sta_in_firmware != 1)
1269 if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) &&
1270 ((pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_))
1271 #ifdef RTK_AC_SUPPORT
1272 || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_))
1280 if ((pstat->rx_avarage) > ((pstat->tx_avarage) * 6))
1281 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1284 H2C_Parameter[3] |= RAINFO_BF_STATE;
1287 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1290 if ( pDM_Odm->NoisyDecision )
1292 H2C_Parameter[3] |= RAINFO_NOISY_STATE; // BIT2
1295 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1297 if (pDM_Odm->H2C_RARpt_connect) {
1298 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1299 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] set Init rate by RSSI\n"));
1302 /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RAINFO] H2C_Para[3] = %x\n",H2C_Parameter[3]));*/
1305 H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF);
1306 H2C_Parameter[0] = REMAP_AID(pstat);
1308 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
1309 ("H2C_Parameter[3]=%d\n", H2C_Parameter[3]));
1311 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RSSI] H2C_Para[2] = %x, \n",H2C_Parameter[2]));
1312 //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[MACID] H2C_Para[0] = %x, \n",H2C_Parameter[0]));
1314 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1326 odm_RateAdaptiveMaskInit(
1330 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1331 PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive;
1333 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1334 PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo;
1335 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
1337 pMgntInfo->Ratr_State = DM_RATR_STA_INIT;
1339 if (pMgntInfo->DM_Type == DM_Type_ByDriver)
1340 pHalData->bUseRAMask = TRUE;
1342 pHalData->bUseRAMask = FALSE;
1344 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1345 pOdmRA->Type = DM_Type_ByDriver;
1346 if (pOdmRA->Type == DM_Type_ByDriver)
1347 pDM_Odm->bUseRAMask = _TRUE;
1349 pDM_Odm->bUseRAMask = _FALSE;
1352 pOdmRA->RATRState = DM_RATR_STA_INIT;
1354 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
1355 if (pDM_Odm->SupportICType == ODM_RTL8812)
1356 pOdmRA->LdpcThres = 50;
1358 pOdmRA->LdpcThres = 35;
1360 pOdmRA->RtsThres = 35;
1362 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
1363 pOdmRA->LdpcThres = 35;
1364 pOdmRA->bUseLdpc = FALSE;
1367 pOdmRA->UltraLowRSSIThresh = 9;
1371 pOdmRA->HighRSSIThresh = 50;
1372 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
1373 ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
1374 pOdmRA->LowRSSIThresh = 23;
1376 pOdmRA->LowRSSIThresh = 20;
1379 /*-----------------------------------------------------------------------------
1380 * Function: odm_RefreshRateAdaptiveMask()
1382 * Overview: Update rate table mask according to rssi
1392 * 05/27/2009 hpfan Create Version 0.
1394 *---------------------------------------------------------------------------*/
1396 odm_RefreshRateAdaptiveMask(
1400 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1401 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n"));
1402 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) {
1403 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n"));
1407 // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
1408 // at the same time. In the stage2/3, we need to prive universal interface and merge all
1409 // HW dynamic mechanism.
1411 switch (pDM_Odm->SupportPlatform) {
1413 odm_RefreshRateAdaptiveMaskMP(pDM_Odm);
1417 odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
1422 odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm);
1429 odm_RefreshRateAdaptiveMaskMP(
1433 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1434 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1435 PADAPTER pAdapter = pDM_Odm->Adapter;
1436 PADAPTER pTargetAdapter = NULL;
1437 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1438 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter);
1440 if (pAdapter->bDriverStopped) {
1441 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
1445 if (!pHalData->bUseRAMask) {
1446 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
1450 // if default port is connected, update RA table for default port (infrastructure mode only)
1451 if (pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) {
1452 odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB);
1453 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n"));
1454 if (ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State)) {
1455 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
1456 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State));
1457 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1458 } else if (pDM_Odm->bChangeState) {
1459 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
1460 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1461 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1466 // The following part configure AP/VWifi/IBSS rate adaptive mask.
1469 if (pMgntInfo->mIbss) // Target: AP/IBSS peer.
1470 pTargetAdapter = GetDefaultAdapter(pAdapter);
1472 pTargetAdapter = GetFirstAPAdapter(pAdapter);
1474 // if extension port (softap) is started, updaet RA table for more than one clients associate
1475 if (pTargetAdapter != NULL) {
1477 PRT_WLAN_STA pEntry;
1479 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1480 pEntry = AsocEntry_EnumStation(pTargetAdapter, i);
1481 if (NULL != pEntry) {
1482 if (pEntry->bAssociated) {
1483 odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB);
1485 if (ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State)) {
1486 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr);
1487 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State));
1488 pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State);
1489 } else if (pDM_Odm->bChangeState) {
1490 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1491 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1498 if (pMgntInfo->bSetTXPowerTrainingByOid)
1499 pMgntInfo->bSetTXPowerTrainingByOid = FALSE;
1500 #endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1505 odm_RefreshRateAdaptiveMaskCE(
1509 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1510 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1512 PADAPTER pAdapter = pDM_Odm->Adapter;
1513 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
1515 if (RTW_CANNOT_RUN(pAdapter)) {
1516 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
1520 if (!pDM_Odm->bUseRAMask) {
1521 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
1525 //printk("==> %s \n",__FUNCTION__);
1527 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1528 PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i];
1529 if (IS_STA_VALID(pstat)) {
1530 if (IS_MCAST(pstat->hwaddr)) //if(psta->mac_id ==1)
1533 #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1))
1534 if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8821)) {
1535 if (pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) {
1536 pRA->bUseLdpc = TRUE;
1537 pRA->bLowerRtsRate = TRUE;
1538 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
1539 Set_RA_LDPC_8812(pstat, TRUE);
1540 //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB);
1541 } else if (pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres - 5)) {
1542 pRA->bUseLdpc = FALSE;
1543 pRA->bLowerRtsRate = FALSE;
1544 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
1545 Set_RA_LDPC_8812(pstat, FALSE);
1546 //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB);
1551 if (TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level)) {
1552 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level));
1553 //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level);
1554 rtw_hal_update_ra_mask(pstat, pstat->rssi_level);
1555 } else if (pDM_Odm->bChangeState) {
1556 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1557 rtw_hal_update_ra_mask(pstat, pstat->rssi_level);
1567 odm_RefreshRateAdaptiveMaskAPADSL(
1571 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
1572 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1573 struct rtl8192cd_priv *priv = pDM_Odm->priv;
1574 struct aid_obj *aidarray;
1578 if (priv->up_time % 2)
1581 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1582 pstat = pDM_Odm->pODM_StaInfo[i];
1584 if (IS_STA_VALID(pstat)) {
1585 #if defined(UNIVERSAL_REPEATER) || defined(MBSSID)
1586 aidarray = container_of(pstat, struct aid_obj, station);
1587 priv = aidarray->priv;
1590 if (!priv->pmib->dot11StationConfigEntry.autoRate)
1593 if (ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level)) {
1594 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr);
1595 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level));
1597 #ifdef CONFIG_WLAN_HAL
1598 if (IS_HAL_CHIP(priv)) {
1600 // if(!(pstat->state & WIFI_WDS))//if WDS donot setting
1602 GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level);
1605 #ifdef CONFIG_RTL_8812_SUPPORT
1606 if (GET_CHIP_VER(priv) == VERSION_8812E)
1607 UpdateHalRAMask8812(priv, pstat, 3);
1610 #ifdef CONFIG_RTL_88E_SUPPORT
1611 if (GET_CHIP_VER(priv) == VERSION_8188E) {
1613 add_RATid(priv, pstat);
1618 #if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT)
1619 add_update_RATid(priv, pstat);
1629 // Return Value: BOOLEAN
1630 // - TRUE: RATRState is changed.
1635 IN BOOLEAN bForceUpdate,
1636 OUT pu1Byte pRATRState
1639 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1640 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
1641 const u1Byte GoUpGap = 5;
1642 u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh;
1643 u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh;
1645 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", RSSI, *pRATRState));
1646 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Ori RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
1647 // Threshold Adjustment:
1648 // when RSSI state trends to go up one or two levels, make sure RSSI is high enough.
1649 // Here GoUpGap is added to solve the boundary's level alternation issue.
1650 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1651 u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh;
1652 if (pDM_Odm->SupportICType == ODM_RTL8881A)
1653 LowRSSIThreshForRA = 30; // for LDPC / BCC switch
1656 switch (*pRATRState) {
1657 case DM_RATR_STA_INIT:
1658 case DM_RATR_STA_HIGH:
1661 case DM_RATR_STA_MIDDLE:
1662 HighRSSIThreshForRA += GoUpGap;
1665 case DM_RATR_STA_LOW:
1666 HighRSSIThreshForRA += GoUpGap;
1667 LowRSSIThreshForRA += GoUpGap;
1670 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1671 case DM_RATR_STA_ULTRA_LOW:
1672 HighRSSIThreshForRA += GoUpGap;
1673 LowRSSIThreshForRA += GoUpGap;
1674 UltraLowRSSIThreshForRA += GoUpGap;
1679 ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState));
1683 // Decide RATRState by RSSI.
1684 if (RSSI > HighRSSIThreshForRA)
1685 RATRState = DM_RATR_STA_HIGH;
1686 else if (RSSI > LowRSSIThreshForRA)
1687 RATRState = DM_RATR_STA_MIDDLE;
1689 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1690 else if (RSSI > UltraLowRSSIThreshForRA)
1691 RATRState = DM_RATR_STA_LOW;
1693 RATRState = DM_RATR_STA_ULTRA_LOW;
1696 RATRState = DM_RATR_STA_LOW;
1698 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Mod RA RSSI Thresh] High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
1699 /*printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI);*/
1701 if (*pRATRState != RATRState || bForceUpdate) {
1702 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[RSSI Level Update] %d -> %d\n", *pRATRState, RATRState));
1703 *pRATRState = RATRState;
1711 odm_RefreshBasicRateMask(
1715 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1716 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1717 PADAPTER Adapter = pDM_Odm->Adapter;
1718 static u1Byte Stage = 0;
1719 u1Byte CurStage = 0;
1720 OCTET_STRING osRateSet;
1721 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter);
1722 u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M};
1724 if (pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821)
1727 if (pDM_Odm->bLinked == FALSE) // unlink Default port information
1729 else if (pDM_Odm->RSSI_Min < 40) // link RSSI < 40%
1731 else if (pDM_Odm->RSSI_Min > 45) // link RSSI > 45%
1734 CurStage = 2; // link 25% <= RSSI <= 30%
1736 if (CurStage != Stage) {
1737 if (CurStage == 1) {
1738 FillOctetString(osRateSet, RateSet, 5);
1739 FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE);
1740 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet);
1741 } else if (CurStage == 3 && (Stage == 1 || Stage == 2))
1742 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates));
1755 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1757 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
1758 phydm_ra_dynamic_retry_limit_init(pDM_Odm);
1760 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1761 phydm_ra_dynamic_rate_id_init(pDM_Odm);
1764 /*phydm_fw_trace_en_h2c(pDM_Odm, 1, 0, 0);*/
1768 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1773 IN BOOLEAN bErpProtect
1776 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1777 u1Byte RTS_Ini_Rate = ODM_RATE6M;
1779 if (bErpProtect) /* use CCK rate as RTS*/
1780 RTS_Ini_Rate = ODM_RATE1M;
1783 case ODM_RATEVHTSS3MCS9:
1784 case ODM_RATEVHTSS3MCS8:
1785 case ODM_RATEVHTSS3MCS7:
1786 case ODM_RATEVHTSS3MCS6:
1787 case ODM_RATEVHTSS3MCS5:
1788 case ODM_RATEVHTSS3MCS4:
1789 case ODM_RATEVHTSS3MCS3:
1790 case ODM_RATEVHTSS2MCS9:
1791 case ODM_RATEVHTSS2MCS8:
1792 case ODM_RATEVHTSS2MCS7:
1793 case ODM_RATEVHTSS2MCS6:
1794 case ODM_RATEVHTSS2MCS5:
1795 case ODM_RATEVHTSS2MCS4:
1796 case ODM_RATEVHTSS2MCS3:
1797 case ODM_RATEVHTSS1MCS9:
1798 case ODM_RATEVHTSS1MCS8:
1799 case ODM_RATEVHTSS1MCS7:
1800 case ODM_RATEVHTSS1MCS6:
1801 case ODM_RATEVHTSS1MCS5:
1802 case ODM_RATEVHTSS1MCS4:
1803 case ODM_RATEVHTSS1MCS3:
1818 RTS_Ini_Rate = ODM_RATE24M;
1820 case ODM_RATEVHTSS3MCS2:
1821 case ODM_RATEVHTSS3MCS1:
1822 case ODM_RATEVHTSS2MCS2:
1823 case ODM_RATEVHTSS2MCS1:
1824 case ODM_RATEVHTSS1MCS2:
1825 case ODM_RATEVHTSS1MCS1:
1832 RTS_Ini_Rate = ODM_RATE12M;
1834 case ODM_RATEVHTSS3MCS0:
1835 case ODM_RATEVHTSS2MCS0:
1836 case ODM_RATEVHTSS1MCS0:
1841 RTS_Ini_Rate = ODM_RATE6M;
1847 RTS_Ini_Rate = ODM_RATE1M;
1850 RTS_Ini_Rate = ODM_RATE6M;
1855 if (*pDM_Odm->pBandType == 1) {
1856 if (RTS_Ini_Rate < ODM_RATE6M)
1857 RTS_Ini_Rate = ODM_RATE6M;
1859 return RTS_Ini_Rate;
1864 odm_Set_RA_DM_ARFB_by_Noisy(
1865 IN PDM_ODM_T pDM_Odm
1868 /*DbgPrint("DM_ARFB ====>\n");*/
1869 if (pDM_Odm->bNoisyState) {
1870 ODM_Write4Byte(pDM_Odm, 0x430, 0x00000000);
1871 ODM_Write4Byte(pDM_Odm, 0x434, 0x05040200);
1872 /*DbgPrint("DM_ARFB ====> Noisy State\n");*/
1874 ODM_Write4Byte(pDM_Odm, 0x430, 0x02010000);
1875 ODM_Write4Byte(pDM_Odm, 0x434, 0x07050403);
1876 /*DbgPrint("DM_ARFB ====> Clean State\n");*/
1882 ODM_UpdateNoisyState(
1884 IN BOOLEAN bNoisyStateFromC2H
1887 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1889 /*DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);*/
1890 if (pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 ||
1891 pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E)
1892 pDM_Odm->bNoisyState = bNoisyStateFromC2H;
1893 odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm);
1897 Set_RA_DM_Ratrbitmap_by_Noisy(
1899 IN WIRELESS_MODE WirelessMode,
1900 IN u4Byte ratr_bitmap,
1901 IN u1Byte rssi_level
1904 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1905 u4Byte ret_bitmap = ratr_bitmap;
1909 switch (WirelessMode) {
1910 case WIRELESS_MODE_AC_24G:
1911 case WIRELESS_MODE_AC_5G:
1912 case WIRELESS_MODE_AC_ONLY:
1913 if (pDM_Odm->bNoisyState) { /*in Noisy State*/
1914 if (rssi_level == 1)
1915 ret_bitmap &= 0xfc3e0c08; // Reserve MCS 5-9
1916 else if (rssi_level == 2)
1917 ret_bitmap &= 0xfe3f8e08; // Reserve MCS 3-9
1918 else if (rssi_level == 3)
1919 ret_bitmap &= 0xffffffff;
1921 ret_bitmap &= 0xffffffff;
1922 } else { /* in SNR State*/
1923 if (rssi_level == 1)
1924 ret_bitmap &= 0xfe3f0e08; // Reserve MCS 4-9
1925 else if (rssi_level == 2)
1926 ret_bitmap &= 0xff3fcf8c; // Reserve MCS 2-9
1927 else if (rssi_level == 3)
1928 ret_bitmap &= 0xffffffff;
1930 ret_bitmap &= 0xffffffff;
1933 case WIRELESS_MODE_B:
1934 case WIRELESS_MODE_A:
1935 case WIRELESS_MODE_G:
1936 case WIRELESS_MODE_N_24G:
1937 case WIRELESS_MODE_N_5G:
1938 if (pDM_Odm->bNoisyState) {
1939 if (rssi_level == 1)
1940 ret_bitmap &= 0x0f0e0c08; // Reserve MCS 4-7; MCS12-15
1941 else if (rssi_level == 2)
1942 ret_bitmap &= 0x0fcfce0c; // Reserve MCS 2-7; MCS10-15
1943 else if (rssi_level == 3)
1944 ret_bitmap &= 0xffffffff;
1946 ret_bitmap &= 0xffffffff;
1948 if (rssi_level == 1)
1949 ret_bitmap &= 0x0f8f8e08; // Reserve MCS 3-7; MCS11-15
1950 else if (rssi_level == 2)
1951 ret_bitmap &= 0x0fefef8c; // Reserve MCS 1-7; MCS9-15
1952 else if (rssi_level == 3)
1953 ret_bitmap &= 0xffffffff;
1955 ret_bitmap &= 0xffffffff;
1961 /*DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x\n", rssi_level, ret_bitmap);*/
1972 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
1975 ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Get C2H Command! Rate=0x%x\n", Rate));
1977 pDM_Odm->TxRate = Rate;
1978 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1979 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
1981 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
1983 if (pDM_Odm->SupportICType == ODM_RTL8821) {
1984 #if (RTL8821A_SUPPORT == 1)
1985 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1987 } else if (pDM_Odm->SupportICType == ODM_RTL8812) {
1988 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) {
1989 #if (RTL8812A_SUPPORT == 1)
1990 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
1993 } else if (pDM_Odm->SupportICType == ODM_RTL8723B) {
1994 #if (RTL8723B_SUPPORT == 1)
1995 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1997 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
1998 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) {
1999 #if (RTL8192E_SUPPORT == 1)
2000 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2003 } else if (pDM_Odm->SupportICType == ODM_RTL8188E) {
2004 #if (RTL8188E_SUPPORT == 1)
2005 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2010 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2016 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2019 odm_RSSIDumpToRegister(
2023 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2024 PADAPTER Adapter = pDM_Odm->Adapter;
2026 if (pDM_Odm->SupportICType == ODM_RTL8812) {
2027 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]);
2028 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]);
2031 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]);
2032 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]);
2035 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2036 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2039 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]);
2040 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]);
2043 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]);
2044 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]);
2045 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
2046 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]);
2047 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]);
2049 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]);
2050 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]);
2052 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2053 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2055 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]);
2056 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]);
2058 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]);
2059 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]);
2064 odm_RefreshLdpcRtsMP(
2065 IN PADAPTER pAdapter,
2066 IN PDM_ODM_T pDM_Odm,
2069 IN s4Byte UndecoratedSmoothedPWDB
2072 BOOLEAN bCtlLdpc = FALSE;
2073 PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter);
2074 PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
2076 if (pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812)
2079 if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
2081 else if (pDM_Odm->SupportICType == ODM_RTL8812 &&
2082 IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP)
2086 if (UndecoratedSmoothedPWDB < (pRA->LdpcThres - 5))
2087 MgntSet_TX_LDPC(pAdapter, mMacId, TRUE);
2088 else if (UndecoratedSmoothedPWDB > pRA->LdpcThres)
2089 MgntSet_TX_LDPC(pAdapter, mMacId, FALSE);
2092 if (UndecoratedSmoothedPWDB < (pRA->RtsThres - 5))
2093 pRA->bLowerRtsRate = TRUE;
2094 else if (UndecoratedSmoothedPWDB > pRA->RtsThres)
2095 pRA->bLowerRtsRate = FALSE;
2099 ODM_DynamicARFBSelect(
2102 IN BOOLEAN Collision_State
2105 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2106 pRA_T pRA_Table = &pDM_Odm->DM_RA_Table;
2108 if (pDM_Odm->SupportICType != ODM_RTL8192E)
2111 if (Collision_State == pRA_Table->PT_collision_pre)
2114 if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12) {
2115 if (Collision_State == 1) {
2116 if (rate == DESC_RATEMCS12) {
2118 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2119 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501);
2120 } else if (rate == DESC_RATEMCS11) {
2122 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2123 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605);
2124 } else if (rate == DESC_RATEMCS10) {
2126 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2127 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706);
2128 } else if (rate == DESC_RATEMCS9) {
2130 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2131 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707);
2134 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2135 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808);
2137 } else { /* Collision_State == 0*/
2138 if (rate == DESC_RATEMCS12) {
2140 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000);
2141 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2142 } else if (rate == DESC_RATEMCS11) {
2144 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000);
2145 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807);
2146 } else if (rate == DESC_RATEMCS10) {
2148 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000);
2149 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908);
2150 } else if (rate == DESC_RATEMCS9) {
2152 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000);
2153 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808);
2156 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000);
2157 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909);
2160 } else { /* MCS13~MCS15, 1SS, G-mode*/
2161 if (Collision_State == 1) {
2162 if (rate == DESC_RATEMCS15) {
2164 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2165 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302);
2166 } else if (rate == DESC_RATEMCS14) {
2168 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2169 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302);
2170 } else if (rate == DESC_RATEMCS13) {
2172 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2173 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502);
2176 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2177 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402);
2179 } else { // Collision_State == 0
2180 if (rate == DESC_RATEMCS15) {
2182 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2183 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504);
2184 } else if (rate == DESC_RATEMCS14) {
2186 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2187 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2188 } else if (rate == DESC_RATEMCS13) {
2190 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000);
2191 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2194 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000);
2195 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2202 pRA_Table->PT_collision_pre = Collision_State;
2206 ODM_RateAdaptiveStateApInit(
2207 IN PVOID PADAPTER_VOID,
2208 IN PRT_WLAN_STA pEntry
2211 PADAPTER Adapter = (PADAPTER)PADAPTER_VOID;
2212 pEntry->Ratr_State = DM_RATR_STA_INIT;
2214 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
2218 IN PADAPTER pAdapter
2221 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
2222 PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
2224 /*Determine the minimum RSSI*/
2226 if ((pDM_Odm->bLinked != _TRUE) &&
2227 (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) {
2228 pHalData->MinUndecoratedPWDBForDM = 0;
2229 /*ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any\n"));*/
2231 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
2233 /*DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);*/
2234 /*ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));*/
2238 PhyDM_Get_Rate_Bitmap_Ex(
2242 IN u1Byte rssi_level,
2243 OUT u8Byte *dm_RA_Mask,
2244 OUT u1Byte *dm_RteID
2247 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2249 u8Byte rate_bitmap = 0;
2250 u1Byte WirelessMode;
2252 pEntry = pDM_Odm->pODM_StaInfo[macid];
2253 if (!IS_STA_VALID(pEntry))
2255 WirelessMode = pEntry->wireless_mode;
2256 switch (WirelessMode) {
2258 if (ra_mask & 0x000000000000000c) /* 11M or 5.5M enable */
2259 rate_bitmap = 0x000000000000000d;
2261 rate_bitmap = 0x000000000000000f;
2266 if (rssi_level == DM_RATR_STA_HIGH)
2267 rate_bitmap = 0x0000000000000f00;
2269 rate_bitmap = 0x0000000000000ff0;
2272 case (ODM_WM_B|ODM_WM_G):
2273 if (rssi_level == DM_RATR_STA_HIGH)
2274 rate_bitmap = 0x0000000000000f00;
2275 else if (rssi_level == DM_RATR_STA_MIDDLE)
2276 rate_bitmap = 0x0000000000000ff0;
2278 rate_bitmap = 0x0000000000000ff5;
2281 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
2282 case (ODM_WM_B|ODM_WM_N24G):
2283 case (ODM_WM_G|ODM_WM_N24G):
2284 case (ODM_WM_A|ODM_WM_N5G): {
2285 if (pDM_Odm->RFType == ODM_1T1R) {
2286 if (rssi_level == DM_RATR_STA_HIGH)
2287 rate_bitmap = 0x00000000000f0000;
2288 else if (rssi_level == DM_RATR_STA_MIDDLE)
2289 rate_bitmap = 0x00000000000ff000;
2291 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2292 rate_bitmap = 0x00000000000ff015;
2294 rate_bitmap = 0x00000000000ff005;
2300 case (ODM_WM_AC|ODM_WM_G):
2301 if (rssi_level == 1)
2302 rate_bitmap = 0x00000000fc3f0000;
2303 else if (rssi_level == 2)
2304 rate_bitmap = 0x00000000fffff000;
2306 rate_bitmap = 0x00000000ffffffff;
2309 case (ODM_WM_AC|ODM_WM_A):
2311 if (pDM_Odm->RFType == ODM_1T1R) {
2312 if (rssi_level == 1) /* add by Gary for ac-series */
2313 rate_bitmap = 0x00000000003f8000;
2314 else if (rssi_level == 2)
2315 rate_bitmap = 0x00000000003fe000;
2317 rate_bitmap = 0x00000000003ff010;
2322 if (pDM_Odm->RFType == ODM_1T1R)
2323 rate_bitmap = 0x00000000000fffff;
2327 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%016llx\n", rssi_level, WirelessMode, rate_bitmap));
2329 return (ra_mask & rate_bitmap);
2334 ODM_Get_Rate_Bitmap(
2338 IN u1Byte rssi_level
2341 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2343 u4Byte rate_bitmap = 0;
2344 u1Byte WirelessMode;
2345 //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode);
2348 pEntry = pDM_Odm->pODM_StaInfo[macid];
2349 if (!IS_STA_VALID(pEntry))
2352 WirelessMode = pEntry->wireless_mode;
2354 switch (WirelessMode) {
2356 if (ra_mask & 0x0000000c) //11M or 5.5M enable
2357 rate_bitmap = 0x0000000d;
2359 rate_bitmap = 0x0000000f;
2364 if (rssi_level == DM_RATR_STA_HIGH)
2365 rate_bitmap = 0x00000f00;
2367 rate_bitmap = 0x00000ff0;
2370 case (ODM_WM_B|ODM_WM_G):
2371 if (rssi_level == DM_RATR_STA_HIGH)
2372 rate_bitmap = 0x00000f00;
2373 else if (rssi_level == DM_RATR_STA_MIDDLE)
2374 rate_bitmap = 0x00000ff0;
2376 rate_bitmap = 0x00000ff5;
2379 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) :
2380 case (ODM_WM_B|ODM_WM_N24G) :
2381 case (ODM_WM_G|ODM_WM_N24G) :
2382 case (ODM_WM_A|ODM_WM_N5G) : {
2383 if (pDM_Odm->RFType == ODM_1T1R) {
2384 if (rssi_level == DM_RATR_STA_HIGH)
2385 rate_bitmap = 0x000f0000;
2386 else if (rssi_level == DM_RATR_STA_MIDDLE)
2387 rate_bitmap = 0x000ff000;
2389 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2390 rate_bitmap = 0x000ff015;
2392 rate_bitmap = 0x000ff005;
2398 case (ODM_WM_AC|ODM_WM_G):
2399 if (rssi_level == 1)
2400 rate_bitmap = 0xfc3f0000;
2401 else if (rssi_level == 2)
2402 rate_bitmap = 0xfffff000;
2404 rate_bitmap = 0xffffffff;
2407 case (ODM_WM_AC|ODM_WM_A):
2409 if (pDM_Odm->RFType == RF_1T1R) {
2410 if (rssi_level == 1) // add by Gary for ac-series
2411 rate_bitmap = 0x003f8000;
2412 else if (rssi_level == 2)
2413 rate_bitmap = 0x003ff000;
2415 rate_bitmap = 0x003ff010;
2420 rate_bitmap = 0x0fffffff;
2425 DBG_871X("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap);
2426 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap));
2428 return (ra_mask & rate_bitmap);
2432 #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2434 #endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/