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Add rtl8723bu driver version 4.4.5
[android-x86/external-kernel-drivers.git] / rtl8723bu / hal / phydm / phydm_rainfo.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  *
19  ******************************************************************************/
20
21 //============================================================
22 // include files
23 //============================================================
24 #include "mp_precomp.h"
25 #include "phydm_precomp.h"
26
27 #if (defined(CONFIG_RA_DBG_CMD))
28 VOID
29 ODM_C2HRaParaReportHandler(
30         IN      PVOID   pDM_VOID,
31         IN pu1Byte   CmdBuf,
32         IN u1Byte   CmdLen
33 )
34 {
35         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
36         pRA_T               pRA_Table = &pDM_Odm->DM_RA_Table;
37
38         u1Byte  para_idx = CmdBuf[0]; //Retry Penalty, NH, NL
39         u1Byte  RateTypeStart = CmdBuf[1];
40         u1Byte  RateTypeLength = CmdLen - 2;
41         u1Byte  i;
42
43         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[ From FW C2H RA Para ]  CmdBuf[0]= (( %d ))\n", CmdBuf[0]));
44
45         if (para_idx == RADBG_RTY_PENALTY) {
46                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index|   |RTY Penality Index| \n"));
47
48                 for (i = 0 ; i < (RateTypeLength) ; i++) {
49                         if (pRA_Table->is_ra_dbg_init)
50                                 pRA_Table->RTY_P_default[RateTypeStart + i] = CmdBuf[2 + i];
51
52                         pRA_Table->RTY_P[RateTypeStart + i] = CmdBuf[2 + i];
53                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d  %15d \n", (RateTypeStart + i), pRA_Table->RTY_P[RateTypeStart + i]));
54                 }
55
56         } else  if (para_idx == RADBG_N_HIGH) {
57                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index|    |N-High| \n"));
58
59
60         } else  if (para_idx == RADBG_N_LOW){
61                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index|   |N-Low| \n"));
62
63         }
64         else     if (para_idx == RADBG_RATE_UP_RTY_RATIO) {
65                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index|   |Rate Up RTY Ratio| \n"));
66
67                 for (i = 0 ; i < (RateTypeLength) ; i++) {
68                         if (pRA_Table->is_ra_dbg_init)
69                                 pRA_Table->RATE_UP_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
70
71                         pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
72                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d  %15d \n", (RateTypeStart + i), pRA_Table->RATE_UP_RTY_RATIO[RateTypeStart + i]));
73                 }
74         } else   if (para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
75                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate Index|   |Rate Down RTY Ratio| \n"));
76
77                 for (i = 0 ; i < (RateTypeLength) ; i++) {
78                         if (pRA_Table->is_ra_dbg_init)
79                                 pRA_Table->RATE_DOWN_RTY_RATIO_default[RateTypeStart + i] = CmdBuf[2 + i];
80
81                         pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i] = CmdBuf[2 + i];
82                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("%8d  %15d \n", (RateTypeStart + i), pRA_Table->RATE_DOWN_RTY_RATIO[RateTypeStart + i]));
83                 }
84         } else   if (para_idx == RADBG_DEBUG_MONITOR1) {
85                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
86                 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
87
88                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "RSSI =", CmdBuf[1]));
89                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "Rate =", CmdBuf[2] & 0x7f));
90                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "SGI =", (CmdBuf[2] & 0x80) >> 7));
91                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "BW =", CmdBuf[3]));
92                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "BW_max =", CmdBuf[4]));
93                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "multi_rate0 =", CmdBuf[5]));
94                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "multi_rate1 =", CmdBuf[6]));
95                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "DISRA =",       CmdBuf[7]));
96                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "VHT_EN =", CmdBuf[8]));
97                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "SGI_support =", CmdBuf[9]));
98                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "try_ness =", CmdBuf[10]));
99                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "pre_rate =", CmdBuf[11]));
100                 } else {
101                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "RSSI =", CmdBuf[1]));
102                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %x \n", "BW =", CmdBuf[2]));
103                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "DISRA =", CmdBuf[3]));
104                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "VHT_EN =", CmdBuf[4]));
105                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "Hightest Rate =", CmdBuf[5]));
106                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "Lowest Rate =", CmdBuf[6]));
107                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "SGI_support =", CmdBuf[7]));
108                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "Rate_ID =",     CmdBuf[8]));;
109                 }
110                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
111         } else   if (para_idx == RADBG_DEBUG_MONITOR2) {
112                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
113                 if (pDM_Odm->SupportICType & PHYDM_IC_3081_SERIES) {
114                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %d \n", "RateID =", CmdBuf[1]));
115                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "highest_rate =", CmdBuf[2]));
116                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  0x%x \n", "lowest_rate =", CmdBuf[3]));
117
118                         for (i = 4 ; i <= 11 ; i++)
119                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("RAMASK =  0x%x \n", CmdBuf[i]));
120                 } else {
121                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  %x%x  %x%x  %x%x  %x%x \n", "RA Mask:",
122                                                  CmdBuf[8], CmdBuf[7], CmdBuf[6], CmdBuf[5], CmdBuf[4], CmdBuf[3], CmdBuf[2], CmdBuf[1]));
123                 }
124                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("-------------------------------\n"));
125         } else   if (para_idx == RADBG_DEBUG_MONITOR3) {
126
127                 for (i = 0 ; i < (CmdLen - 1) ; i++)
128                         ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("content[%d] =  %d \n", i, CmdBuf[1 + i]));
129         } else   if (para_idx == RADBG_DEBUG_MONITOR4)
130                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("%5s  {%d.%d} \n", "RA Version =", CmdBuf[1], CmdBuf[2]));
131
132 }
133
134 VOID
135 odm_RA_ParaAdjust_Send_H2C(
136         IN      PVOID   pDM_VOID
137 )
138 {
139
140         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
141         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
142         u1Byte                  H2C_Parameter[6] = {0};
143
144         H2C_Parameter[0] =  RA_FIRST_MACID;
145
146         //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("RA_Para_feedback_req= (( %d ))  \n",pRA_Table->RA_Para_feedback_req ));
147         if (pRA_Table->RA_Para_feedback_req) { //H2C_Parameter[5]=1 ; ask FW for all RA parameters
148                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Ask FW for RA parameter \n"));
149                 H2C_Parameter[5] |= BIT1; //ask FW to report RA parameters
150                 H2C_Parameter[1] =  pRA_Table->para_idx; //pRA_Table->para_idx;
151                 pRA_Table->RA_Para_feedback_req = 0;
152         } else {
153                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[H2C] Send H2C to FW for modifying RA parameter \n"));
154
155                 H2C_Parameter[1] =  pRA_Table->para_idx;
156                 H2C_Parameter[2] =  pRA_Table->rate_idx;
157                 //1 [8 bit]
158                 if (pRA_Table->para_idx == RADBG_RTY_PENALTY || pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO || pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
159                         H2C_Parameter[3] = pRA_Table->value;
160                         H2C_Parameter[4] = 0;
161                 }
162                 //1 [16 bit]
163                 else { //if ((pRA_Table->rate_idx==RADBG_N_HIGH)||(pRA_Table->rate_idx==RADBG_N_LOW))
164                         H2C_Parameter[3] = (u1Byte)(((pRA_Table->value_16) & 0xf0) >> 4); //byte1
165                         H2C_Parameter[4] = (u1Byte)((pRA_Table->value_16) & 0x0f);         //byte0
166                 }
167         }
168         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[1] = 0x%x  \n", H2C_Parameter[1]));
169         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[2] = 0x%x  \n", H2C_Parameter[2]));
170         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[3] = 0x%x  \n", H2C_Parameter[3]));
171         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[4] = 0x%x  \n", H2C_Parameter[4]));
172         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" H2C_Parameter[5] = 0x%x  \n", H2C_Parameter[5]));
173
174         ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RA_PARA_ADJUST, 6, H2C_Parameter);
175
176 }
177
178
179 VOID
180 odm_RA_ParaAdjust(
181         IN              PVOID           pDM_VOID
182 )
183 {
184         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
185         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
186         u1Byte                  para_idx = pRA_Table->para_idx;
187         u1Byte                  rate_idx = pRA_Table->rate_idx;
188         u1Byte                  value = pRA_Table->value;
189         u1Byte                  Pre_value = 0xff;
190
191         BOOLEAN                 sign = 0;
192
193         if (pRA_Table->para_idx == RADBG_RTY_PENALTY) {
194                 Pre_value = pRA_Table->RTY_P[rate_idx];
195                 pRA_Table->RTY_P[rate_idx] = value;
196                 pRA_Table->RTY_P_modify_note[rate_idx] = 1;
197         } else  if (pRA_Table->para_idx == RADBG_N_HIGH) {
198
199         } else  if (pRA_Table->para_idx == RADBG_N_LOW) {
200
201         } else   if (pRA_Table->para_idx == RADBG_RATE_UP_RTY_RATIO) {
202                 Pre_value = pRA_Table->RATE_UP_RTY_RATIO[rate_idx];
203                 pRA_Table->RATE_UP_RTY_RATIO[rate_idx] = value;
204                 pRA_Table->RATE_UP_RTY_RATIO_modify_note[rate_idx] = 1;
205         } else   if (pRA_Table->para_idx == RADBG_RATE_DOWN_RTY_RATIO) {
206                 Pre_value = pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx];
207                 pRA_Table->RATE_DOWN_RTY_RATIO[rate_idx] = value;
208                 pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[rate_idx] = 1;
209         }
210         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("  Change RA Papa[%d], Rate[ %d ],   ((%d))  ->  ((%d)) \n", pRA_Table->para_idx, rate_idx, Pre_value, value));
211         odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
212 }
213
214
215 VOID
216 phydm_ra_print_msg(
217         IN              PVOID           pDM_VOID,
218         IN              u1Byte          *value,
219         IN              u1Byte          *value_default,
220         IN              u1Byte          *modify_note
221 )
222 {
223         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
224         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
225         u4Byte i;
226
227         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" |Rate index| |Current-value| |Default-value| |Modify?| \n"));
228         for (i = 0 ; i <= (pRA_Table->rate_length); i++) {
229 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
230                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("     [ %d ]  %20d  %25d  %20s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " .  ")));
231 #else
232                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("     [ %d ]  %10d  %14d  %14s \n", i, value[i], value_default[i], ((modify_note[i] == 1) ? "V" : " .  ")));
233 #endif
234         }
235
236 }
237
238 VOID
239 odm_RA_debug(
240         IN              PVOID           pDM_VOID,
241         IN              u4Byte          *const dm_value
242 )
243 {
244         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
245         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
246
247         pRA_Table->is_ra_dbg_init = FALSE;
248
249         if (dm_value[0] == 100) { /*1 Print RA Parameters*/
250                 u1Byte  default_pointer_value;
251                 u1Byte  *pvalue;
252                 u1Byte  *pvalue_default;
253                 u1Byte  *pmodify_note;
254
255                 pvalue = pvalue_default = pmodify_note = &default_pointer_value;
256
257                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n"));
258
259                 if (dm_value[1] == RADBG_RTY_PENALTY) { /* [1]*/
260                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [1] RTY_PENALTY\n"));
261                         pvalue          =       &(pRA_Table->RTY_P[0]);
262                         pvalue_default  =       &(pRA_Table->RTY_P_default[0]);
263                         pmodify_note    =       (u1Byte *)&(pRA_Table->RTY_P_modify_note[0]);
264                 } else if (dm_value[1] == RADBG_N_HIGH) { /* [2]*/
265                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [2] N_HIGH\n"));
266
267                 } else if (dm_value[1] == RADBG_N_LOW) { /*[3]*/
268                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [3] N_LOW\n"));
269
270                 } else if (dm_value[1] == RADBG_RATE_UP_RTY_RATIO) { /* [8]*/
271                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [8] RATE_UP_RTY_RATIO\n"));
272                         pvalue          =       &(pRA_Table->RATE_UP_RTY_RATIO[0]);
273                         pvalue_default  =       &(pRA_Table->RATE_UP_RTY_RATIO_default[0]);
274                         pmodify_note    =       (u1Byte *)&(pRA_Table->RATE_UP_RTY_RATIO_modify_note[0]);
275                 } else if (dm_value[1] == RADBG_RATE_DOWN_RTY_RATIO) { /* [9]*/
276                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" [9] RATE_DOWN_RTY_RATIO\n"));
277                         pvalue          =       &(pRA_Table->RATE_DOWN_RTY_RATIO[0]);
278                         pvalue_default  =       &(pRA_Table->RATE_DOWN_RTY_RATIO_default[0]);
279                         pmodify_note    =       (u1Byte *)&(pRA_Table->RATE_DOWN_RTY_RATIO_modify_note[0]);
280                 }
281
282                 phydm_ra_print_msg(pDM_Odm, pvalue, pvalue_default, pmodify_note);
283                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("\n------------------------------------------------------------------------------------\n\n"));
284
285         } else if (dm_value[0] == 101) {
286                 pRA_Table->para_idx = (u1Byte)dm_value[1];
287
288                 pRA_Table->RA_Para_feedback_req = 1;
289                 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
290         } else {
291                 pRA_Table->para_idx = (u1Byte)dm_value[0];
292                 pRA_Table->rate_idx  = (u1Byte)dm_value[1];
293                 pRA_Table->value = (u1Byte)dm_value[2];
294
295                 odm_RA_ParaAdjust(pDM_Odm);
296         }
297
298 }
299
300 VOID
301 odm_RA_ParaAdjust_init(
302         IN              PVOID           pDM_VOID
303 )
304 {
305         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
306         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
307         u1Byte                  i;
308         u1Byte                  ra_para_pool_u8[3] = { RADBG_RTY_PENALTY,  RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO};
309         /*
310                 RTY_PENALTY             =       1,  //u8
311                 N_HIGH                          =       2,
312                 N_LOW                           =       3,
313                 RATE_UP_TABLE           =       4,
314                 RATE_DOWN_TABLE =       5,
315                 TRYING_NECESSARY        =       6,
316                 DROPING_NECESSARY =     7,
317                 RATE_UP_RTY_RATIO       =       8, //u8
318                 RATE_DOWN_RTY_RATIO=    9, //u8
319                 ALL_PARA                =       0xff
320
321         */
322         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_RA_ParaAdjust_init \n"));
323
324         pRA_Table->is_ra_dbg_init = TRUE;
325         for (i = 0; i < 3; i++) {
326                 pRA_Table->RA_Para_feedback_req = 1;
327                 pRA_Table->para_idx     =       ra_para_pool_u8[i];
328                 odm_RA_ParaAdjust_Send_H2C(pDM_Odm);
329         }
330
331         if (pDM_Odm->SupportICType == ODM_RTL8192E)
332                 pRA_Table->rate_length = ODM_RATEMCS15;
333         else if ((pDM_Odm->SupportICType == ODM_RTL8723B) || (pDM_Odm->SupportICType == ODM_RTL8188E))
334                 pRA_Table->rate_length = ODM_RATEMCS7;
335         else if ((pDM_Odm->SupportICType == ODM_RTL8821) || (pDM_Odm->SupportICType == ODM_RTL8881A))
336                 pRA_Table->rate_length = ODM_RATEVHTSS1MCS9;
337         else if (pDM_Odm->SupportICType == ODM_RTL8812)
338                 pRA_Table->rate_length = ODM_RATEVHTSS2MCS9;
339         else if (pDM_Odm->SupportICType == ODM_RTL8814A)
340                 pRA_Table->rate_length = ODM_RATEVHTSS3MCS9;
341         else
342                 pRA_Table->rate_length = ODM_RATEVHTSS4MCS9;
343
344 }
345
346 #else
347
348 VOID
349 ODM_C2HRaParaReportHandler(
350         IN      PVOID   pDM_VOID,
351         IN pu1Byte   CmdBuf,
352         IN u1Byte   CmdLen
353 )
354 {
355 }
356
357 VOID
358 odm_RA_debug(
359         IN              PVOID           pDM_VOID,
360         IN              u4Byte          *const dm_value
361 )
362 {
363 }
364
365 VOID
366 odm_RA_ParaAdjust_init(
367         IN              PVOID           pDM_VOID
368 )
369
370 {
371 }
372
373 #endif //#if (defined(CONFIG_RA_DBG_CMD))
374
375 VOID
376 phydm_ra_dynamic_retry_count(
377         IN      PVOID   pDM_VOID
378 )
379 {
380         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
381         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
382         PSTA_INFO_T             pEntry;
383         u1Byte  i, retry_offset;
384         u4Byte  ma_rx_tp;
385         /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pDM_Odm->pre_b_noisy = %d\n", pDM_Odm->pre_b_noisy ));*/
386         if (pDM_Odm->pre_b_noisy != pDM_Odm->NoisyDecision) {
387
388                 if (pDM_Odm->NoisyDecision) {
389                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Noisy Env. RA fallback value\n"));
390                         ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x0);
391                         ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x04030201);
392                 } else {
393                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("->Clean Env. RA fallback value\n"));
394                         ODM_SetMACReg(pDM_Odm, 0x430, bMaskDWord, 0x02010000);
395                         ODM_SetMACReg(pDM_Odm, 0x434, bMaskDWord, 0x06050403);
396                 }
397                 pDM_Odm->pre_b_noisy = pDM_Odm->NoisyDecision;
398         }
399 }
400
401 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
402
403 VOID
404 phydm_retry_limit_table_bound(
405         IN      PVOID   pDM_VOID,
406         IN      u1Byte  *retry_limit,
407         IN      u1Byte  offset
408 )
409 {
410         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
411         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
412
413         if (*retry_limit >  offset) {
414
415                 *retry_limit -= offset;
416
417                 if (*retry_limit < pRA_Table->retrylimit_low)
418                         *retry_limit = pRA_Table->retrylimit_low;
419                 else if (*retry_limit > pRA_Table->retrylimit_high)
420                         *retry_limit = pRA_Table->retrylimit_high;
421         } else
422                 *retry_limit = pRA_Table->retrylimit_low;
423 }
424
425 VOID
426 phydm_reset_retry_limit_table(
427         IN      PVOID   pDM_VOID
428 )
429 {
430         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
431         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
432         u1Byte                  i;
433
434         #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) /*support all IC platform*/
435
436         #else
437                 #if ((RTL8192E_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8188E_SUPPORT == 1))
438                         u1Byte per_rate_retrylimit_table_20M[ODM_RATEMCS15+1] = {
439                                 1, 1, 2, 4,                                     /*CCK*/
440                                 2, 2, 4, 6, 8, 12, 16, 18,              /*OFDM*/
441                                 2, 4, 6, 8, 12, 18, 20, 22,             /*20M HT-1SS*/
442                                 2, 4, 6, 8, 12, 18, 20, 22              /*20M HT-2SS*/
443                         };
444                         u1Byte per_rate_retrylimit_table_40M[ODM_RATEMCS15+1] = {
445                                 1, 1, 2, 4,                                     /*CCK*/
446                                 2, 2, 4, 6, 8, 12, 16, 18,              /*OFDM*/
447                                 4, 8, 12, 16, 24, 32, 32, 32,           /*40M HT-1SS*/
448                                 4, 8, 12, 16, 24, 32, 32, 32            /*40M HT-2SS*/
449                         };
450
451                 #elif (RTL8821A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1)
452
453                 #elif (RTL8812A_SUPPORT == 1)
454
455                 #elif(RTL8814A_SUPPORT == 1)
456
457                 #else
458
459                 #endif
460         #endif
461
462         memcpy(&(pRA_Table->per_rate_retrylimit_20M[0]), &(per_rate_retrylimit_table_20M[0]), ODM_NUM_RATE_IDX);
463         memcpy(&(pRA_Table->per_rate_retrylimit_40M[0]), &(per_rate_retrylimit_table_40M[0]), ODM_NUM_RATE_IDX);
464
465         for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
466                 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), 0);
467                 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), 0);
468         }
469 }
470
471 VOID
472 phydm_ra_dynamic_retry_limit(
473         IN      PVOID   pDM_VOID
474 )
475 {
476         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
477         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
478         PSTA_INFO_T             pEntry;
479         u1Byte  i, retry_offset;
480         u4Byte  ma_rx_tp;
481
482
483         if (pDM_Odm->pre_number_active_client == pDM_Odm->number_active_client) {
484
485                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, (" pre_number_active_client ==  number_active_client\n"));
486                 return;
487
488         } else {
489                 if (pDM_Odm->number_active_client == 1) {
490                         phydm_reset_retry_limit_table(pDM_Odm);
491                         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("one client only->reset to default value\n"));
492                 } else {
493
494                         retry_offset = pDM_Odm->number_active_client * pRA_Table->retry_descend_num;
495
496                         for (i = 0; i < ODM_NUM_RATE_IDX; i++) {
497
498                                 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_20M[i]), retry_offset);
499                                 phydm_retry_limit_table_bound(pDM_Odm, &(pRA_Table->per_rate_retrylimit_40M[i]), retry_offset);
500                         }
501                 }
502         }
503 }
504
505 VOID
506 phydm_ra_dynamic_retry_limit_init(
507         IN      PVOID   pDM_VOID
508 )
509 {
510         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
511         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
512
513         pRA_Table->retry_descend_num = RA_RETRY_DESCEND_NUM;
514         pRA_Table->retrylimit_low = RA_RETRY_LIMIT_LOW;
515         pRA_Table->retrylimit_high = RA_RETRY_LIMIT_HIGH;
516
517         phydm_reset_retry_limit_table(pDM_Odm);
518
519 }
520 #else
521 VOID
522 phydm_ra_dynamic_retry_limit(
523         IN      PVOID   pDM_VOID
524 )
525 {
526 }
527 #endif
528
529 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
530 VOID
531 phydm_ra_dynamic_rate_id_on_assoc(
532         IN      PVOID   pDM_VOID,
533         IN      u1Byte  wireless_mode,
534         IN      u1Byte  init_rate_id
535 )
536 {
537         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;
538
539         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] rf_mode = ((0x%x)), wireless_mode = ((0x%x)), init_rate_id = ((0x%x))\n", pDM_Odm->RFType, wireless_mode, init_rate_id));
540
541         if ((pDM_Odm->RFType == ODM_2T2R) | (pDM_Odm->RFType == ODM_2T2R_GREEN) | (pDM_Odm->RFType == ODM_2T3R) | (pDM_Odm->RFType == ODM_2T4R)) {
542
543                 if ((pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) &&
544                         (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G))
545                         ){
546                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set N-2SS ARFR5 table\n"));
547                         ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff);   /*N-2SS, ARFR5, rate_id = 0xe*/
548                         ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0);         /*N-2SS, ARFR5, rate_id = 0xe*/
549                 } else if ((pDM_Odm->SupportICType & (ODM_RTL8812)) &&
550                         (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY))
551                         ){
552                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[ON ASSOC] set AC-2SS ARFR0 table\n"));
553                         ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff);      /*AC-2SS, ARFR0, rate_id = 0x9*/
554                         ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000);          /*AC-2SS, ARFR0, rate_id = 0x9*/
555                 }
556         }
557
558 }
559
560 VOID
561 phydm_ra_dynamic_rate_id_init(
562         IN      PVOID   pDM_VOID
563 )
564 {
565         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;
566
567         if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E)) {
568
569                 ODM_SetMACReg(pDM_Odm, 0x4a4, bMaskDWord, 0xfc1ffff);   /*N-2SS, ARFR5, rate_id = 0xe*/
570                 ODM_SetMACReg(pDM_Odm, 0x4a8, bMaskDWord, 0x0);         /*N-2SS, ARFR5, rate_id = 0xe*/
571
572                 ODM_SetMACReg(pDM_Odm, 0x444, bMaskDWord, 0x0fff);              /*AC-2SS, ARFR0, rate_id = 0x9*/
573                 ODM_SetMACReg(pDM_Odm, 0x448, bMaskDWord, 0xff01f000);  /*AC-2SS, ARFR0, rate_id = 0x9*/
574         }
575 }
576
577 VOID
578 phydm_update_rate_id(
579         IN      PVOID   pDM_VOID,
580         IN      u1Byte  rate,
581         IN      u1Byte  platform_macid
582 )
583 {
584         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;
585         pRA_T           pRA_Table = &pDM_Odm->DM_RA_Table;
586         u1Byte          current_tx_ss;
587         u1Byte          rate_idx = rate & 0x7f; /*remove bit7 SGI*/
588         u1Byte          wireless_mode;
589         u1Byte          phydm_macid;
590         PSTA_INFO_T     pEntry;
591
592         if (rate_idx >= ODM_RATEVHTSS2MCS0) {
593                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT2SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS2MCS0)));
594                 /*dummy for SD4 check patch*/
595         } else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
596                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( VHT1SS-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEVHTSS1MCS0)));
597                 /*dummy for SD4 check patch*/
598         } else if (rate_idx >= ODM_RATEMCS0) {
599                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, (rate_idx-ODM_RATEMCS0)));
600                 /*dummy for SD4 check patch*/
601         } else {
602                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate[%d]: (( HT-MCS%d ))\n", platform_macid, rate_idx));
603                 /*dummy for SD4 check patch*/
604         }
605
606         phydm_macid = pDM_Odm->platform2phydm_macid_table[platform_macid];
607         pEntry = pDM_Odm->pODM_StaInfo[phydm_macid];
608
609         if (IS_STA_VALID(pEntry)) {
610                 wireless_mode = pEntry->WirelessMode;
611
612                 if ((pDM_Odm->RFType  == ODM_2T2R) | (pDM_Odm->RFType  == ODM_2T2R_GREEN) | (pDM_Odm->RFType  == ODM_2T3R) | (pDM_Odm->RFType  == ODM_2T4R)) {
613
614                         pEntry->ratr_idx = pEntry->ratr_idx_init;
615                         if (wireless_mode & (ODM_WM_N24G | ODM_WM_N5G)) { /*N mode*/
616                                 if (rate_idx >= ODM_RATEMCS8 && rate_idx <= ODM_RATEMCS15) { /*2SS mode*/
617
618                                         pEntry->ratr_idx = ARFR_5_RATE_ID;
619                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_5\n"));
620                                 }
621                         } else if (wireless_mode & (ODM_WM_AC_5G | ODM_WM_AC_24G | ODM_WM_AC_ONLY)) {/*AC mode*/
622                                 if (rate_idx >= ODM_RATEVHTSS2MCS0 && rate_idx <= ODM_RATEVHTSS2MCS9) {/*2SS mode*/
623
624                                         pEntry->ratr_idx = ARFR_0_RATE_ID;
625                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("ARFR_0\n"));
626                                 }
627                         }
628                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("UPdate_RateID[%d]: (( 0x%x ))\n", platform_macid, pEntry->ratr_idx));
629                 }
630         }
631
632 }
633 #endif
634
635 VOID
636 phydm_c2h_ra_report_handler(
637         IN PVOID        pDM_VOID,
638         IN pu1Byte   CmdBuf,
639         IN u1Byte   CmdLen
640 )
641 {
642         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;
643         pRA_T           pRA_Table = &pDM_Odm->DM_RA_Table;
644         u1Byte  legacy_table[12] = {1,2,5,11,6,9,12,18,24,36,48,54};
645         u1Byte  macid = CmdBuf[1];
646
647         u1Byte  rate = CmdBuf[0];
648         u1Byte  rate_idx = rate & 0x7f; /*remove bit7 SGI*/
649         u1Byte  vht_en=(rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0;
650         u1Byte  b_sgi = (rate & 0x80)>>7;
651
652         u1Byte  pre_rate = pRA_Table->link_tx_rate[macid];
653         u1Byte  pre_rate_idx = pre_rate & 0x7f; /*remove bit7 SGI*/
654         u1Byte  pre_vht_en=(pre_rate_idx >= ODM_RATEVHTSS1MCS0)? 1 :0;
655         u1Byte  pre_b_sgi = (pre_rate & 0x80)>>7;
656
657         #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
658         PADAPTER        Adapter = pDM_Odm->Adapter;
659
660         GET_HAL_DATA(Adapter)->CurrentRARate = HwRateToMRate(rate_idx);
661         #endif
662         #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
663         ODM_UpdateInitRate(pDM_Odm, rate_idx);
664         #endif
665
666         /*ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,("RA: rate_idx=0x%x , sgi = %d\n", rate_idx, b_sgi));*/
667         /*if (pDM_Odm->SupportICType & (ODM_RTL8703B))*/
668         {
669                 if (CmdLen >= 4) {
670                         if (CmdBuf[3] == 0) {
671                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Init-Rate Update\n"));
672                                 /**/
673                         } else if (CmdBuf[3] == 0xff) {
674                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("FW Level: Fix rate\n"));
675                                 /**/
676                         } else if (CmdBuf[3] == 1) {
677                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Success\n"));
678                                 /**/
679                         } else if (CmdBuf[3] == 2) {
680                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try Fail & Try Again\n"));
681                                 /**/
682                         } else if (CmdBuf[3] == 3) {
683                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Rate Back\n"));
684                                 /**/
685                         } else if (CmdBuf[3] == 4) {
686                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("start rate by RSSI\n"));
687                                 /**/
688                         } else if (CmdBuf[3] == 5) {
689                                 ODM_RT_TRACE(pDM_Odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("Try rate\n"));
690                                 /**/
691                         }
692                 }
693         }
694
695         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Tx Rate Update, MACID[%d] ( %s%s%s%s%d%s%s ) -> ( %s%s%s%s%d%s%s)\n",
696                 macid,
697                 ((pre_rate_idx >= ODM_RATEVHTSS1MCS0) && (pre_rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss  " : "",
698                 ((pre_rate_idx >= ODM_RATEVHTSS2MCS0) && (pre_rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
699                 ((pre_rate_idx >= ODM_RATEVHTSS3MCS0) && (pre_rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
700                 (pre_rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
701                 (pre_vht_en) ? ((pre_rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((pre_rate_idx >= ODM_RATEMCS0)? (pre_rate_idx - ODM_RATEMCS0) : ((pre_rate_idx <= ODM_RATE54M)?legacy_table[pre_rate_idx]:0)),
702                 (pre_b_sgi) ? "-S" : "  ",
703                 (pre_rate_idx >= ODM_RATEMCS0) ? "" : "M",
704                 ((rate_idx >= ODM_RATEVHTSS1MCS0) && (rate_idx <= ODM_RATEVHTSS1MCS9)) ? "VHT 1ss  " : "",
705                 ((rate_idx >= ODM_RATEVHTSS2MCS0) && (rate_idx <= ODM_RATEVHTSS2MCS9)) ? "VHT 2ss " : "",
706                 ((rate_idx >= ODM_RATEVHTSS3MCS0) && (rate_idx <= ODM_RATEVHTSS3MCS9)) ? "VHT 3ss " : "",
707                 (rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
708                 (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0)%10) : ((rate_idx >= ODM_RATEMCS0)? (rate_idx - ODM_RATEMCS0) : ((rate_idx <= ODM_RATE54M)?legacy_table[rate_idx]:0)),
709                 (b_sgi) ? "-S" : "  ",
710                 (rate_idx >= ODM_RATEMCS0) ? "" : "M" ));
711
712         pRA_Table->link_tx_rate[macid] = rate;
713
714
715         #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
716         if (pDM_Odm->SupportICType & (ODM_RTL8812|ODM_RTL8192E))
717                 phydm_update_rate_id(pDM_Odm, rate, macid);
718         #endif
719
720 }
721
722 VOID
723 odm_RSSIMonitorInit(
724         IN              PVOID           pDM_VOID
725 )
726 {
727 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
728         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
729         pRA_T           pRA_Table = &pDM_Odm->DM_RA_Table;
730         pRA_Table->firstconnect = FALSE;
731
732 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
733         pRA_Table->PT_collision_pre = TRUE;   //used in ODM_DynamicARFBSelect(WIN only)
734 #endif
735 #endif
736 }
737
738 VOID
739 ODM_RAPostActionOnAssoc(
740         IN      PVOID   pDM_VOID
741 )
742 {
743         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;
744
745         pDM_Odm->H2C_RARpt_connect = 1;
746         odm_RSSIMonitorCheck(pDM_Odm);
747         pDM_Odm->H2C_RARpt_connect = 0;
748 }
749
750 VOID
751 odm_RSSIMonitorCheck(
752         IN              PVOID           pDM_VOID
753 )
754 {
755         //
756         // For AP/ADSL use prtl8192cd_priv
757         // For CE/NIC use PADAPTER
758         //
759         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
760         if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
761                 return;
762
763         //
764         // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
765         // at the same time. In the stage2/3, we need to prive universal interface and merge all
766         // HW dynamic mechanism.
767         //
768         switch  (pDM_Odm->SupportPlatform) {
769         case    ODM_WIN:
770                 odm_RSSIMonitorCheckMP(pDM_Odm);
771                 break;
772
773         case    ODM_CE:
774                 odm_RSSIMonitorCheckCE(pDM_Odm);
775                 break;
776
777         case    ODM_AP:
778                 odm_RSSIMonitorCheckAP(pDM_Odm);
779                 break;
780
781         case    ODM_ADSL:
782                 //odm_DIGAP(pDM_Odm);
783                 break;
784         }
785
786 }       // odm_RSSIMonitorCheck
787
788 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
789 s4Byte
790 phydm_FindMinimumRSSI(
791 IN              PDM_ODM_T               pDM_Odm,
792 IN              PADAPTER                pAdapter,
793 IN OUT  BOOLEAN *pbLink_temp
794
795         )
796 {
797         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
798         PMGNT_INFO              pMgntInfo = &(pAdapter->MgntInfo);
799         BOOLEAN                 act_as_ap = ACTING_AS_AP(pAdapter);
800
801         /*DbgPrint("bMediaConnect = %d,  ACTING_AS_AP = %d ,  EntryMinUndecoratedSmoothedPWDB = %d\n",
802                 pMgntInfo->bMediaConnect,act_as_ap,pHalData->EntryMinUndecoratedSmoothedPWDB);*/
803
804
805         /* 1.Determine the minimum RSSI */
806         if ((!pMgntInfo->bMediaConnect) ||
807                 (act_as_ap && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/
808
809                 pHalData->MinUndecoratedPWDBForDM = 0;
810                 *pbLink_temp = FALSE;
811
812         } else
813                 *pbLink_temp = TRUE;
814
815
816         if (pMgntInfo->bMediaConnect) { /* Default port*/
817
818                 if (act_as_ap || pMgntInfo->mIbss) {
819                         pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
820                         /**/
821                 } else {
822                         pHalData->MinUndecoratedPWDBForDM = pHalData->UndecoratedSmoothedPWDB;
823                         /**/
824                 }
825         } else { /* associated entry pwdb*/
826                 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
827                 /**/
828         }
829
830         return pHalData->MinUndecoratedPWDBForDM;
831 }
832
833 #endif
834
835 VOID
836 odm_RSSIMonitorCheckMP(
837         IN      PVOID   pDM_VOID
838 )
839 {
840 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
841         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
842         u1Byte                  H2C_Parameter[4] = {0};
843         u4Byte                  i;
844         BOOLEAN                 bExtRAInfo = FALSE;
845         u1Byte                  cmdlen = 3;
846         u1Byte                  TxBF_EN = 0, stbc_en = 0;
847
848         PADAPTER                Adapter = pDM_Odm->Adapter;
849         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
850         PRT_WLAN_STA    pEntry = NULL;
851         s4Byte                  tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
852         PMGNT_INFO              pMgntInfo = &Adapter->MgntInfo;
853         PMGNT_INFO              pDefaultMgntInfo = &Adapter->MgntInfo;
854         u8Byte                  curTxOkCnt = 0, curRxOkCnt = 0;
855         //BOOLEAN                       FirstConnect = 0;
856         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
857         pDIG_T                  pDM_DigTable = &pDM_Odm->DM_DigTable;
858
859         PADAPTER        pLoopAdapter = GetDefaultAdapter(Adapter);
860
861         if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) {
862                 bExtRAInfo = TRUE;
863                 cmdlen = 4;
864         }
865
866         //FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE);
867         //pRA_Table->firstconnect = pHalData->bLinked;
868
869
870         /*
871                 if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP))
872                 {
873                         if(curRxOkCnt >(curTxOkCnt*6))
874                                 PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015);
875                         else
876                                 PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015);
877                 }
878
879
880                 if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821 ||
881                    pDM_Odm->SupportICType == ODM_RTL8814A|| pDM_Odm->SupportICType == ODM_RTL8822B)
882                 {
883                         if(curRxOkCnt >(curTxOkCnt*6))
884                                 H2C_Parameter[3]|=RAINFO_BE_RX_STATE;
885                 }
886         */
887
888         while (pLoopAdapter) {
889
890                 if (pLoopAdapter != NULL) {
891                         pMgntInfo = &pLoopAdapter->MgntInfo;
892                         curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt;
893                         curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt;
894                         pMgntInfo->lastTxOkCnt = curTxOkCnt;
895                         pMgntInfo->lastRxOkCnt = curRxOkCnt;
896                 }
897
898                 for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
899
900                         if (IsAPModeExist(pLoopAdapter)) {
901                                 if (GetFirstExtAdapter(pLoopAdapter) != NULL &&
902                                         GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter)
903                                         pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
904                                 else if (GetFirstGOPort(pLoopAdapter) != NULL &&
905                                                  IsFirstGoAdapter(pLoopAdapter))
906                                         pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
907                         } else {
908                                 if (GetDefaultAdapter(pLoopAdapter) == pLoopAdapter)
909                                         pEntry = AsocEntry_EnumStation(pLoopAdapter, i);
910                         }
911
912                         if (pEntry != NULL) {
913                                 if (pEntry->bAssociated) {
914
915                                         RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr);
916                                         RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n",
917                                                                                    pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB));
918
919                                         //2 BF_en
920                                         //2 STBC_en
921                                         if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) ||
922                                                 TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX))
923                                                 stbc_en = 1;
924
925                                         if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
926                                                 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
927                                         if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
928                                                 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
929
930                                         if (bExtRAInfo) {
931                                                 if (curRxOkCnt > (curTxOkCnt * 6))
932                                                         H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
933
934                                                 if (TxBF_EN)
935                                                         H2C_Parameter[3] |= RAINFO_BF_STATE;
936                                                 else {
937                                                         if (stbc_en)
938                                                                 H2C_Parameter[3] |= RAINFO_STBC_STATE;
939                                                 }
940
941                         if ( pDM_Odm->NoisyDecision )
942                         {
943                             H2C_Parameter[3] |= RAINFO_NOISY_STATE;             // BIT2
944                         }
945                                                 else
946                                                         H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
947
948                                                 if (pDM_Odm->H2C_RARpt_connect)
949                                                         H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
950                                         }
951
952                                         H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF);
953                                         //H2C_Parameter[1] = 0x20;   // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
954                                         H2C_Parameter[0] = (pEntry->AssociatedMacId);
955
956                                         ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
957                                 }
958                         } else
959                                 break;
960                 }
961
962                 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
963         }
964
965         if (tmpEntryMaxPWDB != 0) {     // If associated entry is found
966                 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
967                 RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n",     tmpEntryMaxPWDB, tmpEntryMaxPWDB));
968         } else
969                 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
970
971         if (tmpEntryMinPWDB != 0xff) { // If associated entry is found
972                 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
973                 RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB));
974
975         } else
976                 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
977
978         // Indicate Rx signal strength to FW.
979         if (pHalData->bUseRAMask) {
980                 PRT_HIGH_THROUGHPUT             pHTInfo = GET_HT_INFO(pDefaultMgntInfo);
981                 PRT_VERY_HIGH_THROUGHPUT        pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo);
982
983                 //2 BF_en
984
985                 //2 STBC_en
986                 if ((IS_WIRELESS_MODE_AC(Adapter) && TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX)) ||
987                         TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX))
988                         stbc_en = 1;
989
990                 if (bExtRAInfo) {
991                         if (TxBF_EN)
992                                 H2C_Parameter[3] |= RAINFO_BF_STATE;
993                         else {
994                                 if (stbc_en)
995                                         H2C_Parameter[3] |= RAINFO_STBC_STATE;
996                         }
997
998                         if (pDM_Odm->H2C_RARpt_connect)
999                                 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1000
1001             if ( pDM_Odm->NoisyDecision==1 )
1002             {
1003                 H2C_Parameter[3] |= RAINFO_NOISY_STATE;             // BIT2
1004                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] Send H2C to FW\n"));
1005             }
1006                         else
1007                                 H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1008
1009                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] H2C_Parameter=%x\n", H2C_Parameter[3]));
1010                 }
1011
1012                 H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF);
1013                 //H2C_Parameter[1] = 0x20;      // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
1014                 H2C_Parameter[0] = 0;           // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1
1015
1016                 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1017
1018                 // BT 3.0 HS mode Rssi
1019                 if (pDM_Odm->bBtHsOperation) {
1020                         H2C_Parameter[2] = pDM_Odm->btHsRssi;
1021                         //H2C_Parameter[1] = 0x0;
1022                         H2C_Parameter[0] = 2;
1023
1024                         ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1025                 }
1026         } else
1027                 PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB);
1028
1029         if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8192E))
1030                 odm_RSSIDumpToRegister(pDM_Odm);
1031
1032
1033         {
1034                 PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter);
1035                 BOOLEAN         default_pointer_value, *pbLink_temp = &default_pointer_value;
1036                 s4Byte  GlobalRSSI_min = 0xFF, LocalRSSI_Min;
1037                 BOOLEAN         bLink = FALSE;
1038
1039                 while (pLoopAdapter) {
1040                         LocalRSSI_Min = phydm_FindMinimumRSSI(pDM_Odm, pLoopAdapter, pbLink_temp);
1041                         //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min);
1042                         if ((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0))
1043                                 GlobalRSSI_min = LocalRSSI_Min;
1044
1045                         if (*pbLink_temp)
1046                                 bLink = TRUE;
1047
1048                         pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
1049                 }
1050
1051                 pHalData->bLinked = bLink;
1052                 ODM_CmnInfoUpdate(&pHalData->DM_OutSrc , ODM_CMNINFO_LINK, (u8Byte)bLink);
1053
1054                 if (bLink)
1055                         ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min);
1056                 else
1057                         ODM_CmnInfoUpdate(&pHalData->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0);
1058
1059         }
1060
1061 #endif  // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1062 }
1063
1064 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1065 /*H2C_RSSI_REPORT*/
1066 s8 phydm_rssi_report(PDM_ODM_T pDM_Odm, u8 mac_id)
1067 {
1068         PADAPTER Adapter = pDM_Odm->Adapter;
1069         struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
1070         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1071         u8 H2C_Parameter[4] = {0};
1072         u8 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0;
1073         u8 cmdlen = 4, first_connect = _FALSE;
1074         u64     curTxOkCnt = 0, curRxOkCnt = 0;
1075         PSTA_INFO_T pEntry = pDM_Odm->pODM_StaInfo[mac_id];
1076
1077         if (!IS_STA_VALID(pEntry))
1078                 return _FAIL;
1079
1080         if (mac_id != pEntry->mac_id) {
1081                 DBG_871X("%s mac_id:%u:%u invalid\n", __func__, mac_id, pEntry->mac_id);
1082                 rtw_warn_on(1);
1083                 return _FAIL;
1084         }
1085
1086         if (IS_MCAST(pEntry->hwaddr))  /*if(psta->mac_id ==1)*/
1087                 return _FAIL;
1088
1089         if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1)) {
1090                 DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, pEntry->mac_id, MAC_ARG(pEntry->hwaddr));
1091                 return _FAIL;
1092         }
1093
1094         curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes;
1095         curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes;
1096         if (curRxOkCnt > (curTxOkCnt * 6))
1097                 UL_DL_STATE = 1;
1098         else
1099                 UL_DL_STATE = 0;
1100
1101         if (TxBF_EN)
1102                 STBC_TX = 0;
1103         else {
1104                         STBC_TX = TEST_FLAG(pEntry->htpriv.stbc_cap, STBC_HT_ENABLE_TX);
1105         }
1106
1107         H2C_Parameter[0] = (u8)(pEntry->mac_id & 0xFF);
1108         H2C_Parameter[2] = pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0x7F;
1109
1110         if (UL_DL_STATE)
1111                 H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1112
1113         if (TxBF_EN)
1114                 H2C_Parameter[3] |= RAINFO_BF_STATE;
1115         if (STBC_TX)
1116                 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1117         if (pDM_Odm->NoisyDecision)
1118                 H2C_Parameter[3] |= RAINFO_NOISY_STATE;
1119
1120         if (pEntry->ra_rpt_linked == _FALSE) {
1121                 H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1122                 pEntry->ra_rpt_linked = _TRUE;
1123                 first_connect = _TRUE;
1124         }
1125
1126         #if 1
1127         if (first_connect) {
1128                 DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__,
1129                         pEntry->mac_id, MAC_ARG(pEntry->hwaddr), pEntry->rssi_stat.UndecoratedSmoothedPWDB);
1130
1131                 DBG_871X("%s RAINFO - TP:%s, TxBF:%s, STBC:%s, Noisy:%s, Firstcont:%s\n", __func__,
1132                         (UL_DL_STATE) ? "DL" : "UL", (TxBF_EN) ? "EN" : "DIS", (STBC_TX) ? "EN" : "DIS",
1133                         (pDM_Odm->NoisyDecision) ? "True" : "False", (first_connect) ? "True" : "False");
1134         }
1135         #endif
1136
1137         if (pHalData->fw_ractrl == _TRUE) {
1138                 ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1139         } else {
1140         }
1141         return _SUCCESS;
1142 }
1143
1144 void phydm_ra_rssi_rpt_wk_hdl(PVOID pContext)
1145 {
1146         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pContext;
1147         int i;
1148         u8 mac_id = 0xFF;
1149         PSTA_INFO_T     pEntry = NULL;
1150
1151         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1152                 pEntry = pDM_Odm->pODM_StaInfo[i];
1153                 if (IS_STA_VALID(pEntry)) {
1154                         if (IS_MCAST(pEntry->hwaddr))  /*if(psta->mac_id ==1)*/
1155                                 continue;
1156                         if (pEntry->ra_rpt_linked == _FALSE) {
1157                                 mac_id = i;
1158                                 break;
1159                         }
1160                 }
1161         }
1162         if (mac_id != 0xFF)
1163                 phydm_rssi_report(pDM_Odm, mac_id);
1164 }
1165 void phydm_ra_rssi_rpt_wk(PVOID pContext)
1166 {
1167         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pContext;
1168
1169         rtw_run_in_thread_cmd(pDM_Odm->Adapter, phydm_ra_rssi_rpt_wk_hdl, pDM_Odm);
1170 }
1171 #endif
1172
1173 VOID
1174 odm_RSSIMonitorCheckCE(
1175         IN              PVOID           pDM_VOID
1176 )
1177 {
1178 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1179         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1180         PADAPTER                Adapter = pDM_Odm->Adapter;
1181         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
1182         PSTA_INFO_T           pEntry;
1183         int     i;
1184         int     tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
1185         u8      sta_cnt = 0;
1186
1187         if (pDM_Odm->bLinked != _TRUE)
1188                 return;
1189
1190         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1191                 pEntry = pDM_Odm->pODM_StaInfo[i];
1192                 if (IS_STA_VALID(pEntry)) {
1193                         if (IS_MCAST(pEntry->hwaddr))  /*if(psta->mac_id ==1)*/
1194                                 continue;
1195
1196                         if (pEntry->rssi_stat.UndecoratedSmoothedPWDB == (-1))
1197                                 continue;
1198
1199                         if (pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
1200                                 tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1201
1202                         if (pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
1203                                 tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
1204
1205                         if (phydm_rssi_report(pDM_Odm, i))
1206                                 sta_cnt++;
1207                 }
1208         }
1209         /*DBG_871X("%s==> sta_cnt(%d)\n", __func__, sta_cnt);*/
1210
1211         if (tmpEntryMaxPWDB != 0)       // If associated entry is found
1212                 pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
1213         else
1214                 pHalData->EntryMaxUndecoratedSmoothedPWDB = 0;
1215
1216         if (tmpEntryMinPWDB != 0xff) // If associated entry is found
1217                 pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
1218         else
1219                 pHalData->EntryMinUndecoratedSmoothedPWDB = 0;
1220
1221         FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM
1222
1223         pDM_Odm->RSSI_Min = pHalData->MinUndecoratedPWDBForDM;
1224         //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
1225 #endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1226 }
1227
1228
1229 VOID
1230 odm_RSSIMonitorCheckAP(
1231         IN              PVOID           pDM_VOID
1232 )
1233 {
1234 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1235 #if (RTL8812A_SUPPORT||RTL8881A_SUPPORT||RTL8192E_SUPPORT||RTL8814A_SUPPORT)
1236
1237         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1238         u1Byte                  H2C_Parameter[4] = {0};
1239         u4Byte                   i;
1240         BOOLEAN                 bExtRAInfo = FALSE;
1241         u1Byte                  cmdlen = 3 ;
1242         u1Byte                  TxBF_EN = 0, stbc_en = 0;
1243
1244         prtl8192cd_priv priv            = pDM_Odm->priv;
1245         PSTA_INFO_T             pstat;
1246         BOOLEAN                 act_bfer = FALSE;
1247
1248         if (pDM_Odm->H2C_RARpt_connect) {
1249                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] First Connected\n"));
1250                 /**/
1251         } else if (priv->up_time % 2)
1252                 return;
1253
1254         if (pDM_Odm->SupportICType & EXT_RA_INFO_SUPPORT_IC) {
1255                 bExtRAInfo = TRUE;
1256                 cmdlen = 4;
1257         }
1258
1259         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1260                 pstat = pDM_Odm->pODM_StaInfo[i];
1261
1262                 if (IS_STA_VALID(pstat)) {
1263                         if (pstat->sta_in_firmware != 1)
1264                                 continue;
1265
1266                         //2 BF_en
1267
1268                         //2 STBC_en
1269                         if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) &&
1270                                 ((pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_))
1271 #ifdef RTK_AC_SUPPORT
1272                                  || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_))
1273 #endif
1274                                 ))
1275                                 stbc_en = 1;
1276
1277                         //2 RAINFO
1278
1279                         if (bExtRAInfo) {
1280                                 if ((pstat->rx_avarage)  > ((pstat->tx_avarage) * 6))
1281                                         H2C_Parameter[3] |= RAINFO_BE_RX_STATE;
1282
1283                                 if (TxBF_EN)
1284                                         H2C_Parameter[3] |= RAINFO_BF_STATE;
1285                                 else {
1286                                         if (stbc_en)
1287                                                 H2C_Parameter[3] |= RAINFO_STBC_STATE;
1288                                 }
1289
1290                 if ( pDM_Odm->NoisyDecision )
1291                 {
1292                     H2C_Parameter[3] |= RAINFO_NOISY_STATE;             // BIT2
1293                 }
1294                                 else
1295                                         H2C_Parameter[3] &= (~RAINFO_NOISY_STATE);
1296
1297                                 if (pDM_Odm->H2C_RARpt_connect) {
1298                                         H2C_Parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
1299                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("[RA Init] set Init rate by RSSI\n"));
1300                                 }
1301
1302                                 /*ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RAINFO] H2C_Para[3] = %x\n",H2C_Parameter[3]));*/
1303                         }
1304
1305                         H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF);
1306                         H2C_Parameter[0] = REMAP_AID(pstat);
1307
1308             ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
1309             ("H2C_Parameter[3]=%d\n", H2C_Parameter[3]));
1310
1311                         //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[RSSI] H2C_Para[2] = %x,  \n",H2C_Parameter[2]));
1312                         //ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("[MACID] H2C_Para[0] = %x,  \n",H2C_Parameter[0]));
1313
1314                         ODM_FillH2CCmd(pDM_Odm, ODM_H2C_RSSI_REPORT, cmdlen, H2C_Parameter);
1315
1316                 }
1317         }
1318
1319 #endif
1320 #endif
1321
1322 }
1323
1324
1325 VOID
1326 odm_RateAdaptiveMaskInit(
1327         IN      PVOID   pDM_VOID
1328 )
1329 {
1330         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1331         PODM_RATE_ADAPTIVE      pOdmRA = &pDM_Odm->RateAdaptive;
1332
1333 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1334         PMGNT_INFO              pMgntInfo = &pDM_Odm->Adapter->MgntInfo;
1335         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
1336
1337         pMgntInfo->Ratr_State = DM_RATR_STA_INIT;
1338
1339         if (pMgntInfo->DM_Type == DM_Type_ByDriver)
1340                 pHalData->bUseRAMask = TRUE;
1341         else
1342                 pHalData->bUseRAMask = FALSE;
1343
1344 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1345         pOdmRA->Type = DM_Type_ByDriver;
1346         if (pOdmRA->Type == DM_Type_ByDriver)
1347                 pDM_Odm->bUseRAMask = _TRUE;
1348         else
1349                 pDM_Odm->bUseRAMask = _FALSE;
1350 #endif
1351
1352         pOdmRA->RATRState = DM_RATR_STA_INIT;
1353
1354 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
1355         if (pDM_Odm->SupportICType == ODM_RTL8812)
1356                 pOdmRA->LdpcThres = 50;
1357         else
1358                 pOdmRA->LdpcThres = 35;
1359
1360         pOdmRA->RtsThres = 35;
1361
1362 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
1363         pOdmRA->LdpcThres = 35;
1364         pOdmRA->bUseLdpc = FALSE;
1365
1366 #else
1367         pOdmRA->UltraLowRSSIThresh = 9;
1368
1369 #endif
1370
1371         pOdmRA->HighRSSIThresh = 50;
1372 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) && \
1373         ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
1374         pOdmRA->LowRSSIThresh = 23;
1375 #else
1376         pOdmRA->LowRSSIThresh = 20;
1377 #endif
1378 }
1379 /*-----------------------------------------------------------------------------
1380  * Function:    odm_RefreshRateAdaptiveMask()
1381  *
1382  * Overview:    Update rate table mask according to rssi
1383  *
1384  * Input:               NONE
1385  *
1386  * Output:              NONE
1387  *
1388  * Return:              NONE
1389  *
1390  * Revised History:
1391  *      When            Who             Remark
1392  *      05/27/2009      hpfan   Create Version 0.
1393  *
1394  *---------------------------------------------------------------------------*/
1395 VOID
1396 odm_RefreshRateAdaptiveMask(
1397         IN      PVOID   pDM_VOID
1398 )
1399 {
1400         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1401         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n"));
1402         if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) {
1403                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n"));
1404                 return;
1405         }
1406         //
1407         // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
1408         // at the same time. In the stage2/3, we need to prive universal interface and merge all
1409         // HW dynamic mechanism.
1410         //
1411         switch  (pDM_Odm->SupportPlatform) {
1412         case    ODM_WIN:
1413                 odm_RefreshRateAdaptiveMaskMP(pDM_Odm);
1414                 break;
1415
1416         case    ODM_CE:
1417                 odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
1418                 break;
1419
1420         case    ODM_AP:
1421         case    ODM_ADSL:
1422                 odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm);
1423                 break;
1424         }
1425
1426 }
1427
1428 VOID
1429 odm_RefreshRateAdaptiveMaskMP(
1430         IN              PVOID           pDM_VOID
1431 )
1432 {
1433 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1434         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1435         PADAPTER                                pAdapter         =  pDM_Odm->Adapter;
1436         PADAPTER                                pTargetAdapter = NULL;
1437         HAL_DATA_TYPE                   *pHalData = GET_HAL_DATA(pAdapter);
1438         PMGNT_INFO                              pMgntInfo = GetDefaultMgntInfo(pAdapter);
1439
1440         if (pAdapter->bDriverStopped) {
1441                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
1442                 return;
1443         }
1444
1445         if (!pHalData->bUseRAMask) {
1446                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
1447                 return;
1448         }
1449
1450         // if default port is connected, update RA table for default port (infrastructure mode only)
1451         if (pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) {
1452                 odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId,  pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB);
1453                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n"));
1454                 if (ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State)) {
1455                         ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
1456                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State));
1457                         pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1458                 } else if (pDM_Odm->bChangeState) {
1459                         ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid);
1460                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1461                         pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1462                 }
1463         }
1464
1465         //
1466         // The following part configure AP/VWifi/IBSS rate adaptive mask.
1467         //
1468
1469         if (pMgntInfo->mIbss)   // Target: AP/IBSS peer.
1470                 pTargetAdapter = GetDefaultAdapter(pAdapter);
1471         else
1472                 pTargetAdapter = GetFirstAPAdapter(pAdapter);
1473
1474         // if extension port (softap) is started, updaet RA table for more than one clients associate
1475         if (pTargetAdapter != NULL) {
1476                 int     i;
1477                 PRT_WLAN_STA    pEntry;
1478
1479                 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1480                         pEntry = AsocEntry_EnumStation(pTargetAdapter, i);
1481                         if (NULL != pEntry) {
1482                                 if (pEntry->bAssociated) {
1483                                         odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB);
1484
1485                                         if (ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State)) {
1486                                                 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr);
1487                                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State));
1488                                                 pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State);
1489                                         } else if (pDM_Odm->bChangeState) {
1490                                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1491                                                 pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State);
1492                                         }
1493                                 }
1494                         }
1495                 }
1496         }
1497
1498         if (pMgntInfo->bSetTXPowerTrainingByOid)
1499                 pMgntInfo->bSetTXPowerTrainingByOid = FALSE;
1500 #endif  // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1501 }
1502
1503
1504 VOID
1505 odm_RefreshRateAdaptiveMaskCE(
1506         IN      PVOID   pDM_VOID
1507 )
1508 {
1509 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1510         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1511         u1Byte  i;
1512         PADAPTER        pAdapter         =  pDM_Odm->Adapter;
1513         PODM_RATE_ADAPTIVE              pRA = &pDM_Odm->RateAdaptive;
1514
1515         if (RTW_CANNOT_RUN(pAdapter)) {
1516                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n"));
1517                 return;
1518         }
1519
1520         if (!pDM_Odm->bUseRAMask) {
1521                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n"));
1522                 return;
1523         }
1524
1525         //printk("==> %s \n",__FUNCTION__);
1526
1527         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1528                 PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i];
1529                 if (IS_STA_VALID(pstat)) {
1530                         if (IS_MCAST(pstat->hwaddr))  //if(psta->mac_id ==1)
1531                                 continue;
1532
1533 #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1))
1534                         if ((pDM_Odm->SupportICType == ODM_RTL8812) || (pDM_Odm->SupportICType == ODM_RTL8821)) {
1535                                 if (pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) {
1536                                         pRA->bUseLdpc = TRUE;
1537                                         pRA->bLowerRtsRate = TRUE;
1538                                         if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
1539                                                 Set_RA_LDPC_8812(pstat, TRUE);
1540                                         //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB);
1541                                 } else if (pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres - 5)) {
1542                                         pRA->bUseLdpc = FALSE;
1543                                         pRA->bLowerRtsRate = FALSE;
1544                                         if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
1545                                                 Set_RA_LDPC_8812(pstat, FALSE);
1546                                         //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB);
1547                                 }
1548                         }
1549 #endif
1550
1551                         if (TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level)) {
1552                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level));
1553                                 //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level);
1554                                 rtw_hal_update_ra_mask(pstat, pstat->rssi_level);
1555                         } else if (pDM_Odm->bChangeState) {
1556                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining));
1557                                 rtw_hal_update_ra_mask(pstat, pstat->rssi_level);
1558                         }
1559
1560                 }
1561         }
1562
1563 #endif
1564 }
1565
1566 VOID
1567 odm_RefreshRateAdaptiveMaskAPADSL(
1568         IN      PVOID   pDM_VOID
1569 )
1570 {
1571 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
1572         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1573         struct rtl8192cd_priv *priv = pDM_Odm->priv;
1574         struct aid_obj *aidarray;
1575         u4Byte i;
1576         PSTA_INFO_T pstat;
1577
1578         if (priv->up_time % 2)
1579                 return;
1580
1581         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
1582                 pstat = pDM_Odm->pODM_StaInfo[i];
1583
1584                 if (IS_STA_VALID(pstat)) {
1585 #if defined(UNIVERSAL_REPEATER) || defined(MBSSID)
1586                         aidarray = container_of(pstat, struct aid_obj, station);
1587                         priv = aidarray->priv;
1588 #endif
1589
1590                         if (!priv->pmib->dot11StationConfigEntry.autoRate)
1591                                 continue;
1592
1593                         if (ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level)) {
1594                                 ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr);
1595                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level));
1596
1597 #ifdef CONFIG_WLAN_HAL
1598                                 if (IS_HAL_CHIP(priv)) {
1599 #ifdef WDS
1600 //                                      if(!(pstat->state & WIFI_WDS))//if WDS donot setting
1601 #endif
1602                                         GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level);
1603                                 } else
1604 #endif
1605 #ifdef CONFIG_RTL_8812_SUPPORT
1606                                         if (GET_CHIP_VER(priv) == VERSION_8812E)
1607                                                 UpdateHalRAMask8812(priv, pstat, 3);
1608                                         else
1609 #endif
1610 #ifdef CONFIG_RTL_88E_SUPPORT
1611                                                 if (GET_CHIP_VER(priv) == VERSION_8188E) {
1612 #ifdef TXREPORT
1613                                                         add_RATid(priv, pstat);
1614 #endif
1615                                                 } else
1616 #endif
1617                                                 {
1618 #if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT)
1619                                                         add_update_RATid(priv, pstat);
1620 #endif
1621                                                 }
1622                         }
1623                 }
1624         }
1625 #endif
1626 }
1627
1628
1629 // Return Value: BOOLEAN
1630 // - TRUE: RATRState is changed.
1631 BOOLEAN
1632 ODM_RAStateCheck(
1633         IN              PVOID                   pDM_VOID,
1634         IN              s4Byte                  RSSI,
1635         IN              BOOLEAN                 bForceUpdate,
1636         OUT             pu1Byte                 pRATRState
1637 )
1638 {
1639         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1640         PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive;
1641         const u1Byte GoUpGap = 5;
1642         u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh;
1643         u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh;
1644         u1Byte RATRState;
1645         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", RSSI, *pRATRState));
1646         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Ori RA RSSI Thresh]  High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
1647         // Threshold Adjustment:
1648         // when RSSI state trends to go up one or two levels, make sure RSSI is high enough.
1649         // Here GoUpGap is added to solve the boundary's level alternation issue.
1650 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1651         u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh;
1652         if (pDM_Odm->SupportICType == ODM_RTL8881A)
1653                 LowRSSIThreshForRA = 30;                // for LDPC / BCC switch
1654 #endif
1655
1656         switch (*pRATRState) {
1657         case DM_RATR_STA_INIT:
1658         case DM_RATR_STA_HIGH:
1659                 break;
1660
1661         case DM_RATR_STA_MIDDLE:
1662                 HighRSSIThreshForRA += GoUpGap;
1663                 break;
1664
1665         case DM_RATR_STA_LOW:
1666                 HighRSSIThreshForRA += GoUpGap;
1667                 LowRSSIThreshForRA += GoUpGap;
1668                 break;
1669
1670 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1671         case DM_RATR_STA_ULTRA_LOW:
1672                 HighRSSIThreshForRA += GoUpGap;
1673                 LowRSSIThreshForRA += GoUpGap;
1674                 UltraLowRSSIThreshForRA += GoUpGap;
1675                 break;
1676 #endif
1677
1678         default:
1679                 ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState));
1680                 break;
1681         }
1682
1683         // Decide RATRState by RSSI.
1684         if (RSSI > HighRSSIThreshForRA)
1685                 RATRState = DM_RATR_STA_HIGH;
1686         else if (RSSI > LowRSSIThreshForRA)
1687                 RATRState = DM_RATR_STA_MIDDLE;
1688
1689 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1690         else if (RSSI > UltraLowRSSIThreshForRA)
1691                 RATRState = DM_RATR_STA_LOW;
1692         else
1693                 RATRState = DM_RATR_STA_ULTRA_LOW;
1694 #else
1695         else
1696                 RATRState = DM_RATR_STA_LOW;
1697 #endif
1698         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[Mod RA RSSI Thresh]  High= (( %d )), Low = (( %d ))\n", HighRSSIThreshForRA, LowRSSIThreshForRA));
1699         /*printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI);*/
1700
1701         if (*pRATRState != RATRState || bForceUpdate) {
1702                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("[RSSI Level Update] %d -> %d\n", *pRATRState, RATRState));
1703                 *pRATRState = RATRState;
1704                 return TRUE;
1705         }
1706
1707         return FALSE;
1708 }
1709
1710 VOID
1711 odm_RefreshBasicRateMask(
1712         IN      PVOID   pDM_VOID
1713 )
1714 {
1715 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1716         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1717         PADAPTER                Adapter  =  pDM_Odm->Adapter;
1718         static u1Byte           Stage = 0;
1719         u1Byte                  CurStage = 0;
1720         OCTET_STRING    osRateSet;
1721         PMGNT_INFO              pMgntInfo = GetDefaultMgntInfo(Adapter);
1722         u1Byte                  RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M};
1723
1724         if (pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821)
1725                 return;
1726
1727         if (pDM_Odm->bLinked == FALSE)  // unlink Default port information
1728                 CurStage = 0;
1729         else if (pDM_Odm->RSSI_Min < 40)        // link RSSI  < 40%
1730                 CurStage = 1;
1731         else if (pDM_Odm->RSSI_Min > 45)        // link RSSI > 45%
1732                 CurStage = 3;
1733         else
1734                 CurStage = 2;                                   // link  25% <= RSSI <= 30%
1735
1736         if (CurStage != Stage) {
1737                 if (CurStage == 1) {
1738                         FillOctetString(osRateSet, RateSet, 5);
1739                         FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE);
1740                         Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet);
1741                 } else if (CurStage == 3 && (Stage == 1 || Stage == 2))
1742                         Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates));
1743         }
1744
1745         Stage = CurStage;
1746 #endif
1747 }
1748
1749
1750 VOID
1751 phydm_ra_info_init(
1752         IN      PVOID   pDM_VOID
1753         )
1754 {
1755         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;
1756
1757         #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
1758         phydm_ra_dynamic_retry_limit_init(pDM_Odm);
1759         #endif
1760         #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1761         phydm_ra_dynamic_rate_id_init(pDM_Odm);
1762         #endif
1763
1764         /*phydm_fw_trace_en_h2c(pDM_Odm, 1, 0, 0);*/
1765 }
1766
1767
1768 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1769 u1Byte
1770 odm_Find_RTS_Rate(
1771         IN              PVOID                   pDM_VOID,
1772         IN              u1Byte                  Tx_Rate,
1773         IN              BOOLEAN                 bErpProtect
1774 )
1775 {
1776         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1777         u1Byte  RTS_Ini_Rate = ODM_RATE6M;
1778
1779         if (bErpProtect) /* use CCK rate as RTS*/
1780                 RTS_Ini_Rate = ODM_RATE1M;
1781         else {
1782                 switch (Tx_Rate) {
1783                 case ODM_RATEVHTSS3MCS9:
1784                 case ODM_RATEVHTSS3MCS8:
1785                 case ODM_RATEVHTSS3MCS7:
1786                 case ODM_RATEVHTSS3MCS6:
1787                 case ODM_RATEVHTSS3MCS5:
1788                 case ODM_RATEVHTSS3MCS4:
1789                 case ODM_RATEVHTSS3MCS3:
1790                 case ODM_RATEVHTSS2MCS9:
1791                 case ODM_RATEVHTSS2MCS8:
1792                 case ODM_RATEVHTSS2MCS7:
1793                 case ODM_RATEVHTSS2MCS6:
1794                 case ODM_RATEVHTSS2MCS5:
1795                 case ODM_RATEVHTSS2MCS4:
1796                 case ODM_RATEVHTSS2MCS3:
1797                 case ODM_RATEVHTSS1MCS9:
1798                 case ODM_RATEVHTSS1MCS8:
1799                 case ODM_RATEVHTSS1MCS7:
1800                 case ODM_RATEVHTSS1MCS6:
1801                 case ODM_RATEVHTSS1MCS5:
1802                 case ODM_RATEVHTSS1MCS4:
1803                 case ODM_RATEVHTSS1MCS3:
1804                 case ODM_RATEMCS15:
1805                 case ODM_RATEMCS14:
1806                 case ODM_RATEMCS13:
1807                 case ODM_RATEMCS12:
1808                 case ODM_RATEMCS11:
1809                 case ODM_RATEMCS7:
1810                 case ODM_RATEMCS6:
1811                 case ODM_RATEMCS5:
1812                 case ODM_RATEMCS4:
1813                 case ODM_RATEMCS3:
1814                 case ODM_RATE54M:
1815                 case ODM_RATE48M:
1816                 case ODM_RATE36M:
1817                 case ODM_RATE24M:
1818                         RTS_Ini_Rate = ODM_RATE24M;
1819                         break;
1820                 case ODM_RATEVHTSS3MCS2:
1821                 case ODM_RATEVHTSS3MCS1:
1822                 case ODM_RATEVHTSS2MCS2:
1823                 case ODM_RATEVHTSS2MCS1:
1824                 case ODM_RATEVHTSS1MCS2:
1825                 case ODM_RATEVHTSS1MCS1:
1826                 case ODM_RATEMCS10:
1827                 case ODM_RATEMCS9:
1828                 case ODM_RATEMCS2:
1829                 case ODM_RATEMCS1:
1830                 case ODM_RATE18M:
1831                 case ODM_RATE12M:
1832                         RTS_Ini_Rate = ODM_RATE12M;
1833                         break;
1834                 case ODM_RATEVHTSS3MCS0:
1835                 case ODM_RATEVHTSS2MCS0:
1836                 case ODM_RATEVHTSS1MCS0:
1837                 case ODM_RATEMCS8:
1838                 case ODM_RATEMCS0:
1839                 case ODM_RATE9M:
1840                 case ODM_RATE6M:
1841                         RTS_Ini_Rate = ODM_RATE6M;
1842                         break;
1843                 case ODM_RATE11M:
1844                 case ODM_RATE5_5M:
1845                 case ODM_RATE2M:
1846                 case ODM_RATE1M:
1847                         RTS_Ini_Rate = ODM_RATE1M;
1848                         break;
1849                 default:
1850                         RTS_Ini_Rate = ODM_RATE6M;
1851                         break;
1852                 }
1853         }
1854
1855         if (*pDM_Odm->pBandType == 1) {
1856                 if (RTS_Ini_Rate < ODM_RATE6M)
1857                         RTS_Ini_Rate = ODM_RATE6M;
1858         }
1859         return RTS_Ini_Rate;
1860
1861 }
1862
1863 VOID
1864 odm_Set_RA_DM_ARFB_by_Noisy(
1865         IN      PDM_ODM_T       pDM_Odm
1866 )
1867 {
1868         /*DbgPrint("DM_ARFB ====>\n");*/
1869         if (pDM_Odm->bNoisyState) {
1870                 ODM_Write4Byte(pDM_Odm, 0x430, 0x00000000);
1871                 ODM_Write4Byte(pDM_Odm, 0x434, 0x05040200);
1872                 /*DbgPrint("DM_ARFB ====> Noisy State\n");*/
1873         } else {
1874                 ODM_Write4Byte(pDM_Odm, 0x430, 0x02010000);
1875                 ODM_Write4Byte(pDM_Odm, 0x434, 0x07050403);
1876                 /*DbgPrint("DM_ARFB ====> Clean State\n");*/
1877         }
1878
1879 }
1880
1881 VOID
1882 ODM_UpdateNoisyState(
1883         IN      PVOID           pDM_VOID,
1884         IN      BOOLEAN         bNoisyStateFromC2H
1885 )
1886 {
1887         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1888
1889         /*DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);*/
1890         if (pDM_Odm->SupportICType == ODM_RTL8821  || pDM_Odm->SupportICType == ODM_RTL8812  ||
1891                 pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E)
1892                 pDM_Odm->bNoisyState = bNoisyStateFromC2H;
1893         odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm);
1894 };
1895
1896 u4Byte
1897 Set_RA_DM_Ratrbitmap_by_Noisy(
1898         IN      PVOID                   pDM_VOID,
1899         IN      WIRELESS_MODE   WirelessMode,
1900         IN      u4Byte                  ratr_bitmap,
1901         IN      u1Byte                  rssi_level
1902 )
1903 {
1904         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1905         u4Byte ret_bitmap = ratr_bitmap;
1906
1907         return ret_bitmap;
1908
1909         switch (WirelessMode) {
1910         case WIRELESS_MODE_AC_24G:
1911         case WIRELESS_MODE_AC_5G:
1912         case WIRELESS_MODE_AC_ONLY:
1913                 if (pDM_Odm->bNoisyState) { /*in Noisy State*/
1914                         if (rssi_level == 1)
1915                                 ret_bitmap &= 0xfc3e0c08;               // Reserve MCS 5-9
1916                         else if (rssi_level == 2)
1917                                 ret_bitmap &= 0xfe3f8e08;               // Reserve MCS 3-9
1918                         else if (rssi_level == 3)
1919                                 ret_bitmap &= 0xffffffff;
1920                         else
1921                                 ret_bitmap &= 0xffffffff;
1922                 } else {                                /* in SNR State*/
1923                         if (rssi_level == 1)
1924                                 ret_bitmap &= 0xfe3f0e08;               // Reserve MCS 4-9
1925                         else if (rssi_level == 2)
1926                                 ret_bitmap &= 0xff3fcf8c;               // Reserve MCS 2-9
1927                         else if (rssi_level == 3)
1928                                 ret_bitmap &= 0xffffffff;
1929                         else
1930                                 ret_bitmap &= 0xffffffff;
1931                 }
1932                 break;
1933         case WIRELESS_MODE_B:
1934         case WIRELESS_MODE_A:
1935         case WIRELESS_MODE_G:
1936         case WIRELESS_MODE_N_24G:
1937         case WIRELESS_MODE_N_5G:
1938                 if (pDM_Odm->bNoisyState) {
1939                         if (rssi_level == 1)
1940                                 ret_bitmap &= 0x0f0e0c08;               // Reserve MCS 4-7; MCS12-15
1941                         else if (rssi_level == 2)
1942                                 ret_bitmap &= 0x0fcfce0c;               // Reserve MCS 2-7; MCS10-15
1943                         else if (rssi_level == 3)
1944                                 ret_bitmap &= 0xffffffff;
1945                         else
1946                                 ret_bitmap &= 0xffffffff;
1947                 } else {
1948                         if (rssi_level == 1)
1949                                 ret_bitmap &= 0x0f8f8e08;               // Reserve MCS 3-7; MCS11-15
1950                         else if (rssi_level == 2)
1951                                 ret_bitmap &= 0x0fefef8c;               // Reserve MCS 1-7; MCS9-15
1952                         else if (rssi_level == 3)
1953                                 ret_bitmap &= 0xffffffff;
1954                         else
1955                                 ret_bitmap &= 0xffffffff;
1956                 }
1957                 break;
1958         default:
1959                 break;
1960         }
1961         /*DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x\n", rssi_level, ret_bitmap);*/
1962         return ret_bitmap;
1963
1964 }
1965
1966 VOID
1967 ODM_UpdateInitRate(
1968         IN      PVOID           pDM_VOID,
1969         IN      u1Byte          Rate
1970 )
1971 {
1972         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
1973         u1Byte                  p = 0;
1974
1975         ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Get C2H Command! Rate=0x%x\n", Rate));
1976
1977         pDM_Odm->TxRate = Rate;
1978 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1979 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
1980 #if USE_WORKITEM
1981                 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
1982 #else
1983                 if (pDM_Odm->SupportICType == ODM_RTL8821) {
1984 #if (RTL8821A_SUPPORT == 1)
1985                         ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1986 #endif
1987                 } else if (pDM_Odm->SupportICType == ODM_RTL8812) {
1988                         for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) {
1989 #if (RTL8812A_SUPPORT == 1)
1990                                 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
1991 #endif
1992                         }
1993                 } else if (pDM_Odm->SupportICType == ODM_RTL8723B) {
1994 #if (RTL8723B_SUPPORT == 1)
1995                         ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
1996 #endif
1997                 } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
1998                         for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) {
1999 #if (RTL8192E_SUPPORT == 1)
2000                                 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2001 #endif
2002                         }
2003                 } else if (pDM_Odm->SupportICType == ODM_RTL8188E) {
2004 #if (RTL8188E_SUPPORT == 1)
2005                         ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2006 #endif
2007                 }
2008 #endif
2009 #else
2010                 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2011 #endif
2012 #endif
2013
2014 }
2015
2016 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2017
2018 VOID
2019 odm_RSSIDumpToRegister(
2020         IN      PVOID   pDM_VOID
2021 )
2022 {
2023         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
2024         PADAPTER                Adapter = pDM_Odm->Adapter;
2025
2026         if (pDM_Odm->SupportICType == ODM_RTL8812) {
2027                 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]);
2028                 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]);
2029
2030                 /* Rx EVM*/
2031                 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]);
2032                 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]);
2033
2034                 /* Rx SNR*/
2035                 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2036                 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2037
2038                 /* Rx Cfo_Short*/
2039                 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]);
2040                 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]);
2041
2042                 /* Rx Cfo_Tail*/
2043                 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]);
2044                 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]);
2045         } else if (pDM_Odm->SupportICType == ODM_RTL8192E) {
2046                 PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]);
2047                 PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]);
2048                 /* Rx EVM*/
2049                 PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]);
2050                 PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]);
2051                 /* Rx SNR*/
2052                 PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0]));
2053                 PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1]));
2054                 /* Rx Cfo_Short*/
2055                 PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]);
2056                 PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]);
2057                 /* Rx Cfo_Tail*/
2058                 PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]);
2059                 PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]);
2060         }
2061 }
2062
2063 VOID
2064 odm_RefreshLdpcRtsMP(
2065         IN      PADAPTER                        pAdapter,
2066         IN      PDM_ODM_T                       pDM_Odm,
2067         IN      u1Byte                          mMacId,
2068         IN      u1Byte                          IOTPeer,
2069         IN      s4Byte                          UndecoratedSmoothedPWDB
2070 )
2071 {
2072         BOOLEAN                                 bCtlLdpc = FALSE;
2073         PMGNT_INFO                              pMgntInfo = GetDefaultMgntInfo(pAdapter);
2074         PODM_RATE_ADAPTIVE              pRA = &pDM_Odm->RateAdaptive;
2075
2076         if (pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812)
2077                 return;
2078
2079         if ((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A))
2080                 bCtlLdpc = TRUE;
2081         else if (pDM_Odm->SupportICType == ODM_RTL8812 &&
2082                          IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP)
2083                 bCtlLdpc = TRUE;
2084
2085         if (bCtlLdpc) {
2086                 if (UndecoratedSmoothedPWDB < (pRA->LdpcThres - 5))
2087                         MgntSet_TX_LDPC(pAdapter, mMacId, TRUE);
2088                 else if (UndecoratedSmoothedPWDB > pRA->LdpcThres)
2089                         MgntSet_TX_LDPC(pAdapter, mMacId, FALSE);
2090         }
2091
2092         if (UndecoratedSmoothedPWDB < (pRA->RtsThres - 5))
2093                 pRA->bLowerRtsRate = TRUE;
2094         else if (UndecoratedSmoothedPWDB > pRA->RtsThres)
2095                 pRA->bLowerRtsRate = FALSE;
2096 }
2097
2098 VOID
2099 ODM_DynamicARFBSelect(
2100         IN              PVOID           pDM_VOID,
2101         IN              u1Byte                  rate,
2102         IN              BOOLEAN                 Collision_State
2103 )
2104 {
2105         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
2106         pRA_T                   pRA_Table = &pDM_Odm->DM_RA_Table;
2107
2108         if (pDM_Odm->SupportICType != ODM_RTL8192E)
2109                 return;
2110
2111         if (Collision_State == pRA_Table->PT_collision_pre)
2112                 return;
2113
2114         if (rate >= DESC_RATEMCS8  && rate <= DESC_RATEMCS12) {
2115                 if (Collision_State == 1) {
2116                         if (rate == DESC_RATEMCS12) {
2117
2118                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2119                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501);
2120                         } else if (rate == DESC_RATEMCS11) {
2121
2122                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2123                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605);
2124                         } else if (rate == DESC_RATEMCS10) {
2125
2126                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2127                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706);
2128                         } else if (rate == DESC_RATEMCS9) {
2129
2130                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2131                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707);
2132                         } else {
2133
2134                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0);
2135                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808);
2136                         }
2137                 } else { /* Collision_State == 0*/
2138                         if (rate == DESC_RATEMCS12) {
2139
2140                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000);
2141                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2142                         } else if (rate == DESC_RATEMCS11) {
2143
2144                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000);
2145                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807);
2146                         } else if (rate == DESC_RATEMCS10) {
2147
2148                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000);
2149                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908);
2150                         } else if (rate == DESC_RATEMCS9) {
2151
2152                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000);
2153                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808);
2154                         } else {
2155
2156                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000);
2157                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909);
2158                         }
2159                 }
2160         } else { /* MCS13~MCS15,  1SS, G-mode*/
2161                 if (Collision_State == 1) {
2162                         if (rate == DESC_RATEMCS15) {
2163
2164                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2165                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302);
2166                         } else if (rate == DESC_RATEMCS14) {
2167
2168                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2169                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302);
2170                         } else if (rate == DESC_RATEMCS13) {
2171
2172                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2173                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502);
2174                         } else {
2175
2176                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000);
2177                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402);
2178                         }
2179                 } else { // Collision_State == 0
2180                         if (rate == DESC_RATEMCS15) {
2181
2182                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2183                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504);
2184                         } else if (rate == DESC_RATEMCS14) {
2185
2186                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000);
2187                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2188                         } else if (rate == DESC_RATEMCS13) {
2189
2190                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000);
2191                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706);
2192                         } else {
2193
2194                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000);
2195                                 ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605);
2196                         }
2197
2198
2199                 }
2200
2201         }
2202         pRA_Table->PT_collision_pre = Collision_State;
2203 }
2204
2205 VOID
2206 ODM_RateAdaptiveStateApInit(
2207         IN      PVOID           PADAPTER_VOID,
2208         IN      PRT_WLAN_STA    pEntry
2209 )
2210 {
2211         PADAPTER                Adapter = (PADAPTER)PADAPTER_VOID;
2212         pEntry->Ratr_State = DM_RATR_STA_INIT;
2213 }
2214 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
2215
2216 static void
2217 FindMinimumRSSI(
2218         IN      PADAPTER        pAdapter
2219 )
2220 {
2221         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
2222         PDM_ODM_T               pDM_Odm = &(pHalData->odmpriv);
2223
2224         /*Determine the minimum RSSI*/
2225
2226         if ((pDM_Odm->bLinked != _TRUE) &&
2227                 (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) {
2228                 pHalData->MinUndecoratedPWDBForDM = 0;
2229                 /*ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any\n"));*/
2230         } else
2231                 pHalData->MinUndecoratedPWDBForDM = pHalData->EntryMinUndecoratedSmoothedPWDB;
2232
2233         /*DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM);*/
2234         /*ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM));*/
2235 }
2236
2237 u8Byte
2238 PhyDM_Get_Rate_Bitmap_Ex(
2239         IN      PVOID           pDM_VOID,
2240         IN      u4Byte          macid,
2241         IN      u8Byte          ra_mask,
2242         IN      u1Byte          rssi_level,
2243         OUT             u8Byte  *dm_RA_Mask,
2244         OUT             u1Byte  *dm_RteID
2245 )
2246 {
2247         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
2248         PSTA_INFO_T     pEntry;
2249         u8Byte  rate_bitmap = 0;
2250         u1Byte  WirelessMode;
2251
2252         pEntry = pDM_Odm->pODM_StaInfo[macid];
2253         if (!IS_STA_VALID(pEntry))
2254                 return ra_mask;
2255         WirelessMode = pEntry->wireless_mode;
2256         switch (WirelessMode) {
2257         case ODM_WM_B:
2258                 if (ra_mask & 0x000000000000000c) /* 11M or 5.5M enable */
2259                         rate_bitmap = 0x000000000000000d;
2260                 else
2261                         rate_bitmap = 0x000000000000000f;
2262                 break;
2263
2264         case (ODM_WM_G):
2265         case (ODM_WM_A):
2266                 if (rssi_level == DM_RATR_STA_HIGH)
2267                         rate_bitmap = 0x0000000000000f00;
2268                 else
2269                         rate_bitmap = 0x0000000000000ff0;
2270                 break;
2271
2272         case (ODM_WM_B|ODM_WM_G):
2273                 if (rssi_level == DM_RATR_STA_HIGH)
2274                         rate_bitmap = 0x0000000000000f00;
2275                 else if (rssi_level == DM_RATR_STA_MIDDLE)
2276                         rate_bitmap = 0x0000000000000ff0;
2277                 else
2278                         rate_bitmap = 0x0000000000000ff5;
2279                 break;
2280
2281         case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
2282         case (ODM_WM_B|ODM_WM_N24G):
2283         case (ODM_WM_G|ODM_WM_N24G):
2284         case (ODM_WM_A|ODM_WM_N5G): {
2285                 if (pDM_Odm->RFType == ODM_1T1R) {
2286                         if (rssi_level == DM_RATR_STA_HIGH)
2287                                 rate_bitmap = 0x00000000000f0000;
2288                         else if (rssi_level == DM_RATR_STA_MIDDLE)
2289                                 rate_bitmap = 0x00000000000ff000;
2290                         else {
2291                                 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2292                                         rate_bitmap = 0x00000000000ff015;
2293                                 else
2294                                         rate_bitmap = 0x00000000000ff005;
2295                         }
2296                 }
2297         }
2298         break;
2299
2300         case (ODM_WM_AC|ODM_WM_G):
2301                 if (rssi_level == 1)
2302                         rate_bitmap = 0x00000000fc3f0000;
2303                 else if (rssi_level == 2)
2304                         rate_bitmap = 0x00000000fffff000;
2305                 else
2306                         rate_bitmap = 0x00000000ffffffff;
2307                 break;
2308
2309         case (ODM_WM_AC|ODM_WM_A):
2310
2311                 if (pDM_Odm->RFType == ODM_1T1R) {
2312                         if (rssi_level == 1)                            /* add by Gary for ac-series */
2313                                 rate_bitmap = 0x00000000003f8000;
2314                         else if (rssi_level == 2)
2315                                 rate_bitmap = 0x00000000003fe000;
2316                         else
2317                                 rate_bitmap = 0x00000000003ff010;
2318                 }
2319                 break;
2320
2321         default:
2322                 if (pDM_Odm->RFType == ODM_1T1R)
2323                         rate_bitmap = 0x00000000000fffff;
2324                 break;
2325
2326         }
2327         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%016llx\n", rssi_level, WirelessMode, rate_bitmap));
2328
2329         return (ra_mask & rate_bitmap);
2330 }
2331
2332
2333 u4Byte
2334 ODM_Get_Rate_Bitmap(
2335         IN      PVOID           pDM_VOID,
2336         IN      u4Byte          macid,
2337         IN      u4Byte          ra_mask,
2338         IN      u1Byte          rssi_level
2339 )
2340 {
2341         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;
2342         PSTA_INFO_T     pEntry;
2343         u4Byte  rate_bitmap = 0;
2344         u1Byte  WirelessMode;
2345         //u1Byte        WirelessMode =*(pDM_Odm->pWirelessMode);
2346
2347
2348         pEntry = pDM_Odm->pODM_StaInfo[macid];
2349         if (!IS_STA_VALID(pEntry))
2350                 return ra_mask;
2351
2352         WirelessMode = pEntry->wireless_mode;
2353
2354         switch (WirelessMode) {
2355         case ODM_WM_B:
2356                 if (ra_mask & 0x0000000c)               //11M or 5.5M enable
2357                         rate_bitmap = 0x0000000d;
2358                 else
2359                         rate_bitmap = 0x0000000f;
2360                 break;
2361
2362         case (ODM_WM_G):
2363         case (ODM_WM_A):
2364                 if (rssi_level == DM_RATR_STA_HIGH)
2365                         rate_bitmap = 0x00000f00;
2366                 else
2367                         rate_bitmap = 0x00000ff0;
2368                 break;
2369
2370         case (ODM_WM_B|ODM_WM_G):
2371                 if (rssi_level == DM_RATR_STA_HIGH)
2372                         rate_bitmap = 0x00000f00;
2373                 else if (rssi_level == DM_RATR_STA_MIDDLE)
2374                         rate_bitmap = 0x00000ff0;
2375                 else
2376                         rate_bitmap = 0x00000ff5;
2377                 break;
2378
2379         case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G)    :
2380         case (ODM_WM_B|ODM_WM_N24G)     :
2381         case (ODM_WM_G|ODM_WM_N24G)     :
2382         case (ODM_WM_A|ODM_WM_N5G)      : {
2383                 if (pDM_Odm->RFType == ODM_1T1R) {
2384                         if (rssi_level == DM_RATR_STA_HIGH)
2385                                 rate_bitmap = 0x000f0000;
2386                         else if (rssi_level == DM_RATR_STA_MIDDLE)
2387                                 rate_bitmap = 0x000ff000;
2388                         else {
2389                                 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
2390                                         rate_bitmap = 0x000ff015;
2391                                 else
2392                                         rate_bitmap = 0x000ff005;
2393                         }
2394                 }
2395         }
2396         break;
2397
2398         case (ODM_WM_AC|ODM_WM_G):
2399                 if (rssi_level == 1)
2400                         rate_bitmap = 0xfc3f0000;
2401                 else if (rssi_level == 2)
2402                         rate_bitmap = 0xfffff000;
2403                 else
2404                         rate_bitmap = 0xffffffff;
2405                 break;
2406
2407         case (ODM_WM_AC|ODM_WM_A):
2408
2409                 if (pDM_Odm->RFType == RF_1T1R) {
2410                         if (rssi_level == 1)                            // add by Gary for ac-series
2411                                 rate_bitmap = 0x003f8000;
2412                         else if (rssi_level == 2)
2413                                 rate_bitmap = 0x003ff000;
2414                         else
2415                                 rate_bitmap = 0x003ff010;
2416                 }
2417                 break;
2418
2419         default:
2420                 rate_bitmap = 0x0fffffff;
2421                 break;
2422
2423         }
2424
2425         DBG_871X("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap);
2426         ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap));
2427
2428         return (ra_mask & rate_bitmap);
2429
2430 }
2431
2432 #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2433
2434 #endif /*#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))*/