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amdgpu: add vram_type and vram_bit_width for interface query
authorKen Wang <Qingqing.Wang@amd.com>
Wed, 3 Jun 2015 09:15:29 +0000 (17:15 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 5 Aug 2015 17:47:50 +0000 (13:47 -0400)
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
amdgpu/amdgpu.h
amdgpu/amdgpu_gpu_info.c
include/drm/amdgpu_drm.h

index 17e5c1a..94fc647 100644 (file)
@@ -516,6 +516,10 @@ struct amdgpu_gpu_info {
        uint32_t cu_active_number;
        uint32_t cu_ao_mask;
        uint32_t cu_bitmap[4][4];
+       /* video memory type info*/
+       uint32_t vram_type;
+       /* video memory bit width*/
+       uint32_t vram_bit_width;
 };
 
 
index 7811b53..18cff4c 100644 (file)
@@ -158,6 +158,8 @@ int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
        dev->info.num_shader_engines = dev->dev_info.num_shader_engines;
        dev->info.num_shader_arrays_per_engine =
                dev->dev_info.num_shader_arrays_per_engine;
+       dev->info.vram_type = dev->dev_info.vram_type;
+       dev->info.vram_bit_width = dev->dev_info.vram_bit_width;
 
        for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
                unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
index 4d96bcf..772f803 100644 (file)
@@ -540,6 +540,15 @@ struct drm_amdgpu_info_firmware {
        uint32_t feature;
 };
 
+#define AMDGPU_VRAM_TYPE_UNKNOWN 0
+#define AMDGPU_VRAM_TYPE_GDDR1 1
+#define AMDGPU_VRAM_TYPE_DDR2  2
+#define AMDGPU_VRAM_TYPE_GDDR3 3
+#define AMDGPU_VRAM_TYPE_GDDR4 4
+#define AMDGPU_VRAM_TYPE_GDDR5 5
+#define AMDGPU_VRAM_TYPE_HBM   6
+#define AMDGPU_VRAM_TYPE_DDR3  7
+
 struct drm_amdgpu_info_device {
        /** PCI Device ID */
        uint32_t device_id;
@@ -573,6 +582,10 @@ struct drm_amdgpu_info_device {
        /** Page table entry - fragment size */
        uint32_t pte_fragment_size;
        uint32_t gart_page_size;
+       /** video memory type information*/
+       uint32_t vram_type;
+       /** video memory bit width*/
+       uint32_t vram_bit_width;
 };
 
 struct drm_amdgpu_info_hw_ip {