amdgpu: sync amdgpu_drm.h with the kernel

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>

diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h
index d43895e..d8f2497 100644 (file)
--- a/include/drm/amdgpu_drm.h
+++ b/include/drm/amdgpu_drm.h
@@ -34,6 +34,10 @@
 
 #include "drm.h"
 
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
 #define DRM_AMDGPU_GEM_CREATE          0x00
 #define DRM_AMDGPU_GEM_MMAP            0x01
 #define DRM_AMDGPU_CTX                 0x02
@@ -485,6 +489,22 @@ struct drm_amdgpu_cs_chunk_data {
 #define AMDGPU_INFO_MMR_SH_INDEX_SHIFT 8
 #define AMDGPU_INFO_MMR_SH_INDEX_MASK  0xff
 
+struct drm_amdgpu_query_fw {
+       /** AMDGPU_INFO_FW_* */
+       uint32_t fw_type;
+       /**
+        * Index of the IP if there are more IPs of
+        * the same type.
+        */
+       uint32_t ip_instance;
+       /**
+        * Index of the engine. Whether this is used depends
+        * on the firmware type. (e.g. MEC, SDMA)
+        */
+       uint32_t index;
+       uint32_t _pad;
+};
+
 /* Input structure for the INFO ioctl */
 struct drm_amdgpu_info {
        /* Where the return value will be stored */
@@ -520,21 +540,7 @@ struct drm_amdgpu_info {
                        uint32_t flags;
                } read_mmr_reg;
 
-               struct {
-                       /** AMDGPU_INFO_FW_* */
-                       uint32_t fw_type;
-                       /**
-                        * Index of the IP if there are more IPs of
-                        * the same type.
-                        */
-                       uint32_t ip_instance;
-                       /**
-                        * Index of the engine. Whether this is used depends
-                        * on the firmware type. (e.g. MEC, SDMA)
-                        */
-                       uint32_t index;
-                       uint32_t _pad;
-               } query_fw;
+               struct drm_amdgpu_query_fw query_fw;
        };
 };
 
@@ -642,6 +648,10 @@ struct drm_amdgpu_info_hw_ip {
 #define AMDGPU_FAMILY_CI                       120 /* Bonaire, Hawaii */
 #define AMDGPU_FAMILY_KV                       125 /* Kaveri, Kabini, Mullins */
 #define AMDGPU_FAMILY_VI                       130 /* Iceland, Tonga */
-#define AMDGPU_FAMILY_CZ                       135 /* Carrizo */
+#define AMDGPU_FAMILY_CZ                       135 /* Carrizo, Stoney */
+
+#if defined(__cplusplus)
+}
+#endif
 
 #endif