/** In which context IB was sent to execution */
amdgpu_context_handle context;
- /** Timeout in nanoseconds. */
- uint64_t timeout_ns;
-
/** To which HW IP type the fence belongs */
unsigned ip_type;
/** Ring index of the HW IP */
uint32_t ring;
- /** Flags */
- uint64_t flags;
-
/** Specify fence for which we need to check submission status.*/
uint64_t fence;
};
/**
* Query status of Command Buffer Submission
*
- * \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
* \param fence - \c [in] Structure describing fence to query
+ * \param timeout_ns - \c [in] Timeout value to wait
+ * \param flags - \c [in] Flags for the query
* \param expired - \c [out] If fence expired or not.\n
* 0 – if fence is not expired\n
* !0 - otherwise
* \sa amdgpu_cs_submit()
*/
int amdgpu_cs_query_fence_status(struct amdgpu_cs_query_fence *fence,
+ uint64_t timeout_ns,
+ uint64_t flags,
uint32_t *expired);
/*
}
int amdgpu_cs_query_fence_status(struct amdgpu_cs_query_fence *fence,
+ uint64_t timeout_ns,
+ uint64_t flags,
uint32_t *expired)
{
amdgpu_context_handle context;
}
/* Checking the user fence is enough. */
- if (fence->timeout_ns == 0) {
+ if (timeout_ns == 0) {
pthread_mutex_unlock(&context->sequence_mutex);
return 0;
}
pthread_mutex_unlock(&context->sequence_mutex);
r = amdgpu_ioctl_wait_cs(context, ip_type, ip_instance, ring,
- fence->fence, fence->timeout_ns,
- fence->flags, &busy);
+ fence->fence, timeout_ns,
+ flags, &busy);
if (!r && !busy) {
*expired = true;
pthread_mutex_lock(&context->sequence_mutex);
CU_ASSERT_EQUAL(r, 0);
fence_status.context = context_handle;
- fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = AMDGPU_HW_IP_GFX;
- r = amdgpu_cs_query_fence_status(&fence_status, &expired);
+ r = amdgpu_cs_query_fence_status(&fence_status,
+ AMDGPU_TIMEOUT_INFINITE,
+ 0, &expired);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_free(ib_result_handle);
CU_ASSERT_EQUAL(r, 0);
fence_status.context = context_handle;
- fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = AMDGPU_HW_IP_GFX;
- r = amdgpu_cs_query_fence_status(&fence_status, &expired);
+ r = amdgpu_cs_query_fence_status(&fence_status,
+ AMDGPU_TIMEOUT_INFINITE,
+ 0, &expired);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_free(ib_result_handle);
CU_ASSERT_EQUAL(r, 0);
fence_status.context = context_handle;
- fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = AMDGPU_HW_IP_COMPUTE;
fence_status.ring = instance;
- r = amdgpu_cs_query_fence_status(&fence_status, &expired);
+ r = amdgpu_cs_query_fence_status(&fence_status,
+ AMDGPU_TIMEOUT_INFINITE,
+ 0, &expired);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_list_destroy(bo_list);
fence_status.ip_type = AMDGPU_HW_IP_DMA;
fence_status.ring = ibs_request->ring;
fence_status.context = context_handle;
- fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
/* wait for IB accomplished */
- r = amdgpu_cs_query_fence_status(&fence_status, &expired);
+ r = amdgpu_cs_query_fence_status(&fence_status,
+ AMDGPU_TIMEOUT_INFINITE,
+ 0, &expired);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(expired, true);
return r;
fence_status.context = context_handle;
- fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = ip;
- r = amdgpu_cs_query_fence_status(&fence_status, &expired);
+ r = amdgpu_cs_query_fence_status(&fence_status,
+ AMDGPU_TIMEOUT_INFINITE,
+ 0, &expired);
if (r)
return r;
resources[num_resources-1] = ib_handle;
fence_status.context = context_handle;
- fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = ip;
- r = amdgpu_cs_query_fence_status(&fence_status, &expired);
+ r = amdgpu_cs_query_fence_status(&fence_status,
+ AMDGPU_TIMEOUT_INFINITE,
+ 0, &expired);
if (r)
return r;