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26 * \file common_bridge.c
27 * Support routines used to process PCI header information for bridges.
29 * \author Ian Romanick <idr@us.ibm.com>
38 #if defined(HAVE_STRING_H)
40 #elif defined(HAVE_STRINGS_H)
44 #if defined(HAVE_INTTYPES_H)
45 # include <inttypes.h>
46 #elif defined(HAVE_STDINT_H)
50 #include "pciaccess.h"
51 #include "pciaccess_private.h"
54 read_bridge_info( struct pci_device_private * priv )
61 /* Make sure the device has been probed. If not, header_type won't be
62 * set and the rest of this function will fail.
64 err = pci_device_probe(& priv->base);
69 switch ( priv->header_type & 0x7f ) {
74 struct pci_bridge_info *info;
76 info = malloc(sizeof(*info));
78 pci_device_cfg_read( (struct pci_device *) priv, buf + 0x18, 0x18,
79 0x40 - 0x18, & bytes );
81 info->primary_bus = buf[0x18];
82 info->secondary_bus = buf[0x19];
83 info->subordinate_bus = buf[0x1a];
84 info->secondary_latency_timer = buf[0x1b];
86 info->io_type = buf[0x1c] & 0x0f;
87 info->io_base = (((uint32_t) (buf[0x1c] & 0x0f0)) << 8)
88 + (((uint32_t) buf[0x30]) << 16)
89 + (((uint32_t) buf[0x31]) << 24);
91 info->io_limit = 0x00000fff
92 + (((uint32_t) (buf[0x1d] & 0x0f0)) << 8)
93 + (((uint32_t) buf[0x32]) << 16)
94 + (((uint32_t) buf[0x33]) << 24);
96 info->mem_type = buf[0x20] & 0x0f;
97 info->mem_base = (((uint32_t) (buf[0x20] & 0x0f0)) << 16)
98 + (((uint32_t) buf[0x21]) << 24);
100 info->mem_limit = 0x0000ffff
101 + (((uint32_t) (buf[0x22] & 0x0f0)) << 16)
102 + (((uint32_t) buf[0x23]) << 24);
104 info->prefetch_mem_type = buf[0x24] & 0x0f;
105 info->prefetch_mem_base = (((uint64_t) (buf[0x24] & 0x0f0)) << 16)
106 + (((uint64_t) buf[0x25]) << 24)
107 + (((uint64_t) buf[0x28]) << 32)
108 + (((uint64_t) buf[0x29]) << 40)
109 + (((uint64_t) buf[0x2a]) << 48)
110 + (((uint64_t) buf[0x2b]) << 56);
112 info->prefetch_mem_limit = 0x0000ffff
113 + (((uint64_t) (buf[0x26] & 0x0f0)) << 16)
114 + (((uint64_t) buf[0x27]) << 24)
115 + (((uint64_t) buf[0x2c]) << 32)
116 + (((uint64_t) buf[0x2d]) << 40)
117 + (((uint64_t) buf[0x2e]) << 48)
118 + (((uint64_t) buf[0x2f]) << 56);
120 info->bridge_control = ((uint16_t) buf[0x3e])
121 + (((uint16_t) buf[0x3f]) << 8);
123 info->secondary_status = ((uint16_t) buf[0x1e])
124 + (((uint16_t) buf[0x1f]) << 8);
127 priv->bridge.pci = info;
132 struct pci_pcmcia_bridge_info *info;
134 info = malloc(sizeof(*info));
136 pci_device_cfg_read( (struct pci_device *) priv, buf + 0x16, 0x16,
137 0x40 - 0x16, & bytes );
139 info->primary_bus = buf[0x18];
140 info->card_bus = buf[0x19];
141 info->subordinate_bus = buf[0x1a];
142 info->cardbus_latency_timer = buf[0x1b];
144 info->mem[0].base = (((uint32_t) buf[0x1c]))
145 + (((uint32_t) buf[0x1d]) << 8)
146 + (((uint32_t) buf[0x1e]) << 16)
147 + (((uint32_t) buf[0x1f]) << 24);
149 info->mem[0].limit = (((uint32_t) buf[0x20]))
150 + (((uint32_t) buf[0x21]) << 8)
151 + (((uint32_t) buf[0x22]) << 16)
152 + (((uint32_t) buf[0x23]) << 24);
154 info->mem[1].base = (((uint32_t) buf[0x24]))
155 + (((uint32_t) buf[0x25]) << 8)
156 + (((uint32_t) buf[0x26]) << 16)
157 + (((uint32_t) buf[0x27]) << 24);
159 info->mem[1].limit = (((uint32_t) buf[0x28]))
160 + (((uint32_t) buf[0x29]) << 8)
161 + (((uint32_t) buf[0x2a]) << 16)
162 + (((uint32_t) buf[0x2b]) << 24);
164 info->io[0].base = (((uint32_t) buf[0x2c]))
165 + (((uint32_t) buf[0x2d]) << 8)
166 + (((uint32_t) buf[0x2e]) << 16)
167 + (((uint32_t) buf[0x2f]) << 24);
169 info->io[0].limit = (((uint32_t) buf[0x30]))
170 + (((uint32_t) buf[0x31]) << 8)
171 + (((uint32_t) buf[0x32]) << 16)
172 + (((uint32_t) buf[0x33]) << 24);
174 info->io[1].base = (((uint32_t) buf[0x34]))
175 + (((uint32_t) buf[0x35]) << 8)
176 + (((uint32_t) buf[0x36]) << 16)
177 + (((uint32_t) buf[0x37]) << 24);
179 info->io[1].limit = (((uint32_t) buf[0x38]))
180 + (((uint32_t) buf[0x39]) << 8)
181 + (((uint32_t) buf[0x3a]) << 16)
182 + (((uint32_t) buf[0x3b]) << 24);
184 info->secondary_status = ((uint16_t) buf[0x16])
185 + (((uint16_t) buf[0x17]) << 8);
187 info->bridge_control = ((uint16_t) buf[0x3e])
188 + (((uint16_t) buf[0x3f]) << 8);
191 priv->bridge.pcmcia = info;
201 * Get the PCI bridge information for a device
204 * If \c dev is a PCI-to-PCI bridge, a pointer to a \c pci_bridge_info
205 * structure. Otherwise, \c NULL is returned.
207 const struct pci_bridge_info *
208 pci_device_get_bridge_info( struct pci_device * dev )
210 struct pci_device_private * priv = (struct pci_device_private *) dev;
212 if (priv->bridge.pci == NULL) {
213 read_bridge_info(priv);
216 return (priv->header_type == 1) ? priv->bridge.pci : NULL;
221 * Get the PCMCIA bridge information for a device
224 * If \c dev is a PCI-to-PCMCIA bridge, a pointer to a
225 * \c pci_pcmcia_bridge_info structure. Otherwise, \c NULL is returned.
227 const struct pci_pcmcia_bridge_info *
228 pci_device_get_pcmcia_bridge_info( struct pci_device * dev )
230 struct pci_device_private * priv = (struct pci_device_private *) dev;
232 if (priv->bridge.pcmcia == NULL) {
233 read_bridge_info(priv);
236 return (priv->header_type == 2) ? priv->bridge.pcmcia : NULL;
241 * Determine the primary, secondary, and subordinate buses for a bridge
243 * Determines the IDs of the primary, secondary, and subordinate buses for
244 * a specified bridge. Not all bridges directly store this information
245 * (e.g., PCI-to-ISA bridges). For those bridges, no error is returned, but
246 * -1 is stored in the bus IDs that don't make sense.
248 * For example, for a PCI-to-ISA bridge, \c primary_bus will be set to the ID
249 * of the bus containing the device and both \c secondary_bus and
250 * \c subordinate_bus will be set to -1.
253 * On success, zero is returned. If \c dev is not a bridge, \c ENODEV is
257 * Host bridges are handled the same way as PCI-to-ISA bridges. This is
258 * almost certainly not correct.
261 pci_device_get_bridge_buses(struct pci_device * dev, int *primary_bus,
262 int *secondary_bus, int *subordinate_bus)
264 struct pci_device_private * priv = (struct pci_device_private *) dev;
266 /* If the device isn't a bridge, return an error.
269 if (((dev->device_class >> 16) & 0x0ff) != 0x06) {
273 switch ((dev->device_class >> 8) & 0x0ff) {
275 /* What to do for host bridges? I'm pretty sure this isn't right.
277 *primary_bus = dev->bus;
279 *subordinate_bus = -1;
285 *primary_bus = dev->bus;
287 *subordinate_bus = -1;
291 if (priv->bridge.pci == NULL)
292 read_bridge_info(priv);
293 if (priv->header_type == 0x01) {
294 *primary_bus = priv->bridge.pci->primary_bus;
295 *secondary_bus = priv->bridge.pci->secondary_bus;
296 *subordinate_bus = priv->bridge.pci->subordinate_bus;
298 *primary_bus = dev->bus;
300 *subordinate_bus = -1;
305 if (priv->bridge.pcmcia == NULL)
306 read_bridge_info(priv);
307 if (priv->header_type == 0x02) {
308 *primary_bus = priv->bridge.pcmcia->primary_bus;
309 *secondary_bus = priv->bridge.pcmcia->card_bus;
310 *subordinate_bus = priv->bridge.pcmcia->subordinate_bus;
312 *primary_bus = dev->bus;
314 *subordinate_bus = -1;
322 #define PCI_CLASS_BRIDGE 0x06
323 #define PCI_SUBCLASS_BRIDGE_PCI 0x04
326 pci_device_get_parent_bridge(struct pci_device *dev)
328 struct pci_id_match bridge_match = {
329 PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,
330 (PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_PCI << 8),
334 struct pci_device *bridge;
335 struct pci_device_iterator *iter;
340 iter = pci_id_match_iterator_create(& bridge_match);
344 while ((bridge = pci_device_next(iter)) != NULL) {
345 if (bridge->domain == dev->domain) {
346 const struct pci_bridge_info *info =
347 pci_device_get_bridge_info(bridge);
350 if (info->secondary_bus == dev->bus) {
357 pci_iterator_destroy(iter);