1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements float type expansion and softening for LegalizeTypes.
11 // Softening is the act of turning a computation in an illegal floating point
12 // type into a computation in an integer type of the same size; also known as
13 // "soft float". For example, turning f32 arithmetic into operations using i32.
14 // The resulting integer value is the same as what you would get by performing
15 // the floating point operation and bitcasting the result to the integer type.
16 // Expansion is the act of changing a computation in an illegal type to be a
17 // computation in two identical registers of a smaller type. For example,
18 // implementing ppcf128 arithmetic in two f64 registers.
20 //===----------------------------------------------------------------------===//
22 #include "LegalizeTypes.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/raw_ostream.h"
27 #define DEBUG_TYPE "legalize-types"
29 /// GetFPLibCall - Return the right libcall for the given floating point type.
30 static RTLIB::Libcall GetFPLibCall(EVT VT,
31 RTLIB::Libcall Call_F32,
32 RTLIB::Libcall Call_F64,
33 RTLIB::Libcall Call_F80,
34 RTLIB::Libcall Call_F128,
35 RTLIB::Libcall Call_PPCF128) {
37 VT == MVT::f32 ? Call_F32 :
38 VT == MVT::f64 ? Call_F64 :
39 VT == MVT::f80 ? Call_F80 :
40 VT == MVT::f128 ? Call_F128 :
41 VT == MVT::ppcf128 ? Call_PPCF128 :
42 RTLIB::UNKNOWN_LIBCALL;
45 //===----------------------------------------------------------------------===//
46 // Convert Float Results to Integer for Non-HW-supported Operations.
47 //===----------------------------------------------------------------------===//
49 bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
50 LLVM_DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
52 SDValue R = SDValue();
54 switch (N->getOpcode()) {
57 dbgs() << "SoftenFloatResult #" << ResNo << ": ";
58 N->dump(&DAG); dbgs() << "\n";
60 llvm_unreachable("Do not know how to soften the result of this operator!");
63 case ISD::CopyFromReg:
65 assert(isLegalInHWReg(N->getValueType(ResNo)) &&
66 "Unsupported SoftenFloatRes opcode!");
67 // Only when isLegalInHWReg, we can skip check of the operands.
68 R = SDValue(N, ResNo);
70 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
71 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break;
72 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
73 case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
74 case ISD::EXTRACT_VECTOR_ELT:
75 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
76 case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
77 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
78 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
79 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
80 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break;
81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
83 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
84 case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
86 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break;
87 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break;
88 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break;
89 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
90 case ISD::FMA: R = SoftenFloatRes_FMA(N); break;
91 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
92 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break;
93 case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break;
94 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
95 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
96 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break;
97 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
98 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
100 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break;
102 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
103 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
104 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break;
106 case ISD::LOAD: R = SoftenFloatRes_LOAD(N, ResNo); break;
107 case ISD::SELECT: R = SoftenFloatRes_SELECT(N, ResNo); break;
108 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break;
109 case ISD::SINT_TO_FP:
110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
111 case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
112 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
115 if (R.getNode() && R.getNode() != N) {
116 SetSoftenedFloat(SDValue(N, ResNo), R);
117 // Return true only if the node is changed, assuming that the operands
118 // are also converted when necessary.
122 // Otherwise, return false to tell caller to scan operands.
126 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
127 if (isLegalInHWReg(N->getValueType(ResNo)))
128 return SDValue(N, ResNo);
129 return BitConvertToInteger(N->getOperand(0));
132 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
134 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
135 return BitConvertToInteger(Op);
138 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
139 // Convert the inputs to integers, and build a new pair out of them.
140 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N),
141 TLI.getTypeToTransformTo(*DAG.getContext(),
143 BitConvertToInteger(N->getOperand(0)),
144 BitConvertToInteger(N->getOperand(1)));
147 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
148 // When LegalInHWReg, we can load better from the constant pool.
149 if (isLegalInHWReg(N->getValueType(ResNo)))
150 return SDValue(N, ResNo);
151 ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
152 // In ppcf128, the high 64 bits are always first in memory regardless
153 // of Endianness. LLVM's APFloat representation is not Endian sensitive,
154 // and so always converts into a 128-bit APInt in a non-Endian-sensitive
155 // way. However, APInt's are serialized in an Endian-sensitive fashion,
156 // so on big-Endian targets, the two doubles are output in the wrong
157 // order. Fix this by manually flipping the order of the high 64 bits
158 // and the low 64 bits here.
159 if (DAG.getDataLayout().isBigEndian() &&
160 CN->getValueType(0).getSimpleVT() == llvm::MVT::ppcf128) {
161 uint64_t words[2] = { CN->getValueAPF().bitcastToAPInt().getRawData()[1],
162 CN->getValueAPF().bitcastToAPInt().getRawData()[0] };
163 APInt Val(128, words);
164 return DAG.getConstant(Val, SDLoc(CN),
165 TLI.getTypeToTransformTo(*DAG.getContext(),
166 CN->getValueType(0)));
168 return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN),
169 TLI.getTypeToTransformTo(*DAG.getContext(),
170 CN->getValueType(0)));
174 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
175 // When LegalInHWReg, keep the extracted value in register.
176 if (isLegalInHWReg(N->getValueType(ResNo)))
177 return SDValue(N, ResNo);
178 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
179 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180 NewOp.getValueType().getVectorElementType(),
181 NewOp, N->getOperand(1));
184 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
185 // When LegalInHWReg, FABS can be implemented as native bitwise operations.
186 if (isLegalInHWReg(N->getValueType(ResNo)))
187 return SDValue(N, ResNo);
188 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
189 unsigned Size = NVT.getSizeInBits();
191 // Mask = ~(1 << (Size-1))
192 APInt API = APInt::getAllOnesValue(Size);
193 API.clearBit(Size - 1);
194 SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT);
195 SDValue Op = GetSoftenedFloat(N->getOperand(0));
196 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
199 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
200 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
201 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
202 GetSoftenedFloat(N->getOperand(1)) };
203 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
208 RTLIB::FMIN_PPCF128),
209 NVT, Ops, false, SDLoc(N)).first;
212 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
213 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
214 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
215 GetSoftenedFloat(N->getOperand(1)) };
216 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
221 RTLIB::FMAX_PPCF128),
222 NVT, Ops, false, SDLoc(N)).first;
225 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
226 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
227 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
228 GetSoftenedFloat(N->getOperand(1)) };
229 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
235 NVT, Ops, false, SDLoc(N)).first;
238 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
239 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
240 SDValue Op = GetSoftenedFloat(N->getOperand(0));
241 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
246 RTLIB::CEIL_PPCF128),
247 NVT, Op, false, SDLoc(N)).first;
250 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) {
251 // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
252 if (isLegalInHWReg(N->getValueType(ResNo)))
253 return SDValue(N, ResNo);
254 SDValue LHS = GetSoftenedFloat(N->getOperand(0));
255 SDValue RHS = BitConvertToInteger(N->getOperand(1));
258 EVT LVT = LHS.getValueType();
259 EVT RVT = RHS.getValueType();
261 unsigned LSize = LVT.getSizeInBits();
262 unsigned RSize = RVT.getSizeInBits();
264 // First get the sign bit of second operand.
265 SDValue SignBit = DAG.getNode(
266 ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT),
267 DAG.getConstant(RSize - 1, dl,
268 TLI.getShiftAmountTy(RVT, DAG.getDataLayout())));
269 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
271 // Shift right or sign-extend it if the two operands have different types.
272 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
275 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
276 DAG.getConstant(SizeDiff, dl,
277 TLI.getShiftAmountTy(SignBit.getValueType(),
278 DAG.getDataLayout())));
279 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
280 } else if (SizeDiff < 0) {
281 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
283 DAG.getNode(ISD::SHL, dl, LVT, SignBit,
284 DAG.getConstant(-SizeDiff, dl,
285 TLI.getShiftAmountTy(SignBit.getValueType(),
286 DAG.getDataLayout())));
289 // Clear the sign bit of the first operand.
290 SDValue Mask = DAG.getNode(
291 ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT),
292 DAG.getConstant(LSize - 1, dl,
293 TLI.getShiftAmountTy(LVT, DAG.getDataLayout())));
294 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
295 LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
297 // Or the value with the sign bit.
298 return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit);
301 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
302 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
303 SDValue Op = GetSoftenedFloat(N->getOperand(0));
304 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
310 NVT, Op, false, SDLoc(N)).first;
313 SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
314 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
315 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
316 GetSoftenedFloat(N->getOperand(1)) };
317 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
323 NVT, Ops, false, SDLoc(N)).first;
326 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
327 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
328 SDValue Op = GetSoftenedFloat(N->getOperand(0));
329 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
335 NVT, Op, false, SDLoc(N)).first;
338 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
339 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
340 SDValue Op = GetSoftenedFloat(N->getOperand(0));
341 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
346 RTLIB::EXP2_PPCF128),
347 NVT, Op, false, SDLoc(N)).first;
350 SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
351 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
352 SDValue Op = GetSoftenedFloat(N->getOperand(0));
353 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
358 RTLIB::FLOOR_PPCF128),
359 NVT, Op, false, SDLoc(N)).first;
362 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
363 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
364 SDValue Op = GetSoftenedFloat(N->getOperand(0));
365 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
371 NVT, Op, false, SDLoc(N)).first;
374 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
375 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
376 SDValue Op = GetSoftenedFloat(N->getOperand(0));
377 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
382 RTLIB::LOG2_PPCF128),
383 NVT, Op, false, SDLoc(N)).first;
386 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
387 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
388 SDValue Op = GetSoftenedFloat(N->getOperand(0));
389 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
394 RTLIB::LOG10_PPCF128),
395 NVT, Op, false, SDLoc(N)).first;
398 SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
399 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
400 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
401 GetSoftenedFloat(N->getOperand(1)),
402 GetSoftenedFloat(N->getOperand(2)) };
403 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
409 NVT, Ops, false, SDLoc(N)).first;
412 SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
413 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
414 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
415 GetSoftenedFloat(N->getOperand(1)) };
416 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
422 NVT, Ops, false, SDLoc(N)).first;
425 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
426 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
427 SDValue Op = GetSoftenedFloat(N->getOperand(0));
428 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
429 RTLIB::NEARBYINT_F32,
430 RTLIB::NEARBYINT_F64,
431 RTLIB::NEARBYINT_F80,
432 RTLIB::NEARBYINT_F128,
433 RTLIB::NEARBYINT_PPCF128),
434 NVT, Op, false, SDLoc(N)).first;
437 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) {
438 // When LegalInHWReg, FNEG can be implemented as native bitwise operations.
439 if (isLegalInHWReg(N->getValueType(ResNo)))
440 return SDValue(N, ResNo);
441 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
443 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
444 SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)),
445 GetSoftenedFloat(N->getOperand(0)) };
446 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
452 NVT, Ops, false, dl).first;
455 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
456 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
457 SDValue Op = N->getOperand(0);
459 // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
460 // entirely possible for both f16 and f32 to be legal, so use the fully
461 // hard-float FP_EXTEND rather than FP16_TO_FP.
462 if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) {
463 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
464 if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
465 AddToWorklist(Op.getNode());
468 if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) {
469 Op = GetPromotedFloat(Op);
470 // If the promotion did the FP_EXTEND to the destination type for us,
471 // there's nothing left to do here.
472 if (Op.getValueType() == N->getValueType(0)) {
473 return BitConvertToInteger(Op);
477 RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
478 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
479 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
482 // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
484 SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
485 EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32);
486 SDValue Op = N->getOperand(0);
487 SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op,
488 false, SDLoc(N)).first;
489 if (N->getValueType(0) == MVT::f32)
492 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
493 RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0));
494 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
495 return TLI.makeLibCall(DAG, LC, NVT, Res32, false, SDLoc(N)).first;
498 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
499 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
500 SDValue Op = N->getOperand(0);
501 if (N->getValueType(0) == MVT::f16) {
502 // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a
503 // storage-only type get a chance to select things.
504 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
507 RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0));
508 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
509 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
512 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
513 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
514 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
515 GetSoftenedFloat(N->getOperand(1)) };
516 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
522 NVT, Ops, false, SDLoc(N)).first;
525 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
526 assert(N->getOperand(1).getValueType() == MVT::i32 &&
527 "Unsupported power type!");
528 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
529 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
530 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
535 RTLIB::POWI_PPCF128),
536 NVT, Ops, false, SDLoc(N)).first;
539 SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
540 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
541 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
542 GetSoftenedFloat(N->getOperand(1)) };
543 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
549 NVT, Ops, false, SDLoc(N)).first;
552 SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
553 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
554 SDValue Op = GetSoftenedFloat(N->getOperand(0));
555 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
560 RTLIB::RINT_PPCF128),
561 NVT, Op, false, SDLoc(N)).first;
564 SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
565 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
566 SDValue Op = GetSoftenedFloat(N->getOperand(0));
567 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
572 RTLIB::ROUND_PPCF128),
573 NVT, Op, false, SDLoc(N)).first;
576 SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
577 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
578 SDValue Op = GetSoftenedFloat(N->getOperand(0));
579 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
585 NVT, Op, false, SDLoc(N)).first;
588 SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
589 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
590 SDValue Op = GetSoftenedFloat(N->getOperand(0));
591 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
596 RTLIB::SQRT_PPCF128),
597 NVT, Op, false, SDLoc(N)).first;
600 SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
601 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
602 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
603 GetSoftenedFloat(N->getOperand(1)) };
604 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
610 NVT, Ops, false, SDLoc(N)).first;
613 SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
614 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
615 if (N->getValueType(0) == MVT::f16)
616 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
618 SDValue Op = GetSoftenedFloat(N->getOperand(0));
619 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
624 RTLIB::TRUNC_PPCF128),
625 NVT, Op, false, SDLoc(N)).first;
628 SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) {
629 bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo));
630 LoadSDNode *L = cast<LoadSDNode>(N);
631 EVT VT = N->getValueType(0);
632 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
636 L->getMemOperand()->getFlags() &
637 ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable);
639 if (L->getExtensionType() == ISD::NON_EXTLOAD) {
640 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl,
641 L->getChain(), L->getBasePtr(), L->getOffset(),
642 L->getPointerInfo(), NVT, L->getAlignment(), MMOFlags,
644 // Legalized the chain result - switch anything that used the old chain to
646 if (N != NewL.getValue(1).getNode())
647 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
651 // Do a non-extending load followed by FP_EXTEND.
652 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, L->getMemoryVT(),
653 dl, L->getChain(), L->getBasePtr(), L->getOffset(),
654 L->getPointerInfo(), L->getMemoryVT(), L->getAlignment(),
655 MMOFlags, L->getAAInfo());
656 // Legalized the chain result - switch anything that used the old chain to
658 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
659 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
662 return BitConvertToInteger(ExtendNode);
665 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) {
666 if (isLegalInHWReg(N->getValueType(ResNo)))
667 return SDValue(N, ResNo);
668 SDValue LHS = GetSoftenedFloat(N->getOperand(1));
669 SDValue RHS = GetSoftenedFloat(N->getOperand(2));
670 return DAG.getSelect(SDLoc(N),
671 LHS.getValueType(), N->getOperand(0), LHS, RHS);
674 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) {
675 if (isLegalInHWReg(N->getValueType(ResNo)))
676 return SDValue(N, ResNo);
677 SDValue LHS = GetSoftenedFloat(N->getOperand(2));
678 SDValue RHS = GetSoftenedFloat(N->getOperand(3));
679 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
680 LHS.getValueType(), N->getOperand(0),
681 N->getOperand(1), LHS, RHS, N->getOperand(4));
684 SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
685 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
686 N->getValueType(0)));
689 SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
690 SDValue Chain = N->getOperand(0); // Get the chain.
691 SDValue Ptr = N->getOperand(1); // Get the pointer.
692 EVT VT = N->getValueType(0);
693 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
697 NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
698 N->getConstantOperandVal(3));
700 // Legalized the chain result - switch anything that used the old chain to
702 if (N != NewVAARG.getValue(1).getNode())
703 ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1));
707 SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
708 bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
709 EVT SVT = N->getOperand(0).getValueType();
710 EVT RVT = N->getValueType(0);
714 // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to
715 // a larger type, eg: i8 -> fp. Even if it is legal, no libcall may exactly
716 // match. Look for an appropriate libcall.
717 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
718 for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
719 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
720 NVT = (MVT::SimpleValueType)t;
721 // The source needs to big enough to hold the operand.
723 LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT):RTLIB::getUINTTOFP (NVT, RVT);
725 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
727 // Sign/zero extend the argument if the libcall takes a larger type.
728 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
729 NVT, N->getOperand(0));
730 return TLI.makeLibCall(DAG, LC,
731 TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
732 Op, Signed, dl).first;
736 //===----------------------------------------------------------------------===//
737 // Convert Float Operand to Integer for Non-HW-supported Operations.
738 //===----------------------------------------------------------------------===//
740 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
741 LLVM_DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
743 SDValue Res = SDValue();
745 switch (N->getOpcode()) {
747 if (CanSkipSoftenFloatOperand(N, OpNo))
750 dbgs() << "SoftenFloatOperand Op #" << OpNo << ": ";
751 N->dump(&DAG); dbgs() << "\n";
753 llvm_unreachable("Do not know how to soften this operator's operand!");
755 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break;
756 case ISD::CopyToReg: Res = SoftenFloatOp_COPY_TO_REG(N); break;
757 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
758 case ISD::FABS: Res = SoftenFloatOp_FABS(N); break;
759 case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break;
760 case ISD::FNEG: Res = SoftenFloatOp_FNEG(N); break;
761 case ISD::FP_EXTEND: Res = SoftenFloatOp_FP_EXTEND(N); break;
762 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes
763 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break;
764 case ISD::FP_TO_SINT:
765 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
766 case ISD::SELECT: Res = SoftenFloatOp_SELECT(N); break;
767 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
768 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
770 Res = SoftenFloatOp_STORE(N, OpNo);
771 // Do not try to analyze or soften this node again if the value is
772 // or can be held in a register. In that case, Res.getNode() should
774 if (Res.getNode() == N &&
775 isLegalInHWReg(N->getOperand(OpNo).getValueType()))
777 // Otherwise, we need to reanalyze and lower the new Res nodes.
781 // If the result is null, the sub-method took care of registering results etc.
782 if (!Res.getNode()) return false;
784 // If the result is N, the sub-method updated N in place. Tell the legalizer
785 // core about this to re-analyze.
786 if (Res.getNode() == N)
789 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
790 "Invalid operand expansion");
792 ReplaceValueWith(SDValue(N, 0), Res);
796 bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
797 if (!isLegalInHWReg(N->getOperand(OpNo).getValueType()))
800 // When the operand type can be kept in registers there is nothing to do for
801 // the following opcodes.
802 switch (N->getOperand(OpNo).getOpcode()) {
804 case ISD::ConstantFP:
805 case ISD::CopyFromReg:
816 switch (N->getOpcode()) {
817 case ISD::ConstantFP: // Leaf node.
818 case ISD::CopyFromReg: // Operand is a register that we know to be left
819 // unchanged by SoftenFloatResult().
820 case ISD::Register: // Leaf node.
826 SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
827 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
828 GetSoftenedFloat(N->getOperand(0)));
831 SDValue DAGTypeLegalizer::SoftenFloatOp_COPY_TO_REG(SDNode *N) {
832 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
833 SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
835 if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
838 if (N->getNumOperands() == 3)
839 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2), 0);
841 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2,
846 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
847 // If we get here, the result must be legal but the source illegal.
848 EVT SVT = N->getOperand(0).getValueType();
849 EVT RVT = N->getValueType(0);
850 SDValue Op = GetSoftenedFloat(N->getOperand(0));
853 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op);
855 RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT);
856 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall");
858 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
862 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
863 // We actually deal with the partially-softened FP_TO_FP16 node too, which
864 // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.
865 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
867 EVT SVT = N->getOperand(0).getValueType();
868 EVT RVT = N->getValueType(0);
869 EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT;
871 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT);
872 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall");
874 SDValue Op = GetSoftenedFloat(N->getOperand(0));
875 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
878 SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
879 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
880 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
882 EVT VT = NewLHS.getValueType();
883 NewLHS = GetSoftenedFloat(NewLHS);
884 NewRHS = GetSoftenedFloat(NewRHS);
885 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
887 // If softenSetCCOperands returned a scalar, we need to compare the result
888 // against zero to select between true and false values.
889 if (!NewRHS.getNode()) {
890 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
894 // Update N to have the operands specified.
895 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
896 DAG.getCondCode(CCCode), NewLHS, NewRHS,
901 SDValue DAGTypeLegalizer::SoftenFloatOp_FABS(SDNode *N) {
902 SDValue Op = GetSoftenedFloat(N->getOperand(0));
904 if (Op == N->getOperand(0))
907 return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
910 SDValue DAGTypeLegalizer::SoftenFloatOp_FCOPYSIGN(SDNode *N) {
911 SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
912 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
914 if (Op0 == N->getOperand(0) && Op1 == N->getOperand(1))
917 return SDValue(DAG.UpdateNodeOperands(N, Op0, Op1), 0);
920 SDValue DAGTypeLegalizer::SoftenFloatOp_FNEG(SDNode *N) {
921 SDValue Op = GetSoftenedFloat(N->getOperand(0));
923 if (Op == N->getOperand(0))
926 return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
929 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
930 bool Signed = N->getOpcode() == ISD::FP_TO_SINT;
931 EVT SVT = N->getOperand(0).getValueType();
932 EVT RVT = N->getValueType(0);
936 // If the result is not legal, eg: fp -> i1, then it needs to be promoted to
937 // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
938 // match, eg. we don't have fp -> i8 conversions.
939 // Look for an appropriate libcall.
940 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
941 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
942 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
944 NVT = (MVT::SimpleValueType)IntVT;
945 // The type needs to big enough to hold the result.
947 LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT):RTLIB::getFPTOUINT(SVT, NVT);
949 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
951 SDValue Op = GetSoftenedFloat(N->getOperand(0));
952 SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, false, dl).first;
954 // Truncate the result if the libcall returns a larger type.
955 return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res);
958 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT(SDNode *N) {
959 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
960 SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
962 if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
965 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2),
969 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
970 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
971 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
973 EVT VT = NewLHS.getValueType();
974 NewLHS = GetSoftenedFloat(NewLHS);
975 NewRHS = GetSoftenedFloat(NewRHS);
976 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
978 // If softenSetCCOperands returned a scalar, we need to compare the result
979 // against zero to select between true and false values.
980 if (!NewRHS.getNode()) {
981 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
985 // Update N to have the operands specified.
986 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
987 N->getOperand(2), N->getOperand(3),
988 DAG.getCondCode(CCCode)),
992 SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
993 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
994 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
996 EVT VT = NewLHS.getValueType();
997 NewLHS = GetSoftenedFloat(NewLHS);
998 NewRHS = GetSoftenedFloat(NewRHS);
999 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
1001 // If softenSetCCOperands returned a scalar, use it.
1002 if (!NewRHS.getNode()) {
1003 assert(NewLHS.getValueType() == N->getValueType(0) &&
1004 "Unexpected setcc expansion!");
1008 // Otherwise, update N to have the operands specified.
1009 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1010 DAG.getCondCode(CCCode)),
1014 SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
1015 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1016 assert(OpNo == 1 && "Can only soften the stored value!");
1017 StoreSDNode *ST = cast<StoreSDNode>(N);
1018 SDValue Val = ST->getValue();
1021 if (ST->isTruncatingStore())
1022 // Do an FP_ROUND followed by a non-truncating store.
1023 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(),
1024 Val, DAG.getIntPtrConstant(0, dl)));
1026 Val = GetSoftenedFloat(Val);
1028 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(),
1029 ST->getMemOperand());
1033 //===----------------------------------------------------------------------===//
1034 // Float Result Expansion
1035 //===----------------------------------------------------------------------===//
1037 /// ExpandFloatResult - This method is called when the specified result of the
1038 /// specified node is found to need expansion. At this point, the node may also
1039 /// have invalid operands or may have other results that need promotion, we just
1040 /// know that (at least) one result needs expansion.
1041 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
1042 LLVM_DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n");
1044 Lo = Hi = SDValue();
1046 // See if the target wants to custom expand this node.
1047 if (CustomLowerNode(N, N->getValueType(ResNo), true))
1050 switch (N->getOpcode()) {
1053 dbgs() << "ExpandFloatResult #" << ResNo << ": ";
1054 N->dump(&DAG); dbgs() << "\n";
1056 llvm_unreachable("Do not know how to expand the result of this operator!");
1058 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
1059 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
1060 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
1062 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
1063 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
1064 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
1065 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
1066 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
1067 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
1069 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
1070 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
1071 case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break;
1072 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break;
1073 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
1074 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break;
1075 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break;
1076 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
1077 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
1078 case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break;
1079 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break;
1080 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break;
1081 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break;
1082 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break;
1083 case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break;
1084 case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break;
1085 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
1086 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break;
1087 case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break;
1088 case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break;
1089 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
1090 case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
1091 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
1092 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break;
1093 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
1094 case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break;
1095 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
1096 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
1097 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
1098 case ISD::SINT_TO_FP:
1099 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
1100 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break;
1103 // If Lo/Hi is null, the sub-method took care of registering results etc.
1105 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi);
1108 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1110 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1111 assert(NVT.getSizeInBits() == 64 &&
1112 "Do not know how to expand this float constant!");
1113 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt();
1115 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1116 APInt(64, C.getRawData()[1])),
1118 Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1119 APInt(64, C.getRawData()[0])),
1123 void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1125 assert(N->getValueType(0) == MVT::ppcf128 &&
1126 "Logic only correct for ppcf128!");
1129 GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1130 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
1131 // Lo = Hi==fabs(Hi) ? Lo : -Lo;
1132 Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
1133 DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo),
1137 void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1139 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1140 RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1141 RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1142 RTLIB::FMIN_PPCF128),
1144 GetPairElements(Call, Lo, Hi);
1147 void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1149 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1150 RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1151 RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1152 RTLIB::FMAX_PPCF128),
1154 GetPairElements(Call, Lo, Hi);
1157 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1159 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1160 RTLIB::ADD_F32, RTLIB::ADD_F64,
1161 RTLIB::ADD_F80, RTLIB::ADD_F128,
1162 RTLIB::ADD_PPCF128),
1164 GetPairElements(Call, Lo, Hi);
1167 void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1168 SDValue &Lo, SDValue &Hi) {
1169 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1170 RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1171 RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1172 RTLIB::CEIL_PPCF128),
1174 GetPairElements(Call, Lo, Hi);
1177 void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1178 SDValue &Lo, SDValue &Hi) {
1179 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1180 RTLIB::COPYSIGN_F32,
1181 RTLIB::COPYSIGN_F64,
1182 RTLIB::COPYSIGN_F80,
1183 RTLIB::COPYSIGN_F128,
1184 RTLIB::COPYSIGN_PPCF128),
1186 GetPairElements(Call, Lo, Hi);
1189 void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1190 SDValue &Lo, SDValue &Hi) {
1191 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1192 RTLIB::COS_F32, RTLIB::COS_F64,
1193 RTLIB::COS_F80, RTLIB::COS_F128,
1194 RTLIB::COS_PPCF128),
1196 GetPairElements(Call, Lo, Hi);
1199 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1201 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1202 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1207 RTLIB::DIV_PPCF128),
1208 N->getValueType(0), Ops, false,
1210 GetPairElements(Call, Lo, Hi);
1213 void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1214 SDValue &Lo, SDValue &Hi) {
1215 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1216 RTLIB::EXP_F32, RTLIB::EXP_F64,
1217 RTLIB::EXP_F80, RTLIB::EXP_F128,
1218 RTLIB::EXP_PPCF128),
1220 GetPairElements(Call, Lo, Hi);
1223 void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1224 SDValue &Lo, SDValue &Hi) {
1225 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1226 RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1227 RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1228 RTLIB::EXP2_PPCF128),
1230 GetPairElements(Call, Lo, Hi);
1233 void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1234 SDValue &Lo, SDValue &Hi) {
1235 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1236 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1237 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1238 RTLIB::FLOOR_PPCF128),
1240 GetPairElements(Call, Lo, Hi);
1243 void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1244 SDValue &Lo, SDValue &Hi) {
1245 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1246 RTLIB::LOG_F32, RTLIB::LOG_F64,
1247 RTLIB::LOG_F80, RTLIB::LOG_F128,
1248 RTLIB::LOG_PPCF128),
1250 GetPairElements(Call, Lo, Hi);
1253 void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1254 SDValue &Lo, SDValue &Hi) {
1255 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1256 RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1257 RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1258 RTLIB::LOG2_PPCF128),
1260 GetPairElements(Call, Lo, Hi);
1263 void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1264 SDValue &Lo, SDValue &Hi) {
1265 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1266 RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1267 RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1268 RTLIB::LOG10_PPCF128),
1270 GetPairElements(Call, Lo, Hi);
1273 void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1275 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1276 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1281 RTLIB::FMA_PPCF128),
1282 N->getValueType(0), Ops, false,
1284 GetPairElements(Call, Lo, Hi);
1287 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1289 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1290 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1295 RTLIB::MUL_PPCF128),
1296 N->getValueType(0), Ops, false,
1298 GetPairElements(Call, Lo, Hi);
1301 void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1302 SDValue &Lo, SDValue &Hi) {
1303 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1304 RTLIB::NEARBYINT_F32,
1305 RTLIB::NEARBYINT_F64,
1306 RTLIB::NEARBYINT_F80,
1307 RTLIB::NEARBYINT_F128,
1308 RTLIB::NEARBYINT_PPCF128),
1310 GetPairElements(Call, Lo, Hi);
1313 void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1316 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1317 Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo);
1318 Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi);
1321 void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1323 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1325 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1326 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1327 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1330 void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1331 SDValue &Lo, SDValue &Hi) {
1332 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1333 RTLIB::POW_F32, RTLIB::POW_F64,
1334 RTLIB::POW_F80, RTLIB::POW_F128,
1335 RTLIB::POW_PPCF128),
1337 GetPairElements(Call, Lo, Hi);
1340 void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1341 SDValue &Lo, SDValue &Hi) {
1342 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1343 RTLIB::POWI_F32, RTLIB::POWI_F64,
1344 RTLIB::POWI_F80, RTLIB::POWI_F128,
1345 RTLIB::POWI_PPCF128),
1347 GetPairElements(Call, Lo, Hi);
1350 void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1351 SDValue &Lo, SDValue &Hi) {
1352 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1353 RTLIB::REM_F32, RTLIB::REM_F64,
1354 RTLIB::REM_F80, RTLIB::REM_F128,
1355 RTLIB::REM_PPCF128),
1357 GetPairElements(Call, Lo, Hi);
1360 void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1361 SDValue &Lo, SDValue &Hi) {
1362 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1363 RTLIB::RINT_F32, RTLIB::RINT_F64,
1364 RTLIB::RINT_F80, RTLIB::RINT_F128,
1365 RTLIB::RINT_PPCF128),
1367 GetPairElements(Call, Lo, Hi);
1370 void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1371 SDValue &Lo, SDValue &Hi) {
1372 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1377 RTLIB::ROUND_PPCF128),
1379 GetPairElements(Call, Lo, Hi);
1382 void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1383 SDValue &Lo, SDValue &Hi) {
1384 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1385 RTLIB::SIN_F32, RTLIB::SIN_F64,
1386 RTLIB::SIN_F80, RTLIB::SIN_F128,
1387 RTLIB::SIN_PPCF128),
1389 GetPairElements(Call, Lo, Hi);
1392 void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1393 SDValue &Lo, SDValue &Hi) {
1394 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1395 RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1396 RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1397 RTLIB::SQRT_PPCF128),
1399 GetPairElements(Call, Lo, Hi);
1402 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1404 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1405 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1410 RTLIB::SUB_PPCF128),
1411 N->getValueType(0), Ops, false,
1413 GetPairElements(Call, Lo, Hi);
1416 void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1417 SDValue &Lo, SDValue &Hi) {
1418 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1419 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1420 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1421 RTLIB::TRUNC_PPCF128),
1423 GetPairElements(Call, Lo, Hi);
1426 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1428 if (ISD::isNormalLoad(N)) {
1429 ExpandRes_NormalLoad(N, Lo, Hi);
1433 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
1434 LoadSDNode *LD = cast<LoadSDNode>(N);
1435 SDValue Chain = LD->getChain();
1436 SDValue Ptr = LD->getBasePtr();
1439 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
1440 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1441 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1443 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr,
1444 LD->getMemoryVT(), LD->getMemOperand());
1446 // Remember the chain.
1447 Chain = Hi.getValue(1);
1449 // The low part is zero.
1450 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1451 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1453 // Modified the chain - switch anything that used the old chain to use the
1455 ReplaceValueWith(SDValue(LD, 1), Chain);
1458 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1460 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
1461 EVT VT = N->getValueType(0);
1462 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1463 SDValue Src = N->getOperand(0);
1464 EVT SrcVT = Src.getValueType();
1465 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
1468 // First do an SINT_TO_FP, whether the original was signed or unsigned.
1469 // When promoting partial word types to i32 we must honor the signedness,
1471 if (SrcVT.bitsLE(MVT::i32)) {
1472 // The integer can be represented exactly in an f64.
1473 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1475 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1476 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1477 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
1479 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1480 if (SrcVT.bitsLE(MVT::i64)) {
1481 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1483 LC = RTLIB::SINTTOFP_I64_PPCF128;
1484 } else if (SrcVT.bitsLE(MVT::i128)) {
1485 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1486 LC = RTLIB::SINTTOFP_I128_PPCF128;
1488 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
1490 Hi = TLI.makeLibCall(DAG, LC, VT, Src, true, dl).first;
1491 GetPairElements(Hi, Lo, Hi);
1497 // Unsigned - fix up the SINT_TO_FP value just calculated.
1498 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
1499 SrcVT = Src.getValueType();
1501 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
1502 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
1503 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
1504 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1505 ArrayRef<uint64_t> Parts;
1507 switch (SrcVT.getSimpleVT().SimpleTy) {
1509 llvm_unreachable("Unsupported UINT_TO_FP!");
1521 // TODO: Are there fast-math-flags to propagate to this FADD?
1522 Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
1523 DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble(),
1526 Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
1527 Lo, Hi, ISD::SETLT);
1528 GetPairElements(Lo, Lo, Hi);
1532 //===----------------------------------------------------------------------===//
1533 // Float Operand Expansion
1534 //===----------------------------------------------------------------------===//
1536 /// ExpandFloatOperand - This method is called when the specified operand of the
1537 /// specified node is found to need expansion. At this point, all of the result
1538 /// types of the node are known to be legal, but other operands of the node may
1539 /// need promotion or expansion as well as the specified one.
1540 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1541 LLVM_DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n");
1542 SDValue Res = SDValue();
1544 // See if the target wants to custom expand this node.
1545 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1548 switch (N->getOpcode()) {
1551 dbgs() << "ExpandFloatOperand Op #" << OpNo << ": ";
1552 N->dump(&DAG); dbgs() << "\n";
1554 llvm_unreachable("Do not know how to expand this operator's operand!");
1556 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break;
1557 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
1558 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
1560 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
1561 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break;
1562 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
1563 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
1564 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1565 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
1566 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
1567 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
1571 // If the result is null, the sub-method took care of registering results etc.
1572 if (!Res.getNode()) return false;
1574 // If the result is N, the sub-method updated N in place. Tell the legalizer
1576 if (Res.getNode() == N)
1579 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1580 "Invalid operand expansion");
1582 ReplaceValueWith(SDValue(N, 0), Res);
1586 /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
1587 /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1588 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
1590 ISD::CondCode &CCCode,
1592 SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1593 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1594 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1596 assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
1598 // FIXME: This generated code sucks. We want to generate
1599 // FCMPU crN, hi1, hi2
1601 // FCMPU crN, lo1, lo2
1602 // The following can be improved, but not that much.
1603 SDValue Tmp1, Tmp2, Tmp3;
1604 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1605 LHSHi, RHSHi, ISD::SETOEQ);
1606 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
1607 LHSLo, RHSLo, CCCode);
1608 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1609 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1610 LHSHi, RHSHi, ISD::SETUNE);
1611 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1612 LHSHi, RHSHi, CCCode);
1613 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1614 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
1615 NewRHS = SDValue(); // LHS is the result, not a compare.
1618 SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1619 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1620 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1621 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1623 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1624 // against zero to select between true and false values.
1625 if (!NewRHS.getNode()) {
1626 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1627 CCCode = ISD::SETNE;
1630 // Update N to have the operands specified.
1631 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1632 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1633 N->getOperand(4)), 0);
1636 SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1637 assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1638 "Logic only correct for ppcf128!");
1640 GetExpandedFloat(N->getOperand(1), Lo, Hi);
1641 // The ppcf128 value is providing only the sign; take it from the
1642 // higher-order double (which must have the larger magnitude).
1643 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N),
1644 N->getValueType(0), N->getOperand(0), Hi);
1647 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1648 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1649 "Logic only correct for ppcf128!");
1651 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1652 // Round it the rest of the way (e.g. to f32) if needed.
1653 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
1654 N->getValueType(0), Hi, N->getOperand(1));
1657 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1658 EVT RVT = N->getValueType(0);
1661 RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1662 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
1663 return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), false, dl).first;
1666 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1667 EVT RVT = N->getValueType(0);
1670 RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1671 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1672 return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1676 SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1677 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1678 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1679 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1681 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1682 // against zero to select between true and false values.
1683 if (!NewRHS.getNode()) {
1684 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1685 CCCode = ISD::SETNE;
1688 // Update N to have the operands specified.
1689 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1690 N->getOperand(2), N->getOperand(3),
1691 DAG.getCondCode(CCCode)), 0);
1694 SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1695 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1696 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1697 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1699 // If ExpandSetCCOperands returned a scalar, use it.
1700 if (!NewRHS.getNode()) {
1701 assert(NewLHS.getValueType() == N->getValueType(0) &&
1702 "Unexpected setcc expansion!");
1706 // Otherwise, update N to have the operands specified.
1707 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1708 DAG.getCondCode(CCCode)), 0);
1711 SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1712 if (ISD::isNormalStore(N))
1713 return ExpandOp_NormalStore(N, OpNo);
1715 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1716 assert(OpNo == 1 && "Can only expand the stored value so far");
1717 StoreSDNode *ST = cast<StoreSDNode>(N);
1719 SDValue Chain = ST->getChain();
1720 SDValue Ptr = ST->getBasePtr();
1722 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1723 ST->getValue().getValueType());
1724 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1725 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1729 GetExpandedOp(ST->getValue(), Lo, Hi);
1731 return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr,
1732 ST->getMemoryVT(), ST->getMemOperand());
1735 //===----------------------------------------------------------------------===//
1736 // Float Operand Promotion
1737 //===----------------------------------------------------------------------===//
1740 static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) {
1741 if (OpVT == MVT::f16) {
1742 return ISD::FP16_TO_FP;
1743 } else if (RetVT == MVT::f16) {
1744 return ISD::FP_TO_FP16;
1747 report_fatal_error("Attempt at an invalid promotion-related conversion");
1750 bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
1751 SDValue R = SDValue();
1753 // Nodes that use a promotion-requiring floating point operand, but doesn't
1754 // produce a promotion-requiring floating point result, need to be legalized
1755 // to use the promoted float operand. Nodes that produce at least one
1756 // promotion-requiring floating point result have their operands legalized as
1757 // a part of PromoteFloatResult.
1758 switch (N->getOpcode()) {
1760 llvm_unreachable("Do not know how to promote this operator's operand!");
1762 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break;
1763 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break;
1764 case ISD::FP_TO_SINT:
1765 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
1766 case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break;
1767 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break;
1768 case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break;
1769 case ISD::STORE: R = PromoteFloatOp_STORE(N, OpNo); break;
1773 ReplaceValueWith(SDValue(N, 0), R);
1777 SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
1778 SDValue Op = N->getOperand(0);
1779 EVT OpVT = Op->getValueType(0);
1781 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
1782 assert (IVT == N->getValueType(0) && "Bitcast to type of different size");
1784 SDValue Promoted = GetPromotedFloat(N->getOperand(0));
1785 EVT PromotedVT = Promoted->getValueType(0);
1787 // Convert the promoted float value to the desired IVT.
1788 return DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N), IVT,
1792 // Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by
1793 // PromoteFloatRes_FCOPYSIGN.
1794 SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
1795 assert (OpNo == 1 && "Only Operand 1 must need promotion here");
1796 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1798 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
1799 N->getOperand(0), Op1);
1802 // Convert the promoted float value to the desired integer type
1803 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
1804 SDValue Op = GetPromotedFloat(N->getOperand(0));
1805 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op);
1808 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
1809 SDValue Op = GetPromotedFloat(N->getOperand(0));
1810 EVT VT = N->getValueType(0);
1812 // Desired VT is same as promoted type. Use promoted float directly.
1813 if (VT == Op->getValueType(0))
1816 // Else, extend the promoted float value to the desired VT.
1817 return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op);
1820 // Promote the float operands used for comparison. The true- and false-
1821 // operands have the same type as the result and are promoted, if needed, by
1822 // PromoteFloatRes_SELECT_CC
1823 SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1824 SDValue LHS = GetPromotedFloat(N->getOperand(0));
1825 SDValue RHS = GetPromotedFloat(N->getOperand(1));
1827 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
1828 LHS, RHS, N->getOperand(2), N->getOperand(3),
1832 // Construct a SETCC that compares the promoted values and sets the conditional
1834 SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
1835 EVT VT = N->getValueType(0);
1836 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1837 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1838 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1839 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1841 return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode);
1845 // Lower the promoted Float down to the integer value of same size and construct
1846 // a STORE of the integer value.
1847 SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
1848 StoreSDNode *ST = cast<StoreSDNode>(N);
1849 SDValue Val = ST->getValue();
1852 SDValue Promoted = GetPromotedFloat(Val);
1853 EVT VT = ST->getOperand(1).getValueType();
1854 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1857 NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL,
1860 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(),
1861 ST->getMemOperand());
1864 //===----------------------------------------------------------------------===//
1865 // Float Result Promotion
1866 //===----------------------------------------------------------------------===//
1868 void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
1869 SDValue R = SDValue();
1871 switch (N->getOpcode()) {
1872 // These opcodes cannot appear if promotion of FP16 is done in the backend
1874 case ISD::FP16_TO_FP:
1875 case ISD::FP_TO_FP16:
1877 llvm_unreachable("Do not know how to promote this operator's result!");
1879 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break;
1880 case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break;
1881 case ISD::EXTRACT_VECTOR_ELT:
1882 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break;
1883 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break;
1885 // Unary FP Operations
1895 case ISD::FNEARBYINT:
1902 case ISD::FCANONICALIZE: R = PromoteFloatRes_UnaryOp(N); break;
1904 // Binary FP Operations
1914 case ISD::FSUB: R = PromoteFloatRes_BinOp(N); break;
1916 case ISD::FMA: // FMA is same as FMAD
1917 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break;
1919 case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break;
1921 case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
1922 case ISD::LOAD: R = PromoteFloatRes_LOAD(N); break;
1923 case ISD::SELECT: R = PromoteFloatRes_SELECT(N); break;
1924 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break;
1926 case ISD::SINT_TO_FP:
1927 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
1928 case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
1933 SetPromotedFloat(SDValue(N, ResNo), R);
1936 // Bitcast from i16 to f16: convert the i16 to a f32 value instead.
1937 // At this point, it is not possible to determine if the bitcast value is
1938 // eventually stored to memory or promoted to f32 or promoted to a floating
1939 // point at a higher precision. Some of these cases are handled by FP_EXTEND,
1940 // STORE promotion handlers.
1941 SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
1942 EVT VT = N->getValueType(0);
1943 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1944 // Input type isn't guaranteed to be i16 so bitcast if not. The bitcast
1945 // will be legalized further if necessary.
1946 SDValue Cast = DAG.getBitcast(MVT::i16, N->getOperand(0));
1947 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast);
1950 SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
1951 ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N);
1952 EVT VT = N->getValueType(0);
1955 // Get the (bit-cast) APInt of the APFloat and build an integer constant
1956 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1957 SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL,
1960 // Convert the Constant to the desired FP type
1961 // FIXME We might be able to do the conversion during compilation and get rid
1962 // of it from the object code
1963 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1964 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C);
1967 // If the Index operand is a constant, try to redirect the extract operation to
1968 // the correct legalized vector. If not, bit-convert the input vector to
1969 // equivalent integer vector. Extract the element as an (bit-cast) integer
1970 // value and convert it to the promoted type.
1971 SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
1974 // If the index is constant, try to extract the value from the legalized
1976 if (isa<ConstantSDNode>(N->getOperand(1))) {
1977 SDValue Vec = N->getOperand(0);
1978 SDValue Idx = N->getOperand(1);
1979 EVT VecVT = Vec->getValueType(0);
1980 EVT EltVT = VecVT.getVectorElementType();
1982 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1984 switch (getTypeAction(VecVT)) {
1986 case TargetLowering::TypeScalarizeVector: {
1987 SDValue Res = GetScalarizedVector(N->getOperand(0));
1988 ReplaceValueWith(SDValue(N, 0), Res);
1991 case TargetLowering::TypeWidenVector: {
1992 Vec = GetWidenedVector(Vec);
1993 SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
1994 ReplaceValueWith(SDValue(N, 0), Res);
1997 case TargetLowering::TypeSplitVector: {
1999 GetSplitVector(Vec, Lo, Hi);
2001 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
2003 if (IdxVal < LoElts)
2004 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx);
2006 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi,
2007 DAG.getConstant(IdxVal - LoElts, DL,
2008 Idx.getValueType()));
2009 ReplaceValueWith(SDValue(N, 0), Res);
2016 // Bit-convert the input vector to the equivalent integer vector
2017 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
2018 EVT IVT = NewOp.getValueType().getVectorElementType();
2020 // Extract the element as an (bit-cast) integer value
2021 SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT,
2022 NewOp, N->getOperand(1));
2024 // Convert the element to the desired FP type
2025 EVT VT = N->getValueType(0);
2026 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2027 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal);
2030 // FCOPYSIGN(X, Y) returns the value of X with the sign of Y. If the result
2031 // needs promotion, so does the argument X. Note that Y, if needed, will be
2032 // handled during operand promotion.
2033 SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
2034 EVT VT = N->getValueType(0);
2035 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2036 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2038 SDValue Op1 = N->getOperand(1);
2040 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2043 // Unary operation where the result and the operand have PromoteFloat type
2044 // action. Construct a new SDNode with the promoted float value of the old
2046 SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2047 EVT VT = N->getValueType(0);
2048 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2049 SDValue Op = GetPromotedFloat(N->getOperand(0));
2051 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op);
2054 // Binary operations where the result and both operands have PromoteFloat type
2055 // action. Construct a new SDNode with the promoted float values of the old
2057 SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2058 EVT VT = N->getValueType(0);
2059 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2060 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2061 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2062 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags());
2065 SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2066 EVT VT = N->getValueType(0);
2067 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2068 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2069 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2070 SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2072 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2);
2075 // Promote the Float (first) operand and retain the Integer (second) operand
2076 SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2077 EVT VT = N->getValueType(0);
2078 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2079 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2080 SDValue Op1 = N->getOperand(1);
2082 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2085 // Explicit operation to reduce precision. Reduce the value to half precision
2086 // and promote it back to the legal type.
2087 SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2090 SDValue Op = N->getOperand(0);
2091 EVT VT = N->getValueType(0);
2092 EVT OpVT = Op->getValueType(0);
2093 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2094 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2096 // Round promoted float to desired precision
2097 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op);
2098 // Promote it back to the legal output type
2099 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round);
2102 SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2103 LoadSDNode *L = cast<LoadSDNode>(N);
2104 EVT VT = N->getValueType(0);
2106 // Load the value as an integer value with the same number of bits.
2107 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2108 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT,
2109 SDLoc(N), L->getChain(), L->getBasePtr(),
2110 L->getOffset(), L->getPointerInfo(), IVT,
2112 L->getMemOperand()->getFlags(),
2114 // Legalize the chain result by replacing uses of the old value chain with the
2116 ReplaceValueWith(SDValue(N, 1), newL.getValue(1));
2118 // Convert the integer value to the desired FP type
2119 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2120 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL);
2123 // Construct a new SELECT node with the promoted true- and false- values.
2124 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2125 SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2126 SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2128 return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0),
2129 N->getOperand(0), TrueVal, FalseVal);
2132 // Construct a new SELECT_CC node with the promoted true- and false- values.
2133 // The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC.
2134 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2135 SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2136 SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2138 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
2139 N->getOperand(0), N->getOperand(1), TrueVal, FalseVal,
2143 // Construct a SDNode that transforms the SINT or UINT operand to the promoted
2145 SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2147 EVT VT = N->getValueType(0);
2148 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2149 SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0));
2150 // Round the value to the desired precision (that of the source type).
2152 ISD::FP_EXTEND, DL, NVT,
2153 DAG.getNode(ISD::FP_ROUND, DL, VT, NV, DAG.getIntPtrConstant(0, DL)));
2156 SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2157 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
2158 N->getValueType(0)));