1 //===-- MipsInstPrinter.cpp - Convert Mips MCInst to assembly syntax ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an Mips MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "asm-printer"
15 #include "MipsInstPrinter.h"
16 #include "MCTargetDesc/MipsMCExpr.h"
17 #include "MipsInstrInfo.h"
18 #include "llvm/ADT/StringExtras.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInst.h"
21 #include "llvm/MC/MCInstrInfo.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/raw_ostream.h"
27 #define PRINT_ALIAS_INSTR
28 #include "MipsGenAsmWriter.inc"
31 static bool isReg(const MCInst &MI, unsigned OpNo) {
32 assert(MI.getOperand(OpNo).isReg() && "Register operand expected.");
33 return MI.getOperand(OpNo).getReg() == R;
36 const char* Mips::MipsFCCToString(Mips::CondCode CC) {
39 case FCOND_T: return "f";
41 case FCOND_OR: return "un";
43 case FCOND_UNE: return "eq";
45 case FCOND_ONE: return "ueq";
47 case FCOND_UGE: return "olt";
49 case FCOND_OGE: return "ult";
51 case FCOND_UGT: return "ole";
53 case FCOND_OGT: return "ule";
55 case FCOND_ST: return "sf";
57 case FCOND_GLE: return "ngle";
59 case FCOND_SNE: return "seq";
61 case FCOND_GL: return "ngl";
63 case FCOND_NLT: return "lt";
65 case FCOND_GE: return "nge";
67 case FCOND_NLE: return "le";
69 case FCOND_GT: return "ngt";
71 llvm_unreachable("Impossible condition code!");
74 void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
75 OS << '$' << StringRef(getRegisterName(RegNo)).lower();
78 void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
80 switch (MI->getOpcode()) {
85 O << "\t.set\tpush\n";
86 O << "\t.set\tmips32r2\n";
90 printSaveRestore(MI, O);
91 O << " # 16 bit inst\n";
95 printSaveRestore(MI, O);
100 printSaveRestore(MI, O);
101 O << " # 16 bit inst\n";
103 case Mips::RestoreX16:
105 printSaveRestore(MI, O);
110 // Try to print any aliases first.
111 if (!printAliasInstr(MI, O) && !printAlias(*MI, O))
112 printInstruction(MI, O);
113 printAnnotation(O, Annot);
115 switch (MI->getOpcode()) {
120 O << "\n\t.set\tpop";
124 static void printExpr(const MCExpr *Expr, raw_ostream &OS) {
126 const MCSymbolRefExpr *SRE;
128 if (const MCBinaryExpr *BE = dyn_cast<MCBinaryExpr>(Expr)) {
129 SRE = dyn_cast<MCSymbolRefExpr>(BE->getLHS());
130 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(BE->getRHS());
131 assert(SRE && CE && "Binary expression must be sym+const.");
132 Offset = CE->getValue();
133 } else if (const MipsMCExpr *ME = dyn_cast<MipsMCExpr>(Expr)) {
136 } else if (!(SRE = dyn_cast<MCSymbolRefExpr>(Expr)))
137 assert(false && "Unexpected MCExpr type.");
139 MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
142 default: llvm_unreachable("Invalid kind!");
143 case MCSymbolRefExpr::VK_None: break;
144 case MCSymbolRefExpr::VK_Mips_GPREL: OS << "%gp_rel("; break;
145 case MCSymbolRefExpr::VK_Mips_GOT_CALL: OS << "%call16("; break;
146 case MCSymbolRefExpr::VK_Mips_GOT16: OS << "%got("; break;
147 case MCSymbolRefExpr::VK_Mips_GOT: OS << "%got("; break;
148 case MCSymbolRefExpr::VK_Mips_ABS_HI: OS << "%hi("; break;
149 case MCSymbolRefExpr::VK_Mips_ABS_LO: OS << "%lo("; break;
150 case MCSymbolRefExpr::VK_Mips_TLSGD: OS << "%tlsgd("; break;
151 case MCSymbolRefExpr::VK_Mips_TLSLDM: OS << "%tlsldm("; break;
152 case MCSymbolRefExpr::VK_Mips_DTPREL_HI: OS << "%dtprel_hi("; break;
153 case MCSymbolRefExpr::VK_Mips_DTPREL_LO: OS << "%dtprel_lo("; break;
154 case MCSymbolRefExpr::VK_Mips_GOTTPREL: OS << "%gottprel("; break;
155 case MCSymbolRefExpr::VK_Mips_TPREL_HI: OS << "%tprel_hi("; break;
156 case MCSymbolRefExpr::VK_Mips_TPREL_LO: OS << "%tprel_lo("; break;
157 case MCSymbolRefExpr::VK_Mips_GPOFF_HI: OS << "%hi(%neg(%gp_rel("; break;
158 case MCSymbolRefExpr::VK_Mips_GPOFF_LO: OS << "%lo(%neg(%gp_rel("; break;
159 case MCSymbolRefExpr::VK_Mips_GOT_DISP: OS << "%got_disp("; break;
160 case MCSymbolRefExpr::VK_Mips_GOT_PAGE: OS << "%got_page("; break;
161 case MCSymbolRefExpr::VK_Mips_GOT_OFST: OS << "%got_ofst("; break;
162 case MCSymbolRefExpr::VK_Mips_HIGHER: OS << "%higher("; break;
163 case MCSymbolRefExpr::VK_Mips_HIGHEST: OS << "%highest("; break;
164 case MCSymbolRefExpr::VK_Mips_GOT_HI16: OS << "%got_hi("; break;
165 case MCSymbolRefExpr::VK_Mips_GOT_LO16: OS << "%got_lo("; break;
166 case MCSymbolRefExpr::VK_Mips_CALL_HI16: OS << "%call_hi("; break;
167 case MCSymbolRefExpr::VK_Mips_CALL_LO16: OS << "%call_lo("; break;
170 OS << SRE->getSymbol();
178 if ((Kind == MCSymbolRefExpr::VK_Mips_GPOFF_HI) ||
179 (Kind == MCSymbolRefExpr::VK_Mips_GPOFF_LO))
181 else if (Kind != MCSymbolRefExpr::VK_None)
185 void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
187 const MCOperand &Op = MI->getOperand(OpNo);
189 printRegName(O, Op.getReg());
198 assert(Op.isExpr() && "unknown operand kind in printOperand");
199 printExpr(Op.getExpr(), O);
202 void MipsInstPrinter::printUnsignedImm(const MCInst *MI, int opNum,
204 const MCOperand &MO = MI->getOperand(opNum);
206 O << (unsigned short int)MO.getImm();
208 printOperand(MI, opNum, O);
211 void MipsInstPrinter::printUnsignedImm8(const MCInst *MI, int opNum,
213 const MCOperand &MO = MI->getOperand(opNum);
215 O << (unsigned short int)(unsigned char)MO.getImm();
217 printOperand(MI, opNum, O);
220 void MipsInstPrinter::
221 printMemOperand(const MCInst *MI, int opNum, raw_ostream &O) {
222 // Load/Store memory operands -- imm($reg)
223 // If PIC target the target is loaded as the
224 // pattern lw $25,%call16($28)
225 printOperand(MI, opNum+1, O);
227 printOperand(MI, opNum, O);
231 void MipsInstPrinter::
232 printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O) {
233 // when using stack locations for not load/store instructions
234 // print the same way as all normal 3 operand instructions.
235 printOperand(MI, opNum, O);
237 printOperand(MI, opNum+1, O);
241 void MipsInstPrinter::
242 printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O) {
243 const MCOperand& MO = MI->getOperand(opNum);
244 O << MipsFCCToString((Mips::CondCode)MO.getImm());
247 void MipsInstPrinter::
248 printSHFMask(const MCInst *MI, int opNum, raw_ostream &O) {
249 llvm_unreachable("TODO");
252 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
253 unsigned OpNo, raw_ostream &OS) {
254 OS << "\t" << Str << "\t";
255 printOperand(&MI, OpNo, OS);
259 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
260 unsigned OpNo0, unsigned OpNo1,
262 printAlias(Str, MI, OpNo0, OS);
264 printOperand(&MI, OpNo1, OS);
268 bool MipsInstPrinter::printAlias(const MCInst &MI, raw_ostream &OS) {
269 switch (MI.getOpcode()) {
271 // beq $zero, $zero, $L2 => b $L2
272 // beq $r0, $zero, $L2 => beqz $r0, $L2
273 return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) &&
274 printAlias("b", MI, 2, OS)) ||
275 (isReg<Mips::ZERO>(MI, 1) && printAlias("beqz", MI, 0, 2, OS));
277 // beq $r0, $zero, $L2 => beqz $r0, $L2
278 return isReg<Mips::ZERO_64>(MI, 1) && printAlias("beqz", MI, 0, 2, OS);
280 // bne $r0, $zero, $L2 => bnez $r0, $L2
281 return isReg<Mips::ZERO>(MI, 1) && printAlias("bnez", MI, 0, 2, OS);
283 // bne $r0, $zero, $L2 => bnez $r0, $L2
284 return isReg<Mips::ZERO_64>(MI, 1) && printAlias("bnez", MI, 0, 2, OS);
286 // bgezal $zero, $L1 => bal $L1
287 return isReg<Mips::ZERO>(MI, 0) && printAlias("bal", MI, 1, OS);
289 // bc1t $fcc0, $L1 => bc1t $L1
290 return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1t", MI, 1, OS);
292 // bc1f $fcc0, $L1 => bc1f $L1
293 return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1f", MI, 1, OS);
295 // jalr $ra, $r1 => jalr $r1
296 return isReg<Mips::RA>(MI, 0) && printAlias("jalr", MI, 1, OS);
298 // jalr $ra, $r1 => jalr $r1
299 return isReg<Mips::RA_64>(MI, 0) && printAlias("jalr", MI, 1, OS);
302 // nor $r0, $r1, $zero => not $r0, $r1
303 return isReg<Mips::ZERO>(MI, 2) && printAlias("not", MI, 0, 1, OS);
305 // nor $r0, $r1, $zero => not $r0, $r1
306 return isReg<Mips::ZERO_64>(MI, 2) && printAlias("not", MI, 0, 1, OS);
308 // or $r0, $r1, $zero => move $r0, $r1
309 return isReg<Mips::ZERO>(MI, 2) && printAlias("move", MI, 0, 1, OS);
310 default: return false;
314 void MipsInstPrinter::printSaveRestore(const MCInst *MI, raw_ostream &O) {
315 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
316 if (i != 0) O << ", ";
317 if (MI->getOperand(i).isReg())
318 printRegName(O, MI->getOperand(i).getReg());
320 printUnsignedImm(MI, i, O);