ReleaseNotes for PowerPC

Patch by Lei Huang!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_70@341453 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst
index 5fd3c88..7fe242c 100644 (file)
--- a/docs/ReleaseNotes.rst
+++ b/docs/ReleaseNotes.rst
@@ -230,7 +230,31 @@ During this release the MIPS target has:
 Changes to the PowerPC Target
 -----------------------------
 
- During this release ...
+During this release the PowerPC target has:
+
+* Replaced the list scheduler for post register allocation with the machine scheduler.
+
+* Added support for coldcc calling convention.
+
+* Added support for ``symbol@high`` and ``symbol@higha`` symbol modifiers.
+
+* Added support for quad-precision floating point type (``__float128``) under the llvm option `-enable-ppc-quad-precision`.
+
+* Added dump function to ``LatencyPriorityQueue``.
+
+* Completed the Power9 scheduler model.
+
+* Optimized TLS code generation.
+
+* Improved MachineLICM for hoisting constant stores.
+
+* Improved code generation to reduce register use by using more register + immediate instructions.
+
+* Improved code generation to better exploit rotate-and-mask instructions.
+
+* Fixed the bug in dynamic loader for JIT which crashed NNVM.
+
+* Numerous bug fixes and code cleanups.
 
 Changes to the SystemZ Target
 -----------------------------