android: [ARM] Unify handling of M-Class system registers

Reference:
683224ecbd ("[ARM] Unify handling of M-Class system registers")

diff --git a/Android.bp b/Android.bp
index fa4ef41..2caeb5d 100644 (file)
--- a/Android.bp
+++ b/Android.bp
@@ -164,6 +164,7 @@ llvm_arm_static_libraries = [
     "libLLVMARMInfo",
     "libLLVMARMDesc",
     "libLLVMARMDisassembler",
+    "libLLVMARMUtils",
 ]
 
 llvm_x86_static_libraries = [

diff --git a/lib/Target/ARM/Android.bp b/lib/Target/ARM/Android.bp
index 561551e..57a81bd 100644 (file)
--- a/lib/Target/ARM/Android.bp
+++ b/lib/Target/ARM/Android.bp
@@ -49,6 +49,7 @@ llvm_tblgen {
         "ARMGenDisassemblerTables.inc",
         "ARMGenRegisterBank.inc",
         "ARMGenGlobalISel.inc",
+        "ARMGenSystemRegister.inc",
     ],
 }
 

diff --git a/lib/Target/ARM/Utils/Android.bp b/lib/Target/ARM/Utils/Android.bp
new file mode 100644 (file)
index 0000000..bd2ae34
--- /dev/null
+++ b/lib/Target/ARM/Utils/Android.bp
@@ -0,0 +1,8 @@
+cc_library_static {
+    name: "libLLVMARMUtils",
+    defaults: [
+        "llvm-lib-defaults",
+        "llvm-arm-defaults",
+    ],
+    srcs: ["*.cpp"],
+}

diff --git a/soong/tblgen.go b/soong/tblgen.go
index 76669fa..e22f80c 100644 (file)
--- a/soong/tblgen.go
+++ b/soong/tblgen.go
@@ -112,6 +112,8 @@ func outToGenerator(ctx android.ModuleContext, out string) string {
                return "-gen-disassembler"
        case strings.HasSuffix(out, "GenSystemOperands.inc"):
                return "-gen-searchable-tables"
+       case strings.HasSuffix(out, "GenSystemRegister.inc"):
+               return "-gen-searchable-tables"
        case strings.HasSuffix(out, "GenEDInfo.inc"):
                return "-gen-enhanced-disassembly-info"
        case strings.HasSuffix(out, "GenFastISel.inc"):