src/gallium/drivers/vc4/vc4_screen.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_debug.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_format.h"
  33 #include "util/u_hash_table.h"
  34 #include "util/ralloc.h"
  35
  36 #include "vc4_screen.h"
  37 #include "vc4_context.h"
  38 #include "vc4_resource.h"
  39
  40 static const struct debug_named_value debug_options[] = {
  41         { "cl",       VC4_DEBUG_CL,
  42           "Dump command list during creation" },
  43         { "qpu",      VC4_DEBUG_QPU,
  44           "Dump generated QPU instructions" },
  45         { "qir",      VC4_DEBUG_QIR,
  46           "Dump QPU IR during program compile" },
  47         { "nir",      VC4_DEBUG_NIR,
  48           "Dump NIR during program compile" },
  49         { "tgsi",     VC4_DEBUG_TGSI,
  50           "Dump TGSI during program compile" },
  51         { "shaderdb", VC4_DEBUG_SHADERDB,
  52           "Dump program compile information for shader-db analysis" },
  53         { "perf",     VC4_DEBUG_PERF,
  54           "Print during performance-related events" },
  55         { "norast",   VC4_DEBUG_NORAST,
  56           "Skip actual hardware execution of commands" },
  57         { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
  58           "Flush after each draw call" },
  59         { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
  60           "Wait for finish after each flush" },
  61 #if USE_VC4_SIMULATOR
  62         { "dump", VC4_DEBUG_DUMP,
  63           "Write a GPU command stream trace file" },
  64 #endif
  65         { NULL }
  66 };
  67
  68 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
  69 uint32_t vc4_debug;
  70
  71 static const char *
  72 vc4_screen_get_name(struct pipe_screen *pscreen)
  73 {
  74         return "VC4";
  75 }
  76
  77 static const char *
  78 vc4_screen_get_vendor(struct pipe_screen *pscreen)
  79 {
  80         return "Broadcom";
  81 }
  82
  83 static void
  84 vc4_screen_destroy(struct pipe_screen *pscreen)
  85 {
  86         struct vc4_screen *screen = vc4_screen(pscreen);
  87
  88         util_hash_table_destroy(screen->bo_handles);
  89         vc4_bufmgr_destroy(pscreen);
  90         close(screen->fd);
  91         ralloc_free(pscreen);
  92 }
  93
  94 static int
  95 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  96 {
  97         switch (param) {
  98                 /* Supported features (boolean caps). */
  99         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 100         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 101         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 102         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 103         case PIPE_CAP_NPOT_TEXTURES:
 104         case PIPE_CAP_SHAREABLE_SHADERS:
 105         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 106         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 107         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 108         case PIPE_CAP_TWO_SIDED_STENCIL:
 109         case PIPE_CAP_USER_INDEX_BUFFERS:
 110         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 111         case PIPE_CAP_TEXTURE_SWIZZLE:
 112                 return 1;
 113
 114                 /* lying for GL 2.0 */
 115         case PIPE_CAP_OCCLUSION_QUERY:
 116         case PIPE_CAP_POINT_SPRITE:
 117                 return 1;
 118
 119         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 120                 return 256;
 121
 122         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 123                 return 120;
 124
 125         case PIPE_CAP_MAX_VIEWPORTS:
 126                 return 1;
 127
 128         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 129         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 130                 return 1;
 131
 132         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 133                 return 1;
 134
 135                 /* Unsupported features. */
 136         case PIPE_CAP_ANISOTROPIC_FILTER:
 137         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 138         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 139         case PIPE_CAP_CUBE_MAP_ARRAY:
 140         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 141         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 142         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 143         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 144         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 145         case PIPE_CAP_TGSI_INSTANCEID:
 146         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 147         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 148         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 149         case PIPE_CAP_COMPUTE:
 150         case PIPE_CAP_START_INSTANCE:
 151         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 152         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 153         case PIPE_CAP_TGSI_TEXCOORD:
 154         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 155         case PIPE_CAP_CONDITIONAL_RENDER:
 156         case PIPE_CAP_PRIMITIVE_RESTART:
 157         case PIPE_CAP_TEXTURE_BARRIER:
 158         case PIPE_CAP_SM3:
 159         case PIPE_CAP_INDEP_BLEND_ENABLE:
 160         case PIPE_CAP_INDEP_BLEND_FUNC:
 161         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 162         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 163         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 164         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 165         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 166         case PIPE_CAP_USER_VERTEX_BUFFERS:
 167         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 168         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 169         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 170         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 171         case PIPE_CAP_TEXTURE_GATHER_SM5:
 172         case PIPE_CAP_FAKE_SW_MSAA:
 173         case PIPE_CAP_TEXTURE_QUERY_LOD:
 174         case PIPE_CAP_SAMPLE_SHADING:
 175         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 176         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 177         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 178         case PIPE_CAP_MAX_TEXEL_OFFSET:
 179         case PIPE_CAP_MAX_VERTEX_STREAMS:
 180         case PIPE_CAP_DRAW_INDIRECT:
 181         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 182         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 183         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 184         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 185         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 186         case PIPE_CAP_CLIP_HALFZ:
 187         case PIPE_CAP_VERTEXID_NOBASE:
 188         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 189         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 190         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 191         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 192         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 193         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 194         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 195         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 196         case PIPE_CAP_TGSI_TXQS:
 197         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 198         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 199         case PIPE_CAP_CLEAR_TEXTURE:
 200         case PIPE_CAP_DRAW_PARAMETERS:
 201         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 202         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 203         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 204         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 205         case PIPE_CAP_INVALIDATE_BUFFER:
 206         case PIPE_CAP_GENERATE_MIPMAP:
 207         case PIPE_CAP_STRING_MARKER:
 208         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 209         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 210         case PIPE_CAP_QUERY_MEMORY_INFO:
 211         case PIPE_CAP_PCI_GROUP:
 212         case PIPE_CAP_PCI_BUS:
 213         case PIPE_CAP_PCI_DEVICE:
 214         case PIPE_CAP_PCI_FUNCTION:
 215         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 216         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 217         case PIPE_CAP_CULL_DISTANCE:
 218         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 219                 return 0;
 220
 221                 /* Stream output. */
 222         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 223         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 224         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 225         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 226                 return 0;
 227
 228                 /* Geometry shader output, unsupported. */
 229         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 230         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 231                 return 0;
 232
 233                 /* Texturing. */
 234         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 235         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 236                 return VC4_MAX_MIP_LEVELS;
 237         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 238                 /* Note: Not supported in hardware, just faking it. */
 239                 return 5;
 240         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 241                 return 0;
 242
 243                 /* Render targets. */
 244         case PIPE_CAP_MAX_RENDER_TARGETS:
 245                 return 1;
 246
 247                 /* Queries. */
 248         case PIPE_CAP_QUERY_TIME_ELAPSED:
 249         case PIPE_CAP_QUERY_TIMESTAMP:
 250                 return 0;
 251
 252         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 253         case PIPE_CAP_MIN_TEXEL_OFFSET:
 254                 return 0;
 255
 256         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 257                 return 2048;
 258
 259         case PIPE_CAP_ENDIANNESS:
 260                 return PIPE_ENDIAN_LITTLE;
 261
 262         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 263                 return 64;
 264
 265         case PIPE_CAP_VENDOR_ID:
 266                 return 0x14E4;
 267         case PIPE_CAP_DEVICE_ID:
 268                 return 0xFFFFFFFF;
 269         case PIPE_CAP_ACCELERATED:
 270                 return 1;
 271         case PIPE_CAP_VIDEO_MEMORY: {
 272                 uint64_t system_memory;
 273
 274                 if (!os_get_total_physical_memory(&system_memory))
 275                         return 0;
 276
 277                 return (int)(system_memory >> 20);
 278         }
 279         case PIPE_CAP_UMA:
 280                 return 1;
 281
 282         default:
 283                 fprintf(stderr, "unknown param %d\n", param);
 284                 return 0;
 285         }
 286 }
 287
 288 static float
 289 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 290 {
 291         switch (param) {
 292         case PIPE_CAPF_MAX_LINE_WIDTH:
 293         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 294                 return 32;
 295
 296         case PIPE_CAPF_MAX_POINT_WIDTH:
 297         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 298                 return 512.0f;
 299
 300         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 301                 return 0.0f;
 302         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 303                 return 0.0f;
 304         case PIPE_CAPF_GUARD_BAND_LEFT:
 305         case PIPE_CAPF_GUARD_BAND_TOP:
 306         case PIPE_CAPF_GUARD_BAND_RIGHT:
 307         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 308                 return 0.0f;
 309         default:
 310                 fprintf(stderr, "unknown paramf %d\n", param);
 311                 return 0;
 312         }
 313 }
 314
 315 static int
 316 vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 317                            enum pipe_shader_cap param)
 318 {
 319         if (shader != PIPE_SHADER_VERTEX &&
 320             shader != PIPE_SHADER_FRAGMENT) {
 321                 return 0;
 322         }
 323
 324         /* this is probably not totally correct.. but it's a start: */
 325         switch (param) {
 326         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 327         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 328         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 329         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 330                 return 16384;
 331         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 332                 return 0;
 333         case PIPE_SHADER_CAP_MAX_INPUTS:
 334                 if (shader == PIPE_SHADER_FRAGMENT)
 335                         return 8;
 336                 else
 337                         return 16;
 338         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 339                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 340         case PIPE_SHADER_CAP_MAX_TEMPS:
 341                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 342         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 343                 return 16 * 1024 * sizeof(float);
 344         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 345                 return 1;
 346         case PIPE_SHADER_CAP_MAX_PREDS:
 347                 return 0; /* nothing uses this */
 348         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 349                 return 0;
 350         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 351         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 352         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 353                 return 0;
 354         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 355                 return 1;
 356         case PIPE_SHADER_CAP_SUBROUTINES:
 357                 return 0;
 358         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 359                 return 0;
 360         case PIPE_SHADER_CAP_INTEGERS:
 361                 return 1;
 362         case PIPE_SHADER_CAP_DOUBLES:
 363         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 364         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 365         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 366         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 367                 return 0;
 368         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 369         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 370                 return VC4_MAX_TEXTURE_SAMPLERS;
 371         case PIPE_SHADER_CAP_PREFERRED_IR:
 372                 return PIPE_SHADER_IR_TGSI;
 373         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 374                 return 0;
 375         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 376                 return 32;
 377         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 378         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 379                 return 0;
 380         default:
 381                 fprintf(stderr, "unknown shader param %d\n", param);
 382                 return 0;
 383         }
 384         return 0;
 385 }
 386
 387 static boolean
 388 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
 389                                enum pipe_format format,
 390                                enum pipe_texture_target target,
 391                                unsigned sample_count,
 392                                unsigned usage)
 393 {
 394         unsigned retval = 0;
 395
 396         if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
 397                 return FALSE;
 398
 399         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
 400             !util_format_is_supported(format, usage)) {
 401                 return FALSE;
 402         }
 403
 404         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 405                 switch (format) {
 406                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 407                 case PIPE_FORMAT_R32G32B32_FLOAT:
 408                 case PIPE_FORMAT_R32G32_FLOAT:
 409                 case PIPE_FORMAT_R32_FLOAT:
 410                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 411                 case PIPE_FORMAT_R32G32B32_SNORM:
 412                 case PIPE_FORMAT_R32G32_SNORM:
 413                 case PIPE_FORMAT_R32_SNORM:
 414                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 415                 case PIPE_FORMAT_R32G32B32_SSCALED:
 416                 case PIPE_FORMAT_R32G32_SSCALED:
 417                 case PIPE_FORMAT_R32_SSCALED:
 418                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 419                 case PIPE_FORMAT_R16G16B16_UNORM:
 420                 case PIPE_FORMAT_R16G16_UNORM:
 421                 case PIPE_FORMAT_R16_UNORM:
 422                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 423                 case PIPE_FORMAT_R16G16B16_SNORM:
 424                 case PIPE_FORMAT_R16G16_SNORM:
 425                 case PIPE_FORMAT_R16_SNORM:
 426                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 427                 case PIPE_FORMAT_R16G16B16_USCALED:
 428                 case PIPE_FORMAT_R16G16_USCALED:
 429                 case PIPE_FORMAT_R16_USCALED:
 430                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 431                 case PIPE_FORMAT_R16G16B16_SSCALED:
 432                 case PIPE_FORMAT_R16G16_SSCALED:
 433                 case PIPE_FORMAT_R16_SSCALED:
 434                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 435                 case PIPE_FORMAT_R8G8B8_UNORM:
 436                 case PIPE_FORMAT_R8G8_UNORM:
 437                 case PIPE_FORMAT_R8_UNORM:
 438                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 439                 case PIPE_FORMAT_R8G8B8_SNORM:
 440                 case PIPE_FORMAT_R8G8_SNORM:
 441                 case PIPE_FORMAT_R8_SNORM:
 442                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 443                 case PIPE_FORMAT_R8G8B8_USCALED:
 444                 case PIPE_FORMAT_R8G8_USCALED:
 445                 case PIPE_FORMAT_R8_USCALED:
 446                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 447                 case PIPE_FORMAT_R8G8B8_SSCALED:
 448                 case PIPE_FORMAT_R8G8_SSCALED:
 449                 case PIPE_FORMAT_R8_SSCALED:
 450                         retval |= PIPE_BIND_VERTEX_BUFFER;
 451                         break;
 452                 default:
 453                         break;
 454                 }
 455         }
 456
 457         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 458             vc4_rt_format_supported(format)) {
 459                 retval |= PIPE_BIND_RENDER_TARGET;
 460         }
 461
 462         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 463             vc4_tex_format_supported(format)) {
 464                 retval |= PIPE_BIND_SAMPLER_VIEW;
 465         }
 466
 467         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 468             (format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 469              format == PIPE_FORMAT_X8Z24_UNORM)) {
 470                 retval |= PIPE_BIND_DEPTH_STENCIL;
 471         }
 472
 473         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 474             (format == PIPE_FORMAT_I8_UINT ||
 475              format == PIPE_FORMAT_I16_UINT)) {
 476                 retval |= PIPE_BIND_INDEX_BUFFER;
 477         }
 478
 479         if (usage & PIPE_BIND_TRANSFER_READ)
 480                 retval |= PIPE_BIND_TRANSFER_READ;
 481         if (usage & PIPE_BIND_TRANSFER_WRITE)
 482                 retval |= PIPE_BIND_TRANSFER_WRITE;
 483
 484 #if 0
 485         if (retval != usage) {
 486                 fprintf(stderr,
 487                         "not supported: format=%s, target=%d, sample_count=%d, "
 488                         "usage=0x%x, retval=0x%x\n", util_format_name(format),
 489                         target, sample_count, usage, retval);
 490         }
 491 #endif
 492
 493         return retval == usage;
 494 }
 495
 496 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 497
 498 static unsigned handle_hash(void *key)
 499 {
 500     return PTR_TO_UINT(key);
 501 }
 502
 503 static int handle_compare(void *key1, void *key2)
 504 {
 505     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 506 }
 507
 508 struct pipe_screen *
 509 vc4_screen_create(int fd)
 510 {
 511         struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
 512         struct pipe_screen *pscreen;
 513
 514         pscreen = &screen->base;
 515
 516         pscreen->destroy = vc4_screen_destroy;
 517         pscreen->get_param = vc4_screen_get_param;
 518         pscreen->get_paramf = vc4_screen_get_paramf;
 519         pscreen->get_shader_param = vc4_screen_get_shader_param;
 520         pscreen->context_create = vc4_context_create;
 521         pscreen->is_format_supported = vc4_screen_is_format_supported;
 522
 523         screen->fd = fd;
 524         list_inithead(&screen->bo_cache.time_list);
 525         pipe_mutex_init(screen->bo_handles_mutex);
 526         screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 527
 528         vc4_fence_init(screen);
 529
 530         vc4_debug = debug_get_option_vc4_debug();
 531         if (vc4_debug & VC4_DEBUG_SHADERDB)
 532                 vc4_debug |= VC4_DEBUG_NORAST;
 533
 534 #if USE_VC4_SIMULATOR
 535         vc4_simulator_init(screen);
 536 #endif
 537
 538         vc4_resource_screen_init(pscreen);
 539
 540         pscreen->get_name = vc4_screen_get_name;
 541         pscreen->get_vendor = vc4_screen_get_vendor;
 542         pscreen->get_device_vendor = vc4_screen_get_vendor;
 543
 544         return pscreen;
 545 }
 546
 547 boolean
 548 vc4_screen_bo_get_handle(struct pipe_screen *pscreen,
 549                          struct vc4_bo *bo,
 550                          unsigned stride,
 551                          struct winsys_handle *whandle)
 552 {
 553         whandle->stride = stride;
 554
 555         /* If we're passing some reference to our BO out to some other part of
 556          * the system, then we can't do any optimizations about only us being
 557          * the ones seeing it (like BO caching or shadow update avoidance).
 558          */
 559         bo->private = false;
 560
 561         switch (whandle->type) {
 562         case DRM_API_HANDLE_TYPE_SHARED:
 563                 return vc4_bo_flink(bo, &whandle->handle);
 564         case DRM_API_HANDLE_TYPE_KMS:
 565                 whandle->handle = bo->handle;
 566                 return TRUE;
 567         case DRM_API_HANDLE_TYPE_FD:
 568                 whandle->handle = vc4_bo_get_dmabuf(bo);
 569                 return whandle->handle != -1;
 570         }
 571
 572         return FALSE;
 573 }
 574
 575 struct vc4_bo *
 576 vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
 577                           struct winsys_handle *whandle)
 578 {
 579         struct vc4_screen *screen = vc4_screen(pscreen);
 580
 581         if (whandle->offset != 0) {
 582                 fprintf(stderr,
 583                         "Attempt to import unsupported winsys offset %u\n",
 584                         whandle->offset);
 585                 return NULL;
 586         }
 587
 588         switch (whandle->type) {
 589         case DRM_API_HANDLE_TYPE_SHARED:
 590                 return vc4_bo_open_name(screen, whandle->handle, whandle->stride);
 591         case DRM_API_HANDLE_TYPE_FD:
 592                 return vc4_bo_open_dmabuf(screen, whandle->handle, whandle->stride);
 593         default:
 594                 fprintf(stderr,
 595                         "Attempt to import unsupported handle type %d\n",
 596                         whandle->type);
 597                 return NULL;
 598         }
 599 }