2 * Copyright 2006 VMware, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial portions
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #include "main/enums.h"
27 #include "main/imports.h"
28 #include "main/macros.h"
29 #include "main/mtypes.h"
30 #include "main/fbobject.h"
31 #include "main/framebuffer.h"
32 #include "main/renderbuffer.h"
33 #include "main/context.h"
34 #include "main/teximage.h"
35 #include "main/image.h"
36 #include "main/condrender.h"
37 #include "util/hash_table.h"
40 #include "swrast/swrast.h"
41 #include "drivers/common/meta.h"
43 #include "intel_batchbuffer.h"
44 #include "intel_buffers.h"
45 #include "intel_blit.h"
46 #include "intel_fbo.h"
47 #include "intel_mipmap_tree.h"
48 #include "intel_image.h"
49 #include "intel_screen.h"
50 #include "intel_tex.h"
51 #include "brw_context.h"
53 #define FILE_DEBUG_FLAG DEBUG_FBO
55 /** Called by gl_renderbuffer::Delete() */
57 intel_delete_renderbuffer(struct gl_context *ctx, struct gl_renderbuffer *rb)
59 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
63 intel_miptree_release(&irb->mt);
64 intel_miptree_release(&irb->singlesample_mt);
66 _mesa_delete_renderbuffer(ctx, rb);
70 * \brief Downsample a winsys renderbuffer from mt to singlesample_mt.
72 * If the miptree needs no downsample, then skip.
75 intel_renderbuffer_downsample(struct brw_context *brw,
76 struct intel_renderbuffer *irb)
78 if (!irb->need_downsample)
80 intel_miptree_updownsample(brw, irb->mt, irb->singlesample_mt);
81 irb->need_downsample = false;
85 * \brief Upsample a winsys renderbuffer from singlesample_mt to mt.
87 * The upsample is done unconditionally.
90 intel_renderbuffer_upsample(struct brw_context *brw,
91 struct intel_renderbuffer *irb)
93 assert(!irb->need_downsample);
95 intel_miptree_updownsample(brw, irb->singlesample_mt, irb->mt);
99 * \see dd_function_table::MapRenderbuffer
102 intel_map_renderbuffer(struct gl_context *ctx,
103 struct gl_renderbuffer *rb,
104 GLuint x, GLuint y, GLuint w, GLuint h,
109 struct brw_context *brw = brw_context(ctx);
110 struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
111 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
112 struct intel_mipmap_tree *mt;
117 /* this is a malloc'd renderbuffer (accum buffer), not an irb */
118 GLint bpp = _mesa_get_format_bytes(rb->Format);
119 GLint rowStride = srb->RowStride;
120 *out_map = (GLubyte *) srb->Buffer + y * rowStride + x * bpp;
121 *out_stride = rowStride;
125 intel_prepare_render(brw);
127 /* The MapRenderbuffer API should always return a single-sampled mapping.
128 * The case we are asked to map multisampled RBs is in glReadPixels() (or
129 * swrast paths like glCopyTexImage()) from a window-system MSAA buffer,
130 * and GL expects an automatic resolve to happen.
132 * If it's a color miptree, there is a ->singlesample_mt which wraps the
133 * actual window system renderbuffer (which we may resolve to at any time),
134 * while the miptree itself is our driver-private allocation. If it's a
135 * depth or stencil miptree, we have a private MSAA buffer and no shared
136 * singlesample buffer, and since we don't expect anybody to ever actually
137 * resolve it, we just make a temporary singlesample buffer now when we
140 if (rb->NumSamples > 1) {
141 if (!irb->singlesample_mt) {
142 irb->singlesample_mt =
143 intel_miptree_create_for_renderbuffer(brw, irb->mt->format,
144 rb->Width, rb->Height,
146 if (!irb->singlesample_mt)
148 irb->singlesample_mt_is_tmp = true;
149 irb->need_downsample = true;
152 intel_renderbuffer_downsample(brw, irb);
153 mt = irb->singlesample_mt;
155 irb->need_map_upsample = mode & GL_MAP_WRITE_BIT;
160 /* For a window-system renderbuffer, we need to flip the mapping we receive
161 * upside-down. So we need to ask for a rectangle on flipped vertically, and
162 * we then return a pointer to the bottom of it with a negative stride.
165 y = rb->Height - y - h;
168 intel_miptree_map(brw, mt, irb->mt_level, irb->mt_layer,
169 x, y, w, h, mode, &map, &stride);
172 map += (h - 1) * stride;
176 DBG("%s: rb %d (%s) mt mapped: (%d, %d) (%dx%d) -> %p/%"PRIdPTR"\n",
177 __func__, rb->Name, _mesa_get_format_name(rb->Format),
178 x, y, w, h, map, stride);
181 *out_stride = stride;
190 * \see dd_function_table::UnmapRenderbuffer
193 intel_unmap_renderbuffer(struct gl_context *ctx,
194 struct gl_renderbuffer *rb)
196 struct brw_context *brw = brw_context(ctx);
197 struct swrast_renderbuffer *srb = (struct swrast_renderbuffer *)rb;
198 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
199 struct intel_mipmap_tree *mt;
201 DBG("%s: rb %d (%s)\n", __func__,
202 rb->Name, _mesa_get_format_name(rb->Format));
205 /* this is a malloc'd renderbuffer (accum buffer) */
210 if (rb->NumSamples > 1) {
211 mt = irb->singlesample_mt;
216 intel_miptree_unmap(brw, mt, irb->mt_level, irb->mt_layer);
218 if (irb->need_map_upsample) {
219 intel_renderbuffer_upsample(brw, irb);
220 irb->need_map_upsample = false;
223 if (irb->singlesample_mt_is_tmp)
224 intel_miptree_release(&irb->singlesample_mt);
229 * Round up the requested multisample count to the next supported sample size.
232 intel_quantize_num_samples(struct intel_screen *intel, unsigned num_samples)
234 const int *msaa_modes = intel_supported_msaa_modes(intel);
235 int quantized_samples = 0;
237 for (int i = 0; msaa_modes[i] != -1; ++i) {
238 if (msaa_modes[i] >= num_samples)
239 quantized_samples = msaa_modes[i];
244 return quantized_samples;
248 intel_renderbuffer_format(struct gl_context * ctx, GLenum internalFormat)
250 struct brw_context *brw = brw_context(ctx);
252 switch (internalFormat) {
254 /* Use the same format-choice logic as for textures.
255 * Renderbuffers aren't any different from textures for us,
256 * except they're less useful because you can't texture with
259 return ctx->Driver.ChooseTextureFormat(ctx, GL_TEXTURE_2D,
263 case GL_STENCIL_INDEX:
264 case GL_STENCIL_INDEX1_EXT:
265 case GL_STENCIL_INDEX4_EXT:
266 case GL_STENCIL_INDEX8_EXT:
267 case GL_STENCIL_INDEX16_EXT:
268 /* These aren't actual texture formats, so force them here. */
269 if (brw->has_separate_stencil) {
270 return MESA_FORMAT_S_UINT8;
272 assert(!brw->must_use_separate_stencil);
273 return MESA_FORMAT_Z24_UNORM_S8_UINT;
279 intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
280 GLenum internalFormat,
281 GLuint width, GLuint height)
283 struct brw_context *brw = brw_context(ctx);
284 struct intel_screen *screen = brw->intelScreen;
285 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
287 assert(rb->Format != MESA_FORMAT_NONE);
289 rb->NumSamples = intel_quantize_num_samples(screen, rb->NumSamples);
292 rb->_BaseFormat = _mesa_get_format_base_format(rb->Format);
294 intel_miptree_release(&irb->mt);
296 DBG("%s: %s: %s (%dx%d)\n", __func__,
297 _mesa_enum_to_string(internalFormat),
298 _mesa_get_format_name(rb->Format), width, height);
300 if (width == 0 || height == 0)
303 irb->mt = intel_miptree_create_for_renderbuffer(brw, rb->Format,
309 irb->layer_count = 1;
315 * Called via glRenderbufferStorageEXT() to set the format and allocate
316 * storage for a user-created renderbuffer.
319 intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
320 GLenum internalFormat,
321 GLuint width, GLuint height)
323 rb->Format = intel_renderbuffer_format(ctx, internalFormat);
324 return intel_alloc_private_renderbuffer_storage(ctx, rb, internalFormat, width, height);
328 intel_image_target_renderbuffer_storage(struct gl_context *ctx,
329 struct gl_renderbuffer *rb,
332 struct brw_context *brw = brw_context(ctx);
333 struct intel_renderbuffer *irb;
337 screen = brw->intelScreen->driScrnPriv;
338 image = screen->dri2.image->lookupEGLImage(screen, image_handle,
339 screen->loaderPrivate);
343 if (image->planar_format && image->planar_format->nplanes > 1) {
344 _mesa_error(ctx, GL_INVALID_OPERATION,
345 "glEGLImageTargetRenderbufferStorage(planar buffers are not "
346 "supported as render targets.)");
350 /* __DRIimage is opaque to the core so it has to be checked here */
351 if (!brw->format_supported_as_render_target[image->format]) {
352 _mesa_error(ctx, GL_INVALID_OPERATION,
353 "glEGLImageTargetRenderbufferStorage(unsupported image format)");
357 irb = intel_renderbuffer(rb);
358 intel_miptree_release(&irb->mt);
360 /* Disable creation of the miptree's aux buffers because the driver exposes
361 * no EGL API to manage them. That is, there is no API for resolving the aux
362 * buffer's content to the main buffer nor for invalidating the aux buffer's
365 irb->mt = intel_miptree_create_for_bo(brw,
373 MIPTREE_LAYOUT_DISABLE_AUX);
377 rb->InternalFormat = image->internal_format;
378 rb->Width = image->width;
379 rb->Height = image->height;
380 rb->Format = image->format;
381 rb->_BaseFormat = _mesa_get_format_base_format(image->format);
382 rb->NeedsFinishRenderTexture = true;
383 irb->layer_count = 1;
387 * Called by _mesa_resize_framebuffer() for each hardware renderbuffer when a
388 * window system framebuffer is resized.
390 * Any actual buffer reallocations for hardware renderbuffers (which would
391 * have triggered _mesa_resize_framebuffer()) were done by
392 * intel_process_dri2_buffer().
395 intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
396 GLenum internalFormat, GLuint width, GLuint height)
399 assert(rb->Name == 0);
402 rb->InternalFormat = internalFormat;
407 /** Dummy function for gl_renderbuffer::AllocStorage() */
409 intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
410 GLenum internalFormat, GLuint width, GLuint height)
413 (void) internalFormat;
416 _mesa_problem(ctx, "intel_nop_alloc_storage should never be called.");
421 * Create a new intel_renderbuffer which corresponds to an on-screen window,
422 * not a user-created renderbuffer.
424 * \param num_samples must be quantized.
426 struct intel_renderbuffer *
427 intel_create_renderbuffer(mesa_format format, unsigned num_samples)
429 struct intel_renderbuffer *irb;
430 struct gl_renderbuffer *rb;
432 GET_CURRENT_CONTEXT(ctx);
434 irb = CALLOC_STRUCT(intel_renderbuffer);
436 _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer");
440 rb = &irb->Base.Base;
441 irb->layer_count = 1;
443 _mesa_init_renderbuffer(rb, 0);
444 rb->ClassID = INTEL_RB_CLASS;
445 rb->_BaseFormat = _mesa_get_format_base_format(format);
447 rb->InternalFormat = rb->_BaseFormat;
448 rb->NumSamples = num_samples;
450 /* intel-specific methods */
451 rb->Delete = intel_delete_renderbuffer;
452 rb->AllocStorage = intel_alloc_window_storage;
458 * Private window-system buffers (as opposed to ones shared with the display
459 * server created with intel_create_renderbuffer()) are most similar in their
460 * handling to user-created renderbuffers, but they have a resize handler that
461 * may be called at intel_update_renderbuffers() time.
463 * \param num_samples must be quantized.
465 struct intel_renderbuffer *
466 intel_create_private_renderbuffer(mesa_format format, unsigned num_samples)
468 struct intel_renderbuffer *irb;
470 irb = intel_create_renderbuffer(format, num_samples);
471 irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage;
477 * Create a new renderbuffer object.
478 * Typically called via glBindRenderbufferEXT().
480 static struct gl_renderbuffer *
481 intel_new_renderbuffer(struct gl_context * ctx, GLuint name)
483 struct intel_renderbuffer *irb;
484 struct gl_renderbuffer *rb;
486 irb = CALLOC_STRUCT(intel_renderbuffer);
488 _mesa_error(ctx, GL_OUT_OF_MEMORY, "creating renderbuffer");
492 rb = &irb->Base.Base;
494 _mesa_init_renderbuffer(rb, name);
495 rb->ClassID = INTEL_RB_CLASS;
497 /* intel-specific methods */
498 rb->Delete = intel_delete_renderbuffer;
499 rb->AllocStorage = intel_alloc_renderbuffer_storage;
500 /* span routines set in alloc_storage function */
506 intel_renderbuffer_update_wrapper(struct brw_context *brw,
507 struct intel_renderbuffer *irb,
508 struct gl_texture_image *image,
512 struct gl_renderbuffer *rb = &irb->Base.Base;
513 struct intel_texture_image *intel_image = intel_texture_image(image);
514 struct intel_mipmap_tree *mt = intel_image->mt;
515 int level = image->Level;
517 rb->AllocStorage = intel_nop_alloc_storage;
519 /* adjust for texture view parameters */
520 layer += image->TexObject->MinLayer;
521 level += image->TexObject->MinLevel;
523 intel_miptree_check_level_layer(mt, level, layer);
524 irb->mt_level = level;
526 int layer_multiplier;
527 switch (mt->msaa_layout) {
528 case INTEL_MSAA_LAYOUT_UMS:
529 case INTEL_MSAA_LAYOUT_CMS:
530 layer_multiplier = mt->num_samples;
534 layer_multiplier = 1;
537 irb->mt_layer = layer_multiplier * layer;
540 irb->layer_count = 1;
541 } else if (mt->target != GL_TEXTURE_3D && image->TexObject->NumLayers > 0) {
542 irb->layer_count = image->TexObject->NumLayers;
544 irb->layer_count = mt->level[level].depth / layer_multiplier;
547 intel_miptree_reference(&irb->mt, mt);
549 intel_renderbuffer_set_draw_offset(irb);
551 if (intel_miptree_wants_hiz_buffer(brw, mt)) {
552 intel_miptree_alloc_hiz(brw, mt);
561 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb)
563 unsigned int dst_x, dst_y;
565 /* compute offset of the particular 2D image within the texture region */
566 intel_miptree_get_image_offset(irb->mt,
576 * Called by glFramebufferTexture[123]DEXT() (and other places) to
577 * prepare for rendering into texture memory. This might be called
578 * many times to choose different texture levels, cube faces, etc
579 * before intel_finish_render_texture() is ever called.
582 intel_render_texture(struct gl_context * ctx,
583 struct gl_framebuffer *fb,
584 struct gl_renderbuffer_attachment *att)
586 struct brw_context *brw = brw_context(ctx);
587 struct gl_renderbuffer *rb = att->Renderbuffer;
588 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
589 struct gl_texture_image *image = rb->TexImage;
590 struct intel_texture_image *intel_image = intel_texture_image(image);
591 struct intel_mipmap_tree *mt = intel_image->mt;
596 if (att->CubeMapFace > 0) {
597 assert(att->Zoffset == 0);
598 layer = att->CubeMapFace;
600 layer = att->Zoffset;
603 if (!intel_image->mt) {
604 /* Fallback on drawing to a texture that doesn't have a miptree
605 * (has a border, width/height 0, etc.)
607 _swrast_render_texture(ctx, fb, att);
611 intel_miptree_check_level_layer(mt, att->TextureLevel, layer);
613 if (!intel_renderbuffer_update_wrapper(brw, irb, image, layer, att->Layered)) {
614 _swrast_render_texture(ctx, fb, att);
618 DBG("Begin render %s texture tex=%u w=%d h=%d d=%d refcount=%d\n",
619 _mesa_get_format_name(image->TexFormat),
620 att->Texture->Name, image->Width, image->Height, image->Depth,
625 #define fbo_incomplete(fb, ...) do { \
626 static GLuint msg_id = 0; \
627 if (unlikely(ctx->Const.ContextFlags & GL_CONTEXT_FLAG_DEBUG_BIT)) { \
628 _mesa_gl_debug(ctx, &msg_id, \
629 MESA_DEBUG_SOURCE_API, \
630 MESA_DEBUG_TYPE_OTHER, \
631 MESA_DEBUG_SEVERITY_MEDIUM, \
635 fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED; \
639 * Do additional "completeness" testing of a framebuffer object.
642 intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
644 struct brw_context *brw = brw_context(ctx);
645 struct intel_renderbuffer *depthRb =
646 intel_get_renderbuffer(fb, BUFFER_DEPTH);
647 struct intel_renderbuffer *stencilRb =
648 intel_get_renderbuffer(fb, BUFFER_STENCIL);
649 struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL;
652 DBG("%s() on fb %p (%s)\n", __func__,
653 fb, (fb == ctx->DrawBuffer ? "drawbuffer" :
654 (fb == ctx->ReadBuffer ? "readbuffer" : "other buffer")));
657 depth_mt = depthRb->mt;
659 stencil_mt = stencilRb->mt;
660 if (stencil_mt->stencil_mt)
661 stencil_mt = stencil_mt->stencil_mt;
664 if (depth_mt && stencil_mt) {
666 /* For gen >= 6, we are using the lod/minimum-array-element fields
667 * and supporting layered rendering. This means that we must restrict
668 * the depth & stencil attachments to match in various more retrictive
669 * ways. (width, height, depth, LOD and layer)
671 if (depth_mt->physical_width0 != stencil_mt->physical_width0 ||
672 depth_mt->physical_height0 != stencil_mt->physical_height0 ||
673 depth_mt->physical_depth0 != stencil_mt->physical_depth0 ||
674 depthRb->mt_level != stencilRb->mt_level ||
675 depthRb->mt_layer != stencilRb->mt_layer) {
677 "FBO incomplete: depth and stencil must match in"
678 "width, height, depth, LOD and layer\n");
681 if (depth_mt == stencil_mt) {
682 /* For true packed depth/stencil (not faked on prefers-separate-stencil
683 * hardware) we need to be sure they're the same level/layer, since
684 * we'll be emitting a single packet describing the packed setup.
686 if (depthRb->mt_level != stencilRb->mt_level ||
687 depthRb->mt_layer != stencilRb->mt_layer) {
689 "FBO incomplete: depth image level/layer %d/%d != "
690 "stencil image %d/%d\n",
694 stencilRb->mt_layer);
697 if (!brw->has_separate_stencil) {
698 fbo_incomplete(fb, "FBO incomplete: separate stencil "
701 if (stencil_mt->format != MESA_FORMAT_S_UINT8) {
702 fbo_incomplete(fb, "FBO incomplete: separate stencil is %s "
704 _mesa_get_format_name(stencil_mt->format));
706 if (brw->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
707 /* Before Gen7, separate depth and stencil buffers can be used
708 * only if HiZ is enabled. From the Sandybridge PRM, Volume 2,
709 * Part 1, Bit 3DSTATE_DEPTH_BUFFER.SeparateStencilBufferEnable:
710 * [DevSNB]: This field must be set to the same value (enabled
711 * or disabled) as Hierarchical Depth Buffer Enable.
713 fbo_incomplete(fb, "FBO incomplete: separate stencil "
719 for (i = 0; i < ARRAY_SIZE(fb->Attachment); i++) {
720 struct gl_renderbuffer *rb;
721 struct intel_renderbuffer *irb;
723 if (fb->Attachment[i].Type == GL_NONE)
726 /* A supported attachment will have a Renderbuffer set either
727 * from being a Renderbuffer or being a texture that got the
728 * intel_wrap_texture() treatment.
730 rb = fb->Attachment[i].Renderbuffer;
732 fbo_incomplete(fb, "FBO incomplete: attachment without "
737 if (fb->Attachment[i].Type == GL_TEXTURE) {
738 if (rb->TexImage->Border) {
739 fbo_incomplete(fb, "FBO incomplete: texture with border\n");
744 irb = intel_renderbuffer(rb);
746 fbo_incomplete(fb, "FBO incomplete: software rendering "
751 if (!brw_render_target_supported(brw, rb)) {
752 fbo_incomplete(fb, "FBO incomplete: Unsupported HW "
753 "texture/renderbuffer format attached: %s\n",
754 _mesa_get_format_name(intel_rb_format(irb)));
760 * Try to do a glBlitFramebuffer using glCopyTexSubImage2D
761 * We can do this when the dst renderbuffer is actually a texture and
762 * there is no scaling, mirroring or scissoring.
764 * \return new buffer mask indicating the buffers left to blit using the
768 intel_blit_framebuffer_with_blitter(struct gl_context *ctx,
769 const struct gl_framebuffer *readFb,
770 const struct gl_framebuffer *drawFb,
771 GLint srcX0, GLint srcY0,
772 GLint srcX1, GLint srcY1,
773 GLint dstX0, GLint dstY0,
774 GLint dstX1, GLint dstY1,
777 struct brw_context *brw = brw_context(ctx);
779 /* Sync up the state of window system buffers. We need to do this before
780 * we go looking for the buffers.
782 intel_prepare_render(brw);
784 if (mask & GL_COLOR_BUFFER_BIT) {
786 struct gl_renderbuffer *src_rb = readFb->_ColorReadBuffer;
787 struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb);
790 perf_debug("glBlitFramebuffer(): missing src renderbuffer. "
791 "Falling back to software rendering.\n");
795 /* If the source and destination are the same size with no mirroring,
796 * the rectangles are within the size of the texture and there is no
797 * scissor, then we can probably use the blit engine.
799 if (!(srcX0 - srcX1 == dstX0 - dstX1 &&
800 srcY0 - srcY1 == dstY0 - dstY1 &&
803 srcX0 >= 0 && srcX1 <= readFb->Width &&
804 srcY0 >= 0 && srcY1 <= readFb->Height &&
805 dstX0 >= 0 && dstX1 <= drawFb->Width &&
806 dstY0 >= 0 && dstY1 <= drawFb->Height &&
807 !(ctx->Scissor.EnableFlags))) {
808 perf_debug("glBlitFramebuffer(): non-1:1 blit. "
809 "Falling back to software rendering.\n");
813 /* Blit to all active draw buffers. We don't do any pre-checking,
814 * because we assume that copying to MRTs is rare, and failure midway
815 * through copying is even more rare. Even if it was to occur, it's
816 * safe to let meta start the copy over from scratch, because
817 * glBlitFramebuffer completely overwrites the destination pixels, and
818 * results are undefined if any destination pixels have a dependency on
821 for (i = 0; i < drawFb->_NumColorDrawBuffers; i++) {
822 struct gl_renderbuffer *dst_rb = drawFb->_ColorDrawBuffers[i];
823 struct intel_renderbuffer *dst_irb = intel_renderbuffer(dst_rb);
826 perf_debug("glBlitFramebuffer(): missing dst renderbuffer. "
827 "Falling back to software rendering.\n");
831 if (!intel_miptree_blit(brw,
833 src_irb->mt_level, src_irb->mt_layer,
834 srcX0, srcY0, src_rb->Name == 0,
836 dst_irb->mt_level, dst_irb->mt_layer,
837 dstX0, dstY0, dst_rb->Name == 0,
838 dstX1 - dstX0, dstY1 - dstY0, GL_COPY)) {
839 perf_debug("glBlitFramebuffer(): unknown blit failure. "
840 "Falling back to software rendering.\n");
845 mask &= ~GL_COLOR_BUFFER_BIT;
852 intel_blit_framebuffer(struct gl_context *ctx,
853 struct gl_framebuffer *readFb,
854 struct gl_framebuffer *drawFb,
855 GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
856 GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
857 GLbitfield mask, GLenum filter)
859 struct brw_context *brw = brw_context(ctx);
861 /* Page 679 of OpenGL 4.4 spec says:
862 * "Added BlitFramebuffer to commands affected by conditional rendering in
863 * section 10.10 (Bug 9562)."
865 if (!_mesa_check_conditional_render(ctx))
868 mask = brw_blorp_framebuffer(brw, readFb, drawFb,
869 srcX0, srcY0, srcX1, srcY1,
870 dstX0, dstY0, dstX1, dstY1,
875 mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
876 srcX0, srcY0, srcX1, srcY1,
877 dstX0, dstY0, dstX1, dstY1,
882 if (brw->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
883 assert(!"Invalid blit");
886 /* Try using the BLT engine. */
887 mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
888 srcX0, srcY0, srcX1, srcY1,
889 dstX0, dstY0, dstX1, dstY1,
894 _swrast_BlitFramebuffer(ctx, readFb, drawFb,
895 srcX0, srcY0, srcX1, srcY1,
896 dstX0, dstY0, dstX1, dstY1,
901 * Gen4-5 implementation of glBlitFrameBuffer().
903 * Tries BLT, Meta, then swrast.
905 * Gen4-5 have a single ring for both 3D and BLT operations, so there's no
906 * inter-ring synchronization issues like on Gen6+. It is apparently faster
907 * than using the 3D pipeline. Original Gen4 also has to rebase and copy
908 * miptree slices in order to render to unaligned locations.
911 gen4_blit_framebuffer(struct gl_context *ctx,
912 struct gl_framebuffer *readFb,
913 struct gl_framebuffer *drawFb,
914 GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
915 GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
916 GLbitfield mask, GLenum filter)
918 /* Page 679 of OpenGL 4.4 spec says:
919 * "Added BlitFramebuffer to commands affected by conditional rendering in
920 * section 10.10 (Bug 9562)."
922 if (!_mesa_check_conditional_render(ctx))
925 mask = intel_blit_framebuffer_with_blitter(ctx, readFb, drawFb,
926 srcX0, srcY0, srcX1, srcY1,
927 dstX0, dstY0, dstX1, dstY1,
932 mask = _mesa_meta_BlitFramebuffer(ctx, readFb, drawFb,
933 srcX0, srcY0, srcX1, srcY1,
934 dstX0, dstY0, dstX1, dstY1,
939 _swrast_BlitFramebuffer(ctx, readFb, drawFb,
940 srcX0, srcY0, srcX1, srcY1,
941 dstX0, dstY0, dstX1, dstY1,
946 * Does the renderbuffer have hiz enabled?
949 intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb)
951 return intel_miptree_level_has_hiz(irb->mt, irb->mt_level);
955 intel_renderbuffer_resolve_hiz(struct brw_context *brw,
956 struct intel_renderbuffer *irb)
959 return intel_miptree_slice_resolve_hiz(brw,
968 intel_renderbuffer_att_set_needs_depth_resolve(struct gl_renderbuffer_attachment *att)
970 struct intel_renderbuffer *irb = intel_renderbuffer(att->Renderbuffer);
973 intel_miptree_set_all_slices_need_depth_resolve(irb->mt, irb->mt_level);
975 intel_miptree_slice_set_needs_depth_resolve(irb->mt,
983 intel_renderbuffer_resolve_depth(struct brw_context *brw,
984 struct intel_renderbuffer *irb)
987 return intel_miptree_slice_resolve_depth(brw,
996 intel_renderbuffer_move_to_temp(struct brw_context *brw,
997 struct intel_renderbuffer *irb,
1000 struct gl_renderbuffer *rb =&irb->Base.Base;
1001 struct intel_texture_image *intel_image = intel_texture_image(rb->TexImage);
1002 struct intel_mipmap_tree *new_mt;
1003 int width, height, depth;
1005 uint32_t layout_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD |
1006 MIPTREE_LAYOUT_TILING_ANY;
1008 intel_get_image_dims(rb->TexImage, &width, &height, &depth);
1010 new_mt = intel_miptree_create(brw, rb->TexImage->TexObject->Target,
1011 intel_image->base.Base.TexFormat,
1012 intel_image->base.Base.Level,
1013 intel_image->base.Base.Level,
1014 width, height, depth,
1015 irb->mt->num_samples,
1018 if (intel_miptree_wants_hiz_buffer(brw, new_mt)) {
1019 intel_miptree_alloc_hiz(brw, new_mt);
1022 intel_miptree_copy_teximage(brw, intel_image, new_mt, invalidate);
1024 intel_miptree_reference(&irb->mt, intel_image->mt);
1025 intel_renderbuffer_set_draw_offset(irb);
1026 intel_miptree_release(&new_mt);
1030 brw_render_cache_set_clear(struct brw_context *brw)
1032 struct set_entry *entry;
1034 set_foreach(brw->render_cache, entry) {
1035 _mesa_set_remove(brw->render_cache, entry);
1040 brw_render_cache_set_add_bo(struct brw_context *brw, drm_intel_bo *bo)
1042 _mesa_set_add(brw->render_cache, bo);
1046 * Emits an appropriate flush for a BO if it has been rendered to within the
1047 * same batchbuffer as a read that's about to be emitted.
1049 * The GPU has separate, incoherent caches for the render cache and the
1050 * sampler cache, along with other caches. Usually data in the different
1051 * caches don't interact (e.g. we don't render to our driver-generated
1052 * immediate constant data), but for render-to-texture in FBOs we definitely
1053 * do. When a batchbuffer is flushed, the kernel will ensure that everything
1054 * necessary is flushed before another use of that BO, but for reuse from
1055 * different caches within a batchbuffer, it's all our responsibility.
1058 brw_render_cache_set_check_flush(struct brw_context *brw, drm_intel_bo *bo)
1060 if (!_mesa_set_search(brw->render_cache, bo))
1063 if (brw->gen >= 6) {
1064 if (brw->gen == 6) {
1065 /* [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache
1066 * Flush Enable = 1, a PIPE_CONTROL with any non-zero
1067 * post-sync-op is required.
1069 brw_emit_post_sync_nonzero_flush(brw);
1072 brw_emit_pipe_control_flush(brw,
1073 PIPE_CONTROL_DEPTH_CACHE_FLUSH |
1074 PIPE_CONTROL_RENDER_TARGET_FLUSH |
1075 PIPE_CONTROL_CS_STALL);
1077 brw_emit_pipe_control_flush(brw,
1078 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
1079 PIPE_CONTROL_CONST_CACHE_INVALIDATE);
1081 brw_emit_mi_flush(brw);
1084 brw_render_cache_set_clear(brw);
1088 * Do one-time context initializations related to GL_EXT_framebuffer_object.
1089 * Hook in device driver functions.
1092 intel_fbo_init(struct brw_context *brw)
1094 struct dd_function_table *dd = &brw->ctx.Driver;
1095 dd->NewRenderbuffer = intel_new_renderbuffer;
1096 dd->MapRenderbuffer = intel_map_renderbuffer;
1097 dd->UnmapRenderbuffer = intel_unmap_renderbuffer;
1098 dd->RenderTexture = intel_render_texture;
1099 dd->ValidateFramebuffer = intel_validate_framebuffer;
1101 dd->BlitFramebuffer = intel_blit_framebuffer;
1103 dd->BlitFramebuffer = gen4_blit_framebuffer;
1104 dd->EGLImageTargetRenderbufferStorage =
1105 intel_image_target_renderbuffer_storage;
1107 brw->render_cache = _mesa_set_create(brw, _mesa_hash_pointer,
1108 _mesa_key_pointer_equal);