This silences a divergent error found with F1 2015.
Basically, the NDV bit has to be set when a FSWZ instruction is
inside divergent code, but it's not needed otherwise. The correct
fix should be to set it only in divergent code situations.
GM107 emitter already sets that bit.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
e0a067ed484698ff62dd8c8750aeb46f18988b17)
void
CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
{
- code[0] = 0x00000002 | ((qOp & 1) << 31);
+ code[0] = 0x00000202 | ((qOp & 1) << 31); // dall
code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
defId(i->def(0), 2);
srcId(i->src(0), 10);
srcId((i->srcExists(1) && i->predSrc != 1) ? i->src(1) : i->src(0), 23);
- if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
- code[1] |= 1 << 9; // dall
-
emitPredicate(i);
}
void
CodeEmitterNVC0::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
{
- code[0] = 0x00000000 | (laneMask << 6);
+ code[0] = 0x00000200 | (laneMask << 6); // dall
code[1] = 0x48000000 | qOp;
defId(i->def(0), 14);
srcId(i->src(0), 20);
srcId((i->srcExists(1) && i->predSrc != 1) ? i->src(1) : i->src(0), 26);
- if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
- code[0] |= 1 << 9; // dall
-
emitPredicate(i);
}